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1 : //===-- ARMUnwindOpAsm.cpp - ARM Unwind Opcodes Assembler -------*- C++ -*-===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : // This file implements the unwind opcode assmebler for ARM exception handling
11 : // table.
12 : //
13 : //===----------------------------------------------------------------------===//
14 :
15 : #include "ARMUnwindOpAsm.h"
16 : #include "llvm/Support/ARMEHABI.h"
17 : #include "llvm/Support/LEB128.h"
18 : #include "llvm/Support/MathExtras.h"
19 : #include <cassert>
20 :
21 : using namespace llvm;
22 :
23 : namespace {
24 :
25 : /// UnwindOpcodeStreamer - The simple wrapper over SmallVector to emit bytes
26 : /// with MSB to LSB per uint32_t ordering. For example, the first byte will
27 : /// be placed in Vec[3], and the following bytes will be placed in 2, 1, 0,
28 : /// 7, 6, 5, 4, 11, 10, 9, 8, and so on.
29 : class UnwindOpcodeStreamer {
30 : private:
31 : SmallVectorImpl<uint8_t> &Vec;
32 : size_t Pos = 3;
33 :
34 : public:
35 : UnwindOpcodeStreamer(SmallVectorImpl<uint8_t> &V) : Vec(V) {}
36 :
37 : /// Emit the byte in MSB to LSB per uint32_t order.
38 : void EmitByte(uint8_t elem) {
39 520 : Vec[Pos] = elem;
40 686 : Pos = (((Pos ^ 0x3u) + 1) ^ 0x3u);
41 : }
42 :
43 : /// Emit the size prefix.
44 0 : void EmitSize(size_t Size) {
45 218 : size_t SizeInWords = (Size + 3) / 4;
46 : assert(SizeInWords <= 0x100u &&
47 : "Only 256 additional words are allowed for unwind opcodes");
48 218 : EmitByte(static_cast<uint8_t>(SizeInWords - 1));
49 0 : }
50 :
51 : /// Emit the personality index prefix.
52 0 : void EmitPersonalityIndex(unsigned PI) {
53 : assert(PI < ARM::EHABI::NUM_PERSONALITY_INDEX &&
54 : "Invalid personality prefix");
55 451 : EmitByte(ARM::EHABI::EHT_COMPACT | PI);
56 0 : }
57 :
58 : /// Fill the rest of bytes with FINISH opcode.
59 0 : void FillFinishOpcode() {
60 2412 : while (Pos < Vec.size())
61 : EmitByte(ARM::EHABI::UNWIND_OPCODE_FINISH);
62 0 : }
63 : };
64 :
65 : } // end anonymous namespace
66 :
67 390 : void UnwindOpcodeAssembler::EmitRegSave(uint32_t RegSave) {
68 390 : if (RegSave == 0u)
69 : return;
70 :
71 : // One byte opcode to save register r14 and r11-r4
72 390 : if (RegSave & (1u << 4)) {
73 : // The one byte opcode will always save r4, thus we can't use the one byte
74 : // opcode when r4 is not in .save directive.
75 :
76 : // Compute the consecutive registers from r4 to r11.
77 292 : uint32_t Mask = RegSave & 0xff0u;
78 292 : uint32_t Range = countTrailingOnes(Mask >> 5); // Exclude r4.
79 : // Mask off non-consecutive registers. Keep r4.
80 292 : Mask &= ~(0xffffffe0u << Range);
81 :
82 : // Emit this opcode when the mask covers every registers.
83 292 : uint32_t UnmaskedReg = RegSave & 0xfff0u & (~Mask);
84 292 : if (UnmaskedReg == 0u) {
85 : // Pop r[4 : (4 + n)]
86 6 : EmitInt8(ARM::EHABI::UNWIND_OPCODE_POP_REG_RANGE_R4 | Range);
87 6 : RegSave &= 0x000fu;
88 286 : } else if (UnmaskedReg == (1u << 14)) {
89 : // Pop r[14] + r[4 : (4 + n)]
90 125 : EmitInt8(ARM::EHABI::UNWIND_OPCODE_POP_REG_RANGE_R4_R14 | Range);
91 125 : RegSave &= 0x000fu;
92 : }
93 : }
94 :
95 : // Two bytes opcode to save register r15-r4
96 390 : if ((RegSave & 0xfff0u) != 0)
97 254 : EmitInt16(ARM::EHABI::UNWIND_OPCODE_POP_REG_MASK_R4 | (RegSave >> 4));
98 :
99 : // Opcode to save register r3-r0
100 390 : if ((RegSave & 0x000fu) != 0)
101 8 : EmitInt16(ARM::EHABI::UNWIND_OPCODE_POP_REG_MASK | (RegSave & 0x000fu));
102 : }
103 :
104 : /// Emit unwind opcodes for .vsave directives
105 11 : void UnwindOpcodeAssembler::EmitVFPRegSave(uint32_t VFPRegSave) {
106 : // We only have 4 bits to save the offset in the opcode so look at the lower
107 : // and upper 16 bits separately.
108 33 : for (uint32_t Regs : {VFPRegSave & 0xffff0000u, VFPRegSave & 0x0000ffffu}) {
109 33 : while (Regs) {
110 : // Now look for a run of set bits. Remember the MSB and LSB of the run.
111 11 : auto RangeMSB = 32 - countLeadingZeros(Regs);
112 11 : auto RangeLen = countLeadingOnes(Regs << (32 - RangeMSB));
113 11 : auto RangeLSB = RangeMSB - RangeLen;
114 :
115 : int Opcode = RangeLSB >= 16
116 11 : ? ARM::EHABI::UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD_D16
117 : : ARM::EHABI::UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD;
118 :
119 11 : EmitInt16(Opcode | ((RangeLSB % 16) << 4) | (RangeLen - 1));
120 :
121 : // Zero out bits we're done with.
122 11 : Regs &= ~(-1u << RangeLSB);
123 : }
124 : }
125 11 : }
126 :
127 : /// Emit unwind opcodes to copy address from source register to $sp.
128 98 : void UnwindOpcodeAssembler::EmitSetSP(uint16_t Reg) {
129 98 : EmitInt8(ARM::EHABI::UNWIND_OPCODE_SET_VSP | Reg);
130 98 : }
131 :
132 : /// Emit unwind opcodes to add $sp with an offset.
133 392 : void UnwindOpcodeAssembler::EmitSPOffset(int64_t Offset) {
134 392 : if (Offset > 0x200) {
135 : uint8_t Buff[16];
136 137 : Buff[0] = ARM::EHABI::UNWIND_OPCODE_INC_VSP_ULEB128;
137 137 : size_t ULEBSize = encodeULEB128((Offset - 0x204) >> 2, Buff + 1);
138 137 : EmitBytes(Buff, ULEBSize + 1);
139 255 : } else if (Offset > 0) {
140 164 : if (Offset > 0x100) {
141 5 : EmitInt8(ARM::EHABI::UNWIND_OPCODE_INC_VSP | 0x3fu);
142 5 : Offset -= 0x100;
143 : }
144 164 : EmitInt8(ARM::EHABI::UNWIND_OPCODE_INC_VSP |
145 164 : static_cast<uint8_t>((Offset - 4) >> 2));
146 91 : } else if (Offset < 0) {
147 85 : while (Offset < -0x100) {
148 6 : EmitInt8(ARM::EHABI::UNWIND_OPCODE_DEC_VSP | 0x3fu);
149 6 : Offset += 0x100;
150 : }
151 79 : EmitInt8(ARM::EHABI::UNWIND_OPCODE_DEC_VSP |
152 79 : static_cast<uint8_t>(((-Offset) - 4) >> 2));
153 : }
154 392 : }
155 :
156 520 : void UnwindOpcodeAssembler::Finalize(unsigned &PersonalityIndex,
157 : SmallVectorImpl<uint8_t> &Result) {
158 : UnwindOpcodeStreamer OpStreamer(Result);
159 :
160 520 : if (HasPersonality) {
161 : // User-specifed personality routine: [ SIZE , OP1 , OP2 , ... ]
162 69 : PersonalityIndex = ARM::EHABI::NUM_PERSONALITY_INDEX;
163 69 : size_t TotalSize = Ops.size() + 1;
164 69 : size_t RoundUpSize = (TotalSize + 3) / 4 * 4;
165 69 : Result.resize(RoundUpSize);
166 : OpStreamer.EmitSize(RoundUpSize);
167 : } else {
168 : // If no personalityindex is specified, select ane
169 451 : if (PersonalityIndex == ARM::EHABI::NUM_PERSONALITY_INDEX)
170 590 : PersonalityIndex = (Ops.size() <= 3) ? ARM::EHABI::AEABI_UNWIND_CPP_PR0
171 : : ARM::EHABI::AEABI_UNWIND_CPP_PR1;
172 451 : if (PersonalityIndex == ARM::EHABI::AEABI_UNWIND_CPP_PR0) {
173 : // __aeabi_unwind_cpp_pr0: [ 0x80 , OP1 , OP2 , OP3 ]
174 : assert(Ops.size() <= 3 && "too many opcodes for __aeabi_unwind_cpp_pr0");
175 302 : Result.resize(4);
176 302 : OpStreamer.EmitPersonalityIndex(PersonalityIndex);
177 : } else {
178 : // __aeabi_unwind_cpp_pr{1,2}: [ {0x81,0x82} , SIZE , OP1 , OP2 , ... ]
179 149 : size_t TotalSize = Ops.size() + 2;
180 149 : size_t RoundUpSize = (TotalSize + 3) / 4 * 4;
181 149 : Result.resize(RoundUpSize);
182 149 : OpStreamer.EmitPersonalityIndex(PersonalityIndex);
183 : OpStreamer.EmitSize(RoundUpSize);
184 : }
185 : }
186 :
187 : // Copy the unwind opcodes
188 1982 : for (size_t i = OpBegins.size() - 1; i > 0; --i)
189 4223 : for (size_t j = OpBegins[i - 1], end = OpBegins[i]; j < end; ++j)
190 1397 : OpStreamer.EmitByte(Ops[j]);
191 :
192 : // Emit the padding finish opcodes if the size is not multiple of 4.
193 : OpStreamer.FillFinishOpcode();
194 :
195 : // Reset the assembler state
196 : Reset();
197 520 : }
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