Line data    Source code

       1             : //===--- WebAssemblyOptimizeLiveIntervals.cpp - LiveInterval processing ---===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : ///
      10             : /// \file
      11             : /// Optimize LiveIntervals for use in a post-RA context.
      12             : //
      13             : /// LiveIntervals normally runs before register allocation when the code is
      14             : /// only recently lowered out of SSA form, so it's uncommon for registers to
      15             : /// have multiple defs, and when they do, the defs are usually closely related.
      16             : /// Later, after coalescing, tail duplication, and other optimizations, it's
      17             : /// more common to see registers with multiple unrelated defs. This pass
      18             : /// updates LiveIntervals to distribute the value numbers across separate
      19             : /// LiveIntervals.
      20             : ///
      21             : //===----------------------------------------------------------------------===//
      22             : 
      23             : #include "WebAssembly.h"
      24             : #include "WebAssemblySubtarget.h"
      25             : #include "llvm/CodeGen/LiveIntervals.h"
      26             : #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
      27             : #include "llvm/CodeGen/MachineRegisterInfo.h"
      28             : #include "llvm/CodeGen/Passes.h"
      29             : #include "llvm/Support/Debug.h"
      30             : #include "llvm/Support/raw_ostream.h"
      31             : using namespace llvm;
      32             : 
      33             : #define DEBUG_TYPE "wasm-optimize-live-intervals"
      34             : 
      35             : namespace {
      36             : class WebAssemblyOptimizeLiveIntervals final : public MachineFunctionPass {
      37         298 :   StringRef getPassName() const override {
      38         298 :     return "WebAssembly Optimize Live Intervals";
      39             :   }
      40             : 
      41         298 :   void getAnalysisUsage(AnalysisUsage &AU) const override {
      42         298 :     AU.setPreservesCFG();
      43             :     AU.addRequired<LiveIntervals>();
      44             :     AU.addPreserved<MachineBlockFrequencyInfo>();
      45             :     AU.addPreserved<SlotIndexes>();
      46             :     AU.addPreserved<LiveIntervals>();
      47         298 :     AU.addPreservedID(LiveVariablesID);
      48         298 :     AU.addPreservedID(MachineDominatorsID);
      49         298 :     MachineFunctionPass::getAnalysisUsage(AU);
      50         298 :   }
      51             : 
      52             :   bool runOnMachineFunction(MachineFunction &MF) override;
      53             : 
      54             : public:
      55             :   static char ID; // Pass identification, replacement for typeid
      56         298 :   WebAssemblyOptimizeLiveIntervals() : MachineFunctionPass(ID) {}
      57             : };
      58             : } // end anonymous namespace
      59             : 
      60             : char WebAssemblyOptimizeLiveIntervals::ID = 0;
      61      199030 : INITIALIZE_PASS(WebAssemblyOptimizeLiveIntervals, DEBUG_TYPE,
      62             :                 "Optimize LiveIntervals for WebAssembly", false, false)
      63             : 
      64         298 : FunctionPass *llvm::createWebAssemblyOptimizeLiveIntervals() {
      65         298 :   return new WebAssemblyOptimizeLiveIntervals();
      66             : }
      67             : 
      68        2891 : bool WebAssemblyOptimizeLiveIntervals::runOnMachineFunction(
      69             :     MachineFunction &MF) {
      70             :   LLVM_DEBUG(dbgs() << "********** Optimize LiveIntervals **********\n"
      71             :                        "********** Function: "
      72             :                     << MF.getName() << '\n');
      73             : 
      74        2891 :   MachineRegisterInfo &MRI = MF.getRegInfo();
      75        2891 :   LiveIntervals &LIS = getAnalysis<LiveIntervals>();
      76             : 
      77             :   // We don't preserve SSA form.
      78        2891 :   MRI.leaveSSA();
      79             : 
      80             :   assert(MRI.tracksLiveness() && "OptimizeLiveIntervals expects liveness");
      81             : 
      82             :   // Split multiple-VN LiveIntervals into multiple LiveIntervals.
      83             :   SmallVector<LiveInterval *, 4> SplitLIs;
      84       21801 :   for (unsigned i = 0, e = MRI.getNumVirtRegs(); i < e; ++i) {
      85             :     unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
      86       18910 :     if (MRI.reg_nodbg_empty(Reg))
      87             :       continue;
      88             : 
      89       18215 :     LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs);
      90             :     SplitLIs.clear();
      91             :   }
      92             : 
      93             :   // In PrepareForLiveIntervals, we conservatively inserted IMPLICIT_DEF
      94             :   // instructions to satisfy LiveIntervals' requirement that all uses be
      95             :   // dominated by defs. Now that LiveIntervals has computed which of these
      96             :   // defs are actually needed and which are dead, remove the dead ones.
      97       37475 :   for (auto MII = MF.begin()->begin(), MIE = MF.begin()->end(); MII != MIE;) {
      98             :     MachineInstr *MI = &*MII++;
      99       34584 :     if (MI->isImplicitDef() && MI->getOperand(0).isDead()) {
     100       11202 :       LiveInterval &LI = LIS.getInterval(MI->getOperand(0).getReg());
     101       11202 :       LIS.removeVRegDefAt(LI, LIS.getInstructionIndex(*MI).getRegSlot());
     102       11202 :       LIS.RemoveMachineInstrFromMaps(*MI);
     103       11202 :       MI->eraseFromParent();
     104             :     }
     105             :   }
     106             : 
     107        2891 :   return false;
     108             : }