Bug Summary

File:build/source/build-llvm/tools/clang/stage2-bins/lib/Target/AArch64/AArch64GenPreLegalizeGICombiner.inc
Warning:line 3051, column 7
Value stored to 'Partition' is never read

Annotated Source Code

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clang -cc1 -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name AArch64PreLegalizerCombiner.cpp -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -analyzer-config-compatibility-mode=true -mrelocation-model pic -pic-level 2 -mframe-pointer=none -fmath-errno -ffp-contract=on -fno-rounding-math -mconstructor-aliases -funwind-tables=2 -target-cpu x86-64 -tune-cpu generic -debugger-tuning=gdb -ffunction-sections -fdata-sections -fcoverage-compilation-dir=/build/source/build-llvm/tools/clang/stage2-bins -resource-dir /usr/lib/llvm-17/lib/clang/17 -I lib/Target/AArch64 -I /build/source/llvm/lib/Target/AArch64 -I include -I /build/source/llvm/include -D _DEBUG -D _GLIBCXX_ASSERTIONS -D _GNU_SOURCE -D _LIBCPP_ENABLE_ASSERTIONS -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -D _FORTIFY_SOURCE=2 -D NDEBUG -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/c++/10 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/x86_64-linux-gnu/c++/10 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/c++/10/backward -internal-isystem /usr/lib/llvm-17/lib/clang/17/include -internal-isystem /usr/local/include -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../x86_64-linux-gnu/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -fmacro-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fmacro-prefix-map=/build/source/= -fcoverage-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fcoverage-prefix-map=/build/source/= -source-date-epoch 1676671786 -O2 -Wno-unused-command-line-argument -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-redundant-move -Wno-pessimizing-move -Wno-noexcept-type -Wno-comment -Wno-misleading-indentation -std=c++17 -fdeprecated-macro -fdebug-compilation-dir=/build/source/build-llvm/tools/clang/stage2-bins -fdebug-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fdebug-prefix-map=/build/source/= -ferror-limit 19 -fvisibility=hidden -fvisibility-inlines-hidden -stack-protector 2 -fgnuc-version=4.2.1 -fcolor-diagnostics -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -faddrsig -D__GCC_HAVE_DWARF2_CFI_ASM=1 -o /tmp/scan-build-2023-02-17-235145-561320-1 -x c++ /build/source/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Global Combiner *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
10#include "llvm/ADT/SparseBitVector.h"
11namespace llvm {
12extern cl::OptionCategory GICombinerOptionCategory;
13} // end namespace llvm
14#endif // ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
15
16#ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H
17class AArch64GenPreLegalizerCombinerHelperRuleConfig {
18 SparseBitVector<> DisabledRules;
19
20public:
21 bool parseCommandLineOption();
22 bool isRuleDisabled(unsigned ID) const;
23 bool setRuleEnabled(StringRef RuleIdentifier);
24 bool setRuleDisabled(StringRef RuleIdentifier);
25};
26
27class AArch64GenPreLegalizerCombinerHelper : public AArch64PreLegalizerCombinerHelperState {
28 const AArch64GenPreLegalizerCombinerHelperRuleConfig *RuleConfig;
29
30public:
31 template <typename... Args>AArch64GenPreLegalizerCombinerHelper(const AArch64GenPreLegalizerCombinerHelperRuleConfig &RuleConfig, Args &&... args) : AArch64PreLegalizerCombinerHelperState(std::forward<Args>(args)...), RuleConfig(&RuleConfig) {}
32
33 bool tryCombineAll(
34 GISelChangeObserver &Observer,
35 MachineInstr &MI,
36 MachineIRBuilder &B) const;
37};
38
39static std::optional<uint64_t> getRuleIdxForIdentifier(StringRef RuleIdentifier) {
40 uint64_t I;
41 // getAtInteger(...) returns false on success
42 bool Parsed = !RuleIdentifier.getAsInteger(0, I);
43 if (Parsed)
44 return I;
45
46#ifndef NDEBUG
47 switch (RuleIdentifier.size()) {
48 default: break;
49 case 9: // 4 strings to match.
50 switch (RuleIdentifier[0]) {
51 default: break;
52 case 'a': // 1 string to match.
53 if (memcmp(RuleIdentifier.data()+1, "ddo_by_0", 8) != 0)
54 break;
55 return 73; // "addo_by_0"
56 case 'c': // 1 string to match.
57 if (memcmp(RuleIdentifier.data()+1, "opy_prop", 8) != 0)
58 break;
59 return 0; // "copy_prop"
60 case 'm': // 2 strings to match.
61 if (memcmp(RuleIdentifier.data()+1, "ulo_by_", 7) != 0)
62 break;
63 switch (RuleIdentifier[8]) {
64 default: break;
65 case '0': // 1 string to match.
66 return 72; // "mulo_by_0"
67 case '2': // 1 string to match.
68 return 71; // "mulo_by_2"
69 }
70 break;
71 }
72 break;
73 case 10: // 3 strings to match.
74 switch (RuleIdentifier[0]) {
75 default: break;
76 case 'i': // 1 string to match.
77 if (memcmp(RuleIdentifier.data()+1, "2p_to_p2i", 9) != 0)
78 break;
79 return 29; // "i2p_to_p2i"
80 case 'm': // 1 string to match.
81 if (memcmp(RuleIdentifier.data()+1, "ul_to_shl", 9) != 0)
82 break;
83 return 1; // "mul_to_shl"
84 case 'p': // 1 string to match.
85 if (memcmp(RuleIdentifier.data()+1, "2i_to_i2p", 9) != 0)
86 break;
87 return 28; // "p2i_to_i2p"
88 }
89 break;
90 case 11: // 4 strings to match.
91 switch (RuleIdentifier[0]) {
92 default: break;
93 case 'a': // 1 string to match.
94 if (memcmp(RuleIdentifier.data()+1, "dd_sub_reg", 10) != 0)
95 break;
96 return 33; // "add_sub_reg"
97 case 's': // 1 string to match.
98 if (memcmp(RuleIdentifier.data()+1, "ub_add_reg", 10) != 0)
99 break;
100 return 105; // "sub_add_reg"
101 case 't': // 1 string to match.
102 if (memcmp(RuleIdentifier.data()+1, "runc_shift", 10) != 0)
103 break;
104 return 67; // "trunc_shift"
105 case 'u': // 1 string to match.
106 if (memcmp(RuleIdentifier.data()+1, "nmerge_cst", 10) != 0)
107 break;
108 return 62; // "unmerge_cst"
109 }
110 break;
111 case 12: // 6 strings to match.
112 switch (RuleIdentifier[0]) {
113 default: break;
114 case 'a': // 1 string to match.
115 if (memcmp(RuleIdentifier.data()+1, "dde_to_addo", 11) != 0)
116 break;
117 return 74; // "adde_to_addo"
118 case 'e': // 1 string to match.
119 if (memcmp(RuleIdentifier.data()+1, "xt_ext_fold", 11) != 0)
120 break;
121 return 58; // "ext_ext_fold"
122 case 'f': // 1 string to match.
123 if (memcmp(RuleIdentifier.data()+1, "sub_to_fneg", 11) != 0)
124 break;
125 return 108; // "fsub_to_fneg"
126 case 'm': // 1 string to match.
127 if (memcmp(RuleIdentifier.data()+1, "ulh_to_lshr", 11) != 0)
128 break;
129 return 93; // "mulh_to_lshr"
130 case 'n': // 1 string to match.
131 if (memcmp(RuleIdentifier.data()+1, "ot_cmp_fold", 11) != 0)
132 break;
133 return 59; // "not_cmp_fold"
134 case 'r': // 1 string to match.
135 if (memcmp(RuleIdentifier.data()+1, "edundant_or", 11) != 0)
136 break;
137 return 52; // "redundant_or"
138 }
139 break;
140 case 13: // 8 strings to match.
141 switch (RuleIdentifier[0]) {
142 default: break;
143 case 'c': // 1 string to match.
144 if (memcmp(RuleIdentifier.data()+1, "onstant_fold", 12) != 0)
145 break;
146 return 89; // "constant_fold"
147 case 'l': // 1 string to match.
148 if (memcmp(RuleIdentifier.data()+1, "oad_and_mask", 12) != 0)
149 break;
150 return 9; // "load_and_mask"
151 case 'm': // 1 string to match.
152 if (memcmp(RuleIdentifier.data()+1, "erge_unmerge", 12) != 0)
153 break;
154 return 65; // "merge_unmerge"
155 case 'r': // 1 string to match.
156 if (memcmp(RuleIdentifier.data()+1, "edundant_and", 12) != 0)
157 break;
158 return 50; // "redundant_and"
159 case 's': // 1 string to match.
160 if (memcmp(RuleIdentifier.data()+1, "div_by_const", 12) != 0)
161 break;
162 return 92; // "sdiv_by_const"
163 case 'u': // 3 strings to match.
164 switch (RuleIdentifier[1]) {
165 default: break;
166 case 'd': // 1 string to match.
167 if (memcmp(RuleIdentifier.data()+2, "iv_by_const", 11) != 0)
168 break;
169 return 91; // "udiv_by_const"
170 case 'n': // 2 strings to match.
171 if (memcmp(RuleIdentifier.data()+2, "merge_", 6) != 0)
172 break;
173 switch (RuleIdentifier[8]) {
174 default: break;
175 case 'm': // 1 string to match.
176 if (memcmp(RuleIdentifier.data()+9, "erge", 4) != 0)
177 break;
178 return 61; // "unmerge_merge"
179 case 'u': // 1 string to match.
180 if (memcmp(RuleIdentifier.data()+9, "ndef", 4) != 0)
181 break;
182 return 21; // "unmerge_undef"
183 }
184 break;
185 }
186 break;
187 }
188 break;
189 case 14: // 7 strings to match.
190 switch (RuleIdentifier[0]) {
191 default: break;
192 case 'b': // 1 string to match.
193 if (memcmp(RuleIdentifier.data()+1, "inop_same_val", 13) != 0)
194 break;
195 return 25; // "binop_same_val"
196 case 'c': // 1 string to match.
197 if (memcmp(RuleIdentifier.data()+1, "onstant_fp_op", 13) != 0)
198 break;
199 return 68; // "constant_fp_op"
200 case 'f': // 2 strings to match.
201 switch (RuleIdentifier[1]) {
202 default: break;
203 case 'a': // 1 string to match.
204 if (memcmp(RuleIdentifier.data()+2, "bs_fneg_fold", 12) != 0)
205 break;
206 return 90; // "fabs_fneg_fold"
207 case 'n': // 1 string to match.
208 if (memcmp(RuleIdentifier.data()+2, "eg_fneg_fold", 12) != 0)
209 break;
210 return 31; // "fneg_fneg_fold"
211 }
212 break;
213 case 'm': // 1 string to match.
214 if (memcmp(RuleIdentifier.data()+1, "ul_by_neg_one", 13) != 0)
215 break;
216 return 3; // "mul_by_neg_one"
217 case 'r': // 1 string to match.
218 if (memcmp(RuleIdentifier.data()+1, "eassoc_ptradd", 13) != 0)
219 break;
220 return 41; // "reassoc_ptradd"
221 case 't': // 1 string to match.
222 if (memcmp(RuleIdentifier.data()+1, "runc_ext_fold", 13) != 0)
223 break;
224 return 66; // "trunc_ext_fold"
225 }
226 break;
227 case 15: // 6 strings to match.
228 switch (RuleIdentifier[0]) {
229 default: break;
230 case 'e': // 1 string to match.
231 if (memcmp(RuleIdentifier.data()+1, "xtending_loads", 14) != 0)
232 break;
233 return 8; // "extending_loads"
234 case 'i': // 1 string to match.
235 if (memcmp(RuleIdentifier.data()+1, "dempotent_prop", 14) != 0)
236 break;
237 return 4; // "idempotent_prop"
238 case 'l': // 1 string to match.
239 if (memcmp(RuleIdentifier.data()+1, "oad_or_combine", 14) != 0)
240 break;
241 return 80; // "load_or_combine"
242 case 'o': // 1 string to match.
243 if (memcmp(RuleIdentifier.data()+1, "verlapping_and", 14) != 0)
244 break;
245 return 70; // "overlapping_and"
246 case 's': // 1 string to match.
247 if (memcmp(RuleIdentifier.data()+1, "elect_same_val", 14) != 0)
248 break;
249 return 23; // "select_same_val"
250 case 'z': // 1 string to match.
251 if (memcmp(RuleIdentifier.data()+1, "ext_trunc_fold", 14) != 0)
252 break;
253 return 54; // "zext_trunc_fold"
254 }
255 break;
256 case 16: // 4 strings to match.
257 switch (RuleIdentifier[0]) {
258 default: break;
259 case 's': // 2 strings to match.
260 if (memcmp(RuleIdentifier.data()+1, "elect_", 6) != 0)
261 break;
262 switch (RuleIdentifier[7]) {
263 default: break;
264 case 't': // 1 string to match.
265 if (memcmp(RuleIdentifier.data()+8, "o_minmax", 8) != 0)
266 break;
267 return 106; // "select_to_minmax"
268 case 'u': // 1 string to match.
269 if (memcmp(RuleIdentifier.data()+8, "ndef_cmp", 8) != 0)
270 break;
271 return 47; // "select_undef_cmp"
272 }
273 break;
274 case 't': // 1 string to match.
275 if (memcmp(RuleIdentifier.data()+1, "runcstore_merge", 15) != 0)
276 break;
277 return 81; // "truncstore_merge"
278 case 'u': // 1 string to match.
279 if (memcmp(RuleIdentifier.data()+1, "ndef_to_fp_zero", 15) != 0)
280 break;
281 return 11; // "undef_to_fp_zero"
282 }
283 break;
284 case 17: // 9 strings to match.
285 switch (RuleIdentifier[0]) {
286 default: break;
287 case 'a': // 2 strings to match.
288 switch (RuleIdentifier[1]) {
289 default: break;
290 case 'd': // 1 string to match.
291 if (memcmp(RuleIdentifier.data()+2, "d_p2i_to_ptradd", 15) != 0)
292 break;
293 return 2; // "add_p2i_to_ptradd"
294 case 'n': // 1 string to match.
295 if (memcmp(RuleIdentifier.data()+2, "yext_trunc_fold", 15) != 0)
296 break;
297 return 30; // "anyext_trunc_fold"
298 }
299 break;
300 case 'd': // 1 string to match.
301 if (memcmp(RuleIdentifier.data()+1, "iv_rem_to_divrem", 16) != 0)
302 break;
303 return 82; // "div_rem_to_divrem"
304 case 'e': // 1 string to match.
305 if (memcmp(RuleIdentifier.data()+1, "rase_undef_store", 16) != 0)
306 break;
307 return 20; // "erase_undef_store"
308 case 'p': // 1 string to match.
309 if (memcmp(RuleIdentifier.data()+1, "tr_add_with_zero", 16) != 0)
310 break;
311 return 77; // "ptr_add_with_zero"
312 case 's': // 2 strings to match.
313 switch (RuleIdentifier[1]) {
314 default: break;
315 case 'e': // 1 string to match.
316 if (memcmp(RuleIdentifier.data()+2, "lect_to_logical", 15) != 0)
317 break;
318 return 49; // "select_to_logical"
319 case 'h': // 1 string to match.
320 if (memcmp(RuleIdentifier.data()+2, "ift_immed_chain", 15) != 0)
321 break;
322 return 78; // "shift_immed_chain"
323 }
324 break;
325 case 'u': // 2 strings to match.
326 switch (RuleIdentifier[1]) {
327 default: break;
328 case 'n': // 1 string to match.
329 if (memcmp(RuleIdentifier.data()+2, "def_to_int_zero", 15) != 0)
330 break;
331 return 12; // "undef_to_int_zero"
332 case 'r': // 1 string to match.
333 if (memcmp(RuleIdentifier.data()+2, "em_pow2_to_mask", 15) != 0)
334 break;
335 return 53; // "urem_pow2_to_mask"
336 }
337 break;
338 }
339 break;
340 case 18: // 5 strings to match.
341 switch (RuleIdentifier[0]) {
342 default: break;
343 case 'b': // 1 string to match.
344 if (memcmp(RuleIdentifier.data()+1, "inop_left_to_zero", 17) != 0)
345 break;
346 return 26; // "binop_left_to_zero"
347 case 'c': // 1 string to match.
348 if (memcmp(RuleIdentifier.data()+1, "ombine_minmax_nan", 17) != 0)
349 break;
350 return 75; // "combine_minmax_nan"
351 case 'f': // 1 string to match.
352 if (memcmp(RuleIdentifier.data()+1, "old_global_offset", 17) != 0)
353 break;
354 return 112; // "fold_global_offset"
355 case 'r': // 1 string to match.
356 if (memcmp(RuleIdentifier.data()+1, "ight_identity_one", 17) != 0)
357 break;
358 return 32; // "right_identity_one"
359 case 's': // 1 string to match.
360 if (memcmp(RuleIdentifier.data()+1, "ext_inreg_of_load", 17) != 0)
361 break;
362 return 44; // "sext_inreg_of_load"
363 }
364 break;
365 case 19: // 8 strings to match.
366 switch (RuleIdentifier[0]) {
367 default: break;
368 case 'b': // 1 string to match.
369 if (memcmp(RuleIdentifier.data()+1, "inop_right_to_zero", 18) != 0)
370 break;
371 return 27; // "binop_right_to_zero"
372 case 'c': // 1 string to match.
373 if (memcmp(RuleIdentifier.data()+1, "onst_ptradd_to_i2p", 18) != 0)
374 break;
375 return 69; // "const_ptradd_to_i2p"
376 case 'e': // 1 string to match.
377 if (memcmp(RuleIdentifier.data()+1, "xtend_through_phis", 18) != 0)
378 break;
379 return 38; // "extend_through_phis"
380 case 'p': // 1 string to match.
381 if (memcmp(RuleIdentifier.data()+1, "tr_add_immed_chain", 18) != 0)
382 break;
383 return 42; // "ptr_add_immed_chain"
384 case 'r': // 1 string to match.
385 if (memcmp(RuleIdentifier.data()+1, "ight_identity_zero", 18) != 0)
386 break;
387 return 24; // "right_identity_zero"
388 case 's': // 2 strings to match.
389 switch (RuleIdentifier[1]) {
390 default: break;
391 case 'e': // 1 string to match.
392 if (memcmp(RuleIdentifier.data()+2, "lect_constant_cmp", 17) != 0)
393 break;
394 return 48; // "select_constant_cmp"
395 case 'i': // 1 string to match.
396 if (memcmp(RuleIdentifier.data()+2, "mplify_add_to_sub", 17) != 0)
397 break;
398 return 39; // "simplify_add_to_sub"
399 }
400 break;
401 case 'u': // 1 string to match.
402 if (memcmp(RuleIdentifier.data()+1, "nary_undef_to_zero", 18) != 0)
403 break;
404 return 16; // "unary_undef_to_zero"
405 }
406 break;
407 case 20: // 6 strings to match.
408 switch (RuleIdentifier[0]) {
409 default: break;
410 case 'a': // 1 string to match.
411 if (memcmp(RuleIdentifier.data()+1, "nd_or_disjoint_mask", 19) != 0)
412 break;
413 return 95; // "and_or_disjoint_mask"
414 case 'b': // 1 string to match.
415 if (memcmp(RuleIdentifier.data()+1, "itcast_bitcast_fold", 19) != 0)
416 break;
417 return 37; // "bitcast_bitcast_fold"
418 case 'i': // 1 string to match.
419 if (memcmp(RuleIdentifier.data()+1, "cmp_redundant_trunc", 19) != 0)
420 break;
421 return 111; // "icmp_redundant_trunc"
422 case 'r': // 2 strings to match.
423 if (memcmp(RuleIdentifier.data()+1, "edu", 3) != 0)
424 break;
425 switch (RuleIdentifier[4]) {
426 default: break;
427 case 'c': // 1 string to match.
428 if (memcmp(RuleIdentifier.data()+5, "e_shl_of_extend", 15) != 0)
429 break;
430 return 45; // "reduce_shl_of_extend"
431 case 'n': // 1 string to match.
432 if (memcmp(RuleIdentifier.data()+5, "dant_sext_inreg", 15) != 0)
433 break;
434 return 51; // "redundant_sext_inreg"
435 }
436 break;
437 case 'u': // 1 string to match.
438 if (memcmp(RuleIdentifier.data()+1, "nmerge_zext_to_zext", 19) != 0)
439 break;
440 return 64; // "unmerge_zext_to_zext"
441 }
442 break;
443 case 21: // 3 strings to match.
444 switch (RuleIdentifier[0]) {
445 default: break;
446 case 'f': // 1 string to match.
447 if (memcmp(RuleIdentifier.data()+1, "constant_to_constant", 20) != 0)
448 break;
449 return 110; // "fconstant_to_constant"
450 case 'u': // 2 strings to match.
451 if (RuleIdentifier[1] != 'n')
452 break;
453 switch (RuleIdentifier[2]) {
454 default: break;
455 case 'd': // 1 string to match.
456 if (memcmp(RuleIdentifier.data()+3, "ef_to_negative_one", 18) != 0)
457 break;
458 return 13; // "undef_to_negative_one"
459 case 'm': // 1 string to match.
460 if (memcmp(RuleIdentifier.data()+3, "erge_dead_to_trunc", 18) != 0)
461 break;
462 return 63; // "unmerge_dead_to_trunc"
463 }
464 break;
465 }
466 break;
467 case 22: // 7 strings to match.
468 switch (RuleIdentifier[0]) {
469 default: break;
470 case 'f': // 2 strings to match.
471 switch (RuleIdentifier[1]) {
472 default: break;
473 case 'o': // 1 string to match.
474 if (memcmp(RuleIdentifier.data()+2, "ld_binop_into_select", 20) != 0)
475 break;
476 return 104; // "fold_binop_into_select"
477 case 'u': // 1 string to match.
478 if (memcmp(RuleIdentifier.data()+2, "nnel_shift_to_rotate", 20) != 0)
479 break;
480 return 84; // "funnel_shift_to_rotate"
481 }
482 break;
483 case 'i': // 1 string to match.
484 if (memcmp(RuleIdentifier.data()+1, "cmp_to_lhs_known_bits", 21) != 0)
485 break;
486 return 56; // "icmp_to_lhs_known_bits"
487 case 'p': // 1 string to match.
488 if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_any_op", 21) != 0)
489 break;
490 return 17; // "propagate_undef_any_op"
491 case 'r': // 1 string to match.
492 if (memcmp(RuleIdentifier.data()+1, "edundant_neg_operands", 21) != 0)
493 break;
494 return 94; // "redundant_neg_operands"
495 case 's': // 1 string to match.
496 if (memcmp(RuleIdentifier.data()+1, "hl_ashr_to_sext_inreg", 21) != 0)
497 break;
498 return 43; // "shl_ashr_to_sext_inreg"
499 case 't': // 1 string to match.
500 if (memcmp(RuleIdentifier.data()+1, "runc_buildvector_fold", 21) != 0)
501 break;
502 return 35; // "trunc_buildvector_fold"
503 }
504 break;
505 case 23: // 2 strings to match.
506 switch (RuleIdentifier[0]) {
507 default: break;
508 case 'c': // 1 string to match.
509 if (memcmp(RuleIdentifier.data()+1, "ommute_constant_to_rhs", 22) != 0)
510 break;
511 return 109; // "commute_constant_to_rhs"
512 case 'p': // 1 string to match.
513 if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_all_ops", 22) != 0)
514 break;
515 return 18; // "propagate_undef_all_ops"
516 }
517 break;
518 case 24: // 4 strings to match.
519 switch (RuleIdentifier[0]) {
520 default: break;
521 case 'b': // 1 string to match.
522 if (memcmp(RuleIdentifier.data()+1, "inop_left_undef_to_zero", 23) != 0)
523 break;
524 return 14; // "binop_left_undef_to_zero"
525 case 'n': // 1 string to match.
526 if (memcmp(RuleIdentifier.data()+1, "arrow_binop_feeding_and", 23) != 0)
527 break;
528 return 46; // "narrow_binop_feeding_and"
529 case 's': // 1 string to match.
530 if (memcmp(RuleIdentifier.data()+1, "ext_inreg_to_zext_inreg", 23) != 0)
531 break;
532 return 57; // "sext_inreg_to_zext_inreg"
533 case 'x': // 1 string to match.
534 if (memcmp(RuleIdentifier.data()+1, "or_of_and_with_same_reg", 23) != 0)
535 break;
536 return 76; // "xor_of_and_with_same_reg"
537 }
538 break;
539 case 25: // 4 strings to match.
540 switch (RuleIdentifier[0]) {
541 default: break;
542 case 'b': // 3 strings to match.
543 switch (RuleIdentifier[1]) {
544 default: break;
545 case 'i': // 2 strings to match.
546 if (memcmp(RuleIdentifier.data()+2, "tfield_extract_from_", 20) != 0)
547 break;
548 switch (RuleIdentifier[22]) {
549 default: break;
550 case 'a': // 1 string to match.
551 if (memcmp(RuleIdentifier.data()+23, "nd", 2) != 0)
552 break;
553 return 86; // "bitfield_extract_from_and"
554 case 's': // 1 string to match.
555 if (memcmp(RuleIdentifier.data()+23, "hr", 2) != 0)
556 break;
557 return 87; // "bitfield_extract_from_shr"
558 }
559 break;
560 case 'u': // 1 string to match.
561 if (memcmp(RuleIdentifier.data()+2, "ildvector_identity_fold", 23) != 0)
562 break;
563 return 34; // "buildvector_identity_fold"
564 }
565 break;
566 case 'e': // 1 string to match.
567 if (memcmp(RuleIdentifier.data()+1, "xtract_vec_elt_build_vec", 24) != 0)
568 break;
569 return 6; // "extract_vec_elt_build_vec"
570 }
571 break;
572 case 26: // 3 strings to match.
573 switch (RuleIdentifier[0]) {
574 default: break;
575 case 'b': // 1 string to match.
576 if (memcmp(RuleIdentifier.data()+1, "inop_right_undef_to_undef", 25) != 0)
577 break;
578 return 15; // "binop_right_undef_to_undef"
579 case 'c': // 1 string to match.
580 if (memcmp(RuleIdentifier.data()+1, "ombine_indexed_load_store", 25) != 0)
581 break;
582 return 10; // "combine_indexed_load_store"
583 case 'f': // 1 string to match.
584 if (memcmp(RuleIdentifier.data()+1, "unnel_shift_from_or_shift", 25) != 0)
585 break;
586 return 83; // "funnel_shift_from_or_shift"
587 }
588 break;
589 case 27: // 2 strings to match.
590 switch (RuleIdentifier[0]) {
591 default: break;
592 case 'r': // 1 string to match.
593 if (memcmp(RuleIdentifier.data()+1, "edundant_binop_in_equality", 26) != 0)
594 break;
595 return 107; // "redundant_binop_in_equality"
596 case 't': // 1 string to match.
597 if (memcmp(RuleIdentifier.data()+1, "runc_lshr_buildvector_fold", 26) != 0)
598 break;
599 return 36; // "trunc_lshr_buildvector_fold"
600 }
601 break;
602 case 28: // 3 strings to match.
603 switch (RuleIdentifier[0]) {
604 default: break;
605 case 'o': // 1 string to match.
606 if (memcmp(RuleIdentifier.data()+1, "pt_brcond_by_inverting_cond", 27) != 0)
607 break;
608 return 60; // "opt_brcond_by_inverting_cond"
609 case 'p': // 1 string to match.
610 if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_shuffle_mask", 27) != 0)
611 break;
612 return 19; // "propagate_undef_shuffle_mask"
613 case 's': // 1 string to match.
614 if (memcmp(RuleIdentifier.data()+1, "hift_of_shifted_logic_chain", 27) != 0)
615 break;
616 return 79; // "shift_of_shifted_logic_chain"
617 }
618 break;
619 case 29: // 2 strings to match.
620 switch (RuleIdentifier[0]) {
621 default: break;
622 case 'b': // 1 string to match.
623 if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_shr_and", 28) != 0)
624 break;
625 return 88; // "bitfield_extract_from_shr_and"
626 case 'i': // 1 string to match.
627 if (memcmp(RuleIdentifier.data()+1, "cmp_to_true_false_known_bits", 28) != 0)
628 break;
629 return 55; // "icmp_to_true_false_known_bits"
630 }
631 break;
632 case 32: // 3 strings to match.
633 switch (RuleIdentifier[0]) {
634 default: break;
635 case 'b': // 1 string to match.
636 if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_sext_inreg", 31) != 0)
637 break;
638 return 85; // "bitfield_extract_from_sext_inreg"
639 case 'c': // 2 strings to match.
640 if (memcmp(RuleIdentifier.data()+1, "ombine_f", 8) != 0)
641 break;
642 switch (RuleIdentifier[9]) {
643 default: break;
644 case 'a': // 1 string to match.
645 if (memcmp(RuleIdentifier.data()+10, "dd_fmul_to_fmad_or_fma", 22) != 0)
646 break;
647 return 96; // "combine_fadd_fmul_to_fmad_or_fma"
648 case 's': // 1 string to match.
649 if (memcmp(RuleIdentifier.data()+10, "ub_fmul_to_fmad_or_fma", 22) != 0)
650 break;
651 return 100; // "combine_fsub_fmul_to_fmad_or_fma"
652 }
653 break;
654 }
655 break;
656 case 34: // 1 string to match.
657 if (memcmp(RuleIdentifier.data()+0, "extract_all_elts_from_build_vector", 34) != 0)
658 break;
659 return 7; // "extract_all_elts_from_build_vector"
660 case 36: // 3 strings to match.
661 switch (RuleIdentifier[0]) {
662 default: break;
663 case 'c': // 2 strings to match.
664 if (memcmp(RuleIdentifier.data()+1, "ombine_", 7) != 0)
665 break;
666 switch (RuleIdentifier[8]) {
667 default: break;
668 case 'f': // 1 string to match.
669 if (memcmp(RuleIdentifier.data()+9, "add_fma_fmul_to_fmad_or_fma", 27) != 0)
670 break;
671 return 98; // "combine_fadd_fma_fmul_to_fmad_or_fma"
672 case 'i': // 1 string to match.
673 if (memcmp(RuleIdentifier.data()+9, "nsert_vec_elts_build_vector", 27) != 0)
674 break;
675 return 5; // "combine_insert_vec_elts_build_vector"
676 }
677 break;
678 case 'i': // 1 string to match.
679 if (memcmp(RuleIdentifier.data()+1, "nsert_extract_vec_elt_out_of_bounds", 35) != 0)
680 break;
681 return 22; // "insert_extract_vec_elt_out_of_bounds"
682 }
683 break;
684 case 37: // 2 strings to match.
685 switch (RuleIdentifier[0]) {
686 default: break;
687 case 'c': // 1 string to match.
688 if (memcmp(RuleIdentifier.data()+1, "ombine_fsub_fneg_fmul_to_fmad_or_fma", 36) != 0)
689 break;
690 return 101; // "combine_fsub_fneg_fmul_to_fmad_or_fma"
691 case 'h': // 1 string to match.
692 if (memcmp(RuleIdentifier.data()+1, "oist_logic_op_with_same_opcode_hands", 36) != 0)
693 break;
694 return 40; // "hoist_logic_op_with_same_opcode_hands"
695 }
696 break;
697 case 38: // 2 strings to match.
698 if (memcmp(RuleIdentifier.data()+0, "combine_f", 9) != 0)
699 break;
700 switch (RuleIdentifier[9]) {
701 default: break;
702 case 'a': // 1 string to match.
703 if (memcmp(RuleIdentifier.data()+10, "dd_fpext_fmul_to_fmad_or_fma", 28) != 0)
704 break;
705 return 97; // "combine_fadd_fpext_fmul_to_fmad_or_fma"
706 case 's': // 1 string to match.
707 if (memcmp(RuleIdentifier.data()+10, "ub_fpext_fmul_to_fmad_or_fma", 28) != 0)
708 break;
709 return 102; // "combine_fsub_fpext_fmul_to_fmad_or_fma"
710 }
711 break;
712 case 42: // 1 string to match.
713 if (memcmp(RuleIdentifier.data()+0, "combine_fadd_fpext_fma_fmul_to_fmad_or_fma", 42) != 0)
714 break;
715 return 99; // "combine_fadd_fpext_fma_fmul_to_fmad_or_fma"
716 case 43: // 1 string to match.
717 if (memcmp(RuleIdentifier.data()+0, "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma", 43) != 0)
718 break;
719 return 103; // "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma"
720 }
721#endif // ifndef NDEBUG
722
723 return std::nullopt;
724}
725static std::optional<std::pair<uint64_t, uint64_t>> getRuleRangeForIdentifier(StringRef RuleIdentifier) {
726 std::pair<StringRef, StringRef> RangePair = RuleIdentifier.split('-');
727 if (!RangePair.second.empty()) {
728 const auto First = getRuleIdxForIdentifier(RangePair.first);
729 const auto Last = getRuleIdxForIdentifier(RangePair.second);
730 if (!First || !Last)
731 return std::nullopt;
732 if (First >= Last)
733 report_fatal_error("Beginning of range should be before end of range");
734 return {{*First, *Last + 1}};
735 }
736 if (RangePair.first == "*") {
737 return {{0, 113}};
738 }
739 const auto I = getRuleIdxForIdentifier(RangePair.first);
740 if (!I)
741 return std::nullopt;
742 return {{*I, *I + 1}};
743}
744
745bool AArch64GenPreLegalizerCombinerHelperRuleConfig::setRuleEnabled(StringRef RuleIdentifier) {
746 auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier);
747 if (!MaybeRange)
748 return false;
749 for (auto I = MaybeRange->first; I < MaybeRange->second; ++I)
750 DisabledRules.reset(I);
751 return true;
752}
753
754bool AArch64GenPreLegalizerCombinerHelperRuleConfig::setRuleDisabled(StringRef RuleIdentifier) {
755 auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier);
756 if (!MaybeRange)
757 return false;
758 for (auto I = MaybeRange->first; I < MaybeRange->second; ++I)
759 DisabledRules.set(I);
760 return true;
761}
762
763bool AArch64GenPreLegalizerCombinerHelperRuleConfig::isRuleDisabled(unsigned RuleID) const {
764 return DisabledRules.test(RuleID);
765}
766#endif // ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H
767
768#ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP
769
770std::vector<std::string> AArch64PreLegalizerCombinerHelperOption;
771cl::list<std::string> AArch64PreLegalizerCombinerHelperDisableOption(
772 "aarch64prelegalizercombinerhelper-disable-rule",
773 cl::desc("Disable one or more combiner rules temporarily in the AArch64PreLegalizerCombinerHelper pass"),
774 cl::CommaSeparated,
775 cl::Hidden,
776 cl::cat(GICombinerOptionCategory),
777 cl::callback([](const std::string &Str) {
778 AArch64PreLegalizerCombinerHelperOption.push_back(Str);
779 }));
780cl::list<std::string> AArch64PreLegalizerCombinerHelperOnlyEnableOption(
781 "aarch64prelegalizercombinerhelper-only-enable-rule",
782 cl::desc("Disable all rules in the AArch64PreLegalizerCombinerHelper pass then re-enable the specified ones"),
783 cl::Hidden,
784 cl::cat(GICombinerOptionCategory),
785 cl::callback([](const std::string &CommaSeparatedArg) {
786 StringRef Str = CommaSeparatedArg;
787 AArch64PreLegalizerCombinerHelperOption.push_back("*");
788 do {
789 auto X = Str.split(",");
790 AArch64PreLegalizerCombinerHelperOption.push_back(("!" + X.first).str());
791 Str = X.second;
792 } while (!Str.empty());
793 }));
794
795bool AArch64GenPreLegalizerCombinerHelperRuleConfig::parseCommandLineOption() {
796 for (StringRef Identifier : AArch64PreLegalizerCombinerHelperOption) {
797 bool Enabled = Identifier.consume_front("!");
798 if (Enabled && !setRuleEnabled(Identifier))
799 return false;
800 if (!Enabled && !setRuleDisabled(Identifier))
801 return false;
802 }
803 return true;
804}
805
806bool AArch64GenPreLegalizerCombinerHelper::tryCombineAll(
807 GISelChangeObserver &Observer,
808 MachineInstr &MI,
809 MachineIRBuilder &B) const {
810 MachineBasicBlock *MBB = MI.getParent();
811 MachineFunction *MF = MBB->getParent();
812 MachineRegisterInfo &MRI = MF->getRegInfo();
813 SmallVector<MachineInstr *, 8> MIs = {&MI};
814
815 (void)MBB; (void)MF; (void)MRI; (void)RuleConfig;
816
817 // Match data
818 unsigned MatchData1;
819 std::pair<Register, bool> MatchData2;
820 SmallVector<Register, 4> MatchData5;
821 Register MatchData6;
822 SmallVector<std::pair<Register, MachineInstr*>> MatchData7;
823 PreferredTuple MatchData8;
824 std::function<void(MachineIRBuilder &)> MatchData9;
825 IndexedLoadStoreMatchInfo MatchData10;
826 std::function<void(MachineIRBuilder &)> MatchData21;
827 Register MatchData28;
828 Register MatchData29;
829 Register MatchData30;
830 Register MatchData31;
831 Register MatchData33;
832 Register MatchData34;
833 Register MatchData35;
834 Register MatchData36;
835 MachineInstr* MatchData38;
836 std::tuple<Register, Register> MatchData39;
837 InstructionStepsMatchInfo MatchData40;
838 std::function<void(MachineIRBuilder &)> MatchData41;
839 PtrAddChain MatchData42;
840 std::tuple<Register, int64_t> MatchData43;
841 std::tuple<Register, unsigned> MatchData44;
842 RegisterImmPair MatchData45;
843 std::function<void(MachineIRBuilder &)> MatchData46;
844 unsigned MatchData48;
845 std::function<void(MachineIRBuilder &)> MatchData49;
846 Register MatchData50;
847 Register MatchData52;
848 Register MatchData54;
849 int64_t MatchData55;
850 std::function<void(MachineIRBuilder &)> MatchData56;
851 std::tuple<Register, unsigned> MatchData58;
852 SmallVector<Register, 4> MatchData59;
853 MachineInstr * MatchData60;
854 SmallVector<Register, 8> MatchData61;
855 SmallVector<APInt, 8> MatchData62;
856 Register MatchData65;
857 std::pair<Register, unsigned> MatchData66;
858 std::pair<MachineInstr*, LLT> MatchData67;
859 std::optional<APFloat> MatchData68;
860 APInt MatchData69;
861 std::function<void(MachineIRBuilder &)> MatchData70;
862 std::function<void(MachineIRBuilder &)> MatchData71;
863 std::function<void(MachineIRBuilder &)> MatchData72;
864 std::function<void(MachineIRBuilder &)> MatchData73;
865 std::function<void(MachineIRBuilder &)> MatchData74;
866 unsigned MatchData75;
867 std::pair<Register, Register> MatchData76;
868 RegisterImmPair MatchData78;
869 ShiftOfShiftedLogic MatchData79;
870 std::function<void(MachineIRBuilder &)> MatchData80;
871 MergeTruncStoresInfo MatchData81;
872 MachineInstr * MatchData82;
873 std::function<void(MachineIRBuilder &)> MatchData83;
874 std::function<void(MachineIRBuilder &)> MatchData85;
875 std::function<void(MachineIRBuilder &)> MatchData86;
876 std::function<void(MachineIRBuilder &)> MatchData87;
877 std::function<void(MachineIRBuilder &)> MatchData88;
878 APInt MatchData89;
879 std::function<void(MachineIRBuilder &)> MatchData90;
880 std::function<void(MachineIRBuilder &)> MatchData94;
881 std::function<void(MachineIRBuilder &)> MatchData95;
882 std::function<void(MachineIRBuilder &)> MatchData96;
883 std::function<void(MachineIRBuilder &)> MatchData97;
884 std::function<void(MachineIRBuilder &)> MatchData98;
885 std::function<void(MachineIRBuilder &)> MatchData99;
886 std::function<void(MachineIRBuilder &)> MatchData100;
887 std::function<void(MachineIRBuilder &)> MatchData101;
888 std::function<void(MachineIRBuilder &)> MatchData102;
889 std::function<void(MachineIRBuilder &)> MatchData103;
890 unsigned MatchData104;
891 std::function<void(MachineIRBuilder &)> MatchData105;
892 std::function<void(MachineIRBuilder &)> MatchData106;
893 std::function<void(MachineIRBuilder &)> MatchData107;
894 Register MatchData108;
895 Register MatchData111;
896 std::pair<uint64_t, uint64_t> MatchData112;
897
898 int Partition = -1;
899 Partition = -1;
900 switch (MIs[0]->getOpcode()) {
901 case TargetOpcode::COPY: Partition = 0; break;
902 case TargetOpcode::G_MUL: Partition = 1; break;
903 case TargetOpcode::G_ADD: Partition = 2; break;
904 case TargetOpcode::G_FREEZE: Partition = 3; break;
905 case TargetOpcode::G_FABS: Partition = 4; break;
906 case TargetOpcode::G_FCANONICALIZE: Partition = 5; break;
907 case TargetOpcode::G_INSERT_VECTOR_ELT: Partition = 6; break;
908 case TargetOpcode::G_EXTRACT_VECTOR_ELT: Partition = 7; break;
909 case TargetOpcode::G_BUILD_VECTOR: Partition = 8; break;
910 case TargetOpcode::G_LOAD: Partition = 9; break;
911 case TargetOpcode::G_SEXTLOAD: Partition = 10; break;
912 case TargetOpcode::G_ZEXTLOAD: Partition = 11; break;
913 case TargetOpcode::G_AND: Partition = 12; break;
914 case TargetOpcode::G_STORE: Partition = 13; break;
915 case TargetOpcode::G_UITOFP: Partition = 14; break;
916 case TargetOpcode::G_SITOFP: Partition = 15; break;
917 case TargetOpcode::G_OR: Partition = 16; break;
918 case TargetOpcode::G_SHL: Partition = 17; break;
919 case TargetOpcode::G_UDIV: Partition = 18; break;
920 case TargetOpcode::G_UREM: Partition = 19; break;
921 case TargetOpcode::G_ASHR: Partition = 20; break;
922 case TargetOpcode::G_LSHR: Partition = 21; break;
923 case TargetOpcode::G_ABS: Partition = 22; break;
924 case TargetOpcode::G_FPTOSI: Partition = 23; break;
925 case TargetOpcode::G_FPTOUI: Partition = 24; break;
926 case TargetOpcode::G_SUB: Partition = 25; break;
927 case TargetOpcode::G_XOR: Partition = 26; break;
928 case TargetOpcode::G_TRUNC: Partition = 27; break;
929 case TargetOpcode::G_SHUFFLE_VECTOR: Partition = 28; break;
930 case TargetOpcode::G_UNMERGE_VALUES: Partition = 29; break;
931 case TargetOpcode::G_SELECT: Partition = 30; break;
932 case TargetOpcode::G_PTR_ADD: Partition = 31; break;
933 case TargetOpcode::G_ROTL: Partition = 32; break;
934 case TargetOpcode::G_ROTR: Partition = 33; break;
935 case TargetOpcode::G_SDIV: Partition = 34; break;
936 case TargetOpcode::G_SREM: Partition = 35; break;
937 case TargetOpcode::G_INTTOPTR: Partition = 36; break;
938 case TargetOpcode::G_PTRTOINT: Partition = 37; break;
939 case TargetOpcode::G_ANYEXT: Partition = 38; break;
940 case TargetOpcode::G_FNEG: Partition = 39; break;
941 case TargetOpcode::G_BUILD_VECTOR_TRUNC: Partition = 40; break;
942 case TargetOpcode::G_BITCAST: Partition = 41; break;
943 case TargetOpcode::G_PHI: Partition = 42; break;
944 case TargetOpcode::G_SEXT_INREG: Partition = 43; break;
945 case TargetOpcode::G_ZEXT: Partition = 44; break;
946 case TargetOpcode::G_ICMP: Partition = 45; break;
947 case TargetOpcode::G_SEXT: Partition = 46; break;
948 case TargetOpcode::G_BR: Partition = 47; break;
949 case TargetOpcode::G_MERGE_VALUES: Partition = 48; break;
950 case TargetOpcode::G_FPTRUNC: Partition = 49; break;
951 case TargetOpcode::G_FSQRT: Partition = 50; break;
952 case TargetOpcode::G_FLOG2: Partition = 51; break;
953 case TargetOpcode::G_UMULO: Partition = 52; break;
954 case TargetOpcode::G_SMULO: Partition = 53; break;
955 case TargetOpcode::G_UADDO: Partition = 54; break;
956 case TargetOpcode::G_SADDO: Partition = 55; break;
957 case TargetOpcode::G_UADDE: Partition = 56; break;
958 case TargetOpcode::G_SADDE: Partition = 57; break;
959 case TargetOpcode::G_USUBE: Partition = 58; break;
960 case TargetOpcode::G_SSUBE: Partition = 59; break;
961 case TargetOpcode::G_FMINNUM: Partition = 60; break;
962 case TargetOpcode::G_FMAXNUM: Partition = 61; break;
963 case TargetOpcode::G_FMINIMUM: Partition = 62; break;
964 case TargetOpcode::G_FMAXIMUM: Partition = 63; break;
965 case TargetOpcode::G_SSHLSAT: Partition = 64; break;
966 case TargetOpcode::G_USHLSAT: Partition = 65; break;
967 case TargetOpcode::G_FSHL: Partition = 66; break;
968 case TargetOpcode::G_FSHR: Partition = 67; break;
969 case TargetOpcode::G_UMULH: Partition = 68; break;
970 case TargetOpcode::G_FADD: Partition = 69; break;
971 case TargetOpcode::G_FSUB: Partition = 70; break;
972 case TargetOpcode::G_FMUL: Partition = 71; break;
973 case TargetOpcode::G_FDIV: Partition = 72; break;
974 case TargetOpcode::G_FMAD: Partition = 73; break;
975 case TargetOpcode::G_FMA: Partition = 74; break;
976 case TargetOpcode::G_SMIN: Partition = 75; break;
977 case TargetOpcode::G_SMAX: Partition = 76; break;
978 case TargetOpcode::G_UMIN: Partition = 77; break;
979 case TargetOpcode::G_UMAX: Partition = 78; break;
980 case TargetOpcode::G_FREM: Partition = 79; break;
981 case TargetOpcode::G_FCONSTANT: Partition = 80; break;
982 case TargetOpcode::G_GLOBAL_VALUE: Partition = 81; break;
983 }
984 // Default case but without conflicting with potential default case in selection.
985 if (Partition == -1) return false;
986 if (Partition == 0 /* TargetOpcode::COPY */) {
987 // Leaf name: copy_prop
988 // Rule: copy_prop
989 if (!RuleConfig->isRuleDisabled(0)) {
990 if (1
991 && [&]() {
992 return Helper.matchCombineCopy(*MIs[0]);
993 return true;
994 }() ) {
995 LLVM_DEBUG(dbgs() << "Applying rule 'copy_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'copy_prop'\n"
; } } while (false)
;
996 Helper.applyCombineCopy(*MIs[0]);
997 return true;
998 }
999 }
1000 return false;
1001 }
1002 if (Partition == 1 /* TargetOpcode::G_MUL */) {
1003 // Leaf name: mul_to_shl
1004 // Rule: mul_to_shl
1005 if (!RuleConfig->isRuleDisabled(1)) {
1006 if (1
1007 && [&]() {
1008 return Helper.matchCombineMulToShl(*MIs[0], MatchData1);
1009 return true;
1010 }() ) {
1011 LLVM_DEBUG(dbgs() << "Applying rule 'mul_to_shl'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mul_to_shl'\n"
; } } while (false)
;
1012 Helper.applyCombineMulToShl(*MIs[0], MatchData1);
1013 return true;
1014 }
1015 }
1016 // Leaf name: mul_by_neg_one
1017 // Rule: mul_by_neg_one
1018 if (!RuleConfig->isRuleDisabled(3)) {
1019 if (1
1020 && [&]() {
1021 return Helper.matchConstantOp(MIs[0]->getOperand(2), -1);
1022 return true;
1023 }() ) {
1024 LLVM_DEBUG(dbgs() << "Applying rule 'mul_by_neg_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mul_by_neg_one'\n"
; } } while (false)
;
1025 Helper.applyCombineMulByNegativeOne(*MIs[0]);
1026 return true;
1027 }
1028 }
1029 // Leaf name: undef_to_int_zero
1030 // Rule: undef_to_int_zero
1031 if (!RuleConfig->isRuleDisabled(12)) {
1032 if (1
1033 && [&]() {
1034 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1035 return true;
1036 }() ) {
1037 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n"
; } } while (false)
;
1038 Helper.replaceInstWithConstant(*MIs[0], 0);
1039 return true;
1040 }
1041 }
1042 // Leaf name: binop_right_to_zero
1043 // Rule: binop_right_to_zero
1044 if (!RuleConfig->isRuleDisabled(27)) {
1045 if (1
1046 && [&]() {
1047 return Helper.matchOperandIsZero(*MIs[0], 2);
1048 return true;
1049 }() ) {
1050 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_to_zero'\n"
; } } while (false)
;
1051 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2);
1052 return true;
1053 }
1054 }
1055 // Leaf name: right_identity_one
1056 // Rule: right_identity_one
1057 if (!RuleConfig->isRuleDisabled(32)) {
1058 if (1
1059 && [&]() {
1060 return Helper.matchConstantOp(MIs[0]->getOperand(2), 1);
1061 return true;
1062 }() ) {
1063 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_one'\n"
; } } while (false)
;
1064 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1065 return true;
1066 }
1067 }
1068 // Leaf name: constant_fold
1069 // Rule: constant_fold
1070 if (!RuleConfig->isRuleDisabled(89)) {
1071 if (1
1072 && [&]() {
1073 return Helper.matchConstantFold(*MIs[0], MatchData89);
1074 return true;
1075 }() ) {
1076 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
1077 Helper.replaceInstWithConstant(*MIs[0], MatchData89);
1078 return true;
1079 }
1080 }
1081 // Leaf name: commute_constant_to_rhs
1082 // Rule: commute_constant_to_rhs
1083 if (!RuleConfig->isRuleDisabled(109)) {
1084 if (1
1085 && [&]() {
1086
1087 return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value();
1088
1089 return true;
1090 }() ) {
1091 LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n"
; } } while (false)
;
1092
1093 Observer.changingInstr(*MIs[0]);
1094 Register LHSReg = MIs[0]->getOperand(1).getReg();
1095 Register RHSReg = MIs[0]->getOperand(2).getReg();
1096 MIs[0]->getOperand(1).setReg(RHSReg);
1097 MIs[0]->getOperand(2).setReg(LHSReg);
1098 Observer.changedInstr(*MIs[0]);
1099
1100 return true;
1101 }
1102 }
1103 return false;
1104 }
1105 if (Partition == 2 /* TargetOpcode::G_ADD */) {
1106 // Leaf name: add_p2i_to_ptradd
1107 // Rule: add_p2i_to_ptradd
1108 if (!RuleConfig->isRuleDisabled(2)) {
1109 if (1
1110 && [&]() {
1111 return Helper.matchCombineAddP2IToPtrAdd(*MIs[0], MatchData2);
1112 return true;
1113 }() ) {
1114 LLVM_DEBUG(dbgs() << "Applying rule 'add_p2i_to_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'add_p2i_to_ptradd'\n"
; } } while (false)
;
1115 Helper.applyCombineAddP2IToPtrAdd(*MIs[0], MatchData2);
1116 return true;
1117 }
1118 }
1119 // Leaf name: propagate_undef_any_op
1120 // Rule: propagate_undef_any_op
1121 if (!RuleConfig->isRuleDisabled(17)) {
1122 if (1
1123 && [&]() {
1124 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1125 return true;
1126 }() ) {
1127 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
1128 Helper.replaceInstWithUndef(*MIs[0]);
1129 return true;
1130 }
1131 }
1132 // Leaf name: right_identity_zero
1133 // Rule: right_identity_zero
1134 if (!RuleConfig->isRuleDisabled(24)) {
1135 if (1
1136 && [&]() {
1137 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
1138 return true;
1139 }() ) {
1140 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
1141 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1142 return true;
1143 }
1144 }
1145 // Leaf name: add_sub_reg
1146 // Rule: add_sub_reg
1147 if (!RuleConfig->isRuleDisabled(33)) {
1148 if (1
1149 && [&]() {
1150 return Helper.matchAddSubSameReg(*MIs[0], MatchData33);
1151 return true;
1152 }() ) {
1153 LLVM_DEBUG(dbgs() << "Applying rule 'add_sub_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'add_sub_reg'\n"
; } } while (false)
;
1154 return Helper.replaceSingleDefInstWithReg(*MIs[0],
1155 MatchData33);
1156 return true;
1157 }
1158 }
1159 // Leaf name: simplify_add_to_sub
1160 // Rule: simplify_add_to_sub
1161 if (!RuleConfig->isRuleDisabled(39)) {
1162 if (1
1163 && [&]() {
1164 return Helper.matchSimplifyAddToSub(*MIs[0], MatchData39);
1165 return true;
1166 }() ) {
1167 LLVM_DEBUG(dbgs() << "Applying rule 'simplify_add_to_sub'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'simplify_add_to_sub'\n"
; } } while (false)
;
1168 Helper.applySimplifyAddToSub(*MIs[0], MatchData39);
1169 return true;
1170 }
1171 }
1172 // Leaf name: constant_fold
1173 // Rule: constant_fold
1174 if (!RuleConfig->isRuleDisabled(89)) {
1175 if (1
1176 && [&]() {
1177 return Helper.matchConstantFold(*MIs[0], MatchData89);
1178 return true;
1179 }() ) {
1180 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
1181 Helper.replaceInstWithConstant(*MIs[0], MatchData89);
1182 return true;
1183 }
1184 }
1185 // Leaf name: fold_binop_into_select
1186 // Rule: fold_binop_into_select
1187 if (!RuleConfig->isRuleDisabled(104)) {
1188 if (1
1189 && [&]() {
1190 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
1191 return true;
1192 }() ) {
1193 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
1194 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
1195 return true;
1196 }
1197 }
1198 // Leaf name: commute_constant_to_rhs
1199 // Rule: commute_constant_to_rhs
1200 if (!RuleConfig->isRuleDisabled(109)) {
1201 if (1
1202 && [&]() {
1203
1204 return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value();
1205
1206 return true;
1207 }() ) {
1208 LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n"
; } } while (false)
;
1209
1210 Observer.changingInstr(*MIs[0]);
1211 Register LHSReg = MIs[0]->getOperand(1).getReg();
1212 Register RHSReg = MIs[0]->getOperand(2).getReg();
1213 MIs[0]->getOperand(1).setReg(RHSReg);
1214 MIs[0]->getOperand(2).setReg(LHSReg);
1215 Observer.changedInstr(*MIs[0]);
1216
1217 return true;
1218 }
1219 }
1220 return false;
1221 }
1222 if (Partition == 3 /* TargetOpcode::G_FREEZE */) {
1223 // Leaf name: idempotent_prop
1224 // Rule: idempotent_prop
1225 if (!RuleConfig->isRuleDisabled(4)) {
1226 if (1
1227 && [&]() {
1228 return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() ==
1229 MIs[0]->getOpcode();
1230 return true;
1231 }() ) {
1232 LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n"
; } } while (false)
;
1233 Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1234 return true;
1235 }
1236 }
1237 return false;
1238 }
1239 if (Partition == 4 /* TargetOpcode::G_FABS */) {
1240 // Leaf name: idempotent_prop
1241 // Rule: idempotent_prop
1242 if (!RuleConfig->isRuleDisabled(4)) {
1243 if (1
1244 && [&]() {
1245 return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() ==
1246 MIs[0]->getOpcode();
1247 return true;
1248 }() ) {
1249 LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n"
; } } while (false)
;
1250 Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1251 return true;
1252 }
1253 }
1254 // Leaf name: constant_fp_op
1255 // Rule: constant_fp_op
1256 if (!RuleConfig->isRuleDisabled(68)) {
1257 if (1
1258 && [&]() {
1259 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68);
1260 return true;
1261 }() ) {
1262 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
1263 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68);
1264 return true;
1265 }
1266 }
1267 // Leaf name: fabs_fneg_fold
1268 // Rule: fabs_fneg_fold
1269 if (!RuleConfig->isRuleDisabled(90)) {
1270 if (1
1271 && [&]() {
1272 return Helper.matchCombineFAbsOfFNeg(*MIs[0], MatchData90);
1273 return true;
1274 }() ) {
1275 LLVM_DEBUG(dbgs() << "Applying rule 'fabs_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fabs_fneg_fold'\n"
; } } while (false)
;
1276 Helper.applyBuildFnNoErase(*MIs[0], MatchData90);
1277 return true;
1278 }
1279 }
1280 return false;
1281 }
1282 if (Partition == 5 /* TargetOpcode::G_FCANONICALIZE */) {
1283 // Leaf name: idempotent_prop
1284 // Rule: idempotent_prop
1285 if (!RuleConfig->isRuleDisabled(4)) {
1286 if (1
1287 && [&]() {
1288 return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() ==
1289 MIs[0]->getOpcode();
1290 return true;
1291 }() ) {
1292 LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n"
; } } while (false)
;
1293 Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1294 return true;
1295 }
1296 }
1297 return false;
1298 }
1299 if (Partition == 6 /* TargetOpcode::G_INSERT_VECTOR_ELT */) {
1300 // Leaf name: combine_insert_vec_elts_build_vector
1301 // Rule: combine_insert_vec_elts_build_vector
1302 if (!RuleConfig->isRuleDisabled(5)) {
1303 if (1
1304 && [&]() {
1305 return Helper.matchCombineInsertVecElts(*MIs[0], MatchData5);
1306 return true;
1307 }() ) {
1308 LLVM_DEBUG(dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n"
; } } while (false)
;
1309 Helper.applyCombineInsertVecElts(*MIs[0], MatchData5);
1310 return true;
1311 }
1312 }
1313 // Leaf name: insert_extract_vec_elt_out_of_bounds
1314 // Rule: insert_extract_vec_elt_out_of_bounds
1315 if (!RuleConfig->isRuleDisabled(22)) {
1316 if (1
1317 && [&]() {
1318 return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]);
1319 return true;
1320 }() ) {
1321 LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n"
; } } while (false)
;
1322 Helper.replaceInstWithUndef(*MIs[0]);
1323 return true;
1324 }
1325 }
1326 return false;
1327 }
1328 if (Partition == 7 /* TargetOpcode::G_EXTRACT_VECTOR_ELT */) {
1329 // Leaf name: extract_vec_elt_build_vec
1330 // Rule: extract_vec_elt_build_vec
1331 if (!RuleConfig->isRuleDisabled(6)) {
1332 if (1
1333 && [&]() {
1334 return Helper.matchExtractVecEltBuildVec(*MIs[0], MatchData6);
1335 return true;
1336 }() ) {
1337 LLVM_DEBUG(dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n"
; } } while (false)
;
1338 Helper.applyExtractVecEltBuildVec(*MIs[0], MatchData6);
1339 return true;
1340 }
1341 }
1342 // Leaf name: insert_extract_vec_elt_out_of_bounds
1343 // Rule: insert_extract_vec_elt_out_of_bounds
1344 if (!RuleConfig->isRuleDisabled(22)) {
1345 if (1
1346 && [&]() {
1347 return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]);
1348 return true;
1349 }() ) {
1350 LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n"
; } } while (false)
;
1351 Helper.replaceInstWithUndef(*MIs[0]);
1352 return true;
1353 }
1354 }
1355 return false;
1356 }
1357 if (Partition == 8 /* TargetOpcode::G_BUILD_VECTOR */) {
1358 // Leaf name: extract_all_elts_from_build_vector
1359 // Rule: extract_all_elts_from_build_vector
1360 if (!RuleConfig->isRuleDisabled(7)) {
1361 if (1
1362 && [&]() {
1363 return Helper.matchExtractAllEltsFromBuildVector(*MIs[0], MatchData7);
1364 return true;
1365 }() ) {
1366 LLVM_DEBUG(dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n"
; } } while (false)
;
1367 Helper.applyExtractAllEltsFromBuildVector(*MIs[0], MatchData7);
1368 return true;
1369 }
1370 }
1371 // Leaf name: buildvector_identity_fold
1372 // Rule: buildvector_identity_fold
1373 if (!RuleConfig->isRuleDisabled(34)) {
1374 if (1
1375 && [&]() {
1376 return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34);
1377 return true;
1378 }() ) {
1379 LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n"
; } } while (false)
;
1380 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34);
1381 return true;
1382 }
1383 }
1384 return false;
1385 }
1386 if (Partition == 9 /* TargetOpcode::G_LOAD */) {
1387 // Leaf name: extending_loads
1388 // Rule: extending_loads
1389 if (!RuleConfig->isRuleDisabled(8)) {
1390 if (1
1391 && [&]() {
1392 return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8);
1393 return true;
1394 }() ) {
1395 LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n"
; } } while (false)
;
1396 Helper.applyCombineExtendingLoads(*MIs[0], MatchData8);
1397 return true;
1398 }
1399 }
1400 // Leaf name: combine_indexed_load_store
1401 // Rule: combine_indexed_load_store
1402 if (!RuleConfig->isRuleDisabled(10)) {
1403 if (1
1404 && [&]() {
1405 return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10);
1406 return true;
1407 }() ) {
1408 LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n"
; } } while (false)
;
1409 Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10);
1410 return true;
1411 }
1412 }
1413 return false;
1414 }
1415 if (Partition == 10 /* TargetOpcode::G_SEXTLOAD */) {
1416 // Leaf name: extending_loads
1417 // Rule: extending_loads
1418 if (!RuleConfig->isRuleDisabled(8)) {
1419 if (1
1420 && [&]() {
1421 return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8);
1422 return true;
1423 }() ) {
1424 LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n"
; } } while (false)
;
1425 Helper.applyCombineExtendingLoads(*MIs[0], MatchData8);
1426 return true;
1427 }
1428 }
1429 // Leaf name: combine_indexed_load_store
1430 // Rule: combine_indexed_load_store
1431 if (!RuleConfig->isRuleDisabled(10)) {
1432 if (1
1433 && [&]() {
1434 return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10);
1435 return true;
1436 }() ) {
1437 LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n"
; } } while (false)
;
1438 Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10);
1439 return true;
1440 }
1441 }
1442 return false;
1443 }
1444 if (Partition == 11 /* TargetOpcode::G_ZEXTLOAD */) {
1445 // Leaf name: extending_loads
1446 // Rule: extending_loads
1447 if (!RuleConfig->isRuleDisabled(8)) {
1448 if (1
1449 && [&]() {
1450 return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8);
1451 return true;
1452 }() ) {
1453 LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n"
; } } while (false)
;
1454 Helper.applyCombineExtendingLoads(*MIs[0], MatchData8);
1455 return true;
1456 }
1457 }
1458 // Leaf name: combine_indexed_load_store
1459 // Rule: combine_indexed_load_store
1460 if (!RuleConfig->isRuleDisabled(10)) {
1461 if (1
1462 && [&]() {
1463 return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10);
1464 return true;
1465 }() ) {
1466 LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n"
; } } while (false)
;
1467 Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10);
1468 return true;
1469 }
1470 }
1471 return false;
1472 }
1473 if (Partition == 12 /* TargetOpcode::G_AND */) {
1474 // Leaf name: load_and_mask
1475 // Rule: load_and_mask
1476 if (!RuleConfig->isRuleDisabled(9)) {
1477 if (1
1478 && [&]() {
1479 return Helper.matchCombineLoadWithAndMask(*MIs[0], MatchData9);
1480 return true;
1481 }() ) {
1482 LLVM_DEBUG(dbgs() << "Applying rule 'load_and_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'load_and_mask'\n"
; } } while (false)
;
1483 Helper.applyBuildFn(*MIs[0], MatchData9);
1484 return true;
1485 }
1486 }
1487 // Leaf name: undef_to_int_zero
1488 // Rule: undef_to_int_zero
1489 if (!RuleConfig->isRuleDisabled(12)) {
1490 if (1
1491 && [&]() {
1492 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1493 return true;
1494 }() ) {
1495 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n"
; } } while (false)
;
1496 Helper.replaceInstWithConstant(*MIs[0], 0);
1497 return true;
1498 }
1499 }
1500 // Leaf name: binop_same_val
1501 // Rule: binop_same_val
1502 if (!RuleConfig->isRuleDisabled(25)) {
1503 if (1
1504 && [&]() {
1505 return Helper.matchBinOpSameVal(*MIs[0]);
1506 return true;
1507 }() ) {
1508 LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n"
; } } while (false)
;
1509 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1510 return true;
1511 }
1512 }
1513 // Leaf name: hoist_logic_op_with_same_opcode_hands
1514 // Rule: hoist_logic_op_with_same_opcode_hands
1515 if (!RuleConfig->isRuleDisabled(40)) {
1516 if (1
1517 && [&]() {
1518 return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData40);
1519 return true;
1520 }() ) {
1521 LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n"
; } } while (false)
;
1522 Helper.applyBuildInstructionSteps(*MIs[0], MatchData40);
1523 return true;
1524 }
1525 }
1526 // Leaf name: narrow_binop_feeding_and
1527 // Rule: narrow_binop_feeding_and
1528 if (!RuleConfig->isRuleDisabled(46)) {
1529 if (1
1530 && [&]() {
1531 return Helper.matchNarrowBinopFeedingAnd(*MIs[0], MatchData46);
1532 return true;
1533 }() ) {
1534 LLVM_DEBUG(dbgs() << "Applying rule 'narrow_binop_feeding_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'narrow_binop_feeding_and'\n"
; } } while (false)
;
1535 Helper.applyBuildFnNoErase(*MIs[0], MatchData46);
1536 return true;
1537 }
1538 }
1539 // Leaf name: redundant_and
1540 // Rule: redundant_and
1541 if (!RuleConfig->isRuleDisabled(50)) {
1542 if (1
1543 && [&]() {
1544 return Helper.matchRedundantAnd(*MIs[0], MatchData50);
1545 return true;
1546 }() ) {
1547 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_and'\n"
; } } while (false)
;
1548 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData50);
1549 return true;
1550 }
1551 }
1552 // Leaf name: overlapping_and
1553 // Rule: overlapping_and
1554 if (!RuleConfig->isRuleDisabled(70)) {
1555 if (1
1556 && [&]() {
1557 return Helper.matchOverlappingAnd(*MIs[0], MatchData70);
1558 return true;
1559 }() ) {
1560 LLVM_DEBUG(dbgs() << "Applying rule 'overlapping_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'overlapping_and'\n"
; } } while (false)
;
1561 Helper.applyBuildFn(*MIs[0], MatchData70);
1562 return true;
1563 }
1564 }
1565 // Leaf name: bitfield_extract_from_and
1566 // Rule: bitfield_extract_from_and
1567 if (!RuleConfig->isRuleDisabled(86)) {
1568 if (1
1569 && [&]() {
1570 return Helper.matchBitfieldExtractFromAnd(*MIs[0], MatchData86);
1571 return true;
1572 }() ) {
1573 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_and'\n"
; } } while (false)
;
1574 Helper.applyBuildFn(*MIs[0], MatchData86);
1575 return true;
1576 }
1577 }
1578 // Leaf name: constant_fold
1579 // Rule: constant_fold
1580 if (!RuleConfig->isRuleDisabled(89)) {
1581 if (1
1582 && [&]() {
1583 return Helper.matchConstantFold(*MIs[0], MatchData89);
1584 return true;
1585 }() ) {
1586 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
1587 Helper.replaceInstWithConstant(*MIs[0], MatchData89);
1588 return true;
1589 }
1590 }
1591 // Leaf name: and_or_disjoint_mask
1592 // Rule: and_or_disjoint_mask
1593 if (!RuleConfig->isRuleDisabled(95)) {
1594 if (1
1595 && [&]() {
1596 return Helper.matchAndOrDisjointMask(*MIs[0], MatchData95);
1597 return true;
1598 }() ) {
1599 LLVM_DEBUG(dbgs() << "Applying rule 'and_or_disjoint_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'and_or_disjoint_mask'\n"
; } } while (false)
;
1600 Helper.applyBuildFnNoErase(*MIs[0], MatchData95);
1601 return true;
1602 }
1603 }
1604 // Leaf name: fold_binop_into_select
1605 // Rule: fold_binop_into_select
1606 if (!RuleConfig->isRuleDisabled(104)) {
1607 if (1
1608 && [&]() {
1609 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
1610 return true;
1611 }() ) {
1612 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
1613 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
1614 return true;
1615 }
1616 }
1617 // Leaf name: commute_constant_to_rhs
1618 // Rule: commute_constant_to_rhs
1619 if (!RuleConfig->isRuleDisabled(109)) {
1620 if (1
1621 && [&]() {
1622
1623 return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value();
1624
1625 return true;
1626 }() ) {
1627 LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n"
; } } while (false)
;
1628
1629 Observer.changingInstr(*MIs[0]);
1630 Register LHSReg = MIs[0]->getOperand(1).getReg();
1631 Register RHSReg = MIs[0]->getOperand(2).getReg();
1632 MIs[0]->getOperand(1).setReg(RHSReg);
1633 MIs[0]->getOperand(2).setReg(LHSReg);
1634 Observer.changedInstr(*MIs[0]);
1635
1636 return true;
1637 }
1638 }
1639 return false;
1640 }
1641 if (Partition == 13 /* TargetOpcode::G_STORE */) {
1642 // Leaf name: combine_indexed_load_store
1643 // Rule: combine_indexed_load_store
1644 if (!RuleConfig->isRuleDisabled(10)) {
1645 if (1
1646 && [&]() {
1647 return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10);
1648 return true;
1649 }() ) {
1650 LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n"
; } } while (false)
;
1651 Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10);
1652 return true;
1653 }
1654 }
1655 // Leaf name: erase_undef_store
1656 // Rule: erase_undef_store
1657 if (!RuleConfig->isRuleDisabled(20)) {
1658 if (1
1659 && [&]() {
1660 return Helper.matchUndefStore(*MIs[0]);
1661 return true;
1662 }() ) {
1663 LLVM_DEBUG(dbgs() << "Applying rule 'erase_undef_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'erase_undef_store'\n"
; } } while (false)
;
1664 return Helper.eraseInst(*MIs[0]);
1665 return true;
1666 }
1667 }
1668 // Leaf name: truncstore_merge
1669 // Rule: truncstore_merge
1670 if (!RuleConfig->isRuleDisabled(81)) {
1671 if (1
1672 && [&]() {
1673 return Helper.matchTruncStoreMerge(*MIs[0], MatchData81);
1674 return true;
1675 }() ) {
1676 LLVM_DEBUG(dbgs() << "Applying rule 'truncstore_merge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'truncstore_merge'\n"
; } } while (false)
;
1677 Helper.applyTruncStoreMerge(*MIs[0], MatchData81);
1678 return true;
1679 }
1680 }
1681 return false;
1682 }
1683 if (Partition == 14 /* TargetOpcode::G_UITOFP */) {
1684 // Leaf name: undef_to_fp_zero
1685 // Rule: undef_to_fp_zero
1686 if (!RuleConfig->isRuleDisabled(11)) {
1687 if (1
1688 && [&]() {
1689 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1690 return true;
1691 }() ) {
1692 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n"
; } } while (false)
;
1693 Helper.replaceInstWithFConstant(*MIs[0], 0.0);
1694 return true;
1695 }
1696 }
1697 return false;
1698 }
1699 if (Partition == 15 /* TargetOpcode::G_SITOFP */) {
1700 // Leaf name: undef_to_fp_zero
1701 // Rule: undef_to_fp_zero
1702 if (!RuleConfig->isRuleDisabled(11)) {
1703 if (1
1704 && [&]() {
1705 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1706 return true;
1707 }() ) {
1708 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n"
; } } while (false)
;
1709 Helper.replaceInstWithFConstant(*MIs[0], 0.0);
1710 return true;
1711 }
1712 }
1713 return false;
1714 }
1715 if (Partition == 16 /* TargetOpcode::G_OR */) {
1716 // Leaf name: undef_to_negative_one
1717 // Rule: undef_to_negative_one
1718 if (!RuleConfig->isRuleDisabled(13)) {
1719 if (1
1720 && [&]() {
1721 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1722 return true;
1723 }() ) {
1724 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_negative_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_negative_one'\n"
; } } while (false)
;
1725 Helper.replaceInstWithConstant(*MIs[0], -1);
1726 return true;
1727 }
1728 }
1729 // Leaf name: right_identity_zero
1730 // Rule: right_identity_zero
1731 if (!RuleConfig->isRuleDisabled(24)) {
1732 if (1
1733 && [&]() {
1734 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
1735 return true;
1736 }() ) {
1737 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
1738 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1739 return true;
1740 }
1741 }
1742 // Leaf name: binop_same_val
1743 // Rule: binop_same_val
1744 if (!RuleConfig->isRuleDisabled(25)) {
1745 if (1
1746 && [&]() {
1747 return Helper.matchBinOpSameVal(*MIs[0]);
1748 return true;
1749 }() ) {
1750 LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n"
; } } while (false)
;
1751 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1752 return true;
1753 }
1754 }
1755 // Leaf name: hoist_logic_op_with_same_opcode_hands
1756 // Rule: hoist_logic_op_with_same_opcode_hands
1757 if (!RuleConfig->isRuleDisabled(40)) {
1758 if (1
1759 && [&]() {
1760 return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData40);
1761 return true;
1762 }() ) {
1763 LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n"
; } } while (false)
;
1764 Helper.applyBuildInstructionSteps(*MIs[0], MatchData40);
1765 return true;
1766 }
1767 }
1768 // Leaf name: redundant_or
1769 // Rule: redundant_or
1770 if (!RuleConfig->isRuleDisabled(52)) {
1771 if (1
1772 && [&]() {
1773 return Helper.matchRedundantOr(*MIs[0], MatchData52);
1774 return true;
1775 }() ) {
1776 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_or'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_or'\n"
; } } while (false)
;
1777 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData52);
1778 return true;
1779 }
1780 }
1781 // Leaf name: load_or_combine
1782 // Rule: load_or_combine
1783 if (!RuleConfig->isRuleDisabled(80)) {
1784 if (1
1785 && [&]() {
1786 return Helper.matchLoadOrCombine(*MIs[0], MatchData80);
1787 return true;
1788 }() ) {
1789 LLVM_DEBUG(dbgs() << "Applying rule 'load_or_combine'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'load_or_combine'\n"
; } } while (false)
;
1790 Helper.applyBuildFn(*MIs[0], MatchData80);
1791 return true;
1792 }
1793 }
1794 // Leaf name: funnel_shift_from_or_shift
1795 // Rule: funnel_shift_from_or_shift
1796 if (!RuleConfig->isRuleDisabled(83)) {
1797 if (1
1798 && [&]() {
1799 return Helper.matchOrShiftToFunnelShift(*MIs[0], MatchData83);
1800 return true;
1801 }() ) {
1802 LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n"
; } } while (false)
;
1803 Helper.applyBuildFn(*MIs[0], MatchData83);
1804 return true;
1805 }
1806 }
1807 // Leaf name: constant_fold
1808 // Rule: constant_fold
1809 if (!RuleConfig->isRuleDisabled(89)) {
1810 if (1
1811 && [&]() {
1812 return Helper.matchConstantFold(*MIs[0], MatchData89);
1813 return true;
1814 }() ) {
1815 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
1816 Helper.replaceInstWithConstant(*MIs[0], MatchData89);
1817 return true;
1818 }
1819 }
1820 // Leaf name: fold_binop_into_select
1821 // Rule: fold_binop_into_select
1822 if (!RuleConfig->isRuleDisabled(104)) {
1823 if (1
1824 && [&]() {
1825 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
1826 return true;
1827 }() ) {
1828 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
1829 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
1830 return true;
1831 }
1832 }
1833 // Leaf name: commute_constant_to_rhs
1834 // Rule: commute_constant_to_rhs
1835 if (!RuleConfig->isRuleDisabled(109)) {
1836 if (1
1837 && [&]() {
1838
1839 return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value();
1840
1841 return true;
1842 }() ) {
1843 LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n"
; } } while (false)
;
1844
1845 Observer.changingInstr(*MIs[0]);
1846 Register LHSReg = MIs[0]->getOperand(1).getReg();
1847 Register RHSReg = MIs[0]->getOperand(2).getReg();
1848 MIs[0]->getOperand(1).setReg(RHSReg);
1849 MIs[0]->getOperand(2).setReg(LHSReg);
1850 Observer.changedInstr(*MIs[0]);
1851
1852 return true;
1853 }
1854 }
1855 return false;
1856 }
1857 if (Partition == 17 /* TargetOpcode::G_SHL */) {
1858 // Leaf name: binop_left_undef_to_zero
1859 // Rule: binop_left_undef_to_zero
1860 if (!RuleConfig->isRuleDisabled(14)) {
1861 if (1
1862 && [&]() {
1863 return Helper.matchOperandIsUndef(*MIs[0], 1);
1864 return true;
1865 }() ) {
1866 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n"
; } } while (false)
;
1867 Helper.replaceInstWithConstant(*MIs[0], 0);
1868 return true;
1869 }
1870 }
1871 // Leaf name: binop_right_undef_to_undef
1872 // Rule: binop_right_undef_to_undef
1873 if (!RuleConfig->isRuleDisabled(15)) {
1874 if (1
1875 && [&]() {
1876 return Helper.matchOperandIsUndef(*MIs[0], 2);
1877 return true;
1878 }() ) {
1879 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n"
; } } while (false)
;
1880 Helper.replaceInstWithUndef(*MIs[0]);
1881 return true;
1882 }
1883 }
1884 // Leaf name: right_identity_zero
1885 // Rule: right_identity_zero
1886 if (!RuleConfig->isRuleDisabled(24)) {
1887 if (1
1888 && [&]() {
1889 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
1890 return true;
1891 }() ) {
1892 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
1893 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1894 return true;
1895 }
1896 }
1897 // Leaf name: reduce_shl_of_extend
1898 // Rule: reduce_shl_of_extend
1899 if (!RuleConfig->isRuleDisabled(45)) {
1900 if (1
1901 && [&]() {
1902 return Helper.matchCombineShlOfExtend(*MIs[0], MatchData45);
1903 return true;
1904 }() ) {
1905 LLVM_DEBUG(dbgs() << "Applying rule 'reduce_shl_of_extend'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'reduce_shl_of_extend'\n"
; } } while (false)
;
1906 Helper.applyCombineShlOfExtend(*MIs[0], MatchData45);
1907 return true;
1908 }
1909 }
1910 // Leaf name: shift_immed_chain
1911 // Rule: shift_immed_chain
1912 if (!RuleConfig->isRuleDisabled(78)) {
1913 if (1
1914 && [&]() {
1915 return Helper.matchShiftImmedChain(*MIs[0], MatchData78);
1916 return true;
1917 }() ) {
1918 LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n"
; } } while (false)
;
1919 Helper.applyShiftImmedChain(*MIs[0], MatchData78);
1920 return true;
1921 }
1922 }
1923 // Leaf name: shift_of_shifted_logic_chain
1924 // Rule: shift_of_shifted_logic_chain
1925 if (!RuleConfig->isRuleDisabled(79)) {
1926 if (1
1927 && [&]() {
1928 return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79);
1929 return true;
1930 }() ) {
1931 LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n"
; } } while (false)
;
1932 Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79);
1933 return true;
1934 }
1935 }
1936 // Leaf name: fold_binop_into_select
1937 // Rule: fold_binop_into_select
1938 if (!RuleConfig->isRuleDisabled(104)) {
1939 if (1
1940 && [&]() {
1941 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
1942 return true;
1943 }() ) {
1944 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
1945 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
1946 return true;
1947 }
1948 }
1949 return false;
1950 }
1951 if (Partition == 18 /* TargetOpcode::G_UDIV */) {
1952 // Leaf name: binop_left_undef_to_zero
1953 // Rule: binop_left_undef_to_zero
1954 if (!RuleConfig->isRuleDisabled(14)) {
1955 if (1
1956 && [&]() {
1957 return Helper.matchOperandIsUndef(*MIs[0], 1);
1958 return true;
1959 }() ) {
1960 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n"
; } } while (false)
;
1961 Helper.replaceInstWithConstant(*MIs[0], 0);
1962 return true;
1963 }
1964 }
1965 // Leaf name: binop_left_to_zero
1966 // Rule: binop_left_to_zero
1967 if (!RuleConfig->isRuleDisabled(26)) {
1968 if (1
1969 && [&]() {
1970 return Helper.matchOperandIsZero(*MIs[0], 1);
1971 return true;
1972 }() ) {
1973 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n"
; } } while (false)
;
1974 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1975 return true;
1976 }
1977 }
1978 // Leaf name: div_rem_to_divrem
1979 // Rule: div_rem_to_divrem
1980 if (!RuleConfig->isRuleDisabled(82)) {
1981 if (1
1982 && [&]() {
1983 return Helper.matchCombineDivRem(*MIs[0], MatchData82);
1984 return true;
1985 }() ) {
1986 LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n"
; } } while (false)
;
1987 Helper.applyCombineDivRem(*MIs[0], MatchData82);
1988 return true;
1989 }
1990 }
1991 // Leaf name: udiv_by_const
1992 // Rule: udiv_by_const
1993 if (!RuleConfig->isRuleDisabled(91)) {
1994 if (1
1995 && [&]() {
1996 return Helper.matchUDivByConst(*MIs[0]);
1997 return true;
1998 }() ) {
1999 LLVM_DEBUG(dbgs() << "Applying rule 'udiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'udiv_by_const'\n"
; } } while (false)
;
2000 Helper.applyUDivByConst(*MIs[0]);
2001 return true;
2002 }
2003 }
2004 // Leaf name: fold_binop_into_select
2005 // Rule: fold_binop_into_select
2006 if (!RuleConfig->isRuleDisabled(104)) {
2007 if (1
2008 && [&]() {
2009 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
2010 return true;
2011 }() ) {
2012 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2013 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
2014 return true;
2015 }
2016 }
2017 return false;
2018 }
2019 if (Partition == 19 /* TargetOpcode::G_UREM */) {
2020 // Leaf name: binop_left_undef_to_zero
2021 // Rule: binop_left_undef_to_zero
2022 if (!RuleConfig->isRuleDisabled(14)) {
2023 if (1
2024 && [&]() {
2025 return Helper.matchOperandIsUndef(*MIs[0], 1);
2026 return true;
2027 }() ) {
2028 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n"
; } } while (false)
;
2029 Helper.replaceInstWithConstant(*MIs[0], 0);
2030 return true;
2031 }
2032 }
2033 // Leaf name: binop_left_to_zero
2034 // Rule: binop_left_to_zero
2035 if (!RuleConfig->isRuleDisabled(26)) {
2036 if (1
2037 && [&]() {
2038 return Helper.matchOperandIsZero(*MIs[0], 1);
2039 return true;
2040 }() ) {
2041 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n"
; } } while (false)
;
2042 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2043 return true;
2044 }
2045 }
2046 // Leaf name: urem_pow2_to_mask
2047 // Rule: urem_pow2_to_mask
2048 if (!RuleConfig->isRuleDisabled(53)) {
2049 if (1
2050 && [&]() {
2051 return Helper.matchOperandIsKnownToBeAPowerOfTwo(*MIs[0], 2);
2052 return true;
2053 }() ) {
2054 LLVM_DEBUG(dbgs() << "Applying rule 'urem_pow2_to_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'urem_pow2_to_mask'\n"
; } } while (false)
;
2055 Helper.applySimplifyURemByPow2(*MIs[0]);
2056 return true;
2057 }
2058 }
2059 // Leaf name: div_rem_to_divrem
2060 // Rule: div_rem_to_divrem
2061 if (!RuleConfig->isRuleDisabled(82)) {
2062 if (1
2063 && [&]() {
2064 return Helper.matchCombineDivRem(*MIs[0], MatchData82);
2065 return true;
2066 }() ) {
2067 LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n"
; } } while (false)
;
2068 Helper.applyCombineDivRem(*MIs[0], MatchData82);
2069 return true;
2070 }
2071 }
2072 // Leaf name: fold_binop_into_select
2073 // Rule: fold_binop_into_select
2074 if (!RuleConfig->isRuleDisabled(104)) {
2075 if (1
2076 && [&]() {
2077 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
2078 return true;
2079 }() ) {
2080 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2081 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
2082 return true;
2083 }
2084 }
2085 return false;
2086 }
2087 if (Partition == 20 /* TargetOpcode::G_ASHR */) {
2088 // Leaf name: binop_right_undef_to_undef
2089 // Rule: binop_right_undef_to_undef
2090 if (!RuleConfig->isRuleDisabled(15)) {
2091 if (1
2092 && [&]() {
2093 return Helper.matchOperandIsUndef(*MIs[0], 2);
2094 return true;
2095 }() ) {
2096 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n"
; } } while (false)
;
2097 Helper.replaceInstWithUndef(*MIs[0]);
2098 return true;
2099 }
2100 }
2101 // Leaf name: right_identity_zero
2102 // Rule: right_identity_zero
2103 if (!RuleConfig->isRuleDisabled(24)) {
2104 if (1
2105 && [&]() {
2106 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2107 return true;
2108 }() ) {
2109 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2110 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2111 return true;
2112 }
2113 }
2114 // Leaf name: shl_ashr_to_sext_inreg
2115 // Rule: shl_ashr_to_sext_inreg
2116 if (!RuleConfig->isRuleDisabled(43)) {
2117 if (1
2118 && [&]() {
2119 return Helper.matchAshrShlToSextInreg(*MIs[0], MatchData43);
2120 return true;
2121 }() ) {
2122 LLVM_DEBUG(dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n"
; } } while (false)
;
2123 Helper.applyAshShlToSextInreg(*MIs[0], MatchData43);
2124 return true;
2125 }
2126 }
2127 // Leaf name: shift_immed_chain
2128 // Rule: shift_immed_chain
2129 if (!RuleConfig->isRuleDisabled(78)) {
2130 if (1
2131 && [&]() {
2132 return Helper.matchShiftImmedChain(*MIs[0], MatchData78);
2133 return true;
2134 }() ) {
2135 LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n"
; } } while (false)
;
2136 Helper.applyShiftImmedChain(*MIs[0], MatchData78);
2137 return true;
2138 }
2139 }
2140 // Leaf name: shift_of_shifted_logic_chain
2141 // Rule: shift_of_shifted_logic_chain
2142 if (!RuleConfig->isRuleDisabled(79)) {
2143 if (1
2144 && [&]() {
2145 return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79);
2146 return true;
2147 }() ) {
2148 LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n"
; } } while (false)
;
2149 Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79);
2150 return true;
2151 }
2152 }
2153 // Leaf name: bitfield_extract_from_shr
2154 // Rule: bitfield_extract_from_shr
2155 if (!RuleConfig->isRuleDisabled(87)) {
2156 if (1
2157 && [&]() {
2158 return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData87);
2159 return true;
2160 }() ) {
2161 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n"
; } } while (false)
;
2162 Helper.applyBuildFn(*MIs[0], MatchData87);
2163 return true;
2164 }
2165 }
2166 // Leaf name: bitfield_extract_from_shr_and
2167 // Rule: bitfield_extract_from_shr_and
2168 if (!RuleConfig->isRuleDisabled(88)) {
2169 if (1
2170 && [&]() {
2171 return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData88);
2172 return true;
2173 }() ) {
2174 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n"
; } } while (false)
;
2175 Helper.applyBuildFn(*MIs[0], MatchData88);
2176 return true;
2177 }
2178 }
2179 // Leaf name: fold_binop_into_select
2180 // Rule: fold_binop_into_select
2181 if (!RuleConfig->isRuleDisabled(104)) {
2182 if (1
2183 && [&]() {
2184 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
2185 return true;
2186 }() ) {
2187 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2188 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
2189 return true;
2190 }
2191 }
2192 return false;
2193 }
2194 if (Partition == 21 /* TargetOpcode::G_LSHR */) {
2195 // Leaf name: binop_right_undef_to_undef
2196 // Rule: binop_right_undef_to_undef
2197 if (!RuleConfig->isRuleDisabled(15)) {
2198 if (1
2199 && [&]() {
2200 return Helper.matchOperandIsUndef(*MIs[0], 2);
2201 return true;
2202 }() ) {
2203 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n"
; } } while (false)
;
2204 Helper.replaceInstWithUndef(*MIs[0]);
2205 return true;
2206 }
2207 }
2208 // Leaf name: right_identity_zero
2209 // Rule: right_identity_zero
2210 if (!RuleConfig->isRuleDisabled(24)) {
2211 if (1
2212 && [&]() {
2213 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2214 return true;
2215 }() ) {
2216 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2217 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2218 return true;
2219 }
2220 }
2221 // Leaf name: shift_immed_chain
2222 // Rule: shift_immed_chain
2223 if (!RuleConfig->isRuleDisabled(78)) {
2224 if (1
2225 && [&]() {
2226 return Helper.matchShiftImmedChain(*MIs[0], MatchData78);
2227 return true;
2228 }() ) {
2229 LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n"
; } } while (false)
;
2230 Helper.applyShiftImmedChain(*MIs[0], MatchData78);
2231 return true;
2232 }
2233 }
2234 // Leaf name: shift_of_shifted_logic_chain
2235 // Rule: shift_of_shifted_logic_chain
2236 if (!RuleConfig->isRuleDisabled(79)) {
2237 if (1
2238 && [&]() {
2239 return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79);
2240 return true;
2241 }() ) {
2242 LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n"
; } } while (false)
;
2243 Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79);
2244 return true;
2245 }
2246 }
2247 // Leaf name: bitfield_extract_from_shr
2248 // Rule: bitfield_extract_from_shr
2249 if (!RuleConfig->isRuleDisabled(87)) {
2250 if (1
2251 && [&]() {
2252 return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData87);
2253 return true;
2254 }() ) {
2255 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n"
; } } while (false)
;
2256 Helper.applyBuildFn(*MIs[0], MatchData87);
2257 return true;
2258 }
2259 }
2260 // Leaf name: bitfield_extract_from_shr_and
2261 // Rule: bitfield_extract_from_shr_and
2262 if (!RuleConfig->isRuleDisabled(88)) {
2263 if (1
2264 && [&]() {
2265 return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData88);
2266 return true;
2267 }() ) {
2268 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n"
; } } while (false)
;
2269 Helper.applyBuildFn(*MIs[0], MatchData88);
2270 return true;
2271 }
2272 }
2273 // Leaf name: fold_binop_into_select
2274 // Rule: fold_binop_into_select
2275 if (!RuleConfig->isRuleDisabled(104)) {
2276 if (1
2277 && [&]() {
2278 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
2279 return true;
2280 }() ) {
2281 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2282 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
2283 return true;
2284 }
2285 }
2286 return false;
2287 }
2288 if (Partition == 22 /* TargetOpcode::G_ABS */) {
2289 // Leaf name: unary_undef_to_zero
2290 // Rule: unary_undef_to_zero
2291 if (!RuleConfig->isRuleDisabled(16)) {
2292 if (1
2293 && [&]() {
2294 return Helper.matchOperandIsUndef(*MIs[0], 1);
2295 return true;
2296 }() ) {
2297 LLVM_DEBUG(dbgs() << "Applying rule 'unary_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unary_undef_to_zero'\n"
; } } while (false)
;
2298 Helper.replaceInstWithConstant(*MIs[0], 0);
2299 return true;
2300 }
2301 }
2302 return false;
2303 }
2304 if (Partition == 23 /* TargetOpcode::G_FPTOSI */) {
2305 // Leaf name: propagate_undef_any_op
2306 // Rule: propagate_undef_any_op
2307 if (!RuleConfig->isRuleDisabled(17)) {
2308 if (1
2309 && [&]() {
2310 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
2311 return true;
2312 }() ) {
2313 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
2314 Helper.replaceInstWithUndef(*MIs[0]);
2315 return true;
2316 }
2317 }
2318 return false;
2319 }
2320 if (Partition == 24 /* TargetOpcode::G_FPTOUI */) {
2321 // Leaf name: propagate_undef_any_op
2322 // Rule: propagate_undef_any_op
2323 if (!RuleConfig->isRuleDisabled(17)) {
2324 if (1
2325 && [&]() {
2326 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
2327 return true;
2328 }() ) {
2329 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
2330 Helper.replaceInstWithUndef(*MIs[0]);
2331 return true;
2332 }
2333 }
2334 return false;
2335 }
2336 if (Partition == 25 /* TargetOpcode::G_SUB */) {
2337 // Leaf name: propagate_undef_any_op
2338 // Rule: propagate_undef_any_op
2339 if (!RuleConfig->isRuleDisabled(17)) {
2340 if (1
2341 && [&]() {
2342 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
2343 return true;
2344 }() ) {
2345 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
2346 Helper.replaceInstWithUndef(*MIs[0]);
2347 return true;
2348 }
2349 }
2350 // Leaf name: right_identity_zero
2351 // Rule: right_identity_zero
2352 if (!RuleConfig->isRuleDisabled(24)) {
2353 if (1
2354 && [&]() {
2355 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2356 return true;
2357 }() ) {
2358 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2359 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2360 return true;
2361 }
2362 }
2363 // Leaf name: constant_fold
2364 // Rule: constant_fold
2365 if (!RuleConfig->isRuleDisabled(89)) {
2366 if (1
2367 && [&]() {
2368 return Helper.matchConstantFold(*MIs[0], MatchData89);
2369 return true;
2370 }() ) {
2371 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
2372 Helper.replaceInstWithConstant(*MIs[0], MatchData89);
2373 return true;
2374 }
2375 }
2376 // Leaf name: fold_binop_into_select
2377 // Rule: fold_binop_into_select
2378 if (!RuleConfig->isRuleDisabled(104)) {
2379 if (1
2380 && [&]() {
2381 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
2382 return true;
2383 }() ) {
2384 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2385 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
2386 return true;
2387 }
2388 }
2389 // Leaf name: sub_add_reg
2390 // Rule: sub_add_reg
2391 if (!RuleConfig->isRuleDisabled(105)) {
2392 if (1
2393 && [&]() {
2394 return Helper.matchSubAddSameReg(*MIs[0], MatchData105);
2395 return true;
2396 }() ) {
2397 LLVM_DEBUG(dbgs() << "Applying rule 'sub_add_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'sub_add_reg'\n"
; } } while (false)
;
2398 Helper.applyBuildFn(*MIs[0], MatchData105);
2399 return true;
2400 }
2401 }
2402 return false;
2403 }
2404 if (Partition == 26 /* TargetOpcode::G_XOR */) {
2405 // Leaf name: propagate_undef_any_op
2406 // Rule: propagate_undef_any_op
2407 if (!RuleConfig->isRuleDisabled(17)) {
2408 if (1
2409 && [&]() {
2410 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
2411 return true;
2412 }() ) {
2413 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
2414 Helper.replaceInstWithUndef(*MIs[0]);
2415 return true;
2416 }
2417 }
2418 // Leaf name: right_identity_zero
2419 // Rule: right_identity_zero
2420 if (!RuleConfig->isRuleDisabled(24)) {
2421 if (1
2422 && [&]() {
2423 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2424 return true;
2425 }() ) {
2426 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2427 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2428 return true;
2429 }
2430 }
2431 // Leaf name: hoist_logic_op_with_same_opcode_hands
2432 // Rule: hoist_logic_op_with_same_opcode_hands
2433 if (!RuleConfig->isRuleDisabled(40)) {
2434 if (1
2435 && [&]() {
2436 return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData40);
2437 return true;
2438 }() ) {
2439 LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n"
; } } while (false)
;
2440 Helper.applyBuildInstructionSteps(*MIs[0], MatchData40);
2441 return true;
2442 }
2443 }
2444 // Leaf name: not_cmp_fold
2445 // Rule: not_cmp_fold
2446 if (!RuleConfig->isRuleDisabled(59)) {
2447 if (1
2448 && [&]() {
2449 return Helper.matchNotCmp(*MIs[0], MatchData59);
2450 return true;
2451 }() ) {
2452 LLVM_DEBUG(dbgs() << "Applying rule 'not_cmp_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'not_cmp_fold'\n"
; } } while (false)
;
2453 Helper.applyNotCmp(*MIs[0], MatchData59);
2454 return true;
2455 }
2456 }
2457 // Leaf name: xor_of_and_with_same_reg
2458 // Rule: xor_of_and_with_same_reg
2459 if (!RuleConfig->isRuleDisabled(76)) {
2460 if (1
2461 && [&]() {
2462 return Helper.matchXorOfAndWithSameReg(*MIs[0], MatchData76);
2463 return true;
2464 }() ) {
2465 LLVM_DEBUG(dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n"
; } } while (false)
;
2466 Helper.applyXorOfAndWithSameReg(*MIs[0], MatchData76);
2467 return true;
2468 }
2469 }
2470 // Leaf name: constant_fold
2471 // Rule: constant_fold
2472 if (!RuleConfig->isRuleDisabled(89)) {
2473 if (1
2474 && [&]() {
2475 return Helper.matchConstantFold(*MIs[0], MatchData89);
2476 return true;
2477 }() ) {
2478 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
2479 Helper.replaceInstWithConstant(*MIs[0], MatchData89);
2480 return true;
2481 }
2482 }
2483 // Leaf name: fold_binop_into_select
2484 // Rule: fold_binop_into_select
2485 if (!RuleConfig->isRuleDisabled(104)) {
2486 if (1
2487 && [&]() {
2488 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
2489 return true;
2490 }() ) {
2491 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2492 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
2493 return true;
2494 }
2495 }
2496 // Leaf name: commute_constant_to_rhs
2497 // Rule: commute_constant_to_rhs
2498 if (!RuleConfig->isRuleDisabled(109)) {
2499 if (1
2500 && [&]() {
2501
2502 return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value();
2503
2504 return true;
2505 }() ) {
2506 LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n"
; } } while (false)
;
2507
2508 Observer.changingInstr(*MIs[0]);
2509 Register LHSReg = MIs[0]->getOperand(1).getReg();
2510 Register RHSReg = MIs[0]->getOperand(2).getReg();
2511 MIs[0]->getOperand(1).setReg(RHSReg);
2512 MIs[0]->getOperand(2).setReg(LHSReg);
2513 Observer.changedInstr(*MIs[0]);
2514
2515 return true;
2516 }
2517 }
2518 return false;
2519 }
2520 if (Partition == 27 /* TargetOpcode::G_TRUNC */) {
2521 // Leaf name: propagate_undef_any_op
2522 // Rule: propagate_undef_any_op
2523 if (!RuleConfig->isRuleDisabled(17)) {
2524 if (1
2525 && [&]() {
2526 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
2527 return true;
2528 }() ) {
2529 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
2530 Helper.replaceInstWithUndef(*MIs[0]);
2531 return true;
2532 }
2533 }
2534 // Leaf name: trunc_buildvector_fold
2535 // Rule: trunc_buildvector_fold
2536 if (!RuleConfig->isRuleDisabled(35)) {
2537 if (1
2538 && [&]() {
2539 return Helper.matchTruncBuildVectorFold(*MIs[0], MatchData35);
2540 return true;
2541 }() ) {
2542 LLVM_DEBUG(dbgs() << "Applying rule 'trunc_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_buildvector_fold'\n"
; } } while (false)
;
2543 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData35);
2544 return true;
2545 }
2546 }
2547 // Leaf name: trunc_lshr_buildvector_fold
2548 // Rule: trunc_lshr_buildvector_fold
2549 if (!RuleConfig->isRuleDisabled(36)) {
2550 if (1
2551 && [&]() {
2552 return Helper.matchTruncLshrBuildVectorFold(*MIs[0], MatchData36);
2553 return true;
2554 }() ) {
2555 LLVM_DEBUG(dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n"
; } } while (false)
;
2556 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData36);
2557 return true;
2558 }
2559 }
2560 // Leaf name: trunc_ext_fold
2561 // Rule: trunc_ext_fold
2562 if (!RuleConfig->isRuleDisabled(66)) {
2563 if (1
2564 && [&]() {
2565 return Helper.matchCombineTruncOfExt(*MIs[0], MatchData66);
2566 return true;
2567 }() ) {
2568 LLVM_DEBUG(dbgs() << "Applying rule 'trunc_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_ext_fold'\n"
; } } while (false)
;
2569 Helper.applyCombineTruncOfExt(*MIs[0], MatchData66);
2570 return true;
2571 }
2572 }
2573 // Leaf name: trunc_shift
2574 // Rule: trunc_shift
2575 if (!RuleConfig->isRuleDisabled(67)) {
2576 if (1
2577 && [&]() {
2578 return Helper.matchCombineTruncOfShift(*MIs[0], MatchData67);
2579 return true;
2580 }() ) {
2581 LLVM_DEBUG(dbgs() << "Applying rule 'trunc_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_shift'\n"
; } } while (false)
;
2582 Helper.applyCombineTruncOfShift(*MIs[0], MatchData67);
2583 return true;
2584 }
2585 }
2586 return false;
2587 }
2588 if (Partition == 28 /* TargetOpcode::G_SHUFFLE_VECTOR */) {
2589 // Leaf name: propagate_undef_all_ops
2590 // Rule: propagate_undef_all_ops
2591 if (!RuleConfig->isRuleDisabled(18)) {
2592 if (1
2593 && [&]() {
2594 return Helper.matchAllExplicitUsesAreUndef(*MIs[0]);
2595 return true;
2596 }() ) {
2597 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_all_ops'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_all_ops'\n"
; } } while (false)
;
2598 Helper.replaceInstWithUndef(*MIs[0]);
2599 return true;
2600 }
2601 }
2602 // Leaf name: propagate_undef_shuffle_mask
2603 // Rule: propagate_undef_shuffle_mask
2604 if (!RuleConfig->isRuleDisabled(19)) {
2605 if (1
2606 && [&]() {
2607 return Helper.matchUndefShuffleVectorMask(*MIs[0]);
2608 return true;
2609 }() ) {
2610 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n"
; } } while (false)
;
2611 Helper.replaceInstWithUndef(*MIs[0]);
2612 return true;
2613 }
2614 }
2615 return false;
2616 }
2617 if (Partition == 29 /* TargetOpcode::G_UNMERGE_VALUES */) {
2618 // Leaf name: unmerge_undef
2619 // Rule: unmerge_undef
2620 if (!RuleConfig->isRuleDisabled(21)) {
2621 if (1
2622 && [&]() {
2623 return Helper.matchCombineUnmergeUndef(*MIs[0], MatchData21);
2624 return true;
2625 }() ) {
2626 LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_undef'\n"
; } } while (false)
;
2627 Helper.applyBuildFn(*MIs[0], MatchData21);
2628 return true;
2629 }
2630 }
2631 // Leaf name: unmerge_merge
2632 // Rule: unmerge_merge
2633 if (!RuleConfig->isRuleDisabled(61)) {
2634 if (1
2635 && [&]() {
2636 return Helper.matchCombineUnmergeMergeToPlainValues(*MIs[0], MatchData61);
2637 return true;
2638 }() ) {
2639 LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_merge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_merge'\n"
; } } while (false)
;
2640 Helper.applyCombineUnmergeMergeToPlainValues(*MIs[0], MatchData61);
2641 return true;
2642 }
2643 }
2644 // Leaf name: unmerge_cst
2645 // Rule: unmerge_cst
2646 if (!RuleConfig->isRuleDisabled(62)) {
2647 if (1
2648 && [&]() {
2649 return Helper.matchCombineUnmergeConstant(*MIs[0], MatchData62);
2650 return true;
2651 }() ) {
2652 LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_cst'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_cst'\n"
; } } while (false)
;
2653 Helper.applyCombineUnmergeConstant(*MIs[0], MatchData62);
2654 return true;
2655 }
2656 }
2657 // Leaf name: unmerge_dead_to_trunc
2658 // Rule: unmerge_dead_to_trunc
2659 if (!RuleConfig->isRuleDisabled(63)) {
2660 if (1
2661 && [&]() {
2662 return Helper.matchCombineUnmergeWithDeadLanesToTrunc(*MIs[0]);
2663 return true;
2664 }() ) {
2665 LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n"
; } } while (false)
;
2666 Helper.applyCombineUnmergeWithDeadLanesToTrunc(*MIs[0]);
2667 return true;
2668 }
2669 }
2670 // Leaf name: unmerge_zext_to_zext
2671 // Rule: unmerge_zext_to_zext
2672 if (!RuleConfig->isRuleDisabled(64)) {
2673 if (1
2674 && [&]() {
2675 return Helper.matchCombineUnmergeZExtToZExt(*MIs[0]);
2676 return true;
2677 }() ) {
2678 LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_zext_to_zext'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_zext_to_zext'\n"
; } } while (false)
;
2679 Helper.applyCombineUnmergeZExtToZExt(*MIs[0]);
2680 return true;
2681 }
2682 }
2683 return false;
2684 }
2685 if (Partition == 30 /* TargetOpcode::G_SELECT */) {
2686 // Leaf name: select_same_val
2687 // Rule: select_same_val
2688 if (!RuleConfig->isRuleDisabled(23)) {
2689 if (1
2690 && [&]() {
2691 return Helper.matchSelectSameVal(*MIs[0]);
2692 return true;
2693 }() ) {
2694 LLVM_DEBUG(dbgs() << "Applying rule 'select_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_same_val'\n"
; } } while (false)
;
2695 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2);
2696 return true;
2697 }
2698 }
2699 // Leaf name: select_undef_cmp
2700 // Rule: select_undef_cmp
2701 if (!RuleConfig->isRuleDisabled(47)) {
2702 if (1
2703 && [&]() {
2704 return Helper.matchUndefSelectCmp(*MIs[0]);
2705 return true;
2706 }() ) {
2707 LLVM_DEBUG(dbgs() << "Applying rule 'select_undef_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_undef_cmp'\n"
; } } while (false)
;
2708 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2);
2709 return true;
2710 }
2711 }
2712 // Leaf name: select_constant_cmp
2713 // Rule: select_constant_cmp
2714 if (!RuleConfig->isRuleDisabled(48)) {
2715 if (1
2716 && [&]() {
2717 return Helper.matchConstantSelectCmp(*MIs[0], MatchData48);
2718 return true;
2719 }() ) {
2720 LLVM_DEBUG(dbgs() << "Applying rule 'select_constant_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_constant_cmp'\n"
; } } while (false)
;
2721 return Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData48);
2722 return true;
2723 }
2724 }
2725 // Leaf name: select_to_logical
2726 // Rule: select_to_logical
2727 if (!RuleConfig->isRuleDisabled(49)) {
2728 if (1
2729 && [&]() {
2730 return Helper.matchSelectToLogical(*MIs[0], MatchData49);
2731 return true;
2732 }() ) {
2733 LLVM_DEBUG(dbgs() << "Applying rule 'select_to_logical'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_to_logical'\n"
; } } while (false)
;
2734 Helper.applyBuildFn(*MIs[0], MatchData49);
2735 return true;
2736 }
2737 }
2738 // Leaf name: select_to_minmax
2739 // Rule: select_to_minmax
2740 if (!RuleConfig->isRuleDisabled(106)) {
2741 if (1
2742 && [&]() {
2743 return Helper.matchSimplifySelectToMinMax(*MIs[0], MatchData106);
2744 return true;
2745 }() ) {
2746 LLVM_DEBUG(dbgs() << "Applying rule 'select_to_minmax'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_to_minmax'\n"
; } } while (false)
;
2747 Helper.applyBuildFn(*MIs[0], MatchData106);
2748 return true;
2749 }
2750 }
2751 return false;
2752 }
2753 if (Partition == 31 /* TargetOpcode::G_PTR_ADD */) {
2754 // Leaf name: right_identity_zero
2755 // Rule: right_identity_zero
2756 if (!RuleConfig->isRuleDisabled(24)) {
2757 if (1
2758 && [&]() {
2759 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2760 return true;
2761 }() ) {
2762 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2763 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2764 return true;
2765 }
2766 }
2767 // Leaf name: reassoc_ptradd
2768 // Rule: reassoc_ptradd
2769 if (!RuleConfig->isRuleDisabled(41)) {
2770 if (1
2771 && [&]() {
2772 return Helper.matchReassocPtrAdd(*MIs[0], MatchData41);
2773 return true;
2774 }() ) {
2775 LLVM_DEBUG(dbgs() << "Applying rule 'reassoc_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'reassoc_ptradd'\n"
; } } while (false)
;
2776 Helper.applyBuildFnNoErase(*MIs[0], MatchData41);
2777 return true;
2778 }
2779 }
2780 // Leaf name: ptr_add_immed_chain
2781 // Rule: ptr_add_immed_chain
2782 if (!RuleConfig->isRuleDisabled(42)) {
2783 if (1
2784 && [&]() {
2785 return Helper.matchPtrAddImmedChain(*MIs[0], MatchData42);
2786 return true;
2787 }() ) {
2788 LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_immed_chain'\n"
; } } while (false)
;
2789 Helper.applyPtrAddImmedChain(*MIs[0], MatchData42);
2790 return true;
2791 }
2792 }
2793 // Leaf name: const_ptradd_to_i2p
2794 // Rule: const_ptradd_to_i2p
2795 if (!RuleConfig->isRuleDisabled(69)) {
2796 if (1
2797 && [&]() {
2798 return Helper.matchCombineConstPtrAddToI2P(*MIs[0], MatchData69);
2799 return true;
2800 }() ) {
2801 LLVM_DEBUG(dbgs() << "Applying rule 'const_ptradd_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'const_ptradd_to_i2p'\n"
; } } while (false)
;
2802 Helper.applyCombineConstPtrAddToI2P(*MIs[0], MatchData69);
2803 return true;
2804 }
2805 }
2806 // Leaf name: ptr_add_with_zero
2807 // Rule: ptr_add_with_zero
2808 if (!RuleConfig->isRuleDisabled(77)) {
2809 if (1
2810 && [&]() {
2811 return Helper.matchPtrAddZero(*MIs[0]);
2812 return true;
2813 }() ) {
2814 LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_with_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_with_zero'\n"
; } } while (false)
;
2815 Helper.applyPtrAddZero(*MIs[0]);
2816 return true;
2817 }
2818 }
2819 // Leaf name: fold_binop_into_select
2820 // Rule: fold_binop_into_select
2821 if (!RuleConfig->isRuleDisabled(104)) {
2822 if (1
2823 && [&]() {
2824 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
2825 return true;
2826 }() ) {
2827 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2828 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
2829 return true;
2830 }
2831 }
2832 return false;
2833 }
2834 if (Partition == 32 /* TargetOpcode::G_ROTL */) {
2835 // Leaf name: right_identity_zero
2836 // Rule: right_identity_zero
2837 if (!RuleConfig->isRuleDisabled(24)) {
2838 if (1
2839 && [&]() {
2840 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2841 return true;
2842 }() ) {
2843 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2844 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2845 return true;
2846 }
2847 }
2848 return false;
2849 }
2850 if (Partition == 33 /* TargetOpcode::G_ROTR */) {
2851 // Leaf name: right_identity_zero
2852 // Rule: right_identity_zero
2853 if (!RuleConfig->isRuleDisabled(24)) {
2854 if (1
2855 && [&]() {
2856 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2857 return true;
2858 }() ) {
2859 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2860 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2861 return true;
2862 }
2863 }
2864 return false;
2865 }
2866 if (Partition == 34 /* TargetOpcode::G_SDIV */) {
2867 // Leaf name: binop_left_to_zero
2868 // Rule: binop_left_to_zero
2869 if (!RuleConfig->isRuleDisabled(26)) {
2870 if (1
2871 && [&]() {
2872 return Helper.matchOperandIsZero(*MIs[0], 1);
2873 return true;
2874 }() ) {
2875 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n"
; } } while (false)
;
2876 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2877 return true;
2878 }
2879 }
2880 // Leaf name: div_rem_to_divrem
2881 // Rule: div_rem_to_divrem
2882 if (!RuleConfig->isRuleDisabled(82)) {
2883 if (1
2884 && [&]() {
2885 return Helper.matchCombineDivRem(*MIs[0], MatchData82);
2886 return true;
2887 }() ) {
2888 LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n"
; } } while (false)
;
2889 Helper.applyCombineDivRem(*MIs[0], MatchData82);
2890 return true;
2891 }
2892 }
2893 // Leaf name: sdiv_by_const
2894 // Rule: sdiv_by_const
2895 if (!RuleConfig->isRuleDisabled(92)) {
2896 if (1
2897 && [&]() {
2898 return Helper.matchSDivByConst(*MIs[0]);
2899 return true;
2900 }() ) {
2901 LLVM_DEBUG(dbgs() << "Applying rule 'sdiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'sdiv_by_const'\n"
; } } while (false)
;
2902 Helper.applySDivByConst(*MIs[0]);
2903 return true;
2904 }
2905 }
2906 // Leaf name: fold_binop_into_select
2907 // Rule: fold_binop_into_select
2908 if (!RuleConfig->isRuleDisabled(104)) {
2909 if (1
2910 && [&]() {
2911 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
2912 return true;
2913 }() ) {
2914 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2915 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
2916 return true;
2917 }
2918 }
2919 return false;
2920 }
2921 if (Partition == 35 /* TargetOpcode::G_SREM */) {
2922 // Leaf name: binop_left_to_zero
2923 // Rule: binop_left_to_zero
2924 if (!RuleConfig->isRuleDisabled(26)) {
2925 if (1
2926 && [&]() {
2927 return Helper.matchOperandIsZero(*MIs[0], 1);
2928 return true;
2929 }() ) {
2930 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n"
; } } while (false)
;
2931 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2932 return true;
2933 }
2934 }
2935 // Leaf name: div_rem_to_divrem
2936 // Rule: div_rem_to_divrem
2937 if (!RuleConfig->isRuleDisabled(82)) {
2938 if (1
2939 && [&]() {
2940 return Helper.matchCombineDivRem(*MIs[0], MatchData82);
2941 return true;
2942 }() ) {
2943 LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n"
; } } while (false)
;
2944 Helper.applyCombineDivRem(*MIs[0], MatchData82);
2945 return true;
2946 }
2947 }
2948 // Leaf name: fold_binop_into_select
2949 // Rule: fold_binop_into_select
2950 if (!RuleConfig->isRuleDisabled(104)) {
2951 if (1
2952 && [&]() {
2953 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
2954 return true;
2955 }() ) {
2956 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2957 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
2958 return true;
2959 }
2960 }
2961 return false;
2962 }
2963 if (Partition == 36 /* TargetOpcode::G_INTTOPTR */) {
2964 // Leaf name: p2i_to_i2p
2965 // Rule: p2i_to_i2p
2966 if (!RuleConfig->isRuleDisabled(28)) {
2967 if (1
2968 && [&]() {
2969 return Helper.matchCombineI2PToP2I(*MIs[0], MatchData28);
2970 return true;
2971 }() ) {
2972 LLVM_DEBUG(dbgs() << "Applying rule 'p2i_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'p2i_to_i2p'\n"
; } } while (false)
;
2973 Helper.applyCombineI2PToP2I(*MIs[0], MatchData28);
2974 return true;
2975 }
2976 }
2977 return false;
2978 }
2979 if (Partition == 37 /* TargetOpcode::G_PTRTOINT */) {
2980 Partition = -1;
2981 if (MIs.size() <= 1) MIs.resize(2);
2982 MIs[1] = nullptr;
2983 if (MIs[0]->getOperand(1).isReg())
2984 MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg());
2985 if (MIs[1] != nullptr) Partition = 0;
2986 if (Partition == -1) return false;
2987 if (Partition == 0 /* true */) {
2988 Partition = -1;
2989 switch (MIs[1]->getOpcode()) {
2990 case TargetOpcode::G_INTTOPTR: Partition = 0; break;
2991 }
2992 // Default case but without conflicting with potential default case in selection.
2993 if (Partition == -1) return false;
2994 if (Partition == 0 /* TargetOpcode::G_INTTOPTR */) {
2995 // Leaf name: i2p_to_p2i
2996 // Rule: i2p_to_p2i
2997 if (!RuleConfig->isRuleDisabled(29)) {
2998 if (1
2999 && [&]() {
3000 MatchData29 = MIs[1]->getOperand(1).getReg();
3001 return true;
3002 }() ) {
3003 LLVM_DEBUG(dbgs() << "Applying rule 'i2p_to_p2i'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'i2p_to_p2i'\n"
; } } while (false)
;
3004 Helper.applyCombineP2IToI2P(*MIs[0], MatchData29);
3005 return true;
3006 }
3007 }
3008 return false;
3009 }
3010 }
3011 }
3012 if (Partition == 38 /* TargetOpcode::G_ANYEXT */) {
3013 // Leaf name: anyext_trunc_fold
3014 // Rule: anyext_trunc_fold
3015 if (!RuleConfig->isRuleDisabled(30)) {
3016 if (1
3017 && [&]() {
3018 return Helper.matchCombineAnyExtTrunc(*MIs[0], MatchData30);
3019 return true;
3020 }() ) {
3021 LLVM_DEBUG(dbgs() << "Applying rule 'anyext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'anyext_trunc_fold'\n"
; } } while (false)
;
3022 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData30);
3023 return true;
3024 }
3025 }
3026 // Leaf name: ext_ext_fold
3027 // Rule: ext_ext_fold
3028 if (!RuleConfig->isRuleDisabled(58)) {
3029 if (1
3030 && [&]() {
3031 return Helper.matchCombineExtOfExt(*MIs[0], MatchData58);
3032 return true;
3033 }() ) {
3034 LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n"
; } } while (false)
;
3035 Helper.applyCombineExtOfExt(*MIs[0], MatchData58);
3036 return true;
3037 }
3038 }
3039 return false;
3040 }
3041 if (Partition == 39 /* TargetOpcode::G_FNEG */) {
3042 Partition = -1;
3043 if (MIs.size() <= 1) MIs.resize(2);
3044 MIs[1] = nullptr;
3045 if (MIs[0]->getOperand(1).isReg())
3046 MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg());
3047 if (MIs[1] == nullptr) Partition = 1;
3048 if (MIs[1] != nullptr) Partition = 0;
3049 if (Partition == -1) return false;
3050 if (Partition == 0 /* true */) {
3051 Partition = -1;
Value stored to 'Partition' is never read
3052 switch (MIs[1]->getOpcode()) {
3053 case TargetOpcode::G_FNEG: Partition = 0; break;
3054 default: Partition = 1; break;
3055 }
3056 // Default case but without conflicting with potential default case in selection.
3057 if (Partition == -1) return false;
3058 if (Partition == 0 /* TargetOpcode::G_FNEG */) {
3059 // Leaf name: fneg_fneg_fold
3060 // Rule: fneg_fneg_fold
3061 if (!RuleConfig->isRuleDisabled(31)) {
3062 if (1
3063 && [&]() {
3064 MatchData31 = MIs[1]->getOperand(1).getReg();
3065 return true;
3066 }() ) {
3067 LLVM_DEBUG(dbgs() << "Applying rule 'fneg_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fneg_fneg_fold'\n"
; } } while (false)
;
3068 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData31);
3069 return true;
3070 }
3071 }
3072 // Leaf name: constant_fp_op
3073 // Rule: constant_fp_op
3074 if (!RuleConfig->isRuleDisabled(68)) {
3075 if (1
3076 && [&]() {
3077 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3078 return true;
3079 }() ) {
3080 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3081 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3082 return true;
3083 }
3084 }
3085 return false;
3086 }
3087 if (Partition == 1 /* * or nullptr */) {
3088 // Leaf name: constant_fp_op
3089 // Rule: constant_fp_op
3090 if (!RuleConfig->isRuleDisabled(68)) {
3091 if (1
3092 && [&]() {
3093 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3094 return true;
3095 }() ) {
3096 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3097 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3098 return true;
3099 }
3100 }
3101 return false;
3102 }
3103 }
3104 if (Partition == 1 /* false */) {
3105 // Leaf name: constant_fp_op
3106 // Rule: constant_fp_op
3107 if (!RuleConfig->isRuleDisabled(68)) {
3108 if (1
3109 && [&]() {
3110 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3111 return true;
3112 }() ) {
3113 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3114 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3115 return true;
3116 }
3117 }
3118 return false;
3119 }
3120 }
3121 if (Partition == 40 /* TargetOpcode::G_BUILD_VECTOR_TRUNC */) {
3122 // Leaf name: buildvector_identity_fold
3123 // Rule: buildvector_identity_fold
3124 if (!RuleConfig->isRuleDisabled(34)) {
3125 if (1
3126 && [&]() {
3127 return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34);
3128 return true;
3129 }() ) {
3130 LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n"
; } } while (false)
;
3131 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34);
3132 return true;
3133 }
3134 }
3135 return false;
3136 }
3137 if (Partition == 41 /* TargetOpcode::G_BITCAST */) {
3138 Partition = -1;
3139 if (MIs.size() <= 1) MIs.resize(2);
3140 MIs[1] = nullptr;
3141 if (MIs[0]->getOperand(1).isReg())
3142 MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg());
3143 if (MIs[1] != nullptr) Partition = 0;
3144 if (Partition == -1) return false;
3145 if (Partition == 0 /* true */) {
3146 Partition = -1;
3147 switch (MIs[1]->getOpcode()) {
3148 case TargetOpcode::G_BITCAST: Partition = 0; break;
3149 }
3150 // Default case but without conflicting with potential default case in selection.
3151 if (Partition == -1) return false;
3152 if (Partition == 0 /* TargetOpcode::G_BITCAST */) {
3153 // Leaf name: bitcast_bitcast_fold
3154 // Rule: bitcast_bitcast_fold
3155 if (!RuleConfig->isRuleDisabled(37)) {
3156 if (1
3157 && [&]() {
3158 return MRI.getType(MIs[1]->getOperand(1).getReg()) == MRI.getType(MIs[0]->getOperand(0).getReg());
3159 return true;
3160 }() ) {
3161 LLVM_DEBUG(dbgs() << "Applying rule 'bitcast_bitcast_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitcast_bitcast_fold'\n"
; } } while (false)
;
3162 Helper.replaceSingleDefInstWithReg(*MIs[0], MIs[1]->getOperand(1).getReg());
3163 return true;
3164 }
3165 }
3166 return false;
3167 }
3168 }
3169 }
3170 if (Partition == 42 /* TargetOpcode::G_PHI */) {
3171 // Leaf name: extend_through_phis
3172 // Rule: extend_through_phis
3173 if (!RuleConfig->isRuleDisabled(38)) {
3174 if (1
3175 && [&]() {
3176 return Helper.matchExtendThroughPhis(*MIs[0], MatchData38);
3177 return true;
3178 }() ) {
3179 LLVM_DEBUG(dbgs() << "Applying rule 'extend_through_phis'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extend_through_phis'\n"
; } } while (false)
;
3180 Helper.applyExtendThroughPhis(*MIs[0], MatchData38);
3181 return true;
3182 }
3183 }
3184 return false;
3185 }
3186 if (Partition == 43 /* TargetOpcode::G_SEXT_INREG */) {
3187 // Leaf name: sext_inreg_of_load
3188 // Rule: sext_inreg_of_load
3189 if (!RuleConfig->isRuleDisabled(44)) {
3190 if (1
3191 && [&]() {
3192 return Helper.matchSextInRegOfLoad(*MIs[0], MatchData44);
3193 return true;
3194 }() ) {
3195 LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_of_load'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_of_load'\n"
; } } while (false)
;
3196 Helper.applySextInRegOfLoad(*MIs[0], MatchData44);
3197 return true;
3198 }
3199 }
3200 // Leaf name: redundant_sext_inreg
3201 // Rule: redundant_sext_inreg
3202 if (!RuleConfig->isRuleDisabled(51)) {
3203 if (1
3204 && [&]() {
3205 return Helper.matchRedundantSExtInReg(*MIs[0]);
3206 return true;
3207 }() ) {
3208 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_sext_inreg'\n"
; } } while (false)
;
3209 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
3210 return true;
3211 }
3212 }
3213 // Leaf name: sext_inreg_to_zext_inreg
3214 // Rule: sext_inreg_to_zext_inreg
3215 if (!RuleConfig->isRuleDisabled(57)) {
3216 if (1
3217 && [&]() {
3218
3219 unsigned BitWidth = MRI.getType(MIs[0]->getOperand(1).getReg()).getScalarSizeInBits();
3220 return Helper.getKnownBits()->maskedValueIsZero(MIs[0]->getOperand(1).getReg(),
3221 APInt::getOneBitSet(BitWidth, MIs[0]->getOperand(2).getImm() - 1));
3222 return true;
3223 }() ) {
3224 LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n"
; } } while (false)
;
3225
3226 Helper.getBuilder().setInstrAndDebugLoc(*MIs[0]);
3227 Helper.getBuilder().buildZExtInReg(MIs[0]->getOperand(0), MIs[0]->getOperand(1), MIs[0]->getOperand(2).getImm());
3228 MIs[0]->eraseFromParent();
3229 return true;
3230
3231 return true;
3232 }
3233 }
3234 // Leaf name: bitfield_extract_from_sext_inreg
3235 // Rule: bitfield_extract_from_sext_inreg
3236 if (!RuleConfig->isRuleDisabled(85)) {
3237 if (1
3238 && [&]() {
3239 return Helper.matchBitfieldExtractFromSExtInReg(*MIs[0], MatchData85);
3240 return true;
3241 }() ) {
3242 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n"
; } } while (false)
;
3243 Helper.applyBuildFn(*MIs[0], MatchData85);
3244 return true;
3245 }
3246 }
3247 return false;
3248 }
3249 if (Partition == 44 /* TargetOpcode::G_ZEXT */) {
3250 // Leaf name: zext_trunc_fold
3251 // Rule: zext_trunc_fold
3252 if (!RuleConfig->isRuleDisabled(54)) {
3253 if (1
3254 && [&]() {
3255 return Helper.matchCombineZextTrunc(*MIs[0], MatchData54);
3256 return true;
3257 }() ) {
3258 LLVM_DEBUG(dbgs() << "Applying rule 'zext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'zext_trunc_fold'\n"
; } } while (false)
;
3259 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData54);
3260 return true;
3261 }
3262 }
3263 // Leaf name: ext_ext_fold
3264 // Rule: ext_ext_fold
3265 if (!RuleConfig->isRuleDisabled(58)) {
3266 if (1
3267 && [&]() {
3268 return Helper.matchCombineExtOfExt(*MIs[0], MatchData58);
3269 return true;
3270 }() ) {
3271 LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n"
; } } while (false)
;
3272 Helper.applyCombineExtOfExt(*MIs[0], MatchData58);
3273 return true;
3274 }
3275 }
3276 return false;
3277 }
3278 if (Partition == 45 /* TargetOpcode::G_ICMP */) {
3279 // Leaf name: icmp_to_true_false_known_bits
3280 // Rule: icmp_to_true_false_known_bits
3281 if (!RuleConfig->isRuleDisabled(55)) {
3282 if (1
3283 && [&]() {
3284 return Helper.matchICmpToTrueFalseKnownBits(*MIs[0], MatchData55);
3285 return true;
3286 }() ) {
3287 LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n"
; } } while (false)
;
3288 Helper.replaceInstWithConstant(*MIs[0], MatchData55);
3289 return true;
3290 }
3291 }
3292 // Leaf name: icmp_to_lhs_known_bits
3293 // Rule: icmp_to_lhs_known_bits
3294 if (!RuleConfig->isRuleDisabled(56)) {
3295 if (1
3296 && [&]() {
3297 return Helper.matchICmpToLHSKnownBits(*MIs[0], MatchData56);
3298 return true;
3299 }() ) {
3300 LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n"
; } } while (false)
;
3301 Helper.applyBuildFn(*MIs[0], MatchData56);
3302 return true;
3303 }
3304 }
3305 // Leaf name: redundant_binop_in_equality
3306 // Rule: redundant_binop_in_equality
3307 if (!RuleConfig->isRuleDisabled(107)) {
3308 if (1
3309 && [&]() {
3310 return Helper.matchRedundantBinOpInEquality(*MIs[0], MatchData107);
3311 return true;
3312 }() ) {
3313 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_binop_in_equality'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_binop_in_equality'\n"
; } } while (false)
;
3314 Helper.applyBuildFn(*MIs[0], MatchData107);
3315 return true;
3316 }
3317 }
3318 // Leaf name: icmp_redundant_trunc
3319 // Rule: icmp_redundant_trunc
3320 if (!RuleConfig->isRuleDisabled(111)) {
3321 if (1
3322 && [&]() {
3323 return matchICmpRedundantTrunc(*MIs[0], MRI, Helper.getKnownBits(), MatchData111);
3324 return true;
3325 }() ) {
3326 LLVM_DEBUG(dbgs() << "Applying rule 'icmp_redundant_trunc'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'icmp_redundant_trunc'\n"
; } } while (false)
;
3327 applyICmpRedundantTrunc(*MIs[0], MRI, B, Observer, MatchData111);
3328 return true;
3329 }
3330 }
3331 return false;
3332 }
3333 if (Partition == 46 /* TargetOpcode::G_SEXT */) {
3334 // Leaf name: ext_ext_fold
3335 // Rule: ext_ext_fold
3336 if (!RuleConfig->isRuleDisabled(58)) {
3337 if (1
3338 && [&]() {
3339 return Helper.matchCombineExtOfExt(*MIs[0], MatchData58);
3340 return true;
3341 }() ) {
3342 LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n"
; } } while (false)
;
3343 Helper.applyCombineExtOfExt(*MIs[0], MatchData58);
3344 return true;
3345 }
3346 }
3347 return false;
3348 }
3349 if (Partition == 47 /* TargetOpcode::G_BR */) {
3350 // Leaf name: opt_brcond_by_inverting_cond
3351 // Rule: opt_brcond_by_inverting_cond
3352 if (!RuleConfig->isRuleDisabled(60)) {
3353 if (1
3354 && [&]() {
3355 return Helper.matchOptBrCondByInvertingCond(*MIs[0], MatchData60);
3356 return true;
3357 }() ) {
3358 LLVM_DEBUG(dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n"
; } } while (false)
;
3359 Helper.applyOptBrCondByInvertingCond(*MIs[0], MatchData60);
3360 return true;
3361 }
3362 }
3363 return false;
3364 }
3365 if (Partition == 48 /* TargetOpcode::G_MERGE_VALUES */) {
3366 // Leaf name: merge_unmerge
3367 // Rule: merge_unmerge
3368 if (!RuleConfig->isRuleDisabled(65)) {
3369 if (1
3370 && [&]() {
3371 return Helper.matchCombineMergeUnmerge(*MIs[0], MatchData65);
3372 return true;
3373 }() ) {
3374 LLVM_DEBUG(dbgs() << "Applying rule 'merge_unmerge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'merge_unmerge'\n"
; } } while (false)
;
3375 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData65);
3376 return true;
3377 }
3378 }
3379 return false;
3380 }
3381 if (Partition == 49 /* TargetOpcode::G_FPTRUNC */) {
3382 // Leaf name: constant_fp_op
3383 // Rule: constant_fp_op
3384 if (!RuleConfig->isRuleDisabled(68)) {
3385 if (1
3386 && [&]() {
3387 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3388 return true;
3389 }() ) {
3390 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3391 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3392 return true;
3393 }
3394 }
3395 return false;
3396 }
3397 if (Partition == 50 /* TargetOpcode::G_FSQRT */) {
3398 // Leaf name: constant_fp_op
3399 // Rule: constant_fp_op
3400 if (!RuleConfig->isRuleDisabled(68)) {
3401 if (1
3402 && [&]() {
3403 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3404 return true;
3405 }() ) {
3406 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3407 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3408 return true;
3409 }
3410 }
3411 return false;
3412 }
3413 if (Partition == 51 /* TargetOpcode::G_FLOG2 */) {
3414 // Leaf name: constant_fp_op
3415 // Rule: constant_fp_op
3416 if (!RuleConfig->isRuleDisabled(68)) {
3417 if (1
3418 && [&]() {
3419 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3420 return true;
3421 }() ) {
3422 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3423 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68);
3424 return true;
3425 }
3426 }
3427 return false;
3428 }
3429 if (Partition == 52 /* TargetOpcode::G_UMULO */) {
3430 // Leaf name: mulo_by_2
3431 // Rule: mulo_by_2
3432 if (!RuleConfig->isRuleDisabled(71)) {
3433 if (1
3434 && [&]() {
3435 return Helper.matchMulOBy2(*MIs[0], MatchData71);
3436 return true;
3437 }() ) {
3438 LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n"
; } } while (false)
;
3439 Helper.applyBuildFnNoErase(*MIs[0], MatchData71);
3440 return true;
3441 }
3442 }
3443 // Leaf name: mulo_by_0
3444 // Rule: mulo_by_0
3445 if (!RuleConfig->isRuleDisabled(72)) {
3446 if (1
3447 && [&]() {
3448 return Helper.matchMulOBy0(*MIs[0], MatchData72);
3449 return true;
3450 }() ) {
3451 LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n"
; } } while (false)
;
3452 Helper.applyBuildFn(*MIs[0], MatchData72);
3453 return true;
3454 }
3455 }
3456 return false;
3457 }
3458 if (Partition == 53 /* TargetOpcode::G_SMULO */) {
3459 // Leaf name: mulo_by_2
3460 // Rule: mulo_by_2
3461 if (!RuleConfig->isRuleDisabled(71)) {
3462 if (1
3463 && [&]() {
3464 return Helper.matchMulOBy2(*MIs[0], MatchData71);
3465 return true;
3466 }() ) {
3467 LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n"
; } } while (false)
;
3468 Helper.applyBuildFnNoErase(*MIs[0], MatchData71);
3469 return true;
3470 }
3471 }
3472 // Leaf name: mulo_by_0
3473 // Rule: mulo_by_0
3474 if (!RuleConfig->isRuleDisabled(72)) {
3475 if (1
3476 && [&]() {
3477 return Helper.matchMulOBy0(*MIs[0], MatchData72);
3478 return true;
3479 }() ) {
3480 LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n"
; } } while (false)
;
3481 Helper.applyBuildFn(*MIs[0], MatchData72);
3482 return true;
3483 }
3484 }
3485 return false;
3486 }
3487 if (Partition == 54 /* TargetOpcode::G_UADDO */) {
3488 // Leaf name: addo_by_0
3489 // Rule: addo_by_0
3490 if (!RuleConfig->isRuleDisabled(73)) {
3491 if (1
3492 && [&]() {
3493 return Helper.matchAddOBy0(*MIs[0], MatchData73);
3494 return true;
3495 }() ) {
3496 LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n"
; } } while (false)
;
3497 Helper.applyBuildFn(*MIs[0], MatchData73);
3498 return true;
3499 }
3500 }
3501 return false;
3502 }
3503 if (Partition == 55 /* TargetOpcode::G_SADDO */) {
3504 // Leaf name: addo_by_0
3505 // Rule: addo_by_0
3506 if (!RuleConfig->isRuleDisabled(73)) {
3507 if (1
3508 && [&]() {
3509 return Helper.matchAddOBy0(*MIs[0], MatchData73);
3510 return true;
3511 }() ) {
3512 LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n"
; } } while (false)
;
3513 Helper.applyBuildFn(*MIs[0], MatchData73);
3514 return true;
3515 }
3516 }
3517 return false;
3518 }
3519 if (Partition == 56 /* TargetOpcode::G_UADDE */) {
3520 // Leaf name: adde_to_addo
3521 // Rule: adde_to_addo
3522 if (!RuleConfig->isRuleDisabled(74)) {
3523 if (1
3524 && [&]() {
3525 return Helper.matchAddEToAddO(*MIs[0], MatchData74);
3526 return true;
3527 }() ) {
3528 LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n"
; } } while (false)
;
3529 Helper.applyBuildFnNoErase(*MIs[0], MatchData74);
3530 return true;
3531 }
3532 }
3533 return false;
3534 }
3535 if (Partition == 57 /* TargetOpcode::G_SADDE */) {
3536 // Leaf name: adde_to_addo
3537 // Rule: adde_to_addo
3538 if (!RuleConfig->isRuleDisabled(74)) {
3539 if (1
3540 && [&]() {
3541 return Helper.matchAddEToAddO(*MIs[0], MatchData74);
3542 return true;
3543 }() ) {
3544 LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n"
; } } while (false)
;
3545 Helper.applyBuildFnNoErase(*MIs[0], MatchData74);
3546 return true;
3547 }
3548 }
3549 return false;
3550 }
3551 if (Partition == 58 /* TargetOpcode::G_USUBE */) {
3552 // Leaf name: adde_to_addo
3553 // Rule: adde_to_addo
3554 if (!RuleConfig->isRuleDisabled(74)) {
3555 if (1
3556 && [&]() {
3557 return Helper.matchAddEToAddO(*MIs[0], MatchData74);
3558 return true;
3559 }() ) {
3560 LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n"
; } } while (false)
;
3561 Helper.applyBuildFnNoErase(*MIs[0], MatchData74);
3562 return true;
3563 }
3564 }
3565 return false;
3566 }
3567 if (Partition == 59 /* TargetOpcode::G_SSUBE */) {
3568 // Leaf name: adde_to_addo
3569 // Rule: adde_to_addo
3570 if (!RuleConfig->isRuleDisabled(74)) {
3571 if (1
3572 && [&]() {
3573 return Helper.matchAddEToAddO(*MIs[0], MatchData74);
3574 return true;
3575 }() ) {
3576 LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n"
; } } while (false)
;
3577 Helper.applyBuildFnNoErase(*MIs[0], MatchData74);
3578 return true;
3579 }
3580 }
3581 return false;
3582 }
3583 if (Partition == 60 /* TargetOpcode::G_FMINNUM */) {
3584 // Leaf name: combine_minmax_nan
3585 // Rule: combine_minmax_nan
3586 if (!RuleConfig->isRuleDisabled(75)) {
3587 if (1
3588 && [&]() {
3589 return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75);
3590 return true;
3591 }() ) {
3592 LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n"
; } } while (false)
;
3593 Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75);
3594 return true;
3595 }
3596 }
3597 // Leaf name: fold_binop_into_select
3598 // Rule: fold_binop_into_select
3599 if (!RuleConfig->isRuleDisabled(104)) {
3600 if (1
3601 && [&]() {
3602 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
3603 return true;
3604 }() ) {
3605 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
3606 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
3607 return true;
3608 }
3609 }
3610 return false;
3611 }
3612 if (Partition == 61 /* TargetOpcode::G_FMAXNUM */) {
3613 // Leaf name: combine_minmax_nan
3614 // Rule: combine_minmax_nan
3615 if (!RuleConfig->isRuleDisabled(75)) {
3616 if (1
3617 && [&]() {
3618 return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75);
3619 return true;
3620 }() ) {
3621 LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n"
; } } while (false)
;
3622 Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75);
3623 return true;
3624 }
3625 }
3626 // Leaf name: fold_binop_into_select
3627 // Rule: fold_binop_into_select
3628 if (!RuleConfig->isRuleDisabled(104)) {
3629 if (1
3630 && [&]() {
3631 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
3632 return true;
3633 }() ) {
3634 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
3635 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
3636 return true;
3637 }
3638 }
3639 return false;
3640 }
3641 if (Partition == 62 /* TargetOpcode::G_FMINIMUM */) {
3642 // Leaf name: combine_minmax_nan
3643 // Rule: combine_minmax_nan
3644 if (!RuleConfig->isRuleDisabled(75)) {
3645 if (1
3646 && [&]() {
3647 return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75);
3648 return true;
3649 }() ) {
3650 LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n"
; } } while (false)
;
3651 Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75);
3652 return true;
3653 }
3654 }
3655 // Leaf name: fold_binop_into_select
3656 // Rule: fold_binop_into_select
3657 if (!RuleConfig->isRuleDisabled(104)) {
3658 if (1
3659 && [&]() {
3660 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
3661 return true;
3662 }() ) {
3663 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
3664 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
3665 return true;
3666 }
3667 }
3668 return false;
3669 }
3670 if (Partition == 63 /* TargetOpcode::G_FMAXIMUM */) {
3671 // Leaf name: combine_minmax_nan
3672 // Rule: combine_minmax_nan
3673 if (!RuleConfig->isRuleDisabled(75)) {
3674 if (1
3675 && [&]() {
3676 return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75);
3677 return true;
3678 }() ) {
3679 LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n"
; } } while (false)
;
3680 Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75);
3681 return true;
3682 }
3683 }
3684 // Leaf name: fold_binop_into_select
3685 // Rule: fold_binop_into_select
3686 if (!RuleConfig->isRuleDisabled(104)) {
3687 if (1
3688 && [&]() {
3689 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
3690 return true;
3691 }() ) {
3692 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
3693 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
3694 return true;
3695 }
3696 }
3697 return false;
3698 }
3699 if (Partition == 64 /* TargetOpcode::G_SSHLSAT */) {
3700 // Leaf name: shift_immed_chain
3701 // Rule: shift_immed_chain
3702 if (!RuleConfig->isRuleDisabled(78)) {
3703 if (1
3704 && [&]() {
3705 return Helper.matchShiftImmedChain(*MIs[0], MatchData78);
3706 return true;
3707 }() ) {
3708 LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n"
; } } while (false)
;
3709 Helper.applyShiftImmedChain(*MIs[0], MatchData78);
3710 return true;
3711 }
3712 }
3713 // Leaf name: shift_of_shifted_logic_chain
3714 // Rule: shift_of_shifted_logic_chain
3715 if (!RuleConfig->isRuleDisabled(79)) {
3716 if (1
3717 && [&]() {
3718 return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79);
3719 return true;
3720 }() ) {
3721 LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n"
; } } while (false)
;
3722 Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79);
3723 return true;
3724 }
3725 }
3726 return false;
3727 }
3728 if (Partition == 65 /* TargetOpcode::G_USHLSAT */) {
3729 // Leaf name: shift_immed_chain
3730 // Rule: shift_immed_chain
3731 if (!RuleConfig->isRuleDisabled(78)) {
3732 if (1
3733 && [&]() {
3734 return Helper.matchShiftImmedChain(*MIs[0], MatchData78);
3735 return true;
3736 }() ) {
3737 LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n"
; } } while (false)
;
3738 Helper.applyShiftImmedChain(*MIs[0], MatchData78);
3739 return true;
3740 }
3741 }
3742 // Leaf name: shift_of_shifted_logic_chain
3743 // Rule: shift_of_shifted_logic_chain
3744 if (!RuleConfig->isRuleDisabled(79)) {
3745 if (1
3746 && [&]() {
3747 return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79);
3748 return true;
3749 }() ) {
3750 LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n"
; } } while (false)
;
3751 Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79);
3752 return true;
3753 }
3754 }
3755 return false;
3756 }
3757 if (Partition == 66 /* TargetOpcode::G_FSHL */) {
3758 // Leaf name: funnel_shift_to_rotate
3759 // Rule: funnel_shift_to_rotate
3760 if (!RuleConfig->isRuleDisabled(84)) {
3761 if (1
3762 && [&]() {
3763 return Helper.matchFunnelShiftToRotate(*MIs[0]);
3764 return true;
3765 }() ) {
3766 LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n"
; } } while (false)
;
3767 Helper.applyFunnelShiftToRotate(*MIs[0]);
3768 return true;
3769 }
3770 }
3771 return false;
3772 }
3773 if (Partition == 67 /* TargetOpcode::G_FSHR */) {
3774 // Leaf name: funnel_shift_to_rotate
3775 // Rule: funnel_shift_to_rotate
3776 if (!RuleConfig->isRuleDisabled(84)) {
3777 if (1
3778 && [&]() {
3779 return Helper.matchFunnelShiftToRotate(*MIs[0]);
3780 return true;
3781 }() ) {
3782 LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n"
; } } while (false)
;
3783 Helper.applyFunnelShiftToRotate(*MIs[0]);
3784 return true;
3785 }
3786 }
3787 return false;
3788 }
3789 if (Partition == 68 /* TargetOpcode::G_UMULH */) {
3790 // Leaf name: mulh_to_lshr
3791 // Rule: mulh_to_lshr
3792 if (!RuleConfig->isRuleDisabled(93)) {
3793 if (1
3794 && [&]() {
3795 return Helper.matchUMulHToLShr(*MIs[0]);
3796 return true;
3797 }() ) {
3798 LLVM_DEBUG(dbgs() << "Applying rule 'mulh_to_lshr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulh_to_lshr'\n"
; } } while (false)
;
3799 Helper.applyUMulHToLShr(*MIs[0]);
3800 return true;
3801 }
3802 }
3803 return false;
3804 }
3805 if (Partition == 69 /* TargetOpcode::G_FADD */) {
3806 // Leaf name: redundant_neg_operands
3807 // Rule: redundant_neg_operands
3808 if (!RuleConfig->isRuleDisabled(94)) {
3809 if (1
3810 && [&]() {
3811 return Helper.matchRedundantNegOperands(*MIs[0], MatchData94);
3812 return true;
3813 }() ) {
3814 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
3815 Helper.applyBuildFnNoErase(*MIs[0], MatchData94);
3816 return true;
3817 }
3818 }
3819 // Leaf name: combine_fadd_fmul_to_fmad_or_fma
3820 // Rule: combine_fadd_fmul_to_fmad_or_fma
3821 if (!RuleConfig->isRuleDisabled(96)) {
3822 if (1
3823 && [&]() {
3824 return Helper.matchCombineFAddFMulToFMadOrFMA(*MIs[0],
3825 MatchData96);
3826 return true;
3827 }() ) {
3828 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3829 Helper.applyBuildFn(*MIs[0], MatchData96);
3830 return true;
3831 }
3832 }
3833 // Leaf name: combine_fadd_fpext_fmul_to_fmad_or_fma
3834 // Rule: combine_fadd_fpext_fmul_to_fmad_or_fma
3835 if (!RuleConfig->isRuleDisabled(97)) {
3836 if (1
3837 && [&]() {
3838 return Helper.matchCombineFAddFpExtFMulToFMadOrFMA(*MIs[0],
3839 MatchData97);
3840 return true;
3841 }() ) {
3842 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3843 Helper.applyBuildFn(*MIs[0], MatchData97);
3844 return true;
3845 }
3846 }
3847 // Leaf name: combine_fadd_fma_fmul_to_fmad_or_fma
3848 // Rule: combine_fadd_fma_fmul_to_fmad_or_fma
3849 if (!RuleConfig->isRuleDisabled(98)) {
3850 if (1
3851 && [&]() {
3852 return Helper.matchCombineFAddFMAFMulToFMadOrFMA(*MIs[0],
3853 MatchData98);
3854 return true;
3855 }() ) {
3856 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3857 Helper.applyBuildFn(*MIs[0], MatchData98);
3858 return true;
3859 }
3860 }
3861 // Leaf name: combine_fadd_fpext_fma_fmul_to_fmad_or_fma
3862 // Rule: combine_fadd_fpext_fma_fmul_to_fmad_or_fma
3863 if (!RuleConfig->isRuleDisabled(99)) {
3864 if (1
3865 && [&]() {
3866 return Helper.matchCombineFAddFpExtFMulToFMadOrFMAAggressive(
3867 *MIs[0], MatchData99);
3868 return true;
3869 }() ) {
3870 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3871 Helper.applyBuildFn(*MIs[0], MatchData99);
3872 return true;
3873 }
3874 }
3875 // Leaf name: fold_binop_into_select
3876 // Rule: fold_binop_into_select
3877 if (!RuleConfig->isRuleDisabled(104)) {
3878 if (1
3879 && [&]() {
3880 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
3881 return true;
3882 }() ) {
3883 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
3884 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
3885 return true;
3886 }
3887 }
3888 return false;
3889 }
3890 if (Partition == 70 /* TargetOpcode::G_FSUB */) {
3891 // Leaf name: redundant_neg_operands
3892 // Rule: redundant_neg_operands
3893 if (!RuleConfig->isRuleDisabled(94)) {
3894 if (1
3895 && [&]() {
3896 return Helper.matchRedundantNegOperands(*MIs[0], MatchData94);
3897 return true;
3898 }() ) {
3899 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
3900 Helper.applyBuildFnNoErase(*MIs[0], MatchData94);
3901 return true;
3902 }
3903 }
3904 // Leaf name: combine_fsub_fmul_to_fmad_or_fma
3905 // Rule: combine_fsub_fmul_to_fmad_or_fma
3906 if (!RuleConfig->isRuleDisabled(100)) {
3907 if (1
3908 && [&]() {
3909 return Helper.matchCombineFSubFMulToFMadOrFMA(*MIs[0],
3910 MatchData100);
3911 return true;
3912 }() ) {
3913 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3914 Helper.applyBuildFn(*MIs[0], MatchData100);
3915 return true;
3916 }
3917 }
3918 // Leaf name: combine_fsub_fneg_fmul_to_fmad_or_fma
3919 // Rule: combine_fsub_fneg_fmul_to_fmad_or_fma
3920 if (!RuleConfig->isRuleDisabled(101)) {
3921 if (1
3922 && [&]() {
3923 return Helper.matchCombineFSubFNegFMulToFMadOrFMA(*MIs[0],
3924 MatchData101);
3925 return true;
3926 }() ) {
3927 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3928 Helper.applyBuildFn(*MIs[0], MatchData101);
3929 return true;
3930 }
3931 }
3932 // Leaf name: combine_fsub_fpext_fmul_to_fmad_or_fma
3933 // Rule: combine_fsub_fpext_fmul_to_fmad_or_fma
3934 if (!RuleConfig->isRuleDisabled(102)) {
3935 if (1
3936 && [&]() {
3937 return Helper.matchCombineFSubFpExtFMulToFMadOrFMA(*MIs[0],
3938 MatchData102);
3939 return true;
3940 }() ) {
3941 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3942 Helper.applyBuildFn(*MIs[0], MatchData102);
3943 return true;
3944 }
3945 }
3946 // Leaf name: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma
3947 // Rule: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma
3948 if (!RuleConfig->isRuleDisabled(103)) {
3949 if (1
3950 && [&]() {
3951 return Helper.matchCombineFSubFpExtFNegFMulToFMadOrFMA(
3952 *MIs[0], MatchData103);
3953 return true;
3954 }() ) {
3955 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3956 Helper.applyBuildFn(*MIs[0], MatchData103);
3957 return true;
3958 }
3959 }
3960 // Leaf name: fold_binop_into_select
3961 // Rule: fold_binop_into_select
3962 if (!RuleConfig->isRuleDisabled(104)) {
3963 if (1
3964 && [&]() {
3965 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
3966 return true;
3967 }() ) {
3968 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
3969 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
3970 return true;
3971 }
3972 }
3973 // Leaf name: fsub_to_fneg
3974 // Rule: fsub_to_fneg
3975 if (!RuleConfig->isRuleDisabled(108)) {
3976 if (1
3977 && [&]() {
3978 return Helper.matchFsubToFneg(*MIs[0], MatchData108);
3979 return true;
3980 }() ) {
3981 LLVM_DEBUG(dbgs() << "Applying rule 'fsub_to_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fsub_to_fneg'\n"
; } } while (false)
;
3982 Helper.applyFsubToFneg(*MIs[0], MatchData108);
3983 return true;
3984 }
3985 }
3986 return false;
3987 }
3988 if (Partition == 71 /* TargetOpcode::G_FMUL */) {
3989 // Leaf name: redundant_neg_operands
3990 // Rule: redundant_neg_operands
3991 if (!RuleConfig->isRuleDisabled(94)) {
3992 if (1
3993 && [&]() {
3994 return Helper.matchRedundantNegOperands(*MIs[0], MatchData94);
3995 return true;
3996 }() ) {
3997 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
3998 Helper.applyBuildFnNoErase(*MIs[0], MatchData94);
3999 return true;
4000 }
4001 }
4002 // Leaf name: fold_binop_into_select
4003 // Rule: fold_binop_into_select
4004 if (!RuleConfig->isRuleDisabled(104)) {
4005 if (1
4006 && [&]() {
4007 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
4008 return true;
4009 }() ) {
4010 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4011 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
4012 return true;
4013 }
4014 }
4015 return false;
4016 }
4017 if (Partition == 72 /* TargetOpcode::G_FDIV */) {
4018 // Leaf name: redundant_neg_operands
4019 // Rule: redundant_neg_operands
4020 if (!RuleConfig->isRuleDisabled(94)) {
4021 if (1
4022 && [&]() {
4023 return Helper.matchRedundantNegOperands(*MIs[0], MatchData94);
4024 return true;
4025 }() ) {
4026 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
4027 Helper.applyBuildFnNoErase(*MIs[0], MatchData94);
4028 return true;
4029 }
4030 }
4031 // Leaf name: fold_binop_into_select
4032 // Rule: fold_binop_into_select
4033 if (!RuleConfig->isRuleDisabled(104)) {
4034 if (1
4035 && [&]() {
4036 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
4037 return true;
4038 }() ) {
4039 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4040 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
4041 return true;
4042 }
4043 }
4044 return false;
4045 }
4046 if (Partition == 73 /* TargetOpcode::G_FMAD */) {
4047 // Leaf name: redundant_neg_operands
4048 // Rule: redundant_neg_operands
4049 if (!RuleConfig->isRuleDisabled(94)) {
4050 if (1
4051 && [&]() {
4052 return Helper.matchRedundantNegOperands(*MIs[0], MatchData94);
4053 return true;
4054 }() ) {
4055 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
4056 Helper.applyBuildFnNoErase(*MIs[0], MatchData94);
4057 return true;
4058 }
4059 }
4060 return false;
4061 }
4062 if (Partition == 74 /* TargetOpcode::G_FMA */) {
4063 // Leaf name: redundant_neg_operands
4064 // Rule: redundant_neg_operands
4065 if (!RuleConfig->isRuleDisabled(94)) {
4066 if (1
4067 && [&]() {
4068 return Helper.matchRedundantNegOperands(*MIs[0], MatchData94);
4069 return true;
4070 }() ) {
4071 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
4072 Helper.applyBuildFnNoErase(*MIs[0], MatchData94);
4073 return true;
4074 }
4075 }
4076 return false;
4077 }
4078 if (Partition == 75 /* TargetOpcode::G_SMIN */) {
4079 // Leaf name: fold_binop_into_select
4080 // Rule: fold_binop_into_select
4081 if (!RuleConfig->isRuleDisabled(104)) {
4082 if (1
4083 && [&]() {
4084 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
4085 return true;
4086 }() ) {
4087 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4088 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
4089 return true;
4090 }
4091 }
4092 return false;
4093 }
4094 if (Partition == 76 /* TargetOpcode::G_SMAX */) {
4095 // Leaf name: fold_binop_into_select
4096 // Rule: fold_binop_into_select
4097 if (!RuleConfig->isRuleDisabled(104)) {
4098 if (1
4099 && [&]() {
4100 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
4101 return true;
4102 }() ) {
4103 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4104 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
4105 return true;
4106 }
4107 }
4108 return false;
4109 }
4110 if (Partition == 77 /* TargetOpcode::G_UMIN */) {
4111 // Leaf name: fold_binop_into_select
4112 // Rule: fold_binop_into_select
4113 if (!RuleConfig->isRuleDisabled(104)) {
4114 if (1
4115 && [&]() {
4116 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
4117 return true;
4118 }() ) {
4119 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4120 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
4121 return true;
4122 }
4123 }
4124 return false;
4125 }
4126 if (Partition == 78 /* TargetOpcode::G_UMAX */) {
4127 // Leaf name: fold_binop_into_select
4128 // Rule: fold_binop_into_select
4129 if (!RuleConfig->isRuleDisabled(104)) {
4130 if (1
4131 && [&]() {
4132 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
4133 return true;
4134 }() ) {
4135 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4136 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
4137 return true;
4138 }
4139 }
4140 return false;
4141 }
4142 if (Partition == 79 /* TargetOpcode::G_FREM */) {
4143 // Leaf name: fold_binop_into_select
4144 // Rule: fold_binop_into_select
4145 if (!RuleConfig->isRuleDisabled(104)) {
4146 if (1
4147 && [&]() {
4148 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104);
4149 return true;
4150 }() ) {
4151 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4152 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104);
4153 return true;
4154 }
4155 }
4156 return false;
4157 }
4158 if (Partition == 80 /* TargetOpcode::G_FCONSTANT */) {
4159 // Leaf name: fconstant_to_constant
4160 // Rule: fconstant_to_constant
4161 if (!RuleConfig->isRuleDisabled(110)) {
4162 if (1
4163 && [&]() {
4164 return matchFConstantToConstant(*MIs[0], MRI);
4165 return true;
4166 }() ) {
4167 LLVM_DEBUG(dbgs() << "Applying rule 'fconstant_to_constant'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fconstant_to_constant'\n"
; } } while (false)
;
4168 applyFConstantToConstant(*MIs[0]);
4169 return true;
4170 }
4171 }
4172 return false;
4173 }
4174 if (Partition == 81 /* TargetOpcode::G_GLOBAL_VALUE */) {
4175 // Leaf name: fold_global_offset
4176 // Rule: fold_global_offset
4177 if (!RuleConfig->isRuleDisabled(112)) {
4178 if (1
4179 && [&]() {
4180 return matchFoldGlobalOffset(*MIs[0], MRI, MatchData112);
4181 return true;
4182 }() ) {
4183 LLVM_DEBUG(dbgs() << "Applying rule 'fold_global_offset'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_global_offset'\n"
; } } while (false)
;
4184 return applyFoldGlobalOffset(*MIs[0], MRI, B, Observer, MatchData112);
4185 return true;
4186 }
4187 }
4188 return false;
4189 }
4190
4191 return false;
4192}
4193#endif // ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP