Bug Summary

File:build/source/build-llvm/tools/clang/stage2-bins/lib/Target/AArch64/AArch64GenPreLegalizeGICombiner.inc
Warning:line 3110, column 7
Value stored to 'Partition' is never read

Annotated Source Code

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clang -cc1 -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name AArch64PreLegalizerCombiner.cpp -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -analyzer-config-compatibility-mode=true -mrelocation-model pic -pic-level 2 -mframe-pointer=none -fmath-errno -ffp-contract=on -fno-rounding-math -mconstructor-aliases -funwind-tables=2 -target-cpu x86-64 -tune-cpu generic -debugger-tuning=gdb -ffunction-sections -fdata-sections -fcoverage-compilation-dir=/build/source/build-llvm/tools/clang/stage2-bins -resource-dir /usr/lib/llvm-17/lib/clang/17 -D _DEBUG -D _GLIBCXX_ASSERTIONS -D _GNU_SOURCE -D _LIBCPP_ENABLE_ASSERTIONS -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I lib/Target/AArch64 -I /build/source/llvm/lib/Target/AArch64 -I include -I /build/source/llvm/include -D _FORTIFY_SOURCE=2 -D NDEBUG -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/c++/10 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/x86_64-linux-gnu/c++/10 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/c++/10/backward -internal-isystem /usr/lib/llvm-17/lib/clang/17/include -internal-isystem /usr/local/include -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../x86_64-linux-gnu/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -fmacro-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fmacro-prefix-map=/build/source/= -fcoverage-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fcoverage-prefix-map=/build/source/= -source-date-epoch 1683717183 -O2 -Wno-unused-command-line-argument -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-redundant-move -Wno-pessimizing-move -Wno-noexcept-type -Wno-comment -Wno-misleading-indentation -std=c++17 -fdeprecated-macro -fdebug-compilation-dir=/build/source/build-llvm/tools/clang/stage2-bins -fdebug-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fdebug-prefix-map=/build/source/= -ferror-limit 19 -fvisibility=hidden -fvisibility-inlines-hidden -stack-protector 2 -fgnuc-version=4.2.1 -fcolor-diagnostics -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -faddrsig -D__GCC_HAVE_DWARF2_CFI_ASM=1 -o /tmp/scan-build-2023-05-10-133810-16478-1 -x c++ /build/source/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Global Combiner *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
10#include "llvm/ADT/SparseBitVector.h"
11namespace llvm {
12extern cl::OptionCategory GICombinerOptionCategory;
13} // end namespace llvm
14#endif // ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
15
16#ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H
17class AArch64GenPreLegalizerCombinerHelperRuleConfig {
18 SparseBitVector<> DisabledRules;
19
20public:
21 bool parseCommandLineOption();
22 bool isRuleDisabled(unsigned ID) const;
23 bool setRuleEnabled(StringRef RuleIdentifier);
24 bool setRuleDisabled(StringRef RuleIdentifier);
25};
26
27class AArch64GenPreLegalizerCombinerHelper : public AArch64PreLegalizerCombinerHelperState {
28 const AArch64GenPreLegalizerCombinerHelperRuleConfig *RuleConfig;
29
30public:
31 template <typename... Args>AArch64GenPreLegalizerCombinerHelper(const AArch64GenPreLegalizerCombinerHelperRuleConfig &RuleConfig, Args &&... args) : AArch64PreLegalizerCombinerHelperState(std::forward<Args>(args)...), RuleConfig(&RuleConfig) {}
32
33 bool tryCombineAll(
34 GISelChangeObserver &Observer,
35 MachineInstr &MI,
36 MachineIRBuilder &B) const;
37};
38
39static std::optional<uint64_t> getRuleIdxForIdentifier(StringRef RuleIdentifier) {
40 uint64_t I;
41 // getAtInteger(...) returns false on success
42 bool Parsed = !RuleIdentifier.getAsInteger(0, I);
43 if (Parsed)
44 return I;
45
46#ifndef NDEBUG
47 switch (RuleIdentifier.size()) {
48 default: break;
49 case 9: // 4 strings to match.
50 switch (RuleIdentifier[0]) {
51 default: break;
52 case 'a': // 1 string to match.
53 if (memcmp(RuleIdentifier.data()+1, "ddo_by_0", 8) != 0)
54 break;
55 return 75; // "addo_by_0"
56 case 'c': // 1 string to match.
57 if (memcmp(RuleIdentifier.data()+1, "opy_prop", 8) != 0)
58 break;
59 return 0; // "copy_prop"
60 case 'm': // 2 strings to match.
61 if (memcmp(RuleIdentifier.data()+1, "ulo_by_", 7) != 0)
62 break;
63 switch (RuleIdentifier[8]) {
64 default: break;
65 case '0': // 1 string to match.
66 return 74; // "mulo_by_0"
67 case '2': // 1 string to match.
68 return 73; // "mulo_by_2"
69 }
70 break;
71 }
72 break;
73 case 10: // 3 strings to match.
74 switch (RuleIdentifier[0]) {
75 default: break;
76 case 'i': // 1 string to match.
77 if (memcmp(RuleIdentifier.data()+1, "2p_to_p2i", 9) != 0)
78 break;
79 return 29; // "i2p_to_p2i"
80 case 'm': // 1 string to match.
81 if (memcmp(RuleIdentifier.data()+1, "ul_to_shl", 9) != 0)
82 break;
83 return 1; // "mul_to_shl"
84 case 'p': // 1 string to match.
85 if (memcmp(RuleIdentifier.data()+1, "2i_to_i2p", 9) != 0)
86 break;
87 return 28; // "p2i_to_i2p"
88 }
89 break;
90 case 11: // 4 strings to match.
91 switch (RuleIdentifier[0]) {
92 default: break;
93 case 'a': // 1 string to match.
94 if (memcmp(RuleIdentifier.data()+1, "dd_sub_reg", 10) != 0)
95 break;
96 return 33; // "add_sub_reg"
97 case 's': // 1 string to match.
98 if (memcmp(RuleIdentifier.data()+1, "ub_add_reg", 10) != 0)
99 break;
100 return 107; // "sub_add_reg"
101 case 't': // 1 string to match.
102 if (memcmp(RuleIdentifier.data()+1, "runc_shift", 10) != 0)
103 break;
104 return 69; // "trunc_shift"
105 case 'u': // 1 string to match.
106 if (memcmp(RuleIdentifier.data()+1, "nmerge_cst", 10) != 0)
107 break;
108 return 64; // "unmerge_cst"
109 }
110 break;
111 case 12: // 6 strings to match.
112 switch (RuleIdentifier[0]) {
113 default: break;
114 case 'a': // 1 string to match.
115 if (memcmp(RuleIdentifier.data()+1, "dde_to_addo", 11) != 0)
116 break;
117 return 76; // "adde_to_addo"
118 case 'e': // 1 string to match.
119 if (memcmp(RuleIdentifier.data()+1, "xt_ext_fold", 11) != 0)
120 break;
121 return 60; // "ext_ext_fold"
122 case 'f': // 1 string to match.
123 if (memcmp(RuleIdentifier.data()+1, "sub_to_fneg", 11) != 0)
124 break;
125 return 110; // "fsub_to_fneg"
126 case 'm': // 1 string to match.
127 if (memcmp(RuleIdentifier.data()+1, "ulh_to_lshr", 11) != 0)
128 break;
129 return 95; // "mulh_to_lshr"
130 case 'n': // 1 string to match.
131 if (memcmp(RuleIdentifier.data()+1, "ot_cmp_fold", 11) != 0)
132 break;
133 return 61; // "not_cmp_fold"
134 case 'r': // 1 string to match.
135 if (memcmp(RuleIdentifier.data()+1, "edundant_or", 11) != 0)
136 break;
137 return 54; // "redundant_or"
138 }
139 break;
140 case 13: // 9 strings to match.
141 switch (RuleIdentifier[0]) {
142 default: break;
143 case 'c': // 2 strings to match.
144 if (RuleIdentifier[1] != 'o')
145 break;
146 switch (RuleIdentifier[2]) {
147 default: break;
148 case 'm': // 1 string to match.
149 if (memcmp(RuleIdentifier.data()+3, "mute_shift", 10) != 0)
150 break;
151 return 86; // "commute_shift"
152 case 'n': // 1 string to match.
153 if (memcmp(RuleIdentifier.data()+3, "stant_fold", 10) != 0)
154 break;
155 return 91; // "constant_fold"
156 }
157 break;
158 case 'l': // 1 string to match.
159 if (memcmp(RuleIdentifier.data()+1, "oad_and_mask", 12) != 0)
160 break;
161 return 9; // "load_and_mask"
162 case 'm': // 1 string to match.
163 if (memcmp(RuleIdentifier.data()+1, "erge_unmerge", 12) != 0)
164 break;
165 return 67; // "merge_unmerge"
166 case 'r': // 1 string to match.
167 if (memcmp(RuleIdentifier.data()+1, "edundant_and", 12) != 0)
168 break;
169 return 52; // "redundant_and"
170 case 's': // 1 string to match.
171 if (memcmp(RuleIdentifier.data()+1, "div_by_const", 12) != 0)
172 break;
173 return 94; // "sdiv_by_const"
174 case 'u': // 3 strings to match.
175 switch (RuleIdentifier[1]) {
176 default: break;
177 case 'd': // 1 string to match.
178 if (memcmp(RuleIdentifier.data()+2, "iv_by_const", 11) != 0)
179 break;
180 return 93; // "udiv_by_const"
181 case 'n': // 2 strings to match.
182 if (memcmp(RuleIdentifier.data()+2, "merge_", 6) != 0)
183 break;
184 switch (RuleIdentifier[8]) {
185 default: break;
186 case 'm': // 1 string to match.
187 if (memcmp(RuleIdentifier.data()+9, "erge", 4) != 0)
188 break;
189 return 63; // "unmerge_merge"
190 case 'u': // 1 string to match.
191 if (memcmp(RuleIdentifier.data()+9, "ndef", 4) != 0)
192 break;
193 return 21; // "unmerge_undef"
194 }
195 break;
196 }
197 break;
198 }
199 break;
200 case 14: // 8 strings to match.
201 switch (RuleIdentifier[0]) {
202 default: break;
203 case 'b': // 1 string to match.
204 if (memcmp(RuleIdentifier.data()+1, "inop_same_val", 13) != 0)
205 break;
206 return 25; // "binop_same_val"
207 case 'c': // 1 string to match.
208 if (memcmp(RuleIdentifier.data()+1, "onstant_fp_op", 13) != 0)
209 break;
210 return 70; // "constant_fp_op"
211 case 'f': // 2 strings to match.
212 switch (RuleIdentifier[1]) {
213 default: break;
214 case 'a': // 1 string to match.
215 if (memcmp(RuleIdentifier.data()+2, "bs_fneg_fold", 12) != 0)
216 break;
217 return 92; // "fabs_fneg_fold"
218 case 'n': // 1 string to match.
219 if (memcmp(RuleIdentifier.data()+2, "eg_fneg_fold", 12) != 0)
220 break;
221 return 31; // "fneg_fneg_fold"
222 }
223 break;
224 case 'm': // 1 string to match.
225 if (memcmp(RuleIdentifier.data()+1, "ul_by_neg_one", 13) != 0)
226 break;
227 return 3; // "mul_by_neg_one"
228 case 'r': // 1 string to match.
229 if (memcmp(RuleIdentifier.data()+1, "eassoc_ptradd", 13) != 0)
230 break;
231 return 43; // "reassoc_ptradd"
232 case 's': // 1 string to match.
233 if (memcmp(RuleIdentifier.data()+1, "hifts_too_big", 13) != 0)
234 break;
235 return 42; // "shifts_too_big"
236 case 't': // 1 string to match.
237 if (memcmp(RuleIdentifier.data()+1, "runc_ext_fold", 13) != 0)
238 break;
239 return 68; // "trunc_ext_fold"
240 }
241 break;
242 case 15: // 6 strings to match.
243 switch (RuleIdentifier[0]) {
244 default: break;
245 case 'e': // 1 string to match.
246 if (memcmp(RuleIdentifier.data()+1, "xtending_loads", 14) != 0)
247 break;
248 return 8; // "extending_loads"
249 case 'i': // 1 string to match.
250 if (memcmp(RuleIdentifier.data()+1, "dempotent_prop", 14) != 0)
251 break;
252 return 4; // "idempotent_prop"
253 case 'l': // 1 string to match.
254 if (memcmp(RuleIdentifier.data()+1, "oad_or_combine", 14) != 0)
255 break;
256 return 82; // "load_or_combine"
257 case 'o': // 1 string to match.
258 if (memcmp(RuleIdentifier.data()+1, "verlapping_and", 14) != 0)
259 break;
260 return 72; // "overlapping_and"
261 case 's': // 1 string to match.
262 if (memcmp(RuleIdentifier.data()+1, "elect_same_val", 14) != 0)
263 break;
264 return 23; // "select_same_val"
265 case 'z': // 1 string to match.
266 if (memcmp(RuleIdentifier.data()+1, "ext_trunc_fold", 14) != 0)
267 break;
268 return 56; // "zext_trunc_fold"
269 }
270 break;
271 case 16: // 3 strings to match.
272 switch (RuleIdentifier[0]) {
273 default: break;
274 case 's': // 2 strings to match.
275 if (memcmp(RuleIdentifier.data()+1, "elect_", 6) != 0)
276 break;
277 switch (RuleIdentifier[7]) {
278 default: break;
279 case 't': // 1 string to match.
280 if (memcmp(RuleIdentifier.data()+8, "o_minmax", 8) != 0)
281 break;
282 return 108; // "select_to_minmax"
283 case 'u': // 1 string to match.
284 if (memcmp(RuleIdentifier.data()+8, "ndef_cmp", 8) != 0)
285 break;
286 return 49; // "select_undef_cmp"
287 }
288 break;
289 case 'u': // 1 string to match.
290 if (memcmp(RuleIdentifier.data()+1, "ndef_to_fp_zero", 15) != 0)
291 break;
292 return 11; // "undef_to_fp_zero"
293 }
294 break;
295 case 17: // 9 strings to match.
296 switch (RuleIdentifier[0]) {
297 default: break;
298 case 'a': // 2 strings to match.
299 switch (RuleIdentifier[1]) {
300 default: break;
301 case 'd': // 1 string to match.
302 if (memcmp(RuleIdentifier.data()+2, "d_p2i_to_ptradd", 15) != 0)
303 break;
304 return 2; // "add_p2i_to_ptradd"
305 case 'n': // 1 string to match.
306 if (memcmp(RuleIdentifier.data()+2, "yext_trunc_fold", 15) != 0)
307 break;
308 return 30; // "anyext_trunc_fold"
309 }
310 break;
311 case 'd': // 1 string to match.
312 if (memcmp(RuleIdentifier.data()+1, "iv_rem_to_divrem", 16) != 0)
313 break;
314 return 83; // "div_rem_to_divrem"
315 case 'e': // 1 string to match.
316 if (memcmp(RuleIdentifier.data()+1, "rase_undef_store", 16) != 0)
317 break;
318 return 20; // "erase_undef_store"
319 case 'p': // 1 string to match.
320 if (memcmp(RuleIdentifier.data()+1, "tr_add_with_zero", 16) != 0)
321 break;
322 return 79; // "ptr_add_with_zero"
323 case 's': // 2 strings to match.
324 switch (RuleIdentifier[1]) {
325 default: break;
326 case 'e': // 1 string to match.
327 if (memcmp(RuleIdentifier.data()+2, "lect_to_logical", 15) != 0)
328 break;
329 return 51; // "select_to_logical"
330 case 'h': // 1 string to match.
331 if (memcmp(RuleIdentifier.data()+2, "ift_immed_chain", 15) != 0)
332 break;
333 return 80; // "shift_immed_chain"
334 }
335 break;
336 case 'u': // 2 strings to match.
337 switch (RuleIdentifier[1]) {
338 default: break;
339 case 'n': // 1 string to match.
340 if (memcmp(RuleIdentifier.data()+2, "def_to_int_zero", 15) != 0)
341 break;
342 return 12; // "undef_to_int_zero"
343 case 'r': // 1 string to match.
344 if (memcmp(RuleIdentifier.data()+2, "em_pow2_to_mask", 15) != 0)
345 break;
346 return 55; // "urem_pow2_to_mask"
347 }
348 break;
349 }
350 break;
351 case 18: // 6 strings to match.
352 switch (RuleIdentifier[0]) {
353 default: break;
354 case 'b': // 1 string to match.
355 if (memcmp(RuleIdentifier.data()+1, "inop_left_to_zero", 17) != 0)
356 break;
357 return 26; // "binop_left_to_zero"
358 case 'c': // 1 string to match.
359 if (memcmp(RuleIdentifier.data()+1, "ombine_minmax_nan", 17) != 0)
360 break;
361 return 77; // "combine_minmax_nan"
362 case 'f': // 2 strings to match.
363 switch (RuleIdentifier[1]) {
364 default: break;
365 case 'o': // 1 string to match.
366 if (memcmp(RuleIdentifier.data()+2, "ld_global_offset", 16) != 0)
367 break;
368 return 114; // "fold_global_offset"
369 case 'p': // 1 string to match.
370 if (memcmp(RuleIdentifier.data()+2, "trunc_fpext_fold", 16) != 0)
371 break;
372 return 38; // "fptrunc_fpext_fold"
373 }
374 break;
375 case 'r': // 1 string to match.
376 if (memcmp(RuleIdentifier.data()+1, "ight_identity_one", 17) != 0)
377 break;
378 return 32; // "right_identity_one"
379 case 's': // 1 string to match.
380 if (memcmp(RuleIdentifier.data()+1, "ext_inreg_of_load", 17) != 0)
381 break;
382 return 46; // "sext_inreg_of_load"
383 }
384 break;
385 case 19: // 8 strings to match.
386 switch (RuleIdentifier[0]) {
387 default: break;
388 case 'b': // 1 string to match.
389 if (memcmp(RuleIdentifier.data()+1, "inop_right_to_zero", 18) != 0)
390 break;
391 return 27; // "binop_right_to_zero"
392 case 'c': // 1 string to match.
393 if (memcmp(RuleIdentifier.data()+1, "onst_ptradd_to_i2p", 18) != 0)
394 break;
395 return 71; // "const_ptradd_to_i2p"
396 case 'e': // 1 string to match.
397 if (memcmp(RuleIdentifier.data()+1, "xtend_through_phis", 18) != 0)
398 break;
399 return 39; // "extend_through_phis"
400 case 'p': // 1 string to match.
401 if (memcmp(RuleIdentifier.data()+1, "tr_add_immed_chain", 18) != 0)
402 break;
403 return 44; // "ptr_add_immed_chain"
404 case 'r': // 1 string to match.
405 if (memcmp(RuleIdentifier.data()+1, "ight_identity_zero", 18) != 0)
406 break;
407 return 24; // "right_identity_zero"
408 case 's': // 2 strings to match.
409 switch (RuleIdentifier[1]) {
410 default: break;
411 case 'e': // 1 string to match.
412 if (memcmp(RuleIdentifier.data()+2, "lect_constant_cmp", 17) != 0)
413 break;
414 return 50; // "select_constant_cmp"
415 case 'i': // 1 string to match.
416 if (memcmp(RuleIdentifier.data()+2, "mplify_add_to_sub", 17) != 0)
417 break;
418 return 40; // "simplify_add_to_sub"
419 }
420 break;
421 case 'u': // 1 string to match.
422 if (memcmp(RuleIdentifier.data()+1, "nary_undef_to_zero", 18) != 0)
423 break;
424 return 16; // "unary_undef_to_zero"
425 }
426 break;
427 case 20: // 6 strings to match.
428 switch (RuleIdentifier[0]) {
429 default: break;
430 case 'a': // 1 string to match.
431 if (memcmp(RuleIdentifier.data()+1, "nd_or_disjoint_mask", 19) != 0)
432 break;
433 return 97; // "and_or_disjoint_mask"
434 case 'b': // 1 string to match.
435 if (memcmp(RuleIdentifier.data()+1, "itcast_bitcast_fold", 19) != 0)
436 break;
437 return 37; // "bitcast_bitcast_fold"
438 case 'i': // 1 string to match.
439 if (memcmp(RuleIdentifier.data()+1, "cmp_redundant_trunc", 19) != 0)
440 break;
441 return 113; // "icmp_redundant_trunc"
442 case 'r': // 2 strings to match.
443 if (memcmp(RuleIdentifier.data()+1, "edu", 3) != 0)
444 break;
445 switch (RuleIdentifier[4]) {
446 default: break;
447 case 'c': // 1 string to match.
448 if (memcmp(RuleIdentifier.data()+5, "e_shl_of_extend", 15) != 0)
449 break;
450 return 47; // "reduce_shl_of_extend"
451 case 'n': // 1 string to match.
452 if (memcmp(RuleIdentifier.data()+5, "dant_sext_inreg", 15) != 0)
453 break;
454 return 53; // "redundant_sext_inreg"
455 }
456 break;
457 case 'u': // 1 string to match.
458 if (memcmp(RuleIdentifier.data()+1, "nmerge_zext_to_zext", 19) != 0)
459 break;
460 return 66; // "unmerge_zext_to_zext"
461 }
462 break;
463 case 21: // 3 strings to match.
464 switch (RuleIdentifier[0]) {
465 default: break;
466 case 'f': // 1 string to match.
467 if (memcmp(RuleIdentifier.data()+1, "constant_to_constant", 20) != 0)
468 break;
469 return 112; // "fconstant_to_constant"
470 case 'u': // 2 strings to match.
471 if (RuleIdentifier[1] != 'n')
472 break;
473 switch (RuleIdentifier[2]) {
474 default: break;
475 case 'd': // 1 string to match.
476 if (memcmp(RuleIdentifier.data()+3, "ef_to_negative_one", 18) != 0)
477 break;
478 return 13; // "undef_to_negative_one"
479 case 'm': // 1 string to match.
480 if (memcmp(RuleIdentifier.data()+3, "erge_dead_to_trunc", 18) != 0)
481 break;
482 return 65; // "unmerge_dead_to_trunc"
483 }
484 break;
485 }
486 break;
487 case 22: // 7 strings to match.
488 switch (RuleIdentifier[0]) {
489 default: break;
490 case 'f': // 2 strings to match.
491 switch (RuleIdentifier[1]) {
492 default: break;
493 case 'o': // 1 string to match.
494 if (memcmp(RuleIdentifier.data()+2, "ld_binop_into_select", 20) != 0)
495 break;
496 return 106; // "fold_binop_into_select"
497 case 'u': // 1 string to match.
498 if (memcmp(RuleIdentifier.data()+2, "nnel_shift_to_rotate", 20) != 0)
499 break;
500 return 85; // "funnel_shift_to_rotate"
501 }
502 break;
503 case 'i': // 1 string to match.
504 if (memcmp(RuleIdentifier.data()+1, "cmp_to_lhs_known_bits", 21) != 0)
505 break;
506 return 58; // "icmp_to_lhs_known_bits"
507 case 'p': // 1 string to match.
508 if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_any_op", 21) != 0)
509 break;
510 return 17; // "propagate_undef_any_op"
511 case 'r': // 1 string to match.
512 if (memcmp(RuleIdentifier.data()+1, "edundant_neg_operands", 21) != 0)
513 break;
514 return 96; // "redundant_neg_operands"
515 case 's': // 1 string to match.
516 if (memcmp(RuleIdentifier.data()+1, "hl_ashr_to_sext_inreg", 21) != 0)
517 break;
518 return 45; // "shl_ashr_to_sext_inreg"
519 case 't': // 1 string to match.
520 if (memcmp(RuleIdentifier.data()+1, "runc_buildvector_fold", 21) != 0)
521 break;
522 return 35; // "trunc_buildvector_fold"
523 }
524 break;
525 case 23: // 2 strings to match.
526 switch (RuleIdentifier[0]) {
527 default: break;
528 case 'c': // 1 string to match.
529 if (memcmp(RuleIdentifier.data()+1, "ommute_constant_to_rhs", 22) != 0)
530 break;
531 return 111; // "commute_constant_to_rhs"
532 case 'p': // 1 string to match.
533 if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_all_ops", 22) != 0)
534 break;
535 return 18; // "propagate_undef_all_ops"
536 }
537 break;
538 case 24: // 4 strings to match.
539 switch (RuleIdentifier[0]) {
540 default: break;
541 case 'b': // 1 string to match.
542 if (memcmp(RuleIdentifier.data()+1, "inop_left_undef_to_zero", 23) != 0)
543 break;
544 return 14; // "binop_left_undef_to_zero"
545 case 'n': // 1 string to match.
546 if (memcmp(RuleIdentifier.data()+1, "arrow_binop_feeding_and", 23) != 0)
547 break;
548 return 48; // "narrow_binop_feeding_and"
549 case 's': // 1 string to match.
550 if (memcmp(RuleIdentifier.data()+1, "ext_inreg_to_zext_inreg", 23) != 0)
551 break;
552 return 59; // "sext_inreg_to_zext_inreg"
553 case 'x': // 1 string to match.
554 if (memcmp(RuleIdentifier.data()+1, "or_of_and_with_same_reg", 23) != 0)
555 break;
556 return 78; // "xor_of_and_with_same_reg"
557 }
558 break;
559 case 25: // 4 strings to match.
560 switch (RuleIdentifier[0]) {
561 default: break;
562 case 'b': // 3 strings to match.
563 switch (RuleIdentifier[1]) {
564 default: break;
565 case 'i': // 2 strings to match.
566 if (memcmp(RuleIdentifier.data()+2, "tfield_extract_from_", 20) != 0)
567 break;
568 switch (RuleIdentifier[22]) {
569 default: break;
570 case 'a': // 1 string to match.
571 if (memcmp(RuleIdentifier.data()+23, "nd", 2) != 0)
572 break;
573 return 88; // "bitfield_extract_from_and"
574 case 's': // 1 string to match.
575 if (memcmp(RuleIdentifier.data()+23, "hr", 2) != 0)
576 break;
577 return 89; // "bitfield_extract_from_shr"
578 }
579 break;
580 case 'u': // 1 string to match.
581 if (memcmp(RuleIdentifier.data()+2, "ildvector_identity_fold", 23) != 0)
582 break;
583 return 34; // "buildvector_identity_fold"
584 }
585 break;
586 case 'e': // 1 string to match.
587 if (memcmp(RuleIdentifier.data()+1, "xtract_vec_elt_build_vec", 24) != 0)
588 break;
589 return 6; // "extract_vec_elt_build_vec"
590 }
591 break;
592 case 26: // 3 strings to match.
593 switch (RuleIdentifier[0]) {
594 default: break;
595 case 'b': // 1 string to match.
596 if (memcmp(RuleIdentifier.data()+1, "inop_right_undef_to_undef", 25) != 0)
597 break;
598 return 15; // "binop_right_undef_to_undef"
599 case 'c': // 1 string to match.
600 if (memcmp(RuleIdentifier.data()+1, "ombine_indexed_load_store", 25) != 0)
601 break;
602 return 10; // "combine_indexed_load_store"
603 case 'f': // 1 string to match.
604 if (memcmp(RuleIdentifier.data()+1, "unnel_shift_from_or_shift", 25) != 0)
605 break;
606 return 84; // "funnel_shift_from_or_shift"
607 }
608 break;
609 case 27: // 2 strings to match.
610 switch (RuleIdentifier[0]) {
611 default: break;
612 case 'r': // 1 string to match.
613 if (memcmp(RuleIdentifier.data()+1, "edundant_binop_in_equality", 26) != 0)
614 break;
615 return 109; // "redundant_binop_in_equality"
616 case 't': // 1 string to match.
617 if (memcmp(RuleIdentifier.data()+1, "runc_lshr_buildvector_fold", 26) != 0)
618 break;
619 return 36; // "trunc_lshr_buildvector_fold"
620 }
621 break;
622 case 28: // 3 strings to match.
623 switch (RuleIdentifier[0]) {
624 default: break;
625 case 'o': // 1 string to match.
626 if (memcmp(RuleIdentifier.data()+1, "pt_brcond_by_inverting_cond", 27) != 0)
627 break;
628 return 62; // "opt_brcond_by_inverting_cond"
629 case 'p': // 1 string to match.
630 if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_shuffle_mask", 27) != 0)
631 break;
632 return 19; // "propagate_undef_shuffle_mask"
633 case 's': // 1 string to match.
634 if (memcmp(RuleIdentifier.data()+1, "hift_of_shifted_logic_chain", 27) != 0)
635 break;
636 return 81; // "shift_of_shifted_logic_chain"
637 }
638 break;
639 case 29: // 2 strings to match.
640 switch (RuleIdentifier[0]) {
641 default: break;
642 case 'b': // 1 string to match.
643 if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_shr_and", 28) != 0)
644 break;
645 return 90; // "bitfield_extract_from_shr_and"
646 case 'i': // 1 string to match.
647 if (memcmp(RuleIdentifier.data()+1, "cmp_to_true_false_known_bits", 28) != 0)
648 break;
649 return 57; // "icmp_to_true_false_known_bits"
650 }
651 break;
652 case 32: // 3 strings to match.
653 switch (RuleIdentifier[0]) {
654 default: break;
655 case 'b': // 1 string to match.
656 if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_sext_inreg", 31) != 0)
657 break;
658 return 87; // "bitfield_extract_from_sext_inreg"
659 case 'c': // 2 strings to match.
660 if (memcmp(RuleIdentifier.data()+1, "ombine_f", 8) != 0)
661 break;
662 switch (RuleIdentifier[9]) {
663 default: break;
664 case 'a': // 1 string to match.
665 if (memcmp(RuleIdentifier.data()+10, "dd_fmul_to_fmad_or_fma", 22) != 0)
666 break;
667 return 98; // "combine_fadd_fmul_to_fmad_or_fma"
668 case 's': // 1 string to match.
669 if (memcmp(RuleIdentifier.data()+10, "ub_fmul_to_fmad_or_fma", 22) != 0)
670 break;
671 return 102; // "combine_fsub_fmul_to_fmad_or_fma"
672 }
673 break;
674 }
675 break;
676 case 34: // 1 string to match.
677 if (memcmp(RuleIdentifier.data()+0, "extract_all_elts_from_build_vector", 34) != 0)
678 break;
679 return 7; // "extract_all_elts_from_build_vector"
680 case 36: // 3 strings to match.
681 switch (RuleIdentifier[0]) {
682 default: break;
683 case 'c': // 2 strings to match.
684 if (memcmp(RuleIdentifier.data()+1, "ombine_", 7) != 0)
685 break;
686 switch (RuleIdentifier[8]) {
687 default: break;
688 case 'f': // 1 string to match.
689 if (memcmp(RuleIdentifier.data()+9, "add_fma_fmul_to_fmad_or_fma", 27) != 0)
690 break;
691 return 100; // "combine_fadd_fma_fmul_to_fmad_or_fma"
692 case 'i': // 1 string to match.
693 if (memcmp(RuleIdentifier.data()+9, "nsert_vec_elts_build_vector", 27) != 0)
694 break;
695 return 5; // "combine_insert_vec_elts_build_vector"
696 }
697 break;
698 case 'i': // 1 string to match.
699 if (memcmp(RuleIdentifier.data()+1, "nsert_extract_vec_elt_out_of_bounds", 35) != 0)
700 break;
701 return 22; // "insert_extract_vec_elt_out_of_bounds"
702 }
703 break;
704 case 37: // 2 strings to match.
705 switch (RuleIdentifier[0]) {
706 default: break;
707 case 'c': // 1 string to match.
708 if (memcmp(RuleIdentifier.data()+1, "ombine_fsub_fneg_fmul_to_fmad_or_fma", 36) != 0)
709 break;
710 return 103; // "combine_fsub_fneg_fmul_to_fmad_or_fma"
711 case 'h': // 1 string to match.
712 if (memcmp(RuleIdentifier.data()+1, "oist_logic_op_with_same_opcode_hands", 36) != 0)
713 break;
714 return 41; // "hoist_logic_op_with_same_opcode_hands"
715 }
716 break;
717 case 38: // 2 strings to match.
718 if (memcmp(RuleIdentifier.data()+0, "combine_f", 9) != 0)
719 break;
720 switch (RuleIdentifier[9]) {
721 default: break;
722 case 'a': // 1 string to match.
723 if (memcmp(RuleIdentifier.data()+10, "dd_fpext_fmul_to_fmad_or_fma", 28) != 0)
724 break;
725 return 99; // "combine_fadd_fpext_fmul_to_fmad_or_fma"
726 case 's': // 1 string to match.
727 if (memcmp(RuleIdentifier.data()+10, "ub_fpext_fmul_to_fmad_or_fma", 28) != 0)
728 break;
729 return 104; // "combine_fsub_fpext_fmul_to_fmad_or_fma"
730 }
731 break;
732 case 42: // 1 string to match.
733 if (memcmp(RuleIdentifier.data()+0, "combine_fadd_fpext_fma_fmul_to_fmad_or_fma", 42) != 0)
734 break;
735 return 101; // "combine_fadd_fpext_fma_fmul_to_fmad_or_fma"
736 case 43: // 1 string to match.
737 if (memcmp(RuleIdentifier.data()+0, "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma", 43) != 0)
738 break;
739 return 105; // "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma"
740 }
741#endif // ifndef NDEBUG
742
743 return std::nullopt;
744}
745static std::optional<std::pair<uint64_t, uint64_t>> getRuleRangeForIdentifier(StringRef RuleIdentifier) {
746 std::pair<StringRef, StringRef> RangePair = RuleIdentifier.split('-');
747 if (!RangePair.second.empty()) {
748 const auto First = getRuleIdxForIdentifier(RangePair.first);
749 const auto Last = getRuleIdxForIdentifier(RangePair.second);
750 if (!First || !Last)
751 return std::nullopt;
752 if (First >= Last)
753 report_fatal_error("Beginning of range should be before end of range");
754 return {{*First, *Last + 1}};
755 }
756 if (RangePair.first == "*") {
757 return {{0, 115}};
758 }
759 const auto I = getRuleIdxForIdentifier(RangePair.first);
760 if (!I)
761 return std::nullopt;
762 return {{*I, *I + 1}};
763}
764
765bool AArch64GenPreLegalizerCombinerHelperRuleConfig::setRuleEnabled(StringRef RuleIdentifier) {
766 auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier);
767 if (!MaybeRange)
768 return false;
769 for (auto I = MaybeRange->first; I < MaybeRange->second; ++I)
770 DisabledRules.reset(I);
771 return true;
772}
773
774bool AArch64GenPreLegalizerCombinerHelperRuleConfig::setRuleDisabled(StringRef RuleIdentifier) {
775 auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier);
776 if (!MaybeRange)
777 return false;
778 for (auto I = MaybeRange->first; I < MaybeRange->second; ++I)
779 DisabledRules.set(I);
780 return true;
781}
782
783bool AArch64GenPreLegalizerCombinerHelperRuleConfig::isRuleDisabled(unsigned RuleID) const {
784 return DisabledRules.test(RuleID);
785}
786#endif // ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H
787
788#ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP
789
790std::vector<std::string> AArch64PreLegalizerCombinerHelperOption;
791cl::list<std::string> AArch64PreLegalizerCombinerHelperDisableOption(
792 "aarch64prelegalizercombinerhelper-disable-rule",
793 cl::desc("Disable one or more combiner rules temporarily in the AArch64PreLegalizerCombinerHelper pass"),
794 cl::CommaSeparated,
795 cl::Hidden,
796 cl::cat(GICombinerOptionCategory),
797 cl::callback([](const std::string &Str) {
798 AArch64PreLegalizerCombinerHelperOption.push_back(Str);
799 }));
800cl::list<std::string> AArch64PreLegalizerCombinerHelperOnlyEnableOption(
801 "aarch64prelegalizercombinerhelper-only-enable-rule",
802 cl::desc("Disable all rules in the AArch64PreLegalizerCombinerHelper pass then re-enable the specified ones"),
803 cl::Hidden,
804 cl::cat(GICombinerOptionCategory),
805 cl::callback([](const std::string &CommaSeparatedArg) {
806 StringRef Str = CommaSeparatedArg;
807 AArch64PreLegalizerCombinerHelperOption.push_back("*");
808 do {
809 auto X = Str.split(",");
810 AArch64PreLegalizerCombinerHelperOption.push_back(("!" + X.first).str());
811 Str = X.second;
812 } while (!Str.empty());
813 }));
814
815bool AArch64GenPreLegalizerCombinerHelperRuleConfig::parseCommandLineOption() {
816 for (StringRef Identifier : AArch64PreLegalizerCombinerHelperOption) {
817 bool Enabled = Identifier.consume_front("!");
818 if (Enabled && !setRuleEnabled(Identifier))
819 return false;
820 if (!Enabled && !setRuleDisabled(Identifier))
821 return false;
822 }
823 return true;
824}
825
826bool AArch64GenPreLegalizerCombinerHelper::tryCombineAll(
827 GISelChangeObserver &Observer,
828 MachineInstr &MI,
829 MachineIRBuilder &B) const {
830 MachineBasicBlock *MBB = MI.getParent();
831 MachineFunction *MF = MBB->getParent();
832 MachineRegisterInfo &MRI = MF->getRegInfo();
833 SmallVector<MachineInstr *, 8> MIs = {&MI};
834
835 (void)MBB; (void)MF; (void)MRI; (void)RuleConfig;
836
837 // Match data
838 unsigned MatchData1;
839 std::pair<Register, bool> MatchData2;
840 SmallVector<Register, 4> MatchData5;
841 Register MatchData6;
842 SmallVector<std::pair<Register, MachineInstr*>> MatchData7;
843 PreferredTuple MatchData8;
844 std::function<void(MachineIRBuilder &)> MatchData9;
845 IndexedLoadStoreMatchInfo MatchData10;
846 std::function<void(MachineIRBuilder &)> MatchData21;
847 Register MatchData28;
848 Register MatchData29;
849 Register MatchData30;
850 Register MatchData31;
851 Register MatchData33;
852 Register MatchData34;
853 Register MatchData35;
854 Register MatchData36;
855 MachineInstr* MatchData39;
856 std::tuple<Register, Register> MatchData40;
857 InstructionStepsMatchInfo MatchData41;
858 std::function<void(MachineIRBuilder &)> MatchData43;
859 PtrAddChain MatchData44;
860 std::tuple<Register, int64_t> MatchData45;
861 std::tuple<Register, unsigned> MatchData46;
862 RegisterImmPair MatchData47;
863 std::function<void(MachineIRBuilder &)> MatchData48;
864 unsigned MatchData50;
865 std::function<void(MachineIRBuilder &)> MatchData51;
866 Register MatchData52;
867 Register MatchData54;
868 Register MatchData56;
869 int64_t MatchData57;
870 std::function<void(MachineIRBuilder &)> MatchData58;
871 std::tuple<Register, unsigned> MatchData60;
872 SmallVector<Register, 4> MatchData61;
873 MachineInstr * MatchData62;
874 SmallVector<Register, 8> MatchData63;
875 SmallVector<APInt, 8> MatchData64;
876 Register MatchData67;
877 std::pair<Register, unsigned> MatchData68;
878 std::pair<MachineInstr*, LLT> MatchData69;
879 std::optional<APFloat> MatchData70;
880 APInt MatchData71;
881 std::function<void(MachineIRBuilder &)> MatchData72;
882 std::function<void(MachineIRBuilder &)> MatchData73;
883 std::function<void(MachineIRBuilder &)> MatchData74;
884 std::function<void(MachineIRBuilder &)> MatchData75;
885 std::function<void(MachineIRBuilder &)> MatchData76;
886 unsigned MatchData77;
887 std::pair<Register, Register> MatchData78;
888 RegisterImmPair MatchData80;
889 ShiftOfShiftedLogic MatchData81;
890 std::function<void(MachineIRBuilder &)> MatchData82;
891 MachineInstr * MatchData83;
892 std::function<void(MachineIRBuilder &)> MatchData84;
893 std::function<void(MachineIRBuilder &)> MatchData86;
894 std::function<void(MachineIRBuilder &)> MatchData87;
895 std::function<void(MachineIRBuilder &)> MatchData88;
896 std::function<void(MachineIRBuilder &)> MatchData89;
897 std::function<void(MachineIRBuilder &)> MatchData90;
898 APInt MatchData91;
899 std::function<void(MachineIRBuilder &)> MatchData92;
900 std::function<void(MachineIRBuilder &)> MatchData96;
901 std::function<void(MachineIRBuilder &)> MatchData97;
902 std::function<void(MachineIRBuilder &)> MatchData98;
903 std::function<void(MachineIRBuilder &)> MatchData99;
904 std::function<void(MachineIRBuilder &)> MatchData100;
905 std::function<void(MachineIRBuilder &)> MatchData101;
906 std::function<void(MachineIRBuilder &)> MatchData102;
907 std::function<void(MachineIRBuilder &)> MatchData103;
908 std::function<void(MachineIRBuilder &)> MatchData104;
909 std::function<void(MachineIRBuilder &)> MatchData105;
910 unsigned MatchData106;
911 std::function<void(MachineIRBuilder &)> MatchData107;
912 std::function<void(MachineIRBuilder &)> MatchData108;
913 std::function<void(MachineIRBuilder &)> MatchData109;
914 Register MatchData110;
915 Register MatchData113;
916 std::pair<uint64_t, uint64_t> MatchData114;
917
918 int Partition = -1;
919 Partition = -1;
920 switch (MIs[0]->getOpcode()) {
921 case TargetOpcode::COPY: Partition = 0; break;
922 case TargetOpcode::G_MUL: Partition = 1; break;
923 case TargetOpcode::G_ADD: Partition = 2; break;
924 case TargetOpcode::G_FREEZE: Partition = 3; break;
925 case TargetOpcode::G_FABS: Partition = 4; break;
926 case TargetOpcode::G_FCANONICALIZE: Partition = 5; break;
927 case TargetOpcode::G_INSERT_VECTOR_ELT: Partition = 6; break;
928 case TargetOpcode::G_EXTRACT_VECTOR_ELT: Partition = 7; break;
929 case TargetOpcode::G_BUILD_VECTOR: Partition = 8; break;
930 case TargetOpcode::G_LOAD: Partition = 9; break;
931 case TargetOpcode::G_SEXTLOAD: Partition = 10; break;
932 case TargetOpcode::G_ZEXTLOAD: Partition = 11; break;
933 case TargetOpcode::G_AND: Partition = 12; break;
934 case TargetOpcode::G_STORE: Partition = 13; break;
935 case TargetOpcode::G_UITOFP: Partition = 14; break;
936 case TargetOpcode::G_SITOFP: Partition = 15; break;
937 case TargetOpcode::G_OR: Partition = 16; break;
938 case TargetOpcode::G_SHL: Partition = 17; break;
939 case TargetOpcode::G_UDIV: Partition = 18; break;
940 case TargetOpcode::G_UREM: Partition = 19; break;
941 case TargetOpcode::G_ASHR: Partition = 20; break;
942 case TargetOpcode::G_LSHR: Partition = 21; break;
943 case TargetOpcode::G_ABS: Partition = 22; break;
944 case TargetOpcode::G_FPTOSI: Partition = 23; break;
945 case TargetOpcode::G_FPTOUI: Partition = 24; break;
946 case TargetOpcode::G_SUB: Partition = 25; break;
947 case TargetOpcode::G_XOR: Partition = 26; break;
948 case TargetOpcode::G_TRUNC: Partition = 27; break;
949 case TargetOpcode::G_SHUFFLE_VECTOR: Partition = 28; break;
950 case TargetOpcode::G_UNMERGE_VALUES: Partition = 29; break;
951 case TargetOpcode::G_SELECT: Partition = 30; break;
952 case TargetOpcode::G_PTR_ADD: Partition = 31; break;
953 case TargetOpcode::G_ROTL: Partition = 32; break;
954 case TargetOpcode::G_ROTR: Partition = 33; break;
955 case TargetOpcode::G_SDIV: Partition = 34; break;
956 case TargetOpcode::G_SREM: Partition = 35; break;
957 case TargetOpcode::G_INTTOPTR: Partition = 36; break;
958 case TargetOpcode::G_PTRTOINT: Partition = 37; break;
959 case TargetOpcode::G_ANYEXT: Partition = 38; break;
960 case TargetOpcode::G_FNEG: Partition = 39; break;
961 case TargetOpcode::G_BUILD_VECTOR_TRUNC: Partition = 40; break;
962 case TargetOpcode::G_BITCAST: Partition = 41; break;
963 case TargetOpcode::G_FPTRUNC: Partition = 42; break;
964 case TargetOpcode::G_PHI: Partition = 43; break;
965 case TargetOpcode::G_SEXT_INREG: Partition = 44; break;
966 case TargetOpcode::G_ZEXT: Partition = 45; break;
967 case TargetOpcode::G_ICMP: Partition = 46; break;
968 case TargetOpcode::G_SEXT: Partition = 47; break;
969 case TargetOpcode::G_BR: Partition = 48; break;
970 case TargetOpcode::G_MERGE_VALUES: Partition = 49; break;
971 case TargetOpcode::G_FSQRT: Partition = 50; break;
972 case TargetOpcode::G_FLOG2: Partition = 51; break;
973 case TargetOpcode::G_UMULO: Partition = 52; break;
974 case TargetOpcode::G_SMULO: Partition = 53; break;
975 case TargetOpcode::G_UADDO: Partition = 54; break;
976 case TargetOpcode::G_SADDO: Partition = 55; break;
977 case TargetOpcode::G_UADDE: Partition = 56; break;
978 case TargetOpcode::G_SADDE: Partition = 57; break;
979 case TargetOpcode::G_USUBE: Partition = 58; break;
980 case TargetOpcode::G_SSUBE: Partition = 59; break;
981 case TargetOpcode::G_FMINNUM: Partition = 60; break;
982 case TargetOpcode::G_FMAXNUM: Partition = 61; break;
983 case TargetOpcode::G_FMINIMUM: Partition = 62; break;
984 case TargetOpcode::G_FMAXIMUM: Partition = 63; break;
985 case TargetOpcode::G_SSHLSAT: Partition = 64; break;
986 case TargetOpcode::G_USHLSAT: Partition = 65; break;
987 case TargetOpcode::G_FSHL: Partition = 66; break;
988 case TargetOpcode::G_FSHR: Partition = 67; break;
989 case TargetOpcode::G_UMULH: Partition = 68; break;
990 case TargetOpcode::G_FADD: Partition = 69; break;
991 case TargetOpcode::G_FSUB: Partition = 70; break;
992 case TargetOpcode::G_FMUL: Partition = 71; break;
993 case TargetOpcode::G_FDIV: Partition = 72; break;
994 case TargetOpcode::G_FMAD: Partition = 73; break;
995 case TargetOpcode::G_FMA: Partition = 74; break;
996 case TargetOpcode::G_SMIN: Partition = 75; break;
997 case TargetOpcode::G_SMAX: Partition = 76; break;
998 case TargetOpcode::G_UMIN: Partition = 77; break;
999 case TargetOpcode::G_UMAX: Partition = 78; break;
1000 case TargetOpcode::G_FREM: Partition = 79; break;
1001 case TargetOpcode::G_FCONSTANT: Partition = 80; break;
1002 case TargetOpcode::G_GLOBAL_VALUE: Partition = 81; break;
1003 }
1004 // Default case but without conflicting with potential default case in selection.
1005 if (Partition == -1) return false;
1006 if (Partition == 0 /* TargetOpcode::COPY */) {
1007 // Leaf name: copy_prop
1008 // Rule: copy_prop
1009 if (!RuleConfig->isRuleDisabled(0)) {
1010 if (1
1011 && [&]() {
1012 return Helper.matchCombineCopy(*MIs[0]);
1013 return true;
1014 }() ) {
1015 LLVM_DEBUG(dbgs() << "Applying rule 'copy_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'copy_prop'\n"
; } } while (false)
;
1016 Helper.applyCombineCopy(*MIs[0]);
1017 return true;
1018 }
1019 }
1020 return false;
1021 }
1022 if (Partition == 1 /* TargetOpcode::G_MUL */) {
1023 // Leaf name: mul_to_shl
1024 // Rule: mul_to_shl
1025 if (!RuleConfig->isRuleDisabled(1)) {
1026 if (1
1027 && [&]() {
1028 return Helper.matchCombineMulToShl(*MIs[0], MatchData1);
1029 return true;
1030 }() ) {
1031 LLVM_DEBUG(dbgs() << "Applying rule 'mul_to_shl'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mul_to_shl'\n"
; } } while (false)
;
1032 Helper.applyCombineMulToShl(*MIs[0], MatchData1);
1033 return true;
1034 }
1035 }
1036 // Leaf name: mul_by_neg_one
1037 // Rule: mul_by_neg_one
1038 if (!RuleConfig->isRuleDisabled(3)) {
1039 if (1
1040 && [&]() {
1041 return Helper.matchConstantOp(MIs[0]->getOperand(2), -1);
1042 return true;
1043 }() ) {
1044 LLVM_DEBUG(dbgs() << "Applying rule 'mul_by_neg_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mul_by_neg_one'\n"
; } } while (false)
;
1045 Helper.applyCombineMulByNegativeOne(*MIs[0]);
1046 return true;
1047 }
1048 }
1049 // Leaf name: undef_to_int_zero
1050 // Rule: undef_to_int_zero
1051 if (!RuleConfig->isRuleDisabled(12)) {
1052 if (1
1053 && [&]() {
1054 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1055 return true;
1056 }() ) {
1057 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n"
; } } while (false)
;
1058 Helper.replaceInstWithConstant(*MIs[0], 0);
1059 return true;
1060 }
1061 }
1062 // Leaf name: binop_right_to_zero
1063 // Rule: binop_right_to_zero
1064 if (!RuleConfig->isRuleDisabled(27)) {
1065 if (1
1066 && [&]() {
1067 return Helper.matchOperandIsZero(*MIs[0], 2);
1068 return true;
1069 }() ) {
1070 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_to_zero'\n"
; } } while (false)
;
1071 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2);
1072 return true;
1073 }
1074 }
1075 // Leaf name: right_identity_one
1076 // Rule: right_identity_one
1077 if (!RuleConfig->isRuleDisabled(32)) {
1078 if (1
1079 && [&]() {
1080 return Helper.matchConstantOp(MIs[0]->getOperand(2), 1);
1081 return true;
1082 }() ) {
1083 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_one'\n"
; } } while (false)
;
1084 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1085 return true;
1086 }
1087 }
1088 // Leaf name: constant_fold
1089 // Rule: constant_fold
1090 if (!RuleConfig->isRuleDisabled(91)) {
1091 if (1
1092 && [&]() {
1093 return Helper.matchConstantFold(*MIs[0], MatchData91);
1094 return true;
1095 }() ) {
1096 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
1097 Helper.replaceInstWithConstant(*MIs[0], MatchData91);
1098 return true;
1099 }
1100 }
1101 // Leaf name: commute_constant_to_rhs
1102 // Rule: commute_constant_to_rhs
1103 if (!RuleConfig->isRuleDisabled(111)) {
1104 if (1
1105 && [&]() {
1106
1107 return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value();
1108
1109 return true;
1110 }() ) {
1111 LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n"
; } } while (false)
;
1112
1113 Observer.changingInstr(*MIs[0]);
1114 Register LHSReg = MIs[0]->getOperand(1).getReg();
1115 Register RHSReg = MIs[0]->getOperand(2).getReg();
1116 MIs[0]->getOperand(1).setReg(RHSReg);
1117 MIs[0]->getOperand(2).setReg(LHSReg);
1118 Observer.changedInstr(*MIs[0]);
1119
1120 return true;
1121 }
1122 }
1123 return false;
1124 }
1125 if (Partition == 2 /* TargetOpcode::G_ADD */) {
1126 // Leaf name: add_p2i_to_ptradd
1127 // Rule: add_p2i_to_ptradd
1128 if (!RuleConfig->isRuleDisabled(2)) {
1129 if (1
1130 && [&]() {
1131 return Helper.matchCombineAddP2IToPtrAdd(*MIs[0], MatchData2);
1132 return true;
1133 }() ) {
1134 LLVM_DEBUG(dbgs() << "Applying rule 'add_p2i_to_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'add_p2i_to_ptradd'\n"
; } } while (false)
;
1135 Helper.applyCombineAddP2IToPtrAdd(*MIs[0], MatchData2);
1136 return true;
1137 }
1138 }
1139 // Leaf name: propagate_undef_any_op
1140 // Rule: propagate_undef_any_op
1141 if (!RuleConfig->isRuleDisabled(17)) {
1142 if (1
1143 && [&]() {
1144 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1145 return true;
1146 }() ) {
1147 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
1148 Helper.replaceInstWithUndef(*MIs[0]);
1149 return true;
1150 }
1151 }
1152 // Leaf name: right_identity_zero
1153 // Rule: right_identity_zero
1154 if (!RuleConfig->isRuleDisabled(24)) {
1155 if (1
1156 && [&]() {
1157 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
1158 return true;
1159 }() ) {
1160 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
1161 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1162 return true;
1163 }
1164 }
1165 // Leaf name: add_sub_reg
1166 // Rule: add_sub_reg
1167 if (!RuleConfig->isRuleDisabled(33)) {
1168 if (1
1169 && [&]() {
1170 return Helper.matchAddSubSameReg(*MIs[0], MatchData33);
1171 return true;
1172 }() ) {
1173 LLVM_DEBUG(dbgs() << "Applying rule 'add_sub_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'add_sub_reg'\n"
; } } while (false)
;
1174 return Helper.replaceSingleDefInstWithReg(*MIs[0],
1175 MatchData33);
1176 return true;
1177 }
1178 }
1179 // Leaf name: simplify_add_to_sub
1180 // Rule: simplify_add_to_sub
1181 if (!RuleConfig->isRuleDisabled(40)) {
1182 if (1
1183 && [&]() {
1184 return Helper.matchSimplifyAddToSub(*MIs[0], MatchData40);
1185 return true;
1186 }() ) {
1187 LLVM_DEBUG(dbgs() << "Applying rule 'simplify_add_to_sub'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'simplify_add_to_sub'\n"
; } } while (false)
;
1188 Helper.applySimplifyAddToSub(*MIs[0], MatchData40);
1189 return true;
1190 }
1191 }
1192 // Leaf name: constant_fold
1193 // Rule: constant_fold
1194 if (!RuleConfig->isRuleDisabled(91)) {
1195 if (1
1196 && [&]() {
1197 return Helper.matchConstantFold(*MIs[0], MatchData91);
1198 return true;
1199 }() ) {
1200 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
1201 Helper.replaceInstWithConstant(*MIs[0], MatchData91);
1202 return true;
1203 }
1204 }
1205 // Leaf name: fold_binop_into_select
1206 // Rule: fold_binop_into_select
1207 if (!RuleConfig->isRuleDisabled(106)) {
1208 if (1
1209 && [&]() {
1210 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
1211 return true;
1212 }() ) {
1213 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
1214 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
1215 return true;
1216 }
1217 }
1218 // Leaf name: commute_constant_to_rhs
1219 // Rule: commute_constant_to_rhs
1220 if (!RuleConfig->isRuleDisabled(111)) {
1221 if (1
1222 && [&]() {
1223
1224 return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value();
1225
1226 return true;
1227 }() ) {
1228 LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n"
; } } while (false)
;
1229
1230 Observer.changingInstr(*MIs[0]);
1231 Register LHSReg = MIs[0]->getOperand(1).getReg();
1232 Register RHSReg = MIs[0]->getOperand(2).getReg();
1233 MIs[0]->getOperand(1).setReg(RHSReg);
1234 MIs[0]->getOperand(2).setReg(LHSReg);
1235 Observer.changedInstr(*MIs[0]);
1236
1237 return true;
1238 }
1239 }
1240 return false;
1241 }
1242 if (Partition == 3 /* TargetOpcode::G_FREEZE */) {
1243 // Leaf name: idempotent_prop
1244 // Rule: idempotent_prop
1245 if (!RuleConfig->isRuleDisabled(4)) {
1246 if (1
1247 && [&]() {
1248 return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() ==
1249 MIs[0]->getOpcode();
1250 return true;
1251 }() ) {
1252 LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n"
; } } while (false)
;
1253 Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1254 return true;
1255 }
1256 }
1257 return false;
1258 }
1259 if (Partition == 4 /* TargetOpcode::G_FABS */) {
1260 // Leaf name: idempotent_prop
1261 // Rule: idempotent_prop
1262 if (!RuleConfig->isRuleDisabled(4)) {
1263 if (1
1264 && [&]() {
1265 return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() ==
1266 MIs[0]->getOpcode();
1267 return true;
1268 }() ) {
1269 LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n"
; } } while (false)
;
1270 Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1271 return true;
1272 }
1273 }
1274 // Leaf name: constant_fp_op
1275 // Rule: constant_fp_op
1276 if (!RuleConfig->isRuleDisabled(70)) {
1277 if (1
1278 && [&]() {
1279 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70);
1280 return true;
1281 }() ) {
1282 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
1283 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70);
1284 return true;
1285 }
1286 }
1287 // Leaf name: fabs_fneg_fold
1288 // Rule: fabs_fneg_fold
1289 if (!RuleConfig->isRuleDisabled(92)) {
1290 if (1
1291 && [&]() {
1292 return Helper.matchCombineFAbsOfFNeg(*MIs[0], MatchData92);
1293 return true;
1294 }() ) {
1295 LLVM_DEBUG(dbgs() << "Applying rule 'fabs_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fabs_fneg_fold'\n"
; } } while (false)
;
1296 Helper.applyBuildFnNoErase(*MIs[0], MatchData92);
1297 return true;
1298 }
1299 }
1300 return false;
1301 }
1302 if (Partition == 5 /* TargetOpcode::G_FCANONICALIZE */) {
1303 // Leaf name: idempotent_prop
1304 // Rule: idempotent_prop
1305 if (!RuleConfig->isRuleDisabled(4)) {
1306 if (1
1307 && [&]() {
1308 return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() ==
1309 MIs[0]->getOpcode();
1310 return true;
1311 }() ) {
1312 LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n"
; } } while (false)
;
1313 Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1314 return true;
1315 }
1316 }
1317 return false;
1318 }
1319 if (Partition == 6 /* TargetOpcode::G_INSERT_VECTOR_ELT */) {
1320 // Leaf name: combine_insert_vec_elts_build_vector
1321 // Rule: combine_insert_vec_elts_build_vector
1322 if (!RuleConfig->isRuleDisabled(5)) {
1323 if (1
1324 && [&]() {
1325 return Helper.matchCombineInsertVecElts(*MIs[0], MatchData5);
1326 return true;
1327 }() ) {
1328 LLVM_DEBUG(dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n"
; } } while (false)
;
1329 Helper.applyCombineInsertVecElts(*MIs[0], MatchData5);
1330 return true;
1331 }
1332 }
1333 // Leaf name: insert_extract_vec_elt_out_of_bounds
1334 // Rule: insert_extract_vec_elt_out_of_bounds
1335 if (!RuleConfig->isRuleDisabled(22)) {
1336 if (1
1337 && [&]() {
1338 return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]);
1339 return true;
1340 }() ) {
1341 LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n"
; } } while (false)
;
1342 Helper.replaceInstWithUndef(*MIs[0]);
1343 return true;
1344 }
1345 }
1346 return false;
1347 }
1348 if (Partition == 7 /* TargetOpcode::G_EXTRACT_VECTOR_ELT */) {
1349 // Leaf name: extract_vec_elt_build_vec
1350 // Rule: extract_vec_elt_build_vec
1351 if (!RuleConfig->isRuleDisabled(6)) {
1352 if (1
1353 && [&]() {
1354 return Helper.matchExtractVecEltBuildVec(*MIs[0], MatchData6);
1355 return true;
1356 }() ) {
1357 LLVM_DEBUG(dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n"
; } } while (false)
;
1358 Helper.applyExtractVecEltBuildVec(*MIs[0], MatchData6);
1359 return true;
1360 }
1361 }
1362 // Leaf name: insert_extract_vec_elt_out_of_bounds
1363 // Rule: insert_extract_vec_elt_out_of_bounds
1364 if (!RuleConfig->isRuleDisabled(22)) {
1365 if (1
1366 && [&]() {
1367 return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]);
1368 return true;
1369 }() ) {
1370 LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n"
; } } while (false)
;
1371 Helper.replaceInstWithUndef(*MIs[0]);
1372 return true;
1373 }
1374 }
1375 return false;
1376 }
1377 if (Partition == 8 /* TargetOpcode::G_BUILD_VECTOR */) {
1378 // Leaf name: extract_all_elts_from_build_vector
1379 // Rule: extract_all_elts_from_build_vector
1380 if (!RuleConfig->isRuleDisabled(7)) {
1381 if (1
1382 && [&]() {
1383 return Helper.matchExtractAllEltsFromBuildVector(*MIs[0], MatchData7);
1384 return true;
1385 }() ) {
1386 LLVM_DEBUG(dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n"
; } } while (false)
;
1387 Helper.applyExtractAllEltsFromBuildVector(*MIs[0], MatchData7);
1388 return true;
1389 }
1390 }
1391 // Leaf name: buildvector_identity_fold
1392 // Rule: buildvector_identity_fold
1393 if (!RuleConfig->isRuleDisabled(34)) {
1394 if (1
1395 && [&]() {
1396 return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34);
1397 return true;
1398 }() ) {
1399 LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n"
; } } while (false)
;
1400 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34);
1401 return true;
1402 }
1403 }
1404 return false;
1405 }
1406 if (Partition == 9 /* TargetOpcode::G_LOAD */) {
1407 // Leaf name: extending_loads
1408 // Rule: extending_loads
1409 if (!RuleConfig->isRuleDisabled(8)) {
1410 if (1
1411 && [&]() {
1412 return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8);
1413 return true;
1414 }() ) {
1415 LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n"
; } } while (false)
;
1416 Helper.applyCombineExtendingLoads(*MIs[0], MatchData8);
1417 return true;
1418 }
1419 }
1420 // Leaf name: combine_indexed_load_store
1421 // Rule: combine_indexed_load_store
1422 if (!RuleConfig->isRuleDisabled(10)) {
1423 if (1
1424 && [&]() {
1425 return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10);
1426 return true;
1427 }() ) {
1428 LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n"
; } } while (false)
;
1429 Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10);
1430 return true;
1431 }
1432 }
1433 return false;
1434 }
1435 if (Partition == 10 /* TargetOpcode::G_SEXTLOAD */) {
1436 // Leaf name: extending_loads
1437 // Rule: extending_loads
1438 if (!RuleConfig->isRuleDisabled(8)) {
1439 if (1
1440 && [&]() {
1441 return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8);
1442 return true;
1443 }() ) {
1444 LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n"
; } } while (false)
;
1445 Helper.applyCombineExtendingLoads(*MIs[0], MatchData8);
1446 return true;
1447 }
1448 }
1449 // Leaf name: combine_indexed_load_store
1450 // Rule: combine_indexed_load_store
1451 if (!RuleConfig->isRuleDisabled(10)) {
1452 if (1
1453 && [&]() {
1454 return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10);
1455 return true;
1456 }() ) {
1457 LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n"
; } } while (false)
;
1458 Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10);
1459 return true;
1460 }
1461 }
1462 return false;
1463 }
1464 if (Partition == 11 /* TargetOpcode::G_ZEXTLOAD */) {
1465 // Leaf name: extending_loads
1466 // Rule: extending_loads
1467 if (!RuleConfig->isRuleDisabled(8)) {
1468 if (1
1469 && [&]() {
1470 return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8);
1471 return true;
1472 }() ) {
1473 LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n"
; } } while (false)
;
1474 Helper.applyCombineExtendingLoads(*MIs[0], MatchData8);
1475 return true;
1476 }
1477 }
1478 // Leaf name: combine_indexed_load_store
1479 // Rule: combine_indexed_load_store
1480 if (!RuleConfig->isRuleDisabled(10)) {
1481 if (1
1482 && [&]() {
1483 return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10);
1484 return true;
1485 }() ) {
1486 LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n"
; } } while (false)
;
1487 Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10);
1488 return true;
1489 }
1490 }
1491 return false;
1492 }
1493 if (Partition == 12 /* TargetOpcode::G_AND */) {
1494 // Leaf name: load_and_mask
1495 // Rule: load_and_mask
1496 if (!RuleConfig->isRuleDisabled(9)) {
1497 if (1
1498 && [&]() {
1499 return Helper.matchCombineLoadWithAndMask(*MIs[0], MatchData9);
1500 return true;
1501 }() ) {
1502 LLVM_DEBUG(dbgs() << "Applying rule 'load_and_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'load_and_mask'\n"
; } } while (false)
;
1503 Helper.applyBuildFn(*MIs[0], MatchData9);
1504 return true;
1505 }
1506 }
1507 // Leaf name: undef_to_int_zero
1508 // Rule: undef_to_int_zero
1509 if (!RuleConfig->isRuleDisabled(12)) {
1510 if (1
1511 && [&]() {
1512 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1513 return true;
1514 }() ) {
1515 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n"
; } } while (false)
;
1516 Helper.replaceInstWithConstant(*MIs[0], 0);
1517 return true;
1518 }
1519 }
1520 // Leaf name: binop_same_val
1521 // Rule: binop_same_val
1522 if (!RuleConfig->isRuleDisabled(25)) {
1523 if (1
1524 && [&]() {
1525 return Helper.matchBinOpSameVal(*MIs[0]);
1526 return true;
1527 }() ) {
1528 LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n"
; } } while (false)
;
1529 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1530 return true;
1531 }
1532 }
1533 // Leaf name: hoist_logic_op_with_same_opcode_hands
1534 // Rule: hoist_logic_op_with_same_opcode_hands
1535 if (!RuleConfig->isRuleDisabled(41)) {
1536 if (1
1537 && [&]() {
1538 return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData41);
1539 return true;
1540 }() ) {
1541 LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n"
; } } while (false)
;
1542 Helper.applyBuildInstructionSteps(*MIs[0], MatchData41);
1543 return true;
1544 }
1545 }
1546 // Leaf name: narrow_binop_feeding_and
1547 // Rule: narrow_binop_feeding_and
1548 if (!RuleConfig->isRuleDisabled(48)) {
1549 if (1
1550 && [&]() {
1551 return Helper.matchNarrowBinopFeedingAnd(*MIs[0], MatchData48);
1552 return true;
1553 }() ) {
1554 LLVM_DEBUG(dbgs() << "Applying rule 'narrow_binop_feeding_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'narrow_binop_feeding_and'\n"
; } } while (false)
;
1555 Helper.applyBuildFnNoErase(*MIs[0], MatchData48);
1556 return true;
1557 }
1558 }
1559 // Leaf name: redundant_and
1560 // Rule: redundant_and
1561 if (!RuleConfig->isRuleDisabled(52)) {
1562 if (1
1563 && [&]() {
1564 return Helper.matchRedundantAnd(*MIs[0], MatchData52);
1565 return true;
1566 }() ) {
1567 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_and'\n"
; } } while (false)
;
1568 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData52);
1569 return true;
1570 }
1571 }
1572 // Leaf name: overlapping_and
1573 // Rule: overlapping_and
1574 if (!RuleConfig->isRuleDisabled(72)) {
1575 if (1
1576 && [&]() {
1577 return Helper.matchOverlappingAnd(*MIs[0], MatchData72);
1578 return true;
1579 }() ) {
1580 LLVM_DEBUG(dbgs() << "Applying rule 'overlapping_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'overlapping_and'\n"
; } } while (false)
;
1581 Helper.applyBuildFn(*MIs[0], MatchData72);
1582 return true;
1583 }
1584 }
1585 // Leaf name: bitfield_extract_from_and
1586 // Rule: bitfield_extract_from_and
1587 if (!RuleConfig->isRuleDisabled(88)) {
1588 if (1
1589 && [&]() {
1590 return Helper.matchBitfieldExtractFromAnd(*MIs[0], MatchData88);
1591 return true;
1592 }() ) {
1593 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_and'\n"
; } } while (false)
;
1594 Helper.applyBuildFn(*MIs[0], MatchData88);
1595 return true;
1596 }
1597 }
1598 // Leaf name: constant_fold
1599 // Rule: constant_fold
1600 if (!RuleConfig->isRuleDisabled(91)) {
1601 if (1
1602 && [&]() {
1603 return Helper.matchConstantFold(*MIs[0], MatchData91);
1604 return true;
1605 }() ) {
1606 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
1607 Helper.replaceInstWithConstant(*MIs[0], MatchData91);
1608 return true;
1609 }
1610 }
1611 // Leaf name: and_or_disjoint_mask
1612 // Rule: and_or_disjoint_mask
1613 if (!RuleConfig->isRuleDisabled(97)) {
1614 if (1
1615 && [&]() {
1616 return Helper.matchAndOrDisjointMask(*MIs[0], MatchData97);
1617 return true;
1618 }() ) {
1619 LLVM_DEBUG(dbgs() << "Applying rule 'and_or_disjoint_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'and_or_disjoint_mask'\n"
; } } while (false)
;
1620 Helper.applyBuildFnNoErase(*MIs[0], MatchData97);
1621 return true;
1622 }
1623 }
1624 // Leaf name: fold_binop_into_select
1625 // Rule: fold_binop_into_select
1626 if (!RuleConfig->isRuleDisabled(106)) {
1627 if (1
1628 && [&]() {
1629 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
1630 return true;
1631 }() ) {
1632 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
1633 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
1634 return true;
1635 }
1636 }
1637 // Leaf name: commute_constant_to_rhs
1638 // Rule: commute_constant_to_rhs
1639 if (!RuleConfig->isRuleDisabled(111)) {
1640 if (1
1641 && [&]() {
1642
1643 return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value();
1644
1645 return true;
1646 }() ) {
1647 LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n"
; } } while (false)
;
1648
1649 Observer.changingInstr(*MIs[0]);
1650 Register LHSReg = MIs[0]->getOperand(1).getReg();
1651 Register RHSReg = MIs[0]->getOperand(2).getReg();
1652 MIs[0]->getOperand(1).setReg(RHSReg);
1653 MIs[0]->getOperand(2).setReg(LHSReg);
1654 Observer.changedInstr(*MIs[0]);
1655
1656 return true;
1657 }
1658 }
1659 return false;
1660 }
1661 if (Partition == 13 /* TargetOpcode::G_STORE */) {
1662 // Leaf name: combine_indexed_load_store
1663 // Rule: combine_indexed_load_store
1664 if (!RuleConfig->isRuleDisabled(10)) {
1665 if (1
1666 && [&]() {
1667 return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10);
1668 return true;
1669 }() ) {
1670 LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n"
; } } while (false)
;
1671 Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10);
1672 return true;
1673 }
1674 }
1675 // Leaf name: erase_undef_store
1676 // Rule: erase_undef_store
1677 if (!RuleConfig->isRuleDisabled(20)) {
1678 if (1
1679 && [&]() {
1680 return Helper.matchUndefStore(*MIs[0]);
1681 return true;
1682 }() ) {
1683 LLVM_DEBUG(dbgs() << "Applying rule 'erase_undef_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'erase_undef_store'\n"
; } } while (false)
;
1684 return Helper.eraseInst(*MIs[0]);
1685 return true;
1686 }
1687 }
1688 return false;
1689 }
1690 if (Partition == 14 /* TargetOpcode::G_UITOFP */) {
1691 // Leaf name: undef_to_fp_zero
1692 // Rule: undef_to_fp_zero
1693 if (!RuleConfig->isRuleDisabled(11)) {
1694 if (1
1695 && [&]() {
1696 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1697 return true;
1698 }() ) {
1699 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n"
; } } while (false)
;
1700 Helper.replaceInstWithFConstant(*MIs[0], 0.0);
1701 return true;
1702 }
1703 }
1704 return false;
1705 }
1706 if (Partition == 15 /* TargetOpcode::G_SITOFP */) {
1707 // Leaf name: undef_to_fp_zero
1708 // Rule: undef_to_fp_zero
1709 if (!RuleConfig->isRuleDisabled(11)) {
1710 if (1
1711 && [&]() {
1712 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1713 return true;
1714 }() ) {
1715 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n"
; } } while (false)
;
1716 Helper.replaceInstWithFConstant(*MIs[0], 0.0);
1717 return true;
1718 }
1719 }
1720 return false;
1721 }
1722 if (Partition == 16 /* TargetOpcode::G_OR */) {
1723 // Leaf name: undef_to_negative_one
1724 // Rule: undef_to_negative_one
1725 if (!RuleConfig->isRuleDisabled(13)) {
1726 if (1
1727 && [&]() {
1728 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
1729 return true;
1730 }() ) {
1731 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_negative_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_negative_one'\n"
; } } while (false)
;
1732 Helper.replaceInstWithConstant(*MIs[0], -1);
1733 return true;
1734 }
1735 }
1736 // Leaf name: right_identity_zero
1737 // Rule: right_identity_zero
1738 if (!RuleConfig->isRuleDisabled(24)) {
1739 if (1
1740 && [&]() {
1741 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
1742 return true;
1743 }() ) {
1744 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
1745 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1746 return true;
1747 }
1748 }
1749 // Leaf name: binop_same_val
1750 // Rule: binop_same_val
1751 if (!RuleConfig->isRuleDisabled(25)) {
1752 if (1
1753 && [&]() {
1754 return Helper.matchBinOpSameVal(*MIs[0]);
1755 return true;
1756 }() ) {
1757 LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n"
; } } while (false)
;
1758 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1759 return true;
1760 }
1761 }
1762 // Leaf name: hoist_logic_op_with_same_opcode_hands
1763 // Rule: hoist_logic_op_with_same_opcode_hands
1764 if (!RuleConfig->isRuleDisabled(41)) {
1765 if (1
1766 && [&]() {
1767 return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData41);
1768 return true;
1769 }() ) {
1770 LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n"
; } } while (false)
;
1771 Helper.applyBuildInstructionSteps(*MIs[0], MatchData41);
1772 return true;
1773 }
1774 }
1775 // Leaf name: redundant_or
1776 // Rule: redundant_or
1777 if (!RuleConfig->isRuleDisabled(54)) {
1778 if (1
1779 && [&]() {
1780 return Helper.matchRedundantOr(*MIs[0], MatchData54);
1781 return true;
1782 }() ) {
1783 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_or'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_or'\n"
; } } while (false)
;
1784 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData54);
1785 return true;
1786 }
1787 }
1788 // Leaf name: load_or_combine
1789 // Rule: load_or_combine
1790 if (!RuleConfig->isRuleDisabled(82)) {
1791 if (1
1792 && [&]() {
1793 return Helper.matchLoadOrCombine(*MIs[0], MatchData82);
1794 return true;
1795 }() ) {
1796 LLVM_DEBUG(dbgs() << "Applying rule 'load_or_combine'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'load_or_combine'\n"
; } } while (false)
;
1797 Helper.applyBuildFn(*MIs[0], MatchData82);
1798 return true;
1799 }
1800 }
1801 // Leaf name: funnel_shift_from_or_shift
1802 // Rule: funnel_shift_from_or_shift
1803 if (!RuleConfig->isRuleDisabled(84)) {
1804 if (1
1805 && [&]() {
1806 return Helper.matchOrShiftToFunnelShift(*MIs[0], MatchData84);
1807 return true;
1808 }() ) {
1809 LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n"
; } } while (false)
;
1810 Helper.applyBuildFn(*MIs[0], MatchData84);
1811 return true;
1812 }
1813 }
1814 // Leaf name: constant_fold
1815 // Rule: constant_fold
1816 if (!RuleConfig->isRuleDisabled(91)) {
1817 if (1
1818 && [&]() {
1819 return Helper.matchConstantFold(*MIs[0], MatchData91);
1820 return true;
1821 }() ) {
1822 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
1823 Helper.replaceInstWithConstant(*MIs[0], MatchData91);
1824 return true;
1825 }
1826 }
1827 // Leaf name: fold_binop_into_select
1828 // Rule: fold_binop_into_select
1829 if (!RuleConfig->isRuleDisabled(106)) {
1830 if (1
1831 && [&]() {
1832 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
1833 return true;
1834 }() ) {
1835 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
1836 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
1837 return true;
1838 }
1839 }
1840 // Leaf name: commute_constant_to_rhs
1841 // Rule: commute_constant_to_rhs
1842 if (!RuleConfig->isRuleDisabled(111)) {
1843 if (1
1844 && [&]() {
1845
1846 return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value();
1847
1848 return true;
1849 }() ) {
1850 LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n"
; } } while (false)
;
1851
1852 Observer.changingInstr(*MIs[0]);
1853 Register LHSReg = MIs[0]->getOperand(1).getReg();
1854 Register RHSReg = MIs[0]->getOperand(2).getReg();
1855 MIs[0]->getOperand(1).setReg(RHSReg);
1856 MIs[0]->getOperand(2).setReg(LHSReg);
1857 Observer.changedInstr(*MIs[0]);
1858
1859 return true;
1860 }
1861 }
1862 return false;
1863 }
1864 if (Partition == 17 /* TargetOpcode::G_SHL */) {
1865 // Leaf name: binop_left_undef_to_zero
1866 // Rule: binop_left_undef_to_zero
1867 if (!RuleConfig->isRuleDisabled(14)) {
1868 if (1
1869 && [&]() {
1870 return Helper.matchOperandIsUndef(*MIs[0], 1);
1871 return true;
1872 }() ) {
1873 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n"
; } } while (false)
;
1874 Helper.replaceInstWithConstant(*MIs[0], 0);
1875 return true;
1876 }
1877 }
1878 // Leaf name: binop_right_undef_to_undef
1879 // Rule: binop_right_undef_to_undef
1880 if (!RuleConfig->isRuleDisabled(15)) {
1881 if (1
1882 && [&]() {
1883 return Helper.matchOperandIsUndef(*MIs[0], 2);
1884 return true;
1885 }() ) {
1886 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n"
; } } while (false)
;
1887 Helper.replaceInstWithUndef(*MIs[0]);
1888 return true;
1889 }
1890 }
1891 // Leaf name: right_identity_zero
1892 // Rule: right_identity_zero
1893 if (!RuleConfig->isRuleDisabled(24)) {
1894 if (1
1895 && [&]() {
1896 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
1897 return true;
1898 }() ) {
1899 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
1900 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
1901 return true;
1902 }
1903 }
1904 // Leaf name: shifts_too_big
1905 // Rule: shifts_too_big
1906 if (!RuleConfig->isRuleDisabled(42)) {
1907 if (1
1908 && [&]() {
1909 return Helper.matchShiftsTooBig(*MIs[0]);
1910 return true;
1911 }() ) {
1912 LLVM_DEBUG(dbgs() << "Applying rule 'shifts_too_big'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shifts_too_big'\n"
; } } while (false)
;
1913 Helper.replaceInstWithUndef(*MIs[0]);
1914 return true;
1915 }
1916 }
1917 // Leaf name: reduce_shl_of_extend
1918 // Rule: reduce_shl_of_extend
1919 if (!RuleConfig->isRuleDisabled(47)) {
1920 if (1
1921 && [&]() {
1922 return Helper.matchCombineShlOfExtend(*MIs[0], MatchData47);
1923 return true;
1924 }() ) {
1925 LLVM_DEBUG(dbgs() << "Applying rule 'reduce_shl_of_extend'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'reduce_shl_of_extend'\n"
; } } while (false)
;
1926 Helper.applyCombineShlOfExtend(*MIs[0], MatchData47);
1927 return true;
1928 }
1929 }
1930 // Leaf name: shift_immed_chain
1931 // Rule: shift_immed_chain
1932 if (!RuleConfig->isRuleDisabled(80)) {
1933 if (1
1934 && [&]() {
1935 return Helper.matchShiftImmedChain(*MIs[0], MatchData80);
1936 return true;
1937 }() ) {
1938 LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n"
; } } while (false)
;
1939 Helper.applyShiftImmedChain(*MIs[0], MatchData80);
1940 return true;
1941 }
1942 }
1943 // Leaf name: shift_of_shifted_logic_chain
1944 // Rule: shift_of_shifted_logic_chain
1945 if (!RuleConfig->isRuleDisabled(81)) {
1946 if (1
1947 && [&]() {
1948 return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81);
1949 return true;
1950 }() ) {
1951 LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n"
; } } while (false)
;
1952 Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81);
1953 return true;
1954 }
1955 }
1956 // Leaf name: commute_shift
1957 // Rule: commute_shift
1958 if (!RuleConfig->isRuleDisabled(86)) {
1959 if (1
1960 && [&]() {
1961 return Helper.matchCommuteShift(*MIs[0], MatchData86);
1962 return true;
1963 }() ) {
1964 LLVM_DEBUG(dbgs() << "Applying rule 'commute_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_shift'\n"
; } } while (false)
;
1965 Helper.applyBuildFn(*MIs[0], MatchData86);
1966 return true;
1967 }
1968 }
1969 // Leaf name: fold_binop_into_select
1970 // Rule: fold_binop_into_select
1971 if (!RuleConfig->isRuleDisabled(106)) {
1972 if (1
1973 && [&]() {
1974 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
1975 return true;
1976 }() ) {
1977 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
1978 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
1979 return true;
1980 }
1981 }
1982 return false;
1983 }
1984 if (Partition == 18 /* TargetOpcode::G_UDIV */) {
1985 // Leaf name: binop_left_undef_to_zero
1986 // Rule: binop_left_undef_to_zero
1987 if (!RuleConfig->isRuleDisabled(14)) {
1988 if (1
1989 && [&]() {
1990 return Helper.matchOperandIsUndef(*MIs[0], 1);
1991 return true;
1992 }() ) {
1993 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n"
; } } while (false)
;
1994 Helper.replaceInstWithConstant(*MIs[0], 0);
1995 return true;
1996 }
1997 }
1998 // Leaf name: binop_left_to_zero
1999 // Rule: binop_left_to_zero
2000 if (!RuleConfig->isRuleDisabled(26)) {
2001 if (1
2002 && [&]() {
2003 return Helper.matchOperandIsZero(*MIs[0], 1);
2004 return true;
2005 }() ) {
2006 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n"
; } } while (false)
;
2007 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2008 return true;
2009 }
2010 }
2011 // Leaf name: div_rem_to_divrem
2012 // Rule: div_rem_to_divrem
2013 if (!RuleConfig->isRuleDisabled(83)) {
2014 if (1
2015 && [&]() {
2016 return Helper.matchCombineDivRem(*MIs[0], MatchData83);
2017 return true;
2018 }() ) {
2019 LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n"
; } } while (false)
;
2020 Helper.applyCombineDivRem(*MIs[0], MatchData83);
2021 return true;
2022 }
2023 }
2024 // Leaf name: udiv_by_const
2025 // Rule: udiv_by_const
2026 if (!RuleConfig->isRuleDisabled(93)) {
2027 if (1
2028 && [&]() {
2029 return Helper.matchUDivByConst(*MIs[0]);
2030 return true;
2031 }() ) {
2032 LLVM_DEBUG(dbgs() << "Applying rule 'udiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'udiv_by_const'\n"
; } } while (false)
;
2033 Helper.applyUDivByConst(*MIs[0]);
2034 return true;
2035 }
2036 }
2037 // Leaf name: fold_binop_into_select
2038 // Rule: fold_binop_into_select
2039 if (!RuleConfig->isRuleDisabled(106)) {
2040 if (1
2041 && [&]() {
2042 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
2043 return true;
2044 }() ) {
2045 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2046 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
2047 return true;
2048 }
2049 }
2050 return false;
2051 }
2052 if (Partition == 19 /* TargetOpcode::G_UREM */) {
2053 // Leaf name: binop_left_undef_to_zero
2054 // Rule: binop_left_undef_to_zero
2055 if (!RuleConfig->isRuleDisabled(14)) {
2056 if (1
2057 && [&]() {
2058 return Helper.matchOperandIsUndef(*MIs[0], 1);
2059 return true;
2060 }() ) {
2061 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n"
; } } while (false)
;
2062 Helper.replaceInstWithConstant(*MIs[0], 0);
2063 return true;
2064 }
2065 }
2066 // Leaf name: binop_left_to_zero
2067 // Rule: binop_left_to_zero
2068 if (!RuleConfig->isRuleDisabled(26)) {
2069 if (1
2070 && [&]() {
2071 return Helper.matchOperandIsZero(*MIs[0], 1);
2072 return true;
2073 }() ) {
2074 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n"
; } } while (false)
;
2075 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2076 return true;
2077 }
2078 }
2079 // Leaf name: urem_pow2_to_mask
2080 // Rule: urem_pow2_to_mask
2081 if (!RuleConfig->isRuleDisabled(55)) {
2082 if (1
2083 && [&]() {
2084 return Helper.matchOperandIsKnownToBeAPowerOfTwo(*MIs[0], 2);
2085 return true;
2086 }() ) {
2087 LLVM_DEBUG(dbgs() << "Applying rule 'urem_pow2_to_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'urem_pow2_to_mask'\n"
; } } while (false)
;
2088 Helper.applySimplifyURemByPow2(*MIs[0]);
2089 return true;
2090 }
2091 }
2092 // Leaf name: div_rem_to_divrem
2093 // Rule: div_rem_to_divrem
2094 if (!RuleConfig->isRuleDisabled(83)) {
2095 if (1
2096 && [&]() {
2097 return Helper.matchCombineDivRem(*MIs[0], MatchData83);
2098 return true;
2099 }() ) {
2100 LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n"
; } } while (false)
;
2101 Helper.applyCombineDivRem(*MIs[0], MatchData83);
2102 return true;
2103 }
2104 }
2105 // Leaf name: fold_binop_into_select
2106 // Rule: fold_binop_into_select
2107 if (!RuleConfig->isRuleDisabled(106)) {
2108 if (1
2109 && [&]() {
2110 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
2111 return true;
2112 }() ) {
2113 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2114 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
2115 return true;
2116 }
2117 }
2118 return false;
2119 }
2120 if (Partition == 20 /* TargetOpcode::G_ASHR */) {
2121 // Leaf name: binop_right_undef_to_undef
2122 // Rule: binop_right_undef_to_undef
2123 if (!RuleConfig->isRuleDisabled(15)) {
2124 if (1
2125 && [&]() {
2126 return Helper.matchOperandIsUndef(*MIs[0], 2);
2127 return true;
2128 }() ) {
2129 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n"
; } } while (false)
;
2130 Helper.replaceInstWithUndef(*MIs[0]);
2131 return true;
2132 }
2133 }
2134 // Leaf name: right_identity_zero
2135 // Rule: right_identity_zero
2136 if (!RuleConfig->isRuleDisabled(24)) {
2137 if (1
2138 && [&]() {
2139 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2140 return true;
2141 }() ) {
2142 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2143 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2144 return true;
2145 }
2146 }
2147 // Leaf name: shifts_too_big
2148 // Rule: shifts_too_big
2149 if (!RuleConfig->isRuleDisabled(42)) {
2150 if (1
2151 && [&]() {
2152 return Helper.matchShiftsTooBig(*MIs[0]);
2153 return true;
2154 }() ) {
2155 LLVM_DEBUG(dbgs() << "Applying rule 'shifts_too_big'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shifts_too_big'\n"
; } } while (false)
;
2156 Helper.replaceInstWithUndef(*MIs[0]);
2157 return true;
2158 }
2159 }
2160 // Leaf name: shl_ashr_to_sext_inreg
2161 // Rule: shl_ashr_to_sext_inreg
2162 if (!RuleConfig->isRuleDisabled(45)) {
2163 if (1
2164 && [&]() {
2165 return Helper.matchAshrShlToSextInreg(*MIs[0], MatchData45);
2166 return true;
2167 }() ) {
2168 LLVM_DEBUG(dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n"
; } } while (false)
;
2169 Helper.applyAshShlToSextInreg(*MIs[0], MatchData45);
2170 return true;
2171 }
2172 }
2173 // Leaf name: shift_immed_chain
2174 // Rule: shift_immed_chain
2175 if (!RuleConfig->isRuleDisabled(80)) {
2176 if (1
2177 && [&]() {
2178 return Helper.matchShiftImmedChain(*MIs[0], MatchData80);
2179 return true;
2180 }() ) {
2181 LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n"
; } } while (false)
;
2182 Helper.applyShiftImmedChain(*MIs[0], MatchData80);
2183 return true;
2184 }
2185 }
2186 // Leaf name: shift_of_shifted_logic_chain
2187 // Rule: shift_of_shifted_logic_chain
2188 if (!RuleConfig->isRuleDisabled(81)) {
2189 if (1
2190 && [&]() {
2191 return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81);
2192 return true;
2193 }() ) {
2194 LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n"
; } } while (false)
;
2195 Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81);
2196 return true;
2197 }
2198 }
2199 // Leaf name: bitfield_extract_from_shr
2200 // Rule: bitfield_extract_from_shr
2201 if (!RuleConfig->isRuleDisabled(89)) {
2202 if (1
2203 && [&]() {
2204 return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData89);
2205 return true;
2206 }() ) {
2207 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n"
; } } while (false)
;
2208 Helper.applyBuildFn(*MIs[0], MatchData89);
2209 return true;
2210 }
2211 }
2212 // Leaf name: bitfield_extract_from_shr_and
2213 // Rule: bitfield_extract_from_shr_and
2214 if (!RuleConfig->isRuleDisabled(90)) {
2215 if (1
2216 && [&]() {
2217 return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData90);
2218 return true;
2219 }() ) {
2220 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n"
; } } while (false)
;
2221 Helper.applyBuildFn(*MIs[0], MatchData90);
2222 return true;
2223 }
2224 }
2225 // Leaf name: fold_binop_into_select
2226 // Rule: fold_binop_into_select
2227 if (!RuleConfig->isRuleDisabled(106)) {
2228 if (1
2229 && [&]() {
2230 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
2231 return true;
2232 }() ) {
2233 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2234 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
2235 return true;
2236 }
2237 }
2238 return false;
2239 }
2240 if (Partition == 21 /* TargetOpcode::G_LSHR */) {
2241 // Leaf name: binop_right_undef_to_undef
2242 // Rule: binop_right_undef_to_undef
2243 if (!RuleConfig->isRuleDisabled(15)) {
2244 if (1
2245 && [&]() {
2246 return Helper.matchOperandIsUndef(*MIs[0], 2);
2247 return true;
2248 }() ) {
2249 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n"
; } } while (false)
;
2250 Helper.replaceInstWithUndef(*MIs[0]);
2251 return true;
2252 }
2253 }
2254 // Leaf name: right_identity_zero
2255 // Rule: right_identity_zero
2256 if (!RuleConfig->isRuleDisabled(24)) {
2257 if (1
2258 && [&]() {
2259 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2260 return true;
2261 }() ) {
2262 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2263 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2264 return true;
2265 }
2266 }
2267 // Leaf name: shifts_too_big
2268 // Rule: shifts_too_big
2269 if (!RuleConfig->isRuleDisabled(42)) {
2270 if (1
2271 && [&]() {
2272 return Helper.matchShiftsTooBig(*MIs[0]);
2273 return true;
2274 }() ) {
2275 LLVM_DEBUG(dbgs() << "Applying rule 'shifts_too_big'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shifts_too_big'\n"
; } } while (false)
;
2276 Helper.replaceInstWithUndef(*MIs[0]);
2277 return true;
2278 }
2279 }
2280 // Leaf name: shift_immed_chain
2281 // Rule: shift_immed_chain
2282 if (!RuleConfig->isRuleDisabled(80)) {
2283 if (1
2284 && [&]() {
2285 return Helper.matchShiftImmedChain(*MIs[0], MatchData80);
2286 return true;
2287 }() ) {
2288 LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n"
; } } while (false)
;
2289 Helper.applyShiftImmedChain(*MIs[0], MatchData80);
2290 return true;
2291 }
2292 }
2293 // Leaf name: shift_of_shifted_logic_chain
2294 // Rule: shift_of_shifted_logic_chain
2295 if (!RuleConfig->isRuleDisabled(81)) {
2296 if (1
2297 && [&]() {
2298 return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81);
2299 return true;
2300 }() ) {
2301 LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n"
; } } while (false)
;
2302 Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81);
2303 return true;
2304 }
2305 }
2306 // Leaf name: bitfield_extract_from_shr
2307 // Rule: bitfield_extract_from_shr
2308 if (!RuleConfig->isRuleDisabled(89)) {
2309 if (1
2310 && [&]() {
2311 return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData89);
2312 return true;
2313 }() ) {
2314 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n"
; } } while (false)
;
2315 Helper.applyBuildFn(*MIs[0], MatchData89);
2316 return true;
2317 }
2318 }
2319 // Leaf name: bitfield_extract_from_shr_and
2320 // Rule: bitfield_extract_from_shr_and
2321 if (!RuleConfig->isRuleDisabled(90)) {
2322 if (1
2323 && [&]() {
2324 return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData90);
2325 return true;
2326 }() ) {
2327 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n"
; } } while (false)
;
2328 Helper.applyBuildFn(*MIs[0], MatchData90);
2329 return true;
2330 }
2331 }
2332 // Leaf name: fold_binop_into_select
2333 // Rule: fold_binop_into_select
2334 if (!RuleConfig->isRuleDisabled(106)) {
2335 if (1
2336 && [&]() {
2337 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
2338 return true;
2339 }() ) {
2340 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2341 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
2342 return true;
2343 }
2344 }
2345 return false;
2346 }
2347 if (Partition == 22 /* TargetOpcode::G_ABS */) {
2348 // Leaf name: unary_undef_to_zero
2349 // Rule: unary_undef_to_zero
2350 if (!RuleConfig->isRuleDisabled(16)) {
2351 if (1
2352 && [&]() {
2353 return Helper.matchOperandIsUndef(*MIs[0], 1);
2354 return true;
2355 }() ) {
2356 LLVM_DEBUG(dbgs() << "Applying rule 'unary_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unary_undef_to_zero'\n"
; } } while (false)
;
2357 Helper.replaceInstWithConstant(*MIs[0], 0);
2358 return true;
2359 }
2360 }
2361 return false;
2362 }
2363 if (Partition == 23 /* TargetOpcode::G_FPTOSI */) {
2364 // Leaf name: propagate_undef_any_op
2365 // Rule: propagate_undef_any_op
2366 if (!RuleConfig->isRuleDisabled(17)) {
2367 if (1
2368 && [&]() {
2369 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
2370 return true;
2371 }() ) {
2372 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
2373 Helper.replaceInstWithUndef(*MIs[0]);
2374 return true;
2375 }
2376 }
2377 return false;
2378 }
2379 if (Partition == 24 /* TargetOpcode::G_FPTOUI */) {
2380 // Leaf name: propagate_undef_any_op
2381 // Rule: propagate_undef_any_op
2382 if (!RuleConfig->isRuleDisabled(17)) {
2383 if (1
2384 && [&]() {
2385 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
2386 return true;
2387 }() ) {
2388 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
2389 Helper.replaceInstWithUndef(*MIs[0]);
2390 return true;
2391 }
2392 }
2393 return false;
2394 }
2395 if (Partition == 25 /* TargetOpcode::G_SUB */) {
2396 // Leaf name: propagate_undef_any_op
2397 // Rule: propagate_undef_any_op
2398 if (!RuleConfig->isRuleDisabled(17)) {
2399 if (1
2400 && [&]() {
2401 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
2402 return true;
2403 }() ) {
2404 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
2405 Helper.replaceInstWithUndef(*MIs[0]);
2406 return true;
2407 }
2408 }
2409 // Leaf name: right_identity_zero
2410 // Rule: right_identity_zero
2411 if (!RuleConfig->isRuleDisabled(24)) {
2412 if (1
2413 && [&]() {
2414 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2415 return true;
2416 }() ) {
2417 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2418 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2419 return true;
2420 }
2421 }
2422 // Leaf name: constant_fold
2423 // Rule: constant_fold
2424 if (!RuleConfig->isRuleDisabled(91)) {
2425 if (1
2426 && [&]() {
2427 return Helper.matchConstantFold(*MIs[0], MatchData91);
2428 return true;
2429 }() ) {
2430 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
2431 Helper.replaceInstWithConstant(*MIs[0], MatchData91);
2432 return true;
2433 }
2434 }
2435 // Leaf name: fold_binop_into_select
2436 // Rule: fold_binop_into_select
2437 if (!RuleConfig->isRuleDisabled(106)) {
2438 if (1
2439 && [&]() {
2440 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
2441 return true;
2442 }() ) {
2443 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2444 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
2445 return true;
2446 }
2447 }
2448 // Leaf name: sub_add_reg
2449 // Rule: sub_add_reg
2450 if (!RuleConfig->isRuleDisabled(107)) {
2451 if (1
2452 && [&]() {
2453 return Helper.matchSubAddSameReg(*MIs[0], MatchData107);
2454 return true;
2455 }() ) {
2456 LLVM_DEBUG(dbgs() << "Applying rule 'sub_add_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'sub_add_reg'\n"
; } } while (false)
;
2457 Helper.applyBuildFn(*MIs[0], MatchData107);
2458 return true;
2459 }
2460 }
2461 return false;
2462 }
2463 if (Partition == 26 /* TargetOpcode::G_XOR */) {
2464 // Leaf name: propagate_undef_any_op
2465 // Rule: propagate_undef_any_op
2466 if (!RuleConfig->isRuleDisabled(17)) {
2467 if (1
2468 && [&]() {
2469 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
2470 return true;
2471 }() ) {
2472 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
2473 Helper.replaceInstWithUndef(*MIs[0]);
2474 return true;
2475 }
2476 }
2477 // Leaf name: right_identity_zero
2478 // Rule: right_identity_zero
2479 if (!RuleConfig->isRuleDisabled(24)) {
2480 if (1
2481 && [&]() {
2482 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2483 return true;
2484 }() ) {
2485 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2486 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2487 return true;
2488 }
2489 }
2490 // Leaf name: hoist_logic_op_with_same_opcode_hands
2491 // Rule: hoist_logic_op_with_same_opcode_hands
2492 if (!RuleConfig->isRuleDisabled(41)) {
2493 if (1
2494 && [&]() {
2495 return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData41);
2496 return true;
2497 }() ) {
2498 LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n"
; } } while (false)
;
2499 Helper.applyBuildInstructionSteps(*MIs[0], MatchData41);
2500 return true;
2501 }
2502 }
2503 // Leaf name: not_cmp_fold
2504 // Rule: not_cmp_fold
2505 if (!RuleConfig->isRuleDisabled(61)) {
2506 if (1
2507 && [&]() {
2508 return Helper.matchNotCmp(*MIs[0], MatchData61);
2509 return true;
2510 }() ) {
2511 LLVM_DEBUG(dbgs() << "Applying rule 'not_cmp_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'not_cmp_fold'\n"
; } } while (false)
;
2512 Helper.applyNotCmp(*MIs[0], MatchData61);
2513 return true;
2514 }
2515 }
2516 // Leaf name: xor_of_and_with_same_reg
2517 // Rule: xor_of_and_with_same_reg
2518 if (!RuleConfig->isRuleDisabled(78)) {
2519 if (1
2520 && [&]() {
2521 return Helper.matchXorOfAndWithSameReg(*MIs[0], MatchData78);
2522 return true;
2523 }() ) {
2524 LLVM_DEBUG(dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n"
; } } while (false)
;
2525 Helper.applyXorOfAndWithSameReg(*MIs[0], MatchData78);
2526 return true;
2527 }
2528 }
2529 // Leaf name: constant_fold
2530 // Rule: constant_fold
2531 if (!RuleConfig->isRuleDisabled(91)) {
2532 if (1
2533 && [&]() {
2534 return Helper.matchConstantFold(*MIs[0], MatchData91);
2535 return true;
2536 }() ) {
2537 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n"
; } } while (false)
;
2538 Helper.replaceInstWithConstant(*MIs[0], MatchData91);
2539 return true;
2540 }
2541 }
2542 // Leaf name: fold_binop_into_select
2543 // Rule: fold_binop_into_select
2544 if (!RuleConfig->isRuleDisabled(106)) {
2545 if (1
2546 && [&]() {
2547 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
2548 return true;
2549 }() ) {
2550 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2551 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
2552 return true;
2553 }
2554 }
2555 // Leaf name: commute_constant_to_rhs
2556 // Rule: commute_constant_to_rhs
2557 if (!RuleConfig->isRuleDisabled(111)) {
2558 if (1
2559 && [&]() {
2560
2561 return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value();
2562
2563 return true;
2564 }() ) {
2565 LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n"
; } } while (false)
;
2566
2567 Observer.changingInstr(*MIs[0]);
2568 Register LHSReg = MIs[0]->getOperand(1).getReg();
2569 Register RHSReg = MIs[0]->getOperand(2).getReg();
2570 MIs[0]->getOperand(1).setReg(RHSReg);
2571 MIs[0]->getOperand(2).setReg(LHSReg);
2572 Observer.changedInstr(*MIs[0]);
2573
2574 return true;
2575 }
2576 }
2577 return false;
2578 }
2579 if (Partition == 27 /* TargetOpcode::G_TRUNC */) {
2580 // Leaf name: propagate_undef_any_op
2581 // Rule: propagate_undef_any_op
2582 if (!RuleConfig->isRuleDisabled(17)) {
2583 if (1
2584 && [&]() {
2585 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]);
2586 return true;
2587 }() ) {
2588 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n"
; } } while (false)
;
2589 Helper.replaceInstWithUndef(*MIs[0]);
2590 return true;
2591 }
2592 }
2593 // Leaf name: trunc_buildvector_fold
2594 // Rule: trunc_buildvector_fold
2595 if (!RuleConfig->isRuleDisabled(35)) {
2596 if (1
2597 && [&]() {
2598 return Helper.matchTruncBuildVectorFold(*MIs[0], MatchData35);
2599 return true;
2600 }() ) {
2601 LLVM_DEBUG(dbgs() << "Applying rule 'trunc_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_buildvector_fold'\n"
; } } while (false)
;
2602 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData35);
2603 return true;
2604 }
2605 }
2606 // Leaf name: trunc_lshr_buildvector_fold
2607 // Rule: trunc_lshr_buildvector_fold
2608 if (!RuleConfig->isRuleDisabled(36)) {
2609 if (1
2610 && [&]() {
2611 return Helper.matchTruncLshrBuildVectorFold(*MIs[0], MatchData36);
2612 return true;
2613 }() ) {
2614 LLVM_DEBUG(dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n"
; } } while (false)
;
2615 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData36);
2616 return true;
2617 }
2618 }
2619 // Leaf name: trunc_ext_fold
2620 // Rule: trunc_ext_fold
2621 if (!RuleConfig->isRuleDisabled(68)) {
2622 if (1
2623 && [&]() {
2624 return Helper.matchCombineTruncOfExt(*MIs[0], MatchData68);
2625 return true;
2626 }() ) {
2627 LLVM_DEBUG(dbgs() << "Applying rule 'trunc_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_ext_fold'\n"
; } } while (false)
;
2628 Helper.applyCombineTruncOfExt(*MIs[0], MatchData68);
2629 return true;
2630 }
2631 }
2632 // Leaf name: trunc_shift
2633 // Rule: trunc_shift
2634 if (!RuleConfig->isRuleDisabled(69)) {
2635 if (1
2636 && [&]() {
2637 return Helper.matchCombineTruncOfShift(*MIs[0], MatchData69);
2638 return true;
2639 }() ) {
2640 LLVM_DEBUG(dbgs() << "Applying rule 'trunc_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_shift'\n"
; } } while (false)
;
2641 Helper.applyCombineTruncOfShift(*MIs[0], MatchData69);
2642 return true;
2643 }
2644 }
2645 return false;
2646 }
2647 if (Partition == 28 /* TargetOpcode::G_SHUFFLE_VECTOR */) {
2648 // Leaf name: propagate_undef_all_ops
2649 // Rule: propagate_undef_all_ops
2650 if (!RuleConfig->isRuleDisabled(18)) {
2651 if (1
2652 && [&]() {
2653 return Helper.matchAllExplicitUsesAreUndef(*MIs[0]);
2654 return true;
2655 }() ) {
2656 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_all_ops'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_all_ops'\n"
; } } while (false)
;
2657 Helper.replaceInstWithUndef(*MIs[0]);
2658 return true;
2659 }
2660 }
2661 // Leaf name: propagate_undef_shuffle_mask
2662 // Rule: propagate_undef_shuffle_mask
2663 if (!RuleConfig->isRuleDisabled(19)) {
2664 if (1
2665 && [&]() {
2666 return Helper.matchUndefShuffleVectorMask(*MIs[0]);
2667 return true;
2668 }() ) {
2669 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n"
; } } while (false)
;
2670 Helper.replaceInstWithUndef(*MIs[0]);
2671 return true;
2672 }
2673 }
2674 return false;
2675 }
2676 if (Partition == 29 /* TargetOpcode::G_UNMERGE_VALUES */) {
2677 // Leaf name: unmerge_undef
2678 // Rule: unmerge_undef
2679 if (!RuleConfig->isRuleDisabled(21)) {
2680 if (1
2681 && [&]() {
2682 return Helper.matchCombineUnmergeUndef(*MIs[0], MatchData21);
2683 return true;
2684 }() ) {
2685 LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_undef'\n"
; } } while (false)
;
2686 Helper.applyBuildFn(*MIs[0], MatchData21);
2687 return true;
2688 }
2689 }
2690 // Leaf name: unmerge_merge
2691 // Rule: unmerge_merge
2692 if (!RuleConfig->isRuleDisabled(63)) {
2693 if (1
2694 && [&]() {
2695 return Helper.matchCombineUnmergeMergeToPlainValues(*MIs[0], MatchData63);
2696 return true;
2697 }() ) {
2698 LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_merge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_merge'\n"
; } } while (false)
;
2699 Helper.applyCombineUnmergeMergeToPlainValues(*MIs[0], MatchData63);
2700 return true;
2701 }
2702 }
2703 // Leaf name: unmerge_cst
2704 // Rule: unmerge_cst
2705 if (!RuleConfig->isRuleDisabled(64)) {
2706 if (1
2707 && [&]() {
2708 return Helper.matchCombineUnmergeConstant(*MIs[0], MatchData64);
2709 return true;
2710 }() ) {
2711 LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_cst'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_cst'\n"
; } } while (false)
;
2712 Helper.applyCombineUnmergeConstant(*MIs[0], MatchData64);
2713 return true;
2714 }
2715 }
2716 // Leaf name: unmerge_dead_to_trunc
2717 // Rule: unmerge_dead_to_trunc
2718 if (!RuleConfig->isRuleDisabled(65)) {
2719 if (1
2720 && [&]() {
2721 return Helper.matchCombineUnmergeWithDeadLanesToTrunc(*MIs[0]);
2722 return true;
2723 }() ) {
2724 LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n"
; } } while (false)
;
2725 Helper.applyCombineUnmergeWithDeadLanesToTrunc(*MIs[0]);
2726 return true;
2727 }
2728 }
2729 // Leaf name: unmerge_zext_to_zext
2730 // Rule: unmerge_zext_to_zext
2731 if (!RuleConfig->isRuleDisabled(66)) {
2732 if (1
2733 && [&]() {
2734 return Helper.matchCombineUnmergeZExtToZExt(*MIs[0]);
2735 return true;
2736 }() ) {
2737 LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_zext_to_zext'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_zext_to_zext'\n"
; } } while (false)
;
2738 Helper.applyCombineUnmergeZExtToZExt(*MIs[0]);
2739 return true;
2740 }
2741 }
2742 return false;
2743 }
2744 if (Partition == 30 /* TargetOpcode::G_SELECT */) {
2745 // Leaf name: select_same_val
2746 // Rule: select_same_val
2747 if (!RuleConfig->isRuleDisabled(23)) {
2748 if (1
2749 && [&]() {
2750 return Helper.matchSelectSameVal(*MIs[0]);
2751 return true;
2752 }() ) {
2753 LLVM_DEBUG(dbgs() << "Applying rule 'select_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_same_val'\n"
; } } while (false)
;
2754 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2);
2755 return true;
2756 }
2757 }
2758 // Leaf name: select_undef_cmp
2759 // Rule: select_undef_cmp
2760 if (!RuleConfig->isRuleDisabled(49)) {
2761 if (1
2762 && [&]() {
2763 return Helper.matchUndefSelectCmp(*MIs[0]);
2764 return true;
2765 }() ) {
2766 LLVM_DEBUG(dbgs() << "Applying rule 'select_undef_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_undef_cmp'\n"
; } } while (false)
;
2767 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2);
2768 return true;
2769 }
2770 }
2771 // Leaf name: select_constant_cmp
2772 // Rule: select_constant_cmp
2773 if (!RuleConfig->isRuleDisabled(50)) {
2774 if (1
2775 && [&]() {
2776 return Helper.matchConstantSelectCmp(*MIs[0], MatchData50);
2777 return true;
2778 }() ) {
2779 LLVM_DEBUG(dbgs() << "Applying rule 'select_constant_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_constant_cmp'\n"
; } } while (false)
;
2780 return Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData50);
2781 return true;
2782 }
2783 }
2784 // Leaf name: select_to_logical
2785 // Rule: select_to_logical
2786 if (!RuleConfig->isRuleDisabled(51)) {
2787 if (1
2788 && [&]() {
2789 return Helper.matchSelectToLogical(*MIs[0], MatchData51);
2790 return true;
2791 }() ) {
2792 LLVM_DEBUG(dbgs() << "Applying rule 'select_to_logical'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_to_logical'\n"
; } } while (false)
;
2793 Helper.applyBuildFn(*MIs[0], MatchData51);
2794 return true;
2795 }
2796 }
2797 // Leaf name: select_to_minmax
2798 // Rule: select_to_minmax
2799 if (!RuleConfig->isRuleDisabled(108)) {
2800 if (1
2801 && [&]() {
2802 return Helper.matchSimplifySelectToMinMax(*MIs[0], MatchData108);
2803 return true;
2804 }() ) {
2805 LLVM_DEBUG(dbgs() << "Applying rule 'select_to_minmax'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_to_minmax'\n"
; } } while (false)
;
2806 Helper.applyBuildFn(*MIs[0], MatchData108);
2807 return true;
2808 }
2809 }
2810 return false;
2811 }
2812 if (Partition == 31 /* TargetOpcode::G_PTR_ADD */) {
2813 // Leaf name: right_identity_zero
2814 // Rule: right_identity_zero
2815 if (!RuleConfig->isRuleDisabled(24)) {
2816 if (1
2817 && [&]() {
2818 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2819 return true;
2820 }() ) {
2821 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2822 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2823 return true;
2824 }
2825 }
2826 // Leaf name: reassoc_ptradd
2827 // Rule: reassoc_ptradd
2828 if (!RuleConfig->isRuleDisabled(43)) {
2829 if (1
2830 && [&]() {
2831 return Helper.matchReassocPtrAdd(*MIs[0], MatchData43);
2832 return true;
2833 }() ) {
2834 LLVM_DEBUG(dbgs() << "Applying rule 'reassoc_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'reassoc_ptradd'\n"
; } } while (false)
;
2835 Helper.applyBuildFnNoErase(*MIs[0], MatchData43);
2836 return true;
2837 }
2838 }
2839 // Leaf name: ptr_add_immed_chain
2840 // Rule: ptr_add_immed_chain
2841 if (!RuleConfig->isRuleDisabled(44)) {
2842 if (1
2843 && [&]() {
2844 return Helper.matchPtrAddImmedChain(*MIs[0], MatchData44);
2845 return true;
2846 }() ) {
2847 LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_immed_chain'\n"
; } } while (false)
;
2848 Helper.applyPtrAddImmedChain(*MIs[0], MatchData44);
2849 return true;
2850 }
2851 }
2852 // Leaf name: const_ptradd_to_i2p
2853 // Rule: const_ptradd_to_i2p
2854 if (!RuleConfig->isRuleDisabled(71)) {
2855 if (1
2856 && [&]() {
2857 return Helper.matchCombineConstPtrAddToI2P(*MIs[0], MatchData71);
2858 return true;
2859 }() ) {
2860 LLVM_DEBUG(dbgs() << "Applying rule 'const_ptradd_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'const_ptradd_to_i2p'\n"
; } } while (false)
;
2861 Helper.applyCombineConstPtrAddToI2P(*MIs[0], MatchData71);
2862 return true;
2863 }
2864 }
2865 // Leaf name: ptr_add_with_zero
2866 // Rule: ptr_add_with_zero
2867 if (!RuleConfig->isRuleDisabled(79)) {
2868 if (1
2869 && [&]() {
2870 return Helper.matchPtrAddZero(*MIs[0]);
2871 return true;
2872 }() ) {
2873 LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_with_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_with_zero'\n"
; } } while (false)
;
2874 Helper.applyPtrAddZero(*MIs[0]);
2875 return true;
2876 }
2877 }
2878 // Leaf name: fold_binop_into_select
2879 // Rule: fold_binop_into_select
2880 if (!RuleConfig->isRuleDisabled(106)) {
2881 if (1
2882 && [&]() {
2883 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
2884 return true;
2885 }() ) {
2886 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2887 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
2888 return true;
2889 }
2890 }
2891 return false;
2892 }
2893 if (Partition == 32 /* TargetOpcode::G_ROTL */) {
2894 // Leaf name: right_identity_zero
2895 // Rule: right_identity_zero
2896 if (!RuleConfig->isRuleDisabled(24)) {
2897 if (1
2898 && [&]() {
2899 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2900 return true;
2901 }() ) {
2902 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2903 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2904 return true;
2905 }
2906 }
2907 return false;
2908 }
2909 if (Partition == 33 /* TargetOpcode::G_ROTR */) {
2910 // Leaf name: right_identity_zero
2911 // Rule: right_identity_zero
2912 if (!RuleConfig->isRuleDisabled(24)) {
2913 if (1
2914 && [&]() {
2915 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0);
2916 return true;
2917 }() ) {
2918 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n"
; } } while (false)
;
2919 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2920 return true;
2921 }
2922 }
2923 return false;
2924 }
2925 if (Partition == 34 /* TargetOpcode::G_SDIV */) {
2926 // Leaf name: binop_left_to_zero
2927 // Rule: binop_left_to_zero
2928 if (!RuleConfig->isRuleDisabled(26)) {
2929 if (1
2930 && [&]() {
2931 return Helper.matchOperandIsZero(*MIs[0], 1);
2932 return true;
2933 }() ) {
2934 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n"
; } } while (false)
;
2935 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2936 return true;
2937 }
2938 }
2939 // Leaf name: div_rem_to_divrem
2940 // Rule: div_rem_to_divrem
2941 if (!RuleConfig->isRuleDisabled(83)) {
2942 if (1
2943 && [&]() {
2944 return Helper.matchCombineDivRem(*MIs[0], MatchData83);
2945 return true;
2946 }() ) {
2947 LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n"
; } } while (false)
;
2948 Helper.applyCombineDivRem(*MIs[0], MatchData83);
2949 return true;
2950 }
2951 }
2952 // Leaf name: sdiv_by_const
2953 // Rule: sdiv_by_const
2954 if (!RuleConfig->isRuleDisabled(94)) {
2955 if (1
2956 && [&]() {
2957 return Helper.matchSDivByConst(*MIs[0]);
2958 return true;
2959 }() ) {
2960 LLVM_DEBUG(dbgs() << "Applying rule 'sdiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'sdiv_by_const'\n"
; } } while (false)
;
2961 Helper.applySDivByConst(*MIs[0]);
2962 return true;
2963 }
2964 }
2965 // Leaf name: fold_binop_into_select
2966 // Rule: fold_binop_into_select
2967 if (!RuleConfig->isRuleDisabled(106)) {
2968 if (1
2969 && [&]() {
2970 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
2971 return true;
2972 }() ) {
2973 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
2974 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
2975 return true;
2976 }
2977 }
2978 return false;
2979 }
2980 if (Partition == 35 /* TargetOpcode::G_SREM */) {
2981 // Leaf name: binop_left_to_zero
2982 // Rule: binop_left_to_zero
2983 if (!RuleConfig->isRuleDisabled(26)) {
2984 if (1
2985 && [&]() {
2986 return Helper.matchOperandIsZero(*MIs[0], 1);
2987 return true;
2988 }() ) {
2989 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n"
; } } while (false)
;
2990 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
2991 return true;
2992 }
2993 }
2994 // Leaf name: div_rem_to_divrem
2995 // Rule: div_rem_to_divrem
2996 if (!RuleConfig->isRuleDisabled(83)) {
2997 if (1
2998 && [&]() {
2999 return Helper.matchCombineDivRem(*MIs[0], MatchData83);
3000 return true;
3001 }() ) {
3002 LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n"
; } } while (false)
;
3003 Helper.applyCombineDivRem(*MIs[0], MatchData83);
3004 return true;
3005 }
3006 }
3007 // Leaf name: fold_binop_into_select
3008 // Rule: fold_binop_into_select
3009 if (!RuleConfig->isRuleDisabled(106)) {
3010 if (1
3011 && [&]() {
3012 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
3013 return true;
3014 }() ) {
3015 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
3016 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
3017 return true;
3018 }
3019 }
3020 return false;
3021 }
3022 if (Partition == 36 /* TargetOpcode::G_INTTOPTR */) {
3023 // Leaf name: p2i_to_i2p
3024 // Rule: p2i_to_i2p
3025 if (!RuleConfig->isRuleDisabled(28)) {
3026 if (1
3027 && [&]() {
3028 return Helper.matchCombineI2PToP2I(*MIs[0], MatchData28);
3029 return true;
3030 }() ) {
3031 LLVM_DEBUG(dbgs() << "Applying rule 'p2i_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'p2i_to_i2p'\n"
; } } while (false)
;
3032 Helper.applyCombineI2PToP2I(*MIs[0], MatchData28);
3033 return true;
3034 }
3035 }
3036 return false;
3037 }
3038 if (Partition == 37 /* TargetOpcode::G_PTRTOINT */) {
3039 Partition = -1;
3040 if (MIs.size() <= 1) MIs.resize(2);
3041 MIs[1] = nullptr;
3042 if (MIs[0]->getOperand(1).isReg())
3043 MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg());
3044 if (MIs[1] != nullptr) Partition = 0;
3045 if (Partition == -1) return false;
3046 if (Partition == 0 /* true */) {
3047 Partition = -1;
3048 switch (MIs[1]->getOpcode()) {
3049 case TargetOpcode::G_INTTOPTR: Partition = 0; break;
3050 }
3051 // Default case but without conflicting with potential default case in selection.
3052 if (Partition == -1) return false;
3053 if (Partition == 0 /* TargetOpcode::G_INTTOPTR */) {
3054 // Leaf name: i2p_to_p2i
3055 // Rule: i2p_to_p2i
3056 if (!RuleConfig->isRuleDisabled(29)) {
3057 if (1
3058 && [&]() {
3059 MatchData29 = MIs[1]->getOperand(1).getReg();
3060 return true;
3061 }() ) {
3062 LLVM_DEBUG(dbgs() << "Applying rule 'i2p_to_p2i'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'i2p_to_p2i'\n"
; } } while (false)
;
3063 Helper.applyCombineP2IToI2P(*MIs[0], MatchData29);
3064 return true;
3065 }
3066 }
3067 return false;
3068 }
3069 }
3070 }
3071 if (Partition == 38 /* TargetOpcode::G_ANYEXT */) {
3072 // Leaf name: anyext_trunc_fold
3073 // Rule: anyext_trunc_fold
3074 if (!RuleConfig->isRuleDisabled(30)) {
3075 if (1
3076 && [&]() {
3077 return Helper.matchCombineAnyExtTrunc(*MIs[0], MatchData30);
3078 return true;
3079 }() ) {
3080 LLVM_DEBUG(dbgs() << "Applying rule 'anyext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'anyext_trunc_fold'\n"
; } } while (false)
;
3081 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData30);
3082 return true;
3083 }
3084 }
3085 // Leaf name: ext_ext_fold
3086 // Rule: ext_ext_fold
3087 if (!RuleConfig->isRuleDisabled(60)) {
3088 if (1
3089 && [&]() {
3090 return Helper.matchCombineExtOfExt(*MIs[0], MatchData60);
3091 return true;
3092 }() ) {
3093 LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n"
; } } while (false)
;
3094 Helper.applyCombineExtOfExt(*MIs[0], MatchData60);
3095 return true;
3096 }
3097 }
3098 return false;
3099 }
3100 if (Partition == 39 /* TargetOpcode::G_FNEG */) {
3101 Partition = -1;
3102 if (MIs.size() <= 1) MIs.resize(2);
3103 MIs[1] = nullptr;
3104 if (MIs[0]->getOperand(1).isReg())
3105 MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg());
3106 if (MIs[1] == nullptr) Partition = 1;
3107 if (MIs[1] != nullptr) Partition = 0;
3108 if (Partition == -1) return false;
3109 if (Partition == 0 /* true */) {
3110 Partition = -1;
Value stored to 'Partition' is never read
3111 switch (MIs[1]->getOpcode()) {
3112 case TargetOpcode::G_FNEG: Partition = 0; break;
3113 default: Partition = 1; break;
3114 }
3115 // Default case but without conflicting with potential default case in selection.
3116 if (Partition == -1) return false;
3117 if (Partition == 0 /* TargetOpcode::G_FNEG */) {
3118 // Leaf name: fneg_fneg_fold
3119 // Rule: fneg_fneg_fold
3120 if (!RuleConfig->isRuleDisabled(31)) {
3121 if (1
3122 && [&]() {
3123 MatchData31 = MIs[1]->getOperand(1).getReg();
3124 return true;
3125 }() ) {
3126 LLVM_DEBUG(dbgs() << "Applying rule 'fneg_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fneg_fneg_fold'\n"
; } } while (false)
;
3127 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData31);
3128 return true;
3129 }
3130 }
3131 // Leaf name: constant_fp_op
3132 // Rule: constant_fp_op
3133 if (!RuleConfig->isRuleDisabled(70)) {
3134 if (1
3135 && [&]() {
3136 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3137 return true;
3138 }() ) {
3139 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3140 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3141 return true;
3142 }
3143 }
3144 return false;
3145 }
3146 if (Partition == 1 /* * or nullptr */) {
3147 // Leaf name: constant_fp_op
3148 // Rule: constant_fp_op
3149 if (!RuleConfig->isRuleDisabled(70)) {
3150 if (1
3151 && [&]() {
3152 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3153 return true;
3154 }() ) {
3155 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3156 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3157 return true;
3158 }
3159 }
3160 return false;
3161 }
3162 }
3163 if (Partition == 1 /* false */) {
3164 // Leaf name: constant_fp_op
3165 // Rule: constant_fp_op
3166 if (!RuleConfig->isRuleDisabled(70)) {
3167 if (1
3168 && [&]() {
3169 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3170 return true;
3171 }() ) {
3172 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3173 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3174 return true;
3175 }
3176 }
3177 return false;
3178 }
3179 }
3180 if (Partition == 40 /* TargetOpcode::G_BUILD_VECTOR_TRUNC */) {
3181 // Leaf name: buildvector_identity_fold
3182 // Rule: buildvector_identity_fold
3183 if (!RuleConfig->isRuleDisabled(34)) {
3184 if (1
3185 && [&]() {
3186 return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34);
3187 return true;
3188 }() ) {
3189 LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n"
; } } while (false)
;
3190 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34);
3191 return true;
3192 }
3193 }
3194 return false;
3195 }
3196 if (Partition == 41 /* TargetOpcode::G_BITCAST */) {
3197 Partition = -1;
3198 if (MIs.size() <= 1) MIs.resize(2);
3199 MIs[1] = nullptr;
3200 if (MIs[0]->getOperand(1).isReg())
3201 MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg());
3202 if (MIs[1] != nullptr) Partition = 0;
3203 if (Partition == -1) return false;
3204 if (Partition == 0 /* true */) {
3205 Partition = -1;
3206 switch (MIs[1]->getOpcode()) {
3207 case TargetOpcode::G_BITCAST: Partition = 0; break;
3208 }
3209 // Default case but without conflicting with potential default case in selection.
3210 if (Partition == -1) return false;
3211 if (Partition == 0 /* TargetOpcode::G_BITCAST */) {
3212 // Leaf name: bitcast_bitcast_fold
3213 // Rule: bitcast_bitcast_fold
3214 if (!RuleConfig->isRuleDisabled(37)) {
3215 if (1
3216 && [&]() {
3217 return MRI.getType(MIs[1]->getOperand(1).getReg()) == MRI.getType(MIs[0]->getOperand(0).getReg());
3218 return true;
3219 }() ) {
3220 LLVM_DEBUG(dbgs() << "Applying rule 'bitcast_bitcast_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitcast_bitcast_fold'\n"
; } } while (false)
;
3221 Helper.replaceSingleDefInstWithReg(*MIs[0], MIs[1]->getOperand(1).getReg());
3222 return true;
3223 }
3224 }
3225 return false;
3226 }
3227 }
3228 }
3229 if (Partition == 42 /* TargetOpcode::G_FPTRUNC */) {
3230 Partition = -1;
3231 if (MIs.size() <= 1) MIs.resize(2);
3232 MIs[1] = nullptr;
3233 if (MIs[0]->getOperand(1).isReg())
3234 MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg());
3235 if (MIs[1] == nullptr) Partition = 1;
3236 if (MIs[1] != nullptr) Partition = 0;
3237 if (Partition == -1) return false;
3238 if (Partition == 0 /* true */) {
3239 Partition = -1;
3240 switch (MIs[1]->getOpcode()) {
3241 case TargetOpcode::G_FPEXT: Partition = 0; break;
3242 default: Partition = 1; break;
3243 }
3244 // Default case but without conflicting with potential default case in selection.
3245 if (Partition == -1) return false;
3246 if (Partition == 0 /* TargetOpcode::G_FPEXT */) {
3247 // Leaf name: fptrunc_fpext_fold
3248 // Rule: fptrunc_fpext_fold
3249 if (!RuleConfig->isRuleDisabled(38)) {
3250 if (1
3251 && [&]() {
3252 return MRI.getType(MIs[1]->getOperand(1).getReg()) == MRI.getType(MIs[0]->getOperand(0).getReg());
3253 return true;
3254 }() ) {
3255 LLVM_DEBUG(dbgs() << "Applying rule 'fptrunc_fpext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fptrunc_fpext_fold'\n"
; } } while (false)
;
3256 Helper.replaceSingleDefInstWithReg(*MIs[0], MIs[1]->getOperand(1).getReg());
3257 return true;
3258 }
3259 }
3260 // Leaf name: constant_fp_op
3261 // Rule: constant_fp_op
3262 if (!RuleConfig->isRuleDisabled(70)) {
3263 if (1
3264 && [&]() {
3265 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3266 return true;
3267 }() ) {
3268 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3269 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3270 return true;
3271 }
3272 }
3273 return false;
3274 }
3275 if (Partition == 1 /* * or nullptr */) {
3276 // Leaf name: constant_fp_op
3277 // Rule: constant_fp_op
3278 if (!RuleConfig->isRuleDisabled(70)) {
3279 if (1
3280 && [&]() {
3281 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3282 return true;
3283 }() ) {
3284 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3285 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3286 return true;
3287 }
3288 }
3289 return false;
3290 }
3291 }
3292 if (Partition == 1 /* false */) {
3293 // Leaf name: constant_fp_op
3294 // Rule: constant_fp_op
3295 if (!RuleConfig->isRuleDisabled(70)) {
3296 if (1
3297 && [&]() {
3298 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3299 return true;
3300 }() ) {
3301 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3302 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3303 return true;
3304 }
3305 }
3306 return false;
3307 }
3308 }
3309 if (Partition == 43 /* TargetOpcode::G_PHI */) {
3310 // Leaf name: extend_through_phis
3311 // Rule: extend_through_phis
3312 if (!RuleConfig->isRuleDisabled(39)) {
3313 if (1
3314 && [&]() {
3315 return Helper.matchExtendThroughPhis(*MIs[0], MatchData39);
3316 return true;
3317 }() ) {
3318 LLVM_DEBUG(dbgs() << "Applying rule 'extend_through_phis'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'extend_through_phis'\n"
; } } while (false)
;
3319 Helper.applyExtendThroughPhis(*MIs[0], MatchData39);
3320 return true;
3321 }
3322 }
3323 return false;
3324 }
3325 if (Partition == 44 /* TargetOpcode::G_SEXT_INREG */) {
3326 // Leaf name: sext_inreg_of_load
3327 // Rule: sext_inreg_of_load
3328 if (!RuleConfig->isRuleDisabled(46)) {
3329 if (1
3330 && [&]() {
3331 return Helper.matchSextInRegOfLoad(*MIs[0], MatchData46);
3332 return true;
3333 }() ) {
3334 LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_of_load'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_of_load'\n"
; } } while (false)
;
3335 Helper.applySextInRegOfLoad(*MIs[0], MatchData46);
3336 return true;
3337 }
3338 }
3339 // Leaf name: redundant_sext_inreg
3340 // Rule: redundant_sext_inreg
3341 if (!RuleConfig->isRuleDisabled(53)) {
3342 if (1
3343 && [&]() {
3344 return Helper.matchRedundantSExtInReg(*MIs[0]);
3345 return true;
3346 }() ) {
3347 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_sext_inreg'\n"
; } } while (false)
;
3348 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1);
3349 return true;
3350 }
3351 }
3352 // Leaf name: sext_inreg_to_zext_inreg
3353 // Rule: sext_inreg_to_zext_inreg
3354 if (!RuleConfig->isRuleDisabled(59)) {
3355 if (1
3356 && [&]() {
3357
3358 unsigned BitWidth = MRI.getType(MIs[0]->getOperand(1).getReg()).getScalarSizeInBits();
3359 return Helper.getKnownBits()->maskedValueIsZero(MIs[0]->getOperand(1).getReg(),
3360 APInt::getOneBitSet(BitWidth, MIs[0]->getOperand(2).getImm() - 1));
3361 return true;
3362 }() ) {
3363 LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n"
; } } while (false)
;
3364
3365 Helper.getBuilder().setInstrAndDebugLoc(*MIs[0]);
3366 Helper.getBuilder().buildZExtInReg(MIs[0]->getOperand(0), MIs[0]->getOperand(1), MIs[0]->getOperand(2).getImm());
3367 MIs[0]->eraseFromParent();
3368 return true;
3369
3370 return true;
3371 }
3372 }
3373 // Leaf name: bitfield_extract_from_sext_inreg
3374 // Rule: bitfield_extract_from_sext_inreg
3375 if (!RuleConfig->isRuleDisabled(87)) {
3376 if (1
3377 && [&]() {
3378 return Helper.matchBitfieldExtractFromSExtInReg(*MIs[0], MatchData87);
3379 return true;
3380 }() ) {
3381 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n"
; } } while (false)
;
3382 Helper.applyBuildFn(*MIs[0], MatchData87);
3383 return true;
3384 }
3385 }
3386 return false;
3387 }
3388 if (Partition == 45 /* TargetOpcode::G_ZEXT */) {
3389 // Leaf name: zext_trunc_fold
3390 // Rule: zext_trunc_fold
3391 if (!RuleConfig->isRuleDisabled(56)) {
3392 if (1
3393 && [&]() {
3394 return Helper.matchCombineZextTrunc(*MIs[0], MatchData56);
3395 return true;
3396 }() ) {
3397 LLVM_DEBUG(dbgs() << "Applying rule 'zext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'zext_trunc_fold'\n"
; } } while (false)
;
3398 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData56);
3399 return true;
3400 }
3401 }
3402 // Leaf name: ext_ext_fold
3403 // Rule: ext_ext_fold
3404 if (!RuleConfig->isRuleDisabled(60)) {
3405 if (1
3406 && [&]() {
3407 return Helper.matchCombineExtOfExt(*MIs[0], MatchData60);
3408 return true;
3409 }() ) {
3410 LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n"
; } } while (false)
;
3411 Helper.applyCombineExtOfExt(*MIs[0], MatchData60);
3412 return true;
3413 }
3414 }
3415 return false;
3416 }
3417 if (Partition == 46 /* TargetOpcode::G_ICMP */) {
3418 // Leaf name: icmp_to_true_false_known_bits
3419 // Rule: icmp_to_true_false_known_bits
3420 if (!RuleConfig->isRuleDisabled(57)) {
3421 if (1
3422 && [&]() {
3423 return Helper.matchICmpToTrueFalseKnownBits(*MIs[0], MatchData57);
3424 return true;
3425 }() ) {
3426 LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n"
; } } while (false)
;
3427 Helper.replaceInstWithConstant(*MIs[0], MatchData57);
3428 return true;
3429 }
3430 }
3431 // Leaf name: icmp_to_lhs_known_bits
3432 // Rule: icmp_to_lhs_known_bits
3433 if (!RuleConfig->isRuleDisabled(58)) {
3434 if (1
3435 && [&]() {
3436 return Helper.matchICmpToLHSKnownBits(*MIs[0], MatchData58);
3437 return true;
3438 }() ) {
3439 LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n"
; } } while (false)
;
3440 Helper.applyBuildFn(*MIs[0], MatchData58);
3441 return true;
3442 }
3443 }
3444 // Leaf name: redundant_binop_in_equality
3445 // Rule: redundant_binop_in_equality
3446 if (!RuleConfig->isRuleDisabled(109)) {
3447 if (1
3448 && [&]() {
3449 return Helper.matchRedundantBinOpInEquality(*MIs[0], MatchData109);
3450 return true;
3451 }() ) {
3452 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_binop_in_equality'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_binop_in_equality'\n"
; } } while (false)
;
3453 Helper.applyBuildFn(*MIs[0], MatchData109);
3454 return true;
3455 }
3456 }
3457 // Leaf name: icmp_redundant_trunc
3458 // Rule: icmp_redundant_trunc
3459 if (!RuleConfig->isRuleDisabled(113)) {
3460 if (1
3461 && [&]() {
3462 return matchICmpRedundantTrunc(*MIs[0], MRI, Helper.getKnownBits(), MatchData113);
3463 return true;
3464 }() ) {
3465 LLVM_DEBUG(dbgs() << "Applying rule 'icmp_redundant_trunc'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'icmp_redundant_trunc'\n"
; } } while (false)
;
3466 applyICmpRedundantTrunc(*MIs[0], MRI, B, Observer, MatchData113);
3467 return true;
3468 }
3469 }
3470 return false;
3471 }
3472 if (Partition == 47 /* TargetOpcode::G_SEXT */) {
3473 // Leaf name: ext_ext_fold
3474 // Rule: ext_ext_fold
3475 if (!RuleConfig->isRuleDisabled(60)) {
3476 if (1
3477 && [&]() {
3478 return Helper.matchCombineExtOfExt(*MIs[0], MatchData60);
3479 return true;
3480 }() ) {
3481 LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n"
; } } while (false)
;
3482 Helper.applyCombineExtOfExt(*MIs[0], MatchData60);
3483 return true;
3484 }
3485 }
3486 return false;
3487 }
3488 if (Partition == 48 /* TargetOpcode::G_BR */) {
3489 // Leaf name: opt_brcond_by_inverting_cond
3490 // Rule: opt_brcond_by_inverting_cond
3491 if (!RuleConfig->isRuleDisabled(62)) {
3492 if (1
3493 && [&]() {
3494 return Helper.matchOptBrCondByInvertingCond(*MIs[0], MatchData62);
3495 return true;
3496 }() ) {
3497 LLVM_DEBUG(dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n"
; } } while (false)
;
3498 Helper.applyOptBrCondByInvertingCond(*MIs[0], MatchData62);
3499 return true;
3500 }
3501 }
3502 return false;
3503 }
3504 if (Partition == 49 /* TargetOpcode::G_MERGE_VALUES */) {
3505 // Leaf name: merge_unmerge
3506 // Rule: merge_unmerge
3507 if (!RuleConfig->isRuleDisabled(67)) {
3508 if (1
3509 && [&]() {
3510 return Helper.matchCombineMergeUnmerge(*MIs[0], MatchData67);
3511 return true;
3512 }() ) {
3513 LLVM_DEBUG(dbgs() << "Applying rule 'merge_unmerge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'merge_unmerge'\n"
; } } while (false)
;
3514 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData67);
3515 return true;
3516 }
3517 }
3518 return false;
3519 }
3520 if (Partition == 50 /* TargetOpcode::G_FSQRT */) {
3521 // Leaf name: constant_fp_op
3522 // Rule: constant_fp_op
3523 if (!RuleConfig->isRuleDisabled(70)) {
3524 if (1
3525 && [&]() {
3526 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3527 return true;
3528 }() ) {
3529 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3530 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3531 return true;
3532 }
3533 }
3534 return false;
3535 }
3536 if (Partition == 51 /* TargetOpcode::G_FLOG2 */) {
3537 // Leaf name: constant_fp_op
3538 // Rule: constant_fp_op
3539 if (!RuleConfig->isRuleDisabled(70)) {
3540 if (1
3541 && [&]() {
3542 return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3543 return true;
3544 }() ) {
3545 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n"
; } } while (false)
;
3546 Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70);
3547 return true;
3548 }
3549 }
3550 return false;
3551 }
3552 if (Partition == 52 /* TargetOpcode::G_UMULO */) {
3553 // Leaf name: mulo_by_2
3554 // Rule: mulo_by_2
3555 if (!RuleConfig->isRuleDisabled(73)) {
3556 if (1
3557 && [&]() {
3558 return Helper.matchMulOBy2(*MIs[0], MatchData73);
3559 return true;
3560 }() ) {
3561 LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n"
; } } while (false)
;
3562 Helper.applyBuildFnNoErase(*MIs[0], MatchData73);
3563 return true;
3564 }
3565 }
3566 // Leaf name: mulo_by_0
3567 // Rule: mulo_by_0
3568 if (!RuleConfig->isRuleDisabled(74)) {
3569 if (1
3570 && [&]() {
3571 return Helper.matchMulOBy0(*MIs[0], MatchData74);
3572 return true;
3573 }() ) {
3574 LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n"
; } } while (false)
;
3575 Helper.applyBuildFn(*MIs[0], MatchData74);
3576 return true;
3577 }
3578 }
3579 return false;
3580 }
3581 if (Partition == 53 /* TargetOpcode::G_SMULO */) {
3582 // Leaf name: mulo_by_2
3583 // Rule: mulo_by_2
3584 if (!RuleConfig->isRuleDisabled(73)) {
3585 if (1
3586 && [&]() {
3587 return Helper.matchMulOBy2(*MIs[0], MatchData73);
3588 return true;
3589 }() ) {
3590 LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n"
; } } while (false)
;
3591 Helper.applyBuildFnNoErase(*MIs[0], MatchData73);
3592 return true;
3593 }
3594 }
3595 // Leaf name: mulo_by_0
3596 // Rule: mulo_by_0
3597 if (!RuleConfig->isRuleDisabled(74)) {
3598 if (1
3599 && [&]() {
3600 return Helper.matchMulOBy0(*MIs[0], MatchData74);
3601 return true;
3602 }() ) {
3603 LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n"
; } } while (false)
;
3604 Helper.applyBuildFn(*MIs[0], MatchData74);
3605 return true;
3606 }
3607 }
3608 return false;
3609 }
3610 if (Partition == 54 /* TargetOpcode::G_UADDO */) {
3611 // Leaf name: addo_by_0
3612 // Rule: addo_by_0
3613 if (!RuleConfig->isRuleDisabled(75)) {
3614 if (1
3615 && [&]() {
3616 return Helper.matchAddOBy0(*MIs[0], MatchData75);
3617 return true;
3618 }() ) {
3619 LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n"
; } } while (false)
;
3620 Helper.applyBuildFn(*MIs[0], MatchData75);
3621 return true;
3622 }
3623 }
3624 return false;
3625 }
3626 if (Partition == 55 /* TargetOpcode::G_SADDO */) {
3627 // Leaf name: addo_by_0
3628 // Rule: addo_by_0
3629 if (!RuleConfig->isRuleDisabled(75)) {
3630 if (1
3631 && [&]() {
3632 return Helper.matchAddOBy0(*MIs[0], MatchData75);
3633 return true;
3634 }() ) {
3635 LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n"
; } } while (false)
;
3636 Helper.applyBuildFn(*MIs[0], MatchData75);
3637 return true;
3638 }
3639 }
3640 return false;
3641 }
3642 if (Partition == 56 /* TargetOpcode::G_UADDE */) {
3643 // Leaf name: adde_to_addo
3644 // Rule: adde_to_addo
3645 if (!RuleConfig->isRuleDisabled(76)) {
3646 if (1
3647 && [&]() {
3648 return Helper.matchAddEToAddO(*MIs[0], MatchData76);
3649 return true;
3650 }() ) {
3651 LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n"
; } } while (false)
;
3652 Helper.applyBuildFnNoErase(*MIs[0], MatchData76);
3653 return true;
3654 }
3655 }
3656 return false;
3657 }
3658 if (Partition == 57 /* TargetOpcode::G_SADDE */) {
3659 // Leaf name: adde_to_addo
3660 // Rule: adde_to_addo
3661 if (!RuleConfig->isRuleDisabled(76)) {
3662 if (1
3663 && [&]() {
3664 return Helper.matchAddEToAddO(*MIs[0], MatchData76);
3665 return true;
3666 }() ) {
3667 LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n"
; } } while (false)
;
3668 Helper.applyBuildFnNoErase(*MIs[0], MatchData76);
3669 return true;
3670 }
3671 }
3672 return false;
3673 }
3674 if (Partition == 58 /* TargetOpcode::G_USUBE */) {
3675 // Leaf name: adde_to_addo
3676 // Rule: adde_to_addo
3677 if (!RuleConfig->isRuleDisabled(76)) {
3678 if (1
3679 && [&]() {
3680 return Helper.matchAddEToAddO(*MIs[0], MatchData76);
3681 return true;
3682 }() ) {
3683 LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n"
; } } while (false)
;
3684 Helper.applyBuildFnNoErase(*MIs[0], MatchData76);
3685 return true;
3686 }
3687 }
3688 return false;
3689 }
3690 if (Partition == 59 /* TargetOpcode::G_SSUBE */) {
3691 // Leaf name: adde_to_addo
3692 // Rule: adde_to_addo
3693 if (!RuleConfig->isRuleDisabled(76)) {
3694 if (1
3695 && [&]() {
3696 return Helper.matchAddEToAddO(*MIs[0], MatchData76);
3697 return true;
3698 }() ) {
3699 LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n"
; } } while (false)
;
3700 Helper.applyBuildFnNoErase(*MIs[0], MatchData76);
3701 return true;
3702 }
3703 }
3704 return false;
3705 }
3706 if (Partition == 60 /* TargetOpcode::G_FMINNUM */) {
3707 // Leaf name: combine_minmax_nan
3708 // Rule: combine_minmax_nan
3709 if (!RuleConfig->isRuleDisabled(77)) {
3710 if (1
3711 && [&]() {
3712 return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77);
3713 return true;
3714 }() ) {
3715 LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n"
; } } while (false)
;
3716 Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77);
3717 return true;
3718 }
3719 }
3720 // Leaf name: fold_binop_into_select
3721 // Rule: fold_binop_into_select
3722 if (!RuleConfig->isRuleDisabled(106)) {
3723 if (1
3724 && [&]() {
3725 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
3726 return true;
3727 }() ) {
3728 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
3729 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
3730 return true;
3731 }
3732 }
3733 return false;
3734 }
3735 if (Partition == 61 /* TargetOpcode::G_FMAXNUM */) {
3736 // Leaf name: combine_minmax_nan
3737 // Rule: combine_minmax_nan
3738 if (!RuleConfig->isRuleDisabled(77)) {
3739 if (1
3740 && [&]() {
3741 return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77);
3742 return true;
3743 }() ) {
3744 LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n"
; } } while (false)
;
3745 Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77);
3746 return true;
3747 }
3748 }
3749 // Leaf name: fold_binop_into_select
3750 // Rule: fold_binop_into_select
3751 if (!RuleConfig->isRuleDisabled(106)) {
3752 if (1
3753 && [&]() {
3754 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
3755 return true;
3756 }() ) {
3757 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
3758 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
3759 return true;
3760 }
3761 }
3762 return false;
3763 }
3764 if (Partition == 62 /* TargetOpcode::G_FMINIMUM */) {
3765 // Leaf name: combine_minmax_nan
3766 // Rule: combine_minmax_nan
3767 if (!RuleConfig->isRuleDisabled(77)) {
3768 if (1
3769 && [&]() {
3770 return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77);
3771 return true;
3772 }() ) {
3773 LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n"
; } } while (false)
;
3774 Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77);
3775 return true;
3776 }
3777 }
3778 // Leaf name: fold_binop_into_select
3779 // Rule: fold_binop_into_select
3780 if (!RuleConfig->isRuleDisabled(106)) {
3781 if (1
3782 && [&]() {
3783 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
3784 return true;
3785 }() ) {
3786 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
3787 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
3788 return true;
3789 }
3790 }
3791 return false;
3792 }
3793 if (Partition == 63 /* TargetOpcode::G_FMAXIMUM */) {
3794 // Leaf name: combine_minmax_nan
3795 // Rule: combine_minmax_nan
3796 if (!RuleConfig->isRuleDisabled(77)) {
3797 if (1
3798 && [&]() {
3799 return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77);
3800 return true;
3801 }() ) {
3802 LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n"
; } } while (false)
;
3803 Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77);
3804 return true;
3805 }
3806 }
3807 // Leaf name: fold_binop_into_select
3808 // Rule: fold_binop_into_select
3809 if (!RuleConfig->isRuleDisabled(106)) {
3810 if (1
3811 && [&]() {
3812 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
3813 return true;
3814 }() ) {
3815 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
3816 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
3817 return true;
3818 }
3819 }
3820 return false;
3821 }
3822 if (Partition == 64 /* TargetOpcode::G_SSHLSAT */) {
3823 // Leaf name: shift_immed_chain
3824 // Rule: shift_immed_chain
3825 if (!RuleConfig->isRuleDisabled(80)) {
3826 if (1
3827 && [&]() {
3828 return Helper.matchShiftImmedChain(*MIs[0], MatchData80);
3829 return true;
3830 }() ) {
3831 LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n"
; } } while (false)
;
3832 Helper.applyShiftImmedChain(*MIs[0], MatchData80);
3833 return true;
3834 }
3835 }
3836 // Leaf name: shift_of_shifted_logic_chain
3837 // Rule: shift_of_shifted_logic_chain
3838 if (!RuleConfig->isRuleDisabled(81)) {
3839 if (1
3840 && [&]() {
3841 return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81);
3842 return true;
3843 }() ) {
3844 LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n"
; } } while (false)
;
3845 Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81);
3846 return true;
3847 }
3848 }
3849 return false;
3850 }
3851 if (Partition == 65 /* TargetOpcode::G_USHLSAT */) {
3852 // Leaf name: shift_immed_chain
3853 // Rule: shift_immed_chain
3854 if (!RuleConfig->isRuleDisabled(80)) {
3855 if (1
3856 && [&]() {
3857 return Helper.matchShiftImmedChain(*MIs[0], MatchData80);
3858 return true;
3859 }() ) {
3860 LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n"
; } } while (false)
;
3861 Helper.applyShiftImmedChain(*MIs[0], MatchData80);
3862 return true;
3863 }
3864 }
3865 // Leaf name: shift_of_shifted_logic_chain
3866 // Rule: shift_of_shifted_logic_chain
3867 if (!RuleConfig->isRuleDisabled(81)) {
3868 if (1
3869 && [&]() {
3870 return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81);
3871 return true;
3872 }() ) {
3873 LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n"
; } } while (false)
;
3874 Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81);
3875 return true;
3876 }
3877 }
3878 return false;
3879 }
3880 if (Partition == 66 /* TargetOpcode::G_FSHL */) {
3881 // Leaf name: funnel_shift_to_rotate
3882 // Rule: funnel_shift_to_rotate
3883 if (!RuleConfig->isRuleDisabled(85)) {
3884 if (1
3885 && [&]() {
3886 return Helper.matchFunnelShiftToRotate(*MIs[0]);
3887 return true;
3888 }() ) {
3889 LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n"
; } } while (false)
;
3890 Helper.applyFunnelShiftToRotate(*MIs[0]);
3891 return true;
3892 }
3893 }
3894 return false;
3895 }
3896 if (Partition == 67 /* TargetOpcode::G_FSHR */) {
3897 // Leaf name: funnel_shift_to_rotate
3898 // Rule: funnel_shift_to_rotate
3899 if (!RuleConfig->isRuleDisabled(85)) {
3900 if (1
3901 && [&]() {
3902 return Helper.matchFunnelShiftToRotate(*MIs[0]);
3903 return true;
3904 }() ) {
3905 LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n"
; } } while (false)
;
3906 Helper.applyFunnelShiftToRotate(*MIs[0]);
3907 return true;
3908 }
3909 }
3910 return false;
3911 }
3912 if (Partition == 68 /* TargetOpcode::G_UMULH */) {
3913 // Leaf name: mulh_to_lshr
3914 // Rule: mulh_to_lshr
3915 if (!RuleConfig->isRuleDisabled(95)) {
3916 if (1
3917 && [&]() {
3918 return Helper.matchUMulHToLShr(*MIs[0]);
3919 return true;
3920 }() ) {
3921 LLVM_DEBUG(dbgs() << "Applying rule 'mulh_to_lshr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulh_to_lshr'\n"
; } } while (false)
;
3922 Helper.applyUMulHToLShr(*MIs[0]);
3923 return true;
3924 }
3925 }
3926 return false;
3927 }
3928 if (Partition == 69 /* TargetOpcode::G_FADD */) {
3929 // Leaf name: redundant_neg_operands
3930 // Rule: redundant_neg_operands
3931 if (!RuleConfig->isRuleDisabled(96)) {
3932 if (1
3933 && [&]() {
3934 return Helper.matchRedundantNegOperands(*MIs[0], MatchData96);
3935 return true;
3936 }() ) {
3937 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
3938 Helper.applyBuildFnNoErase(*MIs[0], MatchData96);
3939 return true;
3940 }
3941 }
3942 // Leaf name: combine_fadd_fmul_to_fmad_or_fma
3943 // Rule: combine_fadd_fmul_to_fmad_or_fma
3944 if (!RuleConfig->isRuleDisabled(98)) {
3945 if (1
3946 && [&]() {
3947 return Helper.matchCombineFAddFMulToFMadOrFMA(*MIs[0],
3948 MatchData98);
3949 return true;
3950 }() ) {
3951 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3952 Helper.applyBuildFn(*MIs[0], MatchData98);
3953 return true;
3954 }
3955 }
3956 // Leaf name: combine_fadd_fpext_fmul_to_fmad_or_fma
3957 // Rule: combine_fadd_fpext_fmul_to_fmad_or_fma
3958 if (!RuleConfig->isRuleDisabled(99)) {
3959 if (1
3960 && [&]() {
3961 return Helper.matchCombineFAddFpExtFMulToFMadOrFMA(*MIs[0],
3962 MatchData99);
3963 return true;
3964 }() ) {
3965 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3966 Helper.applyBuildFn(*MIs[0], MatchData99);
3967 return true;
3968 }
3969 }
3970 // Leaf name: combine_fadd_fma_fmul_to_fmad_or_fma
3971 // Rule: combine_fadd_fma_fmul_to_fmad_or_fma
3972 if (!RuleConfig->isRuleDisabled(100)) {
3973 if (1
3974 && [&]() {
3975 return Helper.matchCombineFAddFMAFMulToFMadOrFMA(*MIs[0],
3976 MatchData100);
3977 return true;
3978 }() ) {
3979 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3980 Helper.applyBuildFn(*MIs[0], MatchData100);
3981 return true;
3982 }
3983 }
3984 // Leaf name: combine_fadd_fpext_fma_fmul_to_fmad_or_fma
3985 // Rule: combine_fadd_fpext_fma_fmul_to_fmad_or_fma
3986 if (!RuleConfig->isRuleDisabled(101)) {
3987 if (1
3988 && [&]() {
3989 return Helper.matchCombineFAddFpExtFMulToFMadOrFMAAggressive(
3990 *MIs[0], MatchData101);
3991 return true;
3992 }() ) {
3993 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
3994 Helper.applyBuildFn(*MIs[0], MatchData101);
3995 return true;
3996 }
3997 }
3998 // Leaf name: fold_binop_into_select
3999 // Rule: fold_binop_into_select
4000 if (!RuleConfig->isRuleDisabled(106)) {
4001 if (1
4002 && [&]() {
4003 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
4004 return true;
4005 }() ) {
4006 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4007 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
4008 return true;
4009 }
4010 }
4011 return false;
4012 }
4013 if (Partition == 70 /* TargetOpcode::G_FSUB */) {
4014 // Leaf name: redundant_neg_operands
4015 // Rule: redundant_neg_operands
4016 if (!RuleConfig->isRuleDisabled(96)) {
4017 if (1
4018 && [&]() {
4019 return Helper.matchRedundantNegOperands(*MIs[0], MatchData96);
4020 return true;
4021 }() ) {
4022 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
4023 Helper.applyBuildFnNoErase(*MIs[0], MatchData96);
4024 return true;
4025 }
4026 }
4027 // Leaf name: combine_fsub_fmul_to_fmad_or_fma
4028 // Rule: combine_fsub_fmul_to_fmad_or_fma
4029 if (!RuleConfig->isRuleDisabled(102)) {
4030 if (1
4031 && [&]() {
4032 return Helper.matchCombineFSubFMulToFMadOrFMA(*MIs[0],
4033 MatchData102);
4034 return true;
4035 }() ) {
4036 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
4037 Helper.applyBuildFn(*MIs[0], MatchData102);
4038 return true;
4039 }
4040 }
4041 // Leaf name: combine_fsub_fneg_fmul_to_fmad_or_fma
4042 // Rule: combine_fsub_fneg_fmul_to_fmad_or_fma
4043 if (!RuleConfig->isRuleDisabled(103)) {
4044 if (1
4045 && [&]() {
4046 return Helper.matchCombineFSubFNegFMulToFMadOrFMA(*MIs[0],
4047 MatchData103);
4048 return true;
4049 }() ) {
4050 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
4051 Helper.applyBuildFn(*MIs[0], MatchData103);
4052 return true;
4053 }
4054 }
4055 // Leaf name: combine_fsub_fpext_fmul_to_fmad_or_fma
4056 // Rule: combine_fsub_fpext_fmul_to_fmad_or_fma
4057 if (!RuleConfig->isRuleDisabled(104)) {
4058 if (1
4059 && [&]() {
4060 return Helper.matchCombineFSubFpExtFMulToFMadOrFMA(*MIs[0],
4061 MatchData104);
4062 return true;
4063 }() ) {
4064 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
4065 Helper.applyBuildFn(*MIs[0], MatchData104);
4066 return true;
4067 }
4068 }
4069 // Leaf name: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma
4070 // Rule: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma
4071 if (!RuleConfig->isRuleDisabled(105)) {
4072 if (1
4073 && [&]() {
4074 return Helper.matchCombineFSubFpExtFNegFMulToFMadOrFMA(
4075 *MIs[0], MatchData105);
4076 return true;
4077 }() ) {
4078 LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n"
; } } while (false)
;
4079 Helper.applyBuildFn(*MIs[0], MatchData105);
4080 return true;
4081 }
4082 }
4083 // Leaf name: fold_binop_into_select
4084 // Rule: fold_binop_into_select
4085 if (!RuleConfig->isRuleDisabled(106)) {
4086 if (1
4087 && [&]() {
4088 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
4089 return true;
4090 }() ) {
4091 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4092 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
4093 return true;
4094 }
4095 }
4096 // Leaf name: fsub_to_fneg
4097 // Rule: fsub_to_fneg
4098 if (!RuleConfig->isRuleDisabled(110)) {
4099 if (1
4100 && [&]() {
4101 return Helper.matchFsubToFneg(*MIs[0], MatchData110);
4102 return true;
4103 }() ) {
4104 LLVM_DEBUG(dbgs() << "Applying rule 'fsub_to_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fsub_to_fneg'\n"
; } } while (false)
;
4105 Helper.applyFsubToFneg(*MIs[0], MatchData110);
4106 return true;
4107 }
4108 }
4109 return false;
4110 }
4111 if (Partition == 71 /* TargetOpcode::G_FMUL */) {
4112 // Leaf name: redundant_neg_operands
4113 // Rule: redundant_neg_operands
4114 if (!RuleConfig->isRuleDisabled(96)) {
4115 if (1
4116 && [&]() {
4117 return Helper.matchRedundantNegOperands(*MIs[0], MatchData96);
4118 return true;
4119 }() ) {
4120 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
4121 Helper.applyBuildFnNoErase(*MIs[0], MatchData96);
4122 return true;
4123 }
4124 }
4125 // Leaf name: fold_binop_into_select
4126 // Rule: fold_binop_into_select
4127 if (!RuleConfig->isRuleDisabled(106)) {
4128 if (1
4129 && [&]() {
4130 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
4131 return true;
4132 }() ) {
4133 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4134 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
4135 return true;
4136 }
4137 }
4138 return false;
4139 }
4140 if (Partition == 72 /* TargetOpcode::G_FDIV */) {
4141 // Leaf name: redundant_neg_operands
4142 // Rule: redundant_neg_operands
4143 if (!RuleConfig->isRuleDisabled(96)) {
4144 if (1
4145 && [&]() {
4146 return Helper.matchRedundantNegOperands(*MIs[0], MatchData96);
4147 return true;
4148 }() ) {
4149 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
4150 Helper.applyBuildFnNoErase(*MIs[0], MatchData96);
4151 return true;
4152 }
4153 }
4154 // Leaf name: fold_binop_into_select
4155 // Rule: fold_binop_into_select
4156 if (!RuleConfig->isRuleDisabled(106)) {
4157 if (1
4158 && [&]() {
4159 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
4160 return true;
4161 }() ) {
4162 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4163 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
4164 return true;
4165 }
4166 }
4167 return false;
4168 }
4169 if (Partition == 73 /* TargetOpcode::G_FMAD */) {
4170 // Leaf name: redundant_neg_operands
4171 // Rule: redundant_neg_operands
4172 if (!RuleConfig->isRuleDisabled(96)) {
4173 if (1
4174 && [&]() {
4175 return Helper.matchRedundantNegOperands(*MIs[0], MatchData96);
4176 return true;
4177 }() ) {
4178 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
4179 Helper.applyBuildFnNoErase(*MIs[0], MatchData96);
4180 return true;
4181 }
4182 }
4183 return false;
4184 }
4185 if (Partition == 74 /* TargetOpcode::G_FMA */) {
4186 // Leaf name: redundant_neg_operands
4187 // Rule: redundant_neg_operands
4188 if (!RuleConfig->isRuleDisabled(96)) {
4189 if (1
4190 && [&]() {
4191 return Helper.matchRedundantNegOperands(*MIs[0], MatchData96);
4192 return true;
4193 }() ) {
4194 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n"
; } } while (false)
;
4195 Helper.applyBuildFnNoErase(*MIs[0], MatchData96);
4196 return true;
4197 }
4198 }
4199 return false;
4200 }
4201 if (Partition == 75 /* TargetOpcode::G_SMIN */) {
4202 // Leaf name: fold_binop_into_select
4203 // Rule: fold_binop_into_select
4204 if (!RuleConfig->isRuleDisabled(106)) {
4205 if (1
4206 && [&]() {
4207 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
4208 return true;
4209 }() ) {
4210 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4211 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
4212 return true;
4213 }
4214 }
4215 return false;
4216 }
4217 if (Partition == 76 /* TargetOpcode::G_SMAX */) {
4218 // Leaf name: fold_binop_into_select
4219 // Rule: fold_binop_into_select
4220 if (!RuleConfig->isRuleDisabled(106)) {
4221 if (1
4222 && [&]() {
4223 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
4224 return true;
4225 }() ) {
4226 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4227 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
4228 return true;
4229 }
4230 }
4231 return false;
4232 }
4233 if (Partition == 77 /* TargetOpcode::G_UMIN */) {
4234 // Leaf name: fold_binop_into_select
4235 // Rule: fold_binop_into_select
4236 if (!RuleConfig->isRuleDisabled(106)) {
4237 if (1
4238 && [&]() {
4239 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
4240 return true;
4241 }() ) {
4242 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4243 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
4244 return true;
4245 }
4246 }
4247 return false;
4248 }
4249 if (Partition == 78 /* TargetOpcode::G_UMAX */) {
4250 // Leaf name: fold_binop_into_select
4251 // Rule: fold_binop_into_select
4252 if (!RuleConfig->isRuleDisabled(106)) {
4253 if (1
4254 && [&]() {
4255 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
4256 return true;
4257 }() ) {
4258 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4259 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
4260 return true;
4261 }
4262 }
4263 return false;
4264 }
4265 if (Partition == 79 /* TargetOpcode::G_FREM */) {
4266 // Leaf name: fold_binop_into_select
4267 // Rule: fold_binop_into_select
4268 if (!RuleConfig->isRuleDisabled(106)) {
4269 if (1
4270 && [&]() {
4271 return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106);
4272 return true;
4273 }() ) {
4274 LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n"
; } } while (false)
;
4275 return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106);
4276 return true;
4277 }
4278 }
4279 return false;
4280 }
4281 if (Partition == 80 /* TargetOpcode::G_FCONSTANT */) {
4282 // Leaf name: fconstant_to_constant
4283 // Rule: fconstant_to_constant
4284 if (!RuleConfig->isRuleDisabled(112)) {
4285 if (1
4286 && [&]() {
4287 return matchFConstantToConstant(*MIs[0], MRI);
4288 return true;
4289 }() ) {
4290 LLVM_DEBUG(dbgs() << "Applying rule 'fconstant_to_constant'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fconstant_to_constant'\n"
; } } while (false)
;
4291 applyFConstantToConstant(*MIs[0]);
4292 return true;
4293 }
4294 }
4295 return false;
4296 }
4297 if (Partition == 81 /* TargetOpcode::G_GLOBAL_VALUE */) {
4298 // Leaf name: fold_global_offset
4299 // Rule: fold_global_offset
4300 if (!RuleConfig->isRuleDisabled(114)) {
4301 if (1
4302 && [&]() {
4303 return matchFoldGlobalOffset(*MIs[0], MRI, MatchData114);
4304 return true;
4305 }() ) {
4306 LLVM_DEBUG(dbgs() << "Applying rule 'fold_global_offset'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("aarch64-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_global_offset'\n"
; } } while (false)
;
4307 return applyFoldGlobalOffset(*MIs[0], MRI, B, Observer, MatchData114);
4308 return true;
4309 }
4310 }
4311 return false;
4312 }
4313
4314 return false;
4315}
4316#endif // ifdef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP