| File: | build/source/build-llvm/tools/clang/stage2-bins/lib/Target/AMDGPU/AMDGPUGenPostLegalizeGICombiner.inc |
| Warning: | line 3132, column 7 Value stored to 'Partition' is never read |
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| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Global Combiner *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS |
| 10 | #include "llvm/ADT/SparseBitVector.h" |
| 11 | namespace llvm { |
| 12 | extern cl::OptionCategory GICombinerOptionCategory; |
| 13 | } // end namespace llvm |
| 14 | #endif // ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS |
| 15 | |
| 16 | #ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H |
| 17 | class AMDGPUGenPostLegalizerCombinerHelperRuleConfig { |
| 18 | SparseBitVector<> DisabledRules; |
| 19 | |
| 20 | public: |
| 21 | bool parseCommandLineOption(); |
| 22 | bool isRuleDisabled(unsigned ID) const; |
| 23 | bool setRuleEnabled(StringRef RuleIdentifier); |
| 24 | bool setRuleDisabled(StringRef RuleIdentifier); |
| 25 | }; |
| 26 | |
| 27 | class AMDGPUGenPostLegalizerCombinerHelper : public AMDGPUPostLegalizerCombinerHelperState { |
| 28 | const AMDGPUGenPostLegalizerCombinerHelperRuleConfig *RuleConfig; |
| 29 | |
| 30 | public: |
| 31 | template <typename... Args>AMDGPUGenPostLegalizerCombinerHelper(const AMDGPUGenPostLegalizerCombinerHelperRuleConfig &RuleConfig, Args &&... args) : AMDGPUPostLegalizerCombinerHelperState(std::forward<Args>(args)...), RuleConfig(&RuleConfig) {} |
| 32 | |
| 33 | bool tryCombineAll( |
| 34 | GISelChangeObserver &Observer, |
| 35 | MachineInstr &MI, |
| 36 | MachineIRBuilder &B) const; |
| 37 | }; |
| 38 | |
| 39 | static std::optional<uint64_t> getRuleIdxForIdentifier(StringRef RuleIdentifier) { |
| 40 | uint64_t I; |
| 41 | // getAtInteger(...) returns false on success |
| 42 | bool Parsed = !RuleIdentifier.getAsInteger(0, I); |
| 43 | if (Parsed) |
| 44 | return I; |
| 45 | |
| 46 | #ifndef NDEBUG |
| 47 | switch (RuleIdentifier.size()) { |
| 48 | default: break; |
| 49 | case 9: // 4 strings to match. |
| 50 | switch (RuleIdentifier[0]) { |
| 51 | default: break; |
| 52 | case 'a': // 1 string to match. |
| 53 | if (memcmp(RuleIdentifier.data()+1, "ddo_by_0", 8) != 0) |
| 54 | break; |
| 55 | return 73; // "addo_by_0" |
| 56 | case 'c': // 1 string to match. |
| 57 | if (memcmp(RuleIdentifier.data()+1, "opy_prop", 8) != 0) |
| 58 | break; |
| 59 | return 0; // "copy_prop" |
| 60 | case 'm': // 2 strings to match. |
| 61 | if (memcmp(RuleIdentifier.data()+1, "ulo_by_", 7) != 0) |
| 62 | break; |
| 63 | switch (RuleIdentifier[8]) { |
| 64 | default: break; |
| 65 | case '0': // 1 string to match. |
| 66 | return 72; // "mulo_by_0" |
| 67 | case '2': // 1 string to match. |
| 68 | return 71; // "mulo_by_2" |
| 69 | } |
| 70 | break; |
| 71 | } |
| 72 | break; |
| 73 | case 10: // 3 strings to match. |
| 74 | switch (RuleIdentifier[0]) { |
| 75 | default: break; |
| 76 | case 'i': // 1 string to match. |
| 77 | if (memcmp(RuleIdentifier.data()+1, "2p_to_p2i", 9) != 0) |
| 78 | break; |
| 79 | return 29; // "i2p_to_p2i" |
| 80 | case 'm': // 1 string to match. |
| 81 | if (memcmp(RuleIdentifier.data()+1, "ul_to_shl", 9) != 0) |
| 82 | break; |
| 83 | return 1; // "mul_to_shl" |
| 84 | case 'p': // 1 string to match. |
| 85 | if (memcmp(RuleIdentifier.data()+1, "2i_to_i2p", 9) != 0) |
| 86 | break; |
| 87 | return 28; // "p2i_to_i2p" |
| 88 | } |
| 89 | break; |
| 90 | case 11: // 4 strings to match. |
| 91 | switch (RuleIdentifier[0]) { |
| 92 | default: break; |
| 93 | case 'a': // 1 string to match. |
| 94 | if (memcmp(RuleIdentifier.data()+1, "dd_sub_reg", 10) != 0) |
| 95 | break; |
| 96 | return 33; // "add_sub_reg" |
| 97 | case 's': // 1 string to match. |
| 98 | if (memcmp(RuleIdentifier.data()+1, "ub_add_reg", 10) != 0) |
| 99 | break; |
| 100 | return 105; // "sub_add_reg" |
| 101 | case 't': // 1 string to match. |
| 102 | if (memcmp(RuleIdentifier.data()+1, "runc_shift", 10) != 0) |
| 103 | break; |
| 104 | return 67; // "trunc_shift" |
| 105 | case 'u': // 1 string to match. |
| 106 | if (memcmp(RuleIdentifier.data()+1, "nmerge_cst", 10) != 0) |
| 107 | break; |
| 108 | return 62; // "unmerge_cst" |
| 109 | } |
| 110 | break; |
| 111 | case 12: // 6 strings to match. |
| 112 | switch (RuleIdentifier[0]) { |
| 113 | default: break; |
| 114 | case 'a': // 1 string to match. |
| 115 | if (memcmp(RuleIdentifier.data()+1, "dde_to_addo", 11) != 0) |
| 116 | break; |
| 117 | return 74; // "adde_to_addo" |
| 118 | case 'e': // 1 string to match. |
| 119 | if (memcmp(RuleIdentifier.data()+1, "xt_ext_fold", 11) != 0) |
| 120 | break; |
| 121 | return 58; // "ext_ext_fold" |
| 122 | case 'f': // 1 string to match. |
| 123 | if (memcmp(RuleIdentifier.data()+1, "sub_to_fneg", 11) != 0) |
| 124 | break; |
| 125 | return 108; // "fsub_to_fneg" |
| 126 | case 'm': // 1 string to match. |
| 127 | if (memcmp(RuleIdentifier.data()+1, "ulh_to_lshr", 11) != 0) |
| 128 | break; |
| 129 | return 93; // "mulh_to_lshr" |
| 130 | case 'n': // 1 string to match. |
| 131 | if (memcmp(RuleIdentifier.data()+1, "ot_cmp_fold", 11) != 0) |
| 132 | break; |
| 133 | return 59; // "not_cmp_fold" |
| 134 | case 'r': // 1 string to match. |
| 135 | if (memcmp(RuleIdentifier.data()+1, "edundant_or", 11) != 0) |
| 136 | break; |
| 137 | return 52; // "redundant_or" |
| 138 | } |
| 139 | break; |
| 140 | case 13: // 9 strings to match. |
| 141 | switch (RuleIdentifier[0]) { |
| 142 | default: break; |
| 143 | case 'c': // 1 string to match. |
| 144 | if (memcmp(RuleIdentifier.data()+1, "onstant_fold", 12) != 0) |
| 145 | break; |
| 146 | return 89; // "constant_fold" |
| 147 | case 'f': // 1 string to match. |
| 148 | if (memcmp(RuleIdentifier.data()+1, "oldable_fneg", 12) != 0) |
| 149 | break; |
| 150 | return 114; // "foldable_fneg" |
| 151 | case 'l': // 1 string to match. |
| 152 | if (memcmp(RuleIdentifier.data()+1, "oad_and_mask", 12) != 0) |
| 153 | break; |
| 154 | return 9; // "load_and_mask" |
| 155 | case 'm': // 1 string to match. |
| 156 | if (memcmp(RuleIdentifier.data()+1, "erge_unmerge", 12) != 0) |
| 157 | break; |
| 158 | return 65; // "merge_unmerge" |
| 159 | case 'r': // 1 string to match. |
| 160 | if (memcmp(RuleIdentifier.data()+1, "edundant_and", 12) != 0) |
| 161 | break; |
| 162 | return 50; // "redundant_and" |
| 163 | case 's': // 1 string to match. |
| 164 | if (memcmp(RuleIdentifier.data()+1, "div_by_const", 12) != 0) |
| 165 | break; |
| 166 | return 92; // "sdiv_by_const" |
| 167 | case 'u': // 3 strings to match. |
| 168 | switch (RuleIdentifier[1]) { |
| 169 | default: break; |
| 170 | case 'd': // 1 string to match. |
| 171 | if (memcmp(RuleIdentifier.data()+2, "iv_by_const", 11) != 0) |
| 172 | break; |
| 173 | return 91; // "udiv_by_const" |
| 174 | case 'n': // 2 strings to match. |
| 175 | if (memcmp(RuleIdentifier.data()+2, "merge_", 6) != 0) |
| 176 | break; |
| 177 | switch (RuleIdentifier[8]) { |
| 178 | default: break; |
| 179 | case 'm': // 1 string to match. |
| 180 | if (memcmp(RuleIdentifier.data()+9, "erge", 4) != 0) |
| 181 | break; |
| 182 | return 61; // "unmerge_merge" |
| 183 | case 'u': // 1 string to match. |
| 184 | if (memcmp(RuleIdentifier.data()+9, "ndef", 4) != 0) |
| 185 | break; |
| 186 | return 21; // "unmerge_undef" |
| 187 | } |
| 188 | break; |
| 189 | } |
| 190 | break; |
| 191 | } |
| 192 | break; |
| 193 | case 14: // 9 strings to match. |
| 194 | switch (RuleIdentifier[0]) { |
| 195 | default: break; |
| 196 | case 'b': // 1 string to match. |
| 197 | if (memcmp(RuleIdentifier.data()+1, "inop_same_val", 13) != 0) |
| 198 | break; |
| 199 | return 25; // "binop_same_val" |
| 200 | case 'c': // 2 strings to match. |
| 201 | switch (RuleIdentifier[1]) { |
| 202 | default: break; |
| 203 | case 'o': // 1 string to match. |
| 204 | if (memcmp(RuleIdentifier.data()+2, "nstant_fp_op", 12) != 0) |
| 205 | break; |
| 206 | return 68; // "constant_fp_op" |
| 207 | case 'v': // 1 string to match. |
| 208 | if (memcmp(RuleIdentifier.data()+2, "t_f32_ubyteN", 12) != 0) |
| 209 | break; |
| 210 | return 112; // "cvt_f32_ubyteN" |
| 211 | } |
| 212 | break; |
| 213 | case 'f': // 2 strings to match. |
| 214 | switch (RuleIdentifier[1]) { |
| 215 | default: break; |
| 216 | case 'a': // 1 string to match. |
| 217 | if (memcmp(RuleIdentifier.data()+2, "bs_fneg_fold", 12) != 0) |
| 218 | break; |
| 219 | return 90; // "fabs_fneg_fold" |
| 220 | case 'n': // 1 string to match. |
| 221 | if (memcmp(RuleIdentifier.data()+2, "eg_fneg_fold", 12) != 0) |
| 222 | break; |
| 223 | return 31; // "fneg_fneg_fold" |
| 224 | } |
| 225 | break; |
| 226 | case 'm': // 1 string to match. |
| 227 | if (memcmp(RuleIdentifier.data()+1, "ul_by_neg_one", 13) != 0) |
| 228 | break; |
| 229 | return 3; // "mul_by_neg_one" |
| 230 | case 'r': // 1 string to match. |
| 231 | if (memcmp(RuleIdentifier.data()+1, "eassoc_ptradd", 13) != 0) |
| 232 | break; |
| 233 | return 41; // "reassoc_ptradd" |
| 234 | case 't': // 1 string to match. |
| 235 | if (memcmp(RuleIdentifier.data()+1, "runc_ext_fold", 13) != 0) |
| 236 | break; |
| 237 | return 66; // "trunc_ext_fold" |
| 238 | case 'u': // 1 string to match. |
| 239 | if (memcmp(RuleIdentifier.data()+1, "char_to_float", 13) != 0) |
| 240 | break; |
| 241 | return 111; // "uchar_to_float" |
| 242 | } |
| 243 | break; |
| 244 | case 15: // 7 strings to match. |
| 245 | switch (RuleIdentifier[0]) { |
| 246 | default: break; |
| 247 | case 'e': // 1 string to match. |
| 248 | if (memcmp(RuleIdentifier.data()+1, "xtending_loads", 14) != 0) |
| 249 | break; |
| 250 | return 8; // "extending_loads" |
| 251 | case 'i': // 1 string to match. |
| 252 | if (memcmp(RuleIdentifier.data()+1, "dempotent_prop", 14) != 0) |
| 253 | break; |
| 254 | return 4; // "idempotent_prop" |
| 255 | case 'l': // 1 string to match. |
| 256 | if (memcmp(RuleIdentifier.data()+1, "oad_or_combine", 14) != 0) |
| 257 | break; |
| 258 | return 80; // "load_or_combine" |
| 259 | case 'o': // 1 string to match. |
| 260 | if (memcmp(RuleIdentifier.data()+1, "verlapping_and", 14) != 0) |
| 261 | break; |
| 262 | return 70; // "overlapping_and" |
| 263 | case 'r': // 1 string to match. |
| 264 | if (memcmp(RuleIdentifier.data()+1, "cp_sqrt_to_rsq", 14) != 0) |
| 265 | break; |
| 266 | return 115; // "rcp_sqrt_to_rsq" |
| 267 | case 's': // 1 string to match. |
| 268 | if (memcmp(RuleIdentifier.data()+1, "elect_same_val", 14) != 0) |
| 269 | break; |
| 270 | return 23; // "select_same_val" |
| 271 | case 'z': // 1 string to match. |
| 272 | if (memcmp(RuleIdentifier.data()+1, "ext_trunc_fold", 14) != 0) |
| 273 | break; |
| 274 | return 54; // "zext_trunc_fold" |
| 275 | } |
| 276 | break; |
| 277 | case 16: // 4 strings to match. |
| 278 | switch (RuleIdentifier[0]) { |
| 279 | default: break; |
| 280 | case 's': // 2 strings to match. |
| 281 | if (memcmp(RuleIdentifier.data()+1, "elect_", 6) != 0) |
| 282 | break; |
| 283 | switch (RuleIdentifier[7]) { |
| 284 | default: break; |
| 285 | case 't': // 1 string to match. |
| 286 | if (memcmp(RuleIdentifier.data()+8, "o_minmax", 8) != 0) |
| 287 | break; |
| 288 | return 106; // "select_to_minmax" |
| 289 | case 'u': // 1 string to match. |
| 290 | if (memcmp(RuleIdentifier.data()+8, "ndef_cmp", 8) != 0) |
| 291 | break; |
| 292 | return 47; // "select_undef_cmp" |
| 293 | } |
| 294 | break; |
| 295 | case 't': // 1 string to match. |
| 296 | if (memcmp(RuleIdentifier.data()+1, "runcstore_merge", 15) != 0) |
| 297 | break; |
| 298 | return 81; // "truncstore_merge" |
| 299 | case 'u': // 1 string to match. |
| 300 | if (memcmp(RuleIdentifier.data()+1, "ndef_to_fp_zero", 15) != 0) |
| 301 | break; |
| 302 | return 11; // "undef_to_fp_zero" |
| 303 | } |
| 304 | break; |
| 305 | case 17: // 9 strings to match. |
| 306 | switch (RuleIdentifier[0]) { |
| 307 | default: break; |
| 308 | case 'a': // 2 strings to match. |
| 309 | switch (RuleIdentifier[1]) { |
| 310 | default: break; |
| 311 | case 'd': // 1 string to match. |
| 312 | if (memcmp(RuleIdentifier.data()+2, "d_p2i_to_ptradd", 15) != 0) |
| 313 | break; |
| 314 | return 2; // "add_p2i_to_ptradd" |
| 315 | case 'n': // 1 string to match. |
| 316 | if (memcmp(RuleIdentifier.data()+2, "yext_trunc_fold", 15) != 0) |
| 317 | break; |
| 318 | return 30; // "anyext_trunc_fold" |
| 319 | } |
| 320 | break; |
| 321 | case 'd': // 1 string to match. |
| 322 | if (memcmp(RuleIdentifier.data()+1, "iv_rem_to_divrem", 16) != 0) |
| 323 | break; |
| 324 | return 82; // "div_rem_to_divrem" |
| 325 | case 'e': // 1 string to match. |
| 326 | if (memcmp(RuleIdentifier.data()+1, "rase_undef_store", 16) != 0) |
| 327 | break; |
| 328 | return 20; // "erase_undef_store" |
| 329 | case 'p': // 1 string to match. |
| 330 | if (memcmp(RuleIdentifier.data()+1, "tr_add_with_zero", 16) != 0) |
| 331 | break; |
| 332 | return 77; // "ptr_add_with_zero" |
| 333 | case 's': // 2 strings to match. |
| 334 | switch (RuleIdentifier[1]) { |
| 335 | default: break; |
| 336 | case 'e': // 1 string to match. |
| 337 | if (memcmp(RuleIdentifier.data()+2, "lect_to_logical", 15) != 0) |
| 338 | break; |
| 339 | return 49; // "select_to_logical" |
| 340 | case 'h': // 1 string to match. |
| 341 | if (memcmp(RuleIdentifier.data()+2, "ift_immed_chain", 15) != 0) |
| 342 | break; |
| 343 | return 78; // "shift_immed_chain" |
| 344 | } |
| 345 | break; |
| 346 | case 'u': // 2 strings to match. |
| 347 | switch (RuleIdentifier[1]) { |
| 348 | default: break; |
| 349 | case 'n': // 1 string to match. |
| 350 | if (memcmp(RuleIdentifier.data()+2, "def_to_int_zero", 15) != 0) |
| 351 | break; |
| 352 | return 12; // "undef_to_int_zero" |
| 353 | case 'r': // 1 string to match. |
| 354 | if (memcmp(RuleIdentifier.data()+2, "em_pow2_to_mask", 15) != 0) |
| 355 | break; |
| 356 | return 53; // "urem_pow2_to_mask" |
| 357 | } |
| 358 | break; |
| 359 | } |
| 360 | break; |
| 361 | case 18: // 4 strings to match. |
| 362 | switch (RuleIdentifier[0]) { |
| 363 | default: break; |
| 364 | case 'b': // 1 string to match. |
| 365 | if (memcmp(RuleIdentifier.data()+1, "inop_left_to_zero", 17) != 0) |
| 366 | break; |
| 367 | return 26; // "binop_left_to_zero" |
| 368 | case 'c': // 1 string to match. |
| 369 | if (memcmp(RuleIdentifier.data()+1, "ombine_minmax_nan", 17) != 0) |
| 370 | break; |
| 371 | return 75; // "combine_minmax_nan" |
| 372 | case 'r': // 1 string to match. |
| 373 | if (memcmp(RuleIdentifier.data()+1, "ight_identity_one", 17) != 0) |
| 374 | break; |
| 375 | return 32; // "right_identity_one" |
| 376 | case 's': // 1 string to match. |
| 377 | if (memcmp(RuleIdentifier.data()+1, "ext_inreg_of_load", 17) != 0) |
| 378 | break; |
| 379 | return 44; // "sext_inreg_of_load" |
| 380 | } |
| 381 | break; |
| 382 | case 19: // 8 strings to match. |
| 383 | switch (RuleIdentifier[0]) { |
| 384 | default: break; |
| 385 | case 'b': // 1 string to match. |
| 386 | if (memcmp(RuleIdentifier.data()+1, "inop_right_to_zero", 18) != 0) |
| 387 | break; |
| 388 | return 27; // "binop_right_to_zero" |
| 389 | case 'c': // 1 string to match. |
| 390 | if (memcmp(RuleIdentifier.data()+1, "onst_ptradd_to_i2p", 18) != 0) |
| 391 | break; |
| 392 | return 69; // "const_ptradd_to_i2p" |
| 393 | case 'e': // 1 string to match. |
| 394 | if (memcmp(RuleIdentifier.data()+1, "xtend_through_phis", 18) != 0) |
| 395 | break; |
| 396 | return 38; // "extend_through_phis" |
| 397 | case 'p': // 1 string to match. |
| 398 | if (memcmp(RuleIdentifier.data()+1, "tr_add_immed_chain", 18) != 0) |
| 399 | break; |
| 400 | return 42; // "ptr_add_immed_chain" |
| 401 | case 'r': // 1 string to match. |
| 402 | if (memcmp(RuleIdentifier.data()+1, "ight_identity_zero", 18) != 0) |
| 403 | break; |
| 404 | return 24; // "right_identity_zero" |
| 405 | case 's': // 2 strings to match. |
| 406 | switch (RuleIdentifier[1]) { |
| 407 | default: break; |
| 408 | case 'e': // 1 string to match. |
| 409 | if (memcmp(RuleIdentifier.data()+2, "lect_constant_cmp", 17) != 0) |
| 410 | break; |
| 411 | return 48; // "select_constant_cmp" |
| 412 | case 'i': // 1 string to match. |
| 413 | if (memcmp(RuleIdentifier.data()+2, "mplify_add_to_sub", 17) != 0) |
| 414 | break; |
| 415 | return 39; // "simplify_add_to_sub" |
| 416 | } |
| 417 | break; |
| 418 | case 'u': // 1 string to match. |
| 419 | if (memcmp(RuleIdentifier.data()+1, "nary_undef_to_zero", 18) != 0) |
| 420 | break; |
| 421 | return 16; // "unary_undef_to_zero" |
| 422 | } |
| 423 | break; |
| 424 | case 20: // 6 strings to match. |
| 425 | switch (RuleIdentifier[0]) { |
| 426 | default: break; |
| 427 | case 'a': // 1 string to match. |
| 428 | if (memcmp(RuleIdentifier.data()+1, "nd_or_disjoint_mask", 19) != 0) |
| 429 | break; |
| 430 | return 95; // "and_or_disjoint_mask" |
| 431 | case 'b': // 1 string to match. |
| 432 | if (memcmp(RuleIdentifier.data()+1, "itcast_bitcast_fold", 19) != 0) |
| 433 | break; |
| 434 | return 37; // "bitcast_bitcast_fold" |
| 435 | case 'r': // 3 strings to match. |
| 436 | if (RuleIdentifier[1] != 'e') |
| 437 | break; |
| 438 | switch (RuleIdentifier[2]) { |
| 439 | default: break; |
| 440 | case 'd': // 2 strings to match. |
| 441 | if (RuleIdentifier[3] != 'u') |
| 442 | break; |
| 443 | switch (RuleIdentifier[4]) { |
| 444 | default: break; |
| 445 | case 'c': // 1 string to match. |
| 446 | if (memcmp(RuleIdentifier.data()+5, "e_shl_of_extend", 15) != 0) |
| 447 | break; |
| 448 | return 45; // "reduce_shl_of_extend" |
| 449 | case 'n': // 1 string to match. |
| 450 | if (memcmp(RuleIdentifier.data()+5, "dant_sext_inreg", 15) != 0) |
| 451 | break; |
| 452 | return 51; // "redundant_sext_inreg" |
| 453 | } |
| 454 | break; |
| 455 | case 'm': // 1 string to match. |
| 456 | if (memcmp(RuleIdentifier.data()+3, "ove_fcanonicalize", 17) != 0) |
| 457 | break; |
| 458 | return 113; // "remove_fcanonicalize" |
| 459 | } |
| 460 | break; |
| 461 | case 'u': // 1 string to match. |
| 462 | if (memcmp(RuleIdentifier.data()+1, "nmerge_zext_to_zext", 19) != 0) |
| 463 | break; |
| 464 | return 64; // "unmerge_zext_to_zext" |
| 465 | } |
| 466 | break; |
| 467 | case 21: // 2 strings to match. |
| 468 | if (memcmp(RuleIdentifier.data()+0, "un", 2) != 0) |
| 469 | break; |
| 470 | switch (RuleIdentifier[2]) { |
| 471 | default: break; |
| 472 | case 'd': // 1 string to match. |
| 473 | if (memcmp(RuleIdentifier.data()+3, "ef_to_negative_one", 18) != 0) |
| 474 | break; |
| 475 | return 13; // "undef_to_negative_one" |
| 476 | case 'm': // 1 string to match. |
| 477 | if (memcmp(RuleIdentifier.data()+3, "erge_dead_to_trunc", 18) != 0) |
| 478 | break; |
| 479 | return 63; // "unmerge_dead_to_trunc" |
| 480 | } |
| 481 | break; |
| 482 | case 22: // 7 strings to match. |
| 483 | switch (RuleIdentifier[0]) { |
| 484 | default: break; |
| 485 | case 'f': // 2 strings to match. |
| 486 | switch (RuleIdentifier[1]) { |
| 487 | default: break; |
| 488 | case 'o': // 1 string to match. |
| 489 | if (memcmp(RuleIdentifier.data()+2, "ld_binop_into_select", 20) != 0) |
| 490 | break; |
| 491 | return 104; // "fold_binop_into_select" |
| 492 | case 'u': // 1 string to match. |
| 493 | if (memcmp(RuleIdentifier.data()+2, "nnel_shift_to_rotate", 20) != 0) |
| 494 | break; |
| 495 | return 84; // "funnel_shift_to_rotate" |
| 496 | } |
| 497 | break; |
| 498 | case 'i': // 1 string to match. |
| 499 | if (memcmp(RuleIdentifier.data()+1, "cmp_to_lhs_known_bits", 21) != 0) |
| 500 | break; |
| 501 | return 56; // "icmp_to_lhs_known_bits" |
| 502 | case 'p': // 1 string to match. |
| 503 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_any_op", 21) != 0) |
| 504 | break; |
| 505 | return 17; // "propagate_undef_any_op" |
| 506 | case 'r': // 1 string to match. |
| 507 | if (memcmp(RuleIdentifier.data()+1, "edundant_neg_operands", 21) != 0) |
| 508 | break; |
| 509 | return 94; // "redundant_neg_operands" |
| 510 | case 's': // 1 string to match. |
| 511 | if (memcmp(RuleIdentifier.data()+1, "hl_ashr_to_sext_inreg", 21) != 0) |
| 512 | break; |
| 513 | return 43; // "shl_ashr_to_sext_inreg" |
| 514 | case 't': // 1 string to match. |
| 515 | if (memcmp(RuleIdentifier.data()+1, "runc_buildvector_fold", 21) != 0) |
| 516 | break; |
| 517 | return 35; // "trunc_buildvector_fold" |
| 518 | } |
| 519 | break; |
| 520 | case 23: // 2 strings to match. |
| 521 | switch (RuleIdentifier[0]) { |
| 522 | default: break; |
| 523 | case 'c': // 1 string to match. |
| 524 | if (memcmp(RuleIdentifier.data()+1, "ommute_constant_to_rhs", 22) != 0) |
| 525 | break; |
| 526 | return 109; // "commute_constant_to_rhs" |
| 527 | case 'p': // 1 string to match. |
| 528 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_all_ops", 22) != 0) |
| 529 | break; |
| 530 | return 18; // "propagate_undef_all_ops" |
| 531 | } |
| 532 | break; |
| 533 | case 24: // 4 strings to match. |
| 534 | switch (RuleIdentifier[0]) { |
| 535 | default: break; |
| 536 | case 'b': // 1 string to match. |
| 537 | if (memcmp(RuleIdentifier.data()+1, "inop_left_undef_to_zero", 23) != 0) |
| 538 | break; |
| 539 | return 14; // "binop_left_undef_to_zero" |
| 540 | case 'n': // 1 string to match. |
| 541 | if (memcmp(RuleIdentifier.data()+1, "arrow_binop_feeding_and", 23) != 0) |
| 542 | break; |
| 543 | return 46; // "narrow_binop_feeding_and" |
| 544 | case 's': // 1 string to match. |
| 545 | if (memcmp(RuleIdentifier.data()+1, "ext_inreg_to_zext_inreg", 23) != 0) |
| 546 | break; |
| 547 | return 57; // "sext_inreg_to_zext_inreg" |
| 548 | case 'x': // 1 string to match. |
| 549 | if (memcmp(RuleIdentifier.data()+1, "or_of_and_with_same_reg", 23) != 0) |
| 550 | break; |
| 551 | return 76; // "xor_of_and_with_same_reg" |
| 552 | } |
| 553 | break; |
| 554 | case 25: // 4 strings to match. |
| 555 | switch (RuleIdentifier[0]) { |
| 556 | default: break; |
| 557 | case 'b': // 3 strings to match. |
| 558 | switch (RuleIdentifier[1]) { |
| 559 | default: break; |
| 560 | case 'i': // 2 strings to match. |
| 561 | if (memcmp(RuleIdentifier.data()+2, "tfield_extract_from_", 20) != 0) |
| 562 | break; |
| 563 | switch (RuleIdentifier[22]) { |
| 564 | default: break; |
| 565 | case 'a': // 1 string to match. |
| 566 | if (memcmp(RuleIdentifier.data()+23, "nd", 2) != 0) |
| 567 | break; |
| 568 | return 86; // "bitfield_extract_from_and" |
| 569 | case 's': // 1 string to match. |
| 570 | if (memcmp(RuleIdentifier.data()+23, "hr", 2) != 0) |
| 571 | break; |
| 572 | return 87; // "bitfield_extract_from_shr" |
| 573 | } |
| 574 | break; |
| 575 | case 'u': // 1 string to match. |
| 576 | if (memcmp(RuleIdentifier.data()+2, "ildvector_identity_fold", 23) != 0) |
| 577 | break; |
| 578 | return 34; // "buildvector_identity_fold" |
| 579 | } |
| 580 | break; |
| 581 | case 'e': // 1 string to match. |
| 582 | if (memcmp(RuleIdentifier.data()+1, "xtract_vec_elt_build_vec", 24) != 0) |
| 583 | break; |
| 584 | return 6; // "extract_vec_elt_build_vec" |
| 585 | } |
| 586 | break; |
| 587 | case 26: // 3 strings to match. |
| 588 | switch (RuleIdentifier[0]) { |
| 589 | default: break; |
| 590 | case 'b': // 1 string to match. |
| 591 | if (memcmp(RuleIdentifier.data()+1, "inop_right_undef_to_undef", 25) != 0) |
| 592 | break; |
| 593 | return 15; // "binop_right_undef_to_undef" |
| 594 | case 'c': // 1 string to match. |
| 595 | if (memcmp(RuleIdentifier.data()+1, "ombine_indexed_load_store", 25) != 0) |
| 596 | break; |
| 597 | return 10; // "combine_indexed_load_store" |
| 598 | case 'f': // 1 string to match. |
| 599 | if (memcmp(RuleIdentifier.data()+1, "unnel_shift_from_or_shift", 25) != 0) |
| 600 | break; |
| 601 | return 83; // "funnel_shift_from_or_shift" |
| 602 | } |
| 603 | break; |
| 604 | case 27: // 2 strings to match. |
| 605 | switch (RuleIdentifier[0]) { |
| 606 | default: break; |
| 607 | case 'r': // 1 string to match. |
| 608 | if (memcmp(RuleIdentifier.data()+1, "edundant_binop_in_equality", 26) != 0) |
| 609 | break; |
| 610 | return 107; // "redundant_binop_in_equality" |
| 611 | case 't': // 1 string to match. |
| 612 | if (memcmp(RuleIdentifier.data()+1, "runc_lshr_buildvector_fold", 26) != 0) |
| 613 | break; |
| 614 | return 36; // "trunc_lshr_buildvector_fold" |
| 615 | } |
| 616 | break; |
| 617 | case 28: // 3 strings to match. |
| 618 | switch (RuleIdentifier[0]) { |
| 619 | default: break; |
| 620 | case 'o': // 1 string to match. |
| 621 | if (memcmp(RuleIdentifier.data()+1, "pt_brcond_by_inverting_cond", 27) != 0) |
| 622 | break; |
| 623 | return 60; // "opt_brcond_by_inverting_cond" |
| 624 | case 'p': // 1 string to match. |
| 625 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_shuffle_mask", 27) != 0) |
| 626 | break; |
| 627 | return 19; // "propagate_undef_shuffle_mask" |
| 628 | case 's': // 1 string to match. |
| 629 | if (memcmp(RuleIdentifier.data()+1, "hift_of_shifted_logic_chain", 27) != 0) |
| 630 | break; |
| 631 | return 79; // "shift_of_shifted_logic_chain" |
| 632 | } |
| 633 | break; |
| 634 | case 29: // 2 strings to match. |
| 635 | switch (RuleIdentifier[0]) { |
| 636 | default: break; |
| 637 | case 'b': // 1 string to match. |
| 638 | if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_shr_and", 28) != 0) |
| 639 | break; |
| 640 | return 88; // "bitfield_extract_from_shr_and" |
| 641 | case 'i': // 1 string to match. |
| 642 | if (memcmp(RuleIdentifier.data()+1, "cmp_to_true_false_known_bits", 28) != 0) |
| 643 | break; |
| 644 | return 55; // "icmp_to_true_false_known_bits" |
| 645 | } |
| 646 | break; |
| 647 | case 31: // 1 string to match. |
| 648 | if (memcmp(RuleIdentifier.data()+0, "fcmp_select_to_fmin_fmax_legacy", 31) != 0) |
| 649 | break; |
| 650 | return 110; // "fcmp_select_to_fmin_fmax_legacy" |
| 651 | case 32: // 3 strings to match. |
| 652 | switch (RuleIdentifier[0]) { |
| 653 | default: break; |
| 654 | case 'b': // 1 string to match. |
| 655 | if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_sext_inreg", 31) != 0) |
| 656 | break; |
| 657 | return 85; // "bitfield_extract_from_sext_inreg" |
| 658 | case 'c': // 2 strings to match. |
| 659 | if (memcmp(RuleIdentifier.data()+1, "ombine_f", 8) != 0) |
| 660 | break; |
| 661 | switch (RuleIdentifier[9]) { |
| 662 | default: break; |
| 663 | case 'a': // 1 string to match. |
| 664 | if (memcmp(RuleIdentifier.data()+10, "dd_fmul_to_fmad_or_fma", 22) != 0) |
| 665 | break; |
| 666 | return 96; // "combine_fadd_fmul_to_fmad_or_fma" |
| 667 | case 's': // 1 string to match. |
| 668 | if (memcmp(RuleIdentifier.data()+10, "ub_fmul_to_fmad_or_fma", 22) != 0) |
| 669 | break; |
| 670 | return 100; // "combine_fsub_fmul_to_fmad_or_fma" |
| 671 | } |
| 672 | break; |
| 673 | } |
| 674 | break; |
| 675 | case 34: // 1 string to match. |
| 676 | if (memcmp(RuleIdentifier.data()+0, "extract_all_elts_from_build_vector", 34) != 0) |
| 677 | break; |
| 678 | return 7; // "extract_all_elts_from_build_vector" |
| 679 | case 36: // 3 strings to match. |
| 680 | switch (RuleIdentifier[0]) { |
| 681 | default: break; |
| 682 | case 'c': // 2 strings to match. |
| 683 | if (memcmp(RuleIdentifier.data()+1, "ombine_", 7) != 0) |
| 684 | break; |
| 685 | switch (RuleIdentifier[8]) { |
| 686 | default: break; |
| 687 | case 'f': // 1 string to match. |
| 688 | if (memcmp(RuleIdentifier.data()+9, "add_fma_fmul_to_fmad_or_fma", 27) != 0) |
| 689 | break; |
| 690 | return 98; // "combine_fadd_fma_fmul_to_fmad_or_fma" |
| 691 | case 'i': // 1 string to match. |
| 692 | if (memcmp(RuleIdentifier.data()+9, "nsert_vec_elts_build_vector", 27) != 0) |
| 693 | break; |
| 694 | return 5; // "combine_insert_vec_elts_build_vector" |
| 695 | } |
| 696 | break; |
| 697 | case 'i': // 1 string to match. |
| 698 | if (memcmp(RuleIdentifier.data()+1, "nsert_extract_vec_elt_out_of_bounds", 35) != 0) |
| 699 | break; |
| 700 | return 22; // "insert_extract_vec_elt_out_of_bounds" |
| 701 | } |
| 702 | break; |
| 703 | case 37: // 2 strings to match. |
| 704 | switch (RuleIdentifier[0]) { |
| 705 | default: break; |
| 706 | case 'c': // 1 string to match. |
| 707 | if (memcmp(RuleIdentifier.data()+1, "ombine_fsub_fneg_fmul_to_fmad_or_fma", 36) != 0) |
| 708 | break; |
| 709 | return 101; // "combine_fsub_fneg_fmul_to_fmad_or_fma" |
| 710 | case 'h': // 1 string to match. |
| 711 | if (memcmp(RuleIdentifier.data()+1, "oist_logic_op_with_same_opcode_hands", 36) != 0) |
| 712 | break; |
| 713 | return 40; // "hoist_logic_op_with_same_opcode_hands" |
| 714 | } |
| 715 | break; |
| 716 | case 38: // 2 strings to match. |
| 717 | if (memcmp(RuleIdentifier.data()+0, "combine_f", 9) != 0) |
| 718 | break; |
| 719 | switch (RuleIdentifier[9]) { |
| 720 | default: break; |
| 721 | case 'a': // 1 string to match. |
| 722 | if (memcmp(RuleIdentifier.data()+10, "dd_fpext_fmul_to_fmad_or_fma", 28) != 0) |
| 723 | break; |
| 724 | return 97; // "combine_fadd_fpext_fmul_to_fmad_or_fma" |
| 725 | case 's': // 1 string to match. |
| 726 | if (memcmp(RuleIdentifier.data()+10, "ub_fpext_fmul_to_fmad_or_fma", 28) != 0) |
| 727 | break; |
| 728 | return 102; // "combine_fsub_fpext_fmul_to_fmad_or_fma" |
| 729 | } |
| 730 | break; |
| 731 | case 42: // 1 string to match. |
| 732 | if (memcmp(RuleIdentifier.data()+0, "combine_fadd_fpext_fma_fmul_to_fmad_or_fma", 42) != 0) |
| 733 | break; |
| 734 | return 99; // "combine_fadd_fpext_fma_fmul_to_fmad_or_fma" |
| 735 | case 43: // 1 string to match. |
| 736 | if (memcmp(RuleIdentifier.data()+0, "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma", 43) != 0) |
| 737 | break; |
| 738 | return 103; // "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma" |
| 739 | } |
| 740 | #endif // ifndef NDEBUG |
| 741 | |
| 742 | return std::nullopt; |
| 743 | } |
| 744 | static std::optional<std::pair<uint64_t, uint64_t>> getRuleRangeForIdentifier(StringRef RuleIdentifier) { |
| 745 | std::pair<StringRef, StringRef> RangePair = RuleIdentifier.split('-'); |
| 746 | if (!RangePair.second.empty()) { |
| 747 | const auto First = getRuleIdxForIdentifier(RangePair.first); |
| 748 | const auto Last = getRuleIdxForIdentifier(RangePair.second); |
| 749 | if (!First || !Last) |
| 750 | return std::nullopt; |
| 751 | if (First >= Last) |
| 752 | report_fatal_error("Beginning of range should be before end of range"); |
| 753 | return {{*First, *Last + 1}}; |
| 754 | } |
| 755 | if (RangePair.first == "*") { |
| 756 | return {{0, 116}}; |
| 757 | } |
| 758 | const auto I = getRuleIdxForIdentifier(RangePair.first); |
| 759 | if (!I) |
| 760 | return std::nullopt; |
| 761 | return {{*I, *I + 1}}; |
| 762 | } |
| 763 | |
| 764 | bool AMDGPUGenPostLegalizerCombinerHelperRuleConfig::setRuleEnabled(StringRef RuleIdentifier) { |
| 765 | auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier); |
| 766 | if (!MaybeRange) |
| 767 | return false; |
| 768 | for (auto I = MaybeRange->first; I < MaybeRange->second; ++I) |
| 769 | DisabledRules.reset(I); |
| 770 | return true; |
| 771 | } |
| 772 | |
| 773 | bool AMDGPUGenPostLegalizerCombinerHelperRuleConfig::setRuleDisabled(StringRef RuleIdentifier) { |
| 774 | auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier); |
| 775 | if (!MaybeRange) |
| 776 | return false; |
| 777 | for (auto I = MaybeRange->first; I < MaybeRange->second; ++I) |
| 778 | DisabledRules.set(I); |
| 779 | return true; |
| 780 | } |
| 781 | |
| 782 | bool AMDGPUGenPostLegalizerCombinerHelperRuleConfig::isRuleDisabled(unsigned RuleID) const { |
| 783 | return DisabledRules.test(RuleID); |
| 784 | } |
| 785 | #endif // ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H |
| 786 | |
| 787 | #ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP |
| 788 | |
| 789 | std::vector<std::string> AMDGPUPostLegalizerCombinerHelperOption; |
| 790 | cl::list<std::string> AMDGPUPostLegalizerCombinerHelperDisableOption( |
| 791 | "amdgpupostlegalizercombinerhelper-disable-rule", |
| 792 | cl::desc("Disable one or more combiner rules temporarily in the AMDGPUPostLegalizerCombinerHelper pass"), |
| 793 | cl::CommaSeparated, |
| 794 | cl::Hidden, |
| 795 | cl::cat(GICombinerOptionCategory), |
| 796 | cl::callback([](const std::string &Str) { |
| 797 | AMDGPUPostLegalizerCombinerHelperOption.push_back(Str); |
| 798 | })); |
| 799 | cl::list<std::string> AMDGPUPostLegalizerCombinerHelperOnlyEnableOption( |
| 800 | "amdgpupostlegalizercombinerhelper-only-enable-rule", |
| 801 | cl::desc("Disable all rules in the AMDGPUPostLegalizerCombinerHelper pass then re-enable the specified ones"), |
| 802 | cl::Hidden, |
| 803 | cl::cat(GICombinerOptionCategory), |
| 804 | cl::callback([](const std::string &CommaSeparatedArg) { |
| 805 | StringRef Str = CommaSeparatedArg; |
| 806 | AMDGPUPostLegalizerCombinerHelperOption.push_back("*"); |
| 807 | do { |
| 808 | auto X = Str.split(","); |
| 809 | AMDGPUPostLegalizerCombinerHelperOption.push_back(("!" + X.first).str()); |
| 810 | Str = X.second; |
| 811 | } while (!Str.empty()); |
| 812 | })); |
| 813 | |
| 814 | bool AMDGPUGenPostLegalizerCombinerHelperRuleConfig::parseCommandLineOption() { |
| 815 | for (StringRef Identifier : AMDGPUPostLegalizerCombinerHelperOption) { |
| 816 | bool Enabled = Identifier.consume_front("!"); |
| 817 | if (Enabled && !setRuleEnabled(Identifier)) |
| 818 | return false; |
| 819 | if (!Enabled && !setRuleDisabled(Identifier)) |
| 820 | return false; |
| 821 | } |
| 822 | return true; |
| 823 | } |
| 824 | |
| 825 | bool AMDGPUGenPostLegalizerCombinerHelper::tryCombineAll( |
| 826 | GISelChangeObserver &Observer, |
| 827 | MachineInstr &MI, |
| 828 | MachineIRBuilder &B) const { |
| 829 | MachineBasicBlock *MBB = MI.getParent(); |
| 830 | MachineFunction *MF = MBB->getParent(); |
| 831 | MachineRegisterInfo &MRI = MF->getRegInfo(); |
| 832 | SmallVector<MachineInstr *, 8> MIs = {&MI}; |
| 833 | |
| 834 | (void)MBB; (void)MF; (void)MRI; (void)RuleConfig; |
| 835 | |
| 836 | // Match data |
| 837 | unsigned MatchData1; |
| 838 | std::pair<Register, bool> MatchData2; |
| 839 | SmallVector<Register, 4> MatchData5; |
| 840 | Register MatchData6; |
| 841 | SmallVector<std::pair<Register, MachineInstr*>> MatchData7; |
| 842 | PreferredTuple MatchData8; |
| 843 | std::function<void(MachineIRBuilder &)> MatchData9; |
| 844 | IndexedLoadStoreMatchInfo MatchData10; |
| 845 | std::function<void(MachineIRBuilder &)> MatchData21; |
| 846 | Register MatchData28; |
| 847 | Register MatchData29; |
| 848 | Register MatchData30; |
| 849 | Register MatchData31; |
| 850 | Register MatchData33; |
| 851 | Register MatchData34; |
| 852 | Register MatchData35; |
| 853 | Register MatchData36; |
| 854 | MachineInstr* MatchData38; |
| 855 | std::tuple<Register, Register> MatchData39; |
| 856 | InstructionStepsMatchInfo MatchData40; |
| 857 | std::function<void(MachineIRBuilder &)> MatchData41; |
| 858 | PtrAddChain MatchData42; |
| 859 | std::tuple<Register, int64_t> MatchData43; |
| 860 | std::tuple<Register, unsigned> MatchData44; |
| 861 | RegisterImmPair MatchData45; |
| 862 | std::function<void(MachineIRBuilder &)> MatchData46; |
| 863 | unsigned MatchData48; |
| 864 | std::function<void(MachineIRBuilder &)> MatchData49; |
| 865 | Register MatchData50; |
| 866 | Register MatchData52; |
| 867 | Register MatchData54; |
| 868 | int64_t MatchData55; |
| 869 | std::function<void(MachineIRBuilder &)> MatchData56; |
| 870 | std::tuple<Register, unsigned> MatchData58; |
| 871 | SmallVector<Register, 4> MatchData59; |
| 872 | MachineInstr * MatchData60; |
| 873 | SmallVector<Register, 8> MatchData61; |
| 874 | SmallVector<APInt, 8> MatchData62; |
| 875 | Register MatchData65; |
| 876 | std::pair<Register, unsigned> MatchData66; |
| 877 | std::pair<MachineInstr*, LLT> MatchData67; |
| 878 | std::optional<APFloat> MatchData68; |
| 879 | APInt MatchData69; |
| 880 | std::function<void(MachineIRBuilder &)> MatchData70; |
| 881 | std::function<void(MachineIRBuilder &)> MatchData71; |
| 882 | std::function<void(MachineIRBuilder &)> MatchData72; |
| 883 | std::function<void(MachineIRBuilder &)> MatchData73; |
| 884 | std::function<void(MachineIRBuilder &)> MatchData74; |
| 885 | unsigned MatchData75; |
| 886 | std::pair<Register, Register> MatchData76; |
| 887 | RegisterImmPair MatchData78; |
| 888 | ShiftOfShiftedLogic MatchData79; |
| 889 | std::function<void(MachineIRBuilder &)> MatchData80; |
| 890 | MergeTruncStoresInfo MatchData81; |
| 891 | MachineInstr * MatchData82; |
| 892 | std::function<void(MachineIRBuilder &)> MatchData83; |
| 893 | std::function<void(MachineIRBuilder &)> MatchData85; |
| 894 | std::function<void(MachineIRBuilder &)> MatchData86; |
| 895 | std::function<void(MachineIRBuilder &)> MatchData87; |
| 896 | std::function<void(MachineIRBuilder &)> MatchData88; |
| 897 | APInt MatchData89; |
| 898 | std::function<void(MachineIRBuilder &)> MatchData90; |
| 899 | std::function<void(MachineIRBuilder &)> MatchData94; |
| 900 | std::function<void(MachineIRBuilder &)> MatchData95; |
| 901 | std::function<void(MachineIRBuilder &)> MatchData96; |
| 902 | std::function<void(MachineIRBuilder &)> MatchData97; |
| 903 | std::function<void(MachineIRBuilder &)> MatchData98; |
| 904 | std::function<void(MachineIRBuilder &)> MatchData99; |
| 905 | std::function<void(MachineIRBuilder &)> MatchData100; |
| 906 | std::function<void(MachineIRBuilder &)> MatchData101; |
| 907 | std::function<void(MachineIRBuilder &)> MatchData102; |
| 908 | std::function<void(MachineIRBuilder &)> MatchData103; |
| 909 | unsigned MatchData104; |
| 910 | std::function<void(MachineIRBuilder &)> MatchData105; |
| 911 | std::function<void(MachineIRBuilder &)> MatchData106; |
| 912 | std::function<void(MachineIRBuilder &)> MatchData107; |
| 913 | Register MatchData108; |
| 914 | AMDGPUPostLegalizerCombinerHelper::FMinFMaxLegacyInfo MatchData110; |
| 915 | AMDGPUPostLegalizerCombinerHelper::CvtF32UByteMatchInfo MatchData112; |
| 916 | Register MatchData113; |
| 917 | MachineInstr * MatchData114; |
| 918 | std::function<void(MachineIRBuilder &)> MatchData115; |
| 919 | |
| 920 | int Partition = -1; |
| 921 | Partition = -1; |
| 922 | switch (MIs[0]->getOpcode()) { |
| 923 | case TargetOpcode::COPY: Partition = 0; break; |
| 924 | case TargetOpcode::G_MUL: Partition = 1; break; |
| 925 | case TargetOpcode::G_ADD: Partition = 2; break; |
| 926 | case TargetOpcode::G_FREEZE: Partition = 3; break; |
| 927 | case TargetOpcode::G_FABS: Partition = 4; break; |
| 928 | case TargetOpcode::G_FCANONICALIZE: Partition = 5; break; |
| 929 | case TargetOpcode::G_INSERT_VECTOR_ELT: Partition = 6; break; |
| 930 | case TargetOpcode::G_EXTRACT_VECTOR_ELT: Partition = 7; break; |
| 931 | case TargetOpcode::G_BUILD_VECTOR: Partition = 8; break; |
| 932 | case TargetOpcode::G_LOAD: Partition = 9; break; |
| 933 | case TargetOpcode::G_SEXTLOAD: Partition = 10; break; |
| 934 | case TargetOpcode::G_ZEXTLOAD: Partition = 11; break; |
| 935 | case TargetOpcode::G_AND: Partition = 12; break; |
| 936 | case TargetOpcode::G_STORE: Partition = 13; break; |
| 937 | case TargetOpcode::G_UITOFP: Partition = 14; break; |
| 938 | case TargetOpcode::G_SITOFP: Partition = 15; break; |
| 939 | case TargetOpcode::G_OR: Partition = 16; break; |
| 940 | case TargetOpcode::G_SHL: Partition = 17; break; |
| 941 | case TargetOpcode::G_UDIV: Partition = 18; break; |
| 942 | case TargetOpcode::G_UREM: Partition = 19; break; |
| 943 | case TargetOpcode::G_ASHR: Partition = 20; break; |
| 944 | case TargetOpcode::G_LSHR: Partition = 21; break; |
| 945 | case TargetOpcode::G_ABS: Partition = 22; break; |
| 946 | case TargetOpcode::G_FPTOSI: Partition = 23; break; |
| 947 | case TargetOpcode::G_FPTOUI: Partition = 24; break; |
| 948 | case TargetOpcode::G_SUB: Partition = 25; break; |
| 949 | case TargetOpcode::G_XOR: Partition = 26; break; |
| 950 | case TargetOpcode::G_TRUNC: Partition = 27; break; |
| 951 | case TargetOpcode::G_SHUFFLE_VECTOR: Partition = 28; break; |
| 952 | case TargetOpcode::G_UNMERGE_VALUES: Partition = 29; break; |
| 953 | case TargetOpcode::G_SELECT: Partition = 30; break; |
| 954 | case TargetOpcode::G_PTR_ADD: Partition = 31; break; |
| 955 | case TargetOpcode::G_ROTL: Partition = 32; break; |
| 956 | case TargetOpcode::G_ROTR: Partition = 33; break; |
| 957 | case TargetOpcode::G_SDIV: Partition = 34; break; |
| 958 | case TargetOpcode::G_SREM: Partition = 35; break; |
| 959 | case TargetOpcode::G_INTTOPTR: Partition = 36; break; |
| 960 | case TargetOpcode::G_PTRTOINT: Partition = 37; break; |
| 961 | case TargetOpcode::G_ANYEXT: Partition = 38; break; |
| 962 | case TargetOpcode::G_FNEG: Partition = 39; break; |
| 963 | case TargetOpcode::G_BUILD_VECTOR_TRUNC: Partition = 40; break; |
| 964 | case TargetOpcode::G_BITCAST: Partition = 41; break; |
| 965 | case TargetOpcode::G_PHI: Partition = 42; break; |
| 966 | case TargetOpcode::G_SEXT_INREG: Partition = 43; break; |
| 967 | case TargetOpcode::G_ZEXT: Partition = 44; break; |
| 968 | case TargetOpcode::G_ICMP: Partition = 45; break; |
| 969 | case TargetOpcode::G_SEXT: Partition = 46; break; |
| 970 | case TargetOpcode::G_BR: Partition = 47; break; |
| 971 | case TargetOpcode::G_MERGE_VALUES: Partition = 48; break; |
| 972 | case TargetOpcode::G_FPTRUNC: Partition = 49; break; |
| 973 | case TargetOpcode::G_FSQRT: Partition = 50; break; |
| 974 | case TargetOpcode::G_FLOG2: Partition = 51; break; |
| 975 | case TargetOpcode::G_UMULO: Partition = 52; break; |
| 976 | case TargetOpcode::G_SMULO: Partition = 53; break; |
| 977 | case TargetOpcode::G_UADDO: Partition = 54; break; |
| 978 | case TargetOpcode::G_SADDO: Partition = 55; break; |
| 979 | case TargetOpcode::G_UADDE: Partition = 56; break; |
| 980 | case TargetOpcode::G_SADDE: Partition = 57; break; |
| 981 | case TargetOpcode::G_USUBE: Partition = 58; break; |
| 982 | case TargetOpcode::G_SSUBE: Partition = 59; break; |
| 983 | case TargetOpcode::G_FMINNUM: Partition = 60; break; |
| 984 | case TargetOpcode::G_FMAXNUM: Partition = 61; break; |
| 985 | case TargetOpcode::G_FMINIMUM: Partition = 62; break; |
| 986 | case TargetOpcode::G_FMAXIMUM: Partition = 63; break; |
| 987 | case TargetOpcode::G_SSHLSAT: Partition = 64; break; |
| 988 | case TargetOpcode::G_USHLSAT: Partition = 65; break; |
| 989 | case TargetOpcode::G_FSHL: Partition = 66; break; |
| 990 | case TargetOpcode::G_FSHR: Partition = 67; break; |
| 991 | case TargetOpcode::G_UMULH: Partition = 68; break; |
| 992 | case TargetOpcode::G_FADD: Partition = 69; break; |
| 993 | case TargetOpcode::G_FSUB: Partition = 70; break; |
| 994 | case TargetOpcode::G_FMUL: Partition = 71; break; |
| 995 | case TargetOpcode::G_FDIV: Partition = 72; break; |
| 996 | case TargetOpcode::G_FMAD: Partition = 73; break; |
| 997 | case TargetOpcode::G_FMA: Partition = 74; break; |
| 998 | case TargetOpcode::G_SMIN: Partition = 75; break; |
| 999 | case TargetOpcode::G_SMAX: Partition = 76; break; |
| 1000 | case TargetOpcode::G_UMIN: Partition = 77; break; |
| 1001 | case TargetOpcode::G_UMAX: Partition = 78; break; |
| 1002 | case TargetOpcode::G_FREM: Partition = 79; break; |
| 1003 | case AMDGPU::G_AMDGPU_CVT_F32_UBYTE0: Partition = 80; break; |
| 1004 | case AMDGPU::G_AMDGPU_CVT_F32_UBYTE1: Partition = 81; break; |
| 1005 | case AMDGPU::G_AMDGPU_CVT_F32_UBYTE2: Partition = 82; break; |
| 1006 | case AMDGPU::G_AMDGPU_CVT_F32_UBYTE3: Partition = 83; break; |
| 1007 | case TargetOpcode::G_INTRINSIC: Partition = 84; break; |
| 1008 | } |
| 1009 | // Default case but without conflicting with potential default case in selection. |
| 1010 | if (Partition == -1) return false; |
| 1011 | if (Partition == 0 /* TargetOpcode::COPY */) { |
| 1012 | // Leaf name: copy_prop |
| 1013 | // Rule: copy_prop |
| 1014 | if (!RuleConfig->isRuleDisabled(0)) { |
| 1015 | if (1 |
| 1016 | && [&]() { |
| 1017 | return Helper.matchCombineCopy(*MIs[0]); |
| 1018 | return true; |
| 1019 | }() ) { |
| 1020 | LLVM_DEBUG(dbgs() << "Applying rule 'copy_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'copy_prop'\n" ; } } while (false); |
| 1021 | Helper.applyCombineCopy(*MIs[0]); |
| 1022 | return true; |
| 1023 | } |
| 1024 | } |
| 1025 | return false; |
| 1026 | } |
| 1027 | if (Partition == 1 /* TargetOpcode::G_MUL */) { |
| 1028 | // Leaf name: mul_to_shl |
| 1029 | // Rule: mul_to_shl |
| 1030 | if (!RuleConfig->isRuleDisabled(1)) { |
| 1031 | if (1 |
| 1032 | && [&]() { |
| 1033 | return Helper.matchCombineMulToShl(*MIs[0], MatchData1); |
| 1034 | return true; |
| 1035 | }() ) { |
| 1036 | LLVM_DEBUG(dbgs() << "Applying rule 'mul_to_shl'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mul_to_shl'\n" ; } } while (false); |
| 1037 | Helper.applyCombineMulToShl(*MIs[0], MatchData1); |
| 1038 | return true; |
| 1039 | } |
| 1040 | } |
| 1041 | // Leaf name: mul_by_neg_one |
| 1042 | // Rule: mul_by_neg_one |
| 1043 | if (!RuleConfig->isRuleDisabled(3)) { |
| 1044 | if (1 |
| 1045 | && [&]() { |
| 1046 | return Helper.matchConstantOp(MIs[0]->getOperand(2), -1); |
| 1047 | return true; |
| 1048 | }() ) { |
| 1049 | LLVM_DEBUG(dbgs() << "Applying rule 'mul_by_neg_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mul_by_neg_one'\n" ; } } while (false); |
| 1050 | Helper.applyCombineMulByNegativeOne(*MIs[0]); |
| 1051 | return true; |
| 1052 | } |
| 1053 | } |
| 1054 | // Leaf name: undef_to_int_zero |
| 1055 | // Rule: undef_to_int_zero |
| 1056 | if (!RuleConfig->isRuleDisabled(12)) { |
| 1057 | if (1 |
| 1058 | && [&]() { |
| 1059 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1060 | return true; |
| 1061 | }() ) { |
| 1062 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n" ; } } while (false); |
| 1063 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 1064 | return true; |
| 1065 | } |
| 1066 | } |
| 1067 | // Leaf name: binop_right_to_zero |
| 1068 | // Rule: binop_right_to_zero |
| 1069 | if (!RuleConfig->isRuleDisabled(27)) { |
| 1070 | if (1 |
| 1071 | && [&]() { |
| 1072 | return Helper.matchOperandIsZero(*MIs[0], 2); |
| 1073 | return true; |
| 1074 | }() ) { |
| 1075 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_to_zero'\n" ; } } while (false); |
| 1076 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
| 1077 | return true; |
| 1078 | } |
| 1079 | } |
| 1080 | // Leaf name: right_identity_one |
| 1081 | // Rule: right_identity_one |
| 1082 | if (!RuleConfig->isRuleDisabled(32)) { |
| 1083 | if (1 |
| 1084 | && [&]() { |
| 1085 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 1); |
| 1086 | return true; |
| 1087 | }() ) { |
| 1088 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_one'\n" ; } } while (false); |
| 1089 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1090 | return true; |
| 1091 | } |
| 1092 | } |
| 1093 | // Leaf name: constant_fold |
| 1094 | // Rule: constant_fold |
| 1095 | if (!RuleConfig->isRuleDisabled(89)) { |
| 1096 | if (1 |
| 1097 | && [&]() { |
| 1098 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
| 1099 | return true; |
| 1100 | }() ) { |
| 1101 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 1102 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
| 1103 | return true; |
| 1104 | } |
| 1105 | } |
| 1106 | // Leaf name: commute_constant_to_rhs |
| 1107 | // Rule: commute_constant_to_rhs |
| 1108 | if (!RuleConfig->isRuleDisabled(109)) { |
| 1109 | if (1 |
| 1110 | && [&]() { |
| 1111 | |
| 1112 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
| 1113 | |
| 1114 | return true; |
| 1115 | }() ) { |
| 1116 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
| 1117 | |
| 1118 | Observer.changingInstr(*MIs[0]); |
| 1119 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
| 1120 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
| 1121 | MIs[0]->getOperand(1).setReg(RHSReg); |
| 1122 | MIs[0]->getOperand(2).setReg(LHSReg); |
| 1123 | Observer.changedInstr(*MIs[0]); |
| 1124 | |
| 1125 | return true; |
| 1126 | } |
| 1127 | } |
| 1128 | return false; |
| 1129 | } |
| 1130 | if (Partition == 2 /* TargetOpcode::G_ADD */) { |
| 1131 | // Leaf name: add_p2i_to_ptradd |
| 1132 | // Rule: add_p2i_to_ptradd |
| 1133 | if (!RuleConfig->isRuleDisabled(2)) { |
| 1134 | if (1 |
| 1135 | && [&]() { |
| 1136 | return Helper.matchCombineAddP2IToPtrAdd(*MIs[0], MatchData2); |
| 1137 | return true; |
| 1138 | }() ) { |
| 1139 | LLVM_DEBUG(dbgs() << "Applying rule 'add_p2i_to_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'add_p2i_to_ptradd'\n" ; } } while (false); |
| 1140 | Helper.applyCombineAddP2IToPtrAdd(*MIs[0], MatchData2); |
| 1141 | return true; |
| 1142 | } |
| 1143 | } |
| 1144 | // Leaf name: propagate_undef_any_op |
| 1145 | // Rule: propagate_undef_any_op |
| 1146 | if (!RuleConfig->isRuleDisabled(17)) { |
| 1147 | if (1 |
| 1148 | && [&]() { |
| 1149 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1150 | return true; |
| 1151 | }() ) { |
| 1152 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 1153 | Helper.replaceInstWithUndef(*MIs[0]); |
| 1154 | return true; |
| 1155 | } |
| 1156 | } |
| 1157 | // Leaf name: right_identity_zero |
| 1158 | // Rule: right_identity_zero |
| 1159 | if (!RuleConfig->isRuleDisabled(24)) { |
| 1160 | if (1 |
| 1161 | && [&]() { |
| 1162 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 1163 | return true; |
| 1164 | }() ) { |
| 1165 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 1166 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1167 | return true; |
| 1168 | } |
| 1169 | } |
| 1170 | // Leaf name: add_sub_reg |
| 1171 | // Rule: add_sub_reg |
| 1172 | if (!RuleConfig->isRuleDisabled(33)) { |
| 1173 | if (1 |
| 1174 | && [&]() { |
| 1175 | return Helper.matchAddSubSameReg(*MIs[0], MatchData33); |
| 1176 | return true; |
| 1177 | }() ) { |
| 1178 | LLVM_DEBUG(dbgs() << "Applying rule 'add_sub_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'add_sub_reg'\n" ; } } while (false); |
| 1179 | return Helper.replaceSingleDefInstWithReg(*MIs[0], |
| 1180 | MatchData33); |
| 1181 | return true; |
| 1182 | } |
| 1183 | } |
| 1184 | // Leaf name: simplify_add_to_sub |
| 1185 | // Rule: simplify_add_to_sub |
| 1186 | if (!RuleConfig->isRuleDisabled(39)) { |
| 1187 | if (1 |
| 1188 | && [&]() { |
| 1189 | return Helper.matchSimplifyAddToSub(*MIs[0], MatchData39); |
| 1190 | return true; |
| 1191 | }() ) { |
| 1192 | LLVM_DEBUG(dbgs() << "Applying rule 'simplify_add_to_sub'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'simplify_add_to_sub'\n" ; } } while (false); |
| 1193 | Helper.applySimplifyAddToSub(*MIs[0], MatchData39); |
| 1194 | return true; |
| 1195 | } |
| 1196 | } |
| 1197 | // Leaf name: constant_fold |
| 1198 | // Rule: constant_fold |
| 1199 | if (!RuleConfig->isRuleDisabled(89)) { |
| 1200 | if (1 |
| 1201 | && [&]() { |
| 1202 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
| 1203 | return true; |
| 1204 | }() ) { |
| 1205 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 1206 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
| 1207 | return true; |
| 1208 | } |
| 1209 | } |
| 1210 | // Leaf name: fold_binop_into_select |
| 1211 | // Rule: fold_binop_into_select |
| 1212 | if (!RuleConfig->isRuleDisabled(104)) { |
| 1213 | if (1 |
| 1214 | && [&]() { |
| 1215 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 1216 | return true; |
| 1217 | }() ) { |
| 1218 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 1219 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 1220 | return true; |
| 1221 | } |
| 1222 | } |
| 1223 | // Leaf name: commute_constant_to_rhs |
| 1224 | // Rule: commute_constant_to_rhs |
| 1225 | if (!RuleConfig->isRuleDisabled(109)) { |
| 1226 | if (1 |
| 1227 | && [&]() { |
| 1228 | |
| 1229 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
| 1230 | |
| 1231 | return true; |
| 1232 | }() ) { |
| 1233 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
| 1234 | |
| 1235 | Observer.changingInstr(*MIs[0]); |
| 1236 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
| 1237 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
| 1238 | MIs[0]->getOperand(1).setReg(RHSReg); |
| 1239 | MIs[0]->getOperand(2).setReg(LHSReg); |
| 1240 | Observer.changedInstr(*MIs[0]); |
| 1241 | |
| 1242 | return true; |
| 1243 | } |
| 1244 | } |
| 1245 | return false; |
| 1246 | } |
| 1247 | if (Partition == 3 /* TargetOpcode::G_FREEZE */) { |
| 1248 | // Leaf name: idempotent_prop |
| 1249 | // Rule: idempotent_prop |
| 1250 | if (!RuleConfig->isRuleDisabled(4)) { |
| 1251 | if (1 |
| 1252 | && [&]() { |
| 1253 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
| 1254 | MIs[0]->getOpcode(); |
| 1255 | return true; |
| 1256 | }() ) { |
| 1257 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
| 1258 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1259 | return true; |
| 1260 | } |
| 1261 | } |
| 1262 | return false; |
| 1263 | } |
| 1264 | if (Partition == 4 /* TargetOpcode::G_FABS */) { |
| 1265 | // Leaf name: idempotent_prop |
| 1266 | // Rule: idempotent_prop |
| 1267 | if (!RuleConfig->isRuleDisabled(4)) { |
| 1268 | if (1 |
| 1269 | && [&]() { |
| 1270 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
| 1271 | MIs[0]->getOpcode(); |
| 1272 | return true; |
| 1273 | }() ) { |
| 1274 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
| 1275 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1276 | return true; |
| 1277 | } |
| 1278 | } |
| 1279 | // Leaf name: constant_fp_op |
| 1280 | // Rule: constant_fp_op |
| 1281 | if (!RuleConfig->isRuleDisabled(68)) { |
| 1282 | if (1 |
| 1283 | && [&]() { |
| 1284 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 1285 | return true; |
| 1286 | }() ) { |
| 1287 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 1288 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 1289 | return true; |
| 1290 | } |
| 1291 | } |
| 1292 | // Leaf name: fabs_fneg_fold |
| 1293 | // Rule: fabs_fneg_fold |
| 1294 | if (!RuleConfig->isRuleDisabled(90)) { |
| 1295 | if (1 |
| 1296 | && [&]() { |
| 1297 | return Helper.matchCombineFAbsOfFNeg(*MIs[0], MatchData90); |
| 1298 | return true; |
| 1299 | }() ) { |
| 1300 | LLVM_DEBUG(dbgs() << "Applying rule 'fabs_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fabs_fneg_fold'\n" ; } } while (false); |
| 1301 | Helper.applyBuildFnNoErase(*MIs[0], MatchData90); |
| 1302 | return true; |
| 1303 | } |
| 1304 | } |
| 1305 | return false; |
| 1306 | } |
| 1307 | if (Partition == 5 /* TargetOpcode::G_FCANONICALIZE */) { |
| 1308 | // Leaf name: idempotent_prop |
| 1309 | // Rule: idempotent_prop |
| 1310 | if (!RuleConfig->isRuleDisabled(4)) { |
| 1311 | if (1 |
| 1312 | && [&]() { |
| 1313 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
| 1314 | MIs[0]->getOpcode(); |
| 1315 | return true; |
| 1316 | }() ) { |
| 1317 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
| 1318 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1319 | return true; |
| 1320 | } |
| 1321 | } |
| 1322 | // Leaf name: remove_fcanonicalize |
| 1323 | // Rule: remove_fcanonicalize |
| 1324 | if (!RuleConfig->isRuleDisabled(113)) { |
| 1325 | if (1 |
| 1326 | && [&]() { |
| 1327 | return PostLegalizerHelper.matchRemoveFcanonicalize(*MIs[0], MatchData113); |
| 1328 | return true; |
| 1329 | }() ) { |
| 1330 | LLVM_DEBUG(dbgs() << "Applying rule 'remove_fcanonicalize'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'remove_fcanonicalize'\n" ; } } while (false); |
| 1331 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData113); |
| 1332 | return true; |
| 1333 | } |
| 1334 | } |
| 1335 | return false; |
| 1336 | } |
| 1337 | if (Partition == 6 /* TargetOpcode::G_INSERT_VECTOR_ELT */) { |
| 1338 | // Leaf name: combine_insert_vec_elts_build_vector |
| 1339 | // Rule: combine_insert_vec_elts_build_vector |
| 1340 | if (!RuleConfig->isRuleDisabled(5)) { |
| 1341 | if (1 |
| 1342 | && [&]() { |
| 1343 | return Helper.matchCombineInsertVecElts(*MIs[0], MatchData5); |
| 1344 | return true; |
| 1345 | }() ) { |
| 1346 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n" ; } } while (false); |
| 1347 | Helper.applyCombineInsertVecElts(*MIs[0], MatchData5); |
| 1348 | return true; |
| 1349 | } |
| 1350 | } |
| 1351 | // Leaf name: insert_extract_vec_elt_out_of_bounds |
| 1352 | // Rule: insert_extract_vec_elt_out_of_bounds |
| 1353 | if (!RuleConfig->isRuleDisabled(22)) { |
| 1354 | if (1 |
| 1355 | && [&]() { |
| 1356 | return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]); |
| 1357 | return true; |
| 1358 | }() ) { |
| 1359 | LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n" ; } } while (false); |
| 1360 | Helper.replaceInstWithUndef(*MIs[0]); |
| 1361 | return true; |
| 1362 | } |
| 1363 | } |
| 1364 | return false; |
| 1365 | } |
| 1366 | if (Partition == 7 /* TargetOpcode::G_EXTRACT_VECTOR_ELT */) { |
| 1367 | // Leaf name: extract_vec_elt_build_vec |
| 1368 | // Rule: extract_vec_elt_build_vec |
| 1369 | if (!RuleConfig->isRuleDisabled(6)) { |
| 1370 | if (1 |
| 1371 | && [&]() { |
| 1372 | return Helper.matchExtractVecEltBuildVec(*MIs[0], MatchData6); |
| 1373 | return true; |
| 1374 | }() ) { |
| 1375 | LLVM_DEBUG(dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n" ; } } while (false); |
| 1376 | Helper.applyExtractVecEltBuildVec(*MIs[0], MatchData6); |
| 1377 | return true; |
| 1378 | } |
| 1379 | } |
| 1380 | // Leaf name: insert_extract_vec_elt_out_of_bounds |
| 1381 | // Rule: insert_extract_vec_elt_out_of_bounds |
| 1382 | if (!RuleConfig->isRuleDisabled(22)) { |
| 1383 | if (1 |
| 1384 | && [&]() { |
| 1385 | return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]); |
| 1386 | return true; |
| 1387 | }() ) { |
| 1388 | LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n" ; } } while (false); |
| 1389 | Helper.replaceInstWithUndef(*MIs[0]); |
| 1390 | return true; |
| 1391 | } |
| 1392 | } |
| 1393 | return false; |
| 1394 | } |
| 1395 | if (Partition == 8 /* TargetOpcode::G_BUILD_VECTOR */) { |
| 1396 | // Leaf name: extract_all_elts_from_build_vector |
| 1397 | // Rule: extract_all_elts_from_build_vector |
| 1398 | if (!RuleConfig->isRuleDisabled(7)) { |
| 1399 | if (1 |
| 1400 | && [&]() { |
| 1401 | return Helper.matchExtractAllEltsFromBuildVector(*MIs[0], MatchData7); |
| 1402 | return true; |
| 1403 | }() ) { |
| 1404 | LLVM_DEBUG(dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n" ; } } while (false); |
| 1405 | Helper.applyExtractAllEltsFromBuildVector(*MIs[0], MatchData7); |
| 1406 | return true; |
| 1407 | } |
| 1408 | } |
| 1409 | // Leaf name: buildvector_identity_fold |
| 1410 | // Rule: buildvector_identity_fold |
| 1411 | if (!RuleConfig->isRuleDisabled(34)) { |
| 1412 | if (1 |
| 1413 | && [&]() { |
| 1414 | return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34); |
| 1415 | return true; |
| 1416 | }() ) { |
| 1417 | LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n" ; } } while (false); |
| 1418 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34); |
| 1419 | return true; |
| 1420 | } |
| 1421 | } |
| 1422 | return false; |
| 1423 | } |
| 1424 | if (Partition == 9 /* TargetOpcode::G_LOAD */) { |
| 1425 | // Leaf name: extending_loads |
| 1426 | // Rule: extending_loads |
| 1427 | if (!RuleConfig->isRuleDisabled(8)) { |
| 1428 | if (1 |
| 1429 | && [&]() { |
| 1430 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
| 1431 | return true; |
| 1432 | }() ) { |
| 1433 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
| 1434 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
| 1435 | return true; |
| 1436 | } |
| 1437 | } |
| 1438 | // Leaf name: combine_indexed_load_store |
| 1439 | // Rule: combine_indexed_load_store |
| 1440 | if (!RuleConfig->isRuleDisabled(10)) { |
| 1441 | if (1 |
| 1442 | && [&]() { |
| 1443 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1444 | return true; |
| 1445 | }() ) { |
| 1446 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
| 1447 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1448 | return true; |
| 1449 | } |
| 1450 | } |
| 1451 | return false; |
| 1452 | } |
| 1453 | if (Partition == 10 /* TargetOpcode::G_SEXTLOAD */) { |
| 1454 | // Leaf name: extending_loads |
| 1455 | // Rule: extending_loads |
| 1456 | if (!RuleConfig->isRuleDisabled(8)) { |
| 1457 | if (1 |
| 1458 | && [&]() { |
| 1459 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
| 1460 | return true; |
| 1461 | }() ) { |
| 1462 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
| 1463 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
| 1464 | return true; |
| 1465 | } |
| 1466 | } |
| 1467 | // Leaf name: combine_indexed_load_store |
| 1468 | // Rule: combine_indexed_load_store |
| 1469 | if (!RuleConfig->isRuleDisabled(10)) { |
| 1470 | if (1 |
| 1471 | && [&]() { |
| 1472 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1473 | return true; |
| 1474 | }() ) { |
| 1475 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
| 1476 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1477 | return true; |
| 1478 | } |
| 1479 | } |
| 1480 | return false; |
| 1481 | } |
| 1482 | if (Partition == 11 /* TargetOpcode::G_ZEXTLOAD */) { |
| 1483 | // Leaf name: extending_loads |
| 1484 | // Rule: extending_loads |
| 1485 | if (!RuleConfig->isRuleDisabled(8)) { |
| 1486 | if (1 |
| 1487 | && [&]() { |
| 1488 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
| 1489 | return true; |
| 1490 | }() ) { |
| 1491 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
| 1492 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
| 1493 | return true; |
| 1494 | } |
| 1495 | } |
| 1496 | // Leaf name: combine_indexed_load_store |
| 1497 | // Rule: combine_indexed_load_store |
| 1498 | if (!RuleConfig->isRuleDisabled(10)) { |
| 1499 | if (1 |
| 1500 | && [&]() { |
| 1501 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1502 | return true; |
| 1503 | }() ) { |
| 1504 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
| 1505 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1506 | return true; |
| 1507 | } |
| 1508 | } |
| 1509 | return false; |
| 1510 | } |
| 1511 | if (Partition == 12 /* TargetOpcode::G_AND */) { |
| 1512 | // Leaf name: load_and_mask |
| 1513 | // Rule: load_and_mask |
| 1514 | if (!RuleConfig->isRuleDisabled(9)) { |
| 1515 | if (1 |
| 1516 | && [&]() { |
| 1517 | return Helper.matchCombineLoadWithAndMask(*MIs[0], MatchData9); |
| 1518 | return true; |
| 1519 | }() ) { |
| 1520 | LLVM_DEBUG(dbgs() << "Applying rule 'load_and_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'load_and_mask'\n" ; } } while (false); |
| 1521 | Helper.applyBuildFn(*MIs[0], MatchData9); |
| 1522 | return true; |
| 1523 | } |
| 1524 | } |
| 1525 | // Leaf name: undef_to_int_zero |
| 1526 | // Rule: undef_to_int_zero |
| 1527 | if (!RuleConfig->isRuleDisabled(12)) { |
| 1528 | if (1 |
| 1529 | && [&]() { |
| 1530 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1531 | return true; |
| 1532 | }() ) { |
| 1533 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n" ; } } while (false); |
| 1534 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 1535 | return true; |
| 1536 | } |
| 1537 | } |
| 1538 | // Leaf name: binop_same_val |
| 1539 | // Rule: binop_same_val |
| 1540 | if (!RuleConfig->isRuleDisabled(25)) { |
| 1541 | if (1 |
| 1542 | && [&]() { |
| 1543 | return Helper.matchBinOpSameVal(*MIs[0]); |
| 1544 | return true; |
| 1545 | }() ) { |
| 1546 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n" ; } } while (false); |
| 1547 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1548 | return true; |
| 1549 | } |
| 1550 | } |
| 1551 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
| 1552 | // Rule: hoist_logic_op_with_same_opcode_hands |
| 1553 | if (!RuleConfig->isRuleDisabled(40)) { |
| 1554 | if (1 |
| 1555 | && [&]() { |
| 1556 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData40); |
| 1557 | return true; |
| 1558 | }() ) { |
| 1559 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
| 1560 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData40); |
| 1561 | return true; |
| 1562 | } |
| 1563 | } |
| 1564 | // Leaf name: narrow_binop_feeding_and |
| 1565 | // Rule: narrow_binop_feeding_and |
| 1566 | if (!RuleConfig->isRuleDisabled(46)) { |
| 1567 | if (1 |
| 1568 | && [&]() { |
| 1569 | return Helper.matchNarrowBinopFeedingAnd(*MIs[0], MatchData46); |
| 1570 | return true; |
| 1571 | }() ) { |
| 1572 | LLVM_DEBUG(dbgs() << "Applying rule 'narrow_binop_feeding_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'narrow_binop_feeding_and'\n" ; } } while (false); |
| 1573 | Helper.applyBuildFnNoErase(*MIs[0], MatchData46); |
| 1574 | return true; |
| 1575 | } |
| 1576 | } |
| 1577 | // Leaf name: redundant_and |
| 1578 | // Rule: redundant_and |
| 1579 | if (!RuleConfig->isRuleDisabled(50)) { |
| 1580 | if (1 |
| 1581 | && [&]() { |
| 1582 | return Helper.matchRedundantAnd(*MIs[0], MatchData50); |
| 1583 | return true; |
| 1584 | }() ) { |
| 1585 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_and'\n" ; } } while (false); |
| 1586 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData50); |
| 1587 | return true; |
| 1588 | } |
| 1589 | } |
| 1590 | // Leaf name: overlapping_and |
| 1591 | // Rule: overlapping_and |
| 1592 | if (!RuleConfig->isRuleDisabled(70)) { |
| 1593 | if (1 |
| 1594 | && [&]() { |
| 1595 | return Helper.matchOverlappingAnd(*MIs[0], MatchData70); |
| 1596 | return true; |
| 1597 | }() ) { |
| 1598 | LLVM_DEBUG(dbgs() << "Applying rule 'overlapping_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'overlapping_and'\n" ; } } while (false); |
| 1599 | Helper.applyBuildFn(*MIs[0], MatchData70); |
| 1600 | return true; |
| 1601 | } |
| 1602 | } |
| 1603 | // Leaf name: bitfield_extract_from_and |
| 1604 | // Rule: bitfield_extract_from_and |
| 1605 | if (!RuleConfig->isRuleDisabled(86)) { |
| 1606 | if (1 |
| 1607 | && [&]() { |
| 1608 | return Helper.matchBitfieldExtractFromAnd(*MIs[0], MatchData86); |
| 1609 | return true; |
| 1610 | }() ) { |
| 1611 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_and'\n" ; } } while (false); |
| 1612 | Helper.applyBuildFn(*MIs[0], MatchData86); |
| 1613 | return true; |
| 1614 | } |
| 1615 | } |
| 1616 | // Leaf name: constant_fold |
| 1617 | // Rule: constant_fold |
| 1618 | if (!RuleConfig->isRuleDisabled(89)) { |
| 1619 | if (1 |
| 1620 | && [&]() { |
| 1621 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
| 1622 | return true; |
| 1623 | }() ) { |
| 1624 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 1625 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
| 1626 | return true; |
| 1627 | } |
| 1628 | } |
| 1629 | // Leaf name: and_or_disjoint_mask |
| 1630 | // Rule: and_or_disjoint_mask |
| 1631 | if (!RuleConfig->isRuleDisabled(95)) { |
| 1632 | if (1 |
| 1633 | && [&]() { |
| 1634 | return Helper.matchAndOrDisjointMask(*MIs[0], MatchData95); |
| 1635 | return true; |
| 1636 | }() ) { |
| 1637 | LLVM_DEBUG(dbgs() << "Applying rule 'and_or_disjoint_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'and_or_disjoint_mask'\n" ; } } while (false); |
| 1638 | Helper.applyBuildFnNoErase(*MIs[0], MatchData95); |
| 1639 | return true; |
| 1640 | } |
| 1641 | } |
| 1642 | // Leaf name: fold_binop_into_select |
| 1643 | // Rule: fold_binop_into_select |
| 1644 | if (!RuleConfig->isRuleDisabled(104)) { |
| 1645 | if (1 |
| 1646 | && [&]() { |
| 1647 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 1648 | return true; |
| 1649 | }() ) { |
| 1650 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 1651 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 1652 | return true; |
| 1653 | } |
| 1654 | } |
| 1655 | // Leaf name: commute_constant_to_rhs |
| 1656 | // Rule: commute_constant_to_rhs |
| 1657 | if (!RuleConfig->isRuleDisabled(109)) { |
| 1658 | if (1 |
| 1659 | && [&]() { |
| 1660 | |
| 1661 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
| 1662 | |
| 1663 | return true; |
| 1664 | }() ) { |
| 1665 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
| 1666 | |
| 1667 | Observer.changingInstr(*MIs[0]); |
| 1668 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
| 1669 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
| 1670 | MIs[0]->getOperand(1).setReg(RHSReg); |
| 1671 | MIs[0]->getOperand(2).setReg(LHSReg); |
| 1672 | Observer.changedInstr(*MIs[0]); |
| 1673 | |
| 1674 | return true; |
| 1675 | } |
| 1676 | } |
| 1677 | return false; |
| 1678 | } |
| 1679 | if (Partition == 13 /* TargetOpcode::G_STORE */) { |
| 1680 | // Leaf name: combine_indexed_load_store |
| 1681 | // Rule: combine_indexed_load_store |
| 1682 | if (!RuleConfig->isRuleDisabled(10)) { |
| 1683 | if (1 |
| 1684 | && [&]() { |
| 1685 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1686 | return true; |
| 1687 | }() ) { |
| 1688 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
| 1689 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1690 | return true; |
| 1691 | } |
| 1692 | } |
| 1693 | // Leaf name: erase_undef_store |
| 1694 | // Rule: erase_undef_store |
| 1695 | if (!RuleConfig->isRuleDisabled(20)) { |
| 1696 | if (1 |
| 1697 | && [&]() { |
| 1698 | return Helper.matchUndefStore(*MIs[0]); |
| 1699 | return true; |
| 1700 | }() ) { |
| 1701 | LLVM_DEBUG(dbgs() << "Applying rule 'erase_undef_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'erase_undef_store'\n" ; } } while (false); |
| 1702 | return Helper.eraseInst(*MIs[0]); |
| 1703 | return true; |
| 1704 | } |
| 1705 | } |
| 1706 | // Leaf name: truncstore_merge |
| 1707 | // Rule: truncstore_merge |
| 1708 | if (!RuleConfig->isRuleDisabled(81)) { |
| 1709 | if (1 |
| 1710 | && [&]() { |
| 1711 | return Helper.matchTruncStoreMerge(*MIs[0], MatchData81); |
| 1712 | return true; |
| 1713 | }() ) { |
| 1714 | LLVM_DEBUG(dbgs() << "Applying rule 'truncstore_merge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'truncstore_merge'\n" ; } } while (false); |
| 1715 | Helper.applyTruncStoreMerge(*MIs[0], MatchData81); |
| 1716 | return true; |
| 1717 | } |
| 1718 | } |
| 1719 | return false; |
| 1720 | } |
| 1721 | if (Partition == 14 /* TargetOpcode::G_UITOFP */) { |
| 1722 | // Leaf name: undef_to_fp_zero |
| 1723 | // Rule: undef_to_fp_zero |
| 1724 | if (!RuleConfig->isRuleDisabled(11)) { |
| 1725 | if (1 |
| 1726 | && [&]() { |
| 1727 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1728 | return true; |
| 1729 | }() ) { |
| 1730 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n" ; } } while (false); |
| 1731 | Helper.replaceInstWithFConstant(*MIs[0], 0.0); |
| 1732 | return true; |
| 1733 | } |
| 1734 | } |
| 1735 | // Leaf name: uchar_to_float |
| 1736 | // Rule: uchar_to_float |
| 1737 | if (!RuleConfig->isRuleDisabled(111)) { |
| 1738 | if (1 |
| 1739 | && [&]() { |
| 1740 | return PostLegalizerHelper.matchUCharToFloat(*MIs[0]); |
| 1741 | return true; |
| 1742 | }() ) { |
| 1743 | LLVM_DEBUG(dbgs() << "Applying rule 'uchar_to_float'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'uchar_to_float'\n" ; } } while (false); |
| 1744 | PostLegalizerHelper.applyUCharToFloat(*MIs[0]); |
| 1745 | return true; |
| 1746 | } |
| 1747 | } |
| 1748 | return false; |
| 1749 | } |
| 1750 | if (Partition == 15 /* TargetOpcode::G_SITOFP */) { |
| 1751 | // Leaf name: undef_to_fp_zero |
| 1752 | // Rule: undef_to_fp_zero |
| 1753 | if (!RuleConfig->isRuleDisabled(11)) { |
| 1754 | if (1 |
| 1755 | && [&]() { |
| 1756 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1757 | return true; |
| 1758 | }() ) { |
| 1759 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n" ; } } while (false); |
| 1760 | Helper.replaceInstWithFConstant(*MIs[0], 0.0); |
| 1761 | return true; |
| 1762 | } |
| 1763 | } |
| 1764 | // Leaf name: uchar_to_float |
| 1765 | // Rule: uchar_to_float |
| 1766 | if (!RuleConfig->isRuleDisabled(111)) { |
| 1767 | if (1 |
| 1768 | && [&]() { |
| 1769 | return PostLegalizerHelper.matchUCharToFloat(*MIs[0]); |
| 1770 | return true; |
| 1771 | }() ) { |
| 1772 | LLVM_DEBUG(dbgs() << "Applying rule 'uchar_to_float'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'uchar_to_float'\n" ; } } while (false); |
| 1773 | PostLegalizerHelper.applyUCharToFloat(*MIs[0]); |
| 1774 | return true; |
| 1775 | } |
| 1776 | } |
| 1777 | return false; |
| 1778 | } |
| 1779 | if (Partition == 16 /* TargetOpcode::G_OR */) { |
| 1780 | // Leaf name: undef_to_negative_one |
| 1781 | // Rule: undef_to_negative_one |
| 1782 | if (!RuleConfig->isRuleDisabled(13)) { |
| 1783 | if (1 |
| 1784 | && [&]() { |
| 1785 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1786 | return true; |
| 1787 | }() ) { |
| 1788 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_negative_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_negative_one'\n" ; } } while (false); |
| 1789 | Helper.replaceInstWithConstant(*MIs[0], -1); |
| 1790 | return true; |
| 1791 | } |
| 1792 | } |
| 1793 | // Leaf name: right_identity_zero |
| 1794 | // Rule: right_identity_zero |
| 1795 | if (!RuleConfig->isRuleDisabled(24)) { |
| 1796 | if (1 |
| 1797 | && [&]() { |
| 1798 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 1799 | return true; |
| 1800 | }() ) { |
| 1801 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 1802 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1803 | return true; |
| 1804 | } |
| 1805 | } |
| 1806 | // Leaf name: binop_same_val |
| 1807 | // Rule: binop_same_val |
| 1808 | if (!RuleConfig->isRuleDisabled(25)) { |
| 1809 | if (1 |
| 1810 | && [&]() { |
| 1811 | return Helper.matchBinOpSameVal(*MIs[0]); |
| 1812 | return true; |
| 1813 | }() ) { |
| 1814 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n" ; } } while (false); |
| 1815 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1816 | return true; |
| 1817 | } |
| 1818 | } |
| 1819 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
| 1820 | // Rule: hoist_logic_op_with_same_opcode_hands |
| 1821 | if (!RuleConfig->isRuleDisabled(40)) { |
| 1822 | if (1 |
| 1823 | && [&]() { |
| 1824 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData40); |
| 1825 | return true; |
| 1826 | }() ) { |
| 1827 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
| 1828 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData40); |
| 1829 | return true; |
| 1830 | } |
| 1831 | } |
| 1832 | // Leaf name: redundant_or |
| 1833 | // Rule: redundant_or |
| 1834 | if (!RuleConfig->isRuleDisabled(52)) { |
| 1835 | if (1 |
| 1836 | && [&]() { |
| 1837 | return Helper.matchRedundantOr(*MIs[0], MatchData52); |
| 1838 | return true; |
| 1839 | }() ) { |
| 1840 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_or'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_or'\n" ; } } while (false); |
| 1841 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData52); |
| 1842 | return true; |
| 1843 | } |
| 1844 | } |
| 1845 | // Leaf name: load_or_combine |
| 1846 | // Rule: load_or_combine |
| 1847 | if (!RuleConfig->isRuleDisabled(80)) { |
| 1848 | if (1 |
| 1849 | && [&]() { |
| 1850 | return Helper.matchLoadOrCombine(*MIs[0], MatchData80); |
| 1851 | return true; |
| 1852 | }() ) { |
| 1853 | LLVM_DEBUG(dbgs() << "Applying rule 'load_or_combine'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'load_or_combine'\n" ; } } while (false); |
| 1854 | Helper.applyBuildFn(*MIs[0], MatchData80); |
| 1855 | return true; |
| 1856 | } |
| 1857 | } |
| 1858 | // Leaf name: funnel_shift_from_or_shift |
| 1859 | // Rule: funnel_shift_from_or_shift |
| 1860 | if (!RuleConfig->isRuleDisabled(83)) { |
| 1861 | if (1 |
| 1862 | && [&]() { |
| 1863 | return Helper.matchOrShiftToFunnelShift(*MIs[0], MatchData83); |
| 1864 | return true; |
| 1865 | }() ) { |
| 1866 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n" ; } } while (false); |
| 1867 | Helper.applyBuildFn(*MIs[0], MatchData83); |
| 1868 | return true; |
| 1869 | } |
| 1870 | } |
| 1871 | // Leaf name: constant_fold |
| 1872 | // Rule: constant_fold |
| 1873 | if (!RuleConfig->isRuleDisabled(89)) { |
| 1874 | if (1 |
| 1875 | && [&]() { |
| 1876 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
| 1877 | return true; |
| 1878 | }() ) { |
| 1879 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 1880 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
| 1881 | return true; |
| 1882 | } |
| 1883 | } |
| 1884 | // Leaf name: fold_binop_into_select |
| 1885 | // Rule: fold_binop_into_select |
| 1886 | if (!RuleConfig->isRuleDisabled(104)) { |
| 1887 | if (1 |
| 1888 | && [&]() { |
| 1889 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 1890 | return true; |
| 1891 | }() ) { |
| 1892 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 1893 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 1894 | return true; |
| 1895 | } |
| 1896 | } |
| 1897 | // Leaf name: commute_constant_to_rhs |
| 1898 | // Rule: commute_constant_to_rhs |
| 1899 | if (!RuleConfig->isRuleDisabled(109)) { |
| 1900 | if (1 |
| 1901 | && [&]() { |
| 1902 | |
| 1903 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
| 1904 | |
| 1905 | return true; |
| 1906 | }() ) { |
| 1907 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
| 1908 | |
| 1909 | Observer.changingInstr(*MIs[0]); |
| 1910 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
| 1911 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
| 1912 | MIs[0]->getOperand(1).setReg(RHSReg); |
| 1913 | MIs[0]->getOperand(2).setReg(LHSReg); |
| 1914 | Observer.changedInstr(*MIs[0]); |
| 1915 | |
| 1916 | return true; |
| 1917 | } |
| 1918 | } |
| 1919 | return false; |
| 1920 | } |
| 1921 | if (Partition == 17 /* TargetOpcode::G_SHL */) { |
| 1922 | // Leaf name: binop_left_undef_to_zero |
| 1923 | // Rule: binop_left_undef_to_zero |
| 1924 | if (!RuleConfig->isRuleDisabled(14)) { |
| 1925 | if (1 |
| 1926 | && [&]() { |
| 1927 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
| 1928 | return true; |
| 1929 | }() ) { |
| 1930 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
| 1931 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 1932 | return true; |
| 1933 | } |
| 1934 | } |
| 1935 | // Leaf name: binop_right_undef_to_undef |
| 1936 | // Rule: binop_right_undef_to_undef |
| 1937 | if (!RuleConfig->isRuleDisabled(15)) { |
| 1938 | if (1 |
| 1939 | && [&]() { |
| 1940 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
| 1941 | return true; |
| 1942 | }() ) { |
| 1943 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
| 1944 | Helper.replaceInstWithUndef(*MIs[0]); |
| 1945 | return true; |
| 1946 | } |
| 1947 | } |
| 1948 | // Leaf name: right_identity_zero |
| 1949 | // Rule: right_identity_zero |
| 1950 | if (!RuleConfig->isRuleDisabled(24)) { |
| 1951 | if (1 |
| 1952 | && [&]() { |
| 1953 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 1954 | return true; |
| 1955 | }() ) { |
| 1956 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 1957 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1958 | return true; |
| 1959 | } |
| 1960 | } |
| 1961 | // Leaf name: reduce_shl_of_extend |
| 1962 | // Rule: reduce_shl_of_extend |
| 1963 | if (!RuleConfig->isRuleDisabled(45)) { |
| 1964 | if (1 |
| 1965 | && [&]() { |
| 1966 | return Helper.matchCombineShlOfExtend(*MIs[0], MatchData45); |
| 1967 | return true; |
| 1968 | }() ) { |
| 1969 | LLVM_DEBUG(dbgs() << "Applying rule 'reduce_shl_of_extend'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'reduce_shl_of_extend'\n" ; } } while (false); |
| 1970 | Helper.applyCombineShlOfExtend(*MIs[0], MatchData45); |
| 1971 | return true; |
| 1972 | } |
| 1973 | } |
| 1974 | // Leaf name: shift_immed_chain |
| 1975 | // Rule: shift_immed_chain |
| 1976 | if (!RuleConfig->isRuleDisabled(78)) { |
| 1977 | if (1 |
| 1978 | && [&]() { |
| 1979 | return Helper.matchShiftImmedChain(*MIs[0], MatchData78); |
| 1980 | return true; |
| 1981 | }() ) { |
| 1982 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
| 1983 | Helper.applyShiftImmedChain(*MIs[0], MatchData78); |
| 1984 | return true; |
| 1985 | } |
| 1986 | } |
| 1987 | // Leaf name: shift_of_shifted_logic_chain |
| 1988 | // Rule: shift_of_shifted_logic_chain |
| 1989 | if (!RuleConfig->isRuleDisabled(79)) { |
| 1990 | if (1 |
| 1991 | && [&]() { |
| 1992 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79); |
| 1993 | return true; |
| 1994 | }() ) { |
| 1995 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
| 1996 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79); |
| 1997 | return true; |
| 1998 | } |
| 1999 | } |
| 2000 | // Leaf name: fold_binop_into_select |
| 2001 | // Rule: fold_binop_into_select |
| 2002 | if (!RuleConfig->isRuleDisabled(104)) { |
| 2003 | if (1 |
| 2004 | && [&]() { |
| 2005 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2006 | return true; |
| 2007 | }() ) { |
| 2008 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2009 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2010 | return true; |
| 2011 | } |
| 2012 | } |
| 2013 | return false; |
| 2014 | } |
| 2015 | if (Partition == 18 /* TargetOpcode::G_UDIV */) { |
| 2016 | // Leaf name: binop_left_undef_to_zero |
| 2017 | // Rule: binop_left_undef_to_zero |
| 2018 | if (!RuleConfig->isRuleDisabled(14)) { |
| 2019 | if (1 |
| 2020 | && [&]() { |
| 2021 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
| 2022 | return true; |
| 2023 | }() ) { |
| 2024 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
| 2025 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 2026 | return true; |
| 2027 | } |
| 2028 | } |
| 2029 | // Leaf name: binop_left_to_zero |
| 2030 | // Rule: binop_left_to_zero |
| 2031 | if (!RuleConfig->isRuleDisabled(26)) { |
| 2032 | if (1 |
| 2033 | && [&]() { |
| 2034 | return Helper.matchOperandIsZero(*MIs[0], 1); |
| 2035 | return true; |
| 2036 | }() ) { |
| 2037 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
| 2038 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2039 | return true; |
| 2040 | } |
| 2041 | } |
| 2042 | // Leaf name: div_rem_to_divrem |
| 2043 | // Rule: div_rem_to_divrem |
| 2044 | if (!RuleConfig->isRuleDisabled(82)) { |
| 2045 | if (1 |
| 2046 | && [&]() { |
| 2047 | return Helper.matchCombineDivRem(*MIs[0], MatchData82); |
| 2048 | return true; |
| 2049 | }() ) { |
| 2050 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
| 2051 | Helper.applyCombineDivRem(*MIs[0], MatchData82); |
| 2052 | return true; |
| 2053 | } |
| 2054 | } |
| 2055 | // Leaf name: udiv_by_const |
| 2056 | // Rule: udiv_by_const |
| 2057 | if (!RuleConfig->isRuleDisabled(91)) { |
| 2058 | if (1 |
| 2059 | && [&]() { |
| 2060 | return Helper.matchUDivByConst(*MIs[0]); |
| 2061 | return true; |
| 2062 | }() ) { |
| 2063 | LLVM_DEBUG(dbgs() << "Applying rule 'udiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'udiv_by_const'\n" ; } } while (false); |
| 2064 | Helper.applyUDivByConst(*MIs[0]); |
| 2065 | return true; |
| 2066 | } |
| 2067 | } |
| 2068 | // Leaf name: fold_binop_into_select |
| 2069 | // Rule: fold_binop_into_select |
| 2070 | if (!RuleConfig->isRuleDisabled(104)) { |
| 2071 | if (1 |
| 2072 | && [&]() { |
| 2073 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2074 | return true; |
| 2075 | }() ) { |
| 2076 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2077 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2078 | return true; |
| 2079 | } |
| 2080 | } |
| 2081 | return false; |
| 2082 | } |
| 2083 | if (Partition == 19 /* TargetOpcode::G_UREM */) { |
| 2084 | // Leaf name: binop_left_undef_to_zero |
| 2085 | // Rule: binop_left_undef_to_zero |
| 2086 | if (!RuleConfig->isRuleDisabled(14)) { |
| 2087 | if (1 |
| 2088 | && [&]() { |
| 2089 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
| 2090 | return true; |
| 2091 | }() ) { |
| 2092 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
| 2093 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 2094 | return true; |
| 2095 | } |
| 2096 | } |
| 2097 | // Leaf name: binop_left_to_zero |
| 2098 | // Rule: binop_left_to_zero |
| 2099 | if (!RuleConfig->isRuleDisabled(26)) { |
| 2100 | if (1 |
| 2101 | && [&]() { |
| 2102 | return Helper.matchOperandIsZero(*MIs[0], 1); |
| 2103 | return true; |
| 2104 | }() ) { |
| 2105 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
| 2106 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2107 | return true; |
| 2108 | } |
| 2109 | } |
| 2110 | // Leaf name: urem_pow2_to_mask |
| 2111 | // Rule: urem_pow2_to_mask |
| 2112 | if (!RuleConfig->isRuleDisabled(53)) { |
| 2113 | if (1 |
| 2114 | && [&]() { |
| 2115 | return Helper.matchOperandIsKnownToBeAPowerOfTwo(*MIs[0], 2); |
| 2116 | return true; |
| 2117 | }() ) { |
| 2118 | LLVM_DEBUG(dbgs() << "Applying rule 'urem_pow2_to_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'urem_pow2_to_mask'\n" ; } } while (false); |
| 2119 | Helper.applySimplifyURemByPow2(*MIs[0]); |
| 2120 | return true; |
| 2121 | } |
| 2122 | } |
| 2123 | // Leaf name: div_rem_to_divrem |
| 2124 | // Rule: div_rem_to_divrem |
| 2125 | if (!RuleConfig->isRuleDisabled(82)) { |
| 2126 | if (1 |
| 2127 | && [&]() { |
| 2128 | return Helper.matchCombineDivRem(*MIs[0], MatchData82); |
| 2129 | return true; |
| 2130 | }() ) { |
| 2131 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
| 2132 | Helper.applyCombineDivRem(*MIs[0], MatchData82); |
| 2133 | return true; |
| 2134 | } |
| 2135 | } |
| 2136 | // Leaf name: fold_binop_into_select |
| 2137 | // Rule: fold_binop_into_select |
| 2138 | if (!RuleConfig->isRuleDisabled(104)) { |
| 2139 | if (1 |
| 2140 | && [&]() { |
| 2141 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2142 | return true; |
| 2143 | }() ) { |
| 2144 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2145 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2146 | return true; |
| 2147 | } |
| 2148 | } |
| 2149 | return false; |
| 2150 | } |
| 2151 | if (Partition == 20 /* TargetOpcode::G_ASHR */) { |
| 2152 | // Leaf name: binop_right_undef_to_undef |
| 2153 | // Rule: binop_right_undef_to_undef |
| 2154 | if (!RuleConfig->isRuleDisabled(15)) { |
| 2155 | if (1 |
| 2156 | && [&]() { |
| 2157 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
| 2158 | return true; |
| 2159 | }() ) { |
| 2160 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
| 2161 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2162 | return true; |
| 2163 | } |
| 2164 | } |
| 2165 | // Leaf name: right_identity_zero |
| 2166 | // Rule: right_identity_zero |
| 2167 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2168 | if (1 |
| 2169 | && [&]() { |
| 2170 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2171 | return true; |
| 2172 | }() ) { |
| 2173 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2174 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2175 | return true; |
| 2176 | } |
| 2177 | } |
| 2178 | // Leaf name: shl_ashr_to_sext_inreg |
| 2179 | // Rule: shl_ashr_to_sext_inreg |
| 2180 | if (!RuleConfig->isRuleDisabled(43)) { |
| 2181 | if (1 |
| 2182 | && [&]() { |
| 2183 | return Helper.matchAshrShlToSextInreg(*MIs[0], MatchData43); |
| 2184 | return true; |
| 2185 | }() ) { |
| 2186 | LLVM_DEBUG(dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n" ; } } while (false); |
| 2187 | Helper.applyAshShlToSextInreg(*MIs[0], MatchData43); |
| 2188 | return true; |
| 2189 | } |
| 2190 | } |
| 2191 | // Leaf name: shift_immed_chain |
| 2192 | // Rule: shift_immed_chain |
| 2193 | if (!RuleConfig->isRuleDisabled(78)) { |
| 2194 | if (1 |
| 2195 | && [&]() { |
| 2196 | return Helper.matchShiftImmedChain(*MIs[0], MatchData78); |
| 2197 | return true; |
| 2198 | }() ) { |
| 2199 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
| 2200 | Helper.applyShiftImmedChain(*MIs[0], MatchData78); |
| 2201 | return true; |
| 2202 | } |
| 2203 | } |
| 2204 | // Leaf name: shift_of_shifted_logic_chain |
| 2205 | // Rule: shift_of_shifted_logic_chain |
| 2206 | if (!RuleConfig->isRuleDisabled(79)) { |
| 2207 | if (1 |
| 2208 | && [&]() { |
| 2209 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79); |
| 2210 | return true; |
| 2211 | }() ) { |
| 2212 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
| 2213 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79); |
| 2214 | return true; |
| 2215 | } |
| 2216 | } |
| 2217 | // Leaf name: bitfield_extract_from_shr |
| 2218 | // Rule: bitfield_extract_from_shr |
| 2219 | if (!RuleConfig->isRuleDisabled(87)) { |
| 2220 | if (1 |
| 2221 | && [&]() { |
| 2222 | return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData87); |
| 2223 | return true; |
| 2224 | }() ) { |
| 2225 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n" ; } } while (false); |
| 2226 | Helper.applyBuildFn(*MIs[0], MatchData87); |
| 2227 | return true; |
| 2228 | } |
| 2229 | } |
| 2230 | // Leaf name: bitfield_extract_from_shr_and |
| 2231 | // Rule: bitfield_extract_from_shr_and |
| 2232 | if (!RuleConfig->isRuleDisabled(88)) { |
| 2233 | if (1 |
| 2234 | && [&]() { |
| 2235 | return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData88); |
| 2236 | return true; |
| 2237 | }() ) { |
| 2238 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n" ; } } while (false); |
| 2239 | Helper.applyBuildFn(*MIs[0], MatchData88); |
| 2240 | return true; |
| 2241 | } |
| 2242 | } |
| 2243 | // Leaf name: fold_binop_into_select |
| 2244 | // Rule: fold_binop_into_select |
| 2245 | if (!RuleConfig->isRuleDisabled(104)) { |
| 2246 | if (1 |
| 2247 | && [&]() { |
| 2248 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2249 | return true; |
| 2250 | }() ) { |
| 2251 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2252 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2253 | return true; |
| 2254 | } |
| 2255 | } |
| 2256 | return false; |
| 2257 | } |
| 2258 | if (Partition == 21 /* TargetOpcode::G_LSHR */) { |
| 2259 | // Leaf name: binop_right_undef_to_undef |
| 2260 | // Rule: binop_right_undef_to_undef |
| 2261 | if (!RuleConfig->isRuleDisabled(15)) { |
| 2262 | if (1 |
| 2263 | && [&]() { |
| 2264 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
| 2265 | return true; |
| 2266 | }() ) { |
| 2267 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
| 2268 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2269 | return true; |
| 2270 | } |
| 2271 | } |
| 2272 | // Leaf name: right_identity_zero |
| 2273 | // Rule: right_identity_zero |
| 2274 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2275 | if (1 |
| 2276 | && [&]() { |
| 2277 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2278 | return true; |
| 2279 | }() ) { |
| 2280 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2281 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2282 | return true; |
| 2283 | } |
| 2284 | } |
| 2285 | // Leaf name: shift_immed_chain |
| 2286 | // Rule: shift_immed_chain |
| 2287 | if (!RuleConfig->isRuleDisabled(78)) { |
| 2288 | if (1 |
| 2289 | && [&]() { |
| 2290 | return Helper.matchShiftImmedChain(*MIs[0], MatchData78); |
| 2291 | return true; |
| 2292 | }() ) { |
| 2293 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
| 2294 | Helper.applyShiftImmedChain(*MIs[0], MatchData78); |
| 2295 | return true; |
| 2296 | } |
| 2297 | } |
| 2298 | // Leaf name: shift_of_shifted_logic_chain |
| 2299 | // Rule: shift_of_shifted_logic_chain |
| 2300 | if (!RuleConfig->isRuleDisabled(79)) { |
| 2301 | if (1 |
| 2302 | && [&]() { |
| 2303 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79); |
| 2304 | return true; |
| 2305 | }() ) { |
| 2306 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
| 2307 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79); |
| 2308 | return true; |
| 2309 | } |
| 2310 | } |
| 2311 | // Leaf name: bitfield_extract_from_shr |
| 2312 | // Rule: bitfield_extract_from_shr |
| 2313 | if (!RuleConfig->isRuleDisabled(87)) { |
| 2314 | if (1 |
| 2315 | && [&]() { |
| 2316 | return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData87); |
| 2317 | return true; |
| 2318 | }() ) { |
| 2319 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n" ; } } while (false); |
| 2320 | Helper.applyBuildFn(*MIs[0], MatchData87); |
| 2321 | return true; |
| 2322 | } |
| 2323 | } |
| 2324 | // Leaf name: bitfield_extract_from_shr_and |
| 2325 | // Rule: bitfield_extract_from_shr_and |
| 2326 | if (!RuleConfig->isRuleDisabled(88)) { |
| 2327 | if (1 |
| 2328 | && [&]() { |
| 2329 | return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData88); |
| 2330 | return true; |
| 2331 | }() ) { |
| 2332 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n" ; } } while (false); |
| 2333 | Helper.applyBuildFn(*MIs[0], MatchData88); |
| 2334 | return true; |
| 2335 | } |
| 2336 | } |
| 2337 | // Leaf name: fold_binop_into_select |
| 2338 | // Rule: fold_binop_into_select |
| 2339 | if (!RuleConfig->isRuleDisabled(104)) { |
| 2340 | if (1 |
| 2341 | && [&]() { |
| 2342 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2343 | return true; |
| 2344 | }() ) { |
| 2345 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2346 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2347 | return true; |
| 2348 | } |
| 2349 | } |
| 2350 | return false; |
| 2351 | } |
| 2352 | if (Partition == 22 /* TargetOpcode::G_ABS */) { |
| 2353 | // Leaf name: unary_undef_to_zero |
| 2354 | // Rule: unary_undef_to_zero |
| 2355 | if (!RuleConfig->isRuleDisabled(16)) { |
| 2356 | if (1 |
| 2357 | && [&]() { |
| 2358 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
| 2359 | return true; |
| 2360 | }() ) { |
| 2361 | LLVM_DEBUG(dbgs() << "Applying rule 'unary_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unary_undef_to_zero'\n" ; } } while (false); |
| 2362 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 2363 | return true; |
| 2364 | } |
| 2365 | } |
| 2366 | return false; |
| 2367 | } |
| 2368 | if (Partition == 23 /* TargetOpcode::G_FPTOSI */) { |
| 2369 | // Leaf name: propagate_undef_any_op |
| 2370 | // Rule: propagate_undef_any_op |
| 2371 | if (!RuleConfig->isRuleDisabled(17)) { |
| 2372 | if (1 |
| 2373 | && [&]() { |
| 2374 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 2375 | return true; |
| 2376 | }() ) { |
| 2377 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 2378 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2379 | return true; |
| 2380 | } |
| 2381 | } |
| 2382 | return false; |
| 2383 | } |
| 2384 | if (Partition == 24 /* TargetOpcode::G_FPTOUI */) { |
| 2385 | // Leaf name: propagate_undef_any_op |
| 2386 | // Rule: propagate_undef_any_op |
| 2387 | if (!RuleConfig->isRuleDisabled(17)) { |
| 2388 | if (1 |
| 2389 | && [&]() { |
| 2390 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 2391 | return true; |
| 2392 | }() ) { |
| 2393 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 2394 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2395 | return true; |
| 2396 | } |
| 2397 | } |
| 2398 | return false; |
| 2399 | } |
| 2400 | if (Partition == 25 /* TargetOpcode::G_SUB */) { |
| 2401 | // Leaf name: propagate_undef_any_op |
| 2402 | // Rule: propagate_undef_any_op |
| 2403 | if (!RuleConfig->isRuleDisabled(17)) { |
| 2404 | if (1 |
| 2405 | && [&]() { |
| 2406 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 2407 | return true; |
| 2408 | }() ) { |
| 2409 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 2410 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2411 | return true; |
| 2412 | } |
| 2413 | } |
| 2414 | // Leaf name: right_identity_zero |
| 2415 | // Rule: right_identity_zero |
| 2416 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2417 | if (1 |
| 2418 | && [&]() { |
| 2419 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2420 | return true; |
| 2421 | }() ) { |
| 2422 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2423 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2424 | return true; |
| 2425 | } |
| 2426 | } |
| 2427 | // Leaf name: constant_fold |
| 2428 | // Rule: constant_fold |
| 2429 | if (!RuleConfig->isRuleDisabled(89)) { |
| 2430 | if (1 |
| 2431 | && [&]() { |
| 2432 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
| 2433 | return true; |
| 2434 | }() ) { |
| 2435 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 2436 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
| 2437 | return true; |
| 2438 | } |
| 2439 | } |
| 2440 | // Leaf name: fold_binop_into_select |
| 2441 | // Rule: fold_binop_into_select |
| 2442 | if (!RuleConfig->isRuleDisabled(104)) { |
| 2443 | if (1 |
| 2444 | && [&]() { |
| 2445 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2446 | return true; |
| 2447 | }() ) { |
| 2448 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2449 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2450 | return true; |
| 2451 | } |
| 2452 | } |
| 2453 | // Leaf name: sub_add_reg |
| 2454 | // Rule: sub_add_reg |
| 2455 | if (!RuleConfig->isRuleDisabled(105)) { |
| 2456 | if (1 |
| 2457 | && [&]() { |
| 2458 | return Helper.matchSubAddSameReg(*MIs[0], MatchData105); |
| 2459 | return true; |
| 2460 | }() ) { |
| 2461 | LLVM_DEBUG(dbgs() << "Applying rule 'sub_add_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'sub_add_reg'\n" ; } } while (false); |
| 2462 | Helper.applyBuildFn(*MIs[0], MatchData105); |
| 2463 | return true; |
| 2464 | } |
| 2465 | } |
| 2466 | return false; |
| 2467 | } |
| 2468 | if (Partition == 26 /* TargetOpcode::G_XOR */) { |
| 2469 | // Leaf name: propagate_undef_any_op |
| 2470 | // Rule: propagate_undef_any_op |
| 2471 | if (!RuleConfig->isRuleDisabled(17)) { |
| 2472 | if (1 |
| 2473 | && [&]() { |
| 2474 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 2475 | return true; |
| 2476 | }() ) { |
| 2477 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 2478 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2479 | return true; |
| 2480 | } |
| 2481 | } |
| 2482 | // Leaf name: right_identity_zero |
| 2483 | // Rule: right_identity_zero |
| 2484 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2485 | if (1 |
| 2486 | && [&]() { |
| 2487 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2488 | return true; |
| 2489 | }() ) { |
| 2490 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2491 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2492 | return true; |
| 2493 | } |
| 2494 | } |
| 2495 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
| 2496 | // Rule: hoist_logic_op_with_same_opcode_hands |
| 2497 | if (!RuleConfig->isRuleDisabled(40)) { |
| 2498 | if (1 |
| 2499 | && [&]() { |
| 2500 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData40); |
| 2501 | return true; |
| 2502 | }() ) { |
| 2503 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
| 2504 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData40); |
| 2505 | return true; |
| 2506 | } |
| 2507 | } |
| 2508 | // Leaf name: not_cmp_fold |
| 2509 | // Rule: not_cmp_fold |
| 2510 | if (!RuleConfig->isRuleDisabled(59)) { |
| 2511 | if (1 |
| 2512 | && [&]() { |
| 2513 | return Helper.matchNotCmp(*MIs[0], MatchData59); |
| 2514 | return true; |
| 2515 | }() ) { |
| 2516 | LLVM_DEBUG(dbgs() << "Applying rule 'not_cmp_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'not_cmp_fold'\n" ; } } while (false); |
| 2517 | Helper.applyNotCmp(*MIs[0], MatchData59); |
| 2518 | return true; |
| 2519 | } |
| 2520 | } |
| 2521 | // Leaf name: xor_of_and_with_same_reg |
| 2522 | // Rule: xor_of_and_with_same_reg |
| 2523 | if (!RuleConfig->isRuleDisabled(76)) { |
| 2524 | if (1 |
| 2525 | && [&]() { |
| 2526 | return Helper.matchXorOfAndWithSameReg(*MIs[0], MatchData76); |
| 2527 | return true; |
| 2528 | }() ) { |
| 2529 | LLVM_DEBUG(dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n" ; } } while (false); |
| 2530 | Helper.applyXorOfAndWithSameReg(*MIs[0], MatchData76); |
| 2531 | return true; |
| 2532 | } |
| 2533 | } |
| 2534 | // Leaf name: constant_fold |
| 2535 | // Rule: constant_fold |
| 2536 | if (!RuleConfig->isRuleDisabled(89)) { |
| 2537 | if (1 |
| 2538 | && [&]() { |
| 2539 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
| 2540 | return true; |
| 2541 | }() ) { |
| 2542 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 2543 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
| 2544 | return true; |
| 2545 | } |
| 2546 | } |
| 2547 | // Leaf name: fold_binop_into_select |
| 2548 | // Rule: fold_binop_into_select |
| 2549 | if (!RuleConfig->isRuleDisabled(104)) { |
| 2550 | if (1 |
| 2551 | && [&]() { |
| 2552 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2553 | return true; |
| 2554 | }() ) { |
| 2555 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2556 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2557 | return true; |
| 2558 | } |
| 2559 | } |
| 2560 | // Leaf name: commute_constant_to_rhs |
| 2561 | // Rule: commute_constant_to_rhs |
| 2562 | if (!RuleConfig->isRuleDisabled(109)) { |
| 2563 | if (1 |
| 2564 | && [&]() { |
| 2565 | |
| 2566 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
| 2567 | |
| 2568 | return true; |
| 2569 | }() ) { |
| 2570 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
| 2571 | |
| 2572 | Observer.changingInstr(*MIs[0]); |
| 2573 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
| 2574 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
| 2575 | MIs[0]->getOperand(1).setReg(RHSReg); |
| 2576 | MIs[0]->getOperand(2).setReg(LHSReg); |
| 2577 | Observer.changedInstr(*MIs[0]); |
| 2578 | |
| 2579 | return true; |
| 2580 | } |
| 2581 | } |
| 2582 | return false; |
| 2583 | } |
| 2584 | if (Partition == 27 /* TargetOpcode::G_TRUNC */) { |
| 2585 | // Leaf name: propagate_undef_any_op |
| 2586 | // Rule: propagate_undef_any_op |
| 2587 | if (!RuleConfig->isRuleDisabled(17)) { |
| 2588 | if (1 |
| 2589 | && [&]() { |
| 2590 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 2591 | return true; |
| 2592 | }() ) { |
| 2593 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 2594 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2595 | return true; |
| 2596 | } |
| 2597 | } |
| 2598 | // Leaf name: trunc_buildvector_fold |
| 2599 | // Rule: trunc_buildvector_fold |
| 2600 | if (!RuleConfig->isRuleDisabled(35)) { |
| 2601 | if (1 |
| 2602 | && [&]() { |
| 2603 | return Helper.matchTruncBuildVectorFold(*MIs[0], MatchData35); |
| 2604 | return true; |
| 2605 | }() ) { |
| 2606 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'trunc_buildvector_fold'\n" ; } } while (false); |
| 2607 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData35); |
| 2608 | return true; |
| 2609 | } |
| 2610 | } |
| 2611 | // Leaf name: trunc_lshr_buildvector_fold |
| 2612 | // Rule: trunc_lshr_buildvector_fold |
| 2613 | if (!RuleConfig->isRuleDisabled(36)) { |
| 2614 | if (1 |
| 2615 | && [&]() { |
| 2616 | return Helper.matchTruncLshrBuildVectorFold(*MIs[0], MatchData36); |
| 2617 | return true; |
| 2618 | }() ) { |
| 2619 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n" ; } } while (false); |
| 2620 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData36); |
| 2621 | return true; |
| 2622 | } |
| 2623 | } |
| 2624 | // Leaf name: trunc_ext_fold |
| 2625 | // Rule: trunc_ext_fold |
| 2626 | if (!RuleConfig->isRuleDisabled(66)) { |
| 2627 | if (1 |
| 2628 | && [&]() { |
| 2629 | return Helper.matchCombineTruncOfExt(*MIs[0], MatchData66); |
| 2630 | return true; |
| 2631 | }() ) { |
| 2632 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'trunc_ext_fold'\n" ; } } while (false); |
| 2633 | Helper.applyCombineTruncOfExt(*MIs[0], MatchData66); |
| 2634 | return true; |
| 2635 | } |
| 2636 | } |
| 2637 | // Leaf name: trunc_shift |
| 2638 | // Rule: trunc_shift |
| 2639 | if (!RuleConfig->isRuleDisabled(67)) { |
| 2640 | if (1 |
| 2641 | && [&]() { |
| 2642 | return Helper.matchCombineTruncOfShift(*MIs[0], MatchData67); |
| 2643 | return true; |
| 2644 | }() ) { |
| 2645 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'trunc_shift'\n" ; } } while (false); |
| 2646 | Helper.applyCombineTruncOfShift(*MIs[0], MatchData67); |
| 2647 | return true; |
| 2648 | } |
| 2649 | } |
| 2650 | return false; |
| 2651 | } |
| 2652 | if (Partition == 28 /* TargetOpcode::G_SHUFFLE_VECTOR */) { |
| 2653 | // Leaf name: propagate_undef_all_ops |
| 2654 | // Rule: propagate_undef_all_ops |
| 2655 | if (!RuleConfig->isRuleDisabled(18)) { |
| 2656 | if (1 |
| 2657 | && [&]() { |
| 2658 | return Helper.matchAllExplicitUsesAreUndef(*MIs[0]); |
| 2659 | return true; |
| 2660 | }() ) { |
| 2661 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_all_ops'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_all_ops'\n" ; } } while (false); |
| 2662 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2663 | return true; |
| 2664 | } |
| 2665 | } |
| 2666 | // Leaf name: propagate_undef_shuffle_mask |
| 2667 | // Rule: propagate_undef_shuffle_mask |
| 2668 | if (!RuleConfig->isRuleDisabled(19)) { |
| 2669 | if (1 |
| 2670 | && [&]() { |
| 2671 | return Helper.matchUndefShuffleVectorMask(*MIs[0]); |
| 2672 | return true; |
| 2673 | }() ) { |
| 2674 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n" ; } } while (false); |
| 2675 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2676 | return true; |
| 2677 | } |
| 2678 | } |
| 2679 | return false; |
| 2680 | } |
| 2681 | if (Partition == 29 /* TargetOpcode::G_UNMERGE_VALUES */) { |
| 2682 | // Leaf name: unmerge_undef |
| 2683 | // Rule: unmerge_undef |
| 2684 | if (!RuleConfig->isRuleDisabled(21)) { |
| 2685 | if (1 |
| 2686 | && [&]() { |
| 2687 | return Helper.matchCombineUnmergeUndef(*MIs[0], MatchData21); |
| 2688 | return true; |
| 2689 | }() ) { |
| 2690 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_undef'\n" ; } } while (false); |
| 2691 | Helper.applyBuildFn(*MIs[0], MatchData21); |
| 2692 | return true; |
| 2693 | } |
| 2694 | } |
| 2695 | // Leaf name: unmerge_merge |
| 2696 | // Rule: unmerge_merge |
| 2697 | if (!RuleConfig->isRuleDisabled(61)) { |
| 2698 | if (1 |
| 2699 | && [&]() { |
| 2700 | return Helper.matchCombineUnmergeMergeToPlainValues(*MIs[0], MatchData61); |
| 2701 | return true; |
| 2702 | }() ) { |
| 2703 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_merge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_merge'\n" ; } } while (false); |
| 2704 | Helper.applyCombineUnmergeMergeToPlainValues(*MIs[0], MatchData61); |
| 2705 | return true; |
| 2706 | } |
| 2707 | } |
| 2708 | // Leaf name: unmerge_cst |
| 2709 | // Rule: unmerge_cst |
| 2710 | if (!RuleConfig->isRuleDisabled(62)) { |
| 2711 | if (1 |
| 2712 | && [&]() { |
| 2713 | return Helper.matchCombineUnmergeConstant(*MIs[0], MatchData62); |
| 2714 | return true; |
| 2715 | }() ) { |
| 2716 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_cst'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_cst'\n" ; } } while (false); |
| 2717 | Helper.applyCombineUnmergeConstant(*MIs[0], MatchData62); |
| 2718 | return true; |
| 2719 | } |
| 2720 | } |
| 2721 | // Leaf name: unmerge_dead_to_trunc |
| 2722 | // Rule: unmerge_dead_to_trunc |
| 2723 | if (!RuleConfig->isRuleDisabled(63)) { |
| 2724 | if (1 |
| 2725 | && [&]() { |
| 2726 | return Helper.matchCombineUnmergeWithDeadLanesToTrunc(*MIs[0]); |
| 2727 | return true; |
| 2728 | }() ) { |
| 2729 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n" ; } } while (false); |
| 2730 | Helper.applyCombineUnmergeWithDeadLanesToTrunc(*MIs[0]); |
| 2731 | return true; |
| 2732 | } |
| 2733 | } |
| 2734 | // Leaf name: unmerge_zext_to_zext |
| 2735 | // Rule: unmerge_zext_to_zext |
| 2736 | if (!RuleConfig->isRuleDisabled(64)) { |
| 2737 | if (1 |
| 2738 | && [&]() { |
| 2739 | return Helper.matchCombineUnmergeZExtToZExt(*MIs[0]); |
| 2740 | return true; |
| 2741 | }() ) { |
| 2742 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_zext_to_zext'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_zext_to_zext'\n" ; } } while (false); |
| 2743 | Helper.applyCombineUnmergeZExtToZExt(*MIs[0]); |
| 2744 | return true; |
| 2745 | } |
| 2746 | } |
| 2747 | return false; |
| 2748 | } |
| 2749 | if (Partition == 30 /* TargetOpcode::G_SELECT */) { |
| 2750 | // Leaf name: select_same_val |
| 2751 | // Rule: select_same_val |
| 2752 | if (!RuleConfig->isRuleDisabled(23)) { |
| 2753 | if (1 |
| 2754 | && [&]() { |
| 2755 | return Helper.matchSelectSameVal(*MIs[0]); |
| 2756 | return true; |
| 2757 | }() ) { |
| 2758 | LLVM_DEBUG(dbgs() << "Applying rule 'select_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'select_same_val'\n" ; } } while (false); |
| 2759 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
| 2760 | return true; |
| 2761 | } |
| 2762 | } |
| 2763 | // Leaf name: select_undef_cmp |
| 2764 | // Rule: select_undef_cmp |
| 2765 | if (!RuleConfig->isRuleDisabled(47)) { |
| 2766 | if (1 |
| 2767 | && [&]() { |
| 2768 | return Helper.matchUndefSelectCmp(*MIs[0]); |
| 2769 | return true; |
| 2770 | }() ) { |
| 2771 | LLVM_DEBUG(dbgs() << "Applying rule 'select_undef_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'select_undef_cmp'\n" ; } } while (false); |
| 2772 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
| 2773 | return true; |
| 2774 | } |
| 2775 | } |
| 2776 | // Leaf name: select_constant_cmp |
| 2777 | // Rule: select_constant_cmp |
| 2778 | if (!RuleConfig->isRuleDisabled(48)) { |
| 2779 | if (1 |
| 2780 | && [&]() { |
| 2781 | return Helper.matchConstantSelectCmp(*MIs[0], MatchData48); |
| 2782 | return true; |
| 2783 | }() ) { |
| 2784 | LLVM_DEBUG(dbgs() << "Applying rule 'select_constant_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'select_constant_cmp'\n" ; } } while (false); |
| 2785 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData48); |
| 2786 | return true; |
| 2787 | } |
| 2788 | } |
| 2789 | // Leaf name: select_to_logical |
| 2790 | // Rule: select_to_logical |
| 2791 | if (!RuleConfig->isRuleDisabled(49)) { |
| 2792 | if (1 |
| 2793 | && [&]() { |
| 2794 | return Helper.matchSelectToLogical(*MIs[0], MatchData49); |
| 2795 | return true; |
| 2796 | }() ) { |
| 2797 | LLVM_DEBUG(dbgs() << "Applying rule 'select_to_logical'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'select_to_logical'\n" ; } } while (false); |
| 2798 | Helper.applyBuildFn(*MIs[0], MatchData49); |
| 2799 | return true; |
| 2800 | } |
| 2801 | } |
| 2802 | // Leaf name: select_to_minmax |
| 2803 | // Rule: select_to_minmax |
| 2804 | if (!RuleConfig->isRuleDisabled(106)) { |
| 2805 | if (1 |
| 2806 | && [&]() { |
| 2807 | return Helper.matchSimplifySelectToMinMax(*MIs[0], MatchData106); |
| 2808 | return true; |
| 2809 | }() ) { |
| 2810 | LLVM_DEBUG(dbgs() << "Applying rule 'select_to_minmax'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'select_to_minmax'\n" ; } } while (false); |
| 2811 | Helper.applyBuildFn(*MIs[0], MatchData106); |
| 2812 | return true; |
| 2813 | } |
| 2814 | } |
| 2815 | // Leaf name: fcmp_select_to_fmin_fmax_legacy |
| 2816 | // Rule: fcmp_select_to_fmin_fmax_legacy |
| 2817 | if (!RuleConfig->isRuleDisabled(110)) { |
| 2818 | if (1 |
| 2819 | && ( |
| 2820 | // Predicate: HasFminFmaxLegacy |
| 2821 | Subtarget->hasFminFmaxLegacy() |
| 2822 | ) |
| 2823 | && [&]() { |
| 2824 | return PostLegalizerHelper.matchFMinFMaxLegacy(*MIs[0], MatchData110); |
| 2825 | return true; |
| 2826 | }() ) { |
| 2827 | LLVM_DEBUG(dbgs() << "Applying rule 'fcmp_select_to_fmin_fmax_legacy'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fcmp_select_to_fmin_fmax_legacy'\n" ; } } while (false); |
| 2828 | PostLegalizerHelper.applySelectFCmpToFMinToFMaxLegacy(*MIs[0], MatchData110); |
| 2829 | return true; |
| 2830 | } |
| 2831 | } |
| 2832 | return false; |
| 2833 | } |
| 2834 | if (Partition == 31 /* TargetOpcode::G_PTR_ADD */) { |
| 2835 | // Leaf name: right_identity_zero |
| 2836 | // Rule: right_identity_zero |
| 2837 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2838 | if (1 |
| 2839 | && [&]() { |
| 2840 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2841 | return true; |
| 2842 | }() ) { |
| 2843 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2844 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2845 | return true; |
| 2846 | } |
| 2847 | } |
| 2848 | // Leaf name: reassoc_ptradd |
| 2849 | // Rule: reassoc_ptradd |
| 2850 | if (!RuleConfig->isRuleDisabled(41)) { |
| 2851 | if (1 |
| 2852 | && [&]() { |
| 2853 | return Helper.matchReassocPtrAdd(*MIs[0], MatchData41); |
| 2854 | return true; |
| 2855 | }() ) { |
| 2856 | LLVM_DEBUG(dbgs() << "Applying rule 'reassoc_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'reassoc_ptradd'\n" ; } } while (false); |
| 2857 | Helper.applyBuildFnNoErase(*MIs[0], MatchData41); |
| 2858 | return true; |
| 2859 | } |
| 2860 | } |
| 2861 | // Leaf name: ptr_add_immed_chain |
| 2862 | // Rule: ptr_add_immed_chain |
| 2863 | if (!RuleConfig->isRuleDisabled(42)) { |
| 2864 | if (1 |
| 2865 | && [&]() { |
| 2866 | return Helper.matchPtrAddImmedChain(*MIs[0], MatchData42); |
| 2867 | return true; |
| 2868 | }() ) { |
| 2869 | LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_immed_chain'\n" ; } } while (false); |
| 2870 | Helper.applyPtrAddImmedChain(*MIs[0], MatchData42); |
| 2871 | return true; |
| 2872 | } |
| 2873 | } |
| 2874 | // Leaf name: const_ptradd_to_i2p |
| 2875 | // Rule: const_ptradd_to_i2p |
| 2876 | if (!RuleConfig->isRuleDisabled(69)) { |
| 2877 | if (1 |
| 2878 | && [&]() { |
| 2879 | return Helper.matchCombineConstPtrAddToI2P(*MIs[0], MatchData69); |
| 2880 | return true; |
| 2881 | }() ) { |
| 2882 | LLVM_DEBUG(dbgs() << "Applying rule 'const_ptradd_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'const_ptradd_to_i2p'\n" ; } } while (false); |
| 2883 | Helper.applyCombineConstPtrAddToI2P(*MIs[0], MatchData69); |
| 2884 | return true; |
| 2885 | } |
| 2886 | } |
| 2887 | // Leaf name: ptr_add_with_zero |
| 2888 | // Rule: ptr_add_with_zero |
| 2889 | if (!RuleConfig->isRuleDisabled(77)) { |
| 2890 | if (1 |
| 2891 | && [&]() { |
| 2892 | return Helper.matchPtrAddZero(*MIs[0]); |
| 2893 | return true; |
| 2894 | }() ) { |
| 2895 | LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_with_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_with_zero'\n" ; } } while (false); |
| 2896 | Helper.applyPtrAddZero(*MIs[0]); |
| 2897 | return true; |
| 2898 | } |
| 2899 | } |
| 2900 | // Leaf name: fold_binop_into_select |
| 2901 | // Rule: fold_binop_into_select |
| 2902 | if (!RuleConfig->isRuleDisabled(104)) { |
| 2903 | if (1 |
| 2904 | && [&]() { |
| 2905 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2906 | return true; |
| 2907 | }() ) { |
| 2908 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2909 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2910 | return true; |
| 2911 | } |
| 2912 | } |
| 2913 | return false; |
| 2914 | } |
| 2915 | if (Partition == 32 /* TargetOpcode::G_ROTL */) { |
| 2916 | // Leaf name: right_identity_zero |
| 2917 | // Rule: right_identity_zero |
| 2918 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2919 | if (1 |
| 2920 | && [&]() { |
| 2921 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2922 | return true; |
| 2923 | }() ) { |
| 2924 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2925 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2926 | return true; |
| 2927 | } |
| 2928 | } |
| 2929 | return false; |
| 2930 | } |
| 2931 | if (Partition == 33 /* TargetOpcode::G_ROTR */) { |
| 2932 | // Leaf name: right_identity_zero |
| 2933 | // Rule: right_identity_zero |
| 2934 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2935 | if (1 |
| 2936 | && [&]() { |
| 2937 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2938 | return true; |
| 2939 | }() ) { |
| 2940 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2941 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2942 | return true; |
| 2943 | } |
| 2944 | } |
| 2945 | return false; |
| 2946 | } |
| 2947 | if (Partition == 34 /* TargetOpcode::G_SDIV */) { |
| 2948 | // Leaf name: binop_left_to_zero |
| 2949 | // Rule: binop_left_to_zero |
| 2950 | if (!RuleConfig->isRuleDisabled(26)) { |
| 2951 | if (1 |
| 2952 | && [&]() { |
| 2953 | return Helper.matchOperandIsZero(*MIs[0], 1); |
| 2954 | return true; |
| 2955 | }() ) { |
| 2956 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
| 2957 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2958 | return true; |
| 2959 | } |
| 2960 | } |
| 2961 | // Leaf name: div_rem_to_divrem |
| 2962 | // Rule: div_rem_to_divrem |
| 2963 | if (!RuleConfig->isRuleDisabled(82)) { |
| 2964 | if (1 |
| 2965 | && [&]() { |
| 2966 | return Helper.matchCombineDivRem(*MIs[0], MatchData82); |
| 2967 | return true; |
| 2968 | }() ) { |
| 2969 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
| 2970 | Helper.applyCombineDivRem(*MIs[0], MatchData82); |
| 2971 | return true; |
| 2972 | } |
| 2973 | } |
| 2974 | // Leaf name: sdiv_by_const |
| 2975 | // Rule: sdiv_by_const |
| 2976 | if (!RuleConfig->isRuleDisabled(92)) { |
| 2977 | if (1 |
| 2978 | && [&]() { |
| 2979 | return Helper.matchSDivByConst(*MIs[0]); |
| 2980 | return true; |
| 2981 | }() ) { |
| 2982 | LLVM_DEBUG(dbgs() << "Applying rule 'sdiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'sdiv_by_const'\n" ; } } while (false); |
| 2983 | Helper.applySDivByConst(*MIs[0]); |
| 2984 | return true; |
| 2985 | } |
| 2986 | } |
| 2987 | // Leaf name: fold_binop_into_select |
| 2988 | // Rule: fold_binop_into_select |
| 2989 | if (!RuleConfig->isRuleDisabled(104)) { |
| 2990 | if (1 |
| 2991 | && [&]() { |
| 2992 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2993 | return true; |
| 2994 | }() ) { |
| 2995 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2996 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 2997 | return true; |
| 2998 | } |
| 2999 | } |
| 3000 | return false; |
| 3001 | } |
| 3002 | if (Partition == 35 /* TargetOpcode::G_SREM */) { |
| 3003 | // Leaf name: binop_left_to_zero |
| 3004 | // Rule: binop_left_to_zero |
| 3005 | if (!RuleConfig->isRuleDisabled(26)) { |
| 3006 | if (1 |
| 3007 | && [&]() { |
| 3008 | return Helper.matchOperandIsZero(*MIs[0], 1); |
| 3009 | return true; |
| 3010 | }() ) { |
| 3011 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
| 3012 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 3013 | return true; |
| 3014 | } |
| 3015 | } |
| 3016 | // Leaf name: div_rem_to_divrem |
| 3017 | // Rule: div_rem_to_divrem |
| 3018 | if (!RuleConfig->isRuleDisabled(82)) { |
| 3019 | if (1 |
| 3020 | && [&]() { |
| 3021 | return Helper.matchCombineDivRem(*MIs[0], MatchData82); |
| 3022 | return true; |
| 3023 | }() ) { |
| 3024 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
| 3025 | Helper.applyCombineDivRem(*MIs[0], MatchData82); |
| 3026 | return true; |
| 3027 | } |
| 3028 | } |
| 3029 | // Leaf name: fold_binop_into_select |
| 3030 | // Rule: fold_binop_into_select |
| 3031 | if (!RuleConfig->isRuleDisabled(104)) { |
| 3032 | if (1 |
| 3033 | && [&]() { |
| 3034 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 3035 | return true; |
| 3036 | }() ) { |
| 3037 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 3038 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 3039 | return true; |
| 3040 | } |
| 3041 | } |
| 3042 | return false; |
| 3043 | } |
| 3044 | if (Partition == 36 /* TargetOpcode::G_INTTOPTR */) { |
| 3045 | // Leaf name: p2i_to_i2p |
| 3046 | // Rule: p2i_to_i2p |
| 3047 | if (!RuleConfig->isRuleDisabled(28)) { |
| 3048 | if (1 |
| 3049 | && [&]() { |
| 3050 | return Helper.matchCombineI2PToP2I(*MIs[0], MatchData28); |
| 3051 | return true; |
| 3052 | }() ) { |
| 3053 | LLVM_DEBUG(dbgs() << "Applying rule 'p2i_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'p2i_to_i2p'\n" ; } } while (false); |
| 3054 | Helper.applyCombineI2PToP2I(*MIs[0], MatchData28); |
| 3055 | return true; |
| 3056 | } |
| 3057 | } |
| 3058 | return false; |
| 3059 | } |
| 3060 | if (Partition == 37 /* TargetOpcode::G_PTRTOINT */) { |
| 3061 | Partition = -1; |
| 3062 | if (MIs.size() <= 1) MIs.resize(2); |
| 3063 | MIs[1] = nullptr; |
| 3064 | if (MIs[0]->getOperand(1).isReg()) |
| 3065 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
| 3066 | if (MIs[1] != nullptr) Partition = 0; |
| 3067 | if (Partition == -1) return false; |
| 3068 | if (Partition == 0 /* true */) { |
| 3069 | Partition = -1; |
| 3070 | switch (MIs[1]->getOpcode()) { |
| 3071 | case TargetOpcode::G_INTTOPTR: Partition = 0; break; |
| 3072 | } |
| 3073 | // Default case but without conflicting with potential default case in selection. |
| 3074 | if (Partition == -1) return false; |
| 3075 | if (Partition == 0 /* TargetOpcode::G_INTTOPTR */) { |
| 3076 | // Leaf name: i2p_to_p2i |
| 3077 | // Rule: i2p_to_p2i |
| 3078 | if (!RuleConfig->isRuleDisabled(29)) { |
| 3079 | if (1 |
| 3080 | && [&]() { |
| 3081 | MatchData29 = MIs[1]->getOperand(1).getReg(); |
| 3082 | return true; |
| 3083 | }() ) { |
| 3084 | LLVM_DEBUG(dbgs() << "Applying rule 'i2p_to_p2i'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'i2p_to_p2i'\n" ; } } while (false); |
| 3085 | Helper.applyCombineP2IToI2P(*MIs[0], MatchData29); |
| 3086 | return true; |
| 3087 | } |
| 3088 | } |
| 3089 | return false; |
| 3090 | } |
| 3091 | } |
| 3092 | } |
| 3093 | if (Partition == 38 /* TargetOpcode::G_ANYEXT */) { |
| 3094 | // Leaf name: anyext_trunc_fold |
| 3095 | // Rule: anyext_trunc_fold |
| 3096 | if (!RuleConfig->isRuleDisabled(30)) { |
| 3097 | if (1 |
| 3098 | && [&]() { |
| 3099 | return Helper.matchCombineAnyExtTrunc(*MIs[0], MatchData30); |
| 3100 | return true; |
| 3101 | }() ) { |
| 3102 | LLVM_DEBUG(dbgs() << "Applying rule 'anyext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'anyext_trunc_fold'\n" ; } } while (false); |
| 3103 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData30); |
| 3104 | return true; |
| 3105 | } |
| 3106 | } |
| 3107 | // Leaf name: ext_ext_fold |
| 3108 | // Rule: ext_ext_fold |
| 3109 | if (!RuleConfig->isRuleDisabled(58)) { |
| 3110 | if (1 |
| 3111 | && [&]() { |
| 3112 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData58); |
| 3113 | return true; |
| 3114 | }() ) { |
| 3115 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
| 3116 | Helper.applyCombineExtOfExt(*MIs[0], MatchData58); |
| 3117 | return true; |
| 3118 | } |
| 3119 | } |
| 3120 | return false; |
| 3121 | } |
| 3122 | if (Partition == 39 /* TargetOpcode::G_FNEG */) { |
| 3123 | Partition = -1; |
| 3124 | if (MIs.size() <= 1) MIs.resize(2); |
| 3125 | MIs[1] = nullptr; |
| 3126 | if (MIs[0]->getOperand(1).isReg()) |
| 3127 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
| 3128 | if (MIs[1] == nullptr) Partition = 1; |
| 3129 | if (MIs[1] != nullptr) Partition = 0; |
| 3130 | if (Partition == -1) return false; |
| 3131 | if (Partition == 0 /* true */) { |
| 3132 | Partition = -1; |
Value stored to 'Partition' is never read | |
| 3133 | switch (MIs[1]->getOpcode()) { |
| 3134 | case TargetOpcode::G_FNEG: Partition = 0; break; |
| 3135 | default: Partition = 1; break; |
| 3136 | } |
| 3137 | // Default case but without conflicting with potential default case in selection. |
| 3138 | if (Partition == -1) return false; |
| 3139 | if (Partition == 0 /* TargetOpcode::G_FNEG */) { |
| 3140 | // Leaf name: fneg_fneg_fold |
| 3141 | // Rule: fneg_fneg_fold |
| 3142 | if (!RuleConfig->isRuleDisabled(31)) { |
| 3143 | if (1 |
| 3144 | && [&]() { |
| 3145 | MatchData31 = MIs[1]->getOperand(1).getReg(); |
| 3146 | return true; |
| 3147 | }() ) { |
| 3148 | LLVM_DEBUG(dbgs() << "Applying rule 'fneg_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fneg_fneg_fold'\n" ; } } while (false); |
| 3149 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData31); |
| 3150 | return true; |
| 3151 | } |
| 3152 | } |
| 3153 | // Leaf name: constant_fp_op |
| 3154 | // Rule: constant_fp_op |
| 3155 | if (!RuleConfig->isRuleDisabled(68)) { |
| 3156 | if (1 |
| 3157 | && [&]() { |
| 3158 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3159 | return true; |
| 3160 | }() ) { |
| 3161 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3162 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3163 | return true; |
| 3164 | } |
| 3165 | } |
| 3166 | // Leaf name: foldable_fneg |
| 3167 | // Rule: foldable_fneg |
| 3168 | if (!RuleConfig->isRuleDisabled(114)) { |
| 3169 | if (1 |
| 3170 | && [&]() { |
| 3171 | return Helper.matchFoldableFneg(*MIs[0], MatchData114); |
| 3172 | return true; |
| 3173 | }() ) { |
| 3174 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
| 3175 | Helper.applyFoldableFneg(*MIs[0], MatchData114); |
| 3176 | return true; |
| 3177 | } |
| 3178 | } |
| 3179 | return false; |
| 3180 | } |
| 3181 | if (Partition == 1 /* * or nullptr */) { |
| 3182 | // Leaf name: constant_fp_op |
| 3183 | // Rule: constant_fp_op |
| 3184 | if (!RuleConfig->isRuleDisabled(68)) { |
| 3185 | if (1 |
| 3186 | && [&]() { |
| 3187 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3188 | return true; |
| 3189 | }() ) { |
| 3190 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3191 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3192 | return true; |
| 3193 | } |
| 3194 | } |
| 3195 | // Leaf name: foldable_fneg |
| 3196 | // Rule: foldable_fneg |
| 3197 | if (!RuleConfig->isRuleDisabled(114)) { |
| 3198 | if (1 |
| 3199 | && [&]() { |
| 3200 | return Helper.matchFoldableFneg(*MIs[0], MatchData114); |
| 3201 | return true; |
| 3202 | }() ) { |
| 3203 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
| 3204 | Helper.applyFoldableFneg(*MIs[0], MatchData114); |
| 3205 | return true; |
| 3206 | } |
| 3207 | } |
| 3208 | return false; |
| 3209 | } |
| 3210 | } |
| 3211 | if (Partition == 1 /* false */) { |
| 3212 | // Leaf name: constant_fp_op |
| 3213 | // Rule: constant_fp_op |
| 3214 | if (!RuleConfig->isRuleDisabled(68)) { |
| 3215 | if (1 |
| 3216 | && [&]() { |
| 3217 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3218 | return true; |
| 3219 | }() ) { |
| 3220 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3221 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3222 | return true; |
| 3223 | } |
| 3224 | } |
| 3225 | // Leaf name: foldable_fneg |
| 3226 | // Rule: foldable_fneg |
| 3227 | if (!RuleConfig->isRuleDisabled(114)) { |
| 3228 | if (1 |
| 3229 | && [&]() { |
| 3230 | return Helper.matchFoldableFneg(*MIs[0], MatchData114); |
| 3231 | return true; |
| 3232 | }() ) { |
| 3233 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
| 3234 | Helper.applyFoldableFneg(*MIs[0], MatchData114); |
| 3235 | return true; |
| 3236 | } |
| 3237 | } |
| 3238 | return false; |
| 3239 | } |
| 3240 | } |
| 3241 | if (Partition == 40 /* TargetOpcode::G_BUILD_VECTOR_TRUNC */) { |
| 3242 | // Leaf name: buildvector_identity_fold |
| 3243 | // Rule: buildvector_identity_fold |
| 3244 | if (!RuleConfig->isRuleDisabled(34)) { |
| 3245 | if (1 |
| 3246 | && [&]() { |
| 3247 | return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34); |
| 3248 | return true; |
| 3249 | }() ) { |
| 3250 | LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n" ; } } while (false); |
| 3251 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34); |
| 3252 | return true; |
| 3253 | } |
| 3254 | } |
| 3255 | return false; |
| 3256 | } |
| 3257 | if (Partition == 41 /* TargetOpcode::G_BITCAST */) { |
| 3258 | Partition = -1; |
| 3259 | if (MIs.size() <= 1) MIs.resize(2); |
| 3260 | MIs[1] = nullptr; |
| 3261 | if (MIs[0]->getOperand(1).isReg()) |
| 3262 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
| 3263 | if (MIs[1] != nullptr) Partition = 0; |
| 3264 | if (Partition == -1) return false; |
| 3265 | if (Partition == 0 /* true */) { |
| 3266 | Partition = -1; |
| 3267 | switch (MIs[1]->getOpcode()) { |
| 3268 | case TargetOpcode::G_BITCAST: Partition = 0; break; |
| 3269 | } |
| 3270 | // Default case but without conflicting with potential default case in selection. |
| 3271 | if (Partition == -1) return false; |
| 3272 | if (Partition == 0 /* TargetOpcode::G_BITCAST */) { |
| 3273 | // Leaf name: bitcast_bitcast_fold |
| 3274 | // Rule: bitcast_bitcast_fold |
| 3275 | if (!RuleConfig->isRuleDisabled(37)) { |
| 3276 | if (1 |
| 3277 | && [&]() { |
| 3278 | return MRI.getType(MIs[1]->getOperand(1).getReg()) == MRI.getType(MIs[0]->getOperand(0).getReg()); |
| 3279 | return true; |
| 3280 | }() ) { |
| 3281 | LLVM_DEBUG(dbgs() << "Applying rule 'bitcast_bitcast_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitcast_bitcast_fold'\n" ; } } while (false); |
| 3282 | Helper.replaceSingleDefInstWithReg(*MIs[0], MIs[1]->getOperand(1).getReg()); |
| 3283 | return true; |
| 3284 | } |
| 3285 | } |
| 3286 | return false; |
| 3287 | } |
| 3288 | } |
| 3289 | } |
| 3290 | if (Partition == 42 /* TargetOpcode::G_PHI */) { |
| 3291 | // Leaf name: extend_through_phis |
| 3292 | // Rule: extend_through_phis |
| 3293 | if (!RuleConfig->isRuleDisabled(38)) { |
| 3294 | if (1 |
| 3295 | && [&]() { |
| 3296 | return Helper.matchExtendThroughPhis(*MIs[0], MatchData38); |
| 3297 | return true; |
| 3298 | }() ) { |
| 3299 | LLVM_DEBUG(dbgs() << "Applying rule 'extend_through_phis'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extend_through_phis'\n" ; } } while (false); |
| 3300 | Helper.applyExtendThroughPhis(*MIs[0], MatchData38); |
| 3301 | return true; |
| 3302 | } |
| 3303 | } |
| 3304 | return false; |
| 3305 | } |
| 3306 | if (Partition == 43 /* TargetOpcode::G_SEXT_INREG */) { |
| 3307 | // Leaf name: sext_inreg_of_load |
| 3308 | // Rule: sext_inreg_of_load |
| 3309 | if (!RuleConfig->isRuleDisabled(44)) { |
| 3310 | if (1 |
| 3311 | && [&]() { |
| 3312 | return Helper.matchSextInRegOfLoad(*MIs[0], MatchData44); |
| 3313 | return true; |
| 3314 | }() ) { |
| 3315 | LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_of_load'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_of_load'\n" ; } } while (false); |
| 3316 | Helper.applySextInRegOfLoad(*MIs[0], MatchData44); |
| 3317 | return true; |
| 3318 | } |
| 3319 | } |
| 3320 | // Leaf name: redundant_sext_inreg |
| 3321 | // Rule: redundant_sext_inreg |
| 3322 | if (!RuleConfig->isRuleDisabled(51)) { |
| 3323 | if (1 |
| 3324 | && [&]() { |
| 3325 | return Helper.matchRedundantSExtInReg(*MIs[0]); |
| 3326 | return true; |
| 3327 | }() ) { |
| 3328 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_sext_inreg'\n" ; } } while (false); |
| 3329 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 3330 | return true; |
| 3331 | } |
| 3332 | } |
| 3333 | // Leaf name: sext_inreg_to_zext_inreg |
| 3334 | // Rule: sext_inreg_to_zext_inreg |
| 3335 | if (!RuleConfig->isRuleDisabled(57)) { |
| 3336 | if (1 |
| 3337 | && [&]() { |
| 3338 | |
| 3339 | unsigned BitWidth = MRI.getType(MIs[0]->getOperand(1).getReg()).getScalarSizeInBits(); |
| 3340 | return Helper.getKnownBits()->maskedValueIsZero(MIs[0]->getOperand(1).getReg(), |
| 3341 | APInt::getOneBitSet(BitWidth, MIs[0]->getOperand(2).getImm() - 1)); |
| 3342 | return true; |
| 3343 | }() ) { |
| 3344 | LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n" ; } } while (false); |
| 3345 | |
| 3346 | Helper.getBuilder().setInstrAndDebugLoc(*MIs[0]); |
| 3347 | Helper.getBuilder().buildZExtInReg(MIs[0]->getOperand(0), MIs[0]->getOperand(1), MIs[0]->getOperand(2).getImm()); |
| 3348 | MIs[0]->eraseFromParent(); |
| 3349 | return true; |
| 3350 | |
| 3351 | return true; |
| 3352 | } |
| 3353 | } |
| 3354 | // Leaf name: bitfield_extract_from_sext_inreg |
| 3355 | // Rule: bitfield_extract_from_sext_inreg |
| 3356 | if (!RuleConfig->isRuleDisabled(85)) { |
| 3357 | if (1 |
| 3358 | && [&]() { |
| 3359 | return Helper.matchBitfieldExtractFromSExtInReg(*MIs[0], MatchData85); |
| 3360 | return true; |
| 3361 | }() ) { |
| 3362 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n" ; } } while (false); |
| 3363 | Helper.applyBuildFn(*MIs[0], MatchData85); |
| 3364 | return true; |
| 3365 | } |
| 3366 | } |
| 3367 | return false; |
| 3368 | } |
| 3369 | if (Partition == 44 /* TargetOpcode::G_ZEXT */) { |
| 3370 | // Leaf name: zext_trunc_fold |
| 3371 | // Rule: zext_trunc_fold |
| 3372 | if (!RuleConfig->isRuleDisabled(54)) { |
| 3373 | if (1 |
| 3374 | && [&]() { |
| 3375 | return Helper.matchCombineZextTrunc(*MIs[0], MatchData54); |
| 3376 | return true; |
| 3377 | }() ) { |
| 3378 | LLVM_DEBUG(dbgs() << "Applying rule 'zext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'zext_trunc_fold'\n" ; } } while (false); |
| 3379 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData54); |
| 3380 | return true; |
| 3381 | } |
| 3382 | } |
| 3383 | // Leaf name: ext_ext_fold |
| 3384 | // Rule: ext_ext_fold |
| 3385 | if (!RuleConfig->isRuleDisabled(58)) { |
| 3386 | if (1 |
| 3387 | && [&]() { |
| 3388 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData58); |
| 3389 | return true; |
| 3390 | }() ) { |
| 3391 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
| 3392 | Helper.applyCombineExtOfExt(*MIs[0], MatchData58); |
| 3393 | return true; |
| 3394 | } |
| 3395 | } |
| 3396 | return false; |
| 3397 | } |
| 3398 | if (Partition == 45 /* TargetOpcode::G_ICMP */) { |
| 3399 | // Leaf name: icmp_to_true_false_known_bits |
| 3400 | // Rule: icmp_to_true_false_known_bits |
| 3401 | if (!RuleConfig->isRuleDisabled(55)) { |
| 3402 | if (1 |
| 3403 | && [&]() { |
| 3404 | return Helper.matchICmpToTrueFalseKnownBits(*MIs[0], MatchData55); |
| 3405 | return true; |
| 3406 | }() ) { |
| 3407 | LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n" ; } } while (false); |
| 3408 | Helper.replaceInstWithConstant(*MIs[0], MatchData55); |
| 3409 | return true; |
| 3410 | } |
| 3411 | } |
| 3412 | // Leaf name: icmp_to_lhs_known_bits |
| 3413 | // Rule: icmp_to_lhs_known_bits |
| 3414 | if (!RuleConfig->isRuleDisabled(56)) { |
| 3415 | if (1 |
| 3416 | && [&]() { |
| 3417 | return Helper.matchICmpToLHSKnownBits(*MIs[0], MatchData56); |
| 3418 | return true; |
| 3419 | }() ) { |
| 3420 | LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n" ; } } while (false); |
| 3421 | Helper.applyBuildFn(*MIs[0], MatchData56); |
| 3422 | return true; |
| 3423 | } |
| 3424 | } |
| 3425 | // Leaf name: redundant_binop_in_equality |
| 3426 | // Rule: redundant_binop_in_equality |
| 3427 | if (!RuleConfig->isRuleDisabled(107)) { |
| 3428 | if (1 |
| 3429 | && [&]() { |
| 3430 | return Helper.matchRedundantBinOpInEquality(*MIs[0], MatchData107); |
| 3431 | return true; |
| 3432 | }() ) { |
| 3433 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_binop_in_equality'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_binop_in_equality'\n" ; } } while (false); |
| 3434 | Helper.applyBuildFn(*MIs[0], MatchData107); |
| 3435 | return true; |
| 3436 | } |
| 3437 | } |
| 3438 | return false; |
| 3439 | } |
| 3440 | if (Partition == 46 /* TargetOpcode::G_SEXT */) { |
| 3441 | // Leaf name: ext_ext_fold |
| 3442 | // Rule: ext_ext_fold |
| 3443 | if (!RuleConfig->isRuleDisabled(58)) { |
| 3444 | if (1 |
| 3445 | && [&]() { |
| 3446 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData58); |
| 3447 | return true; |
| 3448 | }() ) { |
| 3449 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
| 3450 | Helper.applyCombineExtOfExt(*MIs[0], MatchData58); |
| 3451 | return true; |
| 3452 | } |
| 3453 | } |
| 3454 | return false; |
| 3455 | } |
| 3456 | if (Partition == 47 /* TargetOpcode::G_BR */) { |
| 3457 | // Leaf name: opt_brcond_by_inverting_cond |
| 3458 | // Rule: opt_brcond_by_inverting_cond |
| 3459 | if (!RuleConfig->isRuleDisabled(60)) { |
| 3460 | if (1 |
| 3461 | && [&]() { |
| 3462 | return Helper.matchOptBrCondByInvertingCond(*MIs[0], MatchData60); |
| 3463 | return true; |
| 3464 | }() ) { |
| 3465 | LLVM_DEBUG(dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n" ; } } while (false); |
| 3466 | Helper.applyOptBrCondByInvertingCond(*MIs[0], MatchData60); |
| 3467 | return true; |
| 3468 | } |
| 3469 | } |
| 3470 | return false; |
| 3471 | } |
| 3472 | if (Partition == 48 /* TargetOpcode::G_MERGE_VALUES */) { |
| 3473 | // Leaf name: merge_unmerge |
| 3474 | // Rule: merge_unmerge |
| 3475 | if (!RuleConfig->isRuleDisabled(65)) { |
| 3476 | if (1 |
| 3477 | && [&]() { |
| 3478 | return Helper.matchCombineMergeUnmerge(*MIs[0], MatchData65); |
| 3479 | return true; |
| 3480 | }() ) { |
| 3481 | LLVM_DEBUG(dbgs() << "Applying rule 'merge_unmerge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'merge_unmerge'\n" ; } } while (false); |
| 3482 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData65); |
| 3483 | return true; |
| 3484 | } |
| 3485 | } |
| 3486 | return false; |
| 3487 | } |
| 3488 | if (Partition == 49 /* TargetOpcode::G_FPTRUNC */) { |
| 3489 | // Leaf name: constant_fp_op |
| 3490 | // Rule: constant_fp_op |
| 3491 | if (!RuleConfig->isRuleDisabled(68)) { |
| 3492 | if (1 |
| 3493 | && [&]() { |
| 3494 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3495 | return true; |
| 3496 | }() ) { |
| 3497 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3498 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3499 | return true; |
| 3500 | } |
| 3501 | } |
| 3502 | return false; |
| 3503 | } |
| 3504 | if (Partition == 50 /* TargetOpcode::G_FSQRT */) { |
| 3505 | // Leaf name: constant_fp_op |
| 3506 | // Rule: constant_fp_op |
| 3507 | if (!RuleConfig->isRuleDisabled(68)) { |
| 3508 | if (1 |
| 3509 | && [&]() { |
| 3510 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3511 | return true; |
| 3512 | }() ) { |
| 3513 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3514 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3515 | return true; |
| 3516 | } |
| 3517 | } |
| 3518 | // Leaf name: rcp_sqrt_to_rsq |
| 3519 | // Rule: rcp_sqrt_to_rsq |
| 3520 | if (!RuleConfig->isRuleDisabled(115)) { |
| 3521 | if (1 |
| 3522 | && [&]() { |
| 3523 | return PostLegalizerHelper.matchRcpSqrtToRsq(*MIs[0], MatchData115); |
| 3524 | return true; |
| 3525 | }() ) { |
| 3526 | LLVM_DEBUG(dbgs() << "Applying rule 'rcp_sqrt_to_rsq'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'rcp_sqrt_to_rsq'\n" ; } } while (false); |
| 3527 | Helper.applyBuildFn(*MIs[0], MatchData115); |
| 3528 | return true; |
| 3529 | } |
| 3530 | } |
| 3531 | return false; |
| 3532 | } |
| 3533 | if (Partition == 51 /* TargetOpcode::G_FLOG2 */) { |
| 3534 | // Leaf name: constant_fp_op |
| 3535 | // Rule: constant_fp_op |
| 3536 | if (!RuleConfig->isRuleDisabled(68)) { |
| 3537 | if (1 |
| 3538 | && [&]() { |
| 3539 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3540 | return true; |
| 3541 | }() ) { |
| 3542 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3543 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
| 3544 | return true; |
| 3545 | } |
| 3546 | } |
| 3547 | return false; |
| 3548 | } |
| 3549 | if (Partition == 52 /* TargetOpcode::G_UMULO */) { |
| 3550 | // Leaf name: mulo_by_2 |
| 3551 | // Rule: mulo_by_2 |
| 3552 | if (!RuleConfig->isRuleDisabled(71)) { |
| 3553 | if (1 |
| 3554 | && [&]() { |
| 3555 | return Helper.matchMulOBy2(*MIs[0], MatchData71); |
| 3556 | return true; |
| 3557 | }() ) { |
| 3558 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n" ; } } while (false); |
| 3559 | Helper.applyBuildFnNoErase(*MIs[0], MatchData71); |
| 3560 | return true; |
| 3561 | } |
| 3562 | } |
| 3563 | // Leaf name: mulo_by_0 |
| 3564 | // Rule: mulo_by_0 |
| 3565 | if (!RuleConfig->isRuleDisabled(72)) { |
| 3566 | if (1 |
| 3567 | && [&]() { |
| 3568 | return Helper.matchMulOBy0(*MIs[0], MatchData72); |
| 3569 | return true; |
| 3570 | }() ) { |
| 3571 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n" ; } } while (false); |
| 3572 | Helper.applyBuildFn(*MIs[0], MatchData72); |
| 3573 | return true; |
| 3574 | } |
| 3575 | } |
| 3576 | return false; |
| 3577 | } |
| 3578 | if (Partition == 53 /* TargetOpcode::G_SMULO */) { |
| 3579 | // Leaf name: mulo_by_2 |
| 3580 | // Rule: mulo_by_2 |
| 3581 | if (!RuleConfig->isRuleDisabled(71)) { |
| 3582 | if (1 |
| 3583 | && [&]() { |
| 3584 | return Helper.matchMulOBy2(*MIs[0], MatchData71); |
| 3585 | return true; |
| 3586 | }() ) { |
| 3587 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n" ; } } while (false); |
| 3588 | Helper.applyBuildFnNoErase(*MIs[0], MatchData71); |
| 3589 | return true; |
| 3590 | } |
| 3591 | } |
| 3592 | // Leaf name: mulo_by_0 |
| 3593 | // Rule: mulo_by_0 |
| 3594 | if (!RuleConfig->isRuleDisabled(72)) { |
| 3595 | if (1 |
| 3596 | && [&]() { |
| 3597 | return Helper.matchMulOBy0(*MIs[0], MatchData72); |
| 3598 | return true; |
| 3599 | }() ) { |
| 3600 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n" ; } } while (false); |
| 3601 | Helper.applyBuildFn(*MIs[0], MatchData72); |
| 3602 | return true; |
| 3603 | } |
| 3604 | } |
| 3605 | return false; |
| 3606 | } |
| 3607 | if (Partition == 54 /* TargetOpcode::G_UADDO */) { |
| 3608 | // Leaf name: addo_by_0 |
| 3609 | // Rule: addo_by_0 |
| 3610 | if (!RuleConfig->isRuleDisabled(73)) { |
| 3611 | if (1 |
| 3612 | && [&]() { |
| 3613 | return Helper.matchAddOBy0(*MIs[0], MatchData73); |
| 3614 | return true; |
| 3615 | }() ) { |
| 3616 | LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n" ; } } while (false); |
| 3617 | Helper.applyBuildFn(*MIs[0], MatchData73); |
| 3618 | return true; |
| 3619 | } |
| 3620 | } |
| 3621 | return false; |
| 3622 | } |
| 3623 | if (Partition == 55 /* TargetOpcode::G_SADDO */) { |
| 3624 | // Leaf name: addo_by_0 |
| 3625 | // Rule: addo_by_0 |
| 3626 | if (!RuleConfig->isRuleDisabled(73)) { |
| 3627 | if (1 |
| 3628 | && [&]() { |
| 3629 | return Helper.matchAddOBy0(*MIs[0], MatchData73); |
| 3630 | return true; |
| 3631 | }() ) { |
| 3632 | LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n" ; } } while (false); |
| 3633 | Helper.applyBuildFn(*MIs[0], MatchData73); |
| 3634 | return true; |
| 3635 | } |
| 3636 | } |
| 3637 | return false; |
| 3638 | } |
| 3639 | if (Partition == 56 /* TargetOpcode::G_UADDE */) { |
| 3640 | // Leaf name: adde_to_addo |
| 3641 | // Rule: adde_to_addo |
| 3642 | if (!RuleConfig->isRuleDisabled(74)) { |
| 3643 | if (1 |
| 3644 | && [&]() { |
| 3645 | return Helper.matchAddEToAddO(*MIs[0], MatchData74); |
| 3646 | return true; |
| 3647 | }() ) { |
| 3648 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
| 3649 | Helper.applyBuildFnNoErase(*MIs[0], MatchData74); |
| 3650 | return true; |
| 3651 | } |
| 3652 | } |
| 3653 | return false; |
| 3654 | } |
| 3655 | if (Partition == 57 /* TargetOpcode::G_SADDE */) { |
| 3656 | // Leaf name: adde_to_addo |
| 3657 | // Rule: adde_to_addo |
| 3658 | if (!RuleConfig->isRuleDisabled(74)) { |
| 3659 | if (1 |
| 3660 | && [&]() { |
| 3661 | return Helper.matchAddEToAddO(*MIs[0], MatchData74); |
| 3662 | return true; |
| 3663 | }() ) { |
| 3664 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
| 3665 | Helper.applyBuildFnNoErase(*MIs[0], MatchData74); |
| 3666 | return true; |
| 3667 | } |
| 3668 | } |
| 3669 | return false; |
| 3670 | } |
| 3671 | if (Partition == 58 /* TargetOpcode::G_USUBE */) { |
| 3672 | // Leaf name: adde_to_addo |
| 3673 | // Rule: adde_to_addo |
| 3674 | if (!RuleConfig->isRuleDisabled(74)) { |
| 3675 | if (1 |
| 3676 | && [&]() { |
| 3677 | return Helper.matchAddEToAddO(*MIs[0], MatchData74); |
| 3678 | return true; |
| 3679 | }() ) { |
| 3680 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
| 3681 | Helper.applyBuildFnNoErase(*MIs[0], MatchData74); |
| 3682 | return true; |
| 3683 | } |
| 3684 | } |
| 3685 | return false; |
| 3686 | } |
| 3687 | if (Partition == 59 /* TargetOpcode::G_SSUBE */) { |
| 3688 | // Leaf name: adde_to_addo |
| 3689 | // Rule: adde_to_addo |
| 3690 | if (!RuleConfig->isRuleDisabled(74)) { |
| 3691 | if (1 |
| 3692 | && [&]() { |
| 3693 | return Helper.matchAddEToAddO(*MIs[0], MatchData74); |
| 3694 | return true; |
| 3695 | }() ) { |
| 3696 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
| 3697 | Helper.applyBuildFnNoErase(*MIs[0], MatchData74); |
| 3698 | return true; |
| 3699 | } |
| 3700 | } |
| 3701 | return false; |
| 3702 | } |
| 3703 | if (Partition == 60 /* TargetOpcode::G_FMINNUM */) { |
| 3704 | // Leaf name: combine_minmax_nan |
| 3705 | // Rule: combine_minmax_nan |
| 3706 | if (!RuleConfig->isRuleDisabled(75)) { |
| 3707 | if (1 |
| 3708 | && [&]() { |
| 3709 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75); |
| 3710 | return true; |
| 3711 | }() ) { |
| 3712 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
| 3713 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75); |
| 3714 | return true; |
| 3715 | } |
| 3716 | } |
| 3717 | // Leaf name: fold_binop_into_select |
| 3718 | // Rule: fold_binop_into_select |
| 3719 | if (!RuleConfig->isRuleDisabled(104)) { |
| 3720 | if (1 |
| 3721 | && [&]() { |
| 3722 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 3723 | return true; |
| 3724 | }() ) { |
| 3725 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 3726 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 3727 | return true; |
| 3728 | } |
| 3729 | } |
| 3730 | return false; |
| 3731 | } |
| 3732 | if (Partition == 61 /* TargetOpcode::G_FMAXNUM */) { |
| 3733 | // Leaf name: combine_minmax_nan |
| 3734 | // Rule: combine_minmax_nan |
| 3735 | if (!RuleConfig->isRuleDisabled(75)) { |
| 3736 | if (1 |
| 3737 | && [&]() { |
| 3738 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75); |
| 3739 | return true; |
| 3740 | }() ) { |
| 3741 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
| 3742 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75); |
| 3743 | return true; |
| 3744 | } |
| 3745 | } |
| 3746 | // Leaf name: fold_binop_into_select |
| 3747 | // Rule: fold_binop_into_select |
| 3748 | if (!RuleConfig->isRuleDisabled(104)) { |
| 3749 | if (1 |
| 3750 | && [&]() { |
| 3751 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 3752 | return true; |
| 3753 | }() ) { |
| 3754 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 3755 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 3756 | return true; |
| 3757 | } |
| 3758 | } |
| 3759 | return false; |
| 3760 | } |
| 3761 | if (Partition == 62 /* TargetOpcode::G_FMINIMUM */) { |
| 3762 | // Leaf name: combine_minmax_nan |
| 3763 | // Rule: combine_minmax_nan |
| 3764 | if (!RuleConfig->isRuleDisabled(75)) { |
| 3765 | if (1 |
| 3766 | && [&]() { |
| 3767 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75); |
| 3768 | return true; |
| 3769 | }() ) { |
| 3770 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
| 3771 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75); |
| 3772 | return true; |
| 3773 | } |
| 3774 | } |
| 3775 | // Leaf name: fold_binop_into_select |
| 3776 | // Rule: fold_binop_into_select |
| 3777 | if (!RuleConfig->isRuleDisabled(104)) { |
| 3778 | if (1 |
| 3779 | && [&]() { |
| 3780 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 3781 | return true; |
| 3782 | }() ) { |
| 3783 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 3784 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 3785 | return true; |
| 3786 | } |
| 3787 | } |
| 3788 | return false; |
| 3789 | } |
| 3790 | if (Partition == 63 /* TargetOpcode::G_FMAXIMUM */) { |
| 3791 | // Leaf name: combine_minmax_nan |
| 3792 | // Rule: combine_minmax_nan |
| 3793 | if (!RuleConfig->isRuleDisabled(75)) { |
| 3794 | if (1 |
| 3795 | && [&]() { |
| 3796 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75); |
| 3797 | return true; |
| 3798 | }() ) { |
| 3799 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
| 3800 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75); |
| 3801 | return true; |
| 3802 | } |
| 3803 | } |
| 3804 | // Leaf name: fold_binop_into_select |
| 3805 | // Rule: fold_binop_into_select |
| 3806 | if (!RuleConfig->isRuleDisabled(104)) { |
| 3807 | if (1 |
| 3808 | && [&]() { |
| 3809 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 3810 | return true; |
| 3811 | }() ) { |
| 3812 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 3813 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 3814 | return true; |
| 3815 | } |
| 3816 | } |
| 3817 | return false; |
| 3818 | } |
| 3819 | if (Partition == 64 /* TargetOpcode::G_SSHLSAT */) { |
| 3820 | // Leaf name: shift_immed_chain |
| 3821 | // Rule: shift_immed_chain |
| 3822 | if (!RuleConfig->isRuleDisabled(78)) { |
| 3823 | if (1 |
| 3824 | && [&]() { |
| 3825 | return Helper.matchShiftImmedChain(*MIs[0], MatchData78); |
| 3826 | return true; |
| 3827 | }() ) { |
| 3828 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
| 3829 | Helper.applyShiftImmedChain(*MIs[0], MatchData78); |
| 3830 | return true; |
| 3831 | } |
| 3832 | } |
| 3833 | // Leaf name: shift_of_shifted_logic_chain |
| 3834 | // Rule: shift_of_shifted_logic_chain |
| 3835 | if (!RuleConfig->isRuleDisabled(79)) { |
| 3836 | if (1 |
| 3837 | && [&]() { |
| 3838 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79); |
| 3839 | return true; |
| 3840 | }() ) { |
| 3841 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
| 3842 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79); |
| 3843 | return true; |
| 3844 | } |
| 3845 | } |
| 3846 | return false; |
| 3847 | } |
| 3848 | if (Partition == 65 /* TargetOpcode::G_USHLSAT */) { |
| 3849 | // Leaf name: shift_immed_chain |
| 3850 | // Rule: shift_immed_chain |
| 3851 | if (!RuleConfig->isRuleDisabled(78)) { |
| 3852 | if (1 |
| 3853 | && [&]() { |
| 3854 | return Helper.matchShiftImmedChain(*MIs[0], MatchData78); |
| 3855 | return true; |
| 3856 | }() ) { |
| 3857 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
| 3858 | Helper.applyShiftImmedChain(*MIs[0], MatchData78); |
| 3859 | return true; |
| 3860 | } |
| 3861 | } |
| 3862 | // Leaf name: shift_of_shifted_logic_chain |
| 3863 | // Rule: shift_of_shifted_logic_chain |
| 3864 | if (!RuleConfig->isRuleDisabled(79)) { |
| 3865 | if (1 |
| 3866 | && [&]() { |
| 3867 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79); |
| 3868 | return true; |
| 3869 | }() ) { |
| 3870 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
| 3871 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79); |
| 3872 | return true; |
| 3873 | } |
| 3874 | } |
| 3875 | return false; |
| 3876 | } |
| 3877 | if (Partition == 66 /* TargetOpcode::G_FSHL */) { |
| 3878 | // Leaf name: funnel_shift_to_rotate |
| 3879 | // Rule: funnel_shift_to_rotate |
| 3880 | if (!RuleConfig->isRuleDisabled(84)) { |
| 3881 | if (1 |
| 3882 | && [&]() { |
| 3883 | return Helper.matchFunnelShiftToRotate(*MIs[0]); |
| 3884 | return true; |
| 3885 | }() ) { |
| 3886 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n" ; } } while (false); |
| 3887 | Helper.applyFunnelShiftToRotate(*MIs[0]); |
| 3888 | return true; |
| 3889 | } |
| 3890 | } |
| 3891 | return false; |
| 3892 | } |
| 3893 | if (Partition == 67 /* TargetOpcode::G_FSHR */) { |
| 3894 | // Leaf name: funnel_shift_to_rotate |
| 3895 | // Rule: funnel_shift_to_rotate |
| 3896 | if (!RuleConfig->isRuleDisabled(84)) { |
| 3897 | if (1 |
| 3898 | && [&]() { |
| 3899 | return Helper.matchFunnelShiftToRotate(*MIs[0]); |
| 3900 | return true; |
| 3901 | }() ) { |
| 3902 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n" ; } } while (false); |
| 3903 | Helper.applyFunnelShiftToRotate(*MIs[0]); |
| 3904 | return true; |
| 3905 | } |
| 3906 | } |
| 3907 | return false; |
| 3908 | } |
| 3909 | if (Partition == 68 /* TargetOpcode::G_UMULH */) { |
| 3910 | // Leaf name: mulh_to_lshr |
| 3911 | // Rule: mulh_to_lshr |
| 3912 | if (!RuleConfig->isRuleDisabled(93)) { |
| 3913 | if (1 |
| 3914 | && [&]() { |
| 3915 | return Helper.matchUMulHToLShr(*MIs[0]); |
| 3916 | return true; |
| 3917 | }() ) { |
| 3918 | LLVM_DEBUG(dbgs() << "Applying rule 'mulh_to_lshr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mulh_to_lshr'\n" ; } } while (false); |
| 3919 | Helper.applyUMulHToLShr(*MIs[0]); |
| 3920 | return true; |
| 3921 | } |
| 3922 | } |
| 3923 | return false; |
| 3924 | } |
| 3925 | if (Partition == 69 /* TargetOpcode::G_FADD */) { |
| 3926 | // Leaf name: redundant_neg_operands |
| 3927 | // Rule: redundant_neg_operands |
| 3928 | if (!RuleConfig->isRuleDisabled(94)) { |
| 3929 | if (1 |
| 3930 | && [&]() { |
| 3931 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
| 3932 | return true; |
| 3933 | }() ) { |
| 3934 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 3935 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
| 3936 | return true; |
| 3937 | } |
| 3938 | } |
| 3939 | // Leaf name: combine_fadd_fmul_to_fmad_or_fma |
| 3940 | // Rule: combine_fadd_fmul_to_fmad_or_fma |
| 3941 | if (!RuleConfig->isRuleDisabled(96)) { |
| 3942 | if (1 |
| 3943 | && [&]() { |
| 3944 | return Helper.matchCombineFAddFMulToFMadOrFMA(*MIs[0], |
| 3945 | MatchData96); |
| 3946 | return true; |
| 3947 | }() ) { |
| 3948 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 3949 | Helper.applyBuildFn(*MIs[0], MatchData96); |
| 3950 | return true; |
| 3951 | } |
| 3952 | } |
| 3953 | // Leaf name: combine_fadd_fpext_fmul_to_fmad_or_fma |
| 3954 | // Rule: combine_fadd_fpext_fmul_to_fmad_or_fma |
| 3955 | if (!RuleConfig->isRuleDisabled(97)) { |
| 3956 | if (1 |
| 3957 | && [&]() { |
| 3958 | return Helper.matchCombineFAddFpExtFMulToFMadOrFMA(*MIs[0], |
| 3959 | MatchData97); |
| 3960 | return true; |
| 3961 | }() ) { |
| 3962 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 3963 | Helper.applyBuildFn(*MIs[0], MatchData97); |
| 3964 | return true; |
| 3965 | } |
| 3966 | } |
| 3967 | // Leaf name: combine_fadd_fma_fmul_to_fmad_or_fma |
| 3968 | // Rule: combine_fadd_fma_fmul_to_fmad_or_fma |
| 3969 | if (!RuleConfig->isRuleDisabled(98)) { |
| 3970 | if (1 |
| 3971 | && [&]() { |
| 3972 | return Helper.matchCombineFAddFMAFMulToFMadOrFMA(*MIs[0], |
| 3973 | MatchData98); |
| 3974 | return true; |
| 3975 | }() ) { |
| 3976 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 3977 | Helper.applyBuildFn(*MIs[0], MatchData98); |
| 3978 | return true; |
| 3979 | } |
| 3980 | } |
| 3981 | // Leaf name: combine_fadd_fpext_fma_fmul_to_fmad_or_fma |
| 3982 | // Rule: combine_fadd_fpext_fma_fmul_to_fmad_or_fma |
| 3983 | if (!RuleConfig->isRuleDisabled(99)) { |
| 3984 | if (1 |
| 3985 | && [&]() { |
| 3986 | return Helper.matchCombineFAddFpExtFMulToFMadOrFMAAggressive( |
| 3987 | *MIs[0], MatchData99); |
| 3988 | return true; |
| 3989 | }() ) { |
| 3990 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 3991 | Helper.applyBuildFn(*MIs[0], MatchData99); |
| 3992 | return true; |
| 3993 | } |
| 3994 | } |
| 3995 | // Leaf name: fold_binop_into_select |
| 3996 | // Rule: fold_binop_into_select |
| 3997 | if (!RuleConfig->isRuleDisabled(104)) { |
| 3998 | if (1 |
| 3999 | && [&]() { |
| 4000 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4001 | return true; |
| 4002 | }() ) { |
| 4003 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4004 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4005 | return true; |
| 4006 | } |
| 4007 | } |
| 4008 | return false; |
| 4009 | } |
| 4010 | if (Partition == 70 /* TargetOpcode::G_FSUB */) { |
| 4011 | // Leaf name: redundant_neg_operands |
| 4012 | // Rule: redundant_neg_operands |
| 4013 | if (!RuleConfig->isRuleDisabled(94)) { |
| 4014 | if (1 |
| 4015 | && [&]() { |
| 4016 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
| 4017 | return true; |
| 4018 | }() ) { |
| 4019 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 4020 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
| 4021 | return true; |
| 4022 | } |
| 4023 | } |
| 4024 | // Leaf name: combine_fsub_fmul_to_fmad_or_fma |
| 4025 | // Rule: combine_fsub_fmul_to_fmad_or_fma |
| 4026 | if (!RuleConfig->isRuleDisabled(100)) { |
| 4027 | if (1 |
| 4028 | && [&]() { |
| 4029 | return Helper.matchCombineFSubFMulToFMadOrFMA(*MIs[0], |
| 4030 | MatchData100); |
| 4031 | return true; |
| 4032 | }() ) { |
| 4033 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 4034 | Helper.applyBuildFn(*MIs[0], MatchData100); |
| 4035 | return true; |
| 4036 | } |
| 4037 | } |
| 4038 | // Leaf name: combine_fsub_fneg_fmul_to_fmad_or_fma |
| 4039 | // Rule: combine_fsub_fneg_fmul_to_fmad_or_fma |
| 4040 | if (!RuleConfig->isRuleDisabled(101)) { |
| 4041 | if (1 |
| 4042 | && [&]() { |
| 4043 | return Helper.matchCombineFSubFNegFMulToFMadOrFMA(*MIs[0], |
| 4044 | MatchData101); |
| 4045 | return true; |
| 4046 | }() ) { |
| 4047 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 4048 | Helper.applyBuildFn(*MIs[0], MatchData101); |
| 4049 | return true; |
| 4050 | } |
| 4051 | } |
| 4052 | // Leaf name: combine_fsub_fpext_fmul_to_fmad_or_fma |
| 4053 | // Rule: combine_fsub_fpext_fmul_to_fmad_or_fma |
| 4054 | if (!RuleConfig->isRuleDisabled(102)) { |
| 4055 | if (1 |
| 4056 | && [&]() { |
| 4057 | return Helper.matchCombineFSubFpExtFMulToFMadOrFMA(*MIs[0], |
| 4058 | MatchData102); |
| 4059 | return true; |
| 4060 | }() ) { |
| 4061 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 4062 | Helper.applyBuildFn(*MIs[0], MatchData102); |
| 4063 | return true; |
| 4064 | } |
| 4065 | } |
| 4066 | // Leaf name: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma |
| 4067 | // Rule: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma |
| 4068 | if (!RuleConfig->isRuleDisabled(103)) { |
| 4069 | if (1 |
| 4070 | && [&]() { |
| 4071 | return Helper.matchCombineFSubFpExtFNegFMulToFMadOrFMA( |
| 4072 | *MIs[0], MatchData103); |
| 4073 | return true; |
| 4074 | }() ) { |
| 4075 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 4076 | Helper.applyBuildFn(*MIs[0], MatchData103); |
| 4077 | return true; |
| 4078 | } |
| 4079 | } |
| 4080 | // Leaf name: fold_binop_into_select |
| 4081 | // Rule: fold_binop_into_select |
| 4082 | if (!RuleConfig->isRuleDisabled(104)) { |
| 4083 | if (1 |
| 4084 | && [&]() { |
| 4085 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4086 | return true; |
| 4087 | }() ) { |
| 4088 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4089 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4090 | return true; |
| 4091 | } |
| 4092 | } |
| 4093 | // Leaf name: fsub_to_fneg |
| 4094 | // Rule: fsub_to_fneg |
| 4095 | if (!RuleConfig->isRuleDisabled(108)) { |
| 4096 | if (1 |
| 4097 | && [&]() { |
| 4098 | return Helper.matchFsubToFneg(*MIs[0], MatchData108); |
| 4099 | return true; |
| 4100 | }() ) { |
| 4101 | LLVM_DEBUG(dbgs() << "Applying rule 'fsub_to_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fsub_to_fneg'\n" ; } } while (false); |
| 4102 | Helper.applyFsubToFneg(*MIs[0], MatchData108); |
| 4103 | return true; |
| 4104 | } |
| 4105 | } |
| 4106 | return false; |
| 4107 | } |
| 4108 | if (Partition == 71 /* TargetOpcode::G_FMUL */) { |
| 4109 | // Leaf name: redundant_neg_operands |
| 4110 | // Rule: redundant_neg_operands |
| 4111 | if (!RuleConfig->isRuleDisabled(94)) { |
| 4112 | if (1 |
| 4113 | && [&]() { |
| 4114 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
| 4115 | return true; |
| 4116 | }() ) { |
| 4117 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 4118 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
| 4119 | return true; |
| 4120 | } |
| 4121 | } |
| 4122 | // Leaf name: fold_binop_into_select |
| 4123 | // Rule: fold_binop_into_select |
| 4124 | if (!RuleConfig->isRuleDisabled(104)) { |
| 4125 | if (1 |
| 4126 | && [&]() { |
| 4127 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4128 | return true; |
| 4129 | }() ) { |
| 4130 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4131 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4132 | return true; |
| 4133 | } |
| 4134 | } |
| 4135 | return false; |
| 4136 | } |
| 4137 | if (Partition == 72 /* TargetOpcode::G_FDIV */) { |
| 4138 | // Leaf name: redundant_neg_operands |
| 4139 | // Rule: redundant_neg_operands |
| 4140 | if (!RuleConfig->isRuleDisabled(94)) { |
| 4141 | if (1 |
| 4142 | && [&]() { |
| 4143 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
| 4144 | return true; |
| 4145 | }() ) { |
| 4146 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 4147 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
| 4148 | return true; |
| 4149 | } |
| 4150 | } |
| 4151 | // Leaf name: fold_binop_into_select |
| 4152 | // Rule: fold_binop_into_select |
| 4153 | if (!RuleConfig->isRuleDisabled(104)) { |
| 4154 | if (1 |
| 4155 | && [&]() { |
| 4156 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4157 | return true; |
| 4158 | }() ) { |
| 4159 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4160 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4161 | return true; |
| 4162 | } |
| 4163 | } |
| 4164 | return false; |
| 4165 | } |
| 4166 | if (Partition == 73 /* TargetOpcode::G_FMAD */) { |
| 4167 | // Leaf name: redundant_neg_operands |
| 4168 | // Rule: redundant_neg_operands |
| 4169 | if (!RuleConfig->isRuleDisabled(94)) { |
| 4170 | if (1 |
| 4171 | && [&]() { |
| 4172 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
| 4173 | return true; |
| 4174 | }() ) { |
| 4175 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 4176 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
| 4177 | return true; |
| 4178 | } |
| 4179 | } |
| 4180 | return false; |
| 4181 | } |
| 4182 | if (Partition == 74 /* TargetOpcode::G_FMA */) { |
| 4183 | // Leaf name: redundant_neg_operands |
| 4184 | // Rule: redundant_neg_operands |
| 4185 | if (!RuleConfig->isRuleDisabled(94)) { |
| 4186 | if (1 |
| 4187 | && [&]() { |
| 4188 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
| 4189 | return true; |
| 4190 | }() ) { |
| 4191 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 4192 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
| 4193 | return true; |
| 4194 | } |
| 4195 | } |
| 4196 | return false; |
| 4197 | } |
| 4198 | if (Partition == 75 /* TargetOpcode::G_SMIN */) { |
| 4199 | // Leaf name: fold_binop_into_select |
| 4200 | // Rule: fold_binop_into_select |
| 4201 | if (!RuleConfig->isRuleDisabled(104)) { |
| 4202 | if (1 |
| 4203 | && [&]() { |
| 4204 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4205 | return true; |
| 4206 | }() ) { |
| 4207 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4208 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4209 | return true; |
| 4210 | } |
| 4211 | } |
| 4212 | return false; |
| 4213 | } |
| 4214 | if (Partition == 76 /* TargetOpcode::G_SMAX */) { |
| 4215 | // Leaf name: fold_binop_into_select |
| 4216 | // Rule: fold_binop_into_select |
| 4217 | if (!RuleConfig->isRuleDisabled(104)) { |
| 4218 | if (1 |
| 4219 | && [&]() { |
| 4220 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4221 | return true; |
| 4222 | }() ) { |
| 4223 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4224 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4225 | return true; |
| 4226 | } |
| 4227 | } |
| 4228 | return false; |
| 4229 | } |
| 4230 | if (Partition == 77 /* TargetOpcode::G_UMIN */) { |
| 4231 | // Leaf name: fold_binop_into_select |
| 4232 | // Rule: fold_binop_into_select |
| 4233 | if (!RuleConfig->isRuleDisabled(104)) { |
| 4234 | if (1 |
| 4235 | && [&]() { |
| 4236 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4237 | return true; |
| 4238 | }() ) { |
| 4239 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4240 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4241 | return true; |
| 4242 | } |
| 4243 | } |
| 4244 | return false; |
| 4245 | } |
| 4246 | if (Partition == 78 /* TargetOpcode::G_UMAX */) { |
| 4247 | // Leaf name: fold_binop_into_select |
| 4248 | // Rule: fold_binop_into_select |
| 4249 | if (!RuleConfig->isRuleDisabled(104)) { |
| 4250 | if (1 |
| 4251 | && [&]() { |
| 4252 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4253 | return true; |
| 4254 | }() ) { |
| 4255 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4256 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4257 | return true; |
| 4258 | } |
| 4259 | } |
| 4260 | return false; |
| 4261 | } |
| 4262 | if (Partition == 79 /* TargetOpcode::G_FREM */) { |
| 4263 | // Leaf name: fold_binop_into_select |
| 4264 | // Rule: fold_binop_into_select |
| 4265 | if (!RuleConfig->isRuleDisabled(104)) { |
| 4266 | if (1 |
| 4267 | && [&]() { |
| 4268 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4269 | return true; |
| 4270 | }() ) { |
| 4271 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4272 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
| 4273 | return true; |
| 4274 | } |
| 4275 | } |
| 4276 | return false; |
| 4277 | } |
| 4278 | if (Partition == 80 /* AMDGPU::G_AMDGPU_CVT_F32_UBYTE0 */) { |
| 4279 | // Leaf name: cvt_f32_ubyteN |
| 4280 | // Rule: cvt_f32_ubyteN |
| 4281 | if (!RuleConfig->isRuleDisabled(112)) { |
| 4282 | if (1 |
| 4283 | && [&]() { |
| 4284 | return PostLegalizerHelper.matchCvtF32UByteN(*MIs[0], MatchData112); |
| 4285 | return true; |
| 4286 | }() ) { |
| 4287 | LLVM_DEBUG(dbgs() << "Applying rule 'cvt_f32_ubyteN'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'cvt_f32_ubyteN'\n" ; } } while (false); |
| 4288 | PostLegalizerHelper.applyCvtF32UByteN(*MIs[0], MatchData112); |
| 4289 | return true; |
| 4290 | } |
| 4291 | } |
| 4292 | return false; |
| 4293 | } |
| 4294 | if (Partition == 81 /* AMDGPU::G_AMDGPU_CVT_F32_UBYTE1 */) { |
| 4295 | // Leaf name: cvt_f32_ubyteN |
| 4296 | // Rule: cvt_f32_ubyteN |
| 4297 | if (!RuleConfig->isRuleDisabled(112)) { |
| 4298 | if (1 |
| 4299 | && [&]() { |
| 4300 | return PostLegalizerHelper.matchCvtF32UByteN(*MIs[0], MatchData112); |
| 4301 | return true; |
| 4302 | }() ) { |
| 4303 | LLVM_DEBUG(dbgs() << "Applying rule 'cvt_f32_ubyteN'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'cvt_f32_ubyteN'\n" ; } } while (false); |
| 4304 | PostLegalizerHelper.applyCvtF32UByteN(*MIs[0], MatchData112); |
| 4305 | return true; |
| 4306 | } |
| 4307 | } |
| 4308 | return false; |
| 4309 | } |
| 4310 | if (Partition == 82 /* AMDGPU::G_AMDGPU_CVT_F32_UBYTE2 */) { |
| 4311 | // Leaf name: cvt_f32_ubyteN |
| 4312 | // Rule: cvt_f32_ubyteN |
| 4313 | if (!RuleConfig->isRuleDisabled(112)) { |
| 4314 | if (1 |
| 4315 | && [&]() { |
| 4316 | return PostLegalizerHelper.matchCvtF32UByteN(*MIs[0], MatchData112); |
| 4317 | return true; |
| 4318 | }() ) { |
| 4319 | LLVM_DEBUG(dbgs() << "Applying rule 'cvt_f32_ubyteN'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'cvt_f32_ubyteN'\n" ; } } while (false); |
| 4320 | PostLegalizerHelper.applyCvtF32UByteN(*MIs[0], MatchData112); |
| 4321 | return true; |
| 4322 | } |
| 4323 | } |
| 4324 | return false; |
| 4325 | } |
| 4326 | if (Partition == 83 /* AMDGPU::G_AMDGPU_CVT_F32_UBYTE3 */) { |
| 4327 | // Leaf name: cvt_f32_ubyteN |
| 4328 | // Rule: cvt_f32_ubyteN |
| 4329 | if (!RuleConfig->isRuleDisabled(112)) { |
| 4330 | if (1 |
| 4331 | && [&]() { |
| 4332 | return PostLegalizerHelper.matchCvtF32UByteN(*MIs[0], MatchData112); |
| 4333 | return true; |
| 4334 | }() ) { |
| 4335 | LLVM_DEBUG(dbgs() << "Applying rule 'cvt_f32_ubyteN'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'cvt_f32_ubyteN'\n" ; } } while (false); |
| 4336 | PostLegalizerHelper.applyCvtF32UByteN(*MIs[0], MatchData112); |
| 4337 | return true; |
| 4338 | } |
| 4339 | } |
| 4340 | return false; |
| 4341 | } |
| 4342 | if (Partition == 84 /* TargetOpcode::G_INTRINSIC */) { |
| 4343 | // Leaf name: rcp_sqrt_to_rsq |
| 4344 | // Rule: rcp_sqrt_to_rsq |
| 4345 | if (!RuleConfig->isRuleDisabled(115)) { |
| 4346 | if (1 |
| 4347 | && [&]() { |
| 4348 | return PostLegalizerHelper.matchRcpSqrtToRsq(*MIs[0], MatchData115); |
| 4349 | return true; |
| 4350 | }() ) { |
| 4351 | LLVM_DEBUG(dbgs() << "Applying rule 'rcp_sqrt_to_rsq'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'rcp_sqrt_to_rsq'\n" ; } } while (false); |
| 4352 | Helper.applyBuildFn(*MIs[0], MatchData115); |
| 4353 | return true; |
| 4354 | } |
| 4355 | } |
| 4356 | return false; |
| 4357 | } |
| 4358 | |
| 4359 | return false; |
| 4360 | } |
| 4361 | #endif // ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP |