File: | build/source/build-llvm/tools/clang/stage2-bins/lib/Target/AMDGPU/AMDGPUGenPostLegalizeGICombiner.inc |
Warning: | line 3196, column 7 Value stored to 'Partition' is never read |
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1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | |* *| |
3 | |* Global Combiner *| |
4 | |* *| |
5 | |* Automatically generated file, do not edit! *| |
6 | |* *| |
7 | \*===----------------------------------------------------------------------===*/ |
8 | |
9 | #ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS |
10 | #include "llvm/ADT/SparseBitVector.h" |
11 | namespace llvm { |
12 | extern cl::OptionCategory GICombinerOptionCategory; |
13 | } // end namespace llvm |
14 | #endif // ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS |
15 | |
16 | #ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H |
17 | class AMDGPUGenPostLegalizerCombinerHelperRuleConfig { |
18 | SparseBitVector<> DisabledRules; |
19 | |
20 | public: |
21 | bool parseCommandLineOption(); |
22 | bool isRuleDisabled(unsigned ID) const; |
23 | bool setRuleEnabled(StringRef RuleIdentifier); |
24 | bool setRuleDisabled(StringRef RuleIdentifier); |
25 | }; |
26 | |
27 | class AMDGPUGenPostLegalizerCombinerHelper : public AMDGPUPostLegalizerCombinerHelperState { |
28 | const AMDGPUGenPostLegalizerCombinerHelperRuleConfig *RuleConfig; |
29 | |
30 | public: |
31 | template <typename... Args>AMDGPUGenPostLegalizerCombinerHelper(const AMDGPUGenPostLegalizerCombinerHelperRuleConfig &RuleConfig, Args &&... args) : AMDGPUPostLegalizerCombinerHelperState(std::forward<Args>(args)...), RuleConfig(&RuleConfig) {} |
32 | |
33 | bool tryCombineAll( |
34 | GISelChangeObserver &Observer, |
35 | MachineInstr &MI, |
36 | MachineIRBuilder &B) const; |
37 | }; |
38 | |
39 | static std::optional<uint64_t> getRuleIdxForIdentifier(StringRef RuleIdentifier) { |
40 | uint64_t I; |
41 | // getAtInteger(...) returns false on success |
42 | bool Parsed = !RuleIdentifier.getAsInteger(0, I); |
43 | if (Parsed) |
44 | return I; |
45 | |
46 | #ifndef NDEBUG |
47 | switch (RuleIdentifier.size()) { |
48 | default: break; |
49 | case 9: // 4 strings to match. |
50 | switch (RuleIdentifier[0]) { |
51 | default: break; |
52 | case 'a': // 1 string to match. |
53 | if (memcmp(RuleIdentifier.data()+1, "ddo_by_0", 8) != 0) |
54 | break; |
55 | return 75; // "addo_by_0" |
56 | case 'c': // 1 string to match. |
57 | if (memcmp(RuleIdentifier.data()+1, "opy_prop", 8) != 0) |
58 | break; |
59 | return 0; // "copy_prop" |
60 | case 'm': // 2 strings to match. |
61 | if (memcmp(RuleIdentifier.data()+1, "ulo_by_", 7) != 0) |
62 | break; |
63 | switch (RuleIdentifier[8]) { |
64 | default: break; |
65 | case '0': // 1 string to match. |
66 | return 74; // "mulo_by_0" |
67 | case '2': // 1 string to match. |
68 | return 73; // "mulo_by_2" |
69 | } |
70 | break; |
71 | } |
72 | break; |
73 | case 10: // 3 strings to match. |
74 | switch (RuleIdentifier[0]) { |
75 | default: break; |
76 | case 'i': // 1 string to match. |
77 | if (memcmp(RuleIdentifier.data()+1, "2p_to_p2i", 9) != 0) |
78 | break; |
79 | return 29; // "i2p_to_p2i" |
80 | case 'm': // 1 string to match. |
81 | if (memcmp(RuleIdentifier.data()+1, "ul_to_shl", 9) != 0) |
82 | break; |
83 | return 1; // "mul_to_shl" |
84 | case 'p': // 1 string to match. |
85 | if (memcmp(RuleIdentifier.data()+1, "2i_to_i2p", 9) != 0) |
86 | break; |
87 | return 28; // "p2i_to_i2p" |
88 | } |
89 | break; |
90 | case 11: // 4 strings to match. |
91 | switch (RuleIdentifier[0]) { |
92 | default: break; |
93 | case 'a': // 1 string to match. |
94 | if (memcmp(RuleIdentifier.data()+1, "dd_sub_reg", 10) != 0) |
95 | break; |
96 | return 33; // "add_sub_reg" |
97 | case 's': // 1 string to match. |
98 | if (memcmp(RuleIdentifier.data()+1, "ub_add_reg", 10) != 0) |
99 | break; |
100 | return 107; // "sub_add_reg" |
101 | case 't': // 1 string to match. |
102 | if (memcmp(RuleIdentifier.data()+1, "runc_shift", 10) != 0) |
103 | break; |
104 | return 69; // "trunc_shift" |
105 | case 'u': // 1 string to match. |
106 | if (memcmp(RuleIdentifier.data()+1, "nmerge_cst", 10) != 0) |
107 | break; |
108 | return 64; // "unmerge_cst" |
109 | } |
110 | break; |
111 | case 12: // 6 strings to match. |
112 | switch (RuleIdentifier[0]) { |
113 | default: break; |
114 | case 'a': // 1 string to match. |
115 | if (memcmp(RuleIdentifier.data()+1, "dde_to_addo", 11) != 0) |
116 | break; |
117 | return 76; // "adde_to_addo" |
118 | case 'e': // 1 string to match. |
119 | if (memcmp(RuleIdentifier.data()+1, "xt_ext_fold", 11) != 0) |
120 | break; |
121 | return 60; // "ext_ext_fold" |
122 | case 'f': // 1 string to match. |
123 | if (memcmp(RuleIdentifier.data()+1, "sub_to_fneg", 11) != 0) |
124 | break; |
125 | return 110; // "fsub_to_fneg" |
126 | case 'm': // 1 string to match. |
127 | if (memcmp(RuleIdentifier.data()+1, "ulh_to_lshr", 11) != 0) |
128 | break; |
129 | return 95; // "mulh_to_lshr" |
130 | case 'n': // 1 string to match. |
131 | if (memcmp(RuleIdentifier.data()+1, "ot_cmp_fold", 11) != 0) |
132 | break; |
133 | return 61; // "not_cmp_fold" |
134 | case 'r': // 1 string to match. |
135 | if (memcmp(RuleIdentifier.data()+1, "edundant_or", 11) != 0) |
136 | break; |
137 | return 54; // "redundant_or" |
138 | } |
139 | break; |
140 | case 13: // 10 strings to match. |
141 | switch (RuleIdentifier[0]) { |
142 | default: break; |
143 | case 'c': // 2 strings to match. |
144 | if (RuleIdentifier[1] != 'o') |
145 | break; |
146 | switch (RuleIdentifier[2]) { |
147 | default: break; |
148 | case 'm': // 1 string to match. |
149 | if (memcmp(RuleIdentifier.data()+3, "mute_shift", 10) != 0) |
150 | break; |
151 | return 86; // "commute_shift" |
152 | case 'n': // 1 string to match. |
153 | if (memcmp(RuleIdentifier.data()+3, "stant_fold", 10) != 0) |
154 | break; |
155 | return 91; // "constant_fold" |
156 | } |
157 | break; |
158 | case 'f': // 1 string to match. |
159 | if (memcmp(RuleIdentifier.data()+1, "oldable_fneg", 12) != 0) |
160 | break; |
161 | return 116; // "foldable_fneg" |
162 | case 'l': // 1 string to match. |
163 | if (memcmp(RuleIdentifier.data()+1, "oad_and_mask", 12) != 0) |
164 | break; |
165 | return 9; // "load_and_mask" |
166 | case 'm': // 1 string to match. |
167 | if (memcmp(RuleIdentifier.data()+1, "erge_unmerge", 12) != 0) |
168 | break; |
169 | return 67; // "merge_unmerge" |
170 | case 'r': // 1 string to match. |
171 | if (memcmp(RuleIdentifier.data()+1, "edundant_and", 12) != 0) |
172 | break; |
173 | return 52; // "redundant_and" |
174 | case 's': // 1 string to match. |
175 | if (memcmp(RuleIdentifier.data()+1, "div_by_const", 12) != 0) |
176 | break; |
177 | return 94; // "sdiv_by_const" |
178 | case 'u': // 3 strings to match. |
179 | switch (RuleIdentifier[1]) { |
180 | default: break; |
181 | case 'd': // 1 string to match. |
182 | if (memcmp(RuleIdentifier.data()+2, "iv_by_const", 11) != 0) |
183 | break; |
184 | return 93; // "udiv_by_const" |
185 | case 'n': // 2 strings to match. |
186 | if (memcmp(RuleIdentifier.data()+2, "merge_", 6) != 0) |
187 | break; |
188 | switch (RuleIdentifier[8]) { |
189 | default: break; |
190 | case 'm': // 1 string to match. |
191 | if (memcmp(RuleIdentifier.data()+9, "erge", 4) != 0) |
192 | break; |
193 | return 63; // "unmerge_merge" |
194 | case 'u': // 1 string to match. |
195 | if (memcmp(RuleIdentifier.data()+9, "ndef", 4) != 0) |
196 | break; |
197 | return 21; // "unmerge_undef" |
198 | } |
199 | break; |
200 | } |
201 | break; |
202 | } |
203 | break; |
204 | case 14: // 10 strings to match. |
205 | switch (RuleIdentifier[0]) { |
206 | default: break; |
207 | case 'b': // 1 string to match. |
208 | if (memcmp(RuleIdentifier.data()+1, "inop_same_val", 13) != 0) |
209 | break; |
210 | return 25; // "binop_same_val" |
211 | case 'c': // 2 strings to match. |
212 | switch (RuleIdentifier[1]) { |
213 | default: break; |
214 | case 'o': // 1 string to match. |
215 | if (memcmp(RuleIdentifier.data()+2, "nstant_fp_op", 12) != 0) |
216 | break; |
217 | return 70; // "constant_fp_op" |
218 | case 'v': // 1 string to match. |
219 | if (memcmp(RuleIdentifier.data()+2, "t_f32_ubyteN", 12) != 0) |
220 | break; |
221 | return 114; // "cvt_f32_ubyteN" |
222 | } |
223 | break; |
224 | case 'f': // 2 strings to match. |
225 | switch (RuleIdentifier[1]) { |
226 | default: break; |
227 | case 'a': // 1 string to match. |
228 | if (memcmp(RuleIdentifier.data()+2, "bs_fneg_fold", 12) != 0) |
229 | break; |
230 | return 92; // "fabs_fneg_fold" |
231 | case 'n': // 1 string to match. |
232 | if (memcmp(RuleIdentifier.data()+2, "eg_fneg_fold", 12) != 0) |
233 | break; |
234 | return 31; // "fneg_fneg_fold" |
235 | } |
236 | break; |
237 | case 'm': // 1 string to match. |
238 | if (memcmp(RuleIdentifier.data()+1, "ul_by_neg_one", 13) != 0) |
239 | break; |
240 | return 3; // "mul_by_neg_one" |
241 | case 'r': // 1 string to match. |
242 | if (memcmp(RuleIdentifier.data()+1, "eassoc_ptradd", 13) != 0) |
243 | break; |
244 | return 43; // "reassoc_ptradd" |
245 | case 's': // 1 string to match. |
246 | if (memcmp(RuleIdentifier.data()+1, "hifts_too_big", 13) != 0) |
247 | break; |
248 | return 42; // "shifts_too_big" |
249 | case 't': // 1 string to match. |
250 | if (memcmp(RuleIdentifier.data()+1, "runc_ext_fold", 13) != 0) |
251 | break; |
252 | return 68; // "trunc_ext_fold" |
253 | case 'u': // 1 string to match. |
254 | if (memcmp(RuleIdentifier.data()+1, "char_to_float", 13) != 0) |
255 | break; |
256 | return 113; // "uchar_to_float" |
257 | } |
258 | break; |
259 | case 15: // 7 strings to match. |
260 | switch (RuleIdentifier[0]) { |
261 | default: break; |
262 | case 'e': // 1 string to match. |
263 | if (memcmp(RuleIdentifier.data()+1, "xtending_loads", 14) != 0) |
264 | break; |
265 | return 8; // "extending_loads" |
266 | case 'i': // 1 string to match. |
267 | if (memcmp(RuleIdentifier.data()+1, "dempotent_prop", 14) != 0) |
268 | break; |
269 | return 4; // "idempotent_prop" |
270 | case 'l': // 1 string to match. |
271 | if (memcmp(RuleIdentifier.data()+1, "oad_or_combine", 14) != 0) |
272 | break; |
273 | return 82; // "load_or_combine" |
274 | case 'o': // 1 string to match. |
275 | if (memcmp(RuleIdentifier.data()+1, "verlapping_and", 14) != 0) |
276 | break; |
277 | return 72; // "overlapping_and" |
278 | case 'r': // 1 string to match. |
279 | if (memcmp(RuleIdentifier.data()+1, "cp_sqrt_to_rsq", 14) != 0) |
280 | break; |
281 | return 117; // "rcp_sqrt_to_rsq" |
282 | case 's': // 1 string to match. |
283 | if (memcmp(RuleIdentifier.data()+1, "elect_same_val", 14) != 0) |
284 | break; |
285 | return 23; // "select_same_val" |
286 | case 'z': // 1 string to match. |
287 | if (memcmp(RuleIdentifier.data()+1, "ext_trunc_fold", 14) != 0) |
288 | break; |
289 | return 56; // "zext_trunc_fold" |
290 | } |
291 | break; |
292 | case 16: // 3 strings to match. |
293 | switch (RuleIdentifier[0]) { |
294 | default: break; |
295 | case 's': // 2 strings to match. |
296 | if (memcmp(RuleIdentifier.data()+1, "elect_", 6) != 0) |
297 | break; |
298 | switch (RuleIdentifier[7]) { |
299 | default: break; |
300 | case 't': // 1 string to match. |
301 | if (memcmp(RuleIdentifier.data()+8, "o_minmax", 8) != 0) |
302 | break; |
303 | return 108; // "select_to_minmax" |
304 | case 'u': // 1 string to match. |
305 | if (memcmp(RuleIdentifier.data()+8, "ndef_cmp", 8) != 0) |
306 | break; |
307 | return 49; // "select_undef_cmp" |
308 | } |
309 | break; |
310 | case 'u': // 1 string to match. |
311 | if (memcmp(RuleIdentifier.data()+1, "ndef_to_fp_zero", 15) != 0) |
312 | break; |
313 | return 11; // "undef_to_fp_zero" |
314 | } |
315 | break; |
316 | case 17: // 9 strings to match. |
317 | switch (RuleIdentifier[0]) { |
318 | default: break; |
319 | case 'a': // 2 strings to match. |
320 | switch (RuleIdentifier[1]) { |
321 | default: break; |
322 | case 'd': // 1 string to match. |
323 | if (memcmp(RuleIdentifier.data()+2, "d_p2i_to_ptradd", 15) != 0) |
324 | break; |
325 | return 2; // "add_p2i_to_ptradd" |
326 | case 'n': // 1 string to match. |
327 | if (memcmp(RuleIdentifier.data()+2, "yext_trunc_fold", 15) != 0) |
328 | break; |
329 | return 30; // "anyext_trunc_fold" |
330 | } |
331 | break; |
332 | case 'd': // 1 string to match. |
333 | if (memcmp(RuleIdentifier.data()+1, "iv_rem_to_divrem", 16) != 0) |
334 | break; |
335 | return 83; // "div_rem_to_divrem" |
336 | case 'e': // 1 string to match. |
337 | if (memcmp(RuleIdentifier.data()+1, "rase_undef_store", 16) != 0) |
338 | break; |
339 | return 20; // "erase_undef_store" |
340 | case 'p': // 1 string to match. |
341 | if (memcmp(RuleIdentifier.data()+1, "tr_add_with_zero", 16) != 0) |
342 | break; |
343 | return 79; // "ptr_add_with_zero" |
344 | case 's': // 2 strings to match. |
345 | switch (RuleIdentifier[1]) { |
346 | default: break; |
347 | case 'e': // 1 string to match. |
348 | if (memcmp(RuleIdentifier.data()+2, "lect_to_logical", 15) != 0) |
349 | break; |
350 | return 51; // "select_to_logical" |
351 | case 'h': // 1 string to match. |
352 | if (memcmp(RuleIdentifier.data()+2, "ift_immed_chain", 15) != 0) |
353 | break; |
354 | return 80; // "shift_immed_chain" |
355 | } |
356 | break; |
357 | case 'u': // 2 strings to match. |
358 | switch (RuleIdentifier[1]) { |
359 | default: break; |
360 | case 'n': // 1 string to match. |
361 | if (memcmp(RuleIdentifier.data()+2, "def_to_int_zero", 15) != 0) |
362 | break; |
363 | return 12; // "undef_to_int_zero" |
364 | case 'r': // 1 string to match. |
365 | if (memcmp(RuleIdentifier.data()+2, "em_pow2_to_mask", 15) != 0) |
366 | break; |
367 | return 55; // "urem_pow2_to_mask" |
368 | } |
369 | break; |
370 | } |
371 | break; |
372 | case 18: // 5 strings to match. |
373 | switch (RuleIdentifier[0]) { |
374 | default: break; |
375 | case 'b': // 1 string to match. |
376 | if (memcmp(RuleIdentifier.data()+1, "inop_left_to_zero", 17) != 0) |
377 | break; |
378 | return 26; // "binop_left_to_zero" |
379 | case 'c': // 1 string to match. |
380 | if (memcmp(RuleIdentifier.data()+1, "ombine_minmax_nan", 17) != 0) |
381 | break; |
382 | return 77; // "combine_minmax_nan" |
383 | case 'f': // 1 string to match. |
384 | if (memcmp(RuleIdentifier.data()+1, "ptrunc_fpext_fold", 17) != 0) |
385 | break; |
386 | return 38; // "fptrunc_fpext_fold" |
387 | case 'r': // 1 string to match. |
388 | if (memcmp(RuleIdentifier.data()+1, "ight_identity_one", 17) != 0) |
389 | break; |
390 | return 32; // "right_identity_one" |
391 | case 's': // 1 string to match. |
392 | if (memcmp(RuleIdentifier.data()+1, "ext_inreg_of_load", 17) != 0) |
393 | break; |
394 | return 46; // "sext_inreg_of_load" |
395 | } |
396 | break; |
397 | case 19: // 8 strings to match. |
398 | switch (RuleIdentifier[0]) { |
399 | default: break; |
400 | case 'b': // 1 string to match. |
401 | if (memcmp(RuleIdentifier.data()+1, "inop_right_to_zero", 18) != 0) |
402 | break; |
403 | return 27; // "binop_right_to_zero" |
404 | case 'c': // 1 string to match. |
405 | if (memcmp(RuleIdentifier.data()+1, "onst_ptradd_to_i2p", 18) != 0) |
406 | break; |
407 | return 71; // "const_ptradd_to_i2p" |
408 | case 'e': // 1 string to match. |
409 | if (memcmp(RuleIdentifier.data()+1, "xtend_through_phis", 18) != 0) |
410 | break; |
411 | return 39; // "extend_through_phis" |
412 | case 'p': // 1 string to match. |
413 | if (memcmp(RuleIdentifier.data()+1, "tr_add_immed_chain", 18) != 0) |
414 | break; |
415 | return 44; // "ptr_add_immed_chain" |
416 | case 'r': // 1 string to match. |
417 | if (memcmp(RuleIdentifier.data()+1, "ight_identity_zero", 18) != 0) |
418 | break; |
419 | return 24; // "right_identity_zero" |
420 | case 's': // 2 strings to match. |
421 | switch (RuleIdentifier[1]) { |
422 | default: break; |
423 | case 'e': // 1 string to match. |
424 | if (memcmp(RuleIdentifier.data()+2, "lect_constant_cmp", 17) != 0) |
425 | break; |
426 | return 50; // "select_constant_cmp" |
427 | case 'i': // 1 string to match. |
428 | if (memcmp(RuleIdentifier.data()+2, "mplify_add_to_sub", 17) != 0) |
429 | break; |
430 | return 40; // "simplify_add_to_sub" |
431 | } |
432 | break; |
433 | case 'u': // 1 string to match. |
434 | if (memcmp(RuleIdentifier.data()+1, "nary_undef_to_zero", 18) != 0) |
435 | break; |
436 | return 16; // "unary_undef_to_zero" |
437 | } |
438 | break; |
439 | case 20: // 6 strings to match. |
440 | switch (RuleIdentifier[0]) { |
441 | default: break; |
442 | case 'a': // 1 string to match. |
443 | if (memcmp(RuleIdentifier.data()+1, "nd_or_disjoint_mask", 19) != 0) |
444 | break; |
445 | return 97; // "and_or_disjoint_mask" |
446 | case 'b': // 1 string to match. |
447 | if (memcmp(RuleIdentifier.data()+1, "itcast_bitcast_fold", 19) != 0) |
448 | break; |
449 | return 37; // "bitcast_bitcast_fold" |
450 | case 'r': // 3 strings to match. |
451 | if (RuleIdentifier[1] != 'e') |
452 | break; |
453 | switch (RuleIdentifier[2]) { |
454 | default: break; |
455 | case 'd': // 2 strings to match. |
456 | if (RuleIdentifier[3] != 'u') |
457 | break; |
458 | switch (RuleIdentifier[4]) { |
459 | default: break; |
460 | case 'c': // 1 string to match. |
461 | if (memcmp(RuleIdentifier.data()+5, "e_shl_of_extend", 15) != 0) |
462 | break; |
463 | return 47; // "reduce_shl_of_extend" |
464 | case 'n': // 1 string to match. |
465 | if (memcmp(RuleIdentifier.data()+5, "dant_sext_inreg", 15) != 0) |
466 | break; |
467 | return 53; // "redundant_sext_inreg" |
468 | } |
469 | break; |
470 | case 'm': // 1 string to match. |
471 | if (memcmp(RuleIdentifier.data()+3, "ove_fcanonicalize", 17) != 0) |
472 | break; |
473 | return 115; // "remove_fcanonicalize" |
474 | } |
475 | break; |
476 | case 'u': // 1 string to match. |
477 | if (memcmp(RuleIdentifier.data()+1, "nmerge_zext_to_zext", 19) != 0) |
478 | break; |
479 | return 66; // "unmerge_zext_to_zext" |
480 | } |
481 | break; |
482 | case 21: // 3 strings to match. |
483 | switch (RuleIdentifier[0]) { |
484 | default: break; |
485 | case 's': // 1 string to match. |
486 | if (memcmp(RuleIdentifier.data()+1, "ign_extension_in_reg", 20) != 0) |
487 | break; |
488 | return 118; // "sign_extension_in_reg" |
489 | case 'u': // 2 strings to match. |
490 | if (RuleIdentifier[1] != 'n') |
491 | break; |
492 | switch (RuleIdentifier[2]) { |
493 | default: break; |
494 | case 'd': // 1 string to match. |
495 | if (memcmp(RuleIdentifier.data()+3, "ef_to_negative_one", 18) != 0) |
496 | break; |
497 | return 13; // "undef_to_negative_one" |
498 | case 'm': // 1 string to match. |
499 | if (memcmp(RuleIdentifier.data()+3, "erge_dead_to_trunc", 18) != 0) |
500 | break; |
501 | return 65; // "unmerge_dead_to_trunc" |
502 | } |
503 | break; |
504 | } |
505 | break; |
506 | case 22: // 7 strings to match. |
507 | switch (RuleIdentifier[0]) { |
508 | default: break; |
509 | case 'f': // 2 strings to match. |
510 | switch (RuleIdentifier[1]) { |
511 | default: break; |
512 | case 'o': // 1 string to match. |
513 | if (memcmp(RuleIdentifier.data()+2, "ld_binop_into_select", 20) != 0) |
514 | break; |
515 | return 106; // "fold_binop_into_select" |
516 | case 'u': // 1 string to match. |
517 | if (memcmp(RuleIdentifier.data()+2, "nnel_shift_to_rotate", 20) != 0) |
518 | break; |
519 | return 85; // "funnel_shift_to_rotate" |
520 | } |
521 | break; |
522 | case 'i': // 1 string to match. |
523 | if (memcmp(RuleIdentifier.data()+1, "cmp_to_lhs_known_bits", 21) != 0) |
524 | break; |
525 | return 58; // "icmp_to_lhs_known_bits" |
526 | case 'p': // 1 string to match. |
527 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_any_op", 21) != 0) |
528 | break; |
529 | return 17; // "propagate_undef_any_op" |
530 | case 'r': // 1 string to match. |
531 | if (memcmp(RuleIdentifier.data()+1, "edundant_neg_operands", 21) != 0) |
532 | break; |
533 | return 96; // "redundant_neg_operands" |
534 | case 's': // 1 string to match. |
535 | if (memcmp(RuleIdentifier.data()+1, "hl_ashr_to_sext_inreg", 21) != 0) |
536 | break; |
537 | return 45; // "shl_ashr_to_sext_inreg" |
538 | case 't': // 1 string to match. |
539 | if (memcmp(RuleIdentifier.data()+1, "runc_buildvector_fold", 21) != 0) |
540 | break; |
541 | return 35; // "trunc_buildvector_fold" |
542 | } |
543 | break; |
544 | case 23: // 2 strings to match. |
545 | switch (RuleIdentifier[0]) { |
546 | default: break; |
547 | case 'c': // 1 string to match. |
548 | if (memcmp(RuleIdentifier.data()+1, "ommute_constant_to_rhs", 22) != 0) |
549 | break; |
550 | return 111; // "commute_constant_to_rhs" |
551 | case 'p': // 1 string to match. |
552 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_all_ops", 22) != 0) |
553 | break; |
554 | return 18; // "propagate_undef_all_ops" |
555 | } |
556 | break; |
557 | case 24: // 4 strings to match. |
558 | switch (RuleIdentifier[0]) { |
559 | default: break; |
560 | case 'b': // 1 string to match. |
561 | if (memcmp(RuleIdentifier.data()+1, "inop_left_undef_to_zero", 23) != 0) |
562 | break; |
563 | return 14; // "binop_left_undef_to_zero" |
564 | case 'n': // 1 string to match. |
565 | if (memcmp(RuleIdentifier.data()+1, "arrow_binop_feeding_and", 23) != 0) |
566 | break; |
567 | return 48; // "narrow_binop_feeding_and" |
568 | case 's': // 1 string to match. |
569 | if (memcmp(RuleIdentifier.data()+1, "ext_inreg_to_zext_inreg", 23) != 0) |
570 | break; |
571 | return 59; // "sext_inreg_to_zext_inreg" |
572 | case 'x': // 1 string to match. |
573 | if (memcmp(RuleIdentifier.data()+1, "or_of_and_with_same_reg", 23) != 0) |
574 | break; |
575 | return 78; // "xor_of_and_with_same_reg" |
576 | } |
577 | break; |
578 | case 25: // 4 strings to match. |
579 | switch (RuleIdentifier[0]) { |
580 | default: break; |
581 | case 'b': // 3 strings to match. |
582 | switch (RuleIdentifier[1]) { |
583 | default: break; |
584 | case 'i': // 2 strings to match. |
585 | if (memcmp(RuleIdentifier.data()+2, "tfield_extract_from_", 20) != 0) |
586 | break; |
587 | switch (RuleIdentifier[22]) { |
588 | default: break; |
589 | case 'a': // 1 string to match. |
590 | if (memcmp(RuleIdentifier.data()+23, "nd", 2) != 0) |
591 | break; |
592 | return 88; // "bitfield_extract_from_and" |
593 | case 's': // 1 string to match. |
594 | if (memcmp(RuleIdentifier.data()+23, "hr", 2) != 0) |
595 | break; |
596 | return 89; // "bitfield_extract_from_shr" |
597 | } |
598 | break; |
599 | case 'u': // 1 string to match. |
600 | if (memcmp(RuleIdentifier.data()+2, "ildvector_identity_fold", 23) != 0) |
601 | break; |
602 | return 34; // "buildvector_identity_fold" |
603 | } |
604 | break; |
605 | case 'e': // 1 string to match. |
606 | if (memcmp(RuleIdentifier.data()+1, "xtract_vec_elt_build_vec", 24) != 0) |
607 | break; |
608 | return 6; // "extract_vec_elt_build_vec" |
609 | } |
610 | break; |
611 | case 26: // 3 strings to match. |
612 | switch (RuleIdentifier[0]) { |
613 | default: break; |
614 | case 'b': // 1 string to match. |
615 | if (memcmp(RuleIdentifier.data()+1, "inop_right_undef_to_undef", 25) != 0) |
616 | break; |
617 | return 15; // "binop_right_undef_to_undef" |
618 | case 'c': // 1 string to match. |
619 | if (memcmp(RuleIdentifier.data()+1, "ombine_indexed_load_store", 25) != 0) |
620 | break; |
621 | return 10; // "combine_indexed_load_store" |
622 | case 'f': // 1 string to match. |
623 | if (memcmp(RuleIdentifier.data()+1, "unnel_shift_from_or_shift", 25) != 0) |
624 | break; |
625 | return 84; // "funnel_shift_from_or_shift" |
626 | } |
627 | break; |
628 | case 27: // 2 strings to match. |
629 | switch (RuleIdentifier[0]) { |
630 | default: break; |
631 | case 'r': // 1 string to match. |
632 | if (memcmp(RuleIdentifier.data()+1, "edundant_binop_in_equality", 26) != 0) |
633 | break; |
634 | return 109; // "redundant_binop_in_equality" |
635 | case 't': // 1 string to match. |
636 | if (memcmp(RuleIdentifier.data()+1, "runc_lshr_buildvector_fold", 26) != 0) |
637 | break; |
638 | return 36; // "trunc_lshr_buildvector_fold" |
639 | } |
640 | break; |
641 | case 28: // 3 strings to match. |
642 | switch (RuleIdentifier[0]) { |
643 | default: break; |
644 | case 'o': // 1 string to match. |
645 | if (memcmp(RuleIdentifier.data()+1, "pt_brcond_by_inverting_cond", 27) != 0) |
646 | break; |
647 | return 62; // "opt_brcond_by_inverting_cond" |
648 | case 'p': // 1 string to match. |
649 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_shuffle_mask", 27) != 0) |
650 | break; |
651 | return 19; // "propagate_undef_shuffle_mask" |
652 | case 's': // 1 string to match. |
653 | if (memcmp(RuleIdentifier.data()+1, "hift_of_shifted_logic_chain", 27) != 0) |
654 | break; |
655 | return 81; // "shift_of_shifted_logic_chain" |
656 | } |
657 | break; |
658 | case 29: // 2 strings to match. |
659 | switch (RuleIdentifier[0]) { |
660 | default: break; |
661 | case 'b': // 1 string to match. |
662 | if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_shr_and", 28) != 0) |
663 | break; |
664 | return 90; // "bitfield_extract_from_shr_and" |
665 | case 'i': // 1 string to match. |
666 | if (memcmp(RuleIdentifier.data()+1, "cmp_to_true_false_known_bits", 28) != 0) |
667 | break; |
668 | return 57; // "icmp_to_true_false_known_bits" |
669 | } |
670 | break; |
671 | case 31: // 1 string to match. |
672 | if (memcmp(RuleIdentifier.data()+0, "fcmp_select_to_fmin_fmax_legacy", 31) != 0) |
673 | break; |
674 | return 112; // "fcmp_select_to_fmin_fmax_legacy" |
675 | case 32: // 3 strings to match. |
676 | switch (RuleIdentifier[0]) { |
677 | default: break; |
678 | case 'b': // 1 string to match. |
679 | if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_sext_inreg", 31) != 0) |
680 | break; |
681 | return 87; // "bitfield_extract_from_sext_inreg" |
682 | case 'c': // 2 strings to match. |
683 | if (memcmp(RuleIdentifier.data()+1, "ombine_f", 8) != 0) |
684 | break; |
685 | switch (RuleIdentifier[9]) { |
686 | default: break; |
687 | case 'a': // 1 string to match. |
688 | if (memcmp(RuleIdentifier.data()+10, "dd_fmul_to_fmad_or_fma", 22) != 0) |
689 | break; |
690 | return 98; // "combine_fadd_fmul_to_fmad_or_fma" |
691 | case 's': // 1 string to match. |
692 | if (memcmp(RuleIdentifier.data()+10, "ub_fmul_to_fmad_or_fma", 22) != 0) |
693 | break; |
694 | return 102; // "combine_fsub_fmul_to_fmad_or_fma" |
695 | } |
696 | break; |
697 | } |
698 | break; |
699 | case 34: // 1 string to match. |
700 | if (memcmp(RuleIdentifier.data()+0, "extract_all_elts_from_build_vector", 34) != 0) |
701 | break; |
702 | return 7; // "extract_all_elts_from_build_vector" |
703 | case 36: // 3 strings to match. |
704 | switch (RuleIdentifier[0]) { |
705 | default: break; |
706 | case 'c': // 2 strings to match. |
707 | if (memcmp(RuleIdentifier.data()+1, "ombine_", 7) != 0) |
708 | break; |
709 | switch (RuleIdentifier[8]) { |
710 | default: break; |
711 | case 'f': // 1 string to match. |
712 | if (memcmp(RuleIdentifier.data()+9, "add_fma_fmul_to_fmad_or_fma", 27) != 0) |
713 | break; |
714 | return 100; // "combine_fadd_fma_fmul_to_fmad_or_fma" |
715 | case 'i': // 1 string to match. |
716 | if (memcmp(RuleIdentifier.data()+9, "nsert_vec_elts_build_vector", 27) != 0) |
717 | break; |
718 | return 5; // "combine_insert_vec_elts_build_vector" |
719 | } |
720 | break; |
721 | case 'i': // 1 string to match. |
722 | if (memcmp(RuleIdentifier.data()+1, "nsert_extract_vec_elt_out_of_bounds", 35) != 0) |
723 | break; |
724 | return 22; // "insert_extract_vec_elt_out_of_bounds" |
725 | } |
726 | break; |
727 | case 37: // 2 strings to match. |
728 | switch (RuleIdentifier[0]) { |
729 | default: break; |
730 | case 'c': // 1 string to match. |
731 | if (memcmp(RuleIdentifier.data()+1, "ombine_fsub_fneg_fmul_to_fmad_or_fma", 36) != 0) |
732 | break; |
733 | return 103; // "combine_fsub_fneg_fmul_to_fmad_or_fma" |
734 | case 'h': // 1 string to match. |
735 | if (memcmp(RuleIdentifier.data()+1, "oist_logic_op_with_same_opcode_hands", 36) != 0) |
736 | break; |
737 | return 41; // "hoist_logic_op_with_same_opcode_hands" |
738 | } |
739 | break; |
740 | case 38: // 2 strings to match. |
741 | if (memcmp(RuleIdentifier.data()+0, "combine_f", 9) != 0) |
742 | break; |
743 | switch (RuleIdentifier[9]) { |
744 | default: break; |
745 | case 'a': // 1 string to match. |
746 | if (memcmp(RuleIdentifier.data()+10, "dd_fpext_fmul_to_fmad_or_fma", 28) != 0) |
747 | break; |
748 | return 99; // "combine_fadd_fpext_fmul_to_fmad_or_fma" |
749 | case 's': // 1 string to match. |
750 | if (memcmp(RuleIdentifier.data()+10, "ub_fpext_fmul_to_fmad_or_fma", 28) != 0) |
751 | break; |
752 | return 104; // "combine_fsub_fpext_fmul_to_fmad_or_fma" |
753 | } |
754 | break; |
755 | case 42: // 1 string to match. |
756 | if (memcmp(RuleIdentifier.data()+0, "combine_fadd_fpext_fma_fmul_to_fmad_or_fma", 42) != 0) |
757 | break; |
758 | return 101; // "combine_fadd_fpext_fma_fmul_to_fmad_or_fma" |
759 | case 43: // 1 string to match. |
760 | if (memcmp(RuleIdentifier.data()+0, "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma", 43) != 0) |
761 | break; |
762 | return 105; // "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma" |
763 | } |
764 | #endif // ifndef NDEBUG |
765 | |
766 | return std::nullopt; |
767 | } |
768 | static std::optional<std::pair<uint64_t, uint64_t>> getRuleRangeForIdentifier(StringRef RuleIdentifier) { |
769 | std::pair<StringRef, StringRef> RangePair = RuleIdentifier.split('-'); |
770 | if (!RangePair.second.empty()) { |
771 | const auto First = getRuleIdxForIdentifier(RangePair.first); |
772 | const auto Last = getRuleIdxForIdentifier(RangePair.second); |
773 | if (!First || !Last) |
774 | return std::nullopt; |
775 | if (First >= Last) |
776 | report_fatal_error("Beginning of range should be before end of range"); |
777 | return {{*First, *Last + 1}}; |
778 | } |
779 | if (RangePair.first == "*") { |
780 | return {{0, 119}}; |
781 | } |
782 | const auto I = getRuleIdxForIdentifier(RangePair.first); |
783 | if (!I) |
784 | return std::nullopt; |
785 | return {{*I, *I + 1}}; |
786 | } |
787 | |
788 | bool AMDGPUGenPostLegalizerCombinerHelperRuleConfig::setRuleEnabled(StringRef RuleIdentifier) { |
789 | auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier); |
790 | if (!MaybeRange) |
791 | return false; |
792 | for (auto I = MaybeRange->first; I < MaybeRange->second; ++I) |
793 | DisabledRules.reset(I); |
794 | return true; |
795 | } |
796 | |
797 | bool AMDGPUGenPostLegalizerCombinerHelperRuleConfig::setRuleDisabled(StringRef RuleIdentifier) { |
798 | auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier); |
799 | if (!MaybeRange) |
800 | return false; |
801 | for (auto I = MaybeRange->first; I < MaybeRange->second; ++I) |
802 | DisabledRules.set(I); |
803 | return true; |
804 | } |
805 | |
806 | bool AMDGPUGenPostLegalizerCombinerHelperRuleConfig::isRuleDisabled(unsigned RuleID) const { |
807 | return DisabledRules.test(RuleID); |
808 | } |
809 | #endif // ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H |
810 | |
811 | #ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP |
812 | |
813 | std::vector<std::string> AMDGPUPostLegalizerCombinerHelperOption; |
814 | cl::list<std::string> AMDGPUPostLegalizerCombinerHelperDisableOption( |
815 | "amdgpupostlegalizercombinerhelper-disable-rule", |
816 | cl::desc("Disable one or more combiner rules temporarily in the AMDGPUPostLegalizerCombinerHelper pass"), |
817 | cl::CommaSeparated, |
818 | cl::Hidden, |
819 | cl::cat(GICombinerOptionCategory), |
820 | cl::callback([](const std::string &Str) { |
821 | AMDGPUPostLegalizerCombinerHelperOption.push_back(Str); |
822 | })); |
823 | cl::list<std::string> AMDGPUPostLegalizerCombinerHelperOnlyEnableOption( |
824 | "amdgpupostlegalizercombinerhelper-only-enable-rule", |
825 | cl::desc("Disable all rules in the AMDGPUPostLegalizerCombinerHelper pass then re-enable the specified ones"), |
826 | cl::Hidden, |
827 | cl::cat(GICombinerOptionCategory), |
828 | cl::callback([](const std::string &CommaSeparatedArg) { |
829 | StringRef Str = CommaSeparatedArg; |
830 | AMDGPUPostLegalizerCombinerHelperOption.push_back("*"); |
831 | do { |
832 | auto X = Str.split(","); |
833 | AMDGPUPostLegalizerCombinerHelperOption.push_back(("!" + X.first).str()); |
834 | Str = X.second; |
835 | } while (!Str.empty()); |
836 | })); |
837 | |
838 | bool AMDGPUGenPostLegalizerCombinerHelperRuleConfig::parseCommandLineOption() { |
839 | for (StringRef Identifier : AMDGPUPostLegalizerCombinerHelperOption) { |
840 | bool Enabled = Identifier.consume_front("!"); |
841 | if (Enabled && !setRuleEnabled(Identifier)) |
842 | return false; |
843 | if (!Enabled && !setRuleDisabled(Identifier)) |
844 | return false; |
845 | } |
846 | return true; |
847 | } |
848 | |
849 | bool AMDGPUGenPostLegalizerCombinerHelper::tryCombineAll( |
850 | GISelChangeObserver &Observer, |
851 | MachineInstr &MI, |
852 | MachineIRBuilder &B) const { |
853 | MachineBasicBlock *MBB = MI.getParent(); |
854 | MachineFunction *MF = MBB->getParent(); |
855 | MachineRegisterInfo &MRI = MF->getRegInfo(); |
856 | SmallVector<MachineInstr *, 8> MIs = {&MI}; |
857 | |
858 | (void)MBB; (void)MF; (void)MRI; (void)RuleConfig; |
859 | |
860 | // Match data |
861 | unsigned MatchData1; |
862 | std::pair<Register, bool> MatchData2; |
863 | SmallVector<Register, 4> MatchData5; |
864 | Register MatchData6; |
865 | SmallVector<std::pair<Register, MachineInstr*>> MatchData7; |
866 | PreferredTuple MatchData8; |
867 | std::function<void(MachineIRBuilder &)> MatchData9; |
868 | IndexedLoadStoreMatchInfo MatchData10; |
869 | std::function<void(MachineIRBuilder &)> MatchData21; |
870 | Register MatchData28; |
871 | Register MatchData29; |
872 | Register MatchData30; |
873 | Register MatchData31; |
874 | Register MatchData33; |
875 | Register MatchData34; |
876 | Register MatchData35; |
877 | Register MatchData36; |
878 | MachineInstr* MatchData39; |
879 | std::tuple<Register, Register> MatchData40; |
880 | InstructionStepsMatchInfo MatchData41; |
881 | std::function<void(MachineIRBuilder &)> MatchData43; |
882 | PtrAddChain MatchData44; |
883 | std::tuple<Register, int64_t> MatchData45; |
884 | std::tuple<Register, unsigned> MatchData46; |
885 | RegisterImmPair MatchData47; |
886 | std::function<void(MachineIRBuilder &)> MatchData48; |
887 | unsigned MatchData50; |
888 | std::function<void(MachineIRBuilder &)> MatchData51; |
889 | Register MatchData52; |
890 | Register MatchData54; |
891 | Register MatchData56; |
892 | int64_t MatchData57; |
893 | std::function<void(MachineIRBuilder &)> MatchData58; |
894 | std::tuple<Register, unsigned> MatchData60; |
895 | SmallVector<Register, 4> MatchData61; |
896 | MachineInstr * MatchData62; |
897 | SmallVector<Register, 8> MatchData63; |
898 | SmallVector<APInt, 8> MatchData64; |
899 | Register MatchData67; |
900 | std::pair<Register, unsigned> MatchData68; |
901 | std::pair<MachineInstr*, LLT> MatchData69; |
902 | std::optional<APFloat> MatchData70; |
903 | APInt MatchData71; |
904 | std::function<void(MachineIRBuilder &)> MatchData72; |
905 | std::function<void(MachineIRBuilder &)> MatchData73; |
906 | std::function<void(MachineIRBuilder &)> MatchData74; |
907 | std::function<void(MachineIRBuilder &)> MatchData75; |
908 | std::function<void(MachineIRBuilder &)> MatchData76; |
909 | unsigned MatchData77; |
910 | std::pair<Register, Register> MatchData78; |
911 | RegisterImmPair MatchData80; |
912 | ShiftOfShiftedLogic MatchData81; |
913 | std::function<void(MachineIRBuilder &)> MatchData82; |
914 | MachineInstr * MatchData83; |
915 | std::function<void(MachineIRBuilder &)> MatchData84; |
916 | std::function<void(MachineIRBuilder &)> MatchData86; |
917 | std::function<void(MachineIRBuilder &)> MatchData87; |
918 | std::function<void(MachineIRBuilder &)> MatchData88; |
919 | std::function<void(MachineIRBuilder &)> MatchData89; |
920 | std::function<void(MachineIRBuilder &)> MatchData90; |
921 | APInt MatchData91; |
922 | std::function<void(MachineIRBuilder &)> MatchData92; |
923 | std::function<void(MachineIRBuilder &)> MatchData96; |
924 | std::function<void(MachineIRBuilder &)> MatchData97; |
925 | std::function<void(MachineIRBuilder &)> MatchData98; |
926 | std::function<void(MachineIRBuilder &)> MatchData99; |
927 | std::function<void(MachineIRBuilder &)> MatchData100; |
928 | std::function<void(MachineIRBuilder &)> MatchData101; |
929 | std::function<void(MachineIRBuilder &)> MatchData102; |
930 | std::function<void(MachineIRBuilder &)> MatchData103; |
931 | std::function<void(MachineIRBuilder &)> MatchData104; |
932 | std::function<void(MachineIRBuilder &)> MatchData105; |
933 | unsigned MatchData106; |
934 | std::function<void(MachineIRBuilder &)> MatchData107; |
935 | std::function<void(MachineIRBuilder &)> MatchData108; |
936 | std::function<void(MachineIRBuilder &)> MatchData109; |
937 | Register MatchData110; |
938 | AMDGPUPostLegalizerCombinerHelper::FMinFMaxLegacyInfo MatchData112; |
939 | AMDGPUPostLegalizerCombinerHelper::CvtF32UByteMatchInfo MatchData114; |
940 | Register MatchData115; |
941 | MachineInstr * MatchData116; |
942 | std::function<void(MachineIRBuilder &)> MatchData117; |
943 | MachineInstr * MatchData118; |
944 | |
945 | int Partition = -1; |
946 | Partition = -1; |
947 | switch (MIs[0]->getOpcode()) { |
948 | case TargetOpcode::COPY: Partition = 0; break; |
949 | case TargetOpcode::G_MUL: Partition = 1; break; |
950 | case TargetOpcode::G_ADD: Partition = 2; break; |
951 | case TargetOpcode::G_FREEZE: Partition = 3; break; |
952 | case TargetOpcode::G_FABS: Partition = 4; break; |
953 | case TargetOpcode::G_FCANONICALIZE: Partition = 5; break; |
954 | case TargetOpcode::G_INSERT_VECTOR_ELT: Partition = 6; break; |
955 | case TargetOpcode::G_EXTRACT_VECTOR_ELT: Partition = 7; break; |
956 | case TargetOpcode::G_BUILD_VECTOR: Partition = 8; break; |
957 | case TargetOpcode::G_LOAD: Partition = 9; break; |
958 | case TargetOpcode::G_SEXTLOAD: Partition = 10; break; |
959 | case TargetOpcode::G_ZEXTLOAD: Partition = 11; break; |
960 | case TargetOpcode::G_AND: Partition = 12; break; |
961 | case TargetOpcode::G_STORE: Partition = 13; break; |
962 | case TargetOpcode::G_UITOFP: Partition = 14; break; |
963 | case TargetOpcode::G_SITOFP: Partition = 15; break; |
964 | case TargetOpcode::G_OR: Partition = 16; break; |
965 | case TargetOpcode::G_SHL: Partition = 17; break; |
966 | case TargetOpcode::G_UDIV: Partition = 18; break; |
967 | case TargetOpcode::G_UREM: Partition = 19; break; |
968 | case TargetOpcode::G_ASHR: Partition = 20; break; |
969 | case TargetOpcode::G_LSHR: Partition = 21; break; |
970 | case TargetOpcode::G_ABS: Partition = 22; break; |
971 | case TargetOpcode::G_FPTOSI: Partition = 23; break; |
972 | case TargetOpcode::G_FPTOUI: Partition = 24; break; |
973 | case TargetOpcode::G_SUB: Partition = 25; break; |
974 | case TargetOpcode::G_XOR: Partition = 26; break; |
975 | case TargetOpcode::G_TRUNC: Partition = 27; break; |
976 | case TargetOpcode::G_SHUFFLE_VECTOR: Partition = 28; break; |
977 | case TargetOpcode::G_UNMERGE_VALUES: Partition = 29; break; |
978 | case TargetOpcode::G_SELECT: Partition = 30; break; |
979 | case TargetOpcode::G_PTR_ADD: Partition = 31; break; |
980 | case TargetOpcode::G_ROTL: Partition = 32; break; |
981 | case TargetOpcode::G_ROTR: Partition = 33; break; |
982 | case TargetOpcode::G_SDIV: Partition = 34; break; |
983 | case TargetOpcode::G_SREM: Partition = 35; break; |
984 | case TargetOpcode::G_INTTOPTR: Partition = 36; break; |
985 | case TargetOpcode::G_PTRTOINT: Partition = 37; break; |
986 | case TargetOpcode::G_ANYEXT: Partition = 38; break; |
987 | case TargetOpcode::G_FNEG: Partition = 39; break; |
988 | case TargetOpcode::G_BUILD_VECTOR_TRUNC: Partition = 40; break; |
989 | case TargetOpcode::G_BITCAST: Partition = 41; break; |
990 | case TargetOpcode::G_FPTRUNC: Partition = 42; break; |
991 | case TargetOpcode::G_PHI: Partition = 43; break; |
992 | case TargetOpcode::G_SEXT_INREG: Partition = 44; break; |
993 | case TargetOpcode::G_ZEXT: Partition = 45; break; |
994 | case TargetOpcode::G_ICMP: Partition = 46; break; |
995 | case TargetOpcode::G_SEXT: Partition = 47; break; |
996 | case TargetOpcode::G_BR: Partition = 48; break; |
997 | case TargetOpcode::G_MERGE_VALUES: Partition = 49; break; |
998 | case TargetOpcode::G_FSQRT: Partition = 50; break; |
999 | case TargetOpcode::G_FLOG2: Partition = 51; break; |
1000 | case TargetOpcode::G_UMULO: Partition = 52; break; |
1001 | case TargetOpcode::G_SMULO: Partition = 53; break; |
1002 | case TargetOpcode::G_UADDO: Partition = 54; break; |
1003 | case TargetOpcode::G_SADDO: Partition = 55; break; |
1004 | case TargetOpcode::G_UADDE: Partition = 56; break; |
1005 | case TargetOpcode::G_SADDE: Partition = 57; break; |
1006 | case TargetOpcode::G_USUBE: Partition = 58; break; |
1007 | case TargetOpcode::G_SSUBE: Partition = 59; break; |
1008 | case TargetOpcode::G_FMINNUM: Partition = 60; break; |
1009 | case TargetOpcode::G_FMAXNUM: Partition = 61; break; |
1010 | case TargetOpcode::G_FMINIMUM: Partition = 62; break; |
1011 | case TargetOpcode::G_FMAXIMUM: Partition = 63; break; |
1012 | case TargetOpcode::G_SSHLSAT: Partition = 64; break; |
1013 | case TargetOpcode::G_USHLSAT: Partition = 65; break; |
1014 | case TargetOpcode::G_FSHL: Partition = 66; break; |
1015 | case TargetOpcode::G_FSHR: Partition = 67; break; |
1016 | case TargetOpcode::G_UMULH: Partition = 68; break; |
1017 | case TargetOpcode::G_FADD: Partition = 69; break; |
1018 | case TargetOpcode::G_FSUB: Partition = 70; break; |
1019 | case TargetOpcode::G_FMUL: Partition = 71; break; |
1020 | case TargetOpcode::G_FDIV: Partition = 72; break; |
1021 | case TargetOpcode::G_FMAD: Partition = 73; break; |
1022 | case TargetOpcode::G_FMA: Partition = 74; break; |
1023 | case TargetOpcode::G_SMIN: Partition = 75; break; |
1024 | case TargetOpcode::G_SMAX: Partition = 76; break; |
1025 | case TargetOpcode::G_UMIN: Partition = 77; break; |
1026 | case TargetOpcode::G_UMAX: Partition = 78; break; |
1027 | case TargetOpcode::G_FREM: Partition = 79; break; |
1028 | case AMDGPU::G_AMDGPU_CVT_F32_UBYTE0: Partition = 80; break; |
1029 | case AMDGPU::G_AMDGPU_CVT_F32_UBYTE1: Partition = 81; break; |
1030 | case AMDGPU::G_AMDGPU_CVT_F32_UBYTE2: Partition = 82; break; |
1031 | case AMDGPU::G_AMDGPU_CVT_F32_UBYTE3: Partition = 83; break; |
1032 | case TargetOpcode::G_INTRINSIC: Partition = 84; break; |
1033 | } |
1034 | // Default case but without conflicting with potential default case in selection. |
1035 | if (Partition == -1) return false; |
1036 | if (Partition == 0 /* TargetOpcode::COPY */) { |
1037 | // Leaf name: copy_prop |
1038 | // Rule: copy_prop |
1039 | if (!RuleConfig->isRuleDisabled(0)) { |
1040 | if (1 |
1041 | && [&]() { |
1042 | return Helper.matchCombineCopy(*MIs[0]); |
1043 | return true; |
1044 | }() ) { |
1045 | LLVM_DEBUG(dbgs() << "Applying rule 'copy_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'copy_prop'\n" ; } } while (false); |
1046 | Helper.applyCombineCopy(*MIs[0]); |
1047 | return true; |
1048 | } |
1049 | } |
1050 | return false; |
1051 | } |
1052 | if (Partition == 1 /* TargetOpcode::G_MUL */) { |
1053 | // Leaf name: mul_to_shl |
1054 | // Rule: mul_to_shl |
1055 | if (!RuleConfig->isRuleDisabled(1)) { |
1056 | if (1 |
1057 | && [&]() { |
1058 | return Helper.matchCombineMulToShl(*MIs[0], MatchData1); |
1059 | return true; |
1060 | }() ) { |
1061 | LLVM_DEBUG(dbgs() << "Applying rule 'mul_to_shl'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mul_to_shl'\n" ; } } while (false); |
1062 | Helper.applyCombineMulToShl(*MIs[0], MatchData1); |
1063 | return true; |
1064 | } |
1065 | } |
1066 | // Leaf name: mul_by_neg_one |
1067 | // Rule: mul_by_neg_one |
1068 | if (!RuleConfig->isRuleDisabled(3)) { |
1069 | if (1 |
1070 | && [&]() { |
1071 | return Helper.matchConstantOp(MIs[0]->getOperand(2), -1); |
1072 | return true; |
1073 | }() ) { |
1074 | LLVM_DEBUG(dbgs() << "Applying rule 'mul_by_neg_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mul_by_neg_one'\n" ; } } while (false); |
1075 | Helper.applyCombineMulByNegativeOne(*MIs[0]); |
1076 | return true; |
1077 | } |
1078 | } |
1079 | // Leaf name: undef_to_int_zero |
1080 | // Rule: undef_to_int_zero |
1081 | if (!RuleConfig->isRuleDisabled(12)) { |
1082 | if (1 |
1083 | && [&]() { |
1084 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1085 | return true; |
1086 | }() ) { |
1087 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n" ; } } while (false); |
1088 | Helper.replaceInstWithConstant(*MIs[0], 0); |
1089 | return true; |
1090 | } |
1091 | } |
1092 | // Leaf name: binop_right_to_zero |
1093 | // Rule: binop_right_to_zero |
1094 | if (!RuleConfig->isRuleDisabled(27)) { |
1095 | if (1 |
1096 | && [&]() { |
1097 | return Helper.matchOperandIsZero(*MIs[0], 2); |
1098 | return true; |
1099 | }() ) { |
1100 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_to_zero'\n" ; } } while (false); |
1101 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
1102 | return true; |
1103 | } |
1104 | } |
1105 | // Leaf name: right_identity_one |
1106 | // Rule: right_identity_one |
1107 | if (!RuleConfig->isRuleDisabled(32)) { |
1108 | if (1 |
1109 | && [&]() { |
1110 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 1); |
1111 | return true; |
1112 | }() ) { |
1113 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_one'\n" ; } } while (false); |
1114 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1115 | return true; |
1116 | } |
1117 | } |
1118 | // Leaf name: constant_fold |
1119 | // Rule: constant_fold |
1120 | if (!RuleConfig->isRuleDisabled(91)) { |
1121 | if (1 |
1122 | && [&]() { |
1123 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
1124 | return true; |
1125 | }() ) { |
1126 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
1127 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
1128 | return true; |
1129 | } |
1130 | } |
1131 | // Leaf name: commute_constant_to_rhs |
1132 | // Rule: commute_constant_to_rhs |
1133 | if (!RuleConfig->isRuleDisabled(111)) { |
1134 | if (1 |
1135 | && [&]() { |
1136 | |
1137 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
1138 | |
1139 | return true; |
1140 | }() ) { |
1141 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
1142 | |
1143 | Observer.changingInstr(*MIs[0]); |
1144 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
1145 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
1146 | MIs[0]->getOperand(1).setReg(RHSReg); |
1147 | MIs[0]->getOperand(2).setReg(LHSReg); |
1148 | Observer.changedInstr(*MIs[0]); |
1149 | |
1150 | return true; |
1151 | } |
1152 | } |
1153 | return false; |
1154 | } |
1155 | if (Partition == 2 /* TargetOpcode::G_ADD */) { |
1156 | // Leaf name: add_p2i_to_ptradd |
1157 | // Rule: add_p2i_to_ptradd |
1158 | if (!RuleConfig->isRuleDisabled(2)) { |
1159 | if (1 |
1160 | && [&]() { |
1161 | return Helper.matchCombineAddP2IToPtrAdd(*MIs[0], MatchData2); |
1162 | return true; |
1163 | }() ) { |
1164 | LLVM_DEBUG(dbgs() << "Applying rule 'add_p2i_to_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'add_p2i_to_ptradd'\n" ; } } while (false); |
1165 | Helper.applyCombineAddP2IToPtrAdd(*MIs[0], MatchData2); |
1166 | return true; |
1167 | } |
1168 | } |
1169 | // Leaf name: propagate_undef_any_op |
1170 | // Rule: propagate_undef_any_op |
1171 | if (!RuleConfig->isRuleDisabled(17)) { |
1172 | if (1 |
1173 | && [&]() { |
1174 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1175 | return true; |
1176 | }() ) { |
1177 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
1178 | Helper.replaceInstWithUndef(*MIs[0]); |
1179 | return true; |
1180 | } |
1181 | } |
1182 | // Leaf name: right_identity_zero |
1183 | // Rule: right_identity_zero |
1184 | if (!RuleConfig->isRuleDisabled(24)) { |
1185 | if (1 |
1186 | && [&]() { |
1187 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
1188 | return true; |
1189 | }() ) { |
1190 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
1191 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1192 | return true; |
1193 | } |
1194 | } |
1195 | // Leaf name: add_sub_reg |
1196 | // Rule: add_sub_reg |
1197 | if (!RuleConfig->isRuleDisabled(33)) { |
1198 | if (1 |
1199 | && [&]() { |
1200 | return Helper.matchAddSubSameReg(*MIs[0], MatchData33); |
1201 | return true; |
1202 | }() ) { |
1203 | LLVM_DEBUG(dbgs() << "Applying rule 'add_sub_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'add_sub_reg'\n" ; } } while (false); |
1204 | return Helper.replaceSingleDefInstWithReg(*MIs[0], |
1205 | MatchData33); |
1206 | return true; |
1207 | } |
1208 | } |
1209 | // Leaf name: simplify_add_to_sub |
1210 | // Rule: simplify_add_to_sub |
1211 | if (!RuleConfig->isRuleDisabled(40)) { |
1212 | if (1 |
1213 | && [&]() { |
1214 | return Helper.matchSimplifyAddToSub(*MIs[0], MatchData40); |
1215 | return true; |
1216 | }() ) { |
1217 | LLVM_DEBUG(dbgs() << "Applying rule 'simplify_add_to_sub'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'simplify_add_to_sub'\n" ; } } while (false); |
1218 | Helper.applySimplifyAddToSub(*MIs[0], MatchData40); |
1219 | return true; |
1220 | } |
1221 | } |
1222 | // Leaf name: constant_fold |
1223 | // Rule: constant_fold |
1224 | if (!RuleConfig->isRuleDisabled(91)) { |
1225 | if (1 |
1226 | && [&]() { |
1227 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
1228 | return true; |
1229 | }() ) { |
1230 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
1231 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
1232 | return true; |
1233 | } |
1234 | } |
1235 | // Leaf name: fold_binop_into_select |
1236 | // Rule: fold_binop_into_select |
1237 | if (!RuleConfig->isRuleDisabled(106)) { |
1238 | if (1 |
1239 | && [&]() { |
1240 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
1241 | return true; |
1242 | }() ) { |
1243 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
1244 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
1245 | return true; |
1246 | } |
1247 | } |
1248 | // Leaf name: commute_constant_to_rhs |
1249 | // Rule: commute_constant_to_rhs |
1250 | if (!RuleConfig->isRuleDisabled(111)) { |
1251 | if (1 |
1252 | && [&]() { |
1253 | |
1254 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
1255 | |
1256 | return true; |
1257 | }() ) { |
1258 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
1259 | |
1260 | Observer.changingInstr(*MIs[0]); |
1261 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
1262 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
1263 | MIs[0]->getOperand(1).setReg(RHSReg); |
1264 | MIs[0]->getOperand(2).setReg(LHSReg); |
1265 | Observer.changedInstr(*MIs[0]); |
1266 | |
1267 | return true; |
1268 | } |
1269 | } |
1270 | return false; |
1271 | } |
1272 | if (Partition == 3 /* TargetOpcode::G_FREEZE */) { |
1273 | // Leaf name: idempotent_prop |
1274 | // Rule: idempotent_prop |
1275 | if (!RuleConfig->isRuleDisabled(4)) { |
1276 | if (1 |
1277 | && [&]() { |
1278 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
1279 | MIs[0]->getOpcode(); |
1280 | return true; |
1281 | }() ) { |
1282 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
1283 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1284 | return true; |
1285 | } |
1286 | } |
1287 | return false; |
1288 | } |
1289 | if (Partition == 4 /* TargetOpcode::G_FABS */) { |
1290 | // Leaf name: idempotent_prop |
1291 | // Rule: idempotent_prop |
1292 | if (!RuleConfig->isRuleDisabled(4)) { |
1293 | if (1 |
1294 | && [&]() { |
1295 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
1296 | MIs[0]->getOpcode(); |
1297 | return true; |
1298 | }() ) { |
1299 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
1300 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1301 | return true; |
1302 | } |
1303 | } |
1304 | // Leaf name: constant_fp_op |
1305 | // Rule: constant_fp_op |
1306 | if (!RuleConfig->isRuleDisabled(70)) { |
1307 | if (1 |
1308 | && [&]() { |
1309 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
1310 | return true; |
1311 | }() ) { |
1312 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
1313 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
1314 | return true; |
1315 | } |
1316 | } |
1317 | // Leaf name: fabs_fneg_fold |
1318 | // Rule: fabs_fneg_fold |
1319 | if (!RuleConfig->isRuleDisabled(92)) { |
1320 | if (1 |
1321 | && [&]() { |
1322 | return Helper.matchCombineFAbsOfFNeg(*MIs[0], MatchData92); |
1323 | return true; |
1324 | }() ) { |
1325 | LLVM_DEBUG(dbgs() << "Applying rule 'fabs_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fabs_fneg_fold'\n" ; } } while (false); |
1326 | Helper.applyBuildFnNoErase(*MIs[0], MatchData92); |
1327 | return true; |
1328 | } |
1329 | } |
1330 | return false; |
1331 | } |
1332 | if (Partition == 5 /* TargetOpcode::G_FCANONICALIZE */) { |
1333 | // Leaf name: idempotent_prop |
1334 | // Rule: idempotent_prop |
1335 | if (!RuleConfig->isRuleDisabled(4)) { |
1336 | if (1 |
1337 | && [&]() { |
1338 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
1339 | MIs[0]->getOpcode(); |
1340 | return true; |
1341 | }() ) { |
1342 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
1343 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1344 | return true; |
1345 | } |
1346 | } |
1347 | // Leaf name: remove_fcanonicalize |
1348 | // Rule: remove_fcanonicalize |
1349 | if (!RuleConfig->isRuleDisabled(115)) { |
1350 | if (1 |
1351 | && [&]() { |
1352 | return PostLegalizerHelper.matchRemoveFcanonicalize(*MIs[0], MatchData115); |
1353 | return true; |
1354 | }() ) { |
1355 | LLVM_DEBUG(dbgs() << "Applying rule 'remove_fcanonicalize'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'remove_fcanonicalize'\n" ; } } while (false); |
1356 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData115); |
1357 | return true; |
1358 | } |
1359 | } |
1360 | return false; |
1361 | } |
1362 | if (Partition == 6 /* TargetOpcode::G_INSERT_VECTOR_ELT */) { |
1363 | // Leaf name: combine_insert_vec_elts_build_vector |
1364 | // Rule: combine_insert_vec_elts_build_vector |
1365 | if (!RuleConfig->isRuleDisabled(5)) { |
1366 | if (1 |
1367 | && [&]() { |
1368 | return Helper.matchCombineInsertVecElts(*MIs[0], MatchData5); |
1369 | return true; |
1370 | }() ) { |
1371 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n" ; } } while (false); |
1372 | Helper.applyCombineInsertVecElts(*MIs[0], MatchData5); |
1373 | return true; |
1374 | } |
1375 | } |
1376 | // Leaf name: insert_extract_vec_elt_out_of_bounds |
1377 | // Rule: insert_extract_vec_elt_out_of_bounds |
1378 | if (!RuleConfig->isRuleDisabled(22)) { |
1379 | if (1 |
1380 | && [&]() { |
1381 | return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]); |
1382 | return true; |
1383 | }() ) { |
1384 | LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n" ; } } while (false); |
1385 | Helper.replaceInstWithUndef(*MIs[0]); |
1386 | return true; |
1387 | } |
1388 | } |
1389 | return false; |
1390 | } |
1391 | if (Partition == 7 /* TargetOpcode::G_EXTRACT_VECTOR_ELT */) { |
1392 | // Leaf name: extract_vec_elt_build_vec |
1393 | // Rule: extract_vec_elt_build_vec |
1394 | if (!RuleConfig->isRuleDisabled(6)) { |
1395 | if (1 |
1396 | && [&]() { |
1397 | return Helper.matchExtractVecEltBuildVec(*MIs[0], MatchData6); |
1398 | return true; |
1399 | }() ) { |
1400 | LLVM_DEBUG(dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n" ; } } while (false); |
1401 | Helper.applyExtractVecEltBuildVec(*MIs[0], MatchData6); |
1402 | return true; |
1403 | } |
1404 | } |
1405 | // Leaf name: insert_extract_vec_elt_out_of_bounds |
1406 | // Rule: insert_extract_vec_elt_out_of_bounds |
1407 | if (!RuleConfig->isRuleDisabled(22)) { |
1408 | if (1 |
1409 | && [&]() { |
1410 | return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]); |
1411 | return true; |
1412 | }() ) { |
1413 | LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n" ; } } while (false); |
1414 | Helper.replaceInstWithUndef(*MIs[0]); |
1415 | return true; |
1416 | } |
1417 | } |
1418 | return false; |
1419 | } |
1420 | if (Partition == 8 /* TargetOpcode::G_BUILD_VECTOR */) { |
1421 | // Leaf name: extract_all_elts_from_build_vector |
1422 | // Rule: extract_all_elts_from_build_vector |
1423 | if (!RuleConfig->isRuleDisabled(7)) { |
1424 | if (1 |
1425 | && [&]() { |
1426 | return Helper.matchExtractAllEltsFromBuildVector(*MIs[0], MatchData7); |
1427 | return true; |
1428 | }() ) { |
1429 | LLVM_DEBUG(dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n" ; } } while (false); |
1430 | Helper.applyExtractAllEltsFromBuildVector(*MIs[0], MatchData7); |
1431 | return true; |
1432 | } |
1433 | } |
1434 | // Leaf name: buildvector_identity_fold |
1435 | // Rule: buildvector_identity_fold |
1436 | if (!RuleConfig->isRuleDisabled(34)) { |
1437 | if (1 |
1438 | && [&]() { |
1439 | return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34); |
1440 | return true; |
1441 | }() ) { |
1442 | LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n" ; } } while (false); |
1443 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34); |
1444 | return true; |
1445 | } |
1446 | } |
1447 | return false; |
1448 | } |
1449 | if (Partition == 9 /* TargetOpcode::G_LOAD */) { |
1450 | // Leaf name: extending_loads |
1451 | // Rule: extending_loads |
1452 | if (!RuleConfig->isRuleDisabled(8)) { |
1453 | if (1 |
1454 | && [&]() { |
1455 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
1456 | return true; |
1457 | }() ) { |
1458 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
1459 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
1460 | return true; |
1461 | } |
1462 | } |
1463 | // Leaf name: combine_indexed_load_store |
1464 | // Rule: combine_indexed_load_store |
1465 | if (!RuleConfig->isRuleDisabled(10)) { |
1466 | if (1 |
1467 | && [&]() { |
1468 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
1469 | return true; |
1470 | }() ) { |
1471 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
1472 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
1473 | return true; |
1474 | } |
1475 | } |
1476 | return false; |
1477 | } |
1478 | if (Partition == 10 /* TargetOpcode::G_SEXTLOAD */) { |
1479 | // Leaf name: extending_loads |
1480 | // Rule: extending_loads |
1481 | if (!RuleConfig->isRuleDisabled(8)) { |
1482 | if (1 |
1483 | && [&]() { |
1484 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
1485 | return true; |
1486 | }() ) { |
1487 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
1488 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
1489 | return true; |
1490 | } |
1491 | } |
1492 | // Leaf name: combine_indexed_load_store |
1493 | // Rule: combine_indexed_load_store |
1494 | if (!RuleConfig->isRuleDisabled(10)) { |
1495 | if (1 |
1496 | && [&]() { |
1497 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
1498 | return true; |
1499 | }() ) { |
1500 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
1501 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
1502 | return true; |
1503 | } |
1504 | } |
1505 | return false; |
1506 | } |
1507 | if (Partition == 11 /* TargetOpcode::G_ZEXTLOAD */) { |
1508 | // Leaf name: extending_loads |
1509 | // Rule: extending_loads |
1510 | if (!RuleConfig->isRuleDisabled(8)) { |
1511 | if (1 |
1512 | && [&]() { |
1513 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
1514 | return true; |
1515 | }() ) { |
1516 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
1517 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
1518 | return true; |
1519 | } |
1520 | } |
1521 | // Leaf name: combine_indexed_load_store |
1522 | // Rule: combine_indexed_load_store |
1523 | if (!RuleConfig->isRuleDisabled(10)) { |
1524 | if (1 |
1525 | && [&]() { |
1526 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
1527 | return true; |
1528 | }() ) { |
1529 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
1530 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
1531 | return true; |
1532 | } |
1533 | } |
1534 | return false; |
1535 | } |
1536 | if (Partition == 12 /* TargetOpcode::G_AND */) { |
1537 | // Leaf name: load_and_mask |
1538 | // Rule: load_and_mask |
1539 | if (!RuleConfig->isRuleDisabled(9)) { |
1540 | if (1 |
1541 | && [&]() { |
1542 | return Helper.matchCombineLoadWithAndMask(*MIs[0], MatchData9); |
1543 | return true; |
1544 | }() ) { |
1545 | LLVM_DEBUG(dbgs() << "Applying rule 'load_and_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'load_and_mask'\n" ; } } while (false); |
1546 | Helper.applyBuildFn(*MIs[0], MatchData9); |
1547 | return true; |
1548 | } |
1549 | } |
1550 | // Leaf name: undef_to_int_zero |
1551 | // Rule: undef_to_int_zero |
1552 | if (!RuleConfig->isRuleDisabled(12)) { |
1553 | if (1 |
1554 | && [&]() { |
1555 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1556 | return true; |
1557 | }() ) { |
1558 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n" ; } } while (false); |
1559 | Helper.replaceInstWithConstant(*MIs[0], 0); |
1560 | return true; |
1561 | } |
1562 | } |
1563 | // Leaf name: binop_same_val |
1564 | // Rule: binop_same_val |
1565 | if (!RuleConfig->isRuleDisabled(25)) { |
1566 | if (1 |
1567 | && [&]() { |
1568 | return Helper.matchBinOpSameVal(*MIs[0]); |
1569 | return true; |
1570 | }() ) { |
1571 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n" ; } } while (false); |
1572 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1573 | return true; |
1574 | } |
1575 | } |
1576 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
1577 | // Rule: hoist_logic_op_with_same_opcode_hands |
1578 | if (!RuleConfig->isRuleDisabled(41)) { |
1579 | if (1 |
1580 | && [&]() { |
1581 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData41); |
1582 | return true; |
1583 | }() ) { |
1584 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
1585 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData41); |
1586 | return true; |
1587 | } |
1588 | } |
1589 | // Leaf name: narrow_binop_feeding_and |
1590 | // Rule: narrow_binop_feeding_and |
1591 | if (!RuleConfig->isRuleDisabled(48)) { |
1592 | if (1 |
1593 | && [&]() { |
1594 | return Helper.matchNarrowBinopFeedingAnd(*MIs[0], MatchData48); |
1595 | return true; |
1596 | }() ) { |
1597 | LLVM_DEBUG(dbgs() << "Applying rule 'narrow_binop_feeding_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'narrow_binop_feeding_and'\n" ; } } while (false); |
1598 | Helper.applyBuildFnNoErase(*MIs[0], MatchData48); |
1599 | return true; |
1600 | } |
1601 | } |
1602 | // Leaf name: redundant_and |
1603 | // Rule: redundant_and |
1604 | if (!RuleConfig->isRuleDisabled(52)) { |
1605 | if (1 |
1606 | && [&]() { |
1607 | return Helper.matchRedundantAnd(*MIs[0], MatchData52); |
1608 | return true; |
1609 | }() ) { |
1610 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_and'\n" ; } } while (false); |
1611 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData52); |
1612 | return true; |
1613 | } |
1614 | } |
1615 | // Leaf name: overlapping_and |
1616 | // Rule: overlapping_and |
1617 | if (!RuleConfig->isRuleDisabled(72)) { |
1618 | if (1 |
1619 | && [&]() { |
1620 | return Helper.matchOverlappingAnd(*MIs[0], MatchData72); |
1621 | return true; |
1622 | }() ) { |
1623 | LLVM_DEBUG(dbgs() << "Applying rule 'overlapping_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'overlapping_and'\n" ; } } while (false); |
1624 | Helper.applyBuildFn(*MIs[0], MatchData72); |
1625 | return true; |
1626 | } |
1627 | } |
1628 | // Leaf name: bitfield_extract_from_and |
1629 | // Rule: bitfield_extract_from_and |
1630 | if (!RuleConfig->isRuleDisabled(88)) { |
1631 | if (1 |
1632 | && [&]() { |
1633 | return Helper.matchBitfieldExtractFromAnd(*MIs[0], MatchData88); |
1634 | return true; |
1635 | }() ) { |
1636 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_and'\n" ; } } while (false); |
1637 | Helper.applyBuildFn(*MIs[0], MatchData88); |
1638 | return true; |
1639 | } |
1640 | } |
1641 | // Leaf name: constant_fold |
1642 | // Rule: constant_fold |
1643 | if (!RuleConfig->isRuleDisabled(91)) { |
1644 | if (1 |
1645 | && [&]() { |
1646 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
1647 | return true; |
1648 | }() ) { |
1649 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
1650 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
1651 | return true; |
1652 | } |
1653 | } |
1654 | // Leaf name: and_or_disjoint_mask |
1655 | // Rule: and_or_disjoint_mask |
1656 | if (!RuleConfig->isRuleDisabled(97)) { |
1657 | if (1 |
1658 | && [&]() { |
1659 | return Helper.matchAndOrDisjointMask(*MIs[0], MatchData97); |
1660 | return true; |
1661 | }() ) { |
1662 | LLVM_DEBUG(dbgs() << "Applying rule 'and_or_disjoint_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'and_or_disjoint_mask'\n" ; } } while (false); |
1663 | Helper.applyBuildFnNoErase(*MIs[0], MatchData97); |
1664 | return true; |
1665 | } |
1666 | } |
1667 | // Leaf name: fold_binop_into_select |
1668 | // Rule: fold_binop_into_select |
1669 | if (!RuleConfig->isRuleDisabled(106)) { |
1670 | if (1 |
1671 | && [&]() { |
1672 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
1673 | return true; |
1674 | }() ) { |
1675 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
1676 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
1677 | return true; |
1678 | } |
1679 | } |
1680 | // Leaf name: commute_constant_to_rhs |
1681 | // Rule: commute_constant_to_rhs |
1682 | if (!RuleConfig->isRuleDisabled(111)) { |
1683 | if (1 |
1684 | && [&]() { |
1685 | |
1686 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
1687 | |
1688 | return true; |
1689 | }() ) { |
1690 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
1691 | |
1692 | Observer.changingInstr(*MIs[0]); |
1693 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
1694 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
1695 | MIs[0]->getOperand(1).setReg(RHSReg); |
1696 | MIs[0]->getOperand(2).setReg(LHSReg); |
1697 | Observer.changedInstr(*MIs[0]); |
1698 | |
1699 | return true; |
1700 | } |
1701 | } |
1702 | return false; |
1703 | } |
1704 | if (Partition == 13 /* TargetOpcode::G_STORE */) { |
1705 | // Leaf name: combine_indexed_load_store |
1706 | // Rule: combine_indexed_load_store |
1707 | if (!RuleConfig->isRuleDisabled(10)) { |
1708 | if (1 |
1709 | && [&]() { |
1710 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
1711 | return true; |
1712 | }() ) { |
1713 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
1714 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
1715 | return true; |
1716 | } |
1717 | } |
1718 | // Leaf name: erase_undef_store |
1719 | // Rule: erase_undef_store |
1720 | if (!RuleConfig->isRuleDisabled(20)) { |
1721 | if (1 |
1722 | && [&]() { |
1723 | return Helper.matchUndefStore(*MIs[0]); |
1724 | return true; |
1725 | }() ) { |
1726 | LLVM_DEBUG(dbgs() << "Applying rule 'erase_undef_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'erase_undef_store'\n" ; } } while (false); |
1727 | return Helper.eraseInst(*MIs[0]); |
1728 | return true; |
1729 | } |
1730 | } |
1731 | return false; |
1732 | } |
1733 | if (Partition == 14 /* TargetOpcode::G_UITOFP */) { |
1734 | // Leaf name: undef_to_fp_zero |
1735 | // Rule: undef_to_fp_zero |
1736 | if (!RuleConfig->isRuleDisabled(11)) { |
1737 | if (1 |
1738 | && [&]() { |
1739 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1740 | return true; |
1741 | }() ) { |
1742 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n" ; } } while (false); |
1743 | Helper.replaceInstWithFConstant(*MIs[0], 0.0); |
1744 | return true; |
1745 | } |
1746 | } |
1747 | // Leaf name: uchar_to_float |
1748 | // Rule: uchar_to_float |
1749 | if (!RuleConfig->isRuleDisabled(113)) { |
1750 | if (1 |
1751 | && [&]() { |
1752 | return PostLegalizerHelper.matchUCharToFloat(*MIs[0]); |
1753 | return true; |
1754 | }() ) { |
1755 | LLVM_DEBUG(dbgs() << "Applying rule 'uchar_to_float'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'uchar_to_float'\n" ; } } while (false); |
1756 | PostLegalizerHelper.applyUCharToFloat(*MIs[0]); |
1757 | return true; |
1758 | } |
1759 | } |
1760 | return false; |
1761 | } |
1762 | if (Partition == 15 /* TargetOpcode::G_SITOFP */) { |
1763 | // Leaf name: undef_to_fp_zero |
1764 | // Rule: undef_to_fp_zero |
1765 | if (!RuleConfig->isRuleDisabled(11)) { |
1766 | if (1 |
1767 | && [&]() { |
1768 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1769 | return true; |
1770 | }() ) { |
1771 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n" ; } } while (false); |
1772 | Helper.replaceInstWithFConstant(*MIs[0], 0.0); |
1773 | return true; |
1774 | } |
1775 | } |
1776 | // Leaf name: uchar_to_float |
1777 | // Rule: uchar_to_float |
1778 | if (!RuleConfig->isRuleDisabled(113)) { |
1779 | if (1 |
1780 | && [&]() { |
1781 | return PostLegalizerHelper.matchUCharToFloat(*MIs[0]); |
1782 | return true; |
1783 | }() ) { |
1784 | LLVM_DEBUG(dbgs() << "Applying rule 'uchar_to_float'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'uchar_to_float'\n" ; } } while (false); |
1785 | PostLegalizerHelper.applyUCharToFloat(*MIs[0]); |
1786 | return true; |
1787 | } |
1788 | } |
1789 | return false; |
1790 | } |
1791 | if (Partition == 16 /* TargetOpcode::G_OR */) { |
1792 | // Leaf name: undef_to_negative_one |
1793 | // Rule: undef_to_negative_one |
1794 | if (!RuleConfig->isRuleDisabled(13)) { |
1795 | if (1 |
1796 | && [&]() { |
1797 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1798 | return true; |
1799 | }() ) { |
1800 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_negative_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_negative_one'\n" ; } } while (false); |
1801 | Helper.replaceInstWithConstant(*MIs[0], -1); |
1802 | return true; |
1803 | } |
1804 | } |
1805 | // Leaf name: right_identity_zero |
1806 | // Rule: right_identity_zero |
1807 | if (!RuleConfig->isRuleDisabled(24)) { |
1808 | if (1 |
1809 | && [&]() { |
1810 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
1811 | return true; |
1812 | }() ) { |
1813 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
1814 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1815 | return true; |
1816 | } |
1817 | } |
1818 | // Leaf name: binop_same_val |
1819 | // Rule: binop_same_val |
1820 | if (!RuleConfig->isRuleDisabled(25)) { |
1821 | if (1 |
1822 | && [&]() { |
1823 | return Helper.matchBinOpSameVal(*MIs[0]); |
1824 | return true; |
1825 | }() ) { |
1826 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n" ; } } while (false); |
1827 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1828 | return true; |
1829 | } |
1830 | } |
1831 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
1832 | // Rule: hoist_logic_op_with_same_opcode_hands |
1833 | if (!RuleConfig->isRuleDisabled(41)) { |
1834 | if (1 |
1835 | && [&]() { |
1836 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData41); |
1837 | return true; |
1838 | }() ) { |
1839 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
1840 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData41); |
1841 | return true; |
1842 | } |
1843 | } |
1844 | // Leaf name: redundant_or |
1845 | // Rule: redundant_or |
1846 | if (!RuleConfig->isRuleDisabled(54)) { |
1847 | if (1 |
1848 | && [&]() { |
1849 | return Helper.matchRedundantOr(*MIs[0], MatchData54); |
1850 | return true; |
1851 | }() ) { |
1852 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_or'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_or'\n" ; } } while (false); |
1853 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData54); |
1854 | return true; |
1855 | } |
1856 | } |
1857 | // Leaf name: load_or_combine |
1858 | // Rule: load_or_combine |
1859 | if (!RuleConfig->isRuleDisabled(82)) { |
1860 | if (1 |
1861 | && [&]() { |
1862 | return Helper.matchLoadOrCombine(*MIs[0], MatchData82); |
1863 | return true; |
1864 | }() ) { |
1865 | LLVM_DEBUG(dbgs() << "Applying rule 'load_or_combine'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'load_or_combine'\n" ; } } while (false); |
1866 | Helper.applyBuildFn(*MIs[0], MatchData82); |
1867 | return true; |
1868 | } |
1869 | } |
1870 | // Leaf name: funnel_shift_from_or_shift |
1871 | // Rule: funnel_shift_from_or_shift |
1872 | if (!RuleConfig->isRuleDisabled(84)) { |
1873 | if (1 |
1874 | && [&]() { |
1875 | return Helper.matchOrShiftToFunnelShift(*MIs[0], MatchData84); |
1876 | return true; |
1877 | }() ) { |
1878 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n" ; } } while (false); |
1879 | Helper.applyBuildFn(*MIs[0], MatchData84); |
1880 | return true; |
1881 | } |
1882 | } |
1883 | // Leaf name: constant_fold |
1884 | // Rule: constant_fold |
1885 | if (!RuleConfig->isRuleDisabled(91)) { |
1886 | if (1 |
1887 | && [&]() { |
1888 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
1889 | return true; |
1890 | }() ) { |
1891 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
1892 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
1893 | return true; |
1894 | } |
1895 | } |
1896 | // Leaf name: fold_binop_into_select |
1897 | // Rule: fold_binop_into_select |
1898 | if (!RuleConfig->isRuleDisabled(106)) { |
1899 | if (1 |
1900 | && [&]() { |
1901 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
1902 | return true; |
1903 | }() ) { |
1904 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
1905 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
1906 | return true; |
1907 | } |
1908 | } |
1909 | // Leaf name: commute_constant_to_rhs |
1910 | // Rule: commute_constant_to_rhs |
1911 | if (!RuleConfig->isRuleDisabled(111)) { |
1912 | if (1 |
1913 | && [&]() { |
1914 | |
1915 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
1916 | |
1917 | return true; |
1918 | }() ) { |
1919 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
1920 | |
1921 | Observer.changingInstr(*MIs[0]); |
1922 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
1923 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
1924 | MIs[0]->getOperand(1).setReg(RHSReg); |
1925 | MIs[0]->getOperand(2).setReg(LHSReg); |
1926 | Observer.changedInstr(*MIs[0]); |
1927 | |
1928 | return true; |
1929 | } |
1930 | } |
1931 | return false; |
1932 | } |
1933 | if (Partition == 17 /* TargetOpcode::G_SHL */) { |
1934 | // Leaf name: binop_left_undef_to_zero |
1935 | // Rule: binop_left_undef_to_zero |
1936 | if (!RuleConfig->isRuleDisabled(14)) { |
1937 | if (1 |
1938 | && [&]() { |
1939 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
1940 | return true; |
1941 | }() ) { |
1942 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
1943 | Helper.replaceInstWithConstant(*MIs[0], 0); |
1944 | return true; |
1945 | } |
1946 | } |
1947 | // Leaf name: binop_right_undef_to_undef |
1948 | // Rule: binop_right_undef_to_undef |
1949 | if (!RuleConfig->isRuleDisabled(15)) { |
1950 | if (1 |
1951 | && [&]() { |
1952 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
1953 | return true; |
1954 | }() ) { |
1955 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
1956 | Helper.replaceInstWithUndef(*MIs[0]); |
1957 | return true; |
1958 | } |
1959 | } |
1960 | // Leaf name: right_identity_zero |
1961 | // Rule: right_identity_zero |
1962 | if (!RuleConfig->isRuleDisabled(24)) { |
1963 | if (1 |
1964 | && [&]() { |
1965 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
1966 | return true; |
1967 | }() ) { |
1968 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
1969 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1970 | return true; |
1971 | } |
1972 | } |
1973 | // Leaf name: shifts_too_big |
1974 | // Rule: shifts_too_big |
1975 | if (!RuleConfig->isRuleDisabled(42)) { |
1976 | if (1 |
1977 | && [&]() { |
1978 | return Helper.matchShiftsTooBig(*MIs[0]); |
1979 | return true; |
1980 | }() ) { |
1981 | LLVM_DEBUG(dbgs() << "Applying rule 'shifts_too_big'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shifts_too_big'\n" ; } } while (false); |
1982 | Helper.replaceInstWithUndef(*MIs[0]); |
1983 | return true; |
1984 | } |
1985 | } |
1986 | // Leaf name: reduce_shl_of_extend |
1987 | // Rule: reduce_shl_of_extend |
1988 | if (!RuleConfig->isRuleDisabled(47)) { |
1989 | if (1 |
1990 | && [&]() { |
1991 | return Helper.matchCombineShlOfExtend(*MIs[0], MatchData47); |
1992 | return true; |
1993 | }() ) { |
1994 | LLVM_DEBUG(dbgs() << "Applying rule 'reduce_shl_of_extend'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'reduce_shl_of_extend'\n" ; } } while (false); |
1995 | Helper.applyCombineShlOfExtend(*MIs[0], MatchData47); |
1996 | return true; |
1997 | } |
1998 | } |
1999 | // Leaf name: shift_immed_chain |
2000 | // Rule: shift_immed_chain |
2001 | if (!RuleConfig->isRuleDisabled(80)) { |
2002 | if (1 |
2003 | && [&]() { |
2004 | return Helper.matchShiftImmedChain(*MIs[0], MatchData80); |
2005 | return true; |
2006 | }() ) { |
2007 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
2008 | Helper.applyShiftImmedChain(*MIs[0], MatchData80); |
2009 | return true; |
2010 | } |
2011 | } |
2012 | // Leaf name: shift_of_shifted_logic_chain |
2013 | // Rule: shift_of_shifted_logic_chain |
2014 | if (!RuleConfig->isRuleDisabled(81)) { |
2015 | if (1 |
2016 | && [&]() { |
2017 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81); |
2018 | return true; |
2019 | }() ) { |
2020 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
2021 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81); |
2022 | return true; |
2023 | } |
2024 | } |
2025 | // Leaf name: commute_shift |
2026 | // Rule: commute_shift |
2027 | if (!RuleConfig->isRuleDisabled(86)) { |
2028 | if (1 |
2029 | && [&]() { |
2030 | return Helper.matchCommuteShift(*MIs[0], MatchData86); |
2031 | return true; |
2032 | }() ) { |
2033 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'commute_shift'\n" ; } } while (false); |
2034 | Helper.applyBuildFn(*MIs[0], MatchData86); |
2035 | return true; |
2036 | } |
2037 | } |
2038 | // Leaf name: fold_binop_into_select |
2039 | // Rule: fold_binop_into_select |
2040 | if (!RuleConfig->isRuleDisabled(106)) { |
2041 | if (1 |
2042 | && [&]() { |
2043 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2044 | return true; |
2045 | }() ) { |
2046 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2047 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2048 | return true; |
2049 | } |
2050 | } |
2051 | return false; |
2052 | } |
2053 | if (Partition == 18 /* TargetOpcode::G_UDIV */) { |
2054 | // Leaf name: binop_left_undef_to_zero |
2055 | // Rule: binop_left_undef_to_zero |
2056 | if (!RuleConfig->isRuleDisabled(14)) { |
2057 | if (1 |
2058 | && [&]() { |
2059 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
2060 | return true; |
2061 | }() ) { |
2062 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
2063 | Helper.replaceInstWithConstant(*MIs[0], 0); |
2064 | return true; |
2065 | } |
2066 | } |
2067 | // Leaf name: binop_left_to_zero |
2068 | // Rule: binop_left_to_zero |
2069 | if (!RuleConfig->isRuleDisabled(26)) { |
2070 | if (1 |
2071 | && [&]() { |
2072 | return Helper.matchOperandIsZero(*MIs[0], 1); |
2073 | return true; |
2074 | }() ) { |
2075 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
2076 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2077 | return true; |
2078 | } |
2079 | } |
2080 | // Leaf name: div_rem_to_divrem |
2081 | // Rule: div_rem_to_divrem |
2082 | if (!RuleConfig->isRuleDisabled(83)) { |
2083 | if (1 |
2084 | && [&]() { |
2085 | return Helper.matchCombineDivRem(*MIs[0], MatchData83); |
2086 | return true; |
2087 | }() ) { |
2088 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
2089 | Helper.applyCombineDivRem(*MIs[0], MatchData83); |
2090 | return true; |
2091 | } |
2092 | } |
2093 | // Leaf name: udiv_by_const |
2094 | // Rule: udiv_by_const |
2095 | if (!RuleConfig->isRuleDisabled(93)) { |
2096 | if (1 |
2097 | && [&]() { |
2098 | return Helper.matchUDivByConst(*MIs[0]); |
2099 | return true; |
2100 | }() ) { |
2101 | LLVM_DEBUG(dbgs() << "Applying rule 'udiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'udiv_by_const'\n" ; } } while (false); |
2102 | Helper.applyUDivByConst(*MIs[0]); |
2103 | return true; |
2104 | } |
2105 | } |
2106 | // Leaf name: fold_binop_into_select |
2107 | // Rule: fold_binop_into_select |
2108 | if (!RuleConfig->isRuleDisabled(106)) { |
2109 | if (1 |
2110 | && [&]() { |
2111 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2112 | return true; |
2113 | }() ) { |
2114 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2115 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2116 | return true; |
2117 | } |
2118 | } |
2119 | return false; |
2120 | } |
2121 | if (Partition == 19 /* TargetOpcode::G_UREM */) { |
2122 | // Leaf name: binop_left_undef_to_zero |
2123 | // Rule: binop_left_undef_to_zero |
2124 | if (!RuleConfig->isRuleDisabled(14)) { |
2125 | if (1 |
2126 | && [&]() { |
2127 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
2128 | return true; |
2129 | }() ) { |
2130 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
2131 | Helper.replaceInstWithConstant(*MIs[0], 0); |
2132 | return true; |
2133 | } |
2134 | } |
2135 | // Leaf name: binop_left_to_zero |
2136 | // Rule: binop_left_to_zero |
2137 | if (!RuleConfig->isRuleDisabled(26)) { |
2138 | if (1 |
2139 | && [&]() { |
2140 | return Helper.matchOperandIsZero(*MIs[0], 1); |
2141 | return true; |
2142 | }() ) { |
2143 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
2144 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2145 | return true; |
2146 | } |
2147 | } |
2148 | // Leaf name: urem_pow2_to_mask |
2149 | // Rule: urem_pow2_to_mask |
2150 | if (!RuleConfig->isRuleDisabled(55)) { |
2151 | if (1 |
2152 | && [&]() { |
2153 | return Helper.matchOperandIsKnownToBeAPowerOfTwo(*MIs[0], 2); |
2154 | return true; |
2155 | }() ) { |
2156 | LLVM_DEBUG(dbgs() << "Applying rule 'urem_pow2_to_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'urem_pow2_to_mask'\n" ; } } while (false); |
2157 | Helper.applySimplifyURemByPow2(*MIs[0]); |
2158 | return true; |
2159 | } |
2160 | } |
2161 | // Leaf name: div_rem_to_divrem |
2162 | // Rule: div_rem_to_divrem |
2163 | if (!RuleConfig->isRuleDisabled(83)) { |
2164 | if (1 |
2165 | && [&]() { |
2166 | return Helper.matchCombineDivRem(*MIs[0], MatchData83); |
2167 | return true; |
2168 | }() ) { |
2169 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
2170 | Helper.applyCombineDivRem(*MIs[0], MatchData83); |
2171 | return true; |
2172 | } |
2173 | } |
2174 | // Leaf name: fold_binop_into_select |
2175 | // Rule: fold_binop_into_select |
2176 | if (!RuleConfig->isRuleDisabled(106)) { |
2177 | if (1 |
2178 | && [&]() { |
2179 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2180 | return true; |
2181 | }() ) { |
2182 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2183 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2184 | return true; |
2185 | } |
2186 | } |
2187 | return false; |
2188 | } |
2189 | if (Partition == 20 /* TargetOpcode::G_ASHR */) { |
2190 | // Leaf name: binop_right_undef_to_undef |
2191 | // Rule: binop_right_undef_to_undef |
2192 | if (!RuleConfig->isRuleDisabled(15)) { |
2193 | if (1 |
2194 | && [&]() { |
2195 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
2196 | return true; |
2197 | }() ) { |
2198 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
2199 | Helper.replaceInstWithUndef(*MIs[0]); |
2200 | return true; |
2201 | } |
2202 | } |
2203 | // Leaf name: right_identity_zero |
2204 | // Rule: right_identity_zero |
2205 | if (!RuleConfig->isRuleDisabled(24)) { |
2206 | if (1 |
2207 | && [&]() { |
2208 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2209 | return true; |
2210 | }() ) { |
2211 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2212 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2213 | return true; |
2214 | } |
2215 | } |
2216 | // Leaf name: shifts_too_big |
2217 | // Rule: shifts_too_big |
2218 | if (!RuleConfig->isRuleDisabled(42)) { |
2219 | if (1 |
2220 | && [&]() { |
2221 | return Helper.matchShiftsTooBig(*MIs[0]); |
2222 | return true; |
2223 | }() ) { |
2224 | LLVM_DEBUG(dbgs() << "Applying rule 'shifts_too_big'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shifts_too_big'\n" ; } } while (false); |
2225 | Helper.replaceInstWithUndef(*MIs[0]); |
2226 | return true; |
2227 | } |
2228 | } |
2229 | // Leaf name: shl_ashr_to_sext_inreg |
2230 | // Rule: shl_ashr_to_sext_inreg |
2231 | if (!RuleConfig->isRuleDisabled(45)) { |
2232 | if (1 |
2233 | && [&]() { |
2234 | return Helper.matchAshrShlToSextInreg(*MIs[0], MatchData45); |
2235 | return true; |
2236 | }() ) { |
2237 | LLVM_DEBUG(dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n" ; } } while (false); |
2238 | Helper.applyAshShlToSextInreg(*MIs[0], MatchData45); |
2239 | return true; |
2240 | } |
2241 | } |
2242 | // Leaf name: shift_immed_chain |
2243 | // Rule: shift_immed_chain |
2244 | if (!RuleConfig->isRuleDisabled(80)) { |
2245 | if (1 |
2246 | && [&]() { |
2247 | return Helper.matchShiftImmedChain(*MIs[0], MatchData80); |
2248 | return true; |
2249 | }() ) { |
2250 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
2251 | Helper.applyShiftImmedChain(*MIs[0], MatchData80); |
2252 | return true; |
2253 | } |
2254 | } |
2255 | // Leaf name: shift_of_shifted_logic_chain |
2256 | // Rule: shift_of_shifted_logic_chain |
2257 | if (!RuleConfig->isRuleDisabled(81)) { |
2258 | if (1 |
2259 | && [&]() { |
2260 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81); |
2261 | return true; |
2262 | }() ) { |
2263 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
2264 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81); |
2265 | return true; |
2266 | } |
2267 | } |
2268 | // Leaf name: bitfield_extract_from_shr |
2269 | // Rule: bitfield_extract_from_shr |
2270 | if (!RuleConfig->isRuleDisabled(89)) { |
2271 | if (1 |
2272 | && [&]() { |
2273 | return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData89); |
2274 | return true; |
2275 | }() ) { |
2276 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n" ; } } while (false); |
2277 | Helper.applyBuildFn(*MIs[0], MatchData89); |
2278 | return true; |
2279 | } |
2280 | } |
2281 | // Leaf name: bitfield_extract_from_shr_and |
2282 | // Rule: bitfield_extract_from_shr_and |
2283 | if (!RuleConfig->isRuleDisabled(90)) { |
2284 | if (1 |
2285 | && [&]() { |
2286 | return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData90); |
2287 | return true; |
2288 | }() ) { |
2289 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n" ; } } while (false); |
2290 | Helper.applyBuildFn(*MIs[0], MatchData90); |
2291 | return true; |
2292 | } |
2293 | } |
2294 | // Leaf name: fold_binop_into_select |
2295 | // Rule: fold_binop_into_select |
2296 | if (!RuleConfig->isRuleDisabled(106)) { |
2297 | if (1 |
2298 | && [&]() { |
2299 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2300 | return true; |
2301 | }() ) { |
2302 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2303 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2304 | return true; |
2305 | } |
2306 | } |
2307 | return false; |
2308 | } |
2309 | if (Partition == 21 /* TargetOpcode::G_LSHR */) { |
2310 | // Leaf name: binop_right_undef_to_undef |
2311 | // Rule: binop_right_undef_to_undef |
2312 | if (!RuleConfig->isRuleDisabled(15)) { |
2313 | if (1 |
2314 | && [&]() { |
2315 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
2316 | return true; |
2317 | }() ) { |
2318 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
2319 | Helper.replaceInstWithUndef(*MIs[0]); |
2320 | return true; |
2321 | } |
2322 | } |
2323 | // Leaf name: right_identity_zero |
2324 | // Rule: right_identity_zero |
2325 | if (!RuleConfig->isRuleDisabled(24)) { |
2326 | if (1 |
2327 | && [&]() { |
2328 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2329 | return true; |
2330 | }() ) { |
2331 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2332 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2333 | return true; |
2334 | } |
2335 | } |
2336 | // Leaf name: shifts_too_big |
2337 | // Rule: shifts_too_big |
2338 | if (!RuleConfig->isRuleDisabled(42)) { |
2339 | if (1 |
2340 | && [&]() { |
2341 | return Helper.matchShiftsTooBig(*MIs[0]); |
2342 | return true; |
2343 | }() ) { |
2344 | LLVM_DEBUG(dbgs() << "Applying rule 'shifts_too_big'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shifts_too_big'\n" ; } } while (false); |
2345 | Helper.replaceInstWithUndef(*MIs[0]); |
2346 | return true; |
2347 | } |
2348 | } |
2349 | // Leaf name: shift_immed_chain |
2350 | // Rule: shift_immed_chain |
2351 | if (!RuleConfig->isRuleDisabled(80)) { |
2352 | if (1 |
2353 | && [&]() { |
2354 | return Helper.matchShiftImmedChain(*MIs[0], MatchData80); |
2355 | return true; |
2356 | }() ) { |
2357 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
2358 | Helper.applyShiftImmedChain(*MIs[0], MatchData80); |
2359 | return true; |
2360 | } |
2361 | } |
2362 | // Leaf name: shift_of_shifted_logic_chain |
2363 | // Rule: shift_of_shifted_logic_chain |
2364 | if (!RuleConfig->isRuleDisabled(81)) { |
2365 | if (1 |
2366 | && [&]() { |
2367 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81); |
2368 | return true; |
2369 | }() ) { |
2370 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
2371 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81); |
2372 | return true; |
2373 | } |
2374 | } |
2375 | // Leaf name: bitfield_extract_from_shr |
2376 | // Rule: bitfield_extract_from_shr |
2377 | if (!RuleConfig->isRuleDisabled(89)) { |
2378 | if (1 |
2379 | && [&]() { |
2380 | return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData89); |
2381 | return true; |
2382 | }() ) { |
2383 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n" ; } } while (false); |
2384 | Helper.applyBuildFn(*MIs[0], MatchData89); |
2385 | return true; |
2386 | } |
2387 | } |
2388 | // Leaf name: bitfield_extract_from_shr_and |
2389 | // Rule: bitfield_extract_from_shr_and |
2390 | if (!RuleConfig->isRuleDisabled(90)) { |
2391 | if (1 |
2392 | && [&]() { |
2393 | return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData90); |
2394 | return true; |
2395 | }() ) { |
2396 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n" ; } } while (false); |
2397 | Helper.applyBuildFn(*MIs[0], MatchData90); |
2398 | return true; |
2399 | } |
2400 | } |
2401 | // Leaf name: fold_binop_into_select |
2402 | // Rule: fold_binop_into_select |
2403 | if (!RuleConfig->isRuleDisabled(106)) { |
2404 | if (1 |
2405 | && [&]() { |
2406 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2407 | return true; |
2408 | }() ) { |
2409 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2410 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2411 | return true; |
2412 | } |
2413 | } |
2414 | return false; |
2415 | } |
2416 | if (Partition == 22 /* TargetOpcode::G_ABS */) { |
2417 | // Leaf name: unary_undef_to_zero |
2418 | // Rule: unary_undef_to_zero |
2419 | if (!RuleConfig->isRuleDisabled(16)) { |
2420 | if (1 |
2421 | && [&]() { |
2422 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
2423 | return true; |
2424 | }() ) { |
2425 | LLVM_DEBUG(dbgs() << "Applying rule 'unary_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unary_undef_to_zero'\n" ; } } while (false); |
2426 | Helper.replaceInstWithConstant(*MIs[0], 0); |
2427 | return true; |
2428 | } |
2429 | } |
2430 | return false; |
2431 | } |
2432 | if (Partition == 23 /* TargetOpcode::G_FPTOSI */) { |
2433 | // Leaf name: propagate_undef_any_op |
2434 | // Rule: propagate_undef_any_op |
2435 | if (!RuleConfig->isRuleDisabled(17)) { |
2436 | if (1 |
2437 | && [&]() { |
2438 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
2439 | return true; |
2440 | }() ) { |
2441 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
2442 | Helper.replaceInstWithUndef(*MIs[0]); |
2443 | return true; |
2444 | } |
2445 | } |
2446 | return false; |
2447 | } |
2448 | if (Partition == 24 /* TargetOpcode::G_FPTOUI */) { |
2449 | // Leaf name: propagate_undef_any_op |
2450 | // Rule: propagate_undef_any_op |
2451 | if (!RuleConfig->isRuleDisabled(17)) { |
2452 | if (1 |
2453 | && [&]() { |
2454 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
2455 | return true; |
2456 | }() ) { |
2457 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
2458 | Helper.replaceInstWithUndef(*MIs[0]); |
2459 | return true; |
2460 | } |
2461 | } |
2462 | return false; |
2463 | } |
2464 | if (Partition == 25 /* TargetOpcode::G_SUB */) { |
2465 | // Leaf name: propagate_undef_any_op |
2466 | // Rule: propagate_undef_any_op |
2467 | if (!RuleConfig->isRuleDisabled(17)) { |
2468 | if (1 |
2469 | && [&]() { |
2470 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
2471 | return true; |
2472 | }() ) { |
2473 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
2474 | Helper.replaceInstWithUndef(*MIs[0]); |
2475 | return true; |
2476 | } |
2477 | } |
2478 | // Leaf name: right_identity_zero |
2479 | // Rule: right_identity_zero |
2480 | if (!RuleConfig->isRuleDisabled(24)) { |
2481 | if (1 |
2482 | && [&]() { |
2483 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2484 | return true; |
2485 | }() ) { |
2486 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2487 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2488 | return true; |
2489 | } |
2490 | } |
2491 | // Leaf name: constant_fold |
2492 | // Rule: constant_fold |
2493 | if (!RuleConfig->isRuleDisabled(91)) { |
2494 | if (1 |
2495 | && [&]() { |
2496 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
2497 | return true; |
2498 | }() ) { |
2499 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
2500 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
2501 | return true; |
2502 | } |
2503 | } |
2504 | // Leaf name: fold_binop_into_select |
2505 | // Rule: fold_binop_into_select |
2506 | if (!RuleConfig->isRuleDisabled(106)) { |
2507 | if (1 |
2508 | && [&]() { |
2509 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2510 | return true; |
2511 | }() ) { |
2512 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2513 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2514 | return true; |
2515 | } |
2516 | } |
2517 | // Leaf name: sub_add_reg |
2518 | // Rule: sub_add_reg |
2519 | if (!RuleConfig->isRuleDisabled(107)) { |
2520 | if (1 |
2521 | && [&]() { |
2522 | return Helper.matchSubAddSameReg(*MIs[0], MatchData107); |
2523 | return true; |
2524 | }() ) { |
2525 | LLVM_DEBUG(dbgs() << "Applying rule 'sub_add_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'sub_add_reg'\n" ; } } while (false); |
2526 | Helper.applyBuildFn(*MIs[0], MatchData107); |
2527 | return true; |
2528 | } |
2529 | } |
2530 | return false; |
2531 | } |
2532 | if (Partition == 26 /* TargetOpcode::G_XOR */) { |
2533 | // Leaf name: propagate_undef_any_op |
2534 | // Rule: propagate_undef_any_op |
2535 | if (!RuleConfig->isRuleDisabled(17)) { |
2536 | if (1 |
2537 | && [&]() { |
2538 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
2539 | return true; |
2540 | }() ) { |
2541 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
2542 | Helper.replaceInstWithUndef(*MIs[0]); |
2543 | return true; |
2544 | } |
2545 | } |
2546 | // Leaf name: right_identity_zero |
2547 | // Rule: right_identity_zero |
2548 | if (!RuleConfig->isRuleDisabled(24)) { |
2549 | if (1 |
2550 | && [&]() { |
2551 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2552 | return true; |
2553 | }() ) { |
2554 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2555 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2556 | return true; |
2557 | } |
2558 | } |
2559 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
2560 | // Rule: hoist_logic_op_with_same_opcode_hands |
2561 | if (!RuleConfig->isRuleDisabled(41)) { |
2562 | if (1 |
2563 | && [&]() { |
2564 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData41); |
2565 | return true; |
2566 | }() ) { |
2567 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
2568 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData41); |
2569 | return true; |
2570 | } |
2571 | } |
2572 | // Leaf name: not_cmp_fold |
2573 | // Rule: not_cmp_fold |
2574 | if (!RuleConfig->isRuleDisabled(61)) { |
2575 | if (1 |
2576 | && [&]() { |
2577 | return Helper.matchNotCmp(*MIs[0], MatchData61); |
2578 | return true; |
2579 | }() ) { |
2580 | LLVM_DEBUG(dbgs() << "Applying rule 'not_cmp_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'not_cmp_fold'\n" ; } } while (false); |
2581 | Helper.applyNotCmp(*MIs[0], MatchData61); |
2582 | return true; |
2583 | } |
2584 | } |
2585 | // Leaf name: xor_of_and_with_same_reg |
2586 | // Rule: xor_of_and_with_same_reg |
2587 | if (!RuleConfig->isRuleDisabled(78)) { |
2588 | if (1 |
2589 | && [&]() { |
2590 | return Helper.matchXorOfAndWithSameReg(*MIs[0], MatchData78); |
2591 | return true; |
2592 | }() ) { |
2593 | LLVM_DEBUG(dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n" ; } } while (false); |
2594 | Helper.applyXorOfAndWithSameReg(*MIs[0], MatchData78); |
2595 | return true; |
2596 | } |
2597 | } |
2598 | // Leaf name: constant_fold |
2599 | // Rule: constant_fold |
2600 | if (!RuleConfig->isRuleDisabled(91)) { |
2601 | if (1 |
2602 | && [&]() { |
2603 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
2604 | return true; |
2605 | }() ) { |
2606 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
2607 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
2608 | return true; |
2609 | } |
2610 | } |
2611 | // Leaf name: fold_binop_into_select |
2612 | // Rule: fold_binop_into_select |
2613 | if (!RuleConfig->isRuleDisabled(106)) { |
2614 | if (1 |
2615 | && [&]() { |
2616 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2617 | return true; |
2618 | }() ) { |
2619 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2620 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2621 | return true; |
2622 | } |
2623 | } |
2624 | // Leaf name: commute_constant_to_rhs |
2625 | // Rule: commute_constant_to_rhs |
2626 | if (!RuleConfig->isRuleDisabled(111)) { |
2627 | if (1 |
2628 | && [&]() { |
2629 | |
2630 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
2631 | |
2632 | return true; |
2633 | }() ) { |
2634 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
2635 | |
2636 | Observer.changingInstr(*MIs[0]); |
2637 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
2638 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
2639 | MIs[0]->getOperand(1).setReg(RHSReg); |
2640 | MIs[0]->getOperand(2).setReg(LHSReg); |
2641 | Observer.changedInstr(*MIs[0]); |
2642 | |
2643 | return true; |
2644 | } |
2645 | } |
2646 | return false; |
2647 | } |
2648 | if (Partition == 27 /* TargetOpcode::G_TRUNC */) { |
2649 | // Leaf name: propagate_undef_any_op |
2650 | // Rule: propagate_undef_any_op |
2651 | if (!RuleConfig->isRuleDisabled(17)) { |
2652 | if (1 |
2653 | && [&]() { |
2654 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
2655 | return true; |
2656 | }() ) { |
2657 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
2658 | Helper.replaceInstWithUndef(*MIs[0]); |
2659 | return true; |
2660 | } |
2661 | } |
2662 | // Leaf name: trunc_buildvector_fold |
2663 | // Rule: trunc_buildvector_fold |
2664 | if (!RuleConfig->isRuleDisabled(35)) { |
2665 | if (1 |
2666 | && [&]() { |
2667 | return Helper.matchTruncBuildVectorFold(*MIs[0], MatchData35); |
2668 | return true; |
2669 | }() ) { |
2670 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'trunc_buildvector_fold'\n" ; } } while (false); |
2671 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData35); |
2672 | return true; |
2673 | } |
2674 | } |
2675 | // Leaf name: trunc_lshr_buildvector_fold |
2676 | // Rule: trunc_lshr_buildvector_fold |
2677 | if (!RuleConfig->isRuleDisabled(36)) { |
2678 | if (1 |
2679 | && [&]() { |
2680 | return Helper.matchTruncLshrBuildVectorFold(*MIs[0], MatchData36); |
2681 | return true; |
2682 | }() ) { |
2683 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n" ; } } while (false); |
2684 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData36); |
2685 | return true; |
2686 | } |
2687 | } |
2688 | // Leaf name: trunc_ext_fold |
2689 | // Rule: trunc_ext_fold |
2690 | if (!RuleConfig->isRuleDisabled(68)) { |
2691 | if (1 |
2692 | && [&]() { |
2693 | return Helper.matchCombineTruncOfExt(*MIs[0], MatchData68); |
2694 | return true; |
2695 | }() ) { |
2696 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'trunc_ext_fold'\n" ; } } while (false); |
2697 | Helper.applyCombineTruncOfExt(*MIs[0], MatchData68); |
2698 | return true; |
2699 | } |
2700 | } |
2701 | // Leaf name: trunc_shift |
2702 | // Rule: trunc_shift |
2703 | if (!RuleConfig->isRuleDisabled(69)) { |
2704 | if (1 |
2705 | && [&]() { |
2706 | return Helper.matchCombineTruncOfShift(*MIs[0], MatchData69); |
2707 | return true; |
2708 | }() ) { |
2709 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'trunc_shift'\n" ; } } while (false); |
2710 | Helper.applyCombineTruncOfShift(*MIs[0], MatchData69); |
2711 | return true; |
2712 | } |
2713 | } |
2714 | return false; |
2715 | } |
2716 | if (Partition == 28 /* TargetOpcode::G_SHUFFLE_VECTOR */) { |
2717 | // Leaf name: propagate_undef_all_ops |
2718 | // Rule: propagate_undef_all_ops |
2719 | if (!RuleConfig->isRuleDisabled(18)) { |
2720 | if (1 |
2721 | && [&]() { |
2722 | return Helper.matchAllExplicitUsesAreUndef(*MIs[0]); |
2723 | return true; |
2724 | }() ) { |
2725 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_all_ops'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_all_ops'\n" ; } } while (false); |
2726 | Helper.replaceInstWithUndef(*MIs[0]); |
2727 | return true; |
2728 | } |
2729 | } |
2730 | // Leaf name: propagate_undef_shuffle_mask |
2731 | // Rule: propagate_undef_shuffle_mask |
2732 | if (!RuleConfig->isRuleDisabled(19)) { |
2733 | if (1 |
2734 | && [&]() { |
2735 | return Helper.matchUndefShuffleVectorMask(*MIs[0]); |
2736 | return true; |
2737 | }() ) { |
2738 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n" ; } } while (false); |
2739 | Helper.replaceInstWithUndef(*MIs[0]); |
2740 | return true; |
2741 | } |
2742 | } |
2743 | return false; |
2744 | } |
2745 | if (Partition == 29 /* TargetOpcode::G_UNMERGE_VALUES */) { |
2746 | // Leaf name: unmerge_undef |
2747 | // Rule: unmerge_undef |
2748 | if (!RuleConfig->isRuleDisabled(21)) { |
2749 | if (1 |
2750 | && [&]() { |
2751 | return Helper.matchCombineUnmergeUndef(*MIs[0], MatchData21); |
2752 | return true; |
2753 | }() ) { |
2754 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_undef'\n" ; } } while (false); |
2755 | Helper.applyBuildFn(*MIs[0], MatchData21); |
2756 | return true; |
2757 | } |
2758 | } |
2759 | // Leaf name: unmerge_merge |
2760 | // Rule: unmerge_merge |
2761 | if (!RuleConfig->isRuleDisabled(63)) { |
2762 | if (1 |
2763 | && [&]() { |
2764 | return Helper.matchCombineUnmergeMergeToPlainValues(*MIs[0], MatchData63); |
2765 | return true; |
2766 | }() ) { |
2767 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_merge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_merge'\n" ; } } while (false); |
2768 | Helper.applyCombineUnmergeMergeToPlainValues(*MIs[0], MatchData63); |
2769 | return true; |
2770 | } |
2771 | } |
2772 | // Leaf name: unmerge_cst |
2773 | // Rule: unmerge_cst |
2774 | if (!RuleConfig->isRuleDisabled(64)) { |
2775 | if (1 |
2776 | && [&]() { |
2777 | return Helper.matchCombineUnmergeConstant(*MIs[0], MatchData64); |
2778 | return true; |
2779 | }() ) { |
2780 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_cst'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_cst'\n" ; } } while (false); |
2781 | Helper.applyCombineUnmergeConstant(*MIs[0], MatchData64); |
2782 | return true; |
2783 | } |
2784 | } |
2785 | // Leaf name: unmerge_dead_to_trunc |
2786 | // Rule: unmerge_dead_to_trunc |
2787 | if (!RuleConfig->isRuleDisabled(65)) { |
2788 | if (1 |
2789 | && [&]() { |
2790 | return Helper.matchCombineUnmergeWithDeadLanesToTrunc(*MIs[0]); |
2791 | return true; |
2792 | }() ) { |
2793 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n" ; } } while (false); |
2794 | Helper.applyCombineUnmergeWithDeadLanesToTrunc(*MIs[0]); |
2795 | return true; |
2796 | } |
2797 | } |
2798 | // Leaf name: unmerge_zext_to_zext |
2799 | // Rule: unmerge_zext_to_zext |
2800 | if (!RuleConfig->isRuleDisabled(66)) { |
2801 | if (1 |
2802 | && [&]() { |
2803 | return Helper.matchCombineUnmergeZExtToZExt(*MIs[0]); |
2804 | return true; |
2805 | }() ) { |
2806 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_zext_to_zext'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_zext_to_zext'\n" ; } } while (false); |
2807 | Helper.applyCombineUnmergeZExtToZExt(*MIs[0]); |
2808 | return true; |
2809 | } |
2810 | } |
2811 | return false; |
2812 | } |
2813 | if (Partition == 30 /* TargetOpcode::G_SELECT */) { |
2814 | // Leaf name: select_same_val |
2815 | // Rule: select_same_val |
2816 | if (!RuleConfig->isRuleDisabled(23)) { |
2817 | if (1 |
2818 | && [&]() { |
2819 | return Helper.matchSelectSameVal(*MIs[0]); |
2820 | return true; |
2821 | }() ) { |
2822 | LLVM_DEBUG(dbgs() << "Applying rule 'select_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'select_same_val'\n" ; } } while (false); |
2823 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
2824 | return true; |
2825 | } |
2826 | } |
2827 | // Leaf name: select_undef_cmp |
2828 | // Rule: select_undef_cmp |
2829 | if (!RuleConfig->isRuleDisabled(49)) { |
2830 | if (1 |
2831 | && [&]() { |
2832 | return Helper.matchUndefSelectCmp(*MIs[0]); |
2833 | return true; |
2834 | }() ) { |
2835 | LLVM_DEBUG(dbgs() << "Applying rule 'select_undef_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'select_undef_cmp'\n" ; } } while (false); |
2836 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
2837 | return true; |
2838 | } |
2839 | } |
2840 | // Leaf name: select_constant_cmp |
2841 | // Rule: select_constant_cmp |
2842 | if (!RuleConfig->isRuleDisabled(50)) { |
2843 | if (1 |
2844 | && [&]() { |
2845 | return Helper.matchConstantSelectCmp(*MIs[0], MatchData50); |
2846 | return true; |
2847 | }() ) { |
2848 | LLVM_DEBUG(dbgs() << "Applying rule 'select_constant_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'select_constant_cmp'\n" ; } } while (false); |
2849 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData50); |
2850 | return true; |
2851 | } |
2852 | } |
2853 | // Leaf name: select_to_logical |
2854 | // Rule: select_to_logical |
2855 | if (!RuleConfig->isRuleDisabled(51)) { |
2856 | if (1 |
2857 | && [&]() { |
2858 | return Helper.matchSelectToLogical(*MIs[0], MatchData51); |
2859 | return true; |
2860 | }() ) { |
2861 | LLVM_DEBUG(dbgs() << "Applying rule 'select_to_logical'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'select_to_logical'\n" ; } } while (false); |
2862 | Helper.applyBuildFn(*MIs[0], MatchData51); |
2863 | return true; |
2864 | } |
2865 | } |
2866 | // Leaf name: select_to_minmax |
2867 | // Rule: select_to_minmax |
2868 | if (!RuleConfig->isRuleDisabled(108)) { |
2869 | if (1 |
2870 | && [&]() { |
2871 | return Helper.matchSimplifySelectToMinMax(*MIs[0], MatchData108); |
2872 | return true; |
2873 | }() ) { |
2874 | LLVM_DEBUG(dbgs() << "Applying rule 'select_to_minmax'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'select_to_minmax'\n" ; } } while (false); |
2875 | Helper.applyBuildFn(*MIs[0], MatchData108); |
2876 | return true; |
2877 | } |
2878 | } |
2879 | // Leaf name: fcmp_select_to_fmin_fmax_legacy |
2880 | // Rule: fcmp_select_to_fmin_fmax_legacy |
2881 | if (!RuleConfig->isRuleDisabled(112)) { |
2882 | if (1 |
2883 | && ( |
2884 | // Predicate: HasFminFmaxLegacy |
2885 | Subtarget->hasFminFmaxLegacy() |
2886 | ) |
2887 | && [&]() { |
2888 | return PostLegalizerHelper.matchFMinFMaxLegacy(*MIs[0], MatchData112); |
2889 | return true; |
2890 | }() ) { |
2891 | LLVM_DEBUG(dbgs() << "Applying rule 'fcmp_select_to_fmin_fmax_legacy'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fcmp_select_to_fmin_fmax_legacy'\n" ; } } while (false); |
2892 | PostLegalizerHelper.applySelectFCmpToFMinToFMaxLegacy(*MIs[0], MatchData112); |
2893 | return true; |
2894 | } |
2895 | } |
2896 | return false; |
2897 | } |
2898 | if (Partition == 31 /* TargetOpcode::G_PTR_ADD */) { |
2899 | // Leaf name: right_identity_zero |
2900 | // Rule: right_identity_zero |
2901 | if (!RuleConfig->isRuleDisabled(24)) { |
2902 | if (1 |
2903 | && [&]() { |
2904 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2905 | return true; |
2906 | }() ) { |
2907 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2908 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2909 | return true; |
2910 | } |
2911 | } |
2912 | // Leaf name: reassoc_ptradd |
2913 | // Rule: reassoc_ptradd |
2914 | if (!RuleConfig->isRuleDisabled(43)) { |
2915 | if (1 |
2916 | && [&]() { |
2917 | return Helper.matchReassocPtrAdd(*MIs[0], MatchData43); |
2918 | return true; |
2919 | }() ) { |
2920 | LLVM_DEBUG(dbgs() << "Applying rule 'reassoc_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'reassoc_ptradd'\n" ; } } while (false); |
2921 | Helper.applyBuildFnNoErase(*MIs[0], MatchData43); |
2922 | return true; |
2923 | } |
2924 | } |
2925 | // Leaf name: ptr_add_immed_chain |
2926 | // Rule: ptr_add_immed_chain |
2927 | if (!RuleConfig->isRuleDisabled(44)) { |
2928 | if (1 |
2929 | && [&]() { |
2930 | return Helper.matchPtrAddImmedChain(*MIs[0], MatchData44); |
2931 | return true; |
2932 | }() ) { |
2933 | LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_immed_chain'\n" ; } } while (false); |
2934 | Helper.applyPtrAddImmedChain(*MIs[0], MatchData44); |
2935 | return true; |
2936 | } |
2937 | } |
2938 | // Leaf name: const_ptradd_to_i2p |
2939 | // Rule: const_ptradd_to_i2p |
2940 | if (!RuleConfig->isRuleDisabled(71)) { |
2941 | if (1 |
2942 | && [&]() { |
2943 | return Helper.matchCombineConstPtrAddToI2P(*MIs[0], MatchData71); |
2944 | return true; |
2945 | }() ) { |
2946 | LLVM_DEBUG(dbgs() << "Applying rule 'const_ptradd_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'const_ptradd_to_i2p'\n" ; } } while (false); |
2947 | Helper.applyCombineConstPtrAddToI2P(*MIs[0], MatchData71); |
2948 | return true; |
2949 | } |
2950 | } |
2951 | // Leaf name: ptr_add_with_zero |
2952 | // Rule: ptr_add_with_zero |
2953 | if (!RuleConfig->isRuleDisabled(79)) { |
2954 | if (1 |
2955 | && [&]() { |
2956 | return Helper.matchPtrAddZero(*MIs[0]); |
2957 | return true; |
2958 | }() ) { |
2959 | LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_with_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_with_zero'\n" ; } } while (false); |
2960 | Helper.applyPtrAddZero(*MIs[0]); |
2961 | return true; |
2962 | } |
2963 | } |
2964 | // Leaf name: fold_binop_into_select |
2965 | // Rule: fold_binop_into_select |
2966 | if (!RuleConfig->isRuleDisabled(106)) { |
2967 | if (1 |
2968 | && [&]() { |
2969 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2970 | return true; |
2971 | }() ) { |
2972 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2973 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
2974 | return true; |
2975 | } |
2976 | } |
2977 | return false; |
2978 | } |
2979 | if (Partition == 32 /* TargetOpcode::G_ROTL */) { |
2980 | // Leaf name: right_identity_zero |
2981 | // Rule: right_identity_zero |
2982 | if (!RuleConfig->isRuleDisabled(24)) { |
2983 | if (1 |
2984 | && [&]() { |
2985 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2986 | return true; |
2987 | }() ) { |
2988 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2989 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2990 | return true; |
2991 | } |
2992 | } |
2993 | return false; |
2994 | } |
2995 | if (Partition == 33 /* TargetOpcode::G_ROTR */) { |
2996 | // Leaf name: right_identity_zero |
2997 | // Rule: right_identity_zero |
2998 | if (!RuleConfig->isRuleDisabled(24)) { |
2999 | if (1 |
3000 | && [&]() { |
3001 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
3002 | return true; |
3003 | }() ) { |
3004 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
3005 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
3006 | return true; |
3007 | } |
3008 | } |
3009 | return false; |
3010 | } |
3011 | if (Partition == 34 /* TargetOpcode::G_SDIV */) { |
3012 | // Leaf name: binop_left_to_zero |
3013 | // Rule: binop_left_to_zero |
3014 | if (!RuleConfig->isRuleDisabled(26)) { |
3015 | if (1 |
3016 | && [&]() { |
3017 | return Helper.matchOperandIsZero(*MIs[0], 1); |
3018 | return true; |
3019 | }() ) { |
3020 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
3021 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
3022 | return true; |
3023 | } |
3024 | } |
3025 | // Leaf name: div_rem_to_divrem |
3026 | // Rule: div_rem_to_divrem |
3027 | if (!RuleConfig->isRuleDisabled(83)) { |
3028 | if (1 |
3029 | && [&]() { |
3030 | return Helper.matchCombineDivRem(*MIs[0], MatchData83); |
3031 | return true; |
3032 | }() ) { |
3033 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
3034 | Helper.applyCombineDivRem(*MIs[0], MatchData83); |
3035 | return true; |
3036 | } |
3037 | } |
3038 | // Leaf name: sdiv_by_const |
3039 | // Rule: sdiv_by_const |
3040 | if (!RuleConfig->isRuleDisabled(94)) { |
3041 | if (1 |
3042 | && [&]() { |
3043 | return Helper.matchSDivByConst(*MIs[0]); |
3044 | return true; |
3045 | }() ) { |
3046 | LLVM_DEBUG(dbgs() << "Applying rule 'sdiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'sdiv_by_const'\n" ; } } while (false); |
3047 | Helper.applySDivByConst(*MIs[0]); |
3048 | return true; |
3049 | } |
3050 | } |
3051 | // Leaf name: fold_binop_into_select |
3052 | // Rule: fold_binop_into_select |
3053 | if (!RuleConfig->isRuleDisabled(106)) { |
3054 | if (1 |
3055 | && [&]() { |
3056 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3057 | return true; |
3058 | }() ) { |
3059 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3060 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3061 | return true; |
3062 | } |
3063 | } |
3064 | return false; |
3065 | } |
3066 | if (Partition == 35 /* TargetOpcode::G_SREM */) { |
3067 | // Leaf name: binop_left_to_zero |
3068 | // Rule: binop_left_to_zero |
3069 | if (!RuleConfig->isRuleDisabled(26)) { |
3070 | if (1 |
3071 | && [&]() { |
3072 | return Helper.matchOperandIsZero(*MIs[0], 1); |
3073 | return true; |
3074 | }() ) { |
3075 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
3076 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
3077 | return true; |
3078 | } |
3079 | } |
3080 | // Leaf name: div_rem_to_divrem |
3081 | // Rule: div_rem_to_divrem |
3082 | if (!RuleConfig->isRuleDisabled(83)) { |
3083 | if (1 |
3084 | && [&]() { |
3085 | return Helper.matchCombineDivRem(*MIs[0], MatchData83); |
3086 | return true; |
3087 | }() ) { |
3088 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
3089 | Helper.applyCombineDivRem(*MIs[0], MatchData83); |
3090 | return true; |
3091 | } |
3092 | } |
3093 | // Leaf name: fold_binop_into_select |
3094 | // Rule: fold_binop_into_select |
3095 | if (!RuleConfig->isRuleDisabled(106)) { |
3096 | if (1 |
3097 | && [&]() { |
3098 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3099 | return true; |
3100 | }() ) { |
3101 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3102 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3103 | return true; |
3104 | } |
3105 | } |
3106 | return false; |
3107 | } |
3108 | if (Partition == 36 /* TargetOpcode::G_INTTOPTR */) { |
3109 | // Leaf name: p2i_to_i2p |
3110 | // Rule: p2i_to_i2p |
3111 | if (!RuleConfig->isRuleDisabled(28)) { |
3112 | if (1 |
3113 | && [&]() { |
3114 | return Helper.matchCombineI2PToP2I(*MIs[0], MatchData28); |
3115 | return true; |
3116 | }() ) { |
3117 | LLVM_DEBUG(dbgs() << "Applying rule 'p2i_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'p2i_to_i2p'\n" ; } } while (false); |
3118 | Helper.applyCombineI2PToP2I(*MIs[0], MatchData28); |
3119 | return true; |
3120 | } |
3121 | } |
3122 | return false; |
3123 | } |
3124 | if (Partition == 37 /* TargetOpcode::G_PTRTOINT */) { |
3125 | Partition = -1; |
3126 | if (MIs.size() <= 1) MIs.resize(2); |
3127 | MIs[1] = nullptr; |
3128 | if (MIs[0]->getOperand(1).isReg()) |
3129 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
3130 | if (MIs[1] != nullptr) Partition = 0; |
3131 | if (Partition == -1) return false; |
3132 | if (Partition == 0 /* true */) { |
3133 | Partition = -1; |
3134 | switch (MIs[1]->getOpcode()) { |
3135 | case TargetOpcode::G_INTTOPTR: Partition = 0; break; |
3136 | } |
3137 | // Default case but without conflicting with potential default case in selection. |
3138 | if (Partition == -1) return false; |
3139 | if (Partition == 0 /* TargetOpcode::G_INTTOPTR */) { |
3140 | // Leaf name: i2p_to_p2i |
3141 | // Rule: i2p_to_p2i |
3142 | if (!RuleConfig->isRuleDisabled(29)) { |
3143 | if (1 |
3144 | && [&]() { |
3145 | MatchData29 = MIs[1]->getOperand(1).getReg(); |
3146 | return true; |
3147 | }() ) { |
3148 | LLVM_DEBUG(dbgs() << "Applying rule 'i2p_to_p2i'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'i2p_to_p2i'\n" ; } } while (false); |
3149 | Helper.applyCombineP2IToI2P(*MIs[0], MatchData29); |
3150 | return true; |
3151 | } |
3152 | } |
3153 | return false; |
3154 | } |
3155 | } |
3156 | } |
3157 | if (Partition == 38 /* TargetOpcode::G_ANYEXT */) { |
3158 | // Leaf name: anyext_trunc_fold |
3159 | // Rule: anyext_trunc_fold |
3160 | if (!RuleConfig->isRuleDisabled(30)) { |
3161 | if (1 |
3162 | && [&]() { |
3163 | return Helper.matchCombineAnyExtTrunc(*MIs[0], MatchData30); |
3164 | return true; |
3165 | }() ) { |
3166 | LLVM_DEBUG(dbgs() << "Applying rule 'anyext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'anyext_trunc_fold'\n" ; } } while (false); |
3167 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData30); |
3168 | return true; |
3169 | } |
3170 | } |
3171 | // Leaf name: ext_ext_fold |
3172 | // Rule: ext_ext_fold |
3173 | if (!RuleConfig->isRuleDisabled(60)) { |
3174 | if (1 |
3175 | && [&]() { |
3176 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData60); |
3177 | return true; |
3178 | }() ) { |
3179 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
3180 | Helper.applyCombineExtOfExt(*MIs[0], MatchData60); |
3181 | return true; |
3182 | } |
3183 | } |
3184 | return false; |
3185 | } |
3186 | if (Partition == 39 /* TargetOpcode::G_FNEG */) { |
3187 | Partition = -1; |
3188 | if (MIs.size() <= 1) MIs.resize(2); |
3189 | MIs[1] = nullptr; |
3190 | if (MIs[0]->getOperand(1).isReg()) |
3191 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
3192 | if (MIs[1] == nullptr) Partition = 1; |
3193 | if (MIs[1] != nullptr) Partition = 0; |
3194 | if (Partition == -1) return false; |
3195 | if (Partition == 0 /* true */) { |
3196 | Partition = -1; |
Value stored to 'Partition' is never read | |
3197 | switch (MIs[1]->getOpcode()) { |
3198 | case TargetOpcode::G_FNEG: Partition = 0; break; |
3199 | default: Partition = 1; break; |
3200 | } |
3201 | // Default case but without conflicting with potential default case in selection. |
3202 | if (Partition == -1) return false; |
3203 | if (Partition == 0 /* TargetOpcode::G_FNEG */) { |
3204 | // Leaf name: fneg_fneg_fold |
3205 | // Rule: fneg_fneg_fold |
3206 | if (!RuleConfig->isRuleDisabled(31)) { |
3207 | if (1 |
3208 | && [&]() { |
3209 | MatchData31 = MIs[1]->getOperand(1).getReg(); |
3210 | return true; |
3211 | }() ) { |
3212 | LLVM_DEBUG(dbgs() << "Applying rule 'fneg_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fneg_fneg_fold'\n" ; } } while (false); |
3213 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData31); |
3214 | return true; |
3215 | } |
3216 | } |
3217 | // Leaf name: constant_fp_op |
3218 | // Rule: constant_fp_op |
3219 | if (!RuleConfig->isRuleDisabled(70)) { |
3220 | if (1 |
3221 | && [&]() { |
3222 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3223 | return true; |
3224 | }() ) { |
3225 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3226 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3227 | return true; |
3228 | } |
3229 | } |
3230 | // Leaf name: foldable_fneg |
3231 | // Rule: foldable_fneg |
3232 | if (!RuleConfig->isRuleDisabled(116)) { |
3233 | if (1 |
3234 | && [&]() { |
3235 | return Helper.matchFoldableFneg(*MIs[0], MatchData116); |
3236 | return true; |
3237 | }() ) { |
3238 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
3239 | Helper.applyFoldableFneg(*MIs[0], MatchData116); |
3240 | return true; |
3241 | } |
3242 | } |
3243 | return false; |
3244 | } |
3245 | if (Partition == 1 /* * or nullptr */) { |
3246 | // Leaf name: constant_fp_op |
3247 | // Rule: constant_fp_op |
3248 | if (!RuleConfig->isRuleDisabled(70)) { |
3249 | if (1 |
3250 | && [&]() { |
3251 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3252 | return true; |
3253 | }() ) { |
3254 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3255 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3256 | return true; |
3257 | } |
3258 | } |
3259 | // Leaf name: foldable_fneg |
3260 | // Rule: foldable_fneg |
3261 | if (!RuleConfig->isRuleDisabled(116)) { |
3262 | if (1 |
3263 | && [&]() { |
3264 | return Helper.matchFoldableFneg(*MIs[0], MatchData116); |
3265 | return true; |
3266 | }() ) { |
3267 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
3268 | Helper.applyFoldableFneg(*MIs[0], MatchData116); |
3269 | return true; |
3270 | } |
3271 | } |
3272 | return false; |
3273 | } |
3274 | } |
3275 | if (Partition == 1 /* false */) { |
3276 | // Leaf name: constant_fp_op |
3277 | // Rule: constant_fp_op |
3278 | if (!RuleConfig->isRuleDisabled(70)) { |
3279 | if (1 |
3280 | && [&]() { |
3281 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3282 | return true; |
3283 | }() ) { |
3284 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3285 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3286 | return true; |
3287 | } |
3288 | } |
3289 | // Leaf name: foldable_fneg |
3290 | // Rule: foldable_fneg |
3291 | if (!RuleConfig->isRuleDisabled(116)) { |
3292 | if (1 |
3293 | && [&]() { |
3294 | return Helper.matchFoldableFneg(*MIs[0], MatchData116); |
3295 | return true; |
3296 | }() ) { |
3297 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
3298 | Helper.applyFoldableFneg(*MIs[0], MatchData116); |
3299 | return true; |
3300 | } |
3301 | } |
3302 | return false; |
3303 | } |
3304 | } |
3305 | if (Partition == 40 /* TargetOpcode::G_BUILD_VECTOR_TRUNC */) { |
3306 | // Leaf name: buildvector_identity_fold |
3307 | // Rule: buildvector_identity_fold |
3308 | if (!RuleConfig->isRuleDisabled(34)) { |
3309 | if (1 |
3310 | && [&]() { |
3311 | return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34); |
3312 | return true; |
3313 | }() ) { |
3314 | LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n" ; } } while (false); |
3315 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34); |
3316 | return true; |
3317 | } |
3318 | } |
3319 | return false; |
3320 | } |
3321 | if (Partition == 41 /* TargetOpcode::G_BITCAST */) { |
3322 | Partition = -1; |
3323 | if (MIs.size() <= 1) MIs.resize(2); |
3324 | MIs[1] = nullptr; |
3325 | if (MIs[0]->getOperand(1).isReg()) |
3326 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
3327 | if (MIs[1] != nullptr) Partition = 0; |
3328 | if (Partition == -1) return false; |
3329 | if (Partition == 0 /* true */) { |
3330 | Partition = -1; |
3331 | switch (MIs[1]->getOpcode()) { |
3332 | case TargetOpcode::G_BITCAST: Partition = 0; break; |
3333 | } |
3334 | // Default case but without conflicting with potential default case in selection. |
3335 | if (Partition == -1) return false; |
3336 | if (Partition == 0 /* TargetOpcode::G_BITCAST */) { |
3337 | // Leaf name: bitcast_bitcast_fold |
3338 | // Rule: bitcast_bitcast_fold |
3339 | if (!RuleConfig->isRuleDisabled(37)) { |
3340 | if (1 |
3341 | && [&]() { |
3342 | return MRI.getType(MIs[1]->getOperand(1).getReg()) == MRI.getType(MIs[0]->getOperand(0).getReg()); |
3343 | return true; |
3344 | }() ) { |
3345 | LLVM_DEBUG(dbgs() << "Applying rule 'bitcast_bitcast_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitcast_bitcast_fold'\n" ; } } while (false); |
3346 | Helper.replaceSingleDefInstWithReg(*MIs[0], MIs[1]->getOperand(1).getReg()); |
3347 | return true; |
3348 | } |
3349 | } |
3350 | return false; |
3351 | } |
3352 | } |
3353 | } |
3354 | if (Partition == 42 /* TargetOpcode::G_FPTRUNC */) { |
3355 | Partition = -1; |
3356 | if (MIs.size() <= 1) MIs.resize(2); |
3357 | MIs[1] = nullptr; |
3358 | if (MIs[0]->getOperand(1).isReg()) |
3359 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
3360 | if (MIs[1] == nullptr) Partition = 1; |
3361 | if (MIs[1] != nullptr) Partition = 0; |
3362 | if (Partition == -1) return false; |
3363 | if (Partition == 0 /* true */) { |
3364 | Partition = -1; |
3365 | switch (MIs[1]->getOpcode()) { |
3366 | case TargetOpcode::G_FPEXT: Partition = 0; break; |
3367 | default: Partition = 1; break; |
3368 | } |
3369 | // Default case but without conflicting with potential default case in selection. |
3370 | if (Partition == -1) return false; |
3371 | if (Partition == 0 /* TargetOpcode::G_FPEXT */) { |
3372 | // Leaf name: fptrunc_fpext_fold |
3373 | // Rule: fptrunc_fpext_fold |
3374 | if (!RuleConfig->isRuleDisabled(38)) { |
3375 | if (1 |
3376 | && [&]() { |
3377 | return MRI.getType(MIs[1]->getOperand(1).getReg()) == MRI.getType(MIs[0]->getOperand(0).getReg()); |
3378 | return true; |
3379 | }() ) { |
3380 | LLVM_DEBUG(dbgs() << "Applying rule 'fptrunc_fpext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fptrunc_fpext_fold'\n" ; } } while (false); |
3381 | Helper.replaceSingleDefInstWithReg(*MIs[0], MIs[1]->getOperand(1).getReg()); |
3382 | return true; |
3383 | } |
3384 | } |
3385 | // Leaf name: constant_fp_op |
3386 | // Rule: constant_fp_op |
3387 | if (!RuleConfig->isRuleDisabled(70)) { |
3388 | if (1 |
3389 | && [&]() { |
3390 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3391 | return true; |
3392 | }() ) { |
3393 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3394 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3395 | return true; |
3396 | } |
3397 | } |
3398 | return false; |
3399 | } |
3400 | if (Partition == 1 /* * or nullptr */) { |
3401 | // Leaf name: constant_fp_op |
3402 | // Rule: constant_fp_op |
3403 | if (!RuleConfig->isRuleDisabled(70)) { |
3404 | if (1 |
3405 | && [&]() { |
3406 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3407 | return true; |
3408 | }() ) { |
3409 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3410 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3411 | return true; |
3412 | } |
3413 | } |
3414 | return false; |
3415 | } |
3416 | } |
3417 | if (Partition == 1 /* false */) { |
3418 | // Leaf name: constant_fp_op |
3419 | // Rule: constant_fp_op |
3420 | if (!RuleConfig->isRuleDisabled(70)) { |
3421 | if (1 |
3422 | && [&]() { |
3423 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3424 | return true; |
3425 | }() ) { |
3426 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3427 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3428 | return true; |
3429 | } |
3430 | } |
3431 | return false; |
3432 | } |
3433 | } |
3434 | if (Partition == 43 /* TargetOpcode::G_PHI */) { |
3435 | // Leaf name: extend_through_phis |
3436 | // Rule: extend_through_phis |
3437 | if (!RuleConfig->isRuleDisabled(39)) { |
3438 | if (1 |
3439 | && [&]() { |
3440 | return Helper.matchExtendThroughPhis(*MIs[0], MatchData39); |
3441 | return true; |
3442 | }() ) { |
3443 | LLVM_DEBUG(dbgs() << "Applying rule 'extend_through_phis'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'extend_through_phis'\n" ; } } while (false); |
3444 | Helper.applyExtendThroughPhis(*MIs[0], MatchData39); |
3445 | return true; |
3446 | } |
3447 | } |
3448 | return false; |
3449 | } |
3450 | if (Partition == 44 /* TargetOpcode::G_SEXT_INREG */) { |
3451 | // Leaf name: sext_inreg_of_load |
3452 | // Rule: sext_inreg_of_load |
3453 | if (!RuleConfig->isRuleDisabled(46)) { |
3454 | if (1 |
3455 | && [&]() { |
3456 | return Helper.matchSextInRegOfLoad(*MIs[0], MatchData46); |
3457 | return true; |
3458 | }() ) { |
3459 | LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_of_load'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_of_load'\n" ; } } while (false); |
3460 | Helper.applySextInRegOfLoad(*MIs[0], MatchData46); |
3461 | return true; |
3462 | } |
3463 | } |
3464 | // Leaf name: redundant_sext_inreg |
3465 | // Rule: redundant_sext_inreg |
3466 | if (!RuleConfig->isRuleDisabled(53)) { |
3467 | if (1 |
3468 | && [&]() { |
3469 | return Helper.matchRedundantSExtInReg(*MIs[0]); |
3470 | return true; |
3471 | }() ) { |
3472 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_sext_inreg'\n" ; } } while (false); |
3473 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
3474 | return true; |
3475 | } |
3476 | } |
3477 | // Leaf name: sext_inreg_to_zext_inreg |
3478 | // Rule: sext_inreg_to_zext_inreg |
3479 | if (!RuleConfig->isRuleDisabled(59)) { |
3480 | if (1 |
3481 | && [&]() { |
3482 | |
3483 | unsigned BitWidth = MRI.getType(MIs[0]->getOperand(1).getReg()).getScalarSizeInBits(); |
3484 | return Helper.getKnownBits()->maskedValueIsZero(MIs[0]->getOperand(1).getReg(), |
3485 | APInt::getOneBitSet(BitWidth, MIs[0]->getOperand(2).getImm() - 1)); |
3486 | return true; |
3487 | }() ) { |
3488 | LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n" ; } } while (false); |
3489 | |
3490 | Helper.getBuilder().setInstrAndDebugLoc(*MIs[0]); |
3491 | Helper.getBuilder().buildZExtInReg(MIs[0]->getOperand(0), MIs[0]->getOperand(1), MIs[0]->getOperand(2).getImm()); |
3492 | MIs[0]->eraseFromParent(); |
3493 | return true; |
3494 | |
3495 | return true; |
3496 | } |
3497 | } |
3498 | // Leaf name: bitfield_extract_from_sext_inreg |
3499 | // Rule: bitfield_extract_from_sext_inreg |
3500 | if (!RuleConfig->isRuleDisabled(87)) { |
3501 | if (1 |
3502 | && [&]() { |
3503 | return Helper.matchBitfieldExtractFromSExtInReg(*MIs[0], MatchData87); |
3504 | return true; |
3505 | }() ) { |
3506 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n" ; } } while (false); |
3507 | Helper.applyBuildFn(*MIs[0], MatchData87); |
3508 | return true; |
3509 | } |
3510 | } |
3511 | // Leaf name: sign_extension_in_reg |
3512 | // Rule: sign_extension_in_reg |
3513 | if (!RuleConfig->isRuleDisabled(118)) { |
3514 | if (1 |
3515 | && [&]() { |
3516 | return PostLegalizerHelper.matchCombineSignExtendInReg(*MIs[0], MatchData118); |
3517 | return true; |
3518 | }() ) { |
3519 | LLVM_DEBUG(dbgs() << "Applying rule 'sign_extension_in_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'sign_extension_in_reg'\n" ; } } while (false); |
3520 | PostLegalizerHelper.applyCombineSignExtendInReg(*MIs[0], MatchData118); |
3521 | return true; |
3522 | } |
3523 | } |
3524 | return false; |
3525 | } |
3526 | if (Partition == 45 /* TargetOpcode::G_ZEXT */) { |
3527 | // Leaf name: zext_trunc_fold |
3528 | // Rule: zext_trunc_fold |
3529 | if (!RuleConfig->isRuleDisabled(56)) { |
3530 | if (1 |
3531 | && [&]() { |
3532 | return Helper.matchCombineZextTrunc(*MIs[0], MatchData56); |
3533 | return true; |
3534 | }() ) { |
3535 | LLVM_DEBUG(dbgs() << "Applying rule 'zext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'zext_trunc_fold'\n" ; } } while (false); |
3536 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData56); |
3537 | return true; |
3538 | } |
3539 | } |
3540 | // Leaf name: ext_ext_fold |
3541 | // Rule: ext_ext_fold |
3542 | if (!RuleConfig->isRuleDisabled(60)) { |
3543 | if (1 |
3544 | && [&]() { |
3545 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData60); |
3546 | return true; |
3547 | }() ) { |
3548 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
3549 | Helper.applyCombineExtOfExt(*MIs[0], MatchData60); |
3550 | return true; |
3551 | } |
3552 | } |
3553 | return false; |
3554 | } |
3555 | if (Partition == 46 /* TargetOpcode::G_ICMP */) { |
3556 | // Leaf name: icmp_to_true_false_known_bits |
3557 | // Rule: icmp_to_true_false_known_bits |
3558 | if (!RuleConfig->isRuleDisabled(57)) { |
3559 | if (1 |
3560 | && [&]() { |
3561 | return Helper.matchICmpToTrueFalseKnownBits(*MIs[0], MatchData57); |
3562 | return true; |
3563 | }() ) { |
3564 | LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n" ; } } while (false); |
3565 | Helper.replaceInstWithConstant(*MIs[0], MatchData57); |
3566 | return true; |
3567 | } |
3568 | } |
3569 | // Leaf name: icmp_to_lhs_known_bits |
3570 | // Rule: icmp_to_lhs_known_bits |
3571 | if (!RuleConfig->isRuleDisabled(58)) { |
3572 | if (1 |
3573 | && [&]() { |
3574 | return Helper.matchICmpToLHSKnownBits(*MIs[0], MatchData58); |
3575 | return true; |
3576 | }() ) { |
3577 | LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n" ; } } while (false); |
3578 | Helper.applyBuildFn(*MIs[0], MatchData58); |
3579 | return true; |
3580 | } |
3581 | } |
3582 | // Leaf name: redundant_binop_in_equality |
3583 | // Rule: redundant_binop_in_equality |
3584 | if (!RuleConfig->isRuleDisabled(109)) { |
3585 | if (1 |
3586 | && [&]() { |
3587 | return Helper.matchRedundantBinOpInEquality(*MIs[0], MatchData109); |
3588 | return true; |
3589 | }() ) { |
3590 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_binop_in_equality'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_binop_in_equality'\n" ; } } while (false); |
3591 | Helper.applyBuildFn(*MIs[0], MatchData109); |
3592 | return true; |
3593 | } |
3594 | } |
3595 | return false; |
3596 | } |
3597 | if (Partition == 47 /* TargetOpcode::G_SEXT */) { |
3598 | // Leaf name: ext_ext_fold |
3599 | // Rule: ext_ext_fold |
3600 | if (!RuleConfig->isRuleDisabled(60)) { |
3601 | if (1 |
3602 | && [&]() { |
3603 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData60); |
3604 | return true; |
3605 | }() ) { |
3606 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
3607 | Helper.applyCombineExtOfExt(*MIs[0], MatchData60); |
3608 | return true; |
3609 | } |
3610 | } |
3611 | return false; |
3612 | } |
3613 | if (Partition == 48 /* TargetOpcode::G_BR */) { |
3614 | // Leaf name: opt_brcond_by_inverting_cond |
3615 | // Rule: opt_brcond_by_inverting_cond |
3616 | if (!RuleConfig->isRuleDisabled(62)) { |
3617 | if (1 |
3618 | && [&]() { |
3619 | return Helper.matchOptBrCondByInvertingCond(*MIs[0], MatchData62); |
3620 | return true; |
3621 | }() ) { |
3622 | LLVM_DEBUG(dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n" ; } } while (false); |
3623 | Helper.applyOptBrCondByInvertingCond(*MIs[0], MatchData62); |
3624 | return true; |
3625 | } |
3626 | } |
3627 | return false; |
3628 | } |
3629 | if (Partition == 49 /* TargetOpcode::G_MERGE_VALUES */) { |
3630 | // Leaf name: merge_unmerge |
3631 | // Rule: merge_unmerge |
3632 | if (!RuleConfig->isRuleDisabled(67)) { |
3633 | if (1 |
3634 | && [&]() { |
3635 | return Helper.matchCombineMergeUnmerge(*MIs[0], MatchData67); |
3636 | return true; |
3637 | }() ) { |
3638 | LLVM_DEBUG(dbgs() << "Applying rule 'merge_unmerge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'merge_unmerge'\n" ; } } while (false); |
3639 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData67); |
3640 | return true; |
3641 | } |
3642 | } |
3643 | return false; |
3644 | } |
3645 | if (Partition == 50 /* TargetOpcode::G_FSQRT */) { |
3646 | // Leaf name: constant_fp_op |
3647 | // Rule: constant_fp_op |
3648 | if (!RuleConfig->isRuleDisabled(70)) { |
3649 | if (1 |
3650 | && [&]() { |
3651 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3652 | return true; |
3653 | }() ) { |
3654 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3655 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3656 | return true; |
3657 | } |
3658 | } |
3659 | // Leaf name: rcp_sqrt_to_rsq |
3660 | // Rule: rcp_sqrt_to_rsq |
3661 | if (!RuleConfig->isRuleDisabled(117)) { |
3662 | if (1 |
3663 | && [&]() { |
3664 | return PostLegalizerHelper.matchRcpSqrtToRsq(*MIs[0], MatchData117); |
3665 | return true; |
3666 | }() ) { |
3667 | LLVM_DEBUG(dbgs() << "Applying rule 'rcp_sqrt_to_rsq'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'rcp_sqrt_to_rsq'\n" ; } } while (false); |
3668 | Helper.applyBuildFn(*MIs[0], MatchData117); |
3669 | return true; |
3670 | } |
3671 | } |
3672 | return false; |
3673 | } |
3674 | if (Partition == 51 /* TargetOpcode::G_FLOG2 */) { |
3675 | // Leaf name: constant_fp_op |
3676 | // Rule: constant_fp_op |
3677 | if (!RuleConfig->isRuleDisabled(70)) { |
3678 | if (1 |
3679 | && [&]() { |
3680 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3681 | return true; |
3682 | }() ) { |
3683 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3684 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
3685 | return true; |
3686 | } |
3687 | } |
3688 | return false; |
3689 | } |
3690 | if (Partition == 52 /* TargetOpcode::G_UMULO */) { |
3691 | // Leaf name: mulo_by_2 |
3692 | // Rule: mulo_by_2 |
3693 | if (!RuleConfig->isRuleDisabled(73)) { |
3694 | if (1 |
3695 | && [&]() { |
3696 | return Helper.matchMulOBy2(*MIs[0], MatchData73); |
3697 | return true; |
3698 | }() ) { |
3699 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n" ; } } while (false); |
3700 | Helper.applyBuildFnNoErase(*MIs[0], MatchData73); |
3701 | return true; |
3702 | } |
3703 | } |
3704 | // Leaf name: mulo_by_0 |
3705 | // Rule: mulo_by_0 |
3706 | if (!RuleConfig->isRuleDisabled(74)) { |
3707 | if (1 |
3708 | && [&]() { |
3709 | return Helper.matchMulOBy0(*MIs[0], MatchData74); |
3710 | return true; |
3711 | }() ) { |
3712 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n" ; } } while (false); |
3713 | Helper.applyBuildFn(*MIs[0], MatchData74); |
3714 | return true; |
3715 | } |
3716 | } |
3717 | return false; |
3718 | } |
3719 | if (Partition == 53 /* TargetOpcode::G_SMULO */) { |
3720 | // Leaf name: mulo_by_2 |
3721 | // Rule: mulo_by_2 |
3722 | if (!RuleConfig->isRuleDisabled(73)) { |
3723 | if (1 |
3724 | && [&]() { |
3725 | return Helper.matchMulOBy2(*MIs[0], MatchData73); |
3726 | return true; |
3727 | }() ) { |
3728 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n" ; } } while (false); |
3729 | Helper.applyBuildFnNoErase(*MIs[0], MatchData73); |
3730 | return true; |
3731 | } |
3732 | } |
3733 | // Leaf name: mulo_by_0 |
3734 | // Rule: mulo_by_0 |
3735 | if (!RuleConfig->isRuleDisabled(74)) { |
3736 | if (1 |
3737 | && [&]() { |
3738 | return Helper.matchMulOBy0(*MIs[0], MatchData74); |
3739 | return true; |
3740 | }() ) { |
3741 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n" ; } } while (false); |
3742 | Helper.applyBuildFn(*MIs[0], MatchData74); |
3743 | return true; |
3744 | } |
3745 | } |
3746 | return false; |
3747 | } |
3748 | if (Partition == 54 /* TargetOpcode::G_UADDO */) { |
3749 | // Leaf name: addo_by_0 |
3750 | // Rule: addo_by_0 |
3751 | if (!RuleConfig->isRuleDisabled(75)) { |
3752 | if (1 |
3753 | && [&]() { |
3754 | return Helper.matchAddOBy0(*MIs[0], MatchData75); |
3755 | return true; |
3756 | }() ) { |
3757 | LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n" ; } } while (false); |
3758 | Helper.applyBuildFn(*MIs[0], MatchData75); |
3759 | return true; |
3760 | } |
3761 | } |
3762 | return false; |
3763 | } |
3764 | if (Partition == 55 /* TargetOpcode::G_SADDO */) { |
3765 | // Leaf name: addo_by_0 |
3766 | // Rule: addo_by_0 |
3767 | if (!RuleConfig->isRuleDisabled(75)) { |
3768 | if (1 |
3769 | && [&]() { |
3770 | return Helper.matchAddOBy0(*MIs[0], MatchData75); |
3771 | return true; |
3772 | }() ) { |
3773 | LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n" ; } } while (false); |
3774 | Helper.applyBuildFn(*MIs[0], MatchData75); |
3775 | return true; |
3776 | } |
3777 | } |
3778 | return false; |
3779 | } |
3780 | if (Partition == 56 /* TargetOpcode::G_UADDE */) { |
3781 | // Leaf name: adde_to_addo |
3782 | // Rule: adde_to_addo |
3783 | if (!RuleConfig->isRuleDisabled(76)) { |
3784 | if (1 |
3785 | && [&]() { |
3786 | return Helper.matchAddEToAddO(*MIs[0], MatchData76); |
3787 | return true; |
3788 | }() ) { |
3789 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
3790 | Helper.applyBuildFnNoErase(*MIs[0], MatchData76); |
3791 | return true; |
3792 | } |
3793 | } |
3794 | return false; |
3795 | } |
3796 | if (Partition == 57 /* TargetOpcode::G_SADDE */) { |
3797 | // Leaf name: adde_to_addo |
3798 | // Rule: adde_to_addo |
3799 | if (!RuleConfig->isRuleDisabled(76)) { |
3800 | if (1 |
3801 | && [&]() { |
3802 | return Helper.matchAddEToAddO(*MIs[0], MatchData76); |
3803 | return true; |
3804 | }() ) { |
3805 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
3806 | Helper.applyBuildFnNoErase(*MIs[0], MatchData76); |
3807 | return true; |
3808 | } |
3809 | } |
3810 | return false; |
3811 | } |
3812 | if (Partition == 58 /* TargetOpcode::G_USUBE */) { |
3813 | // Leaf name: adde_to_addo |
3814 | // Rule: adde_to_addo |
3815 | if (!RuleConfig->isRuleDisabled(76)) { |
3816 | if (1 |
3817 | && [&]() { |
3818 | return Helper.matchAddEToAddO(*MIs[0], MatchData76); |
3819 | return true; |
3820 | }() ) { |
3821 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
3822 | Helper.applyBuildFnNoErase(*MIs[0], MatchData76); |
3823 | return true; |
3824 | } |
3825 | } |
3826 | return false; |
3827 | } |
3828 | if (Partition == 59 /* TargetOpcode::G_SSUBE */) { |
3829 | // Leaf name: adde_to_addo |
3830 | // Rule: adde_to_addo |
3831 | if (!RuleConfig->isRuleDisabled(76)) { |
3832 | if (1 |
3833 | && [&]() { |
3834 | return Helper.matchAddEToAddO(*MIs[0], MatchData76); |
3835 | return true; |
3836 | }() ) { |
3837 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
3838 | Helper.applyBuildFnNoErase(*MIs[0], MatchData76); |
3839 | return true; |
3840 | } |
3841 | } |
3842 | return false; |
3843 | } |
3844 | if (Partition == 60 /* TargetOpcode::G_FMINNUM */) { |
3845 | // Leaf name: combine_minmax_nan |
3846 | // Rule: combine_minmax_nan |
3847 | if (!RuleConfig->isRuleDisabled(77)) { |
3848 | if (1 |
3849 | && [&]() { |
3850 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77); |
3851 | return true; |
3852 | }() ) { |
3853 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
3854 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77); |
3855 | return true; |
3856 | } |
3857 | } |
3858 | // Leaf name: fold_binop_into_select |
3859 | // Rule: fold_binop_into_select |
3860 | if (!RuleConfig->isRuleDisabled(106)) { |
3861 | if (1 |
3862 | && [&]() { |
3863 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3864 | return true; |
3865 | }() ) { |
3866 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3867 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3868 | return true; |
3869 | } |
3870 | } |
3871 | return false; |
3872 | } |
3873 | if (Partition == 61 /* TargetOpcode::G_FMAXNUM */) { |
3874 | // Leaf name: combine_minmax_nan |
3875 | // Rule: combine_minmax_nan |
3876 | if (!RuleConfig->isRuleDisabled(77)) { |
3877 | if (1 |
3878 | && [&]() { |
3879 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77); |
3880 | return true; |
3881 | }() ) { |
3882 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
3883 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77); |
3884 | return true; |
3885 | } |
3886 | } |
3887 | // Leaf name: fold_binop_into_select |
3888 | // Rule: fold_binop_into_select |
3889 | if (!RuleConfig->isRuleDisabled(106)) { |
3890 | if (1 |
3891 | && [&]() { |
3892 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3893 | return true; |
3894 | }() ) { |
3895 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3896 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3897 | return true; |
3898 | } |
3899 | } |
3900 | return false; |
3901 | } |
3902 | if (Partition == 62 /* TargetOpcode::G_FMINIMUM */) { |
3903 | // Leaf name: combine_minmax_nan |
3904 | // Rule: combine_minmax_nan |
3905 | if (!RuleConfig->isRuleDisabled(77)) { |
3906 | if (1 |
3907 | && [&]() { |
3908 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77); |
3909 | return true; |
3910 | }() ) { |
3911 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
3912 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77); |
3913 | return true; |
3914 | } |
3915 | } |
3916 | // Leaf name: fold_binop_into_select |
3917 | // Rule: fold_binop_into_select |
3918 | if (!RuleConfig->isRuleDisabled(106)) { |
3919 | if (1 |
3920 | && [&]() { |
3921 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3922 | return true; |
3923 | }() ) { |
3924 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3925 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3926 | return true; |
3927 | } |
3928 | } |
3929 | return false; |
3930 | } |
3931 | if (Partition == 63 /* TargetOpcode::G_FMAXIMUM */) { |
3932 | // Leaf name: combine_minmax_nan |
3933 | // Rule: combine_minmax_nan |
3934 | if (!RuleConfig->isRuleDisabled(77)) { |
3935 | if (1 |
3936 | && [&]() { |
3937 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77); |
3938 | return true; |
3939 | }() ) { |
3940 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
3941 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77); |
3942 | return true; |
3943 | } |
3944 | } |
3945 | // Leaf name: fold_binop_into_select |
3946 | // Rule: fold_binop_into_select |
3947 | if (!RuleConfig->isRuleDisabled(106)) { |
3948 | if (1 |
3949 | && [&]() { |
3950 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3951 | return true; |
3952 | }() ) { |
3953 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3954 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
3955 | return true; |
3956 | } |
3957 | } |
3958 | return false; |
3959 | } |
3960 | if (Partition == 64 /* TargetOpcode::G_SSHLSAT */) { |
3961 | // Leaf name: shift_immed_chain |
3962 | // Rule: shift_immed_chain |
3963 | if (!RuleConfig->isRuleDisabled(80)) { |
3964 | if (1 |
3965 | && [&]() { |
3966 | return Helper.matchShiftImmedChain(*MIs[0], MatchData80); |
3967 | return true; |
3968 | }() ) { |
3969 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
3970 | Helper.applyShiftImmedChain(*MIs[0], MatchData80); |
3971 | return true; |
3972 | } |
3973 | } |
3974 | // Leaf name: shift_of_shifted_logic_chain |
3975 | // Rule: shift_of_shifted_logic_chain |
3976 | if (!RuleConfig->isRuleDisabled(81)) { |
3977 | if (1 |
3978 | && [&]() { |
3979 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81); |
3980 | return true; |
3981 | }() ) { |
3982 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
3983 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81); |
3984 | return true; |
3985 | } |
3986 | } |
3987 | return false; |
3988 | } |
3989 | if (Partition == 65 /* TargetOpcode::G_USHLSAT */) { |
3990 | // Leaf name: shift_immed_chain |
3991 | // Rule: shift_immed_chain |
3992 | if (!RuleConfig->isRuleDisabled(80)) { |
3993 | if (1 |
3994 | && [&]() { |
3995 | return Helper.matchShiftImmedChain(*MIs[0], MatchData80); |
3996 | return true; |
3997 | }() ) { |
3998 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
3999 | Helper.applyShiftImmedChain(*MIs[0], MatchData80); |
4000 | return true; |
4001 | } |
4002 | } |
4003 | // Leaf name: shift_of_shifted_logic_chain |
4004 | // Rule: shift_of_shifted_logic_chain |
4005 | if (!RuleConfig->isRuleDisabled(81)) { |
4006 | if (1 |
4007 | && [&]() { |
4008 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81); |
4009 | return true; |
4010 | }() ) { |
4011 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
4012 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81); |
4013 | return true; |
4014 | } |
4015 | } |
4016 | return false; |
4017 | } |
4018 | if (Partition == 66 /* TargetOpcode::G_FSHL */) { |
4019 | // Leaf name: funnel_shift_to_rotate |
4020 | // Rule: funnel_shift_to_rotate |
4021 | if (!RuleConfig->isRuleDisabled(85)) { |
4022 | if (1 |
4023 | && [&]() { |
4024 | return Helper.matchFunnelShiftToRotate(*MIs[0]); |
4025 | return true; |
4026 | }() ) { |
4027 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n" ; } } while (false); |
4028 | Helper.applyFunnelShiftToRotate(*MIs[0]); |
4029 | return true; |
4030 | } |
4031 | } |
4032 | return false; |
4033 | } |
4034 | if (Partition == 67 /* TargetOpcode::G_FSHR */) { |
4035 | // Leaf name: funnel_shift_to_rotate |
4036 | // Rule: funnel_shift_to_rotate |
4037 | if (!RuleConfig->isRuleDisabled(85)) { |
4038 | if (1 |
4039 | && [&]() { |
4040 | return Helper.matchFunnelShiftToRotate(*MIs[0]); |
4041 | return true; |
4042 | }() ) { |
4043 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n" ; } } while (false); |
4044 | Helper.applyFunnelShiftToRotate(*MIs[0]); |
4045 | return true; |
4046 | } |
4047 | } |
4048 | return false; |
4049 | } |
4050 | if (Partition == 68 /* TargetOpcode::G_UMULH */) { |
4051 | // Leaf name: mulh_to_lshr |
4052 | // Rule: mulh_to_lshr |
4053 | if (!RuleConfig->isRuleDisabled(95)) { |
4054 | if (1 |
4055 | && [&]() { |
4056 | return Helper.matchUMulHToLShr(*MIs[0]); |
4057 | return true; |
4058 | }() ) { |
4059 | LLVM_DEBUG(dbgs() << "Applying rule 'mulh_to_lshr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'mulh_to_lshr'\n" ; } } while (false); |
4060 | Helper.applyUMulHToLShr(*MIs[0]); |
4061 | return true; |
4062 | } |
4063 | } |
4064 | return false; |
4065 | } |
4066 | if (Partition == 69 /* TargetOpcode::G_FADD */) { |
4067 | // Leaf name: redundant_neg_operands |
4068 | // Rule: redundant_neg_operands |
4069 | if (!RuleConfig->isRuleDisabled(96)) { |
4070 | if (1 |
4071 | && [&]() { |
4072 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
4073 | return true; |
4074 | }() ) { |
4075 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
4076 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
4077 | return true; |
4078 | } |
4079 | } |
4080 | // Leaf name: combine_fadd_fmul_to_fmad_or_fma |
4081 | // Rule: combine_fadd_fmul_to_fmad_or_fma |
4082 | if (!RuleConfig->isRuleDisabled(98)) { |
4083 | if (1 |
4084 | && [&]() { |
4085 | return Helper.matchCombineFAddFMulToFMadOrFMA(*MIs[0], |
4086 | MatchData98); |
4087 | return true; |
4088 | }() ) { |
4089 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n" ; } } while (false); |
4090 | Helper.applyBuildFn(*MIs[0], MatchData98); |
4091 | return true; |
4092 | } |
4093 | } |
4094 | // Leaf name: combine_fadd_fpext_fmul_to_fmad_or_fma |
4095 | // Rule: combine_fadd_fpext_fmul_to_fmad_or_fma |
4096 | if (!RuleConfig->isRuleDisabled(99)) { |
4097 | if (1 |
4098 | && [&]() { |
4099 | return Helper.matchCombineFAddFpExtFMulToFMadOrFMA(*MIs[0], |
4100 | MatchData99); |
4101 | return true; |
4102 | }() ) { |
4103 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n" ; } } while (false); |
4104 | Helper.applyBuildFn(*MIs[0], MatchData99); |
4105 | return true; |
4106 | } |
4107 | } |
4108 | // Leaf name: combine_fadd_fma_fmul_to_fmad_or_fma |
4109 | // Rule: combine_fadd_fma_fmul_to_fmad_or_fma |
4110 | if (!RuleConfig->isRuleDisabled(100)) { |
4111 | if (1 |
4112 | && [&]() { |
4113 | return Helper.matchCombineFAddFMAFMulToFMadOrFMA(*MIs[0], |
4114 | MatchData100); |
4115 | return true; |
4116 | }() ) { |
4117 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n" ; } } while (false); |
4118 | Helper.applyBuildFn(*MIs[0], MatchData100); |
4119 | return true; |
4120 | } |
4121 | } |
4122 | // Leaf name: combine_fadd_fpext_fma_fmul_to_fmad_or_fma |
4123 | // Rule: combine_fadd_fpext_fma_fmul_to_fmad_or_fma |
4124 | if (!RuleConfig->isRuleDisabled(101)) { |
4125 | if (1 |
4126 | && [&]() { |
4127 | return Helper.matchCombineFAddFpExtFMulToFMadOrFMAAggressive( |
4128 | *MIs[0], MatchData101); |
4129 | return true; |
4130 | }() ) { |
4131 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n" ; } } while (false); |
4132 | Helper.applyBuildFn(*MIs[0], MatchData101); |
4133 | return true; |
4134 | } |
4135 | } |
4136 | // Leaf name: fold_binop_into_select |
4137 | // Rule: fold_binop_into_select |
4138 | if (!RuleConfig->isRuleDisabled(106)) { |
4139 | if (1 |
4140 | && [&]() { |
4141 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4142 | return true; |
4143 | }() ) { |
4144 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4145 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4146 | return true; |
4147 | } |
4148 | } |
4149 | return false; |
4150 | } |
4151 | if (Partition == 70 /* TargetOpcode::G_FSUB */) { |
4152 | // Leaf name: redundant_neg_operands |
4153 | // Rule: redundant_neg_operands |
4154 | if (!RuleConfig->isRuleDisabled(96)) { |
4155 | if (1 |
4156 | && [&]() { |
4157 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
4158 | return true; |
4159 | }() ) { |
4160 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
4161 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
4162 | return true; |
4163 | } |
4164 | } |
4165 | // Leaf name: combine_fsub_fmul_to_fmad_or_fma |
4166 | // Rule: combine_fsub_fmul_to_fmad_or_fma |
4167 | if (!RuleConfig->isRuleDisabled(102)) { |
4168 | if (1 |
4169 | && [&]() { |
4170 | return Helper.matchCombineFSubFMulToFMadOrFMA(*MIs[0], |
4171 | MatchData102); |
4172 | return true; |
4173 | }() ) { |
4174 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n" ; } } while (false); |
4175 | Helper.applyBuildFn(*MIs[0], MatchData102); |
4176 | return true; |
4177 | } |
4178 | } |
4179 | // Leaf name: combine_fsub_fneg_fmul_to_fmad_or_fma |
4180 | // Rule: combine_fsub_fneg_fmul_to_fmad_or_fma |
4181 | if (!RuleConfig->isRuleDisabled(103)) { |
4182 | if (1 |
4183 | && [&]() { |
4184 | return Helper.matchCombineFSubFNegFMulToFMadOrFMA(*MIs[0], |
4185 | MatchData103); |
4186 | return true; |
4187 | }() ) { |
4188 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n" ; } } while (false); |
4189 | Helper.applyBuildFn(*MIs[0], MatchData103); |
4190 | return true; |
4191 | } |
4192 | } |
4193 | // Leaf name: combine_fsub_fpext_fmul_to_fmad_or_fma |
4194 | // Rule: combine_fsub_fpext_fmul_to_fmad_or_fma |
4195 | if (!RuleConfig->isRuleDisabled(104)) { |
4196 | if (1 |
4197 | && [&]() { |
4198 | return Helper.matchCombineFSubFpExtFMulToFMadOrFMA(*MIs[0], |
4199 | MatchData104); |
4200 | return true; |
4201 | }() ) { |
4202 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n" ; } } while (false); |
4203 | Helper.applyBuildFn(*MIs[0], MatchData104); |
4204 | return true; |
4205 | } |
4206 | } |
4207 | // Leaf name: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma |
4208 | // Rule: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma |
4209 | if (!RuleConfig->isRuleDisabled(105)) { |
4210 | if (1 |
4211 | && [&]() { |
4212 | return Helper.matchCombineFSubFpExtFNegFMulToFMadOrFMA( |
4213 | *MIs[0], MatchData105); |
4214 | return true; |
4215 | }() ) { |
4216 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n" ; } } while (false); |
4217 | Helper.applyBuildFn(*MIs[0], MatchData105); |
4218 | return true; |
4219 | } |
4220 | } |
4221 | // Leaf name: fold_binop_into_select |
4222 | // Rule: fold_binop_into_select |
4223 | if (!RuleConfig->isRuleDisabled(106)) { |
4224 | if (1 |
4225 | && [&]() { |
4226 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4227 | return true; |
4228 | }() ) { |
4229 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4230 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4231 | return true; |
4232 | } |
4233 | } |
4234 | // Leaf name: fsub_to_fneg |
4235 | // Rule: fsub_to_fneg |
4236 | if (!RuleConfig->isRuleDisabled(110)) { |
4237 | if (1 |
4238 | && [&]() { |
4239 | return Helper.matchFsubToFneg(*MIs[0], MatchData110); |
4240 | return true; |
4241 | }() ) { |
4242 | LLVM_DEBUG(dbgs() << "Applying rule 'fsub_to_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fsub_to_fneg'\n" ; } } while (false); |
4243 | Helper.applyFsubToFneg(*MIs[0], MatchData110); |
4244 | return true; |
4245 | } |
4246 | } |
4247 | return false; |
4248 | } |
4249 | if (Partition == 71 /* TargetOpcode::G_FMUL */) { |
4250 | // Leaf name: redundant_neg_operands |
4251 | // Rule: redundant_neg_operands |
4252 | if (!RuleConfig->isRuleDisabled(96)) { |
4253 | if (1 |
4254 | && [&]() { |
4255 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
4256 | return true; |
4257 | }() ) { |
4258 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
4259 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
4260 | return true; |
4261 | } |
4262 | } |
4263 | // Leaf name: fold_binop_into_select |
4264 | // Rule: fold_binop_into_select |
4265 | if (!RuleConfig->isRuleDisabled(106)) { |
4266 | if (1 |
4267 | && [&]() { |
4268 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4269 | return true; |
4270 | }() ) { |
4271 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4272 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4273 | return true; |
4274 | } |
4275 | } |
4276 | return false; |
4277 | } |
4278 | if (Partition == 72 /* TargetOpcode::G_FDIV */) { |
4279 | // Leaf name: redundant_neg_operands |
4280 | // Rule: redundant_neg_operands |
4281 | if (!RuleConfig->isRuleDisabled(96)) { |
4282 | if (1 |
4283 | && [&]() { |
4284 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
4285 | return true; |
4286 | }() ) { |
4287 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
4288 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
4289 | return true; |
4290 | } |
4291 | } |
4292 | // Leaf name: fold_binop_into_select |
4293 | // Rule: fold_binop_into_select |
4294 | if (!RuleConfig->isRuleDisabled(106)) { |
4295 | if (1 |
4296 | && [&]() { |
4297 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4298 | return true; |
4299 | }() ) { |
4300 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4301 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4302 | return true; |
4303 | } |
4304 | } |
4305 | return false; |
4306 | } |
4307 | if (Partition == 73 /* TargetOpcode::G_FMAD */) { |
4308 | // Leaf name: redundant_neg_operands |
4309 | // Rule: redundant_neg_operands |
4310 | if (!RuleConfig->isRuleDisabled(96)) { |
4311 | if (1 |
4312 | && [&]() { |
4313 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
4314 | return true; |
4315 | }() ) { |
4316 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
4317 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
4318 | return true; |
4319 | } |
4320 | } |
4321 | return false; |
4322 | } |
4323 | if (Partition == 74 /* TargetOpcode::G_FMA */) { |
4324 | // Leaf name: redundant_neg_operands |
4325 | // Rule: redundant_neg_operands |
4326 | if (!RuleConfig->isRuleDisabled(96)) { |
4327 | if (1 |
4328 | && [&]() { |
4329 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
4330 | return true; |
4331 | }() ) { |
4332 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
4333 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
4334 | return true; |
4335 | } |
4336 | } |
4337 | return false; |
4338 | } |
4339 | if (Partition == 75 /* TargetOpcode::G_SMIN */) { |
4340 | // Leaf name: fold_binop_into_select |
4341 | // Rule: fold_binop_into_select |
4342 | if (!RuleConfig->isRuleDisabled(106)) { |
4343 | if (1 |
4344 | && [&]() { |
4345 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4346 | return true; |
4347 | }() ) { |
4348 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4349 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4350 | return true; |
4351 | } |
4352 | } |
4353 | return false; |
4354 | } |
4355 | if (Partition == 76 /* TargetOpcode::G_SMAX */) { |
4356 | // Leaf name: fold_binop_into_select |
4357 | // Rule: fold_binop_into_select |
4358 | if (!RuleConfig->isRuleDisabled(106)) { |
4359 | if (1 |
4360 | && [&]() { |
4361 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4362 | return true; |
4363 | }() ) { |
4364 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4365 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4366 | return true; |
4367 | } |
4368 | } |
4369 | return false; |
4370 | } |
4371 | if (Partition == 77 /* TargetOpcode::G_UMIN */) { |
4372 | // Leaf name: fold_binop_into_select |
4373 | // Rule: fold_binop_into_select |
4374 | if (!RuleConfig->isRuleDisabled(106)) { |
4375 | if (1 |
4376 | && [&]() { |
4377 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4378 | return true; |
4379 | }() ) { |
4380 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4381 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4382 | return true; |
4383 | } |
4384 | } |
4385 | return false; |
4386 | } |
4387 | if (Partition == 78 /* TargetOpcode::G_UMAX */) { |
4388 | // Leaf name: fold_binop_into_select |
4389 | // Rule: fold_binop_into_select |
4390 | if (!RuleConfig->isRuleDisabled(106)) { |
4391 | if (1 |
4392 | && [&]() { |
4393 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4394 | return true; |
4395 | }() ) { |
4396 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4397 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4398 | return true; |
4399 | } |
4400 | } |
4401 | return false; |
4402 | } |
4403 | if (Partition == 79 /* TargetOpcode::G_FREM */) { |
4404 | // Leaf name: fold_binop_into_select |
4405 | // Rule: fold_binop_into_select |
4406 | if (!RuleConfig->isRuleDisabled(106)) { |
4407 | if (1 |
4408 | && [&]() { |
4409 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4410 | return true; |
4411 | }() ) { |
4412 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4413 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
4414 | return true; |
4415 | } |
4416 | } |
4417 | return false; |
4418 | } |
4419 | if (Partition == 80 /* AMDGPU::G_AMDGPU_CVT_F32_UBYTE0 */) { |
4420 | // Leaf name: cvt_f32_ubyteN |
4421 | // Rule: cvt_f32_ubyteN |
4422 | if (!RuleConfig->isRuleDisabled(114)) { |
4423 | if (1 |
4424 | && [&]() { |
4425 | return PostLegalizerHelper.matchCvtF32UByteN(*MIs[0], MatchData114); |
4426 | return true; |
4427 | }() ) { |
4428 | LLVM_DEBUG(dbgs() << "Applying rule 'cvt_f32_ubyteN'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'cvt_f32_ubyteN'\n" ; } } while (false); |
4429 | PostLegalizerHelper.applyCvtF32UByteN(*MIs[0], MatchData114); |
4430 | return true; |
4431 | } |
4432 | } |
4433 | return false; |
4434 | } |
4435 | if (Partition == 81 /* AMDGPU::G_AMDGPU_CVT_F32_UBYTE1 */) { |
4436 | // Leaf name: cvt_f32_ubyteN |
4437 | // Rule: cvt_f32_ubyteN |
4438 | if (!RuleConfig->isRuleDisabled(114)) { |
4439 | if (1 |
4440 | && [&]() { |
4441 | return PostLegalizerHelper.matchCvtF32UByteN(*MIs[0], MatchData114); |
4442 | return true; |
4443 | }() ) { |
4444 | LLVM_DEBUG(dbgs() << "Applying rule 'cvt_f32_ubyteN'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'cvt_f32_ubyteN'\n" ; } } while (false); |
4445 | PostLegalizerHelper.applyCvtF32UByteN(*MIs[0], MatchData114); |
4446 | return true; |
4447 | } |
4448 | } |
4449 | return false; |
4450 | } |
4451 | if (Partition == 82 /* AMDGPU::G_AMDGPU_CVT_F32_UBYTE2 */) { |
4452 | // Leaf name: cvt_f32_ubyteN |
4453 | // Rule: cvt_f32_ubyteN |
4454 | if (!RuleConfig->isRuleDisabled(114)) { |
4455 | if (1 |
4456 | && [&]() { |
4457 | return PostLegalizerHelper.matchCvtF32UByteN(*MIs[0], MatchData114); |
4458 | return true; |
4459 | }() ) { |
4460 | LLVM_DEBUG(dbgs() << "Applying rule 'cvt_f32_ubyteN'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'cvt_f32_ubyteN'\n" ; } } while (false); |
4461 | PostLegalizerHelper.applyCvtF32UByteN(*MIs[0], MatchData114); |
4462 | return true; |
4463 | } |
4464 | } |
4465 | return false; |
4466 | } |
4467 | if (Partition == 83 /* AMDGPU::G_AMDGPU_CVT_F32_UBYTE3 */) { |
4468 | // Leaf name: cvt_f32_ubyteN |
4469 | // Rule: cvt_f32_ubyteN |
4470 | if (!RuleConfig->isRuleDisabled(114)) { |
4471 | if (1 |
4472 | && [&]() { |
4473 | return PostLegalizerHelper.matchCvtF32UByteN(*MIs[0], MatchData114); |
4474 | return true; |
4475 | }() ) { |
4476 | LLVM_DEBUG(dbgs() << "Applying rule 'cvt_f32_ubyteN'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'cvt_f32_ubyteN'\n" ; } } while (false); |
4477 | PostLegalizerHelper.applyCvtF32UByteN(*MIs[0], MatchData114); |
4478 | return true; |
4479 | } |
4480 | } |
4481 | return false; |
4482 | } |
4483 | if (Partition == 84 /* TargetOpcode::G_INTRINSIC */) { |
4484 | // Leaf name: rcp_sqrt_to_rsq |
4485 | // Rule: rcp_sqrt_to_rsq |
4486 | if (!RuleConfig->isRuleDisabled(117)) { |
4487 | if (1 |
4488 | && [&]() { |
4489 | return PostLegalizerHelper.matchRcpSqrtToRsq(*MIs[0], MatchData117); |
4490 | return true; |
4491 | }() ) { |
4492 | LLVM_DEBUG(dbgs() << "Applying rule 'rcp_sqrt_to_rsq'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-postlegalizer-combiner")) { dbgs() << "Applying rule 'rcp_sqrt_to_rsq'\n" ; } } while (false); |
4493 | Helper.applyBuildFn(*MIs[0], MatchData117); |
4494 | return true; |
4495 | } |
4496 | } |
4497 | return false; |
4498 | } |
4499 | |
4500 | return false; |
4501 | } |
4502 | #endif // ifdef AMDGPUPOSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP |