File: | build/source/build-llvm/tools/clang/stage2-bins/lib/Target/AMDGPU/AMDGPUGenPreLegalizeGICombiner.inc |
Warning: | line 3053, column 7 Value stored to 'Partition' is never read |
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1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | |* *| |
3 | |* Global Combiner *| |
4 | |* *| |
5 | |* Automatically generated file, do not edit! *| |
6 | |* *| |
7 | \*===----------------------------------------------------------------------===*/ |
8 | |
9 | #ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS |
10 | #include "llvm/ADT/SparseBitVector.h" |
11 | namespace llvm { |
12 | extern cl::OptionCategory GICombinerOptionCategory; |
13 | } // end namespace llvm |
14 | #endif // ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS |
15 | |
16 | #ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H |
17 | class AMDGPUGenPreLegalizerCombinerHelperRuleConfig { |
18 | SparseBitVector<> DisabledRules; |
19 | |
20 | public: |
21 | bool parseCommandLineOption(); |
22 | bool isRuleDisabled(unsigned ID) const; |
23 | bool setRuleEnabled(StringRef RuleIdentifier); |
24 | bool setRuleDisabled(StringRef RuleIdentifier); |
25 | }; |
26 | |
27 | class AMDGPUGenPreLegalizerCombinerHelper : public AMDGPUPreLegalizerCombinerHelperState { |
28 | const AMDGPUGenPreLegalizerCombinerHelperRuleConfig *RuleConfig; |
29 | |
30 | public: |
31 | template <typename... Args>AMDGPUGenPreLegalizerCombinerHelper(const AMDGPUGenPreLegalizerCombinerHelperRuleConfig &RuleConfig, Args &&... args) : AMDGPUPreLegalizerCombinerHelperState(std::forward<Args>(args)...), RuleConfig(&RuleConfig) {} |
32 | |
33 | bool tryCombineAll( |
34 | GISelChangeObserver &Observer, |
35 | MachineInstr &MI, |
36 | MachineIRBuilder &B) const; |
37 | }; |
38 | |
39 | static std::optional<uint64_t> getRuleIdxForIdentifier(StringRef RuleIdentifier) { |
40 | uint64_t I; |
41 | // getAtInteger(...) returns false on success |
42 | bool Parsed = !RuleIdentifier.getAsInteger(0, I); |
43 | if (Parsed) |
44 | return I; |
45 | |
46 | #ifndef NDEBUG |
47 | switch (RuleIdentifier.size()) { |
48 | default: break; |
49 | case 9: // 4 strings to match. |
50 | switch (RuleIdentifier[0]) { |
51 | default: break; |
52 | case 'a': // 1 string to match. |
53 | if (memcmp(RuleIdentifier.data()+1, "ddo_by_0", 8) != 0) |
54 | break; |
55 | return 73; // "addo_by_0" |
56 | case 'c': // 1 string to match. |
57 | if (memcmp(RuleIdentifier.data()+1, "opy_prop", 8) != 0) |
58 | break; |
59 | return 0; // "copy_prop" |
60 | case 'm': // 2 strings to match. |
61 | if (memcmp(RuleIdentifier.data()+1, "ulo_by_", 7) != 0) |
62 | break; |
63 | switch (RuleIdentifier[8]) { |
64 | default: break; |
65 | case '0': // 1 string to match. |
66 | return 72; // "mulo_by_0" |
67 | case '2': // 1 string to match. |
68 | return 71; // "mulo_by_2" |
69 | } |
70 | break; |
71 | } |
72 | break; |
73 | case 10: // 3 strings to match. |
74 | switch (RuleIdentifier[0]) { |
75 | default: break; |
76 | case 'i': // 1 string to match. |
77 | if (memcmp(RuleIdentifier.data()+1, "2p_to_p2i", 9) != 0) |
78 | break; |
79 | return 29; // "i2p_to_p2i" |
80 | case 'm': // 1 string to match. |
81 | if (memcmp(RuleIdentifier.data()+1, "ul_to_shl", 9) != 0) |
82 | break; |
83 | return 1; // "mul_to_shl" |
84 | case 'p': // 1 string to match. |
85 | if (memcmp(RuleIdentifier.data()+1, "2i_to_i2p", 9) != 0) |
86 | break; |
87 | return 28; // "p2i_to_i2p" |
88 | } |
89 | break; |
90 | case 11: // 4 strings to match. |
91 | switch (RuleIdentifier[0]) { |
92 | default: break; |
93 | case 'a': // 1 string to match. |
94 | if (memcmp(RuleIdentifier.data()+1, "dd_sub_reg", 10) != 0) |
95 | break; |
96 | return 33; // "add_sub_reg" |
97 | case 's': // 1 string to match. |
98 | if (memcmp(RuleIdentifier.data()+1, "ub_add_reg", 10) != 0) |
99 | break; |
100 | return 105; // "sub_add_reg" |
101 | case 't': // 1 string to match. |
102 | if (memcmp(RuleIdentifier.data()+1, "runc_shift", 10) != 0) |
103 | break; |
104 | return 67; // "trunc_shift" |
105 | case 'u': // 1 string to match. |
106 | if (memcmp(RuleIdentifier.data()+1, "nmerge_cst", 10) != 0) |
107 | break; |
108 | return 62; // "unmerge_cst" |
109 | } |
110 | break; |
111 | case 12: // 6 strings to match. |
112 | switch (RuleIdentifier[0]) { |
113 | default: break; |
114 | case 'a': // 1 string to match. |
115 | if (memcmp(RuleIdentifier.data()+1, "dde_to_addo", 11) != 0) |
116 | break; |
117 | return 74; // "adde_to_addo" |
118 | case 'e': // 1 string to match. |
119 | if (memcmp(RuleIdentifier.data()+1, "xt_ext_fold", 11) != 0) |
120 | break; |
121 | return 58; // "ext_ext_fold" |
122 | case 'f': // 1 string to match. |
123 | if (memcmp(RuleIdentifier.data()+1, "sub_to_fneg", 11) != 0) |
124 | break; |
125 | return 108; // "fsub_to_fneg" |
126 | case 'm': // 1 string to match. |
127 | if (memcmp(RuleIdentifier.data()+1, "ulh_to_lshr", 11) != 0) |
128 | break; |
129 | return 93; // "mulh_to_lshr" |
130 | case 'n': // 1 string to match. |
131 | if (memcmp(RuleIdentifier.data()+1, "ot_cmp_fold", 11) != 0) |
132 | break; |
133 | return 59; // "not_cmp_fold" |
134 | case 'r': // 1 string to match. |
135 | if (memcmp(RuleIdentifier.data()+1, "edundant_or", 11) != 0) |
136 | break; |
137 | return 52; // "redundant_or" |
138 | } |
139 | break; |
140 | case 13: // 9 strings to match. |
141 | switch (RuleIdentifier[0]) { |
142 | default: break; |
143 | case 'c': // 1 string to match. |
144 | if (memcmp(RuleIdentifier.data()+1, "onstant_fold", 12) != 0) |
145 | break; |
146 | return 89; // "constant_fold" |
147 | case 'f': // 1 string to match. |
148 | if (memcmp(RuleIdentifier.data()+1, "oldable_fneg", 12) != 0) |
149 | break; |
150 | return 111; // "foldable_fneg" |
151 | case 'l': // 1 string to match. |
152 | if (memcmp(RuleIdentifier.data()+1, "oad_and_mask", 12) != 0) |
153 | break; |
154 | return 9; // "load_and_mask" |
155 | case 'm': // 1 string to match. |
156 | if (memcmp(RuleIdentifier.data()+1, "erge_unmerge", 12) != 0) |
157 | break; |
158 | return 65; // "merge_unmerge" |
159 | case 'r': // 1 string to match. |
160 | if (memcmp(RuleIdentifier.data()+1, "edundant_and", 12) != 0) |
161 | break; |
162 | return 50; // "redundant_and" |
163 | case 's': // 1 string to match. |
164 | if (memcmp(RuleIdentifier.data()+1, "div_by_const", 12) != 0) |
165 | break; |
166 | return 92; // "sdiv_by_const" |
167 | case 'u': // 3 strings to match. |
168 | switch (RuleIdentifier[1]) { |
169 | default: break; |
170 | case 'd': // 1 string to match. |
171 | if (memcmp(RuleIdentifier.data()+2, "iv_by_const", 11) != 0) |
172 | break; |
173 | return 91; // "udiv_by_const" |
174 | case 'n': // 2 strings to match. |
175 | if (memcmp(RuleIdentifier.data()+2, "merge_", 6) != 0) |
176 | break; |
177 | switch (RuleIdentifier[8]) { |
178 | default: break; |
179 | case 'm': // 1 string to match. |
180 | if (memcmp(RuleIdentifier.data()+9, "erge", 4) != 0) |
181 | break; |
182 | return 61; // "unmerge_merge" |
183 | case 'u': // 1 string to match. |
184 | if (memcmp(RuleIdentifier.data()+9, "ndef", 4) != 0) |
185 | break; |
186 | return 21; // "unmerge_undef" |
187 | } |
188 | break; |
189 | } |
190 | break; |
191 | } |
192 | break; |
193 | case 14: // 7 strings to match. |
194 | switch (RuleIdentifier[0]) { |
195 | default: break; |
196 | case 'b': // 1 string to match. |
197 | if (memcmp(RuleIdentifier.data()+1, "inop_same_val", 13) != 0) |
198 | break; |
199 | return 25; // "binop_same_val" |
200 | case 'c': // 1 string to match. |
201 | if (memcmp(RuleIdentifier.data()+1, "onstant_fp_op", 13) != 0) |
202 | break; |
203 | return 68; // "constant_fp_op" |
204 | case 'f': // 2 strings to match. |
205 | switch (RuleIdentifier[1]) { |
206 | default: break; |
207 | case 'a': // 1 string to match. |
208 | if (memcmp(RuleIdentifier.data()+2, "bs_fneg_fold", 12) != 0) |
209 | break; |
210 | return 90; // "fabs_fneg_fold" |
211 | case 'n': // 1 string to match. |
212 | if (memcmp(RuleIdentifier.data()+2, "eg_fneg_fold", 12) != 0) |
213 | break; |
214 | return 31; // "fneg_fneg_fold" |
215 | } |
216 | break; |
217 | case 'm': // 1 string to match. |
218 | if (memcmp(RuleIdentifier.data()+1, "ul_by_neg_one", 13) != 0) |
219 | break; |
220 | return 3; // "mul_by_neg_one" |
221 | case 'r': // 1 string to match. |
222 | if (memcmp(RuleIdentifier.data()+1, "eassoc_ptradd", 13) != 0) |
223 | break; |
224 | return 41; // "reassoc_ptradd" |
225 | case 't': // 1 string to match. |
226 | if (memcmp(RuleIdentifier.data()+1, "runc_ext_fold", 13) != 0) |
227 | break; |
228 | return 66; // "trunc_ext_fold" |
229 | } |
230 | break; |
231 | case 15: // 6 strings to match. |
232 | switch (RuleIdentifier[0]) { |
233 | default: break; |
234 | case 'e': // 1 string to match. |
235 | if (memcmp(RuleIdentifier.data()+1, "xtending_loads", 14) != 0) |
236 | break; |
237 | return 8; // "extending_loads" |
238 | case 'i': // 1 string to match. |
239 | if (memcmp(RuleIdentifier.data()+1, "dempotent_prop", 14) != 0) |
240 | break; |
241 | return 4; // "idempotent_prop" |
242 | case 'l': // 1 string to match. |
243 | if (memcmp(RuleIdentifier.data()+1, "oad_or_combine", 14) != 0) |
244 | break; |
245 | return 80; // "load_or_combine" |
246 | case 'o': // 1 string to match. |
247 | if (memcmp(RuleIdentifier.data()+1, "verlapping_and", 14) != 0) |
248 | break; |
249 | return 70; // "overlapping_and" |
250 | case 's': // 1 string to match. |
251 | if (memcmp(RuleIdentifier.data()+1, "elect_same_val", 14) != 0) |
252 | break; |
253 | return 23; // "select_same_val" |
254 | case 'z': // 1 string to match. |
255 | if (memcmp(RuleIdentifier.data()+1, "ext_trunc_fold", 14) != 0) |
256 | break; |
257 | return 54; // "zext_trunc_fold" |
258 | } |
259 | break; |
260 | case 16: // 5 strings to match. |
261 | switch (RuleIdentifier[0]) { |
262 | default: break; |
263 | case 'c': // 1 string to match. |
264 | if (memcmp(RuleIdentifier.data()+1, "lamp_i64_to_i16", 15) != 0) |
265 | break; |
266 | return 110; // "clamp_i64_to_i16" |
267 | case 's': // 2 strings to match. |
268 | if (memcmp(RuleIdentifier.data()+1, "elect_", 6) != 0) |
269 | break; |
270 | switch (RuleIdentifier[7]) { |
271 | default: break; |
272 | case 't': // 1 string to match. |
273 | if (memcmp(RuleIdentifier.data()+8, "o_minmax", 8) != 0) |
274 | break; |
275 | return 106; // "select_to_minmax" |
276 | case 'u': // 1 string to match. |
277 | if (memcmp(RuleIdentifier.data()+8, "ndef_cmp", 8) != 0) |
278 | break; |
279 | return 47; // "select_undef_cmp" |
280 | } |
281 | break; |
282 | case 't': // 1 string to match. |
283 | if (memcmp(RuleIdentifier.data()+1, "runcstore_merge", 15) != 0) |
284 | break; |
285 | return 81; // "truncstore_merge" |
286 | case 'u': // 1 string to match. |
287 | if (memcmp(RuleIdentifier.data()+1, "ndef_to_fp_zero", 15) != 0) |
288 | break; |
289 | return 11; // "undef_to_fp_zero" |
290 | } |
291 | break; |
292 | case 17: // 9 strings to match. |
293 | switch (RuleIdentifier[0]) { |
294 | default: break; |
295 | case 'a': // 2 strings to match. |
296 | switch (RuleIdentifier[1]) { |
297 | default: break; |
298 | case 'd': // 1 string to match. |
299 | if (memcmp(RuleIdentifier.data()+2, "d_p2i_to_ptradd", 15) != 0) |
300 | break; |
301 | return 2; // "add_p2i_to_ptradd" |
302 | case 'n': // 1 string to match. |
303 | if (memcmp(RuleIdentifier.data()+2, "yext_trunc_fold", 15) != 0) |
304 | break; |
305 | return 30; // "anyext_trunc_fold" |
306 | } |
307 | break; |
308 | case 'd': // 1 string to match. |
309 | if (memcmp(RuleIdentifier.data()+1, "iv_rem_to_divrem", 16) != 0) |
310 | break; |
311 | return 82; // "div_rem_to_divrem" |
312 | case 'e': // 1 string to match. |
313 | if (memcmp(RuleIdentifier.data()+1, "rase_undef_store", 16) != 0) |
314 | break; |
315 | return 20; // "erase_undef_store" |
316 | case 'p': // 1 string to match. |
317 | if (memcmp(RuleIdentifier.data()+1, "tr_add_with_zero", 16) != 0) |
318 | break; |
319 | return 77; // "ptr_add_with_zero" |
320 | case 's': // 2 strings to match. |
321 | switch (RuleIdentifier[1]) { |
322 | default: break; |
323 | case 'e': // 1 string to match. |
324 | if (memcmp(RuleIdentifier.data()+2, "lect_to_logical", 15) != 0) |
325 | break; |
326 | return 49; // "select_to_logical" |
327 | case 'h': // 1 string to match. |
328 | if (memcmp(RuleIdentifier.data()+2, "ift_immed_chain", 15) != 0) |
329 | break; |
330 | return 78; // "shift_immed_chain" |
331 | } |
332 | break; |
333 | case 'u': // 2 strings to match. |
334 | switch (RuleIdentifier[1]) { |
335 | default: break; |
336 | case 'n': // 1 string to match. |
337 | if (memcmp(RuleIdentifier.data()+2, "def_to_int_zero", 15) != 0) |
338 | break; |
339 | return 12; // "undef_to_int_zero" |
340 | case 'r': // 1 string to match. |
341 | if (memcmp(RuleIdentifier.data()+2, "em_pow2_to_mask", 15) != 0) |
342 | break; |
343 | return 53; // "urem_pow2_to_mask" |
344 | } |
345 | break; |
346 | } |
347 | break; |
348 | case 18: // 4 strings to match. |
349 | switch (RuleIdentifier[0]) { |
350 | default: break; |
351 | case 'b': // 1 string to match. |
352 | if (memcmp(RuleIdentifier.data()+1, "inop_left_to_zero", 17) != 0) |
353 | break; |
354 | return 26; // "binop_left_to_zero" |
355 | case 'c': // 1 string to match. |
356 | if (memcmp(RuleIdentifier.data()+1, "ombine_minmax_nan", 17) != 0) |
357 | break; |
358 | return 75; // "combine_minmax_nan" |
359 | case 'r': // 1 string to match. |
360 | if (memcmp(RuleIdentifier.data()+1, "ight_identity_one", 17) != 0) |
361 | break; |
362 | return 32; // "right_identity_one" |
363 | case 's': // 1 string to match. |
364 | if (memcmp(RuleIdentifier.data()+1, "ext_inreg_of_load", 17) != 0) |
365 | break; |
366 | return 44; // "sext_inreg_of_load" |
367 | } |
368 | break; |
369 | case 19: // 8 strings to match. |
370 | switch (RuleIdentifier[0]) { |
371 | default: break; |
372 | case 'b': // 1 string to match. |
373 | if (memcmp(RuleIdentifier.data()+1, "inop_right_to_zero", 18) != 0) |
374 | break; |
375 | return 27; // "binop_right_to_zero" |
376 | case 'c': // 1 string to match. |
377 | if (memcmp(RuleIdentifier.data()+1, "onst_ptradd_to_i2p", 18) != 0) |
378 | break; |
379 | return 69; // "const_ptradd_to_i2p" |
380 | case 'e': // 1 string to match. |
381 | if (memcmp(RuleIdentifier.data()+1, "xtend_through_phis", 18) != 0) |
382 | break; |
383 | return 38; // "extend_through_phis" |
384 | case 'p': // 1 string to match. |
385 | if (memcmp(RuleIdentifier.data()+1, "tr_add_immed_chain", 18) != 0) |
386 | break; |
387 | return 42; // "ptr_add_immed_chain" |
388 | case 'r': // 1 string to match. |
389 | if (memcmp(RuleIdentifier.data()+1, "ight_identity_zero", 18) != 0) |
390 | break; |
391 | return 24; // "right_identity_zero" |
392 | case 's': // 2 strings to match. |
393 | switch (RuleIdentifier[1]) { |
394 | default: break; |
395 | case 'e': // 1 string to match. |
396 | if (memcmp(RuleIdentifier.data()+2, "lect_constant_cmp", 17) != 0) |
397 | break; |
398 | return 48; // "select_constant_cmp" |
399 | case 'i': // 1 string to match. |
400 | if (memcmp(RuleIdentifier.data()+2, "mplify_add_to_sub", 17) != 0) |
401 | break; |
402 | return 39; // "simplify_add_to_sub" |
403 | } |
404 | break; |
405 | case 'u': // 1 string to match. |
406 | if (memcmp(RuleIdentifier.data()+1, "nary_undef_to_zero", 18) != 0) |
407 | break; |
408 | return 16; // "unary_undef_to_zero" |
409 | } |
410 | break; |
411 | case 20: // 5 strings to match. |
412 | switch (RuleIdentifier[0]) { |
413 | default: break; |
414 | case 'a': // 1 string to match. |
415 | if (memcmp(RuleIdentifier.data()+1, "nd_or_disjoint_mask", 19) != 0) |
416 | break; |
417 | return 95; // "and_or_disjoint_mask" |
418 | case 'b': // 1 string to match. |
419 | if (memcmp(RuleIdentifier.data()+1, "itcast_bitcast_fold", 19) != 0) |
420 | break; |
421 | return 37; // "bitcast_bitcast_fold" |
422 | case 'r': // 2 strings to match. |
423 | if (memcmp(RuleIdentifier.data()+1, "edu", 3) != 0) |
424 | break; |
425 | switch (RuleIdentifier[4]) { |
426 | default: break; |
427 | case 'c': // 1 string to match. |
428 | if (memcmp(RuleIdentifier.data()+5, "e_shl_of_extend", 15) != 0) |
429 | break; |
430 | return 45; // "reduce_shl_of_extend" |
431 | case 'n': // 1 string to match. |
432 | if (memcmp(RuleIdentifier.data()+5, "dant_sext_inreg", 15) != 0) |
433 | break; |
434 | return 51; // "redundant_sext_inreg" |
435 | } |
436 | break; |
437 | case 'u': // 1 string to match. |
438 | if (memcmp(RuleIdentifier.data()+1, "nmerge_zext_to_zext", 19) != 0) |
439 | break; |
440 | return 64; // "unmerge_zext_to_zext" |
441 | } |
442 | break; |
443 | case 21: // 2 strings to match. |
444 | if (memcmp(RuleIdentifier.data()+0, "un", 2) != 0) |
445 | break; |
446 | switch (RuleIdentifier[2]) { |
447 | default: break; |
448 | case 'd': // 1 string to match. |
449 | if (memcmp(RuleIdentifier.data()+3, "ef_to_negative_one", 18) != 0) |
450 | break; |
451 | return 13; // "undef_to_negative_one" |
452 | case 'm': // 1 string to match. |
453 | if (memcmp(RuleIdentifier.data()+3, "erge_dead_to_trunc", 18) != 0) |
454 | break; |
455 | return 63; // "unmerge_dead_to_trunc" |
456 | } |
457 | break; |
458 | case 22: // 7 strings to match. |
459 | switch (RuleIdentifier[0]) { |
460 | default: break; |
461 | case 'f': // 2 strings to match. |
462 | switch (RuleIdentifier[1]) { |
463 | default: break; |
464 | case 'o': // 1 string to match. |
465 | if (memcmp(RuleIdentifier.data()+2, "ld_binop_into_select", 20) != 0) |
466 | break; |
467 | return 104; // "fold_binop_into_select" |
468 | case 'u': // 1 string to match. |
469 | if (memcmp(RuleIdentifier.data()+2, "nnel_shift_to_rotate", 20) != 0) |
470 | break; |
471 | return 84; // "funnel_shift_to_rotate" |
472 | } |
473 | break; |
474 | case 'i': // 1 string to match. |
475 | if (memcmp(RuleIdentifier.data()+1, "cmp_to_lhs_known_bits", 21) != 0) |
476 | break; |
477 | return 56; // "icmp_to_lhs_known_bits" |
478 | case 'p': // 1 string to match. |
479 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_any_op", 21) != 0) |
480 | break; |
481 | return 17; // "propagate_undef_any_op" |
482 | case 'r': // 1 string to match. |
483 | if (memcmp(RuleIdentifier.data()+1, "edundant_neg_operands", 21) != 0) |
484 | break; |
485 | return 94; // "redundant_neg_operands" |
486 | case 's': // 1 string to match. |
487 | if (memcmp(RuleIdentifier.data()+1, "hl_ashr_to_sext_inreg", 21) != 0) |
488 | break; |
489 | return 43; // "shl_ashr_to_sext_inreg" |
490 | case 't': // 1 string to match. |
491 | if (memcmp(RuleIdentifier.data()+1, "runc_buildvector_fold", 21) != 0) |
492 | break; |
493 | return 35; // "trunc_buildvector_fold" |
494 | } |
495 | break; |
496 | case 23: // 2 strings to match. |
497 | switch (RuleIdentifier[0]) { |
498 | default: break; |
499 | case 'c': // 1 string to match. |
500 | if (memcmp(RuleIdentifier.data()+1, "ommute_constant_to_rhs", 22) != 0) |
501 | break; |
502 | return 109; // "commute_constant_to_rhs" |
503 | case 'p': // 1 string to match. |
504 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_all_ops", 22) != 0) |
505 | break; |
506 | return 18; // "propagate_undef_all_ops" |
507 | } |
508 | break; |
509 | case 24: // 4 strings to match. |
510 | switch (RuleIdentifier[0]) { |
511 | default: break; |
512 | case 'b': // 1 string to match. |
513 | if (memcmp(RuleIdentifier.data()+1, "inop_left_undef_to_zero", 23) != 0) |
514 | break; |
515 | return 14; // "binop_left_undef_to_zero" |
516 | case 'n': // 1 string to match. |
517 | if (memcmp(RuleIdentifier.data()+1, "arrow_binop_feeding_and", 23) != 0) |
518 | break; |
519 | return 46; // "narrow_binop_feeding_and" |
520 | case 's': // 1 string to match. |
521 | if (memcmp(RuleIdentifier.data()+1, "ext_inreg_to_zext_inreg", 23) != 0) |
522 | break; |
523 | return 57; // "sext_inreg_to_zext_inreg" |
524 | case 'x': // 1 string to match. |
525 | if (memcmp(RuleIdentifier.data()+1, "or_of_and_with_same_reg", 23) != 0) |
526 | break; |
527 | return 76; // "xor_of_and_with_same_reg" |
528 | } |
529 | break; |
530 | case 25: // 4 strings to match. |
531 | switch (RuleIdentifier[0]) { |
532 | default: break; |
533 | case 'b': // 3 strings to match. |
534 | switch (RuleIdentifier[1]) { |
535 | default: break; |
536 | case 'i': // 2 strings to match. |
537 | if (memcmp(RuleIdentifier.data()+2, "tfield_extract_from_", 20) != 0) |
538 | break; |
539 | switch (RuleIdentifier[22]) { |
540 | default: break; |
541 | case 'a': // 1 string to match. |
542 | if (memcmp(RuleIdentifier.data()+23, "nd", 2) != 0) |
543 | break; |
544 | return 86; // "bitfield_extract_from_and" |
545 | case 's': // 1 string to match. |
546 | if (memcmp(RuleIdentifier.data()+23, "hr", 2) != 0) |
547 | break; |
548 | return 87; // "bitfield_extract_from_shr" |
549 | } |
550 | break; |
551 | case 'u': // 1 string to match. |
552 | if (memcmp(RuleIdentifier.data()+2, "ildvector_identity_fold", 23) != 0) |
553 | break; |
554 | return 34; // "buildvector_identity_fold" |
555 | } |
556 | break; |
557 | case 'e': // 1 string to match. |
558 | if (memcmp(RuleIdentifier.data()+1, "xtract_vec_elt_build_vec", 24) != 0) |
559 | break; |
560 | return 6; // "extract_vec_elt_build_vec" |
561 | } |
562 | break; |
563 | case 26: // 3 strings to match. |
564 | switch (RuleIdentifier[0]) { |
565 | default: break; |
566 | case 'b': // 1 string to match. |
567 | if (memcmp(RuleIdentifier.data()+1, "inop_right_undef_to_undef", 25) != 0) |
568 | break; |
569 | return 15; // "binop_right_undef_to_undef" |
570 | case 'c': // 1 string to match. |
571 | if (memcmp(RuleIdentifier.data()+1, "ombine_indexed_load_store", 25) != 0) |
572 | break; |
573 | return 10; // "combine_indexed_load_store" |
574 | case 'f': // 1 string to match. |
575 | if (memcmp(RuleIdentifier.data()+1, "unnel_shift_from_or_shift", 25) != 0) |
576 | break; |
577 | return 83; // "funnel_shift_from_or_shift" |
578 | } |
579 | break; |
580 | case 27: // 2 strings to match. |
581 | switch (RuleIdentifier[0]) { |
582 | default: break; |
583 | case 'r': // 1 string to match. |
584 | if (memcmp(RuleIdentifier.data()+1, "edundant_binop_in_equality", 26) != 0) |
585 | break; |
586 | return 107; // "redundant_binop_in_equality" |
587 | case 't': // 1 string to match. |
588 | if (memcmp(RuleIdentifier.data()+1, "runc_lshr_buildvector_fold", 26) != 0) |
589 | break; |
590 | return 36; // "trunc_lshr_buildvector_fold" |
591 | } |
592 | break; |
593 | case 28: // 3 strings to match. |
594 | switch (RuleIdentifier[0]) { |
595 | default: break; |
596 | case 'o': // 1 string to match. |
597 | if (memcmp(RuleIdentifier.data()+1, "pt_brcond_by_inverting_cond", 27) != 0) |
598 | break; |
599 | return 60; // "opt_brcond_by_inverting_cond" |
600 | case 'p': // 1 string to match. |
601 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_shuffle_mask", 27) != 0) |
602 | break; |
603 | return 19; // "propagate_undef_shuffle_mask" |
604 | case 's': // 1 string to match. |
605 | if (memcmp(RuleIdentifier.data()+1, "hift_of_shifted_logic_chain", 27) != 0) |
606 | break; |
607 | return 79; // "shift_of_shifted_logic_chain" |
608 | } |
609 | break; |
610 | case 29: // 2 strings to match. |
611 | switch (RuleIdentifier[0]) { |
612 | default: break; |
613 | case 'b': // 1 string to match. |
614 | if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_shr_and", 28) != 0) |
615 | break; |
616 | return 88; // "bitfield_extract_from_shr_and" |
617 | case 'i': // 1 string to match. |
618 | if (memcmp(RuleIdentifier.data()+1, "cmp_to_true_false_known_bits", 28) != 0) |
619 | break; |
620 | return 55; // "icmp_to_true_false_known_bits" |
621 | } |
622 | break; |
623 | case 32: // 3 strings to match. |
624 | switch (RuleIdentifier[0]) { |
625 | default: break; |
626 | case 'b': // 1 string to match. |
627 | if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_sext_inreg", 31) != 0) |
628 | break; |
629 | return 85; // "bitfield_extract_from_sext_inreg" |
630 | case 'c': // 2 strings to match. |
631 | if (memcmp(RuleIdentifier.data()+1, "ombine_f", 8) != 0) |
632 | break; |
633 | switch (RuleIdentifier[9]) { |
634 | default: break; |
635 | case 'a': // 1 string to match. |
636 | if (memcmp(RuleIdentifier.data()+10, "dd_fmul_to_fmad_or_fma", 22) != 0) |
637 | break; |
638 | return 96; // "combine_fadd_fmul_to_fmad_or_fma" |
639 | case 's': // 1 string to match. |
640 | if (memcmp(RuleIdentifier.data()+10, "ub_fmul_to_fmad_or_fma", 22) != 0) |
641 | break; |
642 | return 100; // "combine_fsub_fmul_to_fmad_or_fma" |
643 | } |
644 | break; |
645 | } |
646 | break; |
647 | case 34: // 1 string to match. |
648 | if (memcmp(RuleIdentifier.data()+0, "extract_all_elts_from_build_vector", 34) != 0) |
649 | break; |
650 | return 7; // "extract_all_elts_from_build_vector" |
651 | case 36: // 3 strings to match. |
652 | switch (RuleIdentifier[0]) { |
653 | default: break; |
654 | case 'c': // 2 strings to match. |
655 | if (memcmp(RuleIdentifier.data()+1, "ombine_", 7) != 0) |
656 | break; |
657 | switch (RuleIdentifier[8]) { |
658 | default: break; |
659 | case 'f': // 1 string to match. |
660 | if (memcmp(RuleIdentifier.data()+9, "add_fma_fmul_to_fmad_or_fma", 27) != 0) |
661 | break; |
662 | return 98; // "combine_fadd_fma_fmul_to_fmad_or_fma" |
663 | case 'i': // 1 string to match. |
664 | if (memcmp(RuleIdentifier.data()+9, "nsert_vec_elts_build_vector", 27) != 0) |
665 | break; |
666 | return 5; // "combine_insert_vec_elts_build_vector" |
667 | } |
668 | break; |
669 | case 'i': // 1 string to match. |
670 | if (memcmp(RuleIdentifier.data()+1, "nsert_extract_vec_elt_out_of_bounds", 35) != 0) |
671 | break; |
672 | return 22; // "insert_extract_vec_elt_out_of_bounds" |
673 | } |
674 | break; |
675 | case 37: // 2 strings to match. |
676 | switch (RuleIdentifier[0]) { |
677 | default: break; |
678 | case 'c': // 1 string to match. |
679 | if (memcmp(RuleIdentifier.data()+1, "ombine_fsub_fneg_fmul_to_fmad_or_fma", 36) != 0) |
680 | break; |
681 | return 101; // "combine_fsub_fneg_fmul_to_fmad_or_fma" |
682 | case 'h': // 1 string to match. |
683 | if (memcmp(RuleIdentifier.data()+1, "oist_logic_op_with_same_opcode_hands", 36) != 0) |
684 | break; |
685 | return 40; // "hoist_logic_op_with_same_opcode_hands" |
686 | } |
687 | break; |
688 | case 38: // 2 strings to match. |
689 | if (memcmp(RuleIdentifier.data()+0, "combine_f", 9) != 0) |
690 | break; |
691 | switch (RuleIdentifier[9]) { |
692 | default: break; |
693 | case 'a': // 1 string to match. |
694 | if (memcmp(RuleIdentifier.data()+10, "dd_fpext_fmul_to_fmad_or_fma", 28) != 0) |
695 | break; |
696 | return 97; // "combine_fadd_fpext_fmul_to_fmad_or_fma" |
697 | case 's': // 1 string to match. |
698 | if (memcmp(RuleIdentifier.data()+10, "ub_fpext_fmul_to_fmad_or_fma", 28) != 0) |
699 | break; |
700 | return 102; // "combine_fsub_fpext_fmul_to_fmad_or_fma" |
701 | } |
702 | break; |
703 | case 42: // 1 string to match. |
704 | if (memcmp(RuleIdentifier.data()+0, "combine_fadd_fpext_fma_fmul_to_fmad_or_fma", 42) != 0) |
705 | break; |
706 | return 99; // "combine_fadd_fpext_fma_fmul_to_fmad_or_fma" |
707 | case 43: // 1 string to match. |
708 | if (memcmp(RuleIdentifier.data()+0, "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma", 43) != 0) |
709 | break; |
710 | return 103; // "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma" |
711 | } |
712 | #endif // ifndef NDEBUG |
713 | |
714 | return std::nullopt; |
715 | } |
716 | static std::optional<std::pair<uint64_t, uint64_t>> getRuleRangeForIdentifier(StringRef RuleIdentifier) { |
717 | std::pair<StringRef, StringRef> RangePair = RuleIdentifier.split('-'); |
718 | if (!RangePair.second.empty()) { |
719 | const auto First = getRuleIdxForIdentifier(RangePair.first); |
720 | const auto Last = getRuleIdxForIdentifier(RangePair.second); |
721 | if (!First || !Last) |
722 | return std::nullopt; |
723 | if (First >= Last) |
724 | report_fatal_error("Beginning of range should be before end of range"); |
725 | return {{*First, *Last + 1}}; |
726 | } |
727 | if (RangePair.first == "*") { |
728 | return {{0, 112}}; |
729 | } |
730 | const auto I = getRuleIdxForIdentifier(RangePair.first); |
731 | if (!I) |
732 | return std::nullopt; |
733 | return {{*I, *I + 1}}; |
734 | } |
735 | |
736 | bool AMDGPUGenPreLegalizerCombinerHelperRuleConfig::setRuleEnabled(StringRef RuleIdentifier) { |
737 | auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier); |
738 | if (!MaybeRange) |
739 | return false; |
740 | for (auto I = MaybeRange->first; I < MaybeRange->second; ++I) |
741 | DisabledRules.reset(I); |
742 | return true; |
743 | } |
744 | |
745 | bool AMDGPUGenPreLegalizerCombinerHelperRuleConfig::setRuleDisabled(StringRef RuleIdentifier) { |
746 | auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier); |
747 | if (!MaybeRange) |
748 | return false; |
749 | for (auto I = MaybeRange->first; I < MaybeRange->second; ++I) |
750 | DisabledRules.set(I); |
751 | return true; |
752 | } |
753 | |
754 | bool AMDGPUGenPreLegalizerCombinerHelperRuleConfig::isRuleDisabled(unsigned RuleID) const { |
755 | return DisabledRules.test(RuleID); |
756 | } |
757 | #endif // ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H |
758 | |
759 | #ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP |
760 | |
761 | std::vector<std::string> AMDGPUPreLegalizerCombinerHelperOption; |
762 | cl::list<std::string> AMDGPUPreLegalizerCombinerHelperDisableOption( |
763 | "amdgpuprelegalizercombinerhelper-disable-rule", |
764 | cl::desc("Disable one or more combiner rules temporarily in the AMDGPUPreLegalizerCombinerHelper pass"), |
765 | cl::CommaSeparated, |
766 | cl::Hidden, |
767 | cl::cat(GICombinerOptionCategory), |
768 | cl::callback([](const std::string &Str) { |
769 | AMDGPUPreLegalizerCombinerHelperOption.push_back(Str); |
770 | })); |
771 | cl::list<std::string> AMDGPUPreLegalizerCombinerHelperOnlyEnableOption( |
772 | "amdgpuprelegalizercombinerhelper-only-enable-rule", |
773 | cl::desc("Disable all rules in the AMDGPUPreLegalizerCombinerHelper pass then re-enable the specified ones"), |
774 | cl::Hidden, |
775 | cl::cat(GICombinerOptionCategory), |
776 | cl::callback([](const std::string &CommaSeparatedArg) { |
777 | StringRef Str = CommaSeparatedArg; |
778 | AMDGPUPreLegalizerCombinerHelperOption.push_back("*"); |
779 | do { |
780 | auto X = Str.split(","); |
781 | AMDGPUPreLegalizerCombinerHelperOption.push_back(("!" + X.first).str()); |
782 | Str = X.second; |
783 | } while (!Str.empty()); |
784 | })); |
785 | |
786 | bool AMDGPUGenPreLegalizerCombinerHelperRuleConfig::parseCommandLineOption() { |
787 | for (StringRef Identifier : AMDGPUPreLegalizerCombinerHelperOption) { |
788 | bool Enabled = Identifier.consume_front("!"); |
789 | if (Enabled && !setRuleEnabled(Identifier)) |
790 | return false; |
791 | if (!Enabled && !setRuleDisabled(Identifier)) |
792 | return false; |
793 | } |
794 | return true; |
795 | } |
796 | |
797 | bool AMDGPUGenPreLegalizerCombinerHelper::tryCombineAll( |
798 | GISelChangeObserver &Observer, |
799 | MachineInstr &MI, |
800 | MachineIRBuilder &B) const { |
801 | MachineBasicBlock *MBB = MI.getParent(); |
802 | MachineFunction *MF = MBB->getParent(); |
803 | MachineRegisterInfo &MRI = MF->getRegInfo(); |
804 | SmallVector<MachineInstr *, 8> MIs = {&MI}; |
805 | |
806 | (void)MBB; (void)MF; (void)MRI; (void)RuleConfig; |
807 | |
808 | // Match data |
809 | unsigned MatchData1; |
810 | std::pair<Register, bool> MatchData2; |
811 | SmallVector<Register, 4> MatchData5; |
812 | Register MatchData6; |
813 | SmallVector<std::pair<Register, MachineInstr*>> MatchData7; |
814 | PreferredTuple MatchData8; |
815 | std::function<void(MachineIRBuilder &)> MatchData9; |
816 | IndexedLoadStoreMatchInfo MatchData10; |
817 | std::function<void(MachineIRBuilder &)> MatchData21; |
818 | Register MatchData28; |
819 | Register MatchData29; |
820 | Register MatchData30; |
821 | Register MatchData31; |
822 | Register MatchData33; |
823 | Register MatchData34; |
824 | Register MatchData35; |
825 | Register MatchData36; |
826 | MachineInstr* MatchData38; |
827 | std::tuple<Register, Register> MatchData39; |
828 | InstructionStepsMatchInfo MatchData40; |
829 | std::function<void(MachineIRBuilder &)> MatchData41; |
830 | PtrAddChain MatchData42; |
831 | std::tuple<Register, int64_t> MatchData43; |
832 | std::tuple<Register, unsigned> MatchData44; |
833 | RegisterImmPair MatchData45; |
834 | std::function<void(MachineIRBuilder &)> MatchData46; |
835 | unsigned MatchData48; |
836 | std::function<void(MachineIRBuilder &)> MatchData49; |
837 | Register MatchData50; |
838 | Register MatchData52; |
839 | Register MatchData54; |
840 | int64_t MatchData55; |
841 | std::function<void(MachineIRBuilder &)> MatchData56; |
842 | std::tuple<Register, unsigned> MatchData58; |
843 | SmallVector<Register, 4> MatchData59; |
844 | MachineInstr * MatchData60; |
845 | SmallVector<Register, 8> MatchData61; |
846 | SmallVector<APInt, 8> MatchData62; |
847 | Register MatchData65; |
848 | std::pair<Register, unsigned> MatchData66; |
849 | std::pair<MachineInstr*, LLT> MatchData67; |
850 | std::optional<APFloat> MatchData68; |
851 | APInt MatchData69; |
852 | std::function<void(MachineIRBuilder &)> MatchData70; |
853 | std::function<void(MachineIRBuilder &)> MatchData71; |
854 | std::function<void(MachineIRBuilder &)> MatchData72; |
855 | std::function<void(MachineIRBuilder &)> MatchData73; |
856 | std::function<void(MachineIRBuilder &)> MatchData74; |
857 | unsigned MatchData75; |
858 | std::pair<Register, Register> MatchData76; |
859 | RegisterImmPair MatchData78; |
860 | ShiftOfShiftedLogic MatchData79; |
861 | std::function<void(MachineIRBuilder &)> MatchData80; |
862 | MergeTruncStoresInfo MatchData81; |
863 | MachineInstr * MatchData82; |
864 | std::function<void(MachineIRBuilder &)> MatchData83; |
865 | std::function<void(MachineIRBuilder &)> MatchData85; |
866 | std::function<void(MachineIRBuilder &)> MatchData86; |
867 | std::function<void(MachineIRBuilder &)> MatchData87; |
868 | std::function<void(MachineIRBuilder &)> MatchData88; |
869 | APInt MatchData89; |
870 | std::function<void(MachineIRBuilder &)> MatchData90; |
871 | std::function<void(MachineIRBuilder &)> MatchData94; |
872 | std::function<void(MachineIRBuilder &)> MatchData95; |
873 | std::function<void(MachineIRBuilder &)> MatchData96; |
874 | std::function<void(MachineIRBuilder &)> MatchData97; |
875 | std::function<void(MachineIRBuilder &)> MatchData98; |
876 | std::function<void(MachineIRBuilder &)> MatchData99; |
877 | std::function<void(MachineIRBuilder &)> MatchData100; |
878 | std::function<void(MachineIRBuilder &)> MatchData101; |
879 | std::function<void(MachineIRBuilder &)> MatchData102; |
880 | std::function<void(MachineIRBuilder &)> MatchData103; |
881 | unsigned MatchData104; |
882 | std::function<void(MachineIRBuilder &)> MatchData105; |
883 | std::function<void(MachineIRBuilder &)> MatchData106; |
884 | std::function<void(MachineIRBuilder &)> MatchData107; |
885 | Register MatchData108; |
886 | AMDGPUPreLegalizerCombinerHelper::ClampI64ToI16MatchInfo MatchData110; |
887 | MachineInstr * MatchData111; |
888 | |
889 | int Partition = -1; |
890 | Partition = -1; |
891 | switch (MIs[0]->getOpcode()) { |
892 | case TargetOpcode::COPY: Partition = 0; break; |
893 | case TargetOpcode::G_MUL: Partition = 1; break; |
894 | case TargetOpcode::G_ADD: Partition = 2; break; |
895 | case TargetOpcode::G_FREEZE: Partition = 3; break; |
896 | case TargetOpcode::G_FABS: Partition = 4; break; |
897 | case TargetOpcode::G_FCANONICALIZE: Partition = 5; break; |
898 | case TargetOpcode::G_INSERT_VECTOR_ELT: Partition = 6; break; |
899 | case TargetOpcode::G_EXTRACT_VECTOR_ELT: Partition = 7; break; |
900 | case TargetOpcode::G_BUILD_VECTOR: Partition = 8; break; |
901 | case TargetOpcode::G_LOAD: Partition = 9; break; |
902 | case TargetOpcode::G_SEXTLOAD: Partition = 10; break; |
903 | case TargetOpcode::G_ZEXTLOAD: Partition = 11; break; |
904 | case TargetOpcode::G_AND: Partition = 12; break; |
905 | case TargetOpcode::G_STORE: Partition = 13; break; |
906 | case TargetOpcode::G_UITOFP: Partition = 14; break; |
907 | case TargetOpcode::G_SITOFP: Partition = 15; break; |
908 | case TargetOpcode::G_OR: Partition = 16; break; |
909 | case TargetOpcode::G_SHL: Partition = 17; break; |
910 | case TargetOpcode::G_UDIV: Partition = 18; break; |
911 | case TargetOpcode::G_UREM: Partition = 19; break; |
912 | case TargetOpcode::G_ASHR: Partition = 20; break; |
913 | case TargetOpcode::G_LSHR: Partition = 21; break; |
914 | case TargetOpcode::G_ABS: Partition = 22; break; |
915 | case TargetOpcode::G_FPTOSI: Partition = 23; break; |
916 | case TargetOpcode::G_FPTOUI: Partition = 24; break; |
917 | case TargetOpcode::G_SUB: Partition = 25; break; |
918 | case TargetOpcode::G_XOR: Partition = 26; break; |
919 | case TargetOpcode::G_TRUNC: Partition = 27; break; |
920 | case TargetOpcode::G_SHUFFLE_VECTOR: Partition = 28; break; |
921 | case TargetOpcode::G_UNMERGE_VALUES: Partition = 29; break; |
922 | case TargetOpcode::G_SELECT: Partition = 30; break; |
923 | case TargetOpcode::G_PTR_ADD: Partition = 31; break; |
924 | case TargetOpcode::G_ROTL: Partition = 32; break; |
925 | case TargetOpcode::G_ROTR: Partition = 33; break; |
926 | case TargetOpcode::G_SDIV: Partition = 34; break; |
927 | case TargetOpcode::G_SREM: Partition = 35; break; |
928 | case TargetOpcode::G_INTTOPTR: Partition = 36; break; |
929 | case TargetOpcode::G_PTRTOINT: Partition = 37; break; |
930 | case TargetOpcode::G_ANYEXT: Partition = 38; break; |
931 | case TargetOpcode::G_FNEG: Partition = 39; break; |
932 | case TargetOpcode::G_BUILD_VECTOR_TRUNC: Partition = 40; break; |
933 | case TargetOpcode::G_BITCAST: Partition = 41; break; |
934 | case TargetOpcode::G_PHI: Partition = 42; break; |
935 | case TargetOpcode::G_SEXT_INREG: Partition = 43; break; |
936 | case TargetOpcode::G_ZEXT: Partition = 44; break; |
937 | case TargetOpcode::G_ICMP: Partition = 45; break; |
938 | case TargetOpcode::G_SEXT: Partition = 46; break; |
939 | case TargetOpcode::G_BR: Partition = 47; break; |
940 | case TargetOpcode::G_MERGE_VALUES: Partition = 48; break; |
941 | case TargetOpcode::G_FPTRUNC: Partition = 49; break; |
942 | case TargetOpcode::G_FSQRT: Partition = 50; break; |
943 | case TargetOpcode::G_FLOG2: Partition = 51; break; |
944 | case TargetOpcode::G_UMULO: Partition = 52; break; |
945 | case TargetOpcode::G_SMULO: Partition = 53; break; |
946 | case TargetOpcode::G_UADDO: Partition = 54; break; |
947 | case TargetOpcode::G_SADDO: Partition = 55; break; |
948 | case TargetOpcode::G_UADDE: Partition = 56; break; |
949 | case TargetOpcode::G_SADDE: Partition = 57; break; |
950 | case TargetOpcode::G_USUBE: Partition = 58; break; |
951 | case TargetOpcode::G_SSUBE: Partition = 59; break; |
952 | case TargetOpcode::G_FMINNUM: Partition = 60; break; |
953 | case TargetOpcode::G_FMAXNUM: Partition = 61; break; |
954 | case TargetOpcode::G_FMINIMUM: Partition = 62; break; |
955 | case TargetOpcode::G_FMAXIMUM: Partition = 63; break; |
956 | case TargetOpcode::G_SSHLSAT: Partition = 64; break; |
957 | case TargetOpcode::G_USHLSAT: Partition = 65; break; |
958 | case TargetOpcode::G_FSHL: Partition = 66; break; |
959 | case TargetOpcode::G_FSHR: Partition = 67; break; |
960 | case TargetOpcode::G_UMULH: Partition = 68; break; |
961 | case TargetOpcode::G_FADD: Partition = 69; break; |
962 | case TargetOpcode::G_FSUB: Partition = 70; break; |
963 | case TargetOpcode::G_FMUL: Partition = 71; break; |
964 | case TargetOpcode::G_FDIV: Partition = 72; break; |
965 | case TargetOpcode::G_FMAD: Partition = 73; break; |
966 | case TargetOpcode::G_FMA: Partition = 74; break; |
967 | case TargetOpcode::G_SMIN: Partition = 75; break; |
968 | case TargetOpcode::G_SMAX: Partition = 76; break; |
969 | case TargetOpcode::G_UMIN: Partition = 77; break; |
970 | case TargetOpcode::G_UMAX: Partition = 78; break; |
971 | case TargetOpcode::G_FREM: Partition = 79; break; |
972 | } |
973 | // Default case but without conflicting with potential default case in selection. |
974 | if (Partition == -1) return false; |
975 | if (Partition == 0 /* TargetOpcode::COPY */) { |
976 | // Leaf name: copy_prop |
977 | // Rule: copy_prop |
978 | if (!RuleConfig->isRuleDisabled(0)) { |
979 | if (1 |
980 | && [&]() { |
981 | return Helper.matchCombineCopy(*MIs[0]); |
982 | return true; |
983 | }() ) { |
984 | LLVM_DEBUG(dbgs() << "Applying rule 'copy_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'copy_prop'\n" ; } } while (false); |
985 | Helper.applyCombineCopy(*MIs[0]); |
986 | return true; |
987 | } |
988 | } |
989 | return false; |
990 | } |
991 | if (Partition == 1 /* TargetOpcode::G_MUL */) { |
992 | // Leaf name: mul_to_shl |
993 | // Rule: mul_to_shl |
994 | if (!RuleConfig->isRuleDisabled(1)) { |
995 | if (1 |
996 | && [&]() { |
997 | return Helper.matchCombineMulToShl(*MIs[0], MatchData1); |
998 | return true; |
999 | }() ) { |
1000 | LLVM_DEBUG(dbgs() << "Applying rule 'mul_to_shl'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mul_to_shl'\n" ; } } while (false); |
1001 | Helper.applyCombineMulToShl(*MIs[0], MatchData1); |
1002 | return true; |
1003 | } |
1004 | } |
1005 | // Leaf name: mul_by_neg_one |
1006 | // Rule: mul_by_neg_one |
1007 | if (!RuleConfig->isRuleDisabled(3)) { |
1008 | if (1 |
1009 | && [&]() { |
1010 | return Helper.matchConstantOp(MIs[0]->getOperand(2), -1); |
1011 | return true; |
1012 | }() ) { |
1013 | LLVM_DEBUG(dbgs() << "Applying rule 'mul_by_neg_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mul_by_neg_one'\n" ; } } while (false); |
1014 | Helper.applyCombineMulByNegativeOne(*MIs[0]); |
1015 | return true; |
1016 | } |
1017 | } |
1018 | // Leaf name: undef_to_int_zero |
1019 | // Rule: undef_to_int_zero |
1020 | if (!RuleConfig->isRuleDisabled(12)) { |
1021 | if (1 |
1022 | && [&]() { |
1023 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1024 | return true; |
1025 | }() ) { |
1026 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n" ; } } while (false); |
1027 | Helper.replaceInstWithConstant(*MIs[0], 0); |
1028 | return true; |
1029 | } |
1030 | } |
1031 | // Leaf name: binop_right_to_zero |
1032 | // Rule: binop_right_to_zero |
1033 | if (!RuleConfig->isRuleDisabled(27)) { |
1034 | if (1 |
1035 | && [&]() { |
1036 | return Helper.matchOperandIsZero(*MIs[0], 2); |
1037 | return true; |
1038 | }() ) { |
1039 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_to_zero'\n" ; } } while (false); |
1040 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
1041 | return true; |
1042 | } |
1043 | } |
1044 | // Leaf name: right_identity_one |
1045 | // Rule: right_identity_one |
1046 | if (!RuleConfig->isRuleDisabled(32)) { |
1047 | if (1 |
1048 | && [&]() { |
1049 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 1); |
1050 | return true; |
1051 | }() ) { |
1052 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_one'\n" ; } } while (false); |
1053 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1054 | return true; |
1055 | } |
1056 | } |
1057 | // Leaf name: constant_fold |
1058 | // Rule: constant_fold |
1059 | if (!RuleConfig->isRuleDisabled(89)) { |
1060 | if (1 |
1061 | && [&]() { |
1062 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
1063 | return true; |
1064 | }() ) { |
1065 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
1066 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
1067 | return true; |
1068 | } |
1069 | } |
1070 | // Leaf name: commute_constant_to_rhs |
1071 | // Rule: commute_constant_to_rhs |
1072 | if (!RuleConfig->isRuleDisabled(109)) { |
1073 | if (1 |
1074 | && [&]() { |
1075 | |
1076 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
1077 | |
1078 | return true; |
1079 | }() ) { |
1080 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
1081 | |
1082 | Observer.changingInstr(*MIs[0]); |
1083 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
1084 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
1085 | MIs[0]->getOperand(1).setReg(RHSReg); |
1086 | MIs[0]->getOperand(2).setReg(LHSReg); |
1087 | Observer.changedInstr(*MIs[0]); |
1088 | |
1089 | return true; |
1090 | } |
1091 | } |
1092 | return false; |
1093 | } |
1094 | if (Partition == 2 /* TargetOpcode::G_ADD */) { |
1095 | // Leaf name: add_p2i_to_ptradd |
1096 | // Rule: add_p2i_to_ptradd |
1097 | if (!RuleConfig->isRuleDisabled(2)) { |
1098 | if (1 |
1099 | && [&]() { |
1100 | return Helper.matchCombineAddP2IToPtrAdd(*MIs[0], MatchData2); |
1101 | return true; |
1102 | }() ) { |
1103 | LLVM_DEBUG(dbgs() << "Applying rule 'add_p2i_to_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'add_p2i_to_ptradd'\n" ; } } while (false); |
1104 | Helper.applyCombineAddP2IToPtrAdd(*MIs[0], MatchData2); |
1105 | return true; |
1106 | } |
1107 | } |
1108 | // Leaf name: propagate_undef_any_op |
1109 | // Rule: propagate_undef_any_op |
1110 | if (!RuleConfig->isRuleDisabled(17)) { |
1111 | if (1 |
1112 | && [&]() { |
1113 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1114 | return true; |
1115 | }() ) { |
1116 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
1117 | Helper.replaceInstWithUndef(*MIs[0]); |
1118 | return true; |
1119 | } |
1120 | } |
1121 | // Leaf name: right_identity_zero |
1122 | // Rule: right_identity_zero |
1123 | if (!RuleConfig->isRuleDisabled(24)) { |
1124 | if (1 |
1125 | && [&]() { |
1126 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
1127 | return true; |
1128 | }() ) { |
1129 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
1130 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1131 | return true; |
1132 | } |
1133 | } |
1134 | // Leaf name: add_sub_reg |
1135 | // Rule: add_sub_reg |
1136 | if (!RuleConfig->isRuleDisabled(33)) { |
1137 | if (1 |
1138 | && [&]() { |
1139 | return Helper.matchAddSubSameReg(*MIs[0], MatchData33); |
1140 | return true; |
1141 | }() ) { |
1142 | LLVM_DEBUG(dbgs() << "Applying rule 'add_sub_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'add_sub_reg'\n" ; } } while (false); |
1143 | return Helper.replaceSingleDefInstWithReg(*MIs[0], |
1144 | MatchData33); |
1145 | return true; |
1146 | } |
1147 | } |
1148 | // Leaf name: simplify_add_to_sub |
1149 | // Rule: simplify_add_to_sub |
1150 | if (!RuleConfig->isRuleDisabled(39)) { |
1151 | if (1 |
1152 | && [&]() { |
1153 | return Helper.matchSimplifyAddToSub(*MIs[0], MatchData39); |
1154 | return true; |
1155 | }() ) { |
1156 | LLVM_DEBUG(dbgs() << "Applying rule 'simplify_add_to_sub'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'simplify_add_to_sub'\n" ; } } while (false); |
1157 | Helper.applySimplifyAddToSub(*MIs[0], MatchData39); |
1158 | return true; |
1159 | } |
1160 | } |
1161 | // Leaf name: constant_fold |
1162 | // Rule: constant_fold |
1163 | if (!RuleConfig->isRuleDisabled(89)) { |
1164 | if (1 |
1165 | && [&]() { |
1166 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
1167 | return true; |
1168 | }() ) { |
1169 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
1170 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
1171 | return true; |
1172 | } |
1173 | } |
1174 | // Leaf name: fold_binop_into_select |
1175 | // Rule: fold_binop_into_select |
1176 | if (!RuleConfig->isRuleDisabled(104)) { |
1177 | if (1 |
1178 | && [&]() { |
1179 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
1180 | return true; |
1181 | }() ) { |
1182 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
1183 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
1184 | return true; |
1185 | } |
1186 | } |
1187 | // Leaf name: commute_constant_to_rhs |
1188 | // Rule: commute_constant_to_rhs |
1189 | if (!RuleConfig->isRuleDisabled(109)) { |
1190 | if (1 |
1191 | && [&]() { |
1192 | |
1193 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
1194 | |
1195 | return true; |
1196 | }() ) { |
1197 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
1198 | |
1199 | Observer.changingInstr(*MIs[0]); |
1200 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
1201 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
1202 | MIs[0]->getOperand(1).setReg(RHSReg); |
1203 | MIs[0]->getOperand(2).setReg(LHSReg); |
1204 | Observer.changedInstr(*MIs[0]); |
1205 | |
1206 | return true; |
1207 | } |
1208 | } |
1209 | return false; |
1210 | } |
1211 | if (Partition == 3 /* TargetOpcode::G_FREEZE */) { |
1212 | // Leaf name: idempotent_prop |
1213 | // Rule: idempotent_prop |
1214 | if (!RuleConfig->isRuleDisabled(4)) { |
1215 | if (1 |
1216 | && [&]() { |
1217 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
1218 | MIs[0]->getOpcode(); |
1219 | return true; |
1220 | }() ) { |
1221 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
1222 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1223 | return true; |
1224 | } |
1225 | } |
1226 | return false; |
1227 | } |
1228 | if (Partition == 4 /* TargetOpcode::G_FABS */) { |
1229 | // Leaf name: idempotent_prop |
1230 | // Rule: idempotent_prop |
1231 | if (!RuleConfig->isRuleDisabled(4)) { |
1232 | if (1 |
1233 | && [&]() { |
1234 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
1235 | MIs[0]->getOpcode(); |
1236 | return true; |
1237 | }() ) { |
1238 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
1239 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1240 | return true; |
1241 | } |
1242 | } |
1243 | // Leaf name: constant_fp_op |
1244 | // Rule: constant_fp_op |
1245 | if (!RuleConfig->isRuleDisabled(68)) { |
1246 | if (1 |
1247 | && [&]() { |
1248 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
1249 | return true; |
1250 | }() ) { |
1251 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
1252 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
1253 | return true; |
1254 | } |
1255 | } |
1256 | // Leaf name: fabs_fneg_fold |
1257 | // Rule: fabs_fneg_fold |
1258 | if (!RuleConfig->isRuleDisabled(90)) { |
1259 | if (1 |
1260 | && [&]() { |
1261 | return Helper.matchCombineFAbsOfFNeg(*MIs[0], MatchData90); |
1262 | return true; |
1263 | }() ) { |
1264 | LLVM_DEBUG(dbgs() << "Applying rule 'fabs_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fabs_fneg_fold'\n" ; } } while (false); |
1265 | Helper.applyBuildFnNoErase(*MIs[0], MatchData90); |
1266 | return true; |
1267 | } |
1268 | } |
1269 | return false; |
1270 | } |
1271 | if (Partition == 5 /* TargetOpcode::G_FCANONICALIZE */) { |
1272 | // Leaf name: idempotent_prop |
1273 | // Rule: idempotent_prop |
1274 | if (!RuleConfig->isRuleDisabled(4)) { |
1275 | if (1 |
1276 | && [&]() { |
1277 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
1278 | MIs[0]->getOpcode(); |
1279 | return true; |
1280 | }() ) { |
1281 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
1282 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1283 | return true; |
1284 | } |
1285 | } |
1286 | return false; |
1287 | } |
1288 | if (Partition == 6 /* TargetOpcode::G_INSERT_VECTOR_ELT */) { |
1289 | // Leaf name: combine_insert_vec_elts_build_vector |
1290 | // Rule: combine_insert_vec_elts_build_vector |
1291 | if (!RuleConfig->isRuleDisabled(5)) { |
1292 | if (1 |
1293 | && [&]() { |
1294 | return Helper.matchCombineInsertVecElts(*MIs[0], MatchData5); |
1295 | return true; |
1296 | }() ) { |
1297 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n" ; } } while (false); |
1298 | Helper.applyCombineInsertVecElts(*MIs[0], MatchData5); |
1299 | return true; |
1300 | } |
1301 | } |
1302 | // Leaf name: insert_extract_vec_elt_out_of_bounds |
1303 | // Rule: insert_extract_vec_elt_out_of_bounds |
1304 | if (!RuleConfig->isRuleDisabled(22)) { |
1305 | if (1 |
1306 | && [&]() { |
1307 | return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]); |
1308 | return true; |
1309 | }() ) { |
1310 | LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n" ; } } while (false); |
1311 | Helper.replaceInstWithUndef(*MIs[0]); |
1312 | return true; |
1313 | } |
1314 | } |
1315 | return false; |
1316 | } |
1317 | if (Partition == 7 /* TargetOpcode::G_EXTRACT_VECTOR_ELT */) { |
1318 | // Leaf name: extract_vec_elt_build_vec |
1319 | // Rule: extract_vec_elt_build_vec |
1320 | if (!RuleConfig->isRuleDisabled(6)) { |
1321 | if (1 |
1322 | && [&]() { |
1323 | return Helper.matchExtractVecEltBuildVec(*MIs[0], MatchData6); |
1324 | return true; |
1325 | }() ) { |
1326 | LLVM_DEBUG(dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n" ; } } while (false); |
1327 | Helper.applyExtractVecEltBuildVec(*MIs[0], MatchData6); |
1328 | return true; |
1329 | } |
1330 | } |
1331 | // Leaf name: insert_extract_vec_elt_out_of_bounds |
1332 | // Rule: insert_extract_vec_elt_out_of_bounds |
1333 | if (!RuleConfig->isRuleDisabled(22)) { |
1334 | if (1 |
1335 | && [&]() { |
1336 | return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]); |
1337 | return true; |
1338 | }() ) { |
1339 | LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n" ; } } while (false); |
1340 | Helper.replaceInstWithUndef(*MIs[0]); |
1341 | return true; |
1342 | } |
1343 | } |
1344 | return false; |
1345 | } |
1346 | if (Partition == 8 /* TargetOpcode::G_BUILD_VECTOR */) { |
1347 | // Leaf name: extract_all_elts_from_build_vector |
1348 | // Rule: extract_all_elts_from_build_vector |
1349 | if (!RuleConfig->isRuleDisabled(7)) { |
1350 | if (1 |
1351 | && [&]() { |
1352 | return Helper.matchExtractAllEltsFromBuildVector(*MIs[0], MatchData7); |
1353 | return true; |
1354 | }() ) { |
1355 | LLVM_DEBUG(dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n" ; } } while (false); |
1356 | Helper.applyExtractAllEltsFromBuildVector(*MIs[0], MatchData7); |
1357 | return true; |
1358 | } |
1359 | } |
1360 | // Leaf name: buildvector_identity_fold |
1361 | // Rule: buildvector_identity_fold |
1362 | if (!RuleConfig->isRuleDisabled(34)) { |
1363 | if (1 |
1364 | && [&]() { |
1365 | return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34); |
1366 | return true; |
1367 | }() ) { |
1368 | LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n" ; } } while (false); |
1369 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34); |
1370 | return true; |
1371 | } |
1372 | } |
1373 | return false; |
1374 | } |
1375 | if (Partition == 9 /* TargetOpcode::G_LOAD */) { |
1376 | // Leaf name: extending_loads |
1377 | // Rule: extending_loads |
1378 | if (!RuleConfig->isRuleDisabled(8)) { |
1379 | if (1 |
1380 | && [&]() { |
1381 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
1382 | return true; |
1383 | }() ) { |
1384 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
1385 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
1386 | return true; |
1387 | } |
1388 | } |
1389 | // Leaf name: combine_indexed_load_store |
1390 | // Rule: combine_indexed_load_store |
1391 | if (!RuleConfig->isRuleDisabled(10)) { |
1392 | if (1 |
1393 | && [&]() { |
1394 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
1395 | return true; |
1396 | }() ) { |
1397 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
1398 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
1399 | return true; |
1400 | } |
1401 | } |
1402 | return false; |
1403 | } |
1404 | if (Partition == 10 /* TargetOpcode::G_SEXTLOAD */) { |
1405 | // Leaf name: extending_loads |
1406 | // Rule: extending_loads |
1407 | if (!RuleConfig->isRuleDisabled(8)) { |
1408 | if (1 |
1409 | && [&]() { |
1410 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
1411 | return true; |
1412 | }() ) { |
1413 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
1414 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
1415 | return true; |
1416 | } |
1417 | } |
1418 | // Leaf name: combine_indexed_load_store |
1419 | // Rule: combine_indexed_load_store |
1420 | if (!RuleConfig->isRuleDisabled(10)) { |
1421 | if (1 |
1422 | && [&]() { |
1423 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
1424 | return true; |
1425 | }() ) { |
1426 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
1427 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
1428 | return true; |
1429 | } |
1430 | } |
1431 | return false; |
1432 | } |
1433 | if (Partition == 11 /* TargetOpcode::G_ZEXTLOAD */) { |
1434 | // Leaf name: extending_loads |
1435 | // Rule: extending_loads |
1436 | if (!RuleConfig->isRuleDisabled(8)) { |
1437 | if (1 |
1438 | && [&]() { |
1439 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
1440 | return true; |
1441 | }() ) { |
1442 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
1443 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
1444 | return true; |
1445 | } |
1446 | } |
1447 | // Leaf name: combine_indexed_load_store |
1448 | // Rule: combine_indexed_load_store |
1449 | if (!RuleConfig->isRuleDisabled(10)) { |
1450 | if (1 |
1451 | && [&]() { |
1452 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
1453 | return true; |
1454 | }() ) { |
1455 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
1456 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
1457 | return true; |
1458 | } |
1459 | } |
1460 | return false; |
1461 | } |
1462 | if (Partition == 12 /* TargetOpcode::G_AND */) { |
1463 | // Leaf name: load_and_mask |
1464 | // Rule: load_and_mask |
1465 | if (!RuleConfig->isRuleDisabled(9)) { |
1466 | if (1 |
1467 | && [&]() { |
1468 | return Helper.matchCombineLoadWithAndMask(*MIs[0], MatchData9); |
1469 | return true; |
1470 | }() ) { |
1471 | LLVM_DEBUG(dbgs() << "Applying rule 'load_and_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'load_and_mask'\n" ; } } while (false); |
1472 | Helper.applyBuildFn(*MIs[0], MatchData9); |
1473 | return true; |
1474 | } |
1475 | } |
1476 | // Leaf name: undef_to_int_zero |
1477 | // Rule: undef_to_int_zero |
1478 | if (!RuleConfig->isRuleDisabled(12)) { |
1479 | if (1 |
1480 | && [&]() { |
1481 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1482 | return true; |
1483 | }() ) { |
1484 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n" ; } } while (false); |
1485 | Helper.replaceInstWithConstant(*MIs[0], 0); |
1486 | return true; |
1487 | } |
1488 | } |
1489 | // Leaf name: binop_same_val |
1490 | // Rule: binop_same_val |
1491 | if (!RuleConfig->isRuleDisabled(25)) { |
1492 | if (1 |
1493 | && [&]() { |
1494 | return Helper.matchBinOpSameVal(*MIs[0]); |
1495 | return true; |
1496 | }() ) { |
1497 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n" ; } } while (false); |
1498 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1499 | return true; |
1500 | } |
1501 | } |
1502 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
1503 | // Rule: hoist_logic_op_with_same_opcode_hands |
1504 | if (!RuleConfig->isRuleDisabled(40)) { |
1505 | if (1 |
1506 | && [&]() { |
1507 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData40); |
1508 | return true; |
1509 | }() ) { |
1510 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
1511 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData40); |
1512 | return true; |
1513 | } |
1514 | } |
1515 | // Leaf name: narrow_binop_feeding_and |
1516 | // Rule: narrow_binop_feeding_and |
1517 | if (!RuleConfig->isRuleDisabled(46)) { |
1518 | if (1 |
1519 | && [&]() { |
1520 | return Helper.matchNarrowBinopFeedingAnd(*MIs[0], MatchData46); |
1521 | return true; |
1522 | }() ) { |
1523 | LLVM_DEBUG(dbgs() << "Applying rule 'narrow_binop_feeding_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'narrow_binop_feeding_and'\n" ; } } while (false); |
1524 | Helper.applyBuildFnNoErase(*MIs[0], MatchData46); |
1525 | return true; |
1526 | } |
1527 | } |
1528 | // Leaf name: redundant_and |
1529 | // Rule: redundant_and |
1530 | if (!RuleConfig->isRuleDisabled(50)) { |
1531 | if (1 |
1532 | && [&]() { |
1533 | return Helper.matchRedundantAnd(*MIs[0], MatchData50); |
1534 | return true; |
1535 | }() ) { |
1536 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_and'\n" ; } } while (false); |
1537 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData50); |
1538 | return true; |
1539 | } |
1540 | } |
1541 | // Leaf name: overlapping_and |
1542 | // Rule: overlapping_and |
1543 | if (!RuleConfig->isRuleDisabled(70)) { |
1544 | if (1 |
1545 | && [&]() { |
1546 | return Helper.matchOverlappingAnd(*MIs[0], MatchData70); |
1547 | return true; |
1548 | }() ) { |
1549 | LLVM_DEBUG(dbgs() << "Applying rule 'overlapping_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'overlapping_and'\n" ; } } while (false); |
1550 | Helper.applyBuildFn(*MIs[0], MatchData70); |
1551 | return true; |
1552 | } |
1553 | } |
1554 | // Leaf name: bitfield_extract_from_and |
1555 | // Rule: bitfield_extract_from_and |
1556 | if (!RuleConfig->isRuleDisabled(86)) { |
1557 | if (1 |
1558 | && [&]() { |
1559 | return Helper.matchBitfieldExtractFromAnd(*MIs[0], MatchData86); |
1560 | return true; |
1561 | }() ) { |
1562 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_and'\n" ; } } while (false); |
1563 | Helper.applyBuildFn(*MIs[0], MatchData86); |
1564 | return true; |
1565 | } |
1566 | } |
1567 | // Leaf name: constant_fold |
1568 | // Rule: constant_fold |
1569 | if (!RuleConfig->isRuleDisabled(89)) { |
1570 | if (1 |
1571 | && [&]() { |
1572 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
1573 | return true; |
1574 | }() ) { |
1575 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
1576 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
1577 | return true; |
1578 | } |
1579 | } |
1580 | // Leaf name: and_or_disjoint_mask |
1581 | // Rule: and_or_disjoint_mask |
1582 | if (!RuleConfig->isRuleDisabled(95)) { |
1583 | if (1 |
1584 | && [&]() { |
1585 | return Helper.matchAndOrDisjointMask(*MIs[0], MatchData95); |
1586 | return true; |
1587 | }() ) { |
1588 | LLVM_DEBUG(dbgs() << "Applying rule 'and_or_disjoint_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'and_or_disjoint_mask'\n" ; } } while (false); |
1589 | Helper.applyBuildFnNoErase(*MIs[0], MatchData95); |
1590 | return true; |
1591 | } |
1592 | } |
1593 | // Leaf name: fold_binop_into_select |
1594 | // Rule: fold_binop_into_select |
1595 | if (!RuleConfig->isRuleDisabled(104)) { |
1596 | if (1 |
1597 | && [&]() { |
1598 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
1599 | return true; |
1600 | }() ) { |
1601 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
1602 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
1603 | return true; |
1604 | } |
1605 | } |
1606 | // Leaf name: commute_constant_to_rhs |
1607 | // Rule: commute_constant_to_rhs |
1608 | if (!RuleConfig->isRuleDisabled(109)) { |
1609 | if (1 |
1610 | && [&]() { |
1611 | |
1612 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
1613 | |
1614 | return true; |
1615 | }() ) { |
1616 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
1617 | |
1618 | Observer.changingInstr(*MIs[0]); |
1619 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
1620 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
1621 | MIs[0]->getOperand(1).setReg(RHSReg); |
1622 | MIs[0]->getOperand(2).setReg(LHSReg); |
1623 | Observer.changedInstr(*MIs[0]); |
1624 | |
1625 | return true; |
1626 | } |
1627 | } |
1628 | return false; |
1629 | } |
1630 | if (Partition == 13 /* TargetOpcode::G_STORE */) { |
1631 | // Leaf name: combine_indexed_load_store |
1632 | // Rule: combine_indexed_load_store |
1633 | if (!RuleConfig->isRuleDisabled(10)) { |
1634 | if (1 |
1635 | && [&]() { |
1636 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
1637 | return true; |
1638 | }() ) { |
1639 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
1640 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
1641 | return true; |
1642 | } |
1643 | } |
1644 | // Leaf name: erase_undef_store |
1645 | // Rule: erase_undef_store |
1646 | if (!RuleConfig->isRuleDisabled(20)) { |
1647 | if (1 |
1648 | && [&]() { |
1649 | return Helper.matchUndefStore(*MIs[0]); |
1650 | return true; |
1651 | }() ) { |
1652 | LLVM_DEBUG(dbgs() << "Applying rule 'erase_undef_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'erase_undef_store'\n" ; } } while (false); |
1653 | return Helper.eraseInst(*MIs[0]); |
1654 | return true; |
1655 | } |
1656 | } |
1657 | // Leaf name: truncstore_merge |
1658 | // Rule: truncstore_merge |
1659 | if (!RuleConfig->isRuleDisabled(81)) { |
1660 | if (1 |
1661 | && [&]() { |
1662 | return Helper.matchTruncStoreMerge(*MIs[0], MatchData81); |
1663 | return true; |
1664 | }() ) { |
1665 | LLVM_DEBUG(dbgs() << "Applying rule 'truncstore_merge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'truncstore_merge'\n" ; } } while (false); |
1666 | Helper.applyTruncStoreMerge(*MIs[0], MatchData81); |
1667 | return true; |
1668 | } |
1669 | } |
1670 | return false; |
1671 | } |
1672 | if (Partition == 14 /* TargetOpcode::G_UITOFP */) { |
1673 | // Leaf name: undef_to_fp_zero |
1674 | // Rule: undef_to_fp_zero |
1675 | if (!RuleConfig->isRuleDisabled(11)) { |
1676 | if (1 |
1677 | && [&]() { |
1678 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1679 | return true; |
1680 | }() ) { |
1681 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n" ; } } while (false); |
1682 | Helper.replaceInstWithFConstant(*MIs[0], 0.0); |
1683 | return true; |
1684 | } |
1685 | } |
1686 | return false; |
1687 | } |
1688 | if (Partition == 15 /* TargetOpcode::G_SITOFP */) { |
1689 | // Leaf name: undef_to_fp_zero |
1690 | // Rule: undef_to_fp_zero |
1691 | if (!RuleConfig->isRuleDisabled(11)) { |
1692 | if (1 |
1693 | && [&]() { |
1694 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1695 | return true; |
1696 | }() ) { |
1697 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n" ; } } while (false); |
1698 | Helper.replaceInstWithFConstant(*MIs[0], 0.0); |
1699 | return true; |
1700 | } |
1701 | } |
1702 | return false; |
1703 | } |
1704 | if (Partition == 16 /* TargetOpcode::G_OR */) { |
1705 | // Leaf name: undef_to_negative_one |
1706 | // Rule: undef_to_negative_one |
1707 | if (!RuleConfig->isRuleDisabled(13)) { |
1708 | if (1 |
1709 | && [&]() { |
1710 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
1711 | return true; |
1712 | }() ) { |
1713 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_negative_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_negative_one'\n" ; } } while (false); |
1714 | Helper.replaceInstWithConstant(*MIs[0], -1); |
1715 | return true; |
1716 | } |
1717 | } |
1718 | // Leaf name: right_identity_zero |
1719 | // Rule: right_identity_zero |
1720 | if (!RuleConfig->isRuleDisabled(24)) { |
1721 | if (1 |
1722 | && [&]() { |
1723 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
1724 | return true; |
1725 | }() ) { |
1726 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
1727 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1728 | return true; |
1729 | } |
1730 | } |
1731 | // Leaf name: binop_same_val |
1732 | // Rule: binop_same_val |
1733 | if (!RuleConfig->isRuleDisabled(25)) { |
1734 | if (1 |
1735 | && [&]() { |
1736 | return Helper.matchBinOpSameVal(*MIs[0]); |
1737 | return true; |
1738 | }() ) { |
1739 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n" ; } } while (false); |
1740 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1741 | return true; |
1742 | } |
1743 | } |
1744 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
1745 | // Rule: hoist_logic_op_with_same_opcode_hands |
1746 | if (!RuleConfig->isRuleDisabled(40)) { |
1747 | if (1 |
1748 | && [&]() { |
1749 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData40); |
1750 | return true; |
1751 | }() ) { |
1752 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
1753 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData40); |
1754 | return true; |
1755 | } |
1756 | } |
1757 | // Leaf name: redundant_or |
1758 | // Rule: redundant_or |
1759 | if (!RuleConfig->isRuleDisabled(52)) { |
1760 | if (1 |
1761 | && [&]() { |
1762 | return Helper.matchRedundantOr(*MIs[0], MatchData52); |
1763 | return true; |
1764 | }() ) { |
1765 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_or'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_or'\n" ; } } while (false); |
1766 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData52); |
1767 | return true; |
1768 | } |
1769 | } |
1770 | // Leaf name: load_or_combine |
1771 | // Rule: load_or_combine |
1772 | if (!RuleConfig->isRuleDisabled(80)) { |
1773 | if (1 |
1774 | && [&]() { |
1775 | return Helper.matchLoadOrCombine(*MIs[0], MatchData80); |
1776 | return true; |
1777 | }() ) { |
1778 | LLVM_DEBUG(dbgs() << "Applying rule 'load_or_combine'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'load_or_combine'\n" ; } } while (false); |
1779 | Helper.applyBuildFn(*MIs[0], MatchData80); |
1780 | return true; |
1781 | } |
1782 | } |
1783 | // Leaf name: funnel_shift_from_or_shift |
1784 | // Rule: funnel_shift_from_or_shift |
1785 | if (!RuleConfig->isRuleDisabled(83)) { |
1786 | if (1 |
1787 | && [&]() { |
1788 | return Helper.matchOrShiftToFunnelShift(*MIs[0], MatchData83); |
1789 | return true; |
1790 | }() ) { |
1791 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n" ; } } while (false); |
1792 | Helper.applyBuildFn(*MIs[0], MatchData83); |
1793 | return true; |
1794 | } |
1795 | } |
1796 | // Leaf name: constant_fold |
1797 | // Rule: constant_fold |
1798 | if (!RuleConfig->isRuleDisabled(89)) { |
1799 | if (1 |
1800 | && [&]() { |
1801 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
1802 | return true; |
1803 | }() ) { |
1804 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
1805 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
1806 | return true; |
1807 | } |
1808 | } |
1809 | // Leaf name: fold_binop_into_select |
1810 | // Rule: fold_binop_into_select |
1811 | if (!RuleConfig->isRuleDisabled(104)) { |
1812 | if (1 |
1813 | && [&]() { |
1814 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
1815 | return true; |
1816 | }() ) { |
1817 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
1818 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
1819 | return true; |
1820 | } |
1821 | } |
1822 | // Leaf name: commute_constant_to_rhs |
1823 | // Rule: commute_constant_to_rhs |
1824 | if (!RuleConfig->isRuleDisabled(109)) { |
1825 | if (1 |
1826 | && [&]() { |
1827 | |
1828 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
1829 | |
1830 | return true; |
1831 | }() ) { |
1832 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
1833 | |
1834 | Observer.changingInstr(*MIs[0]); |
1835 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
1836 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
1837 | MIs[0]->getOperand(1).setReg(RHSReg); |
1838 | MIs[0]->getOperand(2).setReg(LHSReg); |
1839 | Observer.changedInstr(*MIs[0]); |
1840 | |
1841 | return true; |
1842 | } |
1843 | } |
1844 | return false; |
1845 | } |
1846 | if (Partition == 17 /* TargetOpcode::G_SHL */) { |
1847 | // Leaf name: binop_left_undef_to_zero |
1848 | // Rule: binop_left_undef_to_zero |
1849 | if (!RuleConfig->isRuleDisabled(14)) { |
1850 | if (1 |
1851 | && [&]() { |
1852 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
1853 | return true; |
1854 | }() ) { |
1855 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
1856 | Helper.replaceInstWithConstant(*MIs[0], 0); |
1857 | return true; |
1858 | } |
1859 | } |
1860 | // Leaf name: binop_right_undef_to_undef |
1861 | // Rule: binop_right_undef_to_undef |
1862 | if (!RuleConfig->isRuleDisabled(15)) { |
1863 | if (1 |
1864 | && [&]() { |
1865 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
1866 | return true; |
1867 | }() ) { |
1868 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
1869 | Helper.replaceInstWithUndef(*MIs[0]); |
1870 | return true; |
1871 | } |
1872 | } |
1873 | // Leaf name: right_identity_zero |
1874 | // Rule: right_identity_zero |
1875 | if (!RuleConfig->isRuleDisabled(24)) { |
1876 | if (1 |
1877 | && [&]() { |
1878 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
1879 | return true; |
1880 | }() ) { |
1881 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
1882 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1883 | return true; |
1884 | } |
1885 | } |
1886 | // Leaf name: reduce_shl_of_extend |
1887 | // Rule: reduce_shl_of_extend |
1888 | if (!RuleConfig->isRuleDisabled(45)) { |
1889 | if (1 |
1890 | && [&]() { |
1891 | return Helper.matchCombineShlOfExtend(*MIs[0], MatchData45); |
1892 | return true; |
1893 | }() ) { |
1894 | LLVM_DEBUG(dbgs() << "Applying rule 'reduce_shl_of_extend'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'reduce_shl_of_extend'\n" ; } } while (false); |
1895 | Helper.applyCombineShlOfExtend(*MIs[0], MatchData45); |
1896 | return true; |
1897 | } |
1898 | } |
1899 | // Leaf name: shift_immed_chain |
1900 | // Rule: shift_immed_chain |
1901 | if (!RuleConfig->isRuleDisabled(78)) { |
1902 | if (1 |
1903 | && [&]() { |
1904 | return Helper.matchShiftImmedChain(*MIs[0], MatchData78); |
1905 | return true; |
1906 | }() ) { |
1907 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
1908 | Helper.applyShiftImmedChain(*MIs[0], MatchData78); |
1909 | return true; |
1910 | } |
1911 | } |
1912 | // Leaf name: shift_of_shifted_logic_chain |
1913 | // Rule: shift_of_shifted_logic_chain |
1914 | if (!RuleConfig->isRuleDisabled(79)) { |
1915 | if (1 |
1916 | && [&]() { |
1917 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79); |
1918 | return true; |
1919 | }() ) { |
1920 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
1921 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79); |
1922 | return true; |
1923 | } |
1924 | } |
1925 | // Leaf name: fold_binop_into_select |
1926 | // Rule: fold_binop_into_select |
1927 | if (!RuleConfig->isRuleDisabled(104)) { |
1928 | if (1 |
1929 | && [&]() { |
1930 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
1931 | return true; |
1932 | }() ) { |
1933 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
1934 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
1935 | return true; |
1936 | } |
1937 | } |
1938 | return false; |
1939 | } |
1940 | if (Partition == 18 /* TargetOpcode::G_UDIV */) { |
1941 | // Leaf name: binop_left_undef_to_zero |
1942 | // Rule: binop_left_undef_to_zero |
1943 | if (!RuleConfig->isRuleDisabled(14)) { |
1944 | if (1 |
1945 | && [&]() { |
1946 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
1947 | return true; |
1948 | }() ) { |
1949 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
1950 | Helper.replaceInstWithConstant(*MIs[0], 0); |
1951 | return true; |
1952 | } |
1953 | } |
1954 | // Leaf name: binop_left_to_zero |
1955 | // Rule: binop_left_to_zero |
1956 | if (!RuleConfig->isRuleDisabled(26)) { |
1957 | if (1 |
1958 | && [&]() { |
1959 | return Helper.matchOperandIsZero(*MIs[0], 1); |
1960 | return true; |
1961 | }() ) { |
1962 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
1963 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
1964 | return true; |
1965 | } |
1966 | } |
1967 | // Leaf name: div_rem_to_divrem |
1968 | // Rule: div_rem_to_divrem |
1969 | if (!RuleConfig->isRuleDisabled(82)) { |
1970 | if (1 |
1971 | && [&]() { |
1972 | return Helper.matchCombineDivRem(*MIs[0], MatchData82); |
1973 | return true; |
1974 | }() ) { |
1975 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
1976 | Helper.applyCombineDivRem(*MIs[0], MatchData82); |
1977 | return true; |
1978 | } |
1979 | } |
1980 | // Leaf name: udiv_by_const |
1981 | // Rule: udiv_by_const |
1982 | if (!RuleConfig->isRuleDisabled(91)) { |
1983 | if (1 |
1984 | && [&]() { |
1985 | return Helper.matchUDivByConst(*MIs[0]); |
1986 | return true; |
1987 | }() ) { |
1988 | LLVM_DEBUG(dbgs() << "Applying rule 'udiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'udiv_by_const'\n" ; } } while (false); |
1989 | Helper.applyUDivByConst(*MIs[0]); |
1990 | return true; |
1991 | } |
1992 | } |
1993 | // Leaf name: fold_binop_into_select |
1994 | // Rule: fold_binop_into_select |
1995 | if (!RuleConfig->isRuleDisabled(104)) { |
1996 | if (1 |
1997 | && [&]() { |
1998 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
1999 | return true; |
2000 | }() ) { |
2001 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2002 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2003 | return true; |
2004 | } |
2005 | } |
2006 | return false; |
2007 | } |
2008 | if (Partition == 19 /* TargetOpcode::G_UREM */) { |
2009 | // Leaf name: binop_left_undef_to_zero |
2010 | // Rule: binop_left_undef_to_zero |
2011 | if (!RuleConfig->isRuleDisabled(14)) { |
2012 | if (1 |
2013 | && [&]() { |
2014 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
2015 | return true; |
2016 | }() ) { |
2017 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
2018 | Helper.replaceInstWithConstant(*MIs[0], 0); |
2019 | return true; |
2020 | } |
2021 | } |
2022 | // Leaf name: binop_left_to_zero |
2023 | // Rule: binop_left_to_zero |
2024 | if (!RuleConfig->isRuleDisabled(26)) { |
2025 | if (1 |
2026 | && [&]() { |
2027 | return Helper.matchOperandIsZero(*MIs[0], 1); |
2028 | return true; |
2029 | }() ) { |
2030 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
2031 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2032 | return true; |
2033 | } |
2034 | } |
2035 | // Leaf name: urem_pow2_to_mask |
2036 | // Rule: urem_pow2_to_mask |
2037 | if (!RuleConfig->isRuleDisabled(53)) { |
2038 | if (1 |
2039 | && [&]() { |
2040 | return Helper.matchOperandIsKnownToBeAPowerOfTwo(*MIs[0], 2); |
2041 | return true; |
2042 | }() ) { |
2043 | LLVM_DEBUG(dbgs() << "Applying rule 'urem_pow2_to_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'urem_pow2_to_mask'\n" ; } } while (false); |
2044 | Helper.applySimplifyURemByPow2(*MIs[0]); |
2045 | return true; |
2046 | } |
2047 | } |
2048 | // Leaf name: div_rem_to_divrem |
2049 | // Rule: div_rem_to_divrem |
2050 | if (!RuleConfig->isRuleDisabled(82)) { |
2051 | if (1 |
2052 | && [&]() { |
2053 | return Helper.matchCombineDivRem(*MIs[0], MatchData82); |
2054 | return true; |
2055 | }() ) { |
2056 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
2057 | Helper.applyCombineDivRem(*MIs[0], MatchData82); |
2058 | return true; |
2059 | } |
2060 | } |
2061 | // Leaf name: fold_binop_into_select |
2062 | // Rule: fold_binop_into_select |
2063 | if (!RuleConfig->isRuleDisabled(104)) { |
2064 | if (1 |
2065 | && [&]() { |
2066 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2067 | return true; |
2068 | }() ) { |
2069 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2070 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2071 | return true; |
2072 | } |
2073 | } |
2074 | return false; |
2075 | } |
2076 | if (Partition == 20 /* TargetOpcode::G_ASHR */) { |
2077 | // Leaf name: binop_right_undef_to_undef |
2078 | // Rule: binop_right_undef_to_undef |
2079 | if (!RuleConfig->isRuleDisabled(15)) { |
2080 | if (1 |
2081 | && [&]() { |
2082 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
2083 | return true; |
2084 | }() ) { |
2085 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
2086 | Helper.replaceInstWithUndef(*MIs[0]); |
2087 | return true; |
2088 | } |
2089 | } |
2090 | // Leaf name: right_identity_zero |
2091 | // Rule: right_identity_zero |
2092 | if (!RuleConfig->isRuleDisabled(24)) { |
2093 | if (1 |
2094 | && [&]() { |
2095 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2096 | return true; |
2097 | }() ) { |
2098 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2099 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2100 | return true; |
2101 | } |
2102 | } |
2103 | // Leaf name: shl_ashr_to_sext_inreg |
2104 | // Rule: shl_ashr_to_sext_inreg |
2105 | if (!RuleConfig->isRuleDisabled(43)) { |
2106 | if (1 |
2107 | && [&]() { |
2108 | return Helper.matchAshrShlToSextInreg(*MIs[0], MatchData43); |
2109 | return true; |
2110 | }() ) { |
2111 | LLVM_DEBUG(dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n" ; } } while (false); |
2112 | Helper.applyAshShlToSextInreg(*MIs[0], MatchData43); |
2113 | return true; |
2114 | } |
2115 | } |
2116 | // Leaf name: shift_immed_chain |
2117 | // Rule: shift_immed_chain |
2118 | if (!RuleConfig->isRuleDisabled(78)) { |
2119 | if (1 |
2120 | && [&]() { |
2121 | return Helper.matchShiftImmedChain(*MIs[0], MatchData78); |
2122 | return true; |
2123 | }() ) { |
2124 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
2125 | Helper.applyShiftImmedChain(*MIs[0], MatchData78); |
2126 | return true; |
2127 | } |
2128 | } |
2129 | // Leaf name: shift_of_shifted_logic_chain |
2130 | // Rule: shift_of_shifted_logic_chain |
2131 | if (!RuleConfig->isRuleDisabled(79)) { |
2132 | if (1 |
2133 | && [&]() { |
2134 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79); |
2135 | return true; |
2136 | }() ) { |
2137 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
2138 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79); |
2139 | return true; |
2140 | } |
2141 | } |
2142 | // Leaf name: bitfield_extract_from_shr |
2143 | // Rule: bitfield_extract_from_shr |
2144 | if (!RuleConfig->isRuleDisabled(87)) { |
2145 | if (1 |
2146 | && [&]() { |
2147 | return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData87); |
2148 | return true; |
2149 | }() ) { |
2150 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n" ; } } while (false); |
2151 | Helper.applyBuildFn(*MIs[0], MatchData87); |
2152 | return true; |
2153 | } |
2154 | } |
2155 | // Leaf name: bitfield_extract_from_shr_and |
2156 | // Rule: bitfield_extract_from_shr_and |
2157 | if (!RuleConfig->isRuleDisabled(88)) { |
2158 | if (1 |
2159 | && [&]() { |
2160 | return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData88); |
2161 | return true; |
2162 | }() ) { |
2163 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n" ; } } while (false); |
2164 | Helper.applyBuildFn(*MIs[0], MatchData88); |
2165 | return true; |
2166 | } |
2167 | } |
2168 | // Leaf name: fold_binop_into_select |
2169 | // Rule: fold_binop_into_select |
2170 | if (!RuleConfig->isRuleDisabled(104)) { |
2171 | if (1 |
2172 | && [&]() { |
2173 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2174 | return true; |
2175 | }() ) { |
2176 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2177 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2178 | return true; |
2179 | } |
2180 | } |
2181 | return false; |
2182 | } |
2183 | if (Partition == 21 /* TargetOpcode::G_LSHR */) { |
2184 | // Leaf name: binop_right_undef_to_undef |
2185 | // Rule: binop_right_undef_to_undef |
2186 | if (!RuleConfig->isRuleDisabled(15)) { |
2187 | if (1 |
2188 | && [&]() { |
2189 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
2190 | return true; |
2191 | }() ) { |
2192 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
2193 | Helper.replaceInstWithUndef(*MIs[0]); |
2194 | return true; |
2195 | } |
2196 | } |
2197 | // Leaf name: right_identity_zero |
2198 | // Rule: right_identity_zero |
2199 | if (!RuleConfig->isRuleDisabled(24)) { |
2200 | if (1 |
2201 | && [&]() { |
2202 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2203 | return true; |
2204 | }() ) { |
2205 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2206 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2207 | return true; |
2208 | } |
2209 | } |
2210 | // Leaf name: shift_immed_chain |
2211 | // Rule: shift_immed_chain |
2212 | if (!RuleConfig->isRuleDisabled(78)) { |
2213 | if (1 |
2214 | && [&]() { |
2215 | return Helper.matchShiftImmedChain(*MIs[0], MatchData78); |
2216 | return true; |
2217 | }() ) { |
2218 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
2219 | Helper.applyShiftImmedChain(*MIs[0], MatchData78); |
2220 | return true; |
2221 | } |
2222 | } |
2223 | // Leaf name: shift_of_shifted_logic_chain |
2224 | // Rule: shift_of_shifted_logic_chain |
2225 | if (!RuleConfig->isRuleDisabled(79)) { |
2226 | if (1 |
2227 | && [&]() { |
2228 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79); |
2229 | return true; |
2230 | }() ) { |
2231 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
2232 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79); |
2233 | return true; |
2234 | } |
2235 | } |
2236 | // Leaf name: bitfield_extract_from_shr |
2237 | // Rule: bitfield_extract_from_shr |
2238 | if (!RuleConfig->isRuleDisabled(87)) { |
2239 | if (1 |
2240 | && [&]() { |
2241 | return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData87); |
2242 | return true; |
2243 | }() ) { |
2244 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n" ; } } while (false); |
2245 | Helper.applyBuildFn(*MIs[0], MatchData87); |
2246 | return true; |
2247 | } |
2248 | } |
2249 | // Leaf name: bitfield_extract_from_shr_and |
2250 | // Rule: bitfield_extract_from_shr_and |
2251 | if (!RuleConfig->isRuleDisabled(88)) { |
2252 | if (1 |
2253 | && [&]() { |
2254 | return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData88); |
2255 | return true; |
2256 | }() ) { |
2257 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n" ; } } while (false); |
2258 | Helper.applyBuildFn(*MIs[0], MatchData88); |
2259 | return true; |
2260 | } |
2261 | } |
2262 | // Leaf name: fold_binop_into_select |
2263 | // Rule: fold_binop_into_select |
2264 | if (!RuleConfig->isRuleDisabled(104)) { |
2265 | if (1 |
2266 | && [&]() { |
2267 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2268 | return true; |
2269 | }() ) { |
2270 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2271 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2272 | return true; |
2273 | } |
2274 | } |
2275 | return false; |
2276 | } |
2277 | if (Partition == 22 /* TargetOpcode::G_ABS */) { |
2278 | // Leaf name: unary_undef_to_zero |
2279 | // Rule: unary_undef_to_zero |
2280 | if (!RuleConfig->isRuleDisabled(16)) { |
2281 | if (1 |
2282 | && [&]() { |
2283 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
2284 | return true; |
2285 | }() ) { |
2286 | LLVM_DEBUG(dbgs() << "Applying rule 'unary_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unary_undef_to_zero'\n" ; } } while (false); |
2287 | Helper.replaceInstWithConstant(*MIs[0], 0); |
2288 | return true; |
2289 | } |
2290 | } |
2291 | return false; |
2292 | } |
2293 | if (Partition == 23 /* TargetOpcode::G_FPTOSI */) { |
2294 | // Leaf name: propagate_undef_any_op |
2295 | // Rule: propagate_undef_any_op |
2296 | if (!RuleConfig->isRuleDisabled(17)) { |
2297 | if (1 |
2298 | && [&]() { |
2299 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
2300 | return true; |
2301 | }() ) { |
2302 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
2303 | Helper.replaceInstWithUndef(*MIs[0]); |
2304 | return true; |
2305 | } |
2306 | } |
2307 | return false; |
2308 | } |
2309 | if (Partition == 24 /* TargetOpcode::G_FPTOUI */) { |
2310 | // Leaf name: propagate_undef_any_op |
2311 | // Rule: propagate_undef_any_op |
2312 | if (!RuleConfig->isRuleDisabled(17)) { |
2313 | if (1 |
2314 | && [&]() { |
2315 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
2316 | return true; |
2317 | }() ) { |
2318 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
2319 | Helper.replaceInstWithUndef(*MIs[0]); |
2320 | return true; |
2321 | } |
2322 | } |
2323 | return false; |
2324 | } |
2325 | if (Partition == 25 /* TargetOpcode::G_SUB */) { |
2326 | // Leaf name: propagate_undef_any_op |
2327 | // Rule: propagate_undef_any_op |
2328 | if (!RuleConfig->isRuleDisabled(17)) { |
2329 | if (1 |
2330 | && [&]() { |
2331 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
2332 | return true; |
2333 | }() ) { |
2334 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
2335 | Helper.replaceInstWithUndef(*MIs[0]); |
2336 | return true; |
2337 | } |
2338 | } |
2339 | // Leaf name: right_identity_zero |
2340 | // Rule: right_identity_zero |
2341 | if (!RuleConfig->isRuleDisabled(24)) { |
2342 | if (1 |
2343 | && [&]() { |
2344 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2345 | return true; |
2346 | }() ) { |
2347 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2348 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2349 | return true; |
2350 | } |
2351 | } |
2352 | // Leaf name: constant_fold |
2353 | // Rule: constant_fold |
2354 | if (!RuleConfig->isRuleDisabled(89)) { |
2355 | if (1 |
2356 | && [&]() { |
2357 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
2358 | return true; |
2359 | }() ) { |
2360 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
2361 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
2362 | return true; |
2363 | } |
2364 | } |
2365 | // Leaf name: fold_binop_into_select |
2366 | // Rule: fold_binop_into_select |
2367 | if (!RuleConfig->isRuleDisabled(104)) { |
2368 | if (1 |
2369 | && [&]() { |
2370 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2371 | return true; |
2372 | }() ) { |
2373 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2374 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2375 | return true; |
2376 | } |
2377 | } |
2378 | // Leaf name: sub_add_reg |
2379 | // Rule: sub_add_reg |
2380 | if (!RuleConfig->isRuleDisabled(105)) { |
2381 | if (1 |
2382 | && [&]() { |
2383 | return Helper.matchSubAddSameReg(*MIs[0], MatchData105); |
2384 | return true; |
2385 | }() ) { |
2386 | LLVM_DEBUG(dbgs() << "Applying rule 'sub_add_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'sub_add_reg'\n" ; } } while (false); |
2387 | Helper.applyBuildFn(*MIs[0], MatchData105); |
2388 | return true; |
2389 | } |
2390 | } |
2391 | return false; |
2392 | } |
2393 | if (Partition == 26 /* TargetOpcode::G_XOR */) { |
2394 | // Leaf name: propagate_undef_any_op |
2395 | // Rule: propagate_undef_any_op |
2396 | if (!RuleConfig->isRuleDisabled(17)) { |
2397 | if (1 |
2398 | && [&]() { |
2399 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
2400 | return true; |
2401 | }() ) { |
2402 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
2403 | Helper.replaceInstWithUndef(*MIs[0]); |
2404 | return true; |
2405 | } |
2406 | } |
2407 | // Leaf name: right_identity_zero |
2408 | // Rule: right_identity_zero |
2409 | if (!RuleConfig->isRuleDisabled(24)) { |
2410 | if (1 |
2411 | && [&]() { |
2412 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2413 | return true; |
2414 | }() ) { |
2415 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2416 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2417 | return true; |
2418 | } |
2419 | } |
2420 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
2421 | // Rule: hoist_logic_op_with_same_opcode_hands |
2422 | if (!RuleConfig->isRuleDisabled(40)) { |
2423 | if (1 |
2424 | && [&]() { |
2425 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData40); |
2426 | return true; |
2427 | }() ) { |
2428 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
2429 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData40); |
2430 | return true; |
2431 | } |
2432 | } |
2433 | // Leaf name: not_cmp_fold |
2434 | // Rule: not_cmp_fold |
2435 | if (!RuleConfig->isRuleDisabled(59)) { |
2436 | if (1 |
2437 | && [&]() { |
2438 | return Helper.matchNotCmp(*MIs[0], MatchData59); |
2439 | return true; |
2440 | }() ) { |
2441 | LLVM_DEBUG(dbgs() << "Applying rule 'not_cmp_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'not_cmp_fold'\n" ; } } while (false); |
2442 | Helper.applyNotCmp(*MIs[0], MatchData59); |
2443 | return true; |
2444 | } |
2445 | } |
2446 | // Leaf name: xor_of_and_with_same_reg |
2447 | // Rule: xor_of_and_with_same_reg |
2448 | if (!RuleConfig->isRuleDisabled(76)) { |
2449 | if (1 |
2450 | && [&]() { |
2451 | return Helper.matchXorOfAndWithSameReg(*MIs[0], MatchData76); |
2452 | return true; |
2453 | }() ) { |
2454 | LLVM_DEBUG(dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n" ; } } while (false); |
2455 | Helper.applyXorOfAndWithSameReg(*MIs[0], MatchData76); |
2456 | return true; |
2457 | } |
2458 | } |
2459 | // Leaf name: constant_fold |
2460 | // Rule: constant_fold |
2461 | if (!RuleConfig->isRuleDisabled(89)) { |
2462 | if (1 |
2463 | && [&]() { |
2464 | return Helper.matchConstantFold(*MIs[0], MatchData89); |
2465 | return true; |
2466 | }() ) { |
2467 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
2468 | Helper.replaceInstWithConstant(*MIs[0], MatchData89); |
2469 | return true; |
2470 | } |
2471 | } |
2472 | // Leaf name: fold_binop_into_select |
2473 | // Rule: fold_binop_into_select |
2474 | if (!RuleConfig->isRuleDisabled(104)) { |
2475 | if (1 |
2476 | && [&]() { |
2477 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2478 | return true; |
2479 | }() ) { |
2480 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2481 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2482 | return true; |
2483 | } |
2484 | } |
2485 | // Leaf name: commute_constant_to_rhs |
2486 | // Rule: commute_constant_to_rhs |
2487 | if (!RuleConfig->isRuleDisabled(109)) { |
2488 | if (1 |
2489 | && [&]() { |
2490 | |
2491 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
2492 | |
2493 | return true; |
2494 | }() ) { |
2495 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
2496 | |
2497 | Observer.changingInstr(*MIs[0]); |
2498 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
2499 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
2500 | MIs[0]->getOperand(1).setReg(RHSReg); |
2501 | MIs[0]->getOperand(2).setReg(LHSReg); |
2502 | Observer.changedInstr(*MIs[0]); |
2503 | |
2504 | return true; |
2505 | } |
2506 | } |
2507 | return false; |
2508 | } |
2509 | if (Partition == 27 /* TargetOpcode::G_TRUNC */) { |
2510 | // Leaf name: propagate_undef_any_op |
2511 | // Rule: propagate_undef_any_op |
2512 | if (!RuleConfig->isRuleDisabled(17)) { |
2513 | if (1 |
2514 | && [&]() { |
2515 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
2516 | return true; |
2517 | }() ) { |
2518 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
2519 | Helper.replaceInstWithUndef(*MIs[0]); |
2520 | return true; |
2521 | } |
2522 | } |
2523 | // Leaf name: trunc_buildvector_fold |
2524 | // Rule: trunc_buildvector_fold |
2525 | if (!RuleConfig->isRuleDisabled(35)) { |
2526 | if (1 |
2527 | && [&]() { |
2528 | return Helper.matchTruncBuildVectorFold(*MIs[0], MatchData35); |
2529 | return true; |
2530 | }() ) { |
2531 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_buildvector_fold'\n" ; } } while (false); |
2532 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData35); |
2533 | return true; |
2534 | } |
2535 | } |
2536 | // Leaf name: trunc_lshr_buildvector_fold |
2537 | // Rule: trunc_lshr_buildvector_fold |
2538 | if (!RuleConfig->isRuleDisabled(36)) { |
2539 | if (1 |
2540 | && [&]() { |
2541 | return Helper.matchTruncLshrBuildVectorFold(*MIs[0], MatchData36); |
2542 | return true; |
2543 | }() ) { |
2544 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n" ; } } while (false); |
2545 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData36); |
2546 | return true; |
2547 | } |
2548 | } |
2549 | // Leaf name: trunc_ext_fold |
2550 | // Rule: trunc_ext_fold |
2551 | if (!RuleConfig->isRuleDisabled(66)) { |
2552 | if (1 |
2553 | && [&]() { |
2554 | return Helper.matchCombineTruncOfExt(*MIs[0], MatchData66); |
2555 | return true; |
2556 | }() ) { |
2557 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_ext_fold'\n" ; } } while (false); |
2558 | Helper.applyCombineTruncOfExt(*MIs[0], MatchData66); |
2559 | return true; |
2560 | } |
2561 | } |
2562 | // Leaf name: trunc_shift |
2563 | // Rule: trunc_shift |
2564 | if (!RuleConfig->isRuleDisabled(67)) { |
2565 | if (1 |
2566 | && [&]() { |
2567 | return Helper.matchCombineTruncOfShift(*MIs[0], MatchData67); |
2568 | return true; |
2569 | }() ) { |
2570 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_shift'\n" ; } } while (false); |
2571 | Helper.applyCombineTruncOfShift(*MIs[0], MatchData67); |
2572 | return true; |
2573 | } |
2574 | } |
2575 | // Leaf name: clamp_i64_to_i16 |
2576 | // Rule: clamp_i64_to_i16 |
2577 | if (!RuleConfig->isRuleDisabled(110)) { |
2578 | if (1 |
2579 | && [&]() { |
2580 | return PreLegalizerHelper.matchClampI64ToI16(*MIs[0], MRI, *MF, MatchData110); |
2581 | return true; |
2582 | }() ) { |
2583 | LLVM_DEBUG(dbgs() << "Applying rule 'clamp_i64_to_i16'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'clamp_i64_to_i16'\n" ; } } while (false); |
2584 | PreLegalizerHelper.applyClampI64ToI16(*MIs[0], MatchData110); |
2585 | return true; |
2586 | } |
2587 | } |
2588 | return false; |
2589 | } |
2590 | if (Partition == 28 /* TargetOpcode::G_SHUFFLE_VECTOR */) { |
2591 | // Leaf name: propagate_undef_all_ops |
2592 | // Rule: propagate_undef_all_ops |
2593 | if (!RuleConfig->isRuleDisabled(18)) { |
2594 | if (1 |
2595 | && [&]() { |
2596 | return Helper.matchAllExplicitUsesAreUndef(*MIs[0]); |
2597 | return true; |
2598 | }() ) { |
2599 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_all_ops'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_all_ops'\n" ; } } while (false); |
2600 | Helper.replaceInstWithUndef(*MIs[0]); |
2601 | return true; |
2602 | } |
2603 | } |
2604 | // Leaf name: propagate_undef_shuffle_mask |
2605 | // Rule: propagate_undef_shuffle_mask |
2606 | if (!RuleConfig->isRuleDisabled(19)) { |
2607 | if (1 |
2608 | && [&]() { |
2609 | return Helper.matchUndefShuffleVectorMask(*MIs[0]); |
2610 | return true; |
2611 | }() ) { |
2612 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n" ; } } while (false); |
2613 | Helper.replaceInstWithUndef(*MIs[0]); |
2614 | return true; |
2615 | } |
2616 | } |
2617 | return false; |
2618 | } |
2619 | if (Partition == 29 /* TargetOpcode::G_UNMERGE_VALUES */) { |
2620 | // Leaf name: unmerge_undef |
2621 | // Rule: unmerge_undef |
2622 | if (!RuleConfig->isRuleDisabled(21)) { |
2623 | if (1 |
2624 | && [&]() { |
2625 | return Helper.matchCombineUnmergeUndef(*MIs[0], MatchData21); |
2626 | return true; |
2627 | }() ) { |
2628 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_undef'\n" ; } } while (false); |
2629 | Helper.applyBuildFn(*MIs[0], MatchData21); |
2630 | return true; |
2631 | } |
2632 | } |
2633 | // Leaf name: unmerge_merge |
2634 | // Rule: unmerge_merge |
2635 | if (!RuleConfig->isRuleDisabled(61)) { |
2636 | if (1 |
2637 | && [&]() { |
2638 | return Helper.matchCombineUnmergeMergeToPlainValues(*MIs[0], MatchData61); |
2639 | return true; |
2640 | }() ) { |
2641 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_merge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_merge'\n" ; } } while (false); |
2642 | Helper.applyCombineUnmergeMergeToPlainValues(*MIs[0], MatchData61); |
2643 | return true; |
2644 | } |
2645 | } |
2646 | // Leaf name: unmerge_cst |
2647 | // Rule: unmerge_cst |
2648 | if (!RuleConfig->isRuleDisabled(62)) { |
2649 | if (1 |
2650 | && [&]() { |
2651 | return Helper.matchCombineUnmergeConstant(*MIs[0], MatchData62); |
2652 | return true; |
2653 | }() ) { |
2654 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_cst'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_cst'\n" ; } } while (false); |
2655 | Helper.applyCombineUnmergeConstant(*MIs[0], MatchData62); |
2656 | return true; |
2657 | } |
2658 | } |
2659 | // Leaf name: unmerge_dead_to_trunc |
2660 | // Rule: unmerge_dead_to_trunc |
2661 | if (!RuleConfig->isRuleDisabled(63)) { |
2662 | if (1 |
2663 | && [&]() { |
2664 | return Helper.matchCombineUnmergeWithDeadLanesToTrunc(*MIs[0]); |
2665 | return true; |
2666 | }() ) { |
2667 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n" ; } } while (false); |
2668 | Helper.applyCombineUnmergeWithDeadLanesToTrunc(*MIs[0]); |
2669 | return true; |
2670 | } |
2671 | } |
2672 | // Leaf name: unmerge_zext_to_zext |
2673 | // Rule: unmerge_zext_to_zext |
2674 | if (!RuleConfig->isRuleDisabled(64)) { |
2675 | if (1 |
2676 | && [&]() { |
2677 | return Helper.matchCombineUnmergeZExtToZExt(*MIs[0]); |
2678 | return true; |
2679 | }() ) { |
2680 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_zext_to_zext'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_zext_to_zext'\n" ; } } while (false); |
2681 | Helper.applyCombineUnmergeZExtToZExt(*MIs[0]); |
2682 | return true; |
2683 | } |
2684 | } |
2685 | return false; |
2686 | } |
2687 | if (Partition == 30 /* TargetOpcode::G_SELECT */) { |
2688 | // Leaf name: select_same_val |
2689 | // Rule: select_same_val |
2690 | if (!RuleConfig->isRuleDisabled(23)) { |
2691 | if (1 |
2692 | && [&]() { |
2693 | return Helper.matchSelectSameVal(*MIs[0]); |
2694 | return true; |
2695 | }() ) { |
2696 | LLVM_DEBUG(dbgs() << "Applying rule 'select_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_same_val'\n" ; } } while (false); |
2697 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
2698 | return true; |
2699 | } |
2700 | } |
2701 | // Leaf name: select_undef_cmp |
2702 | // Rule: select_undef_cmp |
2703 | if (!RuleConfig->isRuleDisabled(47)) { |
2704 | if (1 |
2705 | && [&]() { |
2706 | return Helper.matchUndefSelectCmp(*MIs[0]); |
2707 | return true; |
2708 | }() ) { |
2709 | LLVM_DEBUG(dbgs() << "Applying rule 'select_undef_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_undef_cmp'\n" ; } } while (false); |
2710 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
2711 | return true; |
2712 | } |
2713 | } |
2714 | // Leaf name: select_constant_cmp |
2715 | // Rule: select_constant_cmp |
2716 | if (!RuleConfig->isRuleDisabled(48)) { |
2717 | if (1 |
2718 | && [&]() { |
2719 | return Helper.matchConstantSelectCmp(*MIs[0], MatchData48); |
2720 | return true; |
2721 | }() ) { |
2722 | LLVM_DEBUG(dbgs() << "Applying rule 'select_constant_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_constant_cmp'\n" ; } } while (false); |
2723 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData48); |
2724 | return true; |
2725 | } |
2726 | } |
2727 | // Leaf name: select_to_logical |
2728 | // Rule: select_to_logical |
2729 | if (!RuleConfig->isRuleDisabled(49)) { |
2730 | if (1 |
2731 | && [&]() { |
2732 | return Helper.matchSelectToLogical(*MIs[0], MatchData49); |
2733 | return true; |
2734 | }() ) { |
2735 | LLVM_DEBUG(dbgs() << "Applying rule 'select_to_logical'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_to_logical'\n" ; } } while (false); |
2736 | Helper.applyBuildFn(*MIs[0], MatchData49); |
2737 | return true; |
2738 | } |
2739 | } |
2740 | // Leaf name: select_to_minmax |
2741 | // Rule: select_to_minmax |
2742 | if (!RuleConfig->isRuleDisabled(106)) { |
2743 | if (1 |
2744 | && [&]() { |
2745 | return Helper.matchSimplifySelectToMinMax(*MIs[0], MatchData106); |
2746 | return true; |
2747 | }() ) { |
2748 | LLVM_DEBUG(dbgs() << "Applying rule 'select_to_minmax'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_to_minmax'\n" ; } } while (false); |
2749 | Helper.applyBuildFn(*MIs[0], MatchData106); |
2750 | return true; |
2751 | } |
2752 | } |
2753 | return false; |
2754 | } |
2755 | if (Partition == 31 /* TargetOpcode::G_PTR_ADD */) { |
2756 | // Leaf name: right_identity_zero |
2757 | // Rule: right_identity_zero |
2758 | if (!RuleConfig->isRuleDisabled(24)) { |
2759 | if (1 |
2760 | && [&]() { |
2761 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2762 | return true; |
2763 | }() ) { |
2764 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2765 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2766 | return true; |
2767 | } |
2768 | } |
2769 | // Leaf name: reassoc_ptradd |
2770 | // Rule: reassoc_ptradd |
2771 | if (!RuleConfig->isRuleDisabled(41)) { |
2772 | if (1 |
2773 | && [&]() { |
2774 | return Helper.matchReassocPtrAdd(*MIs[0], MatchData41); |
2775 | return true; |
2776 | }() ) { |
2777 | LLVM_DEBUG(dbgs() << "Applying rule 'reassoc_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'reassoc_ptradd'\n" ; } } while (false); |
2778 | Helper.applyBuildFnNoErase(*MIs[0], MatchData41); |
2779 | return true; |
2780 | } |
2781 | } |
2782 | // Leaf name: ptr_add_immed_chain |
2783 | // Rule: ptr_add_immed_chain |
2784 | if (!RuleConfig->isRuleDisabled(42)) { |
2785 | if (1 |
2786 | && [&]() { |
2787 | return Helper.matchPtrAddImmedChain(*MIs[0], MatchData42); |
2788 | return true; |
2789 | }() ) { |
2790 | LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_immed_chain'\n" ; } } while (false); |
2791 | Helper.applyPtrAddImmedChain(*MIs[0], MatchData42); |
2792 | return true; |
2793 | } |
2794 | } |
2795 | // Leaf name: const_ptradd_to_i2p |
2796 | // Rule: const_ptradd_to_i2p |
2797 | if (!RuleConfig->isRuleDisabled(69)) { |
2798 | if (1 |
2799 | && [&]() { |
2800 | return Helper.matchCombineConstPtrAddToI2P(*MIs[0], MatchData69); |
2801 | return true; |
2802 | }() ) { |
2803 | LLVM_DEBUG(dbgs() << "Applying rule 'const_ptradd_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'const_ptradd_to_i2p'\n" ; } } while (false); |
2804 | Helper.applyCombineConstPtrAddToI2P(*MIs[0], MatchData69); |
2805 | return true; |
2806 | } |
2807 | } |
2808 | // Leaf name: ptr_add_with_zero |
2809 | // Rule: ptr_add_with_zero |
2810 | if (!RuleConfig->isRuleDisabled(77)) { |
2811 | if (1 |
2812 | && [&]() { |
2813 | return Helper.matchPtrAddZero(*MIs[0]); |
2814 | return true; |
2815 | }() ) { |
2816 | LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_with_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_with_zero'\n" ; } } while (false); |
2817 | Helper.applyPtrAddZero(*MIs[0]); |
2818 | return true; |
2819 | } |
2820 | } |
2821 | // Leaf name: fold_binop_into_select |
2822 | // Rule: fold_binop_into_select |
2823 | if (!RuleConfig->isRuleDisabled(104)) { |
2824 | if (1 |
2825 | && [&]() { |
2826 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2827 | return true; |
2828 | }() ) { |
2829 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2830 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2831 | return true; |
2832 | } |
2833 | } |
2834 | return false; |
2835 | } |
2836 | if (Partition == 32 /* TargetOpcode::G_ROTL */) { |
2837 | // Leaf name: right_identity_zero |
2838 | // Rule: right_identity_zero |
2839 | if (!RuleConfig->isRuleDisabled(24)) { |
2840 | if (1 |
2841 | && [&]() { |
2842 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2843 | return true; |
2844 | }() ) { |
2845 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2846 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2847 | return true; |
2848 | } |
2849 | } |
2850 | return false; |
2851 | } |
2852 | if (Partition == 33 /* TargetOpcode::G_ROTR */) { |
2853 | // Leaf name: right_identity_zero |
2854 | // Rule: right_identity_zero |
2855 | if (!RuleConfig->isRuleDisabled(24)) { |
2856 | if (1 |
2857 | && [&]() { |
2858 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
2859 | return true; |
2860 | }() ) { |
2861 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
2862 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2863 | return true; |
2864 | } |
2865 | } |
2866 | return false; |
2867 | } |
2868 | if (Partition == 34 /* TargetOpcode::G_SDIV */) { |
2869 | // Leaf name: binop_left_to_zero |
2870 | // Rule: binop_left_to_zero |
2871 | if (!RuleConfig->isRuleDisabled(26)) { |
2872 | if (1 |
2873 | && [&]() { |
2874 | return Helper.matchOperandIsZero(*MIs[0], 1); |
2875 | return true; |
2876 | }() ) { |
2877 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
2878 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2879 | return true; |
2880 | } |
2881 | } |
2882 | // Leaf name: div_rem_to_divrem |
2883 | // Rule: div_rem_to_divrem |
2884 | if (!RuleConfig->isRuleDisabled(82)) { |
2885 | if (1 |
2886 | && [&]() { |
2887 | return Helper.matchCombineDivRem(*MIs[0], MatchData82); |
2888 | return true; |
2889 | }() ) { |
2890 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
2891 | Helper.applyCombineDivRem(*MIs[0], MatchData82); |
2892 | return true; |
2893 | } |
2894 | } |
2895 | // Leaf name: sdiv_by_const |
2896 | // Rule: sdiv_by_const |
2897 | if (!RuleConfig->isRuleDisabled(92)) { |
2898 | if (1 |
2899 | && [&]() { |
2900 | return Helper.matchSDivByConst(*MIs[0]); |
2901 | return true; |
2902 | }() ) { |
2903 | LLVM_DEBUG(dbgs() << "Applying rule 'sdiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'sdiv_by_const'\n" ; } } while (false); |
2904 | Helper.applySDivByConst(*MIs[0]); |
2905 | return true; |
2906 | } |
2907 | } |
2908 | // Leaf name: fold_binop_into_select |
2909 | // Rule: fold_binop_into_select |
2910 | if (!RuleConfig->isRuleDisabled(104)) { |
2911 | if (1 |
2912 | && [&]() { |
2913 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2914 | return true; |
2915 | }() ) { |
2916 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2917 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2918 | return true; |
2919 | } |
2920 | } |
2921 | return false; |
2922 | } |
2923 | if (Partition == 35 /* TargetOpcode::G_SREM */) { |
2924 | // Leaf name: binop_left_to_zero |
2925 | // Rule: binop_left_to_zero |
2926 | if (!RuleConfig->isRuleDisabled(26)) { |
2927 | if (1 |
2928 | && [&]() { |
2929 | return Helper.matchOperandIsZero(*MIs[0], 1); |
2930 | return true; |
2931 | }() ) { |
2932 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
2933 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
2934 | return true; |
2935 | } |
2936 | } |
2937 | // Leaf name: div_rem_to_divrem |
2938 | // Rule: div_rem_to_divrem |
2939 | if (!RuleConfig->isRuleDisabled(82)) { |
2940 | if (1 |
2941 | && [&]() { |
2942 | return Helper.matchCombineDivRem(*MIs[0], MatchData82); |
2943 | return true; |
2944 | }() ) { |
2945 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
2946 | Helper.applyCombineDivRem(*MIs[0], MatchData82); |
2947 | return true; |
2948 | } |
2949 | } |
2950 | // Leaf name: fold_binop_into_select |
2951 | // Rule: fold_binop_into_select |
2952 | if (!RuleConfig->isRuleDisabled(104)) { |
2953 | if (1 |
2954 | && [&]() { |
2955 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2956 | return true; |
2957 | }() ) { |
2958 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
2959 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
2960 | return true; |
2961 | } |
2962 | } |
2963 | return false; |
2964 | } |
2965 | if (Partition == 36 /* TargetOpcode::G_INTTOPTR */) { |
2966 | // Leaf name: p2i_to_i2p |
2967 | // Rule: p2i_to_i2p |
2968 | if (!RuleConfig->isRuleDisabled(28)) { |
2969 | if (1 |
2970 | && [&]() { |
2971 | return Helper.matchCombineI2PToP2I(*MIs[0], MatchData28); |
2972 | return true; |
2973 | }() ) { |
2974 | LLVM_DEBUG(dbgs() << "Applying rule 'p2i_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'p2i_to_i2p'\n" ; } } while (false); |
2975 | Helper.applyCombineI2PToP2I(*MIs[0], MatchData28); |
2976 | return true; |
2977 | } |
2978 | } |
2979 | return false; |
2980 | } |
2981 | if (Partition == 37 /* TargetOpcode::G_PTRTOINT */) { |
2982 | Partition = -1; |
2983 | if (MIs.size() <= 1) MIs.resize(2); |
2984 | MIs[1] = nullptr; |
2985 | if (MIs[0]->getOperand(1).isReg()) |
2986 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
2987 | if (MIs[1] != nullptr) Partition = 0; |
2988 | if (Partition == -1) return false; |
2989 | if (Partition == 0 /* true */) { |
2990 | Partition = -1; |
2991 | switch (MIs[1]->getOpcode()) { |
2992 | case TargetOpcode::G_INTTOPTR: Partition = 0; break; |
2993 | } |
2994 | // Default case but without conflicting with potential default case in selection. |
2995 | if (Partition == -1) return false; |
2996 | if (Partition == 0 /* TargetOpcode::G_INTTOPTR */) { |
2997 | // Leaf name: i2p_to_p2i |
2998 | // Rule: i2p_to_p2i |
2999 | if (!RuleConfig->isRuleDisabled(29)) { |
3000 | if (1 |
3001 | && [&]() { |
3002 | MatchData29 = MIs[1]->getOperand(1).getReg(); |
3003 | return true; |
3004 | }() ) { |
3005 | LLVM_DEBUG(dbgs() << "Applying rule 'i2p_to_p2i'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'i2p_to_p2i'\n" ; } } while (false); |
3006 | Helper.applyCombineP2IToI2P(*MIs[0], MatchData29); |
3007 | return true; |
3008 | } |
3009 | } |
3010 | return false; |
3011 | } |
3012 | } |
3013 | } |
3014 | if (Partition == 38 /* TargetOpcode::G_ANYEXT */) { |
3015 | // Leaf name: anyext_trunc_fold |
3016 | // Rule: anyext_trunc_fold |
3017 | if (!RuleConfig->isRuleDisabled(30)) { |
3018 | if (1 |
3019 | && [&]() { |
3020 | return Helper.matchCombineAnyExtTrunc(*MIs[0], MatchData30); |
3021 | return true; |
3022 | }() ) { |
3023 | LLVM_DEBUG(dbgs() << "Applying rule 'anyext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'anyext_trunc_fold'\n" ; } } while (false); |
3024 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData30); |
3025 | return true; |
3026 | } |
3027 | } |
3028 | // Leaf name: ext_ext_fold |
3029 | // Rule: ext_ext_fold |
3030 | if (!RuleConfig->isRuleDisabled(58)) { |
3031 | if (1 |
3032 | && [&]() { |
3033 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData58); |
3034 | return true; |
3035 | }() ) { |
3036 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
3037 | Helper.applyCombineExtOfExt(*MIs[0], MatchData58); |
3038 | return true; |
3039 | } |
3040 | } |
3041 | return false; |
3042 | } |
3043 | if (Partition == 39 /* TargetOpcode::G_FNEG */) { |
3044 | Partition = -1; |
3045 | if (MIs.size() <= 1) MIs.resize(2); |
3046 | MIs[1] = nullptr; |
3047 | if (MIs[0]->getOperand(1).isReg()) |
3048 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
3049 | if (MIs[1] == nullptr) Partition = 1; |
3050 | if (MIs[1] != nullptr) Partition = 0; |
3051 | if (Partition == -1) return false; |
3052 | if (Partition == 0 /* true */) { |
3053 | Partition = -1; |
Value stored to 'Partition' is never read | |
3054 | switch (MIs[1]->getOpcode()) { |
3055 | case TargetOpcode::G_FNEG: Partition = 0; break; |
3056 | default: Partition = 1; break; |
3057 | } |
3058 | // Default case but without conflicting with potential default case in selection. |
3059 | if (Partition == -1) return false; |
3060 | if (Partition == 0 /* TargetOpcode::G_FNEG */) { |
3061 | // Leaf name: fneg_fneg_fold |
3062 | // Rule: fneg_fneg_fold |
3063 | if (!RuleConfig->isRuleDisabled(31)) { |
3064 | if (1 |
3065 | && [&]() { |
3066 | MatchData31 = MIs[1]->getOperand(1).getReg(); |
3067 | return true; |
3068 | }() ) { |
3069 | LLVM_DEBUG(dbgs() << "Applying rule 'fneg_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fneg_fneg_fold'\n" ; } } while (false); |
3070 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData31); |
3071 | return true; |
3072 | } |
3073 | } |
3074 | // Leaf name: constant_fp_op |
3075 | // Rule: constant_fp_op |
3076 | if (!RuleConfig->isRuleDisabled(68)) { |
3077 | if (1 |
3078 | && [&]() { |
3079 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3080 | return true; |
3081 | }() ) { |
3082 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3083 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3084 | return true; |
3085 | } |
3086 | } |
3087 | // Leaf name: foldable_fneg |
3088 | // Rule: foldable_fneg |
3089 | if (!RuleConfig->isRuleDisabled(111)) { |
3090 | if (1 |
3091 | && [&]() { |
3092 | return Helper.matchFoldableFneg(*MIs[0], MatchData111); |
3093 | return true; |
3094 | }() ) { |
3095 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
3096 | Helper.applyFoldableFneg(*MIs[0], MatchData111); |
3097 | return true; |
3098 | } |
3099 | } |
3100 | return false; |
3101 | } |
3102 | if (Partition == 1 /* * or nullptr */) { |
3103 | // Leaf name: constant_fp_op |
3104 | // Rule: constant_fp_op |
3105 | if (!RuleConfig->isRuleDisabled(68)) { |
3106 | if (1 |
3107 | && [&]() { |
3108 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3109 | return true; |
3110 | }() ) { |
3111 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3112 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3113 | return true; |
3114 | } |
3115 | } |
3116 | // Leaf name: foldable_fneg |
3117 | // Rule: foldable_fneg |
3118 | if (!RuleConfig->isRuleDisabled(111)) { |
3119 | if (1 |
3120 | && [&]() { |
3121 | return Helper.matchFoldableFneg(*MIs[0], MatchData111); |
3122 | return true; |
3123 | }() ) { |
3124 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
3125 | Helper.applyFoldableFneg(*MIs[0], MatchData111); |
3126 | return true; |
3127 | } |
3128 | } |
3129 | return false; |
3130 | } |
3131 | } |
3132 | if (Partition == 1 /* false */) { |
3133 | // Leaf name: constant_fp_op |
3134 | // Rule: constant_fp_op |
3135 | if (!RuleConfig->isRuleDisabled(68)) { |
3136 | if (1 |
3137 | && [&]() { |
3138 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3139 | return true; |
3140 | }() ) { |
3141 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3142 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3143 | return true; |
3144 | } |
3145 | } |
3146 | // Leaf name: foldable_fneg |
3147 | // Rule: foldable_fneg |
3148 | if (!RuleConfig->isRuleDisabled(111)) { |
3149 | if (1 |
3150 | && [&]() { |
3151 | return Helper.matchFoldableFneg(*MIs[0], MatchData111); |
3152 | return true; |
3153 | }() ) { |
3154 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
3155 | Helper.applyFoldableFneg(*MIs[0], MatchData111); |
3156 | return true; |
3157 | } |
3158 | } |
3159 | return false; |
3160 | } |
3161 | } |
3162 | if (Partition == 40 /* TargetOpcode::G_BUILD_VECTOR_TRUNC */) { |
3163 | // Leaf name: buildvector_identity_fold |
3164 | // Rule: buildvector_identity_fold |
3165 | if (!RuleConfig->isRuleDisabled(34)) { |
3166 | if (1 |
3167 | && [&]() { |
3168 | return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34); |
3169 | return true; |
3170 | }() ) { |
3171 | LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n" ; } } while (false); |
3172 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34); |
3173 | return true; |
3174 | } |
3175 | } |
3176 | return false; |
3177 | } |
3178 | if (Partition == 41 /* TargetOpcode::G_BITCAST */) { |
3179 | Partition = -1; |
3180 | if (MIs.size() <= 1) MIs.resize(2); |
3181 | MIs[1] = nullptr; |
3182 | if (MIs[0]->getOperand(1).isReg()) |
3183 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
3184 | if (MIs[1] != nullptr) Partition = 0; |
3185 | if (Partition == -1) return false; |
3186 | if (Partition == 0 /* true */) { |
3187 | Partition = -1; |
3188 | switch (MIs[1]->getOpcode()) { |
3189 | case TargetOpcode::G_BITCAST: Partition = 0; break; |
3190 | } |
3191 | // Default case but without conflicting with potential default case in selection. |
3192 | if (Partition == -1) return false; |
3193 | if (Partition == 0 /* TargetOpcode::G_BITCAST */) { |
3194 | // Leaf name: bitcast_bitcast_fold |
3195 | // Rule: bitcast_bitcast_fold |
3196 | if (!RuleConfig->isRuleDisabled(37)) { |
3197 | if (1 |
3198 | && [&]() { |
3199 | return MRI.getType(MIs[1]->getOperand(1).getReg()) == MRI.getType(MIs[0]->getOperand(0).getReg()); |
3200 | return true; |
3201 | }() ) { |
3202 | LLVM_DEBUG(dbgs() << "Applying rule 'bitcast_bitcast_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitcast_bitcast_fold'\n" ; } } while (false); |
3203 | Helper.replaceSingleDefInstWithReg(*MIs[0], MIs[1]->getOperand(1).getReg()); |
3204 | return true; |
3205 | } |
3206 | } |
3207 | return false; |
3208 | } |
3209 | } |
3210 | } |
3211 | if (Partition == 42 /* TargetOpcode::G_PHI */) { |
3212 | // Leaf name: extend_through_phis |
3213 | // Rule: extend_through_phis |
3214 | if (!RuleConfig->isRuleDisabled(38)) { |
3215 | if (1 |
3216 | && [&]() { |
3217 | return Helper.matchExtendThroughPhis(*MIs[0], MatchData38); |
3218 | return true; |
3219 | }() ) { |
3220 | LLVM_DEBUG(dbgs() << "Applying rule 'extend_through_phis'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extend_through_phis'\n" ; } } while (false); |
3221 | Helper.applyExtendThroughPhis(*MIs[0], MatchData38); |
3222 | return true; |
3223 | } |
3224 | } |
3225 | return false; |
3226 | } |
3227 | if (Partition == 43 /* TargetOpcode::G_SEXT_INREG */) { |
3228 | // Leaf name: sext_inreg_of_load |
3229 | // Rule: sext_inreg_of_load |
3230 | if (!RuleConfig->isRuleDisabled(44)) { |
3231 | if (1 |
3232 | && [&]() { |
3233 | return Helper.matchSextInRegOfLoad(*MIs[0], MatchData44); |
3234 | return true; |
3235 | }() ) { |
3236 | LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_of_load'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_of_load'\n" ; } } while (false); |
3237 | Helper.applySextInRegOfLoad(*MIs[0], MatchData44); |
3238 | return true; |
3239 | } |
3240 | } |
3241 | // Leaf name: redundant_sext_inreg |
3242 | // Rule: redundant_sext_inreg |
3243 | if (!RuleConfig->isRuleDisabled(51)) { |
3244 | if (1 |
3245 | && [&]() { |
3246 | return Helper.matchRedundantSExtInReg(*MIs[0]); |
3247 | return true; |
3248 | }() ) { |
3249 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_sext_inreg'\n" ; } } while (false); |
3250 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
3251 | return true; |
3252 | } |
3253 | } |
3254 | // Leaf name: sext_inreg_to_zext_inreg |
3255 | // Rule: sext_inreg_to_zext_inreg |
3256 | if (!RuleConfig->isRuleDisabled(57)) { |
3257 | if (1 |
3258 | && [&]() { |
3259 | |
3260 | unsigned BitWidth = MRI.getType(MIs[0]->getOperand(1).getReg()).getScalarSizeInBits(); |
3261 | return Helper.getKnownBits()->maskedValueIsZero(MIs[0]->getOperand(1).getReg(), |
3262 | APInt::getOneBitSet(BitWidth, MIs[0]->getOperand(2).getImm() - 1)); |
3263 | return true; |
3264 | }() ) { |
3265 | LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n" ; } } while (false); |
3266 | |
3267 | Helper.getBuilder().setInstrAndDebugLoc(*MIs[0]); |
3268 | Helper.getBuilder().buildZExtInReg(MIs[0]->getOperand(0), MIs[0]->getOperand(1), MIs[0]->getOperand(2).getImm()); |
3269 | MIs[0]->eraseFromParent(); |
3270 | return true; |
3271 | |
3272 | return true; |
3273 | } |
3274 | } |
3275 | // Leaf name: bitfield_extract_from_sext_inreg |
3276 | // Rule: bitfield_extract_from_sext_inreg |
3277 | if (!RuleConfig->isRuleDisabled(85)) { |
3278 | if (1 |
3279 | && [&]() { |
3280 | return Helper.matchBitfieldExtractFromSExtInReg(*MIs[0], MatchData85); |
3281 | return true; |
3282 | }() ) { |
3283 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n" ; } } while (false); |
3284 | Helper.applyBuildFn(*MIs[0], MatchData85); |
3285 | return true; |
3286 | } |
3287 | } |
3288 | return false; |
3289 | } |
3290 | if (Partition == 44 /* TargetOpcode::G_ZEXT */) { |
3291 | // Leaf name: zext_trunc_fold |
3292 | // Rule: zext_trunc_fold |
3293 | if (!RuleConfig->isRuleDisabled(54)) { |
3294 | if (1 |
3295 | && [&]() { |
3296 | return Helper.matchCombineZextTrunc(*MIs[0], MatchData54); |
3297 | return true; |
3298 | }() ) { |
3299 | LLVM_DEBUG(dbgs() << "Applying rule 'zext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'zext_trunc_fold'\n" ; } } while (false); |
3300 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData54); |
3301 | return true; |
3302 | } |
3303 | } |
3304 | // Leaf name: ext_ext_fold |
3305 | // Rule: ext_ext_fold |
3306 | if (!RuleConfig->isRuleDisabled(58)) { |
3307 | if (1 |
3308 | && [&]() { |
3309 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData58); |
3310 | return true; |
3311 | }() ) { |
3312 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
3313 | Helper.applyCombineExtOfExt(*MIs[0], MatchData58); |
3314 | return true; |
3315 | } |
3316 | } |
3317 | return false; |
3318 | } |
3319 | if (Partition == 45 /* TargetOpcode::G_ICMP */) { |
3320 | // Leaf name: icmp_to_true_false_known_bits |
3321 | // Rule: icmp_to_true_false_known_bits |
3322 | if (!RuleConfig->isRuleDisabled(55)) { |
3323 | if (1 |
3324 | && [&]() { |
3325 | return Helper.matchICmpToTrueFalseKnownBits(*MIs[0], MatchData55); |
3326 | return true; |
3327 | }() ) { |
3328 | LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n" ; } } while (false); |
3329 | Helper.replaceInstWithConstant(*MIs[0], MatchData55); |
3330 | return true; |
3331 | } |
3332 | } |
3333 | // Leaf name: icmp_to_lhs_known_bits |
3334 | // Rule: icmp_to_lhs_known_bits |
3335 | if (!RuleConfig->isRuleDisabled(56)) { |
3336 | if (1 |
3337 | && [&]() { |
3338 | return Helper.matchICmpToLHSKnownBits(*MIs[0], MatchData56); |
3339 | return true; |
3340 | }() ) { |
3341 | LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n" ; } } while (false); |
3342 | Helper.applyBuildFn(*MIs[0], MatchData56); |
3343 | return true; |
3344 | } |
3345 | } |
3346 | // Leaf name: redundant_binop_in_equality |
3347 | // Rule: redundant_binop_in_equality |
3348 | if (!RuleConfig->isRuleDisabled(107)) { |
3349 | if (1 |
3350 | && [&]() { |
3351 | return Helper.matchRedundantBinOpInEquality(*MIs[0], MatchData107); |
3352 | return true; |
3353 | }() ) { |
3354 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_binop_in_equality'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_binop_in_equality'\n" ; } } while (false); |
3355 | Helper.applyBuildFn(*MIs[0], MatchData107); |
3356 | return true; |
3357 | } |
3358 | } |
3359 | return false; |
3360 | } |
3361 | if (Partition == 46 /* TargetOpcode::G_SEXT */) { |
3362 | // Leaf name: ext_ext_fold |
3363 | // Rule: ext_ext_fold |
3364 | if (!RuleConfig->isRuleDisabled(58)) { |
3365 | if (1 |
3366 | && [&]() { |
3367 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData58); |
3368 | return true; |
3369 | }() ) { |
3370 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
3371 | Helper.applyCombineExtOfExt(*MIs[0], MatchData58); |
3372 | return true; |
3373 | } |
3374 | } |
3375 | return false; |
3376 | } |
3377 | if (Partition == 47 /* TargetOpcode::G_BR */) { |
3378 | // Leaf name: opt_brcond_by_inverting_cond |
3379 | // Rule: opt_brcond_by_inverting_cond |
3380 | if (!RuleConfig->isRuleDisabled(60)) { |
3381 | if (1 |
3382 | && [&]() { |
3383 | return Helper.matchOptBrCondByInvertingCond(*MIs[0], MatchData60); |
3384 | return true; |
3385 | }() ) { |
3386 | LLVM_DEBUG(dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n" ; } } while (false); |
3387 | Helper.applyOptBrCondByInvertingCond(*MIs[0], MatchData60); |
3388 | return true; |
3389 | } |
3390 | } |
3391 | return false; |
3392 | } |
3393 | if (Partition == 48 /* TargetOpcode::G_MERGE_VALUES */) { |
3394 | // Leaf name: merge_unmerge |
3395 | // Rule: merge_unmerge |
3396 | if (!RuleConfig->isRuleDisabled(65)) { |
3397 | if (1 |
3398 | && [&]() { |
3399 | return Helper.matchCombineMergeUnmerge(*MIs[0], MatchData65); |
3400 | return true; |
3401 | }() ) { |
3402 | LLVM_DEBUG(dbgs() << "Applying rule 'merge_unmerge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'merge_unmerge'\n" ; } } while (false); |
3403 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData65); |
3404 | return true; |
3405 | } |
3406 | } |
3407 | return false; |
3408 | } |
3409 | if (Partition == 49 /* TargetOpcode::G_FPTRUNC */) { |
3410 | // Leaf name: constant_fp_op |
3411 | // Rule: constant_fp_op |
3412 | if (!RuleConfig->isRuleDisabled(68)) { |
3413 | if (1 |
3414 | && [&]() { |
3415 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3416 | return true; |
3417 | }() ) { |
3418 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3419 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3420 | return true; |
3421 | } |
3422 | } |
3423 | return false; |
3424 | } |
3425 | if (Partition == 50 /* TargetOpcode::G_FSQRT */) { |
3426 | // Leaf name: constant_fp_op |
3427 | // Rule: constant_fp_op |
3428 | if (!RuleConfig->isRuleDisabled(68)) { |
3429 | if (1 |
3430 | && [&]() { |
3431 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3432 | return true; |
3433 | }() ) { |
3434 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3435 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3436 | return true; |
3437 | } |
3438 | } |
3439 | return false; |
3440 | } |
3441 | if (Partition == 51 /* TargetOpcode::G_FLOG2 */) { |
3442 | // Leaf name: constant_fp_op |
3443 | // Rule: constant_fp_op |
3444 | if (!RuleConfig->isRuleDisabled(68)) { |
3445 | if (1 |
3446 | && [&]() { |
3447 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3448 | return true; |
3449 | }() ) { |
3450 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
3451 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData68); |
3452 | return true; |
3453 | } |
3454 | } |
3455 | return false; |
3456 | } |
3457 | if (Partition == 52 /* TargetOpcode::G_UMULO */) { |
3458 | // Leaf name: mulo_by_2 |
3459 | // Rule: mulo_by_2 |
3460 | if (!RuleConfig->isRuleDisabled(71)) { |
3461 | if (1 |
3462 | && [&]() { |
3463 | return Helper.matchMulOBy2(*MIs[0], MatchData71); |
3464 | return true; |
3465 | }() ) { |
3466 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n" ; } } while (false); |
3467 | Helper.applyBuildFnNoErase(*MIs[0], MatchData71); |
3468 | return true; |
3469 | } |
3470 | } |
3471 | // Leaf name: mulo_by_0 |
3472 | // Rule: mulo_by_0 |
3473 | if (!RuleConfig->isRuleDisabled(72)) { |
3474 | if (1 |
3475 | && [&]() { |
3476 | return Helper.matchMulOBy0(*MIs[0], MatchData72); |
3477 | return true; |
3478 | }() ) { |
3479 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n" ; } } while (false); |
3480 | Helper.applyBuildFn(*MIs[0], MatchData72); |
3481 | return true; |
3482 | } |
3483 | } |
3484 | return false; |
3485 | } |
3486 | if (Partition == 53 /* TargetOpcode::G_SMULO */) { |
3487 | // Leaf name: mulo_by_2 |
3488 | // Rule: mulo_by_2 |
3489 | if (!RuleConfig->isRuleDisabled(71)) { |
3490 | if (1 |
3491 | && [&]() { |
3492 | return Helper.matchMulOBy2(*MIs[0], MatchData71); |
3493 | return true; |
3494 | }() ) { |
3495 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n" ; } } while (false); |
3496 | Helper.applyBuildFnNoErase(*MIs[0], MatchData71); |
3497 | return true; |
3498 | } |
3499 | } |
3500 | // Leaf name: mulo_by_0 |
3501 | // Rule: mulo_by_0 |
3502 | if (!RuleConfig->isRuleDisabled(72)) { |
3503 | if (1 |
3504 | && [&]() { |
3505 | return Helper.matchMulOBy0(*MIs[0], MatchData72); |
3506 | return true; |
3507 | }() ) { |
3508 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n" ; } } while (false); |
3509 | Helper.applyBuildFn(*MIs[0], MatchData72); |
3510 | return true; |
3511 | } |
3512 | } |
3513 | return false; |
3514 | } |
3515 | if (Partition == 54 /* TargetOpcode::G_UADDO */) { |
3516 | // Leaf name: addo_by_0 |
3517 | // Rule: addo_by_0 |
3518 | if (!RuleConfig->isRuleDisabled(73)) { |
3519 | if (1 |
3520 | && [&]() { |
3521 | return Helper.matchAddOBy0(*MIs[0], MatchData73); |
3522 | return true; |
3523 | }() ) { |
3524 | LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n" ; } } while (false); |
3525 | Helper.applyBuildFn(*MIs[0], MatchData73); |
3526 | return true; |
3527 | } |
3528 | } |
3529 | return false; |
3530 | } |
3531 | if (Partition == 55 /* TargetOpcode::G_SADDO */) { |
3532 | // Leaf name: addo_by_0 |
3533 | // Rule: addo_by_0 |
3534 | if (!RuleConfig->isRuleDisabled(73)) { |
3535 | if (1 |
3536 | && [&]() { |
3537 | return Helper.matchAddOBy0(*MIs[0], MatchData73); |
3538 | return true; |
3539 | }() ) { |
3540 | LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n" ; } } while (false); |
3541 | Helper.applyBuildFn(*MIs[0], MatchData73); |
3542 | return true; |
3543 | } |
3544 | } |
3545 | return false; |
3546 | } |
3547 | if (Partition == 56 /* TargetOpcode::G_UADDE */) { |
3548 | // Leaf name: adde_to_addo |
3549 | // Rule: adde_to_addo |
3550 | if (!RuleConfig->isRuleDisabled(74)) { |
3551 | if (1 |
3552 | && [&]() { |
3553 | return Helper.matchAddEToAddO(*MIs[0], MatchData74); |
3554 | return true; |
3555 | }() ) { |
3556 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
3557 | Helper.applyBuildFnNoErase(*MIs[0], MatchData74); |
3558 | return true; |
3559 | } |
3560 | } |
3561 | return false; |
3562 | } |
3563 | if (Partition == 57 /* TargetOpcode::G_SADDE */) { |
3564 | // Leaf name: adde_to_addo |
3565 | // Rule: adde_to_addo |
3566 | if (!RuleConfig->isRuleDisabled(74)) { |
3567 | if (1 |
3568 | && [&]() { |
3569 | return Helper.matchAddEToAddO(*MIs[0], MatchData74); |
3570 | return true; |
3571 | }() ) { |
3572 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
3573 | Helper.applyBuildFnNoErase(*MIs[0], MatchData74); |
3574 | return true; |
3575 | } |
3576 | } |
3577 | return false; |
3578 | } |
3579 | if (Partition == 58 /* TargetOpcode::G_USUBE */) { |
3580 | // Leaf name: adde_to_addo |
3581 | // Rule: adde_to_addo |
3582 | if (!RuleConfig->isRuleDisabled(74)) { |
3583 | if (1 |
3584 | && [&]() { |
3585 | return Helper.matchAddEToAddO(*MIs[0], MatchData74); |
3586 | return true; |
3587 | }() ) { |
3588 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
3589 | Helper.applyBuildFnNoErase(*MIs[0], MatchData74); |
3590 | return true; |
3591 | } |
3592 | } |
3593 | return false; |
3594 | } |
3595 | if (Partition == 59 /* TargetOpcode::G_SSUBE */) { |
3596 | // Leaf name: adde_to_addo |
3597 | // Rule: adde_to_addo |
3598 | if (!RuleConfig->isRuleDisabled(74)) { |
3599 | if (1 |
3600 | && [&]() { |
3601 | return Helper.matchAddEToAddO(*MIs[0], MatchData74); |
3602 | return true; |
3603 | }() ) { |
3604 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
3605 | Helper.applyBuildFnNoErase(*MIs[0], MatchData74); |
3606 | return true; |
3607 | } |
3608 | } |
3609 | return false; |
3610 | } |
3611 | if (Partition == 60 /* TargetOpcode::G_FMINNUM */) { |
3612 | // Leaf name: combine_minmax_nan |
3613 | // Rule: combine_minmax_nan |
3614 | if (!RuleConfig->isRuleDisabled(75)) { |
3615 | if (1 |
3616 | && [&]() { |
3617 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75); |
3618 | return true; |
3619 | }() ) { |
3620 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
3621 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75); |
3622 | return true; |
3623 | } |
3624 | } |
3625 | // Leaf name: fold_binop_into_select |
3626 | // Rule: fold_binop_into_select |
3627 | if (!RuleConfig->isRuleDisabled(104)) { |
3628 | if (1 |
3629 | && [&]() { |
3630 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3631 | return true; |
3632 | }() ) { |
3633 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3634 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3635 | return true; |
3636 | } |
3637 | } |
3638 | return false; |
3639 | } |
3640 | if (Partition == 61 /* TargetOpcode::G_FMAXNUM */) { |
3641 | // Leaf name: combine_minmax_nan |
3642 | // Rule: combine_minmax_nan |
3643 | if (!RuleConfig->isRuleDisabled(75)) { |
3644 | if (1 |
3645 | && [&]() { |
3646 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75); |
3647 | return true; |
3648 | }() ) { |
3649 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
3650 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75); |
3651 | return true; |
3652 | } |
3653 | } |
3654 | // Leaf name: fold_binop_into_select |
3655 | // Rule: fold_binop_into_select |
3656 | if (!RuleConfig->isRuleDisabled(104)) { |
3657 | if (1 |
3658 | && [&]() { |
3659 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3660 | return true; |
3661 | }() ) { |
3662 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3663 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3664 | return true; |
3665 | } |
3666 | } |
3667 | return false; |
3668 | } |
3669 | if (Partition == 62 /* TargetOpcode::G_FMINIMUM */) { |
3670 | // Leaf name: combine_minmax_nan |
3671 | // Rule: combine_minmax_nan |
3672 | if (!RuleConfig->isRuleDisabled(75)) { |
3673 | if (1 |
3674 | && [&]() { |
3675 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75); |
3676 | return true; |
3677 | }() ) { |
3678 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
3679 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75); |
3680 | return true; |
3681 | } |
3682 | } |
3683 | // Leaf name: fold_binop_into_select |
3684 | // Rule: fold_binop_into_select |
3685 | if (!RuleConfig->isRuleDisabled(104)) { |
3686 | if (1 |
3687 | && [&]() { |
3688 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3689 | return true; |
3690 | }() ) { |
3691 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3692 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3693 | return true; |
3694 | } |
3695 | } |
3696 | return false; |
3697 | } |
3698 | if (Partition == 63 /* TargetOpcode::G_FMAXIMUM */) { |
3699 | // Leaf name: combine_minmax_nan |
3700 | // Rule: combine_minmax_nan |
3701 | if (!RuleConfig->isRuleDisabled(75)) { |
3702 | if (1 |
3703 | && [&]() { |
3704 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData75); |
3705 | return true; |
3706 | }() ) { |
3707 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
3708 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData75); |
3709 | return true; |
3710 | } |
3711 | } |
3712 | // Leaf name: fold_binop_into_select |
3713 | // Rule: fold_binop_into_select |
3714 | if (!RuleConfig->isRuleDisabled(104)) { |
3715 | if (1 |
3716 | && [&]() { |
3717 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3718 | return true; |
3719 | }() ) { |
3720 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3721 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3722 | return true; |
3723 | } |
3724 | } |
3725 | return false; |
3726 | } |
3727 | if (Partition == 64 /* TargetOpcode::G_SSHLSAT */) { |
3728 | // Leaf name: shift_immed_chain |
3729 | // Rule: shift_immed_chain |
3730 | if (!RuleConfig->isRuleDisabled(78)) { |
3731 | if (1 |
3732 | && [&]() { |
3733 | return Helper.matchShiftImmedChain(*MIs[0], MatchData78); |
3734 | return true; |
3735 | }() ) { |
3736 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
3737 | Helper.applyShiftImmedChain(*MIs[0], MatchData78); |
3738 | return true; |
3739 | } |
3740 | } |
3741 | // Leaf name: shift_of_shifted_logic_chain |
3742 | // Rule: shift_of_shifted_logic_chain |
3743 | if (!RuleConfig->isRuleDisabled(79)) { |
3744 | if (1 |
3745 | && [&]() { |
3746 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79); |
3747 | return true; |
3748 | }() ) { |
3749 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
3750 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79); |
3751 | return true; |
3752 | } |
3753 | } |
3754 | return false; |
3755 | } |
3756 | if (Partition == 65 /* TargetOpcode::G_USHLSAT */) { |
3757 | // Leaf name: shift_immed_chain |
3758 | // Rule: shift_immed_chain |
3759 | if (!RuleConfig->isRuleDisabled(78)) { |
3760 | if (1 |
3761 | && [&]() { |
3762 | return Helper.matchShiftImmedChain(*MIs[0], MatchData78); |
3763 | return true; |
3764 | }() ) { |
3765 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
3766 | Helper.applyShiftImmedChain(*MIs[0], MatchData78); |
3767 | return true; |
3768 | } |
3769 | } |
3770 | // Leaf name: shift_of_shifted_logic_chain |
3771 | // Rule: shift_of_shifted_logic_chain |
3772 | if (!RuleConfig->isRuleDisabled(79)) { |
3773 | if (1 |
3774 | && [&]() { |
3775 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData79); |
3776 | return true; |
3777 | }() ) { |
3778 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
3779 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData79); |
3780 | return true; |
3781 | } |
3782 | } |
3783 | return false; |
3784 | } |
3785 | if (Partition == 66 /* TargetOpcode::G_FSHL */) { |
3786 | // Leaf name: funnel_shift_to_rotate |
3787 | // Rule: funnel_shift_to_rotate |
3788 | if (!RuleConfig->isRuleDisabled(84)) { |
3789 | if (1 |
3790 | && [&]() { |
3791 | return Helper.matchFunnelShiftToRotate(*MIs[0]); |
3792 | return true; |
3793 | }() ) { |
3794 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n" ; } } while (false); |
3795 | Helper.applyFunnelShiftToRotate(*MIs[0]); |
3796 | return true; |
3797 | } |
3798 | } |
3799 | return false; |
3800 | } |
3801 | if (Partition == 67 /* TargetOpcode::G_FSHR */) { |
3802 | // Leaf name: funnel_shift_to_rotate |
3803 | // Rule: funnel_shift_to_rotate |
3804 | if (!RuleConfig->isRuleDisabled(84)) { |
3805 | if (1 |
3806 | && [&]() { |
3807 | return Helper.matchFunnelShiftToRotate(*MIs[0]); |
3808 | return true; |
3809 | }() ) { |
3810 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n" ; } } while (false); |
3811 | Helper.applyFunnelShiftToRotate(*MIs[0]); |
3812 | return true; |
3813 | } |
3814 | } |
3815 | return false; |
3816 | } |
3817 | if (Partition == 68 /* TargetOpcode::G_UMULH */) { |
3818 | // Leaf name: mulh_to_lshr |
3819 | // Rule: mulh_to_lshr |
3820 | if (!RuleConfig->isRuleDisabled(93)) { |
3821 | if (1 |
3822 | && [&]() { |
3823 | return Helper.matchUMulHToLShr(*MIs[0]); |
3824 | return true; |
3825 | }() ) { |
3826 | LLVM_DEBUG(dbgs() << "Applying rule 'mulh_to_lshr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulh_to_lshr'\n" ; } } while (false); |
3827 | Helper.applyUMulHToLShr(*MIs[0]); |
3828 | return true; |
3829 | } |
3830 | } |
3831 | return false; |
3832 | } |
3833 | if (Partition == 69 /* TargetOpcode::G_FADD */) { |
3834 | // Leaf name: redundant_neg_operands |
3835 | // Rule: redundant_neg_operands |
3836 | if (!RuleConfig->isRuleDisabled(94)) { |
3837 | if (1 |
3838 | && [&]() { |
3839 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
3840 | return true; |
3841 | }() ) { |
3842 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
3843 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
3844 | return true; |
3845 | } |
3846 | } |
3847 | // Leaf name: combine_fadd_fmul_to_fmad_or_fma |
3848 | // Rule: combine_fadd_fmul_to_fmad_or_fma |
3849 | if (!RuleConfig->isRuleDisabled(96)) { |
3850 | if (1 |
3851 | && [&]() { |
3852 | return Helper.matchCombineFAddFMulToFMadOrFMA(*MIs[0], |
3853 | MatchData96); |
3854 | return true; |
3855 | }() ) { |
3856 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n" ; } } while (false); |
3857 | Helper.applyBuildFn(*MIs[0], MatchData96); |
3858 | return true; |
3859 | } |
3860 | } |
3861 | // Leaf name: combine_fadd_fpext_fmul_to_fmad_or_fma |
3862 | // Rule: combine_fadd_fpext_fmul_to_fmad_or_fma |
3863 | if (!RuleConfig->isRuleDisabled(97)) { |
3864 | if (1 |
3865 | && [&]() { |
3866 | return Helper.matchCombineFAddFpExtFMulToFMadOrFMA(*MIs[0], |
3867 | MatchData97); |
3868 | return true; |
3869 | }() ) { |
3870 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n" ; } } while (false); |
3871 | Helper.applyBuildFn(*MIs[0], MatchData97); |
3872 | return true; |
3873 | } |
3874 | } |
3875 | // Leaf name: combine_fadd_fma_fmul_to_fmad_or_fma |
3876 | // Rule: combine_fadd_fma_fmul_to_fmad_or_fma |
3877 | if (!RuleConfig->isRuleDisabled(98)) { |
3878 | if (1 |
3879 | && [&]() { |
3880 | return Helper.matchCombineFAddFMAFMulToFMadOrFMA(*MIs[0], |
3881 | MatchData98); |
3882 | return true; |
3883 | }() ) { |
3884 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n" ; } } while (false); |
3885 | Helper.applyBuildFn(*MIs[0], MatchData98); |
3886 | return true; |
3887 | } |
3888 | } |
3889 | // Leaf name: combine_fadd_fpext_fma_fmul_to_fmad_or_fma |
3890 | // Rule: combine_fadd_fpext_fma_fmul_to_fmad_or_fma |
3891 | if (!RuleConfig->isRuleDisabled(99)) { |
3892 | if (1 |
3893 | && [&]() { |
3894 | return Helper.matchCombineFAddFpExtFMulToFMadOrFMAAggressive( |
3895 | *MIs[0], MatchData99); |
3896 | return true; |
3897 | }() ) { |
3898 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n" ; } } while (false); |
3899 | Helper.applyBuildFn(*MIs[0], MatchData99); |
3900 | return true; |
3901 | } |
3902 | } |
3903 | // Leaf name: fold_binop_into_select |
3904 | // Rule: fold_binop_into_select |
3905 | if (!RuleConfig->isRuleDisabled(104)) { |
3906 | if (1 |
3907 | && [&]() { |
3908 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3909 | return true; |
3910 | }() ) { |
3911 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3912 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3913 | return true; |
3914 | } |
3915 | } |
3916 | return false; |
3917 | } |
3918 | if (Partition == 70 /* TargetOpcode::G_FSUB */) { |
3919 | // Leaf name: redundant_neg_operands |
3920 | // Rule: redundant_neg_operands |
3921 | if (!RuleConfig->isRuleDisabled(94)) { |
3922 | if (1 |
3923 | && [&]() { |
3924 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
3925 | return true; |
3926 | }() ) { |
3927 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
3928 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
3929 | return true; |
3930 | } |
3931 | } |
3932 | // Leaf name: combine_fsub_fmul_to_fmad_or_fma |
3933 | // Rule: combine_fsub_fmul_to_fmad_or_fma |
3934 | if (!RuleConfig->isRuleDisabled(100)) { |
3935 | if (1 |
3936 | && [&]() { |
3937 | return Helper.matchCombineFSubFMulToFMadOrFMA(*MIs[0], |
3938 | MatchData100); |
3939 | return true; |
3940 | }() ) { |
3941 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n" ; } } while (false); |
3942 | Helper.applyBuildFn(*MIs[0], MatchData100); |
3943 | return true; |
3944 | } |
3945 | } |
3946 | // Leaf name: combine_fsub_fneg_fmul_to_fmad_or_fma |
3947 | // Rule: combine_fsub_fneg_fmul_to_fmad_or_fma |
3948 | if (!RuleConfig->isRuleDisabled(101)) { |
3949 | if (1 |
3950 | && [&]() { |
3951 | return Helper.matchCombineFSubFNegFMulToFMadOrFMA(*MIs[0], |
3952 | MatchData101); |
3953 | return true; |
3954 | }() ) { |
3955 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n" ; } } while (false); |
3956 | Helper.applyBuildFn(*MIs[0], MatchData101); |
3957 | return true; |
3958 | } |
3959 | } |
3960 | // Leaf name: combine_fsub_fpext_fmul_to_fmad_or_fma |
3961 | // Rule: combine_fsub_fpext_fmul_to_fmad_or_fma |
3962 | if (!RuleConfig->isRuleDisabled(102)) { |
3963 | if (1 |
3964 | && [&]() { |
3965 | return Helper.matchCombineFSubFpExtFMulToFMadOrFMA(*MIs[0], |
3966 | MatchData102); |
3967 | return true; |
3968 | }() ) { |
3969 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n" ; } } while (false); |
3970 | Helper.applyBuildFn(*MIs[0], MatchData102); |
3971 | return true; |
3972 | } |
3973 | } |
3974 | // Leaf name: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma |
3975 | // Rule: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma |
3976 | if (!RuleConfig->isRuleDisabled(103)) { |
3977 | if (1 |
3978 | && [&]() { |
3979 | return Helper.matchCombineFSubFpExtFNegFMulToFMadOrFMA( |
3980 | *MIs[0], MatchData103); |
3981 | return true; |
3982 | }() ) { |
3983 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n" ; } } while (false); |
3984 | Helper.applyBuildFn(*MIs[0], MatchData103); |
3985 | return true; |
3986 | } |
3987 | } |
3988 | // Leaf name: fold_binop_into_select |
3989 | // Rule: fold_binop_into_select |
3990 | if (!RuleConfig->isRuleDisabled(104)) { |
3991 | if (1 |
3992 | && [&]() { |
3993 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3994 | return true; |
3995 | }() ) { |
3996 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
3997 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
3998 | return true; |
3999 | } |
4000 | } |
4001 | // Leaf name: fsub_to_fneg |
4002 | // Rule: fsub_to_fneg |
4003 | if (!RuleConfig->isRuleDisabled(108)) { |
4004 | if (1 |
4005 | && [&]() { |
4006 | return Helper.matchFsubToFneg(*MIs[0], MatchData108); |
4007 | return true; |
4008 | }() ) { |
4009 | LLVM_DEBUG(dbgs() << "Applying rule 'fsub_to_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fsub_to_fneg'\n" ; } } while (false); |
4010 | Helper.applyFsubToFneg(*MIs[0], MatchData108); |
4011 | return true; |
4012 | } |
4013 | } |
4014 | return false; |
4015 | } |
4016 | if (Partition == 71 /* TargetOpcode::G_FMUL */) { |
4017 | // Leaf name: redundant_neg_operands |
4018 | // Rule: redundant_neg_operands |
4019 | if (!RuleConfig->isRuleDisabled(94)) { |
4020 | if (1 |
4021 | && [&]() { |
4022 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
4023 | return true; |
4024 | }() ) { |
4025 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
4026 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
4027 | return true; |
4028 | } |
4029 | } |
4030 | // Leaf name: fold_binop_into_select |
4031 | // Rule: fold_binop_into_select |
4032 | if (!RuleConfig->isRuleDisabled(104)) { |
4033 | if (1 |
4034 | && [&]() { |
4035 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4036 | return true; |
4037 | }() ) { |
4038 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4039 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4040 | return true; |
4041 | } |
4042 | } |
4043 | return false; |
4044 | } |
4045 | if (Partition == 72 /* TargetOpcode::G_FDIV */) { |
4046 | // Leaf name: redundant_neg_operands |
4047 | // Rule: redundant_neg_operands |
4048 | if (!RuleConfig->isRuleDisabled(94)) { |
4049 | if (1 |
4050 | && [&]() { |
4051 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
4052 | return true; |
4053 | }() ) { |
4054 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
4055 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
4056 | return true; |
4057 | } |
4058 | } |
4059 | // Leaf name: fold_binop_into_select |
4060 | // Rule: fold_binop_into_select |
4061 | if (!RuleConfig->isRuleDisabled(104)) { |
4062 | if (1 |
4063 | && [&]() { |
4064 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4065 | return true; |
4066 | }() ) { |
4067 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4068 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4069 | return true; |
4070 | } |
4071 | } |
4072 | return false; |
4073 | } |
4074 | if (Partition == 73 /* TargetOpcode::G_FMAD */) { |
4075 | // Leaf name: redundant_neg_operands |
4076 | // Rule: redundant_neg_operands |
4077 | if (!RuleConfig->isRuleDisabled(94)) { |
4078 | if (1 |
4079 | && [&]() { |
4080 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
4081 | return true; |
4082 | }() ) { |
4083 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
4084 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
4085 | return true; |
4086 | } |
4087 | } |
4088 | return false; |
4089 | } |
4090 | if (Partition == 74 /* TargetOpcode::G_FMA */) { |
4091 | // Leaf name: redundant_neg_operands |
4092 | // Rule: redundant_neg_operands |
4093 | if (!RuleConfig->isRuleDisabled(94)) { |
4094 | if (1 |
4095 | && [&]() { |
4096 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData94); |
4097 | return true; |
4098 | }() ) { |
4099 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
4100 | Helper.applyBuildFnNoErase(*MIs[0], MatchData94); |
4101 | return true; |
4102 | } |
4103 | } |
4104 | return false; |
4105 | } |
4106 | if (Partition == 75 /* TargetOpcode::G_SMIN */) { |
4107 | // Leaf name: fold_binop_into_select |
4108 | // Rule: fold_binop_into_select |
4109 | if (!RuleConfig->isRuleDisabled(104)) { |
4110 | if (1 |
4111 | && [&]() { |
4112 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4113 | return true; |
4114 | }() ) { |
4115 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4116 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4117 | return true; |
4118 | } |
4119 | } |
4120 | return false; |
4121 | } |
4122 | if (Partition == 76 /* TargetOpcode::G_SMAX */) { |
4123 | // Leaf name: fold_binop_into_select |
4124 | // Rule: fold_binop_into_select |
4125 | if (!RuleConfig->isRuleDisabled(104)) { |
4126 | if (1 |
4127 | && [&]() { |
4128 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4129 | return true; |
4130 | }() ) { |
4131 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4132 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4133 | return true; |
4134 | } |
4135 | } |
4136 | return false; |
4137 | } |
4138 | if (Partition == 77 /* TargetOpcode::G_UMIN */) { |
4139 | // Leaf name: fold_binop_into_select |
4140 | // Rule: fold_binop_into_select |
4141 | if (!RuleConfig->isRuleDisabled(104)) { |
4142 | if (1 |
4143 | && [&]() { |
4144 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4145 | return true; |
4146 | }() ) { |
4147 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4148 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4149 | return true; |
4150 | } |
4151 | } |
4152 | return false; |
4153 | } |
4154 | if (Partition == 78 /* TargetOpcode::G_UMAX */) { |
4155 | // Leaf name: fold_binop_into_select |
4156 | // Rule: fold_binop_into_select |
4157 | if (!RuleConfig->isRuleDisabled(104)) { |
4158 | if (1 |
4159 | && [&]() { |
4160 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4161 | return true; |
4162 | }() ) { |
4163 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4164 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4165 | return true; |
4166 | } |
4167 | } |
4168 | return false; |
4169 | } |
4170 | if (Partition == 79 /* TargetOpcode::G_FREM */) { |
4171 | // Leaf name: fold_binop_into_select |
4172 | // Rule: fold_binop_into_select |
4173 | if (!RuleConfig->isRuleDisabled(104)) { |
4174 | if (1 |
4175 | && [&]() { |
4176 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4177 | return true; |
4178 | }() ) { |
4179 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
4180 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData104); |
4181 | return true; |
4182 | } |
4183 | } |
4184 | return false; |
4185 | } |
4186 | |
4187 | return false; |
4188 | } |
4189 | #endif // ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP |