| File: | build/source/build-llvm/tools/clang/stage2-bins/lib/Target/AMDGPU/AMDGPUGenPreLegalizeGICombiner.inc |
| Warning: | line 3107, column 7 Value stored to 'Partition' is never read |
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| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Global Combiner *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS |
| 10 | #include "llvm/ADT/SparseBitVector.h" |
| 11 | namespace llvm { |
| 12 | extern cl::OptionCategory GICombinerOptionCategory; |
| 13 | } // end namespace llvm |
| 14 | #endif // ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS |
| 15 | |
| 16 | #ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H |
| 17 | class AMDGPUGenPreLegalizerCombinerHelperRuleConfig { |
| 18 | SparseBitVector<> DisabledRules; |
| 19 | |
| 20 | public: |
| 21 | bool parseCommandLineOption(); |
| 22 | bool isRuleDisabled(unsigned ID) const; |
| 23 | bool setRuleEnabled(StringRef RuleIdentifier); |
| 24 | bool setRuleDisabled(StringRef RuleIdentifier); |
| 25 | }; |
| 26 | |
| 27 | class AMDGPUGenPreLegalizerCombinerHelper : public AMDGPUPreLegalizerCombinerHelperState { |
| 28 | const AMDGPUGenPreLegalizerCombinerHelperRuleConfig *RuleConfig; |
| 29 | |
| 30 | public: |
| 31 | template <typename... Args>AMDGPUGenPreLegalizerCombinerHelper(const AMDGPUGenPreLegalizerCombinerHelperRuleConfig &RuleConfig, Args &&... args) : AMDGPUPreLegalizerCombinerHelperState(std::forward<Args>(args)...), RuleConfig(&RuleConfig) {} |
| 32 | |
| 33 | bool tryCombineAll( |
| 34 | GISelChangeObserver &Observer, |
| 35 | MachineInstr &MI, |
| 36 | MachineIRBuilder &B) const; |
| 37 | }; |
| 38 | |
| 39 | static std::optional<uint64_t> getRuleIdxForIdentifier(StringRef RuleIdentifier) { |
| 40 | uint64_t I; |
| 41 | // getAtInteger(...) returns false on success |
| 42 | bool Parsed = !RuleIdentifier.getAsInteger(0, I); |
| 43 | if (Parsed) |
| 44 | return I; |
| 45 | |
| 46 | #ifndef NDEBUG |
| 47 | switch (RuleIdentifier.size()) { |
| 48 | default: break; |
| 49 | case 9: // 4 strings to match. |
| 50 | switch (RuleIdentifier[0]) { |
| 51 | default: break; |
| 52 | case 'a': // 1 string to match. |
| 53 | if (memcmp(RuleIdentifier.data()+1, "ddo_by_0", 8) != 0) |
| 54 | break; |
| 55 | return 75; // "addo_by_0" |
| 56 | case 'c': // 1 string to match. |
| 57 | if (memcmp(RuleIdentifier.data()+1, "opy_prop", 8) != 0) |
| 58 | break; |
| 59 | return 0; // "copy_prop" |
| 60 | case 'm': // 2 strings to match. |
| 61 | if (memcmp(RuleIdentifier.data()+1, "ulo_by_", 7) != 0) |
| 62 | break; |
| 63 | switch (RuleIdentifier[8]) { |
| 64 | default: break; |
| 65 | case '0': // 1 string to match. |
| 66 | return 74; // "mulo_by_0" |
| 67 | case '2': // 1 string to match. |
| 68 | return 73; // "mulo_by_2" |
| 69 | } |
| 70 | break; |
| 71 | } |
| 72 | break; |
| 73 | case 10: // 3 strings to match. |
| 74 | switch (RuleIdentifier[0]) { |
| 75 | default: break; |
| 76 | case 'i': // 1 string to match. |
| 77 | if (memcmp(RuleIdentifier.data()+1, "2p_to_p2i", 9) != 0) |
| 78 | break; |
| 79 | return 29; // "i2p_to_p2i" |
| 80 | case 'm': // 1 string to match. |
| 81 | if (memcmp(RuleIdentifier.data()+1, "ul_to_shl", 9) != 0) |
| 82 | break; |
| 83 | return 1; // "mul_to_shl" |
| 84 | case 'p': // 1 string to match. |
| 85 | if (memcmp(RuleIdentifier.data()+1, "2i_to_i2p", 9) != 0) |
| 86 | break; |
| 87 | return 28; // "p2i_to_i2p" |
| 88 | } |
| 89 | break; |
| 90 | case 11: // 4 strings to match. |
| 91 | switch (RuleIdentifier[0]) { |
| 92 | default: break; |
| 93 | case 'a': // 1 string to match. |
| 94 | if (memcmp(RuleIdentifier.data()+1, "dd_sub_reg", 10) != 0) |
| 95 | break; |
| 96 | return 33; // "add_sub_reg" |
| 97 | case 's': // 1 string to match. |
| 98 | if (memcmp(RuleIdentifier.data()+1, "ub_add_reg", 10) != 0) |
| 99 | break; |
| 100 | return 107; // "sub_add_reg" |
| 101 | case 't': // 1 string to match. |
| 102 | if (memcmp(RuleIdentifier.data()+1, "runc_shift", 10) != 0) |
| 103 | break; |
| 104 | return 69; // "trunc_shift" |
| 105 | case 'u': // 1 string to match. |
| 106 | if (memcmp(RuleIdentifier.data()+1, "nmerge_cst", 10) != 0) |
| 107 | break; |
| 108 | return 64; // "unmerge_cst" |
| 109 | } |
| 110 | break; |
| 111 | case 12: // 6 strings to match. |
| 112 | switch (RuleIdentifier[0]) { |
| 113 | default: break; |
| 114 | case 'a': // 1 string to match. |
| 115 | if (memcmp(RuleIdentifier.data()+1, "dde_to_addo", 11) != 0) |
| 116 | break; |
| 117 | return 76; // "adde_to_addo" |
| 118 | case 'e': // 1 string to match. |
| 119 | if (memcmp(RuleIdentifier.data()+1, "xt_ext_fold", 11) != 0) |
| 120 | break; |
| 121 | return 60; // "ext_ext_fold" |
| 122 | case 'f': // 1 string to match. |
| 123 | if (memcmp(RuleIdentifier.data()+1, "sub_to_fneg", 11) != 0) |
| 124 | break; |
| 125 | return 110; // "fsub_to_fneg" |
| 126 | case 'm': // 1 string to match. |
| 127 | if (memcmp(RuleIdentifier.data()+1, "ulh_to_lshr", 11) != 0) |
| 128 | break; |
| 129 | return 95; // "mulh_to_lshr" |
| 130 | case 'n': // 1 string to match. |
| 131 | if (memcmp(RuleIdentifier.data()+1, "ot_cmp_fold", 11) != 0) |
| 132 | break; |
| 133 | return 61; // "not_cmp_fold" |
| 134 | case 'r': // 1 string to match. |
| 135 | if (memcmp(RuleIdentifier.data()+1, "edundant_or", 11) != 0) |
| 136 | break; |
| 137 | return 54; // "redundant_or" |
| 138 | } |
| 139 | break; |
| 140 | case 13: // 10 strings to match. |
| 141 | switch (RuleIdentifier[0]) { |
| 142 | default: break; |
| 143 | case 'c': // 2 strings to match. |
| 144 | if (RuleIdentifier[1] != 'o') |
| 145 | break; |
| 146 | switch (RuleIdentifier[2]) { |
| 147 | default: break; |
| 148 | case 'm': // 1 string to match. |
| 149 | if (memcmp(RuleIdentifier.data()+3, "mute_shift", 10) != 0) |
| 150 | break; |
| 151 | return 86; // "commute_shift" |
| 152 | case 'n': // 1 string to match. |
| 153 | if (memcmp(RuleIdentifier.data()+3, "stant_fold", 10) != 0) |
| 154 | break; |
| 155 | return 91; // "constant_fold" |
| 156 | } |
| 157 | break; |
| 158 | case 'f': // 1 string to match. |
| 159 | if (memcmp(RuleIdentifier.data()+1, "oldable_fneg", 12) != 0) |
| 160 | break; |
| 161 | return 113; // "foldable_fneg" |
| 162 | case 'l': // 1 string to match. |
| 163 | if (memcmp(RuleIdentifier.data()+1, "oad_and_mask", 12) != 0) |
| 164 | break; |
| 165 | return 9; // "load_and_mask" |
| 166 | case 'm': // 1 string to match. |
| 167 | if (memcmp(RuleIdentifier.data()+1, "erge_unmerge", 12) != 0) |
| 168 | break; |
| 169 | return 67; // "merge_unmerge" |
| 170 | case 'r': // 1 string to match. |
| 171 | if (memcmp(RuleIdentifier.data()+1, "edundant_and", 12) != 0) |
| 172 | break; |
| 173 | return 52; // "redundant_and" |
| 174 | case 's': // 1 string to match. |
| 175 | if (memcmp(RuleIdentifier.data()+1, "div_by_const", 12) != 0) |
| 176 | break; |
| 177 | return 94; // "sdiv_by_const" |
| 178 | case 'u': // 3 strings to match. |
| 179 | switch (RuleIdentifier[1]) { |
| 180 | default: break; |
| 181 | case 'd': // 1 string to match. |
| 182 | if (memcmp(RuleIdentifier.data()+2, "iv_by_const", 11) != 0) |
| 183 | break; |
| 184 | return 93; // "udiv_by_const" |
| 185 | case 'n': // 2 strings to match. |
| 186 | if (memcmp(RuleIdentifier.data()+2, "merge_", 6) != 0) |
| 187 | break; |
| 188 | switch (RuleIdentifier[8]) { |
| 189 | default: break; |
| 190 | case 'm': // 1 string to match. |
| 191 | if (memcmp(RuleIdentifier.data()+9, "erge", 4) != 0) |
| 192 | break; |
| 193 | return 63; // "unmerge_merge" |
| 194 | case 'u': // 1 string to match. |
| 195 | if (memcmp(RuleIdentifier.data()+9, "ndef", 4) != 0) |
| 196 | break; |
| 197 | return 21; // "unmerge_undef" |
| 198 | } |
| 199 | break; |
| 200 | } |
| 201 | break; |
| 202 | } |
| 203 | break; |
| 204 | case 14: // 8 strings to match. |
| 205 | switch (RuleIdentifier[0]) { |
| 206 | default: break; |
| 207 | case 'b': // 1 string to match. |
| 208 | if (memcmp(RuleIdentifier.data()+1, "inop_same_val", 13) != 0) |
| 209 | break; |
| 210 | return 25; // "binop_same_val" |
| 211 | case 'c': // 1 string to match. |
| 212 | if (memcmp(RuleIdentifier.data()+1, "onstant_fp_op", 13) != 0) |
| 213 | break; |
| 214 | return 70; // "constant_fp_op" |
| 215 | case 'f': // 2 strings to match. |
| 216 | switch (RuleIdentifier[1]) { |
| 217 | default: break; |
| 218 | case 'a': // 1 string to match. |
| 219 | if (memcmp(RuleIdentifier.data()+2, "bs_fneg_fold", 12) != 0) |
| 220 | break; |
| 221 | return 92; // "fabs_fneg_fold" |
| 222 | case 'n': // 1 string to match. |
| 223 | if (memcmp(RuleIdentifier.data()+2, "eg_fneg_fold", 12) != 0) |
| 224 | break; |
| 225 | return 31; // "fneg_fneg_fold" |
| 226 | } |
| 227 | break; |
| 228 | case 'm': // 1 string to match. |
| 229 | if (memcmp(RuleIdentifier.data()+1, "ul_by_neg_one", 13) != 0) |
| 230 | break; |
| 231 | return 3; // "mul_by_neg_one" |
| 232 | case 'r': // 1 string to match. |
| 233 | if (memcmp(RuleIdentifier.data()+1, "eassoc_ptradd", 13) != 0) |
| 234 | break; |
| 235 | return 43; // "reassoc_ptradd" |
| 236 | case 's': // 1 string to match. |
| 237 | if (memcmp(RuleIdentifier.data()+1, "hifts_too_big", 13) != 0) |
| 238 | break; |
| 239 | return 42; // "shifts_too_big" |
| 240 | case 't': // 1 string to match. |
| 241 | if (memcmp(RuleIdentifier.data()+1, "runc_ext_fold", 13) != 0) |
| 242 | break; |
| 243 | return 68; // "trunc_ext_fold" |
| 244 | } |
| 245 | break; |
| 246 | case 15: // 6 strings to match. |
| 247 | switch (RuleIdentifier[0]) { |
| 248 | default: break; |
| 249 | case 'e': // 1 string to match. |
| 250 | if (memcmp(RuleIdentifier.data()+1, "xtending_loads", 14) != 0) |
| 251 | break; |
| 252 | return 8; // "extending_loads" |
| 253 | case 'i': // 1 string to match. |
| 254 | if (memcmp(RuleIdentifier.data()+1, "dempotent_prop", 14) != 0) |
| 255 | break; |
| 256 | return 4; // "idempotent_prop" |
| 257 | case 'l': // 1 string to match. |
| 258 | if (memcmp(RuleIdentifier.data()+1, "oad_or_combine", 14) != 0) |
| 259 | break; |
| 260 | return 82; // "load_or_combine" |
| 261 | case 'o': // 1 string to match. |
| 262 | if (memcmp(RuleIdentifier.data()+1, "verlapping_and", 14) != 0) |
| 263 | break; |
| 264 | return 72; // "overlapping_and" |
| 265 | case 's': // 1 string to match. |
| 266 | if (memcmp(RuleIdentifier.data()+1, "elect_same_val", 14) != 0) |
| 267 | break; |
| 268 | return 23; // "select_same_val" |
| 269 | case 'z': // 1 string to match. |
| 270 | if (memcmp(RuleIdentifier.data()+1, "ext_trunc_fold", 14) != 0) |
| 271 | break; |
| 272 | return 56; // "zext_trunc_fold" |
| 273 | } |
| 274 | break; |
| 275 | case 16: // 4 strings to match. |
| 276 | switch (RuleIdentifier[0]) { |
| 277 | default: break; |
| 278 | case 'c': // 1 string to match. |
| 279 | if (memcmp(RuleIdentifier.data()+1, "lamp_i64_to_i16", 15) != 0) |
| 280 | break; |
| 281 | return 112; // "clamp_i64_to_i16" |
| 282 | case 's': // 2 strings to match. |
| 283 | if (memcmp(RuleIdentifier.data()+1, "elect_", 6) != 0) |
| 284 | break; |
| 285 | switch (RuleIdentifier[7]) { |
| 286 | default: break; |
| 287 | case 't': // 1 string to match. |
| 288 | if (memcmp(RuleIdentifier.data()+8, "o_minmax", 8) != 0) |
| 289 | break; |
| 290 | return 108; // "select_to_minmax" |
| 291 | case 'u': // 1 string to match. |
| 292 | if (memcmp(RuleIdentifier.data()+8, "ndef_cmp", 8) != 0) |
| 293 | break; |
| 294 | return 49; // "select_undef_cmp" |
| 295 | } |
| 296 | break; |
| 297 | case 'u': // 1 string to match. |
| 298 | if (memcmp(RuleIdentifier.data()+1, "ndef_to_fp_zero", 15) != 0) |
| 299 | break; |
| 300 | return 11; // "undef_to_fp_zero" |
| 301 | } |
| 302 | break; |
| 303 | case 17: // 9 strings to match. |
| 304 | switch (RuleIdentifier[0]) { |
| 305 | default: break; |
| 306 | case 'a': // 2 strings to match. |
| 307 | switch (RuleIdentifier[1]) { |
| 308 | default: break; |
| 309 | case 'd': // 1 string to match. |
| 310 | if (memcmp(RuleIdentifier.data()+2, "d_p2i_to_ptradd", 15) != 0) |
| 311 | break; |
| 312 | return 2; // "add_p2i_to_ptradd" |
| 313 | case 'n': // 1 string to match. |
| 314 | if (memcmp(RuleIdentifier.data()+2, "yext_trunc_fold", 15) != 0) |
| 315 | break; |
| 316 | return 30; // "anyext_trunc_fold" |
| 317 | } |
| 318 | break; |
| 319 | case 'd': // 1 string to match. |
| 320 | if (memcmp(RuleIdentifier.data()+1, "iv_rem_to_divrem", 16) != 0) |
| 321 | break; |
| 322 | return 83; // "div_rem_to_divrem" |
| 323 | case 'e': // 1 string to match. |
| 324 | if (memcmp(RuleIdentifier.data()+1, "rase_undef_store", 16) != 0) |
| 325 | break; |
| 326 | return 20; // "erase_undef_store" |
| 327 | case 'p': // 1 string to match. |
| 328 | if (memcmp(RuleIdentifier.data()+1, "tr_add_with_zero", 16) != 0) |
| 329 | break; |
| 330 | return 79; // "ptr_add_with_zero" |
| 331 | case 's': // 2 strings to match. |
| 332 | switch (RuleIdentifier[1]) { |
| 333 | default: break; |
| 334 | case 'e': // 1 string to match. |
| 335 | if (memcmp(RuleIdentifier.data()+2, "lect_to_logical", 15) != 0) |
| 336 | break; |
| 337 | return 51; // "select_to_logical" |
| 338 | case 'h': // 1 string to match. |
| 339 | if (memcmp(RuleIdentifier.data()+2, "ift_immed_chain", 15) != 0) |
| 340 | break; |
| 341 | return 80; // "shift_immed_chain" |
| 342 | } |
| 343 | break; |
| 344 | case 'u': // 2 strings to match. |
| 345 | switch (RuleIdentifier[1]) { |
| 346 | default: break; |
| 347 | case 'n': // 1 string to match. |
| 348 | if (memcmp(RuleIdentifier.data()+2, "def_to_int_zero", 15) != 0) |
| 349 | break; |
| 350 | return 12; // "undef_to_int_zero" |
| 351 | case 'r': // 1 string to match. |
| 352 | if (memcmp(RuleIdentifier.data()+2, "em_pow2_to_mask", 15) != 0) |
| 353 | break; |
| 354 | return 55; // "urem_pow2_to_mask" |
| 355 | } |
| 356 | break; |
| 357 | } |
| 358 | break; |
| 359 | case 18: // 5 strings to match. |
| 360 | switch (RuleIdentifier[0]) { |
| 361 | default: break; |
| 362 | case 'b': // 1 string to match. |
| 363 | if (memcmp(RuleIdentifier.data()+1, "inop_left_to_zero", 17) != 0) |
| 364 | break; |
| 365 | return 26; // "binop_left_to_zero" |
| 366 | case 'c': // 1 string to match. |
| 367 | if (memcmp(RuleIdentifier.data()+1, "ombine_minmax_nan", 17) != 0) |
| 368 | break; |
| 369 | return 77; // "combine_minmax_nan" |
| 370 | case 'f': // 1 string to match. |
| 371 | if (memcmp(RuleIdentifier.data()+1, "ptrunc_fpext_fold", 17) != 0) |
| 372 | break; |
| 373 | return 38; // "fptrunc_fpext_fold" |
| 374 | case 'r': // 1 string to match. |
| 375 | if (memcmp(RuleIdentifier.data()+1, "ight_identity_one", 17) != 0) |
| 376 | break; |
| 377 | return 32; // "right_identity_one" |
| 378 | case 's': // 1 string to match. |
| 379 | if (memcmp(RuleIdentifier.data()+1, "ext_inreg_of_load", 17) != 0) |
| 380 | break; |
| 381 | return 46; // "sext_inreg_of_load" |
| 382 | } |
| 383 | break; |
| 384 | case 19: // 8 strings to match. |
| 385 | switch (RuleIdentifier[0]) { |
| 386 | default: break; |
| 387 | case 'b': // 1 string to match. |
| 388 | if (memcmp(RuleIdentifier.data()+1, "inop_right_to_zero", 18) != 0) |
| 389 | break; |
| 390 | return 27; // "binop_right_to_zero" |
| 391 | case 'c': // 1 string to match. |
| 392 | if (memcmp(RuleIdentifier.data()+1, "onst_ptradd_to_i2p", 18) != 0) |
| 393 | break; |
| 394 | return 71; // "const_ptradd_to_i2p" |
| 395 | case 'e': // 1 string to match. |
| 396 | if (memcmp(RuleIdentifier.data()+1, "xtend_through_phis", 18) != 0) |
| 397 | break; |
| 398 | return 39; // "extend_through_phis" |
| 399 | case 'p': // 1 string to match. |
| 400 | if (memcmp(RuleIdentifier.data()+1, "tr_add_immed_chain", 18) != 0) |
| 401 | break; |
| 402 | return 44; // "ptr_add_immed_chain" |
| 403 | case 'r': // 1 string to match. |
| 404 | if (memcmp(RuleIdentifier.data()+1, "ight_identity_zero", 18) != 0) |
| 405 | break; |
| 406 | return 24; // "right_identity_zero" |
| 407 | case 's': // 2 strings to match. |
| 408 | switch (RuleIdentifier[1]) { |
| 409 | default: break; |
| 410 | case 'e': // 1 string to match. |
| 411 | if (memcmp(RuleIdentifier.data()+2, "lect_constant_cmp", 17) != 0) |
| 412 | break; |
| 413 | return 50; // "select_constant_cmp" |
| 414 | case 'i': // 1 string to match. |
| 415 | if (memcmp(RuleIdentifier.data()+2, "mplify_add_to_sub", 17) != 0) |
| 416 | break; |
| 417 | return 40; // "simplify_add_to_sub" |
| 418 | } |
| 419 | break; |
| 420 | case 'u': // 1 string to match. |
| 421 | if (memcmp(RuleIdentifier.data()+1, "nary_undef_to_zero", 18) != 0) |
| 422 | break; |
| 423 | return 16; // "unary_undef_to_zero" |
| 424 | } |
| 425 | break; |
| 426 | case 20: // 5 strings to match. |
| 427 | switch (RuleIdentifier[0]) { |
| 428 | default: break; |
| 429 | case 'a': // 1 string to match. |
| 430 | if (memcmp(RuleIdentifier.data()+1, "nd_or_disjoint_mask", 19) != 0) |
| 431 | break; |
| 432 | return 97; // "and_or_disjoint_mask" |
| 433 | case 'b': // 1 string to match. |
| 434 | if (memcmp(RuleIdentifier.data()+1, "itcast_bitcast_fold", 19) != 0) |
| 435 | break; |
| 436 | return 37; // "bitcast_bitcast_fold" |
| 437 | case 'r': // 2 strings to match. |
| 438 | if (memcmp(RuleIdentifier.data()+1, "edu", 3) != 0) |
| 439 | break; |
| 440 | switch (RuleIdentifier[4]) { |
| 441 | default: break; |
| 442 | case 'c': // 1 string to match. |
| 443 | if (memcmp(RuleIdentifier.data()+5, "e_shl_of_extend", 15) != 0) |
| 444 | break; |
| 445 | return 47; // "reduce_shl_of_extend" |
| 446 | case 'n': // 1 string to match. |
| 447 | if (memcmp(RuleIdentifier.data()+5, "dant_sext_inreg", 15) != 0) |
| 448 | break; |
| 449 | return 53; // "redundant_sext_inreg" |
| 450 | } |
| 451 | break; |
| 452 | case 'u': // 1 string to match. |
| 453 | if (memcmp(RuleIdentifier.data()+1, "nmerge_zext_to_zext", 19) != 0) |
| 454 | break; |
| 455 | return 66; // "unmerge_zext_to_zext" |
| 456 | } |
| 457 | break; |
| 458 | case 21: // 2 strings to match. |
| 459 | if (memcmp(RuleIdentifier.data()+0, "un", 2) != 0) |
| 460 | break; |
| 461 | switch (RuleIdentifier[2]) { |
| 462 | default: break; |
| 463 | case 'd': // 1 string to match. |
| 464 | if (memcmp(RuleIdentifier.data()+3, "ef_to_negative_one", 18) != 0) |
| 465 | break; |
| 466 | return 13; // "undef_to_negative_one" |
| 467 | case 'm': // 1 string to match. |
| 468 | if (memcmp(RuleIdentifier.data()+3, "erge_dead_to_trunc", 18) != 0) |
| 469 | break; |
| 470 | return 65; // "unmerge_dead_to_trunc" |
| 471 | } |
| 472 | break; |
| 473 | case 22: // 7 strings to match. |
| 474 | switch (RuleIdentifier[0]) { |
| 475 | default: break; |
| 476 | case 'f': // 2 strings to match. |
| 477 | switch (RuleIdentifier[1]) { |
| 478 | default: break; |
| 479 | case 'o': // 1 string to match. |
| 480 | if (memcmp(RuleIdentifier.data()+2, "ld_binop_into_select", 20) != 0) |
| 481 | break; |
| 482 | return 106; // "fold_binop_into_select" |
| 483 | case 'u': // 1 string to match. |
| 484 | if (memcmp(RuleIdentifier.data()+2, "nnel_shift_to_rotate", 20) != 0) |
| 485 | break; |
| 486 | return 85; // "funnel_shift_to_rotate" |
| 487 | } |
| 488 | break; |
| 489 | case 'i': // 1 string to match. |
| 490 | if (memcmp(RuleIdentifier.data()+1, "cmp_to_lhs_known_bits", 21) != 0) |
| 491 | break; |
| 492 | return 58; // "icmp_to_lhs_known_bits" |
| 493 | case 'p': // 1 string to match. |
| 494 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_any_op", 21) != 0) |
| 495 | break; |
| 496 | return 17; // "propagate_undef_any_op" |
| 497 | case 'r': // 1 string to match. |
| 498 | if (memcmp(RuleIdentifier.data()+1, "edundant_neg_operands", 21) != 0) |
| 499 | break; |
| 500 | return 96; // "redundant_neg_operands" |
| 501 | case 's': // 1 string to match. |
| 502 | if (memcmp(RuleIdentifier.data()+1, "hl_ashr_to_sext_inreg", 21) != 0) |
| 503 | break; |
| 504 | return 45; // "shl_ashr_to_sext_inreg" |
| 505 | case 't': // 1 string to match. |
| 506 | if (memcmp(RuleIdentifier.data()+1, "runc_buildvector_fold", 21) != 0) |
| 507 | break; |
| 508 | return 35; // "trunc_buildvector_fold" |
| 509 | } |
| 510 | break; |
| 511 | case 23: // 2 strings to match. |
| 512 | switch (RuleIdentifier[0]) { |
| 513 | default: break; |
| 514 | case 'c': // 1 string to match. |
| 515 | if (memcmp(RuleIdentifier.data()+1, "ommute_constant_to_rhs", 22) != 0) |
| 516 | break; |
| 517 | return 111; // "commute_constant_to_rhs" |
| 518 | case 'p': // 1 string to match. |
| 519 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_all_ops", 22) != 0) |
| 520 | break; |
| 521 | return 18; // "propagate_undef_all_ops" |
| 522 | } |
| 523 | break; |
| 524 | case 24: // 4 strings to match. |
| 525 | switch (RuleIdentifier[0]) { |
| 526 | default: break; |
| 527 | case 'b': // 1 string to match. |
| 528 | if (memcmp(RuleIdentifier.data()+1, "inop_left_undef_to_zero", 23) != 0) |
| 529 | break; |
| 530 | return 14; // "binop_left_undef_to_zero" |
| 531 | case 'n': // 1 string to match. |
| 532 | if (memcmp(RuleIdentifier.data()+1, "arrow_binop_feeding_and", 23) != 0) |
| 533 | break; |
| 534 | return 48; // "narrow_binop_feeding_and" |
| 535 | case 's': // 1 string to match. |
| 536 | if (memcmp(RuleIdentifier.data()+1, "ext_inreg_to_zext_inreg", 23) != 0) |
| 537 | break; |
| 538 | return 59; // "sext_inreg_to_zext_inreg" |
| 539 | case 'x': // 1 string to match. |
| 540 | if (memcmp(RuleIdentifier.data()+1, "or_of_and_with_same_reg", 23) != 0) |
| 541 | break; |
| 542 | return 78; // "xor_of_and_with_same_reg" |
| 543 | } |
| 544 | break; |
| 545 | case 25: // 4 strings to match. |
| 546 | switch (RuleIdentifier[0]) { |
| 547 | default: break; |
| 548 | case 'b': // 3 strings to match. |
| 549 | switch (RuleIdentifier[1]) { |
| 550 | default: break; |
| 551 | case 'i': // 2 strings to match. |
| 552 | if (memcmp(RuleIdentifier.data()+2, "tfield_extract_from_", 20) != 0) |
| 553 | break; |
| 554 | switch (RuleIdentifier[22]) { |
| 555 | default: break; |
| 556 | case 'a': // 1 string to match. |
| 557 | if (memcmp(RuleIdentifier.data()+23, "nd", 2) != 0) |
| 558 | break; |
| 559 | return 88; // "bitfield_extract_from_and" |
| 560 | case 's': // 1 string to match. |
| 561 | if (memcmp(RuleIdentifier.data()+23, "hr", 2) != 0) |
| 562 | break; |
| 563 | return 89; // "bitfield_extract_from_shr" |
| 564 | } |
| 565 | break; |
| 566 | case 'u': // 1 string to match. |
| 567 | if (memcmp(RuleIdentifier.data()+2, "ildvector_identity_fold", 23) != 0) |
| 568 | break; |
| 569 | return 34; // "buildvector_identity_fold" |
| 570 | } |
| 571 | break; |
| 572 | case 'e': // 1 string to match. |
| 573 | if (memcmp(RuleIdentifier.data()+1, "xtract_vec_elt_build_vec", 24) != 0) |
| 574 | break; |
| 575 | return 6; // "extract_vec_elt_build_vec" |
| 576 | } |
| 577 | break; |
| 578 | case 26: // 3 strings to match. |
| 579 | switch (RuleIdentifier[0]) { |
| 580 | default: break; |
| 581 | case 'b': // 1 string to match. |
| 582 | if (memcmp(RuleIdentifier.data()+1, "inop_right_undef_to_undef", 25) != 0) |
| 583 | break; |
| 584 | return 15; // "binop_right_undef_to_undef" |
| 585 | case 'c': // 1 string to match. |
| 586 | if (memcmp(RuleIdentifier.data()+1, "ombine_indexed_load_store", 25) != 0) |
| 587 | break; |
| 588 | return 10; // "combine_indexed_load_store" |
| 589 | case 'f': // 1 string to match. |
| 590 | if (memcmp(RuleIdentifier.data()+1, "unnel_shift_from_or_shift", 25) != 0) |
| 591 | break; |
| 592 | return 84; // "funnel_shift_from_or_shift" |
| 593 | } |
| 594 | break; |
| 595 | case 27: // 2 strings to match. |
| 596 | switch (RuleIdentifier[0]) { |
| 597 | default: break; |
| 598 | case 'r': // 1 string to match. |
| 599 | if (memcmp(RuleIdentifier.data()+1, "edundant_binop_in_equality", 26) != 0) |
| 600 | break; |
| 601 | return 109; // "redundant_binop_in_equality" |
| 602 | case 't': // 1 string to match. |
| 603 | if (memcmp(RuleIdentifier.data()+1, "runc_lshr_buildvector_fold", 26) != 0) |
| 604 | break; |
| 605 | return 36; // "trunc_lshr_buildvector_fold" |
| 606 | } |
| 607 | break; |
| 608 | case 28: // 3 strings to match. |
| 609 | switch (RuleIdentifier[0]) { |
| 610 | default: break; |
| 611 | case 'o': // 1 string to match. |
| 612 | if (memcmp(RuleIdentifier.data()+1, "pt_brcond_by_inverting_cond", 27) != 0) |
| 613 | break; |
| 614 | return 62; // "opt_brcond_by_inverting_cond" |
| 615 | case 'p': // 1 string to match. |
| 616 | if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_shuffle_mask", 27) != 0) |
| 617 | break; |
| 618 | return 19; // "propagate_undef_shuffle_mask" |
| 619 | case 's': // 1 string to match. |
| 620 | if (memcmp(RuleIdentifier.data()+1, "hift_of_shifted_logic_chain", 27) != 0) |
| 621 | break; |
| 622 | return 81; // "shift_of_shifted_logic_chain" |
| 623 | } |
| 624 | break; |
| 625 | case 29: // 2 strings to match. |
| 626 | switch (RuleIdentifier[0]) { |
| 627 | default: break; |
| 628 | case 'b': // 1 string to match. |
| 629 | if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_shr_and", 28) != 0) |
| 630 | break; |
| 631 | return 90; // "bitfield_extract_from_shr_and" |
| 632 | case 'i': // 1 string to match. |
| 633 | if (memcmp(RuleIdentifier.data()+1, "cmp_to_true_false_known_bits", 28) != 0) |
| 634 | break; |
| 635 | return 57; // "icmp_to_true_false_known_bits" |
| 636 | } |
| 637 | break; |
| 638 | case 32: // 3 strings to match. |
| 639 | switch (RuleIdentifier[0]) { |
| 640 | default: break; |
| 641 | case 'b': // 1 string to match. |
| 642 | if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_sext_inreg", 31) != 0) |
| 643 | break; |
| 644 | return 87; // "bitfield_extract_from_sext_inreg" |
| 645 | case 'c': // 2 strings to match. |
| 646 | if (memcmp(RuleIdentifier.data()+1, "ombine_f", 8) != 0) |
| 647 | break; |
| 648 | switch (RuleIdentifier[9]) { |
| 649 | default: break; |
| 650 | case 'a': // 1 string to match. |
| 651 | if (memcmp(RuleIdentifier.data()+10, "dd_fmul_to_fmad_or_fma", 22) != 0) |
| 652 | break; |
| 653 | return 98; // "combine_fadd_fmul_to_fmad_or_fma" |
| 654 | case 's': // 1 string to match. |
| 655 | if (memcmp(RuleIdentifier.data()+10, "ub_fmul_to_fmad_or_fma", 22) != 0) |
| 656 | break; |
| 657 | return 102; // "combine_fsub_fmul_to_fmad_or_fma" |
| 658 | } |
| 659 | break; |
| 660 | } |
| 661 | break; |
| 662 | case 34: // 1 string to match. |
| 663 | if (memcmp(RuleIdentifier.data()+0, "extract_all_elts_from_build_vector", 34) != 0) |
| 664 | break; |
| 665 | return 7; // "extract_all_elts_from_build_vector" |
| 666 | case 36: // 3 strings to match. |
| 667 | switch (RuleIdentifier[0]) { |
| 668 | default: break; |
| 669 | case 'c': // 2 strings to match. |
| 670 | if (memcmp(RuleIdentifier.data()+1, "ombine_", 7) != 0) |
| 671 | break; |
| 672 | switch (RuleIdentifier[8]) { |
| 673 | default: break; |
| 674 | case 'f': // 1 string to match. |
| 675 | if (memcmp(RuleIdentifier.data()+9, "add_fma_fmul_to_fmad_or_fma", 27) != 0) |
| 676 | break; |
| 677 | return 100; // "combine_fadd_fma_fmul_to_fmad_or_fma" |
| 678 | case 'i': // 1 string to match. |
| 679 | if (memcmp(RuleIdentifier.data()+9, "nsert_vec_elts_build_vector", 27) != 0) |
| 680 | break; |
| 681 | return 5; // "combine_insert_vec_elts_build_vector" |
| 682 | } |
| 683 | break; |
| 684 | case 'i': // 1 string to match. |
| 685 | if (memcmp(RuleIdentifier.data()+1, "nsert_extract_vec_elt_out_of_bounds", 35) != 0) |
| 686 | break; |
| 687 | return 22; // "insert_extract_vec_elt_out_of_bounds" |
| 688 | } |
| 689 | break; |
| 690 | case 37: // 2 strings to match. |
| 691 | switch (RuleIdentifier[0]) { |
| 692 | default: break; |
| 693 | case 'c': // 1 string to match. |
| 694 | if (memcmp(RuleIdentifier.data()+1, "ombine_fsub_fneg_fmul_to_fmad_or_fma", 36) != 0) |
| 695 | break; |
| 696 | return 103; // "combine_fsub_fneg_fmul_to_fmad_or_fma" |
| 697 | case 'h': // 1 string to match. |
| 698 | if (memcmp(RuleIdentifier.data()+1, "oist_logic_op_with_same_opcode_hands", 36) != 0) |
| 699 | break; |
| 700 | return 41; // "hoist_logic_op_with_same_opcode_hands" |
| 701 | } |
| 702 | break; |
| 703 | case 38: // 2 strings to match. |
| 704 | if (memcmp(RuleIdentifier.data()+0, "combine_f", 9) != 0) |
| 705 | break; |
| 706 | switch (RuleIdentifier[9]) { |
| 707 | default: break; |
| 708 | case 'a': // 1 string to match. |
| 709 | if (memcmp(RuleIdentifier.data()+10, "dd_fpext_fmul_to_fmad_or_fma", 28) != 0) |
| 710 | break; |
| 711 | return 99; // "combine_fadd_fpext_fmul_to_fmad_or_fma" |
| 712 | case 's': // 1 string to match. |
| 713 | if (memcmp(RuleIdentifier.data()+10, "ub_fpext_fmul_to_fmad_or_fma", 28) != 0) |
| 714 | break; |
| 715 | return 104; // "combine_fsub_fpext_fmul_to_fmad_or_fma" |
| 716 | } |
| 717 | break; |
| 718 | case 42: // 1 string to match. |
| 719 | if (memcmp(RuleIdentifier.data()+0, "combine_fadd_fpext_fma_fmul_to_fmad_or_fma", 42) != 0) |
| 720 | break; |
| 721 | return 101; // "combine_fadd_fpext_fma_fmul_to_fmad_or_fma" |
| 722 | case 43: // 1 string to match. |
| 723 | if (memcmp(RuleIdentifier.data()+0, "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma", 43) != 0) |
| 724 | break; |
| 725 | return 105; // "combine_fsub_fpext_fneg_fmul_to_fmad_or_fma" |
| 726 | } |
| 727 | #endif // ifndef NDEBUG |
| 728 | |
| 729 | return std::nullopt; |
| 730 | } |
| 731 | static std::optional<std::pair<uint64_t, uint64_t>> getRuleRangeForIdentifier(StringRef RuleIdentifier) { |
| 732 | std::pair<StringRef, StringRef> RangePair = RuleIdentifier.split('-'); |
| 733 | if (!RangePair.second.empty()) { |
| 734 | const auto First = getRuleIdxForIdentifier(RangePair.first); |
| 735 | const auto Last = getRuleIdxForIdentifier(RangePair.second); |
| 736 | if (!First || !Last) |
| 737 | return std::nullopt; |
| 738 | if (First >= Last) |
| 739 | report_fatal_error("Beginning of range should be before end of range"); |
| 740 | return {{*First, *Last + 1}}; |
| 741 | } |
| 742 | if (RangePair.first == "*") { |
| 743 | return {{0, 114}}; |
| 744 | } |
| 745 | const auto I = getRuleIdxForIdentifier(RangePair.first); |
| 746 | if (!I) |
| 747 | return std::nullopt; |
| 748 | return {{*I, *I + 1}}; |
| 749 | } |
| 750 | |
| 751 | bool AMDGPUGenPreLegalizerCombinerHelperRuleConfig::setRuleEnabled(StringRef RuleIdentifier) { |
| 752 | auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier); |
| 753 | if (!MaybeRange) |
| 754 | return false; |
| 755 | for (auto I = MaybeRange->first; I < MaybeRange->second; ++I) |
| 756 | DisabledRules.reset(I); |
| 757 | return true; |
| 758 | } |
| 759 | |
| 760 | bool AMDGPUGenPreLegalizerCombinerHelperRuleConfig::setRuleDisabled(StringRef RuleIdentifier) { |
| 761 | auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier); |
| 762 | if (!MaybeRange) |
| 763 | return false; |
| 764 | for (auto I = MaybeRange->first; I < MaybeRange->second; ++I) |
| 765 | DisabledRules.set(I); |
| 766 | return true; |
| 767 | } |
| 768 | |
| 769 | bool AMDGPUGenPreLegalizerCombinerHelperRuleConfig::isRuleDisabled(unsigned RuleID) const { |
| 770 | return DisabledRules.test(RuleID); |
| 771 | } |
| 772 | #endif // ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H |
| 773 | |
| 774 | #ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP |
| 775 | |
| 776 | std::vector<std::string> AMDGPUPreLegalizerCombinerHelperOption; |
| 777 | cl::list<std::string> AMDGPUPreLegalizerCombinerHelperDisableOption( |
| 778 | "amdgpuprelegalizercombinerhelper-disable-rule", |
| 779 | cl::desc("Disable one or more combiner rules temporarily in the AMDGPUPreLegalizerCombinerHelper pass"), |
| 780 | cl::CommaSeparated, |
| 781 | cl::Hidden, |
| 782 | cl::cat(GICombinerOptionCategory), |
| 783 | cl::callback([](const std::string &Str) { |
| 784 | AMDGPUPreLegalizerCombinerHelperOption.push_back(Str); |
| 785 | })); |
| 786 | cl::list<std::string> AMDGPUPreLegalizerCombinerHelperOnlyEnableOption( |
| 787 | "amdgpuprelegalizercombinerhelper-only-enable-rule", |
| 788 | cl::desc("Disable all rules in the AMDGPUPreLegalizerCombinerHelper pass then re-enable the specified ones"), |
| 789 | cl::Hidden, |
| 790 | cl::cat(GICombinerOptionCategory), |
| 791 | cl::callback([](const std::string &CommaSeparatedArg) { |
| 792 | StringRef Str = CommaSeparatedArg; |
| 793 | AMDGPUPreLegalizerCombinerHelperOption.push_back("*"); |
| 794 | do { |
| 795 | auto X = Str.split(","); |
| 796 | AMDGPUPreLegalizerCombinerHelperOption.push_back(("!" + X.first).str()); |
| 797 | Str = X.second; |
| 798 | } while (!Str.empty()); |
| 799 | })); |
| 800 | |
| 801 | bool AMDGPUGenPreLegalizerCombinerHelperRuleConfig::parseCommandLineOption() { |
| 802 | for (StringRef Identifier : AMDGPUPreLegalizerCombinerHelperOption) { |
| 803 | bool Enabled = Identifier.consume_front("!"); |
| 804 | if (Enabled && !setRuleEnabled(Identifier)) |
| 805 | return false; |
| 806 | if (!Enabled && !setRuleDisabled(Identifier)) |
| 807 | return false; |
| 808 | } |
| 809 | return true; |
| 810 | } |
| 811 | |
| 812 | bool AMDGPUGenPreLegalizerCombinerHelper::tryCombineAll( |
| 813 | GISelChangeObserver &Observer, |
| 814 | MachineInstr &MI, |
| 815 | MachineIRBuilder &B) const { |
| 816 | MachineBasicBlock *MBB = MI.getParent(); |
| 817 | MachineFunction *MF = MBB->getParent(); |
| 818 | MachineRegisterInfo &MRI = MF->getRegInfo(); |
| 819 | SmallVector<MachineInstr *, 8> MIs = {&MI}; |
| 820 | |
| 821 | (void)MBB; (void)MF; (void)MRI; (void)RuleConfig; |
| 822 | |
| 823 | // Match data |
| 824 | unsigned MatchData1; |
| 825 | std::pair<Register, bool> MatchData2; |
| 826 | SmallVector<Register, 4> MatchData5; |
| 827 | Register MatchData6; |
| 828 | SmallVector<std::pair<Register, MachineInstr*>> MatchData7; |
| 829 | PreferredTuple MatchData8; |
| 830 | std::function<void(MachineIRBuilder &)> MatchData9; |
| 831 | IndexedLoadStoreMatchInfo MatchData10; |
| 832 | std::function<void(MachineIRBuilder &)> MatchData21; |
| 833 | Register MatchData28; |
| 834 | Register MatchData29; |
| 835 | Register MatchData30; |
| 836 | Register MatchData31; |
| 837 | Register MatchData33; |
| 838 | Register MatchData34; |
| 839 | Register MatchData35; |
| 840 | Register MatchData36; |
| 841 | MachineInstr* MatchData39; |
| 842 | std::tuple<Register, Register> MatchData40; |
| 843 | InstructionStepsMatchInfo MatchData41; |
| 844 | std::function<void(MachineIRBuilder &)> MatchData43; |
| 845 | PtrAddChain MatchData44; |
| 846 | std::tuple<Register, int64_t> MatchData45; |
| 847 | std::tuple<Register, unsigned> MatchData46; |
| 848 | RegisterImmPair MatchData47; |
| 849 | std::function<void(MachineIRBuilder &)> MatchData48; |
| 850 | unsigned MatchData50; |
| 851 | std::function<void(MachineIRBuilder &)> MatchData51; |
| 852 | Register MatchData52; |
| 853 | Register MatchData54; |
| 854 | Register MatchData56; |
| 855 | int64_t MatchData57; |
| 856 | std::function<void(MachineIRBuilder &)> MatchData58; |
| 857 | std::tuple<Register, unsigned> MatchData60; |
| 858 | SmallVector<Register, 4> MatchData61; |
| 859 | MachineInstr * MatchData62; |
| 860 | SmallVector<Register, 8> MatchData63; |
| 861 | SmallVector<APInt, 8> MatchData64; |
| 862 | Register MatchData67; |
| 863 | std::pair<Register, unsigned> MatchData68; |
| 864 | std::pair<MachineInstr*, LLT> MatchData69; |
| 865 | std::optional<APFloat> MatchData70; |
| 866 | APInt MatchData71; |
| 867 | std::function<void(MachineIRBuilder &)> MatchData72; |
| 868 | std::function<void(MachineIRBuilder &)> MatchData73; |
| 869 | std::function<void(MachineIRBuilder &)> MatchData74; |
| 870 | std::function<void(MachineIRBuilder &)> MatchData75; |
| 871 | std::function<void(MachineIRBuilder &)> MatchData76; |
| 872 | unsigned MatchData77; |
| 873 | std::pair<Register, Register> MatchData78; |
| 874 | RegisterImmPair MatchData80; |
| 875 | ShiftOfShiftedLogic MatchData81; |
| 876 | std::function<void(MachineIRBuilder &)> MatchData82; |
| 877 | MachineInstr * MatchData83; |
| 878 | std::function<void(MachineIRBuilder &)> MatchData84; |
| 879 | std::function<void(MachineIRBuilder &)> MatchData86; |
| 880 | std::function<void(MachineIRBuilder &)> MatchData87; |
| 881 | std::function<void(MachineIRBuilder &)> MatchData88; |
| 882 | std::function<void(MachineIRBuilder &)> MatchData89; |
| 883 | std::function<void(MachineIRBuilder &)> MatchData90; |
| 884 | APInt MatchData91; |
| 885 | std::function<void(MachineIRBuilder &)> MatchData92; |
| 886 | std::function<void(MachineIRBuilder &)> MatchData96; |
| 887 | std::function<void(MachineIRBuilder &)> MatchData97; |
| 888 | std::function<void(MachineIRBuilder &)> MatchData98; |
| 889 | std::function<void(MachineIRBuilder &)> MatchData99; |
| 890 | std::function<void(MachineIRBuilder &)> MatchData100; |
| 891 | std::function<void(MachineIRBuilder &)> MatchData101; |
| 892 | std::function<void(MachineIRBuilder &)> MatchData102; |
| 893 | std::function<void(MachineIRBuilder &)> MatchData103; |
| 894 | std::function<void(MachineIRBuilder &)> MatchData104; |
| 895 | std::function<void(MachineIRBuilder &)> MatchData105; |
| 896 | unsigned MatchData106; |
| 897 | std::function<void(MachineIRBuilder &)> MatchData107; |
| 898 | std::function<void(MachineIRBuilder &)> MatchData108; |
| 899 | std::function<void(MachineIRBuilder &)> MatchData109; |
| 900 | Register MatchData110; |
| 901 | AMDGPUPreLegalizerCombinerHelper::ClampI64ToI16MatchInfo MatchData112; |
| 902 | MachineInstr * MatchData113; |
| 903 | |
| 904 | int Partition = -1; |
| 905 | Partition = -1; |
| 906 | switch (MIs[0]->getOpcode()) { |
| 907 | case TargetOpcode::COPY: Partition = 0; break; |
| 908 | case TargetOpcode::G_MUL: Partition = 1; break; |
| 909 | case TargetOpcode::G_ADD: Partition = 2; break; |
| 910 | case TargetOpcode::G_FREEZE: Partition = 3; break; |
| 911 | case TargetOpcode::G_FABS: Partition = 4; break; |
| 912 | case TargetOpcode::G_FCANONICALIZE: Partition = 5; break; |
| 913 | case TargetOpcode::G_INSERT_VECTOR_ELT: Partition = 6; break; |
| 914 | case TargetOpcode::G_EXTRACT_VECTOR_ELT: Partition = 7; break; |
| 915 | case TargetOpcode::G_BUILD_VECTOR: Partition = 8; break; |
| 916 | case TargetOpcode::G_LOAD: Partition = 9; break; |
| 917 | case TargetOpcode::G_SEXTLOAD: Partition = 10; break; |
| 918 | case TargetOpcode::G_ZEXTLOAD: Partition = 11; break; |
| 919 | case TargetOpcode::G_AND: Partition = 12; break; |
| 920 | case TargetOpcode::G_STORE: Partition = 13; break; |
| 921 | case TargetOpcode::G_UITOFP: Partition = 14; break; |
| 922 | case TargetOpcode::G_SITOFP: Partition = 15; break; |
| 923 | case TargetOpcode::G_OR: Partition = 16; break; |
| 924 | case TargetOpcode::G_SHL: Partition = 17; break; |
| 925 | case TargetOpcode::G_UDIV: Partition = 18; break; |
| 926 | case TargetOpcode::G_UREM: Partition = 19; break; |
| 927 | case TargetOpcode::G_ASHR: Partition = 20; break; |
| 928 | case TargetOpcode::G_LSHR: Partition = 21; break; |
| 929 | case TargetOpcode::G_ABS: Partition = 22; break; |
| 930 | case TargetOpcode::G_FPTOSI: Partition = 23; break; |
| 931 | case TargetOpcode::G_FPTOUI: Partition = 24; break; |
| 932 | case TargetOpcode::G_SUB: Partition = 25; break; |
| 933 | case TargetOpcode::G_XOR: Partition = 26; break; |
| 934 | case TargetOpcode::G_TRUNC: Partition = 27; break; |
| 935 | case TargetOpcode::G_SHUFFLE_VECTOR: Partition = 28; break; |
| 936 | case TargetOpcode::G_UNMERGE_VALUES: Partition = 29; break; |
| 937 | case TargetOpcode::G_SELECT: Partition = 30; break; |
| 938 | case TargetOpcode::G_PTR_ADD: Partition = 31; break; |
| 939 | case TargetOpcode::G_ROTL: Partition = 32; break; |
| 940 | case TargetOpcode::G_ROTR: Partition = 33; break; |
| 941 | case TargetOpcode::G_SDIV: Partition = 34; break; |
| 942 | case TargetOpcode::G_SREM: Partition = 35; break; |
| 943 | case TargetOpcode::G_INTTOPTR: Partition = 36; break; |
| 944 | case TargetOpcode::G_PTRTOINT: Partition = 37; break; |
| 945 | case TargetOpcode::G_ANYEXT: Partition = 38; break; |
| 946 | case TargetOpcode::G_FNEG: Partition = 39; break; |
| 947 | case TargetOpcode::G_BUILD_VECTOR_TRUNC: Partition = 40; break; |
| 948 | case TargetOpcode::G_BITCAST: Partition = 41; break; |
| 949 | case TargetOpcode::G_FPTRUNC: Partition = 42; break; |
| 950 | case TargetOpcode::G_PHI: Partition = 43; break; |
| 951 | case TargetOpcode::G_SEXT_INREG: Partition = 44; break; |
| 952 | case TargetOpcode::G_ZEXT: Partition = 45; break; |
| 953 | case TargetOpcode::G_ICMP: Partition = 46; break; |
| 954 | case TargetOpcode::G_SEXT: Partition = 47; break; |
| 955 | case TargetOpcode::G_BR: Partition = 48; break; |
| 956 | case TargetOpcode::G_MERGE_VALUES: Partition = 49; break; |
| 957 | case TargetOpcode::G_FSQRT: Partition = 50; break; |
| 958 | case TargetOpcode::G_FLOG2: Partition = 51; break; |
| 959 | case TargetOpcode::G_UMULO: Partition = 52; break; |
| 960 | case TargetOpcode::G_SMULO: Partition = 53; break; |
| 961 | case TargetOpcode::G_UADDO: Partition = 54; break; |
| 962 | case TargetOpcode::G_SADDO: Partition = 55; break; |
| 963 | case TargetOpcode::G_UADDE: Partition = 56; break; |
| 964 | case TargetOpcode::G_SADDE: Partition = 57; break; |
| 965 | case TargetOpcode::G_USUBE: Partition = 58; break; |
| 966 | case TargetOpcode::G_SSUBE: Partition = 59; break; |
| 967 | case TargetOpcode::G_FMINNUM: Partition = 60; break; |
| 968 | case TargetOpcode::G_FMAXNUM: Partition = 61; break; |
| 969 | case TargetOpcode::G_FMINIMUM: Partition = 62; break; |
| 970 | case TargetOpcode::G_FMAXIMUM: Partition = 63; break; |
| 971 | case TargetOpcode::G_SSHLSAT: Partition = 64; break; |
| 972 | case TargetOpcode::G_USHLSAT: Partition = 65; break; |
| 973 | case TargetOpcode::G_FSHL: Partition = 66; break; |
| 974 | case TargetOpcode::G_FSHR: Partition = 67; break; |
| 975 | case TargetOpcode::G_UMULH: Partition = 68; break; |
| 976 | case TargetOpcode::G_FADD: Partition = 69; break; |
| 977 | case TargetOpcode::G_FSUB: Partition = 70; break; |
| 978 | case TargetOpcode::G_FMUL: Partition = 71; break; |
| 979 | case TargetOpcode::G_FDIV: Partition = 72; break; |
| 980 | case TargetOpcode::G_FMAD: Partition = 73; break; |
| 981 | case TargetOpcode::G_FMA: Partition = 74; break; |
| 982 | case TargetOpcode::G_SMIN: Partition = 75; break; |
| 983 | case TargetOpcode::G_SMAX: Partition = 76; break; |
| 984 | case TargetOpcode::G_UMIN: Partition = 77; break; |
| 985 | case TargetOpcode::G_UMAX: Partition = 78; break; |
| 986 | case TargetOpcode::G_FREM: Partition = 79; break; |
| 987 | } |
| 988 | // Default case but without conflicting with potential default case in selection. |
| 989 | if (Partition == -1) return false; |
| 990 | if (Partition == 0 /* TargetOpcode::COPY */) { |
| 991 | // Leaf name: copy_prop |
| 992 | // Rule: copy_prop |
| 993 | if (!RuleConfig->isRuleDisabled(0)) { |
| 994 | if (1 |
| 995 | && [&]() { |
| 996 | return Helper.matchCombineCopy(*MIs[0]); |
| 997 | return true; |
| 998 | }() ) { |
| 999 | LLVM_DEBUG(dbgs() << "Applying rule 'copy_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'copy_prop'\n" ; } } while (false); |
| 1000 | Helper.applyCombineCopy(*MIs[0]); |
| 1001 | return true; |
| 1002 | } |
| 1003 | } |
| 1004 | return false; |
| 1005 | } |
| 1006 | if (Partition == 1 /* TargetOpcode::G_MUL */) { |
| 1007 | // Leaf name: mul_to_shl |
| 1008 | // Rule: mul_to_shl |
| 1009 | if (!RuleConfig->isRuleDisabled(1)) { |
| 1010 | if (1 |
| 1011 | && [&]() { |
| 1012 | return Helper.matchCombineMulToShl(*MIs[0], MatchData1); |
| 1013 | return true; |
| 1014 | }() ) { |
| 1015 | LLVM_DEBUG(dbgs() << "Applying rule 'mul_to_shl'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mul_to_shl'\n" ; } } while (false); |
| 1016 | Helper.applyCombineMulToShl(*MIs[0], MatchData1); |
| 1017 | return true; |
| 1018 | } |
| 1019 | } |
| 1020 | // Leaf name: mul_by_neg_one |
| 1021 | // Rule: mul_by_neg_one |
| 1022 | if (!RuleConfig->isRuleDisabled(3)) { |
| 1023 | if (1 |
| 1024 | && [&]() { |
| 1025 | return Helper.matchConstantOp(MIs[0]->getOperand(2), -1); |
| 1026 | return true; |
| 1027 | }() ) { |
| 1028 | LLVM_DEBUG(dbgs() << "Applying rule 'mul_by_neg_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mul_by_neg_one'\n" ; } } while (false); |
| 1029 | Helper.applyCombineMulByNegativeOne(*MIs[0]); |
| 1030 | return true; |
| 1031 | } |
| 1032 | } |
| 1033 | // Leaf name: undef_to_int_zero |
| 1034 | // Rule: undef_to_int_zero |
| 1035 | if (!RuleConfig->isRuleDisabled(12)) { |
| 1036 | if (1 |
| 1037 | && [&]() { |
| 1038 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1039 | return true; |
| 1040 | }() ) { |
| 1041 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n" ; } } while (false); |
| 1042 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 1043 | return true; |
| 1044 | } |
| 1045 | } |
| 1046 | // Leaf name: binop_right_to_zero |
| 1047 | // Rule: binop_right_to_zero |
| 1048 | if (!RuleConfig->isRuleDisabled(27)) { |
| 1049 | if (1 |
| 1050 | && [&]() { |
| 1051 | return Helper.matchOperandIsZero(*MIs[0], 2); |
| 1052 | return true; |
| 1053 | }() ) { |
| 1054 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_to_zero'\n" ; } } while (false); |
| 1055 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
| 1056 | return true; |
| 1057 | } |
| 1058 | } |
| 1059 | // Leaf name: right_identity_one |
| 1060 | // Rule: right_identity_one |
| 1061 | if (!RuleConfig->isRuleDisabled(32)) { |
| 1062 | if (1 |
| 1063 | && [&]() { |
| 1064 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 1); |
| 1065 | return true; |
| 1066 | }() ) { |
| 1067 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_one'\n" ; } } while (false); |
| 1068 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1069 | return true; |
| 1070 | } |
| 1071 | } |
| 1072 | // Leaf name: constant_fold |
| 1073 | // Rule: constant_fold |
| 1074 | if (!RuleConfig->isRuleDisabled(91)) { |
| 1075 | if (1 |
| 1076 | && [&]() { |
| 1077 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
| 1078 | return true; |
| 1079 | }() ) { |
| 1080 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 1081 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
| 1082 | return true; |
| 1083 | } |
| 1084 | } |
| 1085 | // Leaf name: commute_constant_to_rhs |
| 1086 | // Rule: commute_constant_to_rhs |
| 1087 | if (!RuleConfig->isRuleDisabled(111)) { |
| 1088 | if (1 |
| 1089 | && [&]() { |
| 1090 | |
| 1091 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
| 1092 | |
| 1093 | return true; |
| 1094 | }() ) { |
| 1095 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
| 1096 | |
| 1097 | Observer.changingInstr(*MIs[0]); |
| 1098 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
| 1099 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
| 1100 | MIs[0]->getOperand(1).setReg(RHSReg); |
| 1101 | MIs[0]->getOperand(2).setReg(LHSReg); |
| 1102 | Observer.changedInstr(*MIs[0]); |
| 1103 | |
| 1104 | return true; |
| 1105 | } |
| 1106 | } |
| 1107 | return false; |
| 1108 | } |
| 1109 | if (Partition == 2 /* TargetOpcode::G_ADD */) { |
| 1110 | // Leaf name: add_p2i_to_ptradd |
| 1111 | // Rule: add_p2i_to_ptradd |
| 1112 | if (!RuleConfig->isRuleDisabled(2)) { |
| 1113 | if (1 |
| 1114 | && [&]() { |
| 1115 | return Helper.matchCombineAddP2IToPtrAdd(*MIs[0], MatchData2); |
| 1116 | return true; |
| 1117 | }() ) { |
| 1118 | LLVM_DEBUG(dbgs() << "Applying rule 'add_p2i_to_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'add_p2i_to_ptradd'\n" ; } } while (false); |
| 1119 | Helper.applyCombineAddP2IToPtrAdd(*MIs[0], MatchData2); |
| 1120 | return true; |
| 1121 | } |
| 1122 | } |
| 1123 | // Leaf name: propagate_undef_any_op |
| 1124 | // Rule: propagate_undef_any_op |
| 1125 | if (!RuleConfig->isRuleDisabled(17)) { |
| 1126 | if (1 |
| 1127 | && [&]() { |
| 1128 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1129 | return true; |
| 1130 | }() ) { |
| 1131 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 1132 | Helper.replaceInstWithUndef(*MIs[0]); |
| 1133 | return true; |
| 1134 | } |
| 1135 | } |
| 1136 | // Leaf name: right_identity_zero |
| 1137 | // Rule: right_identity_zero |
| 1138 | if (!RuleConfig->isRuleDisabled(24)) { |
| 1139 | if (1 |
| 1140 | && [&]() { |
| 1141 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 1142 | return true; |
| 1143 | }() ) { |
| 1144 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 1145 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1146 | return true; |
| 1147 | } |
| 1148 | } |
| 1149 | // Leaf name: add_sub_reg |
| 1150 | // Rule: add_sub_reg |
| 1151 | if (!RuleConfig->isRuleDisabled(33)) { |
| 1152 | if (1 |
| 1153 | && [&]() { |
| 1154 | return Helper.matchAddSubSameReg(*MIs[0], MatchData33); |
| 1155 | return true; |
| 1156 | }() ) { |
| 1157 | LLVM_DEBUG(dbgs() << "Applying rule 'add_sub_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'add_sub_reg'\n" ; } } while (false); |
| 1158 | return Helper.replaceSingleDefInstWithReg(*MIs[0], |
| 1159 | MatchData33); |
| 1160 | return true; |
| 1161 | } |
| 1162 | } |
| 1163 | // Leaf name: simplify_add_to_sub |
| 1164 | // Rule: simplify_add_to_sub |
| 1165 | if (!RuleConfig->isRuleDisabled(40)) { |
| 1166 | if (1 |
| 1167 | && [&]() { |
| 1168 | return Helper.matchSimplifyAddToSub(*MIs[0], MatchData40); |
| 1169 | return true; |
| 1170 | }() ) { |
| 1171 | LLVM_DEBUG(dbgs() << "Applying rule 'simplify_add_to_sub'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'simplify_add_to_sub'\n" ; } } while (false); |
| 1172 | Helper.applySimplifyAddToSub(*MIs[0], MatchData40); |
| 1173 | return true; |
| 1174 | } |
| 1175 | } |
| 1176 | // Leaf name: constant_fold |
| 1177 | // Rule: constant_fold |
| 1178 | if (!RuleConfig->isRuleDisabled(91)) { |
| 1179 | if (1 |
| 1180 | && [&]() { |
| 1181 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
| 1182 | return true; |
| 1183 | }() ) { |
| 1184 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 1185 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
| 1186 | return true; |
| 1187 | } |
| 1188 | } |
| 1189 | // Leaf name: fold_binop_into_select |
| 1190 | // Rule: fold_binop_into_select |
| 1191 | if (!RuleConfig->isRuleDisabled(106)) { |
| 1192 | if (1 |
| 1193 | && [&]() { |
| 1194 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 1195 | return true; |
| 1196 | }() ) { |
| 1197 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 1198 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 1199 | return true; |
| 1200 | } |
| 1201 | } |
| 1202 | // Leaf name: commute_constant_to_rhs |
| 1203 | // Rule: commute_constant_to_rhs |
| 1204 | if (!RuleConfig->isRuleDisabled(111)) { |
| 1205 | if (1 |
| 1206 | && [&]() { |
| 1207 | |
| 1208 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
| 1209 | |
| 1210 | return true; |
| 1211 | }() ) { |
| 1212 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
| 1213 | |
| 1214 | Observer.changingInstr(*MIs[0]); |
| 1215 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
| 1216 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
| 1217 | MIs[0]->getOperand(1).setReg(RHSReg); |
| 1218 | MIs[0]->getOperand(2).setReg(LHSReg); |
| 1219 | Observer.changedInstr(*MIs[0]); |
| 1220 | |
| 1221 | return true; |
| 1222 | } |
| 1223 | } |
| 1224 | return false; |
| 1225 | } |
| 1226 | if (Partition == 3 /* TargetOpcode::G_FREEZE */) { |
| 1227 | // Leaf name: idempotent_prop |
| 1228 | // Rule: idempotent_prop |
| 1229 | if (!RuleConfig->isRuleDisabled(4)) { |
| 1230 | if (1 |
| 1231 | && [&]() { |
| 1232 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
| 1233 | MIs[0]->getOpcode(); |
| 1234 | return true; |
| 1235 | }() ) { |
| 1236 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
| 1237 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1238 | return true; |
| 1239 | } |
| 1240 | } |
| 1241 | return false; |
| 1242 | } |
| 1243 | if (Partition == 4 /* TargetOpcode::G_FABS */) { |
| 1244 | // Leaf name: idempotent_prop |
| 1245 | // Rule: idempotent_prop |
| 1246 | if (!RuleConfig->isRuleDisabled(4)) { |
| 1247 | if (1 |
| 1248 | && [&]() { |
| 1249 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
| 1250 | MIs[0]->getOpcode(); |
| 1251 | return true; |
| 1252 | }() ) { |
| 1253 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
| 1254 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1255 | return true; |
| 1256 | } |
| 1257 | } |
| 1258 | // Leaf name: constant_fp_op |
| 1259 | // Rule: constant_fp_op |
| 1260 | if (!RuleConfig->isRuleDisabled(70)) { |
| 1261 | if (1 |
| 1262 | && [&]() { |
| 1263 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 1264 | return true; |
| 1265 | }() ) { |
| 1266 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 1267 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 1268 | return true; |
| 1269 | } |
| 1270 | } |
| 1271 | // Leaf name: fabs_fneg_fold |
| 1272 | // Rule: fabs_fneg_fold |
| 1273 | if (!RuleConfig->isRuleDisabled(92)) { |
| 1274 | if (1 |
| 1275 | && [&]() { |
| 1276 | return Helper.matchCombineFAbsOfFNeg(*MIs[0], MatchData92); |
| 1277 | return true; |
| 1278 | }() ) { |
| 1279 | LLVM_DEBUG(dbgs() << "Applying rule 'fabs_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fabs_fneg_fold'\n" ; } } while (false); |
| 1280 | Helper.applyBuildFnNoErase(*MIs[0], MatchData92); |
| 1281 | return true; |
| 1282 | } |
| 1283 | } |
| 1284 | return false; |
| 1285 | } |
| 1286 | if (Partition == 5 /* TargetOpcode::G_FCANONICALIZE */) { |
| 1287 | // Leaf name: idempotent_prop |
| 1288 | // Rule: idempotent_prop |
| 1289 | if (!RuleConfig->isRuleDisabled(4)) { |
| 1290 | if (1 |
| 1291 | && [&]() { |
| 1292 | return MRI.getVRegDef(MIs[0]->getOperand(1).getReg())->getOpcode() == |
| 1293 | MIs[0]->getOpcode(); |
| 1294 | return true; |
| 1295 | }() ) { |
| 1296 | LLVM_DEBUG(dbgs() << "Applying rule 'idempotent_prop'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'idempotent_prop'\n" ; } } while (false); |
| 1297 | Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1298 | return true; |
| 1299 | } |
| 1300 | } |
| 1301 | return false; |
| 1302 | } |
| 1303 | if (Partition == 6 /* TargetOpcode::G_INSERT_VECTOR_ELT */) { |
| 1304 | // Leaf name: combine_insert_vec_elts_build_vector |
| 1305 | // Rule: combine_insert_vec_elts_build_vector |
| 1306 | if (!RuleConfig->isRuleDisabled(5)) { |
| 1307 | if (1 |
| 1308 | && [&]() { |
| 1309 | return Helper.matchCombineInsertVecElts(*MIs[0], MatchData5); |
| 1310 | return true; |
| 1311 | }() ) { |
| 1312 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_insert_vec_elts_build_vector'\n" ; } } while (false); |
| 1313 | Helper.applyCombineInsertVecElts(*MIs[0], MatchData5); |
| 1314 | return true; |
| 1315 | } |
| 1316 | } |
| 1317 | // Leaf name: insert_extract_vec_elt_out_of_bounds |
| 1318 | // Rule: insert_extract_vec_elt_out_of_bounds |
| 1319 | if (!RuleConfig->isRuleDisabled(22)) { |
| 1320 | if (1 |
| 1321 | && [&]() { |
| 1322 | return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]); |
| 1323 | return true; |
| 1324 | }() ) { |
| 1325 | LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n" ; } } while (false); |
| 1326 | Helper.replaceInstWithUndef(*MIs[0]); |
| 1327 | return true; |
| 1328 | } |
| 1329 | } |
| 1330 | return false; |
| 1331 | } |
| 1332 | if (Partition == 7 /* TargetOpcode::G_EXTRACT_VECTOR_ELT */) { |
| 1333 | // Leaf name: extract_vec_elt_build_vec |
| 1334 | // Rule: extract_vec_elt_build_vec |
| 1335 | if (!RuleConfig->isRuleDisabled(6)) { |
| 1336 | if (1 |
| 1337 | && [&]() { |
| 1338 | return Helper.matchExtractVecEltBuildVec(*MIs[0], MatchData6); |
| 1339 | return true; |
| 1340 | }() ) { |
| 1341 | LLVM_DEBUG(dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extract_vec_elt_build_vec'\n" ; } } while (false); |
| 1342 | Helper.applyExtractVecEltBuildVec(*MIs[0], MatchData6); |
| 1343 | return true; |
| 1344 | } |
| 1345 | } |
| 1346 | // Leaf name: insert_extract_vec_elt_out_of_bounds |
| 1347 | // Rule: insert_extract_vec_elt_out_of_bounds |
| 1348 | if (!RuleConfig->isRuleDisabled(22)) { |
| 1349 | if (1 |
| 1350 | && [&]() { |
| 1351 | return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]); |
| 1352 | return true; |
| 1353 | }() ) { |
| 1354 | LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n" ; } } while (false); |
| 1355 | Helper.replaceInstWithUndef(*MIs[0]); |
| 1356 | return true; |
| 1357 | } |
| 1358 | } |
| 1359 | return false; |
| 1360 | } |
| 1361 | if (Partition == 8 /* TargetOpcode::G_BUILD_VECTOR */) { |
| 1362 | // Leaf name: extract_all_elts_from_build_vector |
| 1363 | // Rule: extract_all_elts_from_build_vector |
| 1364 | if (!RuleConfig->isRuleDisabled(7)) { |
| 1365 | if (1 |
| 1366 | && [&]() { |
| 1367 | return Helper.matchExtractAllEltsFromBuildVector(*MIs[0], MatchData7); |
| 1368 | return true; |
| 1369 | }() ) { |
| 1370 | LLVM_DEBUG(dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extract_all_elts_from_build_vector'\n" ; } } while (false); |
| 1371 | Helper.applyExtractAllEltsFromBuildVector(*MIs[0], MatchData7); |
| 1372 | return true; |
| 1373 | } |
| 1374 | } |
| 1375 | // Leaf name: buildvector_identity_fold |
| 1376 | // Rule: buildvector_identity_fold |
| 1377 | if (!RuleConfig->isRuleDisabled(34)) { |
| 1378 | if (1 |
| 1379 | && [&]() { |
| 1380 | return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34); |
| 1381 | return true; |
| 1382 | }() ) { |
| 1383 | LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n" ; } } while (false); |
| 1384 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34); |
| 1385 | return true; |
| 1386 | } |
| 1387 | } |
| 1388 | return false; |
| 1389 | } |
| 1390 | if (Partition == 9 /* TargetOpcode::G_LOAD */) { |
| 1391 | // Leaf name: extending_loads |
| 1392 | // Rule: extending_loads |
| 1393 | if (!RuleConfig->isRuleDisabled(8)) { |
| 1394 | if (1 |
| 1395 | && [&]() { |
| 1396 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
| 1397 | return true; |
| 1398 | }() ) { |
| 1399 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
| 1400 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
| 1401 | return true; |
| 1402 | } |
| 1403 | } |
| 1404 | // Leaf name: combine_indexed_load_store |
| 1405 | // Rule: combine_indexed_load_store |
| 1406 | if (!RuleConfig->isRuleDisabled(10)) { |
| 1407 | if (1 |
| 1408 | && [&]() { |
| 1409 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1410 | return true; |
| 1411 | }() ) { |
| 1412 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
| 1413 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1414 | return true; |
| 1415 | } |
| 1416 | } |
| 1417 | return false; |
| 1418 | } |
| 1419 | if (Partition == 10 /* TargetOpcode::G_SEXTLOAD */) { |
| 1420 | // Leaf name: extending_loads |
| 1421 | // Rule: extending_loads |
| 1422 | if (!RuleConfig->isRuleDisabled(8)) { |
| 1423 | if (1 |
| 1424 | && [&]() { |
| 1425 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
| 1426 | return true; |
| 1427 | }() ) { |
| 1428 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
| 1429 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
| 1430 | return true; |
| 1431 | } |
| 1432 | } |
| 1433 | // Leaf name: combine_indexed_load_store |
| 1434 | // Rule: combine_indexed_load_store |
| 1435 | if (!RuleConfig->isRuleDisabled(10)) { |
| 1436 | if (1 |
| 1437 | && [&]() { |
| 1438 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1439 | return true; |
| 1440 | }() ) { |
| 1441 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
| 1442 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1443 | return true; |
| 1444 | } |
| 1445 | } |
| 1446 | return false; |
| 1447 | } |
| 1448 | if (Partition == 11 /* TargetOpcode::G_ZEXTLOAD */) { |
| 1449 | // Leaf name: extending_loads |
| 1450 | // Rule: extending_loads |
| 1451 | if (!RuleConfig->isRuleDisabled(8)) { |
| 1452 | if (1 |
| 1453 | && [&]() { |
| 1454 | return Helper.matchCombineExtendingLoads(*MIs[0], MatchData8); |
| 1455 | return true; |
| 1456 | }() ) { |
| 1457 | LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extending_loads'\n" ; } } while (false); |
| 1458 | Helper.applyCombineExtendingLoads(*MIs[0], MatchData8); |
| 1459 | return true; |
| 1460 | } |
| 1461 | } |
| 1462 | // Leaf name: combine_indexed_load_store |
| 1463 | // Rule: combine_indexed_load_store |
| 1464 | if (!RuleConfig->isRuleDisabled(10)) { |
| 1465 | if (1 |
| 1466 | && [&]() { |
| 1467 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1468 | return true; |
| 1469 | }() ) { |
| 1470 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
| 1471 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1472 | return true; |
| 1473 | } |
| 1474 | } |
| 1475 | return false; |
| 1476 | } |
| 1477 | if (Partition == 12 /* TargetOpcode::G_AND */) { |
| 1478 | // Leaf name: load_and_mask |
| 1479 | // Rule: load_and_mask |
| 1480 | if (!RuleConfig->isRuleDisabled(9)) { |
| 1481 | if (1 |
| 1482 | && [&]() { |
| 1483 | return Helper.matchCombineLoadWithAndMask(*MIs[0], MatchData9); |
| 1484 | return true; |
| 1485 | }() ) { |
| 1486 | LLVM_DEBUG(dbgs() << "Applying rule 'load_and_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'load_and_mask'\n" ; } } while (false); |
| 1487 | Helper.applyBuildFn(*MIs[0], MatchData9); |
| 1488 | return true; |
| 1489 | } |
| 1490 | } |
| 1491 | // Leaf name: undef_to_int_zero |
| 1492 | // Rule: undef_to_int_zero |
| 1493 | if (!RuleConfig->isRuleDisabled(12)) { |
| 1494 | if (1 |
| 1495 | && [&]() { |
| 1496 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1497 | return true; |
| 1498 | }() ) { |
| 1499 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_int_zero'\n" ; } } while (false); |
| 1500 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 1501 | return true; |
| 1502 | } |
| 1503 | } |
| 1504 | // Leaf name: binop_same_val |
| 1505 | // Rule: binop_same_val |
| 1506 | if (!RuleConfig->isRuleDisabled(25)) { |
| 1507 | if (1 |
| 1508 | && [&]() { |
| 1509 | return Helper.matchBinOpSameVal(*MIs[0]); |
| 1510 | return true; |
| 1511 | }() ) { |
| 1512 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n" ; } } while (false); |
| 1513 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1514 | return true; |
| 1515 | } |
| 1516 | } |
| 1517 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
| 1518 | // Rule: hoist_logic_op_with_same_opcode_hands |
| 1519 | if (!RuleConfig->isRuleDisabled(41)) { |
| 1520 | if (1 |
| 1521 | && [&]() { |
| 1522 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData41); |
| 1523 | return true; |
| 1524 | }() ) { |
| 1525 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
| 1526 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData41); |
| 1527 | return true; |
| 1528 | } |
| 1529 | } |
| 1530 | // Leaf name: narrow_binop_feeding_and |
| 1531 | // Rule: narrow_binop_feeding_and |
| 1532 | if (!RuleConfig->isRuleDisabled(48)) { |
| 1533 | if (1 |
| 1534 | && [&]() { |
| 1535 | return Helper.matchNarrowBinopFeedingAnd(*MIs[0], MatchData48); |
| 1536 | return true; |
| 1537 | }() ) { |
| 1538 | LLVM_DEBUG(dbgs() << "Applying rule 'narrow_binop_feeding_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'narrow_binop_feeding_and'\n" ; } } while (false); |
| 1539 | Helper.applyBuildFnNoErase(*MIs[0], MatchData48); |
| 1540 | return true; |
| 1541 | } |
| 1542 | } |
| 1543 | // Leaf name: redundant_and |
| 1544 | // Rule: redundant_and |
| 1545 | if (!RuleConfig->isRuleDisabled(52)) { |
| 1546 | if (1 |
| 1547 | && [&]() { |
| 1548 | return Helper.matchRedundantAnd(*MIs[0], MatchData52); |
| 1549 | return true; |
| 1550 | }() ) { |
| 1551 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_and'\n" ; } } while (false); |
| 1552 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData52); |
| 1553 | return true; |
| 1554 | } |
| 1555 | } |
| 1556 | // Leaf name: overlapping_and |
| 1557 | // Rule: overlapping_and |
| 1558 | if (!RuleConfig->isRuleDisabled(72)) { |
| 1559 | if (1 |
| 1560 | && [&]() { |
| 1561 | return Helper.matchOverlappingAnd(*MIs[0], MatchData72); |
| 1562 | return true; |
| 1563 | }() ) { |
| 1564 | LLVM_DEBUG(dbgs() << "Applying rule 'overlapping_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'overlapping_and'\n" ; } } while (false); |
| 1565 | Helper.applyBuildFn(*MIs[0], MatchData72); |
| 1566 | return true; |
| 1567 | } |
| 1568 | } |
| 1569 | // Leaf name: bitfield_extract_from_and |
| 1570 | // Rule: bitfield_extract_from_and |
| 1571 | if (!RuleConfig->isRuleDisabled(88)) { |
| 1572 | if (1 |
| 1573 | && [&]() { |
| 1574 | return Helper.matchBitfieldExtractFromAnd(*MIs[0], MatchData88); |
| 1575 | return true; |
| 1576 | }() ) { |
| 1577 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_and'\n" ; } } while (false); |
| 1578 | Helper.applyBuildFn(*MIs[0], MatchData88); |
| 1579 | return true; |
| 1580 | } |
| 1581 | } |
| 1582 | // Leaf name: constant_fold |
| 1583 | // Rule: constant_fold |
| 1584 | if (!RuleConfig->isRuleDisabled(91)) { |
| 1585 | if (1 |
| 1586 | && [&]() { |
| 1587 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
| 1588 | return true; |
| 1589 | }() ) { |
| 1590 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 1591 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
| 1592 | return true; |
| 1593 | } |
| 1594 | } |
| 1595 | // Leaf name: and_or_disjoint_mask |
| 1596 | // Rule: and_or_disjoint_mask |
| 1597 | if (!RuleConfig->isRuleDisabled(97)) { |
| 1598 | if (1 |
| 1599 | && [&]() { |
| 1600 | return Helper.matchAndOrDisjointMask(*MIs[0], MatchData97); |
| 1601 | return true; |
| 1602 | }() ) { |
| 1603 | LLVM_DEBUG(dbgs() << "Applying rule 'and_or_disjoint_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'and_or_disjoint_mask'\n" ; } } while (false); |
| 1604 | Helper.applyBuildFnNoErase(*MIs[0], MatchData97); |
| 1605 | return true; |
| 1606 | } |
| 1607 | } |
| 1608 | // Leaf name: fold_binop_into_select |
| 1609 | // Rule: fold_binop_into_select |
| 1610 | if (!RuleConfig->isRuleDisabled(106)) { |
| 1611 | if (1 |
| 1612 | && [&]() { |
| 1613 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 1614 | return true; |
| 1615 | }() ) { |
| 1616 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 1617 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 1618 | return true; |
| 1619 | } |
| 1620 | } |
| 1621 | // Leaf name: commute_constant_to_rhs |
| 1622 | // Rule: commute_constant_to_rhs |
| 1623 | if (!RuleConfig->isRuleDisabled(111)) { |
| 1624 | if (1 |
| 1625 | && [&]() { |
| 1626 | |
| 1627 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
| 1628 | |
| 1629 | return true; |
| 1630 | }() ) { |
| 1631 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
| 1632 | |
| 1633 | Observer.changingInstr(*MIs[0]); |
| 1634 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
| 1635 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
| 1636 | MIs[0]->getOperand(1).setReg(RHSReg); |
| 1637 | MIs[0]->getOperand(2).setReg(LHSReg); |
| 1638 | Observer.changedInstr(*MIs[0]); |
| 1639 | |
| 1640 | return true; |
| 1641 | } |
| 1642 | } |
| 1643 | return false; |
| 1644 | } |
| 1645 | if (Partition == 13 /* TargetOpcode::G_STORE */) { |
| 1646 | // Leaf name: combine_indexed_load_store |
| 1647 | // Rule: combine_indexed_load_store |
| 1648 | if (!RuleConfig->isRuleDisabled(10)) { |
| 1649 | if (1 |
| 1650 | && [&]() { |
| 1651 | return Helper.matchCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1652 | return true; |
| 1653 | }() ) { |
| 1654 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_indexed_load_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_indexed_load_store'\n" ; } } while (false); |
| 1655 | Helper.applyCombineIndexedLoadStore(*MIs[0], MatchData10); |
| 1656 | return true; |
| 1657 | } |
| 1658 | } |
| 1659 | // Leaf name: erase_undef_store |
| 1660 | // Rule: erase_undef_store |
| 1661 | if (!RuleConfig->isRuleDisabled(20)) { |
| 1662 | if (1 |
| 1663 | && [&]() { |
| 1664 | return Helper.matchUndefStore(*MIs[0]); |
| 1665 | return true; |
| 1666 | }() ) { |
| 1667 | LLVM_DEBUG(dbgs() << "Applying rule 'erase_undef_store'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'erase_undef_store'\n" ; } } while (false); |
| 1668 | return Helper.eraseInst(*MIs[0]); |
| 1669 | return true; |
| 1670 | } |
| 1671 | } |
| 1672 | return false; |
| 1673 | } |
| 1674 | if (Partition == 14 /* TargetOpcode::G_UITOFP */) { |
| 1675 | // Leaf name: undef_to_fp_zero |
| 1676 | // Rule: undef_to_fp_zero |
| 1677 | if (!RuleConfig->isRuleDisabled(11)) { |
| 1678 | if (1 |
| 1679 | && [&]() { |
| 1680 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1681 | return true; |
| 1682 | }() ) { |
| 1683 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n" ; } } while (false); |
| 1684 | Helper.replaceInstWithFConstant(*MIs[0], 0.0); |
| 1685 | return true; |
| 1686 | } |
| 1687 | } |
| 1688 | return false; |
| 1689 | } |
| 1690 | if (Partition == 15 /* TargetOpcode::G_SITOFP */) { |
| 1691 | // Leaf name: undef_to_fp_zero |
| 1692 | // Rule: undef_to_fp_zero |
| 1693 | if (!RuleConfig->isRuleDisabled(11)) { |
| 1694 | if (1 |
| 1695 | && [&]() { |
| 1696 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1697 | return true; |
| 1698 | }() ) { |
| 1699 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_fp_zero'\n" ; } } while (false); |
| 1700 | Helper.replaceInstWithFConstant(*MIs[0], 0.0); |
| 1701 | return true; |
| 1702 | } |
| 1703 | } |
| 1704 | return false; |
| 1705 | } |
| 1706 | if (Partition == 16 /* TargetOpcode::G_OR */) { |
| 1707 | // Leaf name: undef_to_negative_one |
| 1708 | // Rule: undef_to_negative_one |
| 1709 | if (!RuleConfig->isRuleDisabled(13)) { |
| 1710 | if (1 |
| 1711 | && [&]() { |
| 1712 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 1713 | return true; |
| 1714 | }() ) { |
| 1715 | LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_negative_one'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'undef_to_negative_one'\n" ; } } while (false); |
| 1716 | Helper.replaceInstWithConstant(*MIs[0], -1); |
| 1717 | return true; |
| 1718 | } |
| 1719 | } |
| 1720 | // Leaf name: right_identity_zero |
| 1721 | // Rule: right_identity_zero |
| 1722 | if (!RuleConfig->isRuleDisabled(24)) { |
| 1723 | if (1 |
| 1724 | && [&]() { |
| 1725 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 1726 | return true; |
| 1727 | }() ) { |
| 1728 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 1729 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1730 | return true; |
| 1731 | } |
| 1732 | } |
| 1733 | // Leaf name: binop_same_val |
| 1734 | // Rule: binop_same_val |
| 1735 | if (!RuleConfig->isRuleDisabled(25)) { |
| 1736 | if (1 |
| 1737 | && [&]() { |
| 1738 | return Helper.matchBinOpSameVal(*MIs[0]); |
| 1739 | return true; |
| 1740 | }() ) { |
| 1741 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_same_val'\n" ; } } while (false); |
| 1742 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1743 | return true; |
| 1744 | } |
| 1745 | } |
| 1746 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
| 1747 | // Rule: hoist_logic_op_with_same_opcode_hands |
| 1748 | if (!RuleConfig->isRuleDisabled(41)) { |
| 1749 | if (1 |
| 1750 | && [&]() { |
| 1751 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData41); |
| 1752 | return true; |
| 1753 | }() ) { |
| 1754 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
| 1755 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData41); |
| 1756 | return true; |
| 1757 | } |
| 1758 | } |
| 1759 | // Leaf name: redundant_or |
| 1760 | // Rule: redundant_or |
| 1761 | if (!RuleConfig->isRuleDisabled(54)) { |
| 1762 | if (1 |
| 1763 | && [&]() { |
| 1764 | return Helper.matchRedundantOr(*MIs[0], MatchData54); |
| 1765 | return true; |
| 1766 | }() ) { |
| 1767 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_or'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_or'\n" ; } } while (false); |
| 1768 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData54); |
| 1769 | return true; |
| 1770 | } |
| 1771 | } |
| 1772 | // Leaf name: load_or_combine |
| 1773 | // Rule: load_or_combine |
| 1774 | if (!RuleConfig->isRuleDisabled(82)) { |
| 1775 | if (1 |
| 1776 | && [&]() { |
| 1777 | return Helper.matchLoadOrCombine(*MIs[0], MatchData82); |
| 1778 | return true; |
| 1779 | }() ) { |
| 1780 | LLVM_DEBUG(dbgs() << "Applying rule 'load_or_combine'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'load_or_combine'\n" ; } } while (false); |
| 1781 | Helper.applyBuildFn(*MIs[0], MatchData82); |
| 1782 | return true; |
| 1783 | } |
| 1784 | } |
| 1785 | // Leaf name: funnel_shift_from_or_shift |
| 1786 | // Rule: funnel_shift_from_or_shift |
| 1787 | if (!RuleConfig->isRuleDisabled(84)) { |
| 1788 | if (1 |
| 1789 | && [&]() { |
| 1790 | return Helper.matchOrShiftToFunnelShift(*MIs[0], MatchData84); |
| 1791 | return true; |
| 1792 | }() ) { |
| 1793 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_from_or_shift'\n" ; } } while (false); |
| 1794 | Helper.applyBuildFn(*MIs[0], MatchData84); |
| 1795 | return true; |
| 1796 | } |
| 1797 | } |
| 1798 | // Leaf name: constant_fold |
| 1799 | // Rule: constant_fold |
| 1800 | if (!RuleConfig->isRuleDisabled(91)) { |
| 1801 | if (1 |
| 1802 | && [&]() { |
| 1803 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
| 1804 | return true; |
| 1805 | }() ) { |
| 1806 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 1807 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
| 1808 | return true; |
| 1809 | } |
| 1810 | } |
| 1811 | // Leaf name: fold_binop_into_select |
| 1812 | // Rule: fold_binop_into_select |
| 1813 | if (!RuleConfig->isRuleDisabled(106)) { |
| 1814 | if (1 |
| 1815 | && [&]() { |
| 1816 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 1817 | return true; |
| 1818 | }() ) { |
| 1819 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 1820 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 1821 | return true; |
| 1822 | } |
| 1823 | } |
| 1824 | // Leaf name: commute_constant_to_rhs |
| 1825 | // Rule: commute_constant_to_rhs |
| 1826 | if (!RuleConfig->isRuleDisabled(111)) { |
| 1827 | if (1 |
| 1828 | && [&]() { |
| 1829 | |
| 1830 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
| 1831 | |
| 1832 | return true; |
| 1833 | }() ) { |
| 1834 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
| 1835 | |
| 1836 | Observer.changingInstr(*MIs[0]); |
| 1837 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
| 1838 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
| 1839 | MIs[0]->getOperand(1).setReg(RHSReg); |
| 1840 | MIs[0]->getOperand(2).setReg(LHSReg); |
| 1841 | Observer.changedInstr(*MIs[0]); |
| 1842 | |
| 1843 | return true; |
| 1844 | } |
| 1845 | } |
| 1846 | return false; |
| 1847 | } |
| 1848 | if (Partition == 17 /* TargetOpcode::G_SHL */) { |
| 1849 | // Leaf name: binop_left_undef_to_zero |
| 1850 | // Rule: binop_left_undef_to_zero |
| 1851 | if (!RuleConfig->isRuleDisabled(14)) { |
| 1852 | if (1 |
| 1853 | && [&]() { |
| 1854 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
| 1855 | return true; |
| 1856 | }() ) { |
| 1857 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
| 1858 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 1859 | return true; |
| 1860 | } |
| 1861 | } |
| 1862 | // Leaf name: binop_right_undef_to_undef |
| 1863 | // Rule: binop_right_undef_to_undef |
| 1864 | if (!RuleConfig->isRuleDisabled(15)) { |
| 1865 | if (1 |
| 1866 | && [&]() { |
| 1867 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
| 1868 | return true; |
| 1869 | }() ) { |
| 1870 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
| 1871 | Helper.replaceInstWithUndef(*MIs[0]); |
| 1872 | return true; |
| 1873 | } |
| 1874 | } |
| 1875 | // Leaf name: right_identity_zero |
| 1876 | // Rule: right_identity_zero |
| 1877 | if (!RuleConfig->isRuleDisabled(24)) { |
| 1878 | if (1 |
| 1879 | && [&]() { |
| 1880 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 1881 | return true; |
| 1882 | }() ) { |
| 1883 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 1884 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1885 | return true; |
| 1886 | } |
| 1887 | } |
| 1888 | // Leaf name: shifts_too_big |
| 1889 | // Rule: shifts_too_big |
| 1890 | if (!RuleConfig->isRuleDisabled(42)) { |
| 1891 | if (1 |
| 1892 | && [&]() { |
| 1893 | return Helper.matchShiftsTooBig(*MIs[0]); |
| 1894 | return true; |
| 1895 | }() ) { |
| 1896 | LLVM_DEBUG(dbgs() << "Applying rule 'shifts_too_big'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shifts_too_big'\n" ; } } while (false); |
| 1897 | Helper.replaceInstWithUndef(*MIs[0]); |
| 1898 | return true; |
| 1899 | } |
| 1900 | } |
| 1901 | // Leaf name: reduce_shl_of_extend |
| 1902 | // Rule: reduce_shl_of_extend |
| 1903 | if (!RuleConfig->isRuleDisabled(47)) { |
| 1904 | if (1 |
| 1905 | && [&]() { |
| 1906 | return Helper.matchCombineShlOfExtend(*MIs[0], MatchData47); |
| 1907 | return true; |
| 1908 | }() ) { |
| 1909 | LLVM_DEBUG(dbgs() << "Applying rule 'reduce_shl_of_extend'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'reduce_shl_of_extend'\n" ; } } while (false); |
| 1910 | Helper.applyCombineShlOfExtend(*MIs[0], MatchData47); |
| 1911 | return true; |
| 1912 | } |
| 1913 | } |
| 1914 | // Leaf name: shift_immed_chain |
| 1915 | // Rule: shift_immed_chain |
| 1916 | if (!RuleConfig->isRuleDisabled(80)) { |
| 1917 | if (1 |
| 1918 | && [&]() { |
| 1919 | return Helper.matchShiftImmedChain(*MIs[0], MatchData80); |
| 1920 | return true; |
| 1921 | }() ) { |
| 1922 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
| 1923 | Helper.applyShiftImmedChain(*MIs[0], MatchData80); |
| 1924 | return true; |
| 1925 | } |
| 1926 | } |
| 1927 | // Leaf name: shift_of_shifted_logic_chain |
| 1928 | // Rule: shift_of_shifted_logic_chain |
| 1929 | if (!RuleConfig->isRuleDisabled(81)) { |
| 1930 | if (1 |
| 1931 | && [&]() { |
| 1932 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81); |
| 1933 | return true; |
| 1934 | }() ) { |
| 1935 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
| 1936 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81); |
| 1937 | return true; |
| 1938 | } |
| 1939 | } |
| 1940 | // Leaf name: commute_shift |
| 1941 | // Rule: commute_shift |
| 1942 | if (!RuleConfig->isRuleDisabled(86)) { |
| 1943 | if (1 |
| 1944 | && [&]() { |
| 1945 | return Helper.matchCommuteShift(*MIs[0], MatchData86); |
| 1946 | return true; |
| 1947 | }() ) { |
| 1948 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_shift'\n" ; } } while (false); |
| 1949 | Helper.applyBuildFn(*MIs[0], MatchData86); |
| 1950 | return true; |
| 1951 | } |
| 1952 | } |
| 1953 | // Leaf name: fold_binop_into_select |
| 1954 | // Rule: fold_binop_into_select |
| 1955 | if (!RuleConfig->isRuleDisabled(106)) { |
| 1956 | if (1 |
| 1957 | && [&]() { |
| 1958 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 1959 | return true; |
| 1960 | }() ) { |
| 1961 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 1962 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 1963 | return true; |
| 1964 | } |
| 1965 | } |
| 1966 | return false; |
| 1967 | } |
| 1968 | if (Partition == 18 /* TargetOpcode::G_UDIV */) { |
| 1969 | // Leaf name: binop_left_undef_to_zero |
| 1970 | // Rule: binop_left_undef_to_zero |
| 1971 | if (!RuleConfig->isRuleDisabled(14)) { |
| 1972 | if (1 |
| 1973 | && [&]() { |
| 1974 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
| 1975 | return true; |
| 1976 | }() ) { |
| 1977 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
| 1978 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 1979 | return true; |
| 1980 | } |
| 1981 | } |
| 1982 | // Leaf name: binop_left_to_zero |
| 1983 | // Rule: binop_left_to_zero |
| 1984 | if (!RuleConfig->isRuleDisabled(26)) { |
| 1985 | if (1 |
| 1986 | && [&]() { |
| 1987 | return Helper.matchOperandIsZero(*MIs[0], 1); |
| 1988 | return true; |
| 1989 | }() ) { |
| 1990 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
| 1991 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 1992 | return true; |
| 1993 | } |
| 1994 | } |
| 1995 | // Leaf name: div_rem_to_divrem |
| 1996 | // Rule: div_rem_to_divrem |
| 1997 | if (!RuleConfig->isRuleDisabled(83)) { |
| 1998 | if (1 |
| 1999 | && [&]() { |
| 2000 | return Helper.matchCombineDivRem(*MIs[0], MatchData83); |
| 2001 | return true; |
| 2002 | }() ) { |
| 2003 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
| 2004 | Helper.applyCombineDivRem(*MIs[0], MatchData83); |
| 2005 | return true; |
| 2006 | } |
| 2007 | } |
| 2008 | // Leaf name: udiv_by_const |
| 2009 | // Rule: udiv_by_const |
| 2010 | if (!RuleConfig->isRuleDisabled(93)) { |
| 2011 | if (1 |
| 2012 | && [&]() { |
| 2013 | return Helper.matchUDivByConst(*MIs[0]); |
| 2014 | return true; |
| 2015 | }() ) { |
| 2016 | LLVM_DEBUG(dbgs() << "Applying rule 'udiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'udiv_by_const'\n" ; } } while (false); |
| 2017 | Helper.applyUDivByConst(*MIs[0]); |
| 2018 | return true; |
| 2019 | } |
| 2020 | } |
| 2021 | // Leaf name: fold_binop_into_select |
| 2022 | // Rule: fold_binop_into_select |
| 2023 | if (!RuleConfig->isRuleDisabled(106)) { |
| 2024 | if (1 |
| 2025 | && [&]() { |
| 2026 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2027 | return true; |
| 2028 | }() ) { |
| 2029 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2030 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2031 | return true; |
| 2032 | } |
| 2033 | } |
| 2034 | return false; |
| 2035 | } |
| 2036 | if (Partition == 19 /* TargetOpcode::G_UREM */) { |
| 2037 | // Leaf name: binop_left_undef_to_zero |
| 2038 | // Rule: binop_left_undef_to_zero |
| 2039 | if (!RuleConfig->isRuleDisabled(14)) { |
| 2040 | if (1 |
| 2041 | && [&]() { |
| 2042 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
| 2043 | return true; |
| 2044 | }() ) { |
| 2045 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_undef_to_zero'\n" ; } } while (false); |
| 2046 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 2047 | return true; |
| 2048 | } |
| 2049 | } |
| 2050 | // Leaf name: binop_left_to_zero |
| 2051 | // Rule: binop_left_to_zero |
| 2052 | if (!RuleConfig->isRuleDisabled(26)) { |
| 2053 | if (1 |
| 2054 | && [&]() { |
| 2055 | return Helper.matchOperandIsZero(*MIs[0], 1); |
| 2056 | return true; |
| 2057 | }() ) { |
| 2058 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
| 2059 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2060 | return true; |
| 2061 | } |
| 2062 | } |
| 2063 | // Leaf name: urem_pow2_to_mask |
| 2064 | // Rule: urem_pow2_to_mask |
| 2065 | if (!RuleConfig->isRuleDisabled(55)) { |
| 2066 | if (1 |
| 2067 | && [&]() { |
| 2068 | return Helper.matchOperandIsKnownToBeAPowerOfTwo(*MIs[0], 2); |
| 2069 | return true; |
| 2070 | }() ) { |
| 2071 | LLVM_DEBUG(dbgs() << "Applying rule 'urem_pow2_to_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'urem_pow2_to_mask'\n" ; } } while (false); |
| 2072 | Helper.applySimplifyURemByPow2(*MIs[0]); |
| 2073 | return true; |
| 2074 | } |
| 2075 | } |
| 2076 | // Leaf name: div_rem_to_divrem |
| 2077 | // Rule: div_rem_to_divrem |
| 2078 | if (!RuleConfig->isRuleDisabled(83)) { |
| 2079 | if (1 |
| 2080 | && [&]() { |
| 2081 | return Helper.matchCombineDivRem(*MIs[0], MatchData83); |
| 2082 | return true; |
| 2083 | }() ) { |
| 2084 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
| 2085 | Helper.applyCombineDivRem(*MIs[0], MatchData83); |
| 2086 | return true; |
| 2087 | } |
| 2088 | } |
| 2089 | // Leaf name: fold_binop_into_select |
| 2090 | // Rule: fold_binop_into_select |
| 2091 | if (!RuleConfig->isRuleDisabled(106)) { |
| 2092 | if (1 |
| 2093 | && [&]() { |
| 2094 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2095 | return true; |
| 2096 | }() ) { |
| 2097 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2098 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2099 | return true; |
| 2100 | } |
| 2101 | } |
| 2102 | return false; |
| 2103 | } |
| 2104 | if (Partition == 20 /* TargetOpcode::G_ASHR */) { |
| 2105 | // Leaf name: binop_right_undef_to_undef |
| 2106 | // Rule: binop_right_undef_to_undef |
| 2107 | if (!RuleConfig->isRuleDisabled(15)) { |
| 2108 | if (1 |
| 2109 | && [&]() { |
| 2110 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
| 2111 | return true; |
| 2112 | }() ) { |
| 2113 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
| 2114 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2115 | return true; |
| 2116 | } |
| 2117 | } |
| 2118 | // Leaf name: right_identity_zero |
| 2119 | // Rule: right_identity_zero |
| 2120 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2121 | if (1 |
| 2122 | && [&]() { |
| 2123 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2124 | return true; |
| 2125 | }() ) { |
| 2126 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2127 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2128 | return true; |
| 2129 | } |
| 2130 | } |
| 2131 | // Leaf name: shifts_too_big |
| 2132 | // Rule: shifts_too_big |
| 2133 | if (!RuleConfig->isRuleDisabled(42)) { |
| 2134 | if (1 |
| 2135 | && [&]() { |
| 2136 | return Helper.matchShiftsTooBig(*MIs[0]); |
| 2137 | return true; |
| 2138 | }() ) { |
| 2139 | LLVM_DEBUG(dbgs() << "Applying rule 'shifts_too_big'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shifts_too_big'\n" ; } } while (false); |
| 2140 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2141 | return true; |
| 2142 | } |
| 2143 | } |
| 2144 | // Leaf name: shl_ashr_to_sext_inreg |
| 2145 | // Rule: shl_ashr_to_sext_inreg |
| 2146 | if (!RuleConfig->isRuleDisabled(45)) { |
| 2147 | if (1 |
| 2148 | && [&]() { |
| 2149 | return Helper.matchAshrShlToSextInreg(*MIs[0], MatchData45); |
| 2150 | return true; |
| 2151 | }() ) { |
| 2152 | LLVM_DEBUG(dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shl_ashr_to_sext_inreg'\n" ; } } while (false); |
| 2153 | Helper.applyAshShlToSextInreg(*MIs[0], MatchData45); |
| 2154 | return true; |
| 2155 | } |
| 2156 | } |
| 2157 | // Leaf name: shift_immed_chain |
| 2158 | // Rule: shift_immed_chain |
| 2159 | if (!RuleConfig->isRuleDisabled(80)) { |
| 2160 | if (1 |
| 2161 | && [&]() { |
| 2162 | return Helper.matchShiftImmedChain(*MIs[0], MatchData80); |
| 2163 | return true; |
| 2164 | }() ) { |
| 2165 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
| 2166 | Helper.applyShiftImmedChain(*MIs[0], MatchData80); |
| 2167 | return true; |
| 2168 | } |
| 2169 | } |
| 2170 | // Leaf name: shift_of_shifted_logic_chain |
| 2171 | // Rule: shift_of_shifted_logic_chain |
| 2172 | if (!RuleConfig->isRuleDisabled(81)) { |
| 2173 | if (1 |
| 2174 | && [&]() { |
| 2175 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81); |
| 2176 | return true; |
| 2177 | }() ) { |
| 2178 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
| 2179 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81); |
| 2180 | return true; |
| 2181 | } |
| 2182 | } |
| 2183 | // Leaf name: bitfield_extract_from_shr |
| 2184 | // Rule: bitfield_extract_from_shr |
| 2185 | if (!RuleConfig->isRuleDisabled(89)) { |
| 2186 | if (1 |
| 2187 | && [&]() { |
| 2188 | return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData89); |
| 2189 | return true; |
| 2190 | }() ) { |
| 2191 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n" ; } } while (false); |
| 2192 | Helper.applyBuildFn(*MIs[0], MatchData89); |
| 2193 | return true; |
| 2194 | } |
| 2195 | } |
| 2196 | // Leaf name: bitfield_extract_from_shr_and |
| 2197 | // Rule: bitfield_extract_from_shr_and |
| 2198 | if (!RuleConfig->isRuleDisabled(90)) { |
| 2199 | if (1 |
| 2200 | && [&]() { |
| 2201 | return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData90); |
| 2202 | return true; |
| 2203 | }() ) { |
| 2204 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n" ; } } while (false); |
| 2205 | Helper.applyBuildFn(*MIs[0], MatchData90); |
| 2206 | return true; |
| 2207 | } |
| 2208 | } |
| 2209 | // Leaf name: fold_binop_into_select |
| 2210 | // Rule: fold_binop_into_select |
| 2211 | if (!RuleConfig->isRuleDisabled(106)) { |
| 2212 | if (1 |
| 2213 | && [&]() { |
| 2214 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2215 | return true; |
| 2216 | }() ) { |
| 2217 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2218 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2219 | return true; |
| 2220 | } |
| 2221 | } |
| 2222 | return false; |
| 2223 | } |
| 2224 | if (Partition == 21 /* TargetOpcode::G_LSHR */) { |
| 2225 | // Leaf name: binop_right_undef_to_undef |
| 2226 | // Rule: binop_right_undef_to_undef |
| 2227 | if (!RuleConfig->isRuleDisabled(15)) { |
| 2228 | if (1 |
| 2229 | && [&]() { |
| 2230 | return Helper.matchOperandIsUndef(*MIs[0], 2); |
| 2231 | return true; |
| 2232 | }() ) { |
| 2233 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_right_undef_to_undef'\n" ; } } while (false); |
| 2234 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2235 | return true; |
| 2236 | } |
| 2237 | } |
| 2238 | // Leaf name: right_identity_zero |
| 2239 | // Rule: right_identity_zero |
| 2240 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2241 | if (1 |
| 2242 | && [&]() { |
| 2243 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2244 | return true; |
| 2245 | }() ) { |
| 2246 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2247 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2248 | return true; |
| 2249 | } |
| 2250 | } |
| 2251 | // Leaf name: shifts_too_big |
| 2252 | // Rule: shifts_too_big |
| 2253 | if (!RuleConfig->isRuleDisabled(42)) { |
| 2254 | if (1 |
| 2255 | && [&]() { |
| 2256 | return Helper.matchShiftsTooBig(*MIs[0]); |
| 2257 | return true; |
| 2258 | }() ) { |
| 2259 | LLVM_DEBUG(dbgs() << "Applying rule 'shifts_too_big'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shifts_too_big'\n" ; } } while (false); |
| 2260 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2261 | return true; |
| 2262 | } |
| 2263 | } |
| 2264 | // Leaf name: shift_immed_chain |
| 2265 | // Rule: shift_immed_chain |
| 2266 | if (!RuleConfig->isRuleDisabled(80)) { |
| 2267 | if (1 |
| 2268 | && [&]() { |
| 2269 | return Helper.matchShiftImmedChain(*MIs[0], MatchData80); |
| 2270 | return true; |
| 2271 | }() ) { |
| 2272 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
| 2273 | Helper.applyShiftImmedChain(*MIs[0], MatchData80); |
| 2274 | return true; |
| 2275 | } |
| 2276 | } |
| 2277 | // Leaf name: shift_of_shifted_logic_chain |
| 2278 | // Rule: shift_of_shifted_logic_chain |
| 2279 | if (!RuleConfig->isRuleDisabled(81)) { |
| 2280 | if (1 |
| 2281 | && [&]() { |
| 2282 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81); |
| 2283 | return true; |
| 2284 | }() ) { |
| 2285 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
| 2286 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81); |
| 2287 | return true; |
| 2288 | } |
| 2289 | } |
| 2290 | // Leaf name: bitfield_extract_from_shr |
| 2291 | // Rule: bitfield_extract_from_shr |
| 2292 | if (!RuleConfig->isRuleDisabled(89)) { |
| 2293 | if (1 |
| 2294 | && [&]() { |
| 2295 | return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData89); |
| 2296 | return true; |
| 2297 | }() ) { |
| 2298 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr'\n" ; } } while (false); |
| 2299 | Helper.applyBuildFn(*MIs[0], MatchData89); |
| 2300 | return true; |
| 2301 | } |
| 2302 | } |
| 2303 | // Leaf name: bitfield_extract_from_shr_and |
| 2304 | // Rule: bitfield_extract_from_shr_and |
| 2305 | if (!RuleConfig->isRuleDisabled(90)) { |
| 2306 | if (1 |
| 2307 | && [&]() { |
| 2308 | return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData90); |
| 2309 | return true; |
| 2310 | }() ) { |
| 2311 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n" ; } } while (false); |
| 2312 | Helper.applyBuildFn(*MIs[0], MatchData90); |
| 2313 | return true; |
| 2314 | } |
| 2315 | } |
| 2316 | // Leaf name: fold_binop_into_select |
| 2317 | // Rule: fold_binop_into_select |
| 2318 | if (!RuleConfig->isRuleDisabled(106)) { |
| 2319 | if (1 |
| 2320 | && [&]() { |
| 2321 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2322 | return true; |
| 2323 | }() ) { |
| 2324 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2325 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2326 | return true; |
| 2327 | } |
| 2328 | } |
| 2329 | return false; |
| 2330 | } |
| 2331 | if (Partition == 22 /* TargetOpcode::G_ABS */) { |
| 2332 | // Leaf name: unary_undef_to_zero |
| 2333 | // Rule: unary_undef_to_zero |
| 2334 | if (!RuleConfig->isRuleDisabled(16)) { |
| 2335 | if (1 |
| 2336 | && [&]() { |
| 2337 | return Helper.matchOperandIsUndef(*MIs[0], 1); |
| 2338 | return true; |
| 2339 | }() ) { |
| 2340 | LLVM_DEBUG(dbgs() << "Applying rule 'unary_undef_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unary_undef_to_zero'\n" ; } } while (false); |
| 2341 | Helper.replaceInstWithConstant(*MIs[0], 0); |
| 2342 | return true; |
| 2343 | } |
| 2344 | } |
| 2345 | return false; |
| 2346 | } |
| 2347 | if (Partition == 23 /* TargetOpcode::G_FPTOSI */) { |
| 2348 | // Leaf name: propagate_undef_any_op |
| 2349 | // Rule: propagate_undef_any_op |
| 2350 | if (!RuleConfig->isRuleDisabled(17)) { |
| 2351 | if (1 |
| 2352 | && [&]() { |
| 2353 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 2354 | return true; |
| 2355 | }() ) { |
| 2356 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 2357 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2358 | return true; |
| 2359 | } |
| 2360 | } |
| 2361 | return false; |
| 2362 | } |
| 2363 | if (Partition == 24 /* TargetOpcode::G_FPTOUI */) { |
| 2364 | // Leaf name: propagate_undef_any_op |
| 2365 | // Rule: propagate_undef_any_op |
| 2366 | if (!RuleConfig->isRuleDisabled(17)) { |
| 2367 | if (1 |
| 2368 | && [&]() { |
| 2369 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 2370 | return true; |
| 2371 | }() ) { |
| 2372 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 2373 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2374 | return true; |
| 2375 | } |
| 2376 | } |
| 2377 | return false; |
| 2378 | } |
| 2379 | if (Partition == 25 /* TargetOpcode::G_SUB */) { |
| 2380 | // Leaf name: propagate_undef_any_op |
| 2381 | // Rule: propagate_undef_any_op |
| 2382 | if (!RuleConfig->isRuleDisabled(17)) { |
| 2383 | if (1 |
| 2384 | && [&]() { |
| 2385 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 2386 | return true; |
| 2387 | }() ) { |
| 2388 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 2389 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2390 | return true; |
| 2391 | } |
| 2392 | } |
| 2393 | // Leaf name: right_identity_zero |
| 2394 | // Rule: right_identity_zero |
| 2395 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2396 | if (1 |
| 2397 | && [&]() { |
| 2398 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2399 | return true; |
| 2400 | }() ) { |
| 2401 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2402 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2403 | return true; |
| 2404 | } |
| 2405 | } |
| 2406 | // Leaf name: constant_fold |
| 2407 | // Rule: constant_fold |
| 2408 | if (!RuleConfig->isRuleDisabled(91)) { |
| 2409 | if (1 |
| 2410 | && [&]() { |
| 2411 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
| 2412 | return true; |
| 2413 | }() ) { |
| 2414 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 2415 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
| 2416 | return true; |
| 2417 | } |
| 2418 | } |
| 2419 | // Leaf name: fold_binop_into_select |
| 2420 | // Rule: fold_binop_into_select |
| 2421 | if (!RuleConfig->isRuleDisabled(106)) { |
| 2422 | if (1 |
| 2423 | && [&]() { |
| 2424 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2425 | return true; |
| 2426 | }() ) { |
| 2427 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2428 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2429 | return true; |
| 2430 | } |
| 2431 | } |
| 2432 | // Leaf name: sub_add_reg |
| 2433 | // Rule: sub_add_reg |
| 2434 | if (!RuleConfig->isRuleDisabled(107)) { |
| 2435 | if (1 |
| 2436 | && [&]() { |
| 2437 | return Helper.matchSubAddSameReg(*MIs[0], MatchData107); |
| 2438 | return true; |
| 2439 | }() ) { |
| 2440 | LLVM_DEBUG(dbgs() << "Applying rule 'sub_add_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'sub_add_reg'\n" ; } } while (false); |
| 2441 | Helper.applyBuildFn(*MIs[0], MatchData107); |
| 2442 | return true; |
| 2443 | } |
| 2444 | } |
| 2445 | return false; |
| 2446 | } |
| 2447 | if (Partition == 26 /* TargetOpcode::G_XOR */) { |
| 2448 | // Leaf name: propagate_undef_any_op |
| 2449 | // Rule: propagate_undef_any_op |
| 2450 | if (!RuleConfig->isRuleDisabled(17)) { |
| 2451 | if (1 |
| 2452 | && [&]() { |
| 2453 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 2454 | return true; |
| 2455 | }() ) { |
| 2456 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 2457 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2458 | return true; |
| 2459 | } |
| 2460 | } |
| 2461 | // Leaf name: right_identity_zero |
| 2462 | // Rule: right_identity_zero |
| 2463 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2464 | if (1 |
| 2465 | && [&]() { |
| 2466 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2467 | return true; |
| 2468 | }() ) { |
| 2469 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2470 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2471 | return true; |
| 2472 | } |
| 2473 | } |
| 2474 | // Leaf name: hoist_logic_op_with_same_opcode_hands |
| 2475 | // Rule: hoist_logic_op_with_same_opcode_hands |
| 2476 | if (!RuleConfig->isRuleDisabled(41)) { |
| 2477 | if (1 |
| 2478 | && [&]() { |
| 2479 | return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData41); |
| 2480 | return true; |
| 2481 | }() ) { |
| 2482 | LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n" ; } } while (false); |
| 2483 | Helper.applyBuildInstructionSteps(*MIs[0], MatchData41); |
| 2484 | return true; |
| 2485 | } |
| 2486 | } |
| 2487 | // Leaf name: not_cmp_fold |
| 2488 | // Rule: not_cmp_fold |
| 2489 | if (!RuleConfig->isRuleDisabled(61)) { |
| 2490 | if (1 |
| 2491 | && [&]() { |
| 2492 | return Helper.matchNotCmp(*MIs[0], MatchData61); |
| 2493 | return true; |
| 2494 | }() ) { |
| 2495 | LLVM_DEBUG(dbgs() << "Applying rule 'not_cmp_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'not_cmp_fold'\n" ; } } while (false); |
| 2496 | Helper.applyNotCmp(*MIs[0], MatchData61); |
| 2497 | return true; |
| 2498 | } |
| 2499 | } |
| 2500 | // Leaf name: xor_of_and_with_same_reg |
| 2501 | // Rule: xor_of_and_with_same_reg |
| 2502 | if (!RuleConfig->isRuleDisabled(78)) { |
| 2503 | if (1 |
| 2504 | && [&]() { |
| 2505 | return Helper.matchXorOfAndWithSameReg(*MIs[0], MatchData78); |
| 2506 | return true; |
| 2507 | }() ) { |
| 2508 | LLVM_DEBUG(dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n" ; } } while (false); |
| 2509 | Helper.applyXorOfAndWithSameReg(*MIs[0], MatchData78); |
| 2510 | return true; |
| 2511 | } |
| 2512 | } |
| 2513 | // Leaf name: constant_fold |
| 2514 | // Rule: constant_fold |
| 2515 | if (!RuleConfig->isRuleDisabled(91)) { |
| 2516 | if (1 |
| 2517 | && [&]() { |
| 2518 | return Helper.matchConstantFold(*MIs[0], MatchData91); |
| 2519 | return true; |
| 2520 | }() ) { |
| 2521 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fold'\n" ; } } while (false); |
| 2522 | Helper.replaceInstWithConstant(*MIs[0], MatchData91); |
| 2523 | return true; |
| 2524 | } |
| 2525 | } |
| 2526 | // Leaf name: fold_binop_into_select |
| 2527 | // Rule: fold_binop_into_select |
| 2528 | if (!RuleConfig->isRuleDisabled(106)) { |
| 2529 | if (1 |
| 2530 | && [&]() { |
| 2531 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2532 | return true; |
| 2533 | }() ) { |
| 2534 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2535 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2536 | return true; |
| 2537 | } |
| 2538 | } |
| 2539 | // Leaf name: commute_constant_to_rhs |
| 2540 | // Rule: commute_constant_to_rhs |
| 2541 | if (!RuleConfig->isRuleDisabled(111)) { |
| 2542 | if (1 |
| 2543 | && [&]() { |
| 2544 | |
| 2545 | return getIConstantVRegVal(MIs[0]->getOperand(1).getReg(), MRI).has_value(); |
| 2546 | |
| 2547 | return true; |
| 2548 | }() ) { |
| 2549 | LLVM_DEBUG(dbgs() << "Applying rule 'commute_constant_to_rhs'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'commute_constant_to_rhs'\n" ; } } while (false); |
| 2550 | |
| 2551 | Observer.changingInstr(*MIs[0]); |
| 2552 | Register LHSReg = MIs[0]->getOperand(1).getReg(); |
| 2553 | Register RHSReg = MIs[0]->getOperand(2).getReg(); |
| 2554 | MIs[0]->getOperand(1).setReg(RHSReg); |
| 2555 | MIs[0]->getOperand(2).setReg(LHSReg); |
| 2556 | Observer.changedInstr(*MIs[0]); |
| 2557 | |
| 2558 | return true; |
| 2559 | } |
| 2560 | } |
| 2561 | return false; |
| 2562 | } |
| 2563 | if (Partition == 27 /* TargetOpcode::G_TRUNC */) { |
| 2564 | // Leaf name: propagate_undef_any_op |
| 2565 | // Rule: propagate_undef_any_op |
| 2566 | if (!RuleConfig->isRuleDisabled(17)) { |
| 2567 | if (1 |
| 2568 | && [&]() { |
| 2569 | return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); |
| 2570 | return true; |
| 2571 | }() ) { |
| 2572 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_any_op'\n" ; } } while (false); |
| 2573 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2574 | return true; |
| 2575 | } |
| 2576 | } |
| 2577 | // Leaf name: trunc_buildvector_fold |
| 2578 | // Rule: trunc_buildvector_fold |
| 2579 | if (!RuleConfig->isRuleDisabled(35)) { |
| 2580 | if (1 |
| 2581 | && [&]() { |
| 2582 | return Helper.matchTruncBuildVectorFold(*MIs[0], MatchData35); |
| 2583 | return true; |
| 2584 | }() ) { |
| 2585 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_buildvector_fold'\n" ; } } while (false); |
| 2586 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData35); |
| 2587 | return true; |
| 2588 | } |
| 2589 | } |
| 2590 | // Leaf name: trunc_lshr_buildvector_fold |
| 2591 | // Rule: trunc_lshr_buildvector_fold |
| 2592 | if (!RuleConfig->isRuleDisabled(36)) { |
| 2593 | if (1 |
| 2594 | && [&]() { |
| 2595 | return Helper.matchTruncLshrBuildVectorFold(*MIs[0], MatchData36); |
| 2596 | return true; |
| 2597 | }() ) { |
| 2598 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n" ; } } while (false); |
| 2599 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData36); |
| 2600 | return true; |
| 2601 | } |
| 2602 | } |
| 2603 | // Leaf name: trunc_ext_fold |
| 2604 | // Rule: trunc_ext_fold |
| 2605 | if (!RuleConfig->isRuleDisabled(68)) { |
| 2606 | if (1 |
| 2607 | && [&]() { |
| 2608 | return Helper.matchCombineTruncOfExt(*MIs[0], MatchData68); |
| 2609 | return true; |
| 2610 | }() ) { |
| 2611 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_ext_fold'\n" ; } } while (false); |
| 2612 | Helper.applyCombineTruncOfExt(*MIs[0], MatchData68); |
| 2613 | return true; |
| 2614 | } |
| 2615 | } |
| 2616 | // Leaf name: trunc_shift |
| 2617 | // Rule: trunc_shift |
| 2618 | if (!RuleConfig->isRuleDisabled(69)) { |
| 2619 | if (1 |
| 2620 | && [&]() { |
| 2621 | return Helper.matchCombineTruncOfShift(*MIs[0], MatchData69); |
| 2622 | return true; |
| 2623 | }() ) { |
| 2624 | LLVM_DEBUG(dbgs() << "Applying rule 'trunc_shift'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'trunc_shift'\n" ; } } while (false); |
| 2625 | Helper.applyCombineTruncOfShift(*MIs[0], MatchData69); |
| 2626 | return true; |
| 2627 | } |
| 2628 | } |
| 2629 | // Leaf name: clamp_i64_to_i16 |
| 2630 | // Rule: clamp_i64_to_i16 |
| 2631 | if (!RuleConfig->isRuleDisabled(112)) { |
| 2632 | if (1 |
| 2633 | && [&]() { |
| 2634 | return PreLegalizerHelper.matchClampI64ToI16(*MIs[0], MRI, *MF, MatchData112); |
| 2635 | return true; |
| 2636 | }() ) { |
| 2637 | LLVM_DEBUG(dbgs() << "Applying rule 'clamp_i64_to_i16'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'clamp_i64_to_i16'\n" ; } } while (false); |
| 2638 | PreLegalizerHelper.applyClampI64ToI16(*MIs[0], MatchData112); |
| 2639 | return true; |
| 2640 | } |
| 2641 | } |
| 2642 | return false; |
| 2643 | } |
| 2644 | if (Partition == 28 /* TargetOpcode::G_SHUFFLE_VECTOR */) { |
| 2645 | // Leaf name: propagate_undef_all_ops |
| 2646 | // Rule: propagate_undef_all_ops |
| 2647 | if (!RuleConfig->isRuleDisabled(18)) { |
| 2648 | if (1 |
| 2649 | && [&]() { |
| 2650 | return Helper.matchAllExplicitUsesAreUndef(*MIs[0]); |
| 2651 | return true; |
| 2652 | }() ) { |
| 2653 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_all_ops'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_all_ops'\n" ; } } while (false); |
| 2654 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2655 | return true; |
| 2656 | } |
| 2657 | } |
| 2658 | // Leaf name: propagate_undef_shuffle_mask |
| 2659 | // Rule: propagate_undef_shuffle_mask |
| 2660 | if (!RuleConfig->isRuleDisabled(19)) { |
| 2661 | if (1 |
| 2662 | && [&]() { |
| 2663 | return Helper.matchUndefShuffleVectorMask(*MIs[0]); |
| 2664 | return true; |
| 2665 | }() ) { |
| 2666 | LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n" ; } } while (false); |
| 2667 | Helper.replaceInstWithUndef(*MIs[0]); |
| 2668 | return true; |
| 2669 | } |
| 2670 | } |
| 2671 | return false; |
| 2672 | } |
| 2673 | if (Partition == 29 /* TargetOpcode::G_UNMERGE_VALUES */) { |
| 2674 | // Leaf name: unmerge_undef |
| 2675 | // Rule: unmerge_undef |
| 2676 | if (!RuleConfig->isRuleDisabled(21)) { |
| 2677 | if (1 |
| 2678 | && [&]() { |
| 2679 | return Helper.matchCombineUnmergeUndef(*MIs[0], MatchData21); |
| 2680 | return true; |
| 2681 | }() ) { |
| 2682 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_undef'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_undef'\n" ; } } while (false); |
| 2683 | Helper.applyBuildFn(*MIs[0], MatchData21); |
| 2684 | return true; |
| 2685 | } |
| 2686 | } |
| 2687 | // Leaf name: unmerge_merge |
| 2688 | // Rule: unmerge_merge |
| 2689 | if (!RuleConfig->isRuleDisabled(63)) { |
| 2690 | if (1 |
| 2691 | && [&]() { |
| 2692 | return Helper.matchCombineUnmergeMergeToPlainValues(*MIs[0], MatchData63); |
| 2693 | return true; |
| 2694 | }() ) { |
| 2695 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_merge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_merge'\n" ; } } while (false); |
| 2696 | Helper.applyCombineUnmergeMergeToPlainValues(*MIs[0], MatchData63); |
| 2697 | return true; |
| 2698 | } |
| 2699 | } |
| 2700 | // Leaf name: unmerge_cst |
| 2701 | // Rule: unmerge_cst |
| 2702 | if (!RuleConfig->isRuleDisabled(64)) { |
| 2703 | if (1 |
| 2704 | && [&]() { |
| 2705 | return Helper.matchCombineUnmergeConstant(*MIs[0], MatchData64); |
| 2706 | return true; |
| 2707 | }() ) { |
| 2708 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_cst'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_cst'\n" ; } } while (false); |
| 2709 | Helper.applyCombineUnmergeConstant(*MIs[0], MatchData64); |
| 2710 | return true; |
| 2711 | } |
| 2712 | } |
| 2713 | // Leaf name: unmerge_dead_to_trunc |
| 2714 | // Rule: unmerge_dead_to_trunc |
| 2715 | if (!RuleConfig->isRuleDisabled(65)) { |
| 2716 | if (1 |
| 2717 | && [&]() { |
| 2718 | return Helper.matchCombineUnmergeWithDeadLanesToTrunc(*MIs[0]); |
| 2719 | return true; |
| 2720 | }() ) { |
| 2721 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_dead_to_trunc'\n" ; } } while (false); |
| 2722 | Helper.applyCombineUnmergeWithDeadLanesToTrunc(*MIs[0]); |
| 2723 | return true; |
| 2724 | } |
| 2725 | } |
| 2726 | // Leaf name: unmerge_zext_to_zext |
| 2727 | // Rule: unmerge_zext_to_zext |
| 2728 | if (!RuleConfig->isRuleDisabled(66)) { |
| 2729 | if (1 |
| 2730 | && [&]() { |
| 2731 | return Helper.matchCombineUnmergeZExtToZExt(*MIs[0]); |
| 2732 | return true; |
| 2733 | }() ) { |
| 2734 | LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_zext_to_zext'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'unmerge_zext_to_zext'\n" ; } } while (false); |
| 2735 | Helper.applyCombineUnmergeZExtToZExt(*MIs[0]); |
| 2736 | return true; |
| 2737 | } |
| 2738 | } |
| 2739 | return false; |
| 2740 | } |
| 2741 | if (Partition == 30 /* TargetOpcode::G_SELECT */) { |
| 2742 | // Leaf name: select_same_val |
| 2743 | // Rule: select_same_val |
| 2744 | if (!RuleConfig->isRuleDisabled(23)) { |
| 2745 | if (1 |
| 2746 | && [&]() { |
| 2747 | return Helper.matchSelectSameVal(*MIs[0]); |
| 2748 | return true; |
| 2749 | }() ) { |
| 2750 | LLVM_DEBUG(dbgs() << "Applying rule 'select_same_val'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_same_val'\n" ; } } while (false); |
| 2751 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
| 2752 | return true; |
| 2753 | } |
| 2754 | } |
| 2755 | // Leaf name: select_undef_cmp |
| 2756 | // Rule: select_undef_cmp |
| 2757 | if (!RuleConfig->isRuleDisabled(49)) { |
| 2758 | if (1 |
| 2759 | && [&]() { |
| 2760 | return Helper.matchUndefSelectCmp(*MIs[0]); |
| 2761 | return true; |
| 2762 | }() ) { |
| 2763 | LLVM_DEBUG(dbgs() << "Applying rule 'select_undef_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_undef_cmp'\n" ; } } while (false); |
| 2764 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); |
| 2765 | return true; |
| 2766 | } |
| 2767 | } |
| 2768 | // Leaf name: select_constant_cmp |
| 2769 | // Rule: select_constant_cmp |
| 2770 | if (!RuleConfig->isRuleDisabled(50)) { |
| 2771 | if (1 |
| 2772 | && [&]() { |
| 2773 | return Helper.matchConstantSelectCmp(*MIs[0], MatchData50); |
| 2774 | return true; |
| 2775 | }() ) { |
| 2776 | LLVM_DEBUG(dbgs() << "Applying rule 'select_constant_cmp'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_constant_cmp'\n" ; } } while (false); |
| 2777 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData50); |
| 2778 | return true; |
| 2779 | } |
| 2780 | } |
| 2781 | // Leaf name: select_to_logical |
| 2782 | // Rule: select_to_logical |
| 2783 | if (!RuleConfig->isRuleDisabled(51)) { |
| 2784 | if (1 |
| 2785 | && [&]() { |
| 2786 | return Helper.matchSelectToLogical(*MIs[0], MatchData51); |
| 2787 | return true; |
| 2788 | }() ) { |
| 2789 | LLVM_DEBUG(dbgs() << "Applying rule 'select_to_logical'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_to_logical'\n" ; } } while (false); |
| 2790 | Helper.applyBuildFn(*MIs[0], MatchData51); |
| 2791 | return true; |
| 2792 | } |
| 2793 | } |
| 2794 | // Leaf name: select_to_minmax |
| 2795 | // Rule: select_to_minmax |
| 2796 | if (!RuleConfig->isRuleDisabled(108)) { |
| 2797 | if (1 |
| 2798 | && [&]() { |
| 2799 | return Helper.matchSimplifySelectToMinMax(*MIs[0], MatchData108); |
| 2800 | return true; |
| 2801 | }() ) { |
| 2802 | LLVM_DEBUG(dbgs() << "Applying rule 'select_to_minmax'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'select_to_minmax'\n" ; } } while (false); |
| 2803 | Helper.applyBuildFn(*MIs[0], MatchData108); |
| 2804 | return true; |
| 2805 | } |
| 2806 | } |
| 2807 | return false; |
| 2808 | } |
| 2809 | if (Partition == 31 /* TargetOpcode::G_PTR_ADD */) { |
| 2810 | // Leaf name: right_identity_zero |
| 2811 | // Rule: right_identity_zero |
| 2812 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2813 | if (1 |
| 2814 | && [&]() { |
| 2815 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2816 | return true; |
| 2817 | }() ) { |
| 2818 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2819 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2820 | return true; |
| 2821 | } |
| 2822 | } |
| 2823 | // Leaf name: reassoc_ptradd |
| 2824 | // Rule: reassoc_ptradd |
| 2825 | if (!RuleConfig->isRuleDisabled(43)) { |
| 2826 | if (1 |
| 2827 | && [&]() { |
| 2828 | return Helper.matchReassocPtrAdd(*MIs[0], MatchData43); |
| 2829 | return true; |
| 2830 | }() ) { |
| 2831 | LLVM_DEBUG(dbgs() << "Applying rule 'reassoc_ptradd'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'reassoc_ptradd'\n" ; } } while (false); |
| 2832 | Helper.applyBuildFnNoErase(*MIs[0], MatchData43); |
| 2833 | return true; |
| 2834 | } |
| 2835 | } |
| 2836 | // Leaf name: ptr_add_immed_chain |
| 2837 | // Rule: ptr_add_immed_chain |
| 2838 | if (!RuleConfig->isRuleDisabled(44)) { |
| 2839 | if (1 |
| 2840 | && [&]() { |
| 2841 | return Helper.matchPtrAddImmedChain(*MIs[0], MatchData44); |
| 2842 | return true; |
| 2843 | }() ) { |
| 2844 | LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_immed_chain'\n" ; } } while (false); |
| 2845 | Helper.applyPtrAddImmedChain(*MIs[0], MatchData44); |
| 2846 | return true; |
| 2847 | } |
| 2848 | } |
| 2849 | // Leaf name: const_ptradd_to_i2p |
| 2850 | // Rule: const_ptradd_to_i2p |
| 2851 | if (!RuleConfig->isRuleDisabled(71)) { |
| 2852 | if (1 |
| 2853 | && [&]() { |
| 2854 | return Helper.matchCombineConstPtrAddToI2P(*MIs[0], MatchData71); |
| 2855 | return true; |
| 2856 | }() ) { |
| 2857 | LLVM_DEBUG(dbgs() << "Applying rule 'const_ptradd_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'const_ptradd_to_i2p'\n" ; } } while (false); |
| 2858 | Helper.applyCombineConstPtrAddToI2P(*MIs[0], MatchData71); |
| 2859 | return true; |
| 2860 | } |
| 2861 | } |
| 2862 | // Leaf name: ptr_add_with_zero |
| 2863 | // Rule: ptr_add_with_zero |
| 2864 | if (!RuleConfig->isRuleDisabled(79)) { |
| 2865 | if (1 |
| 2866 | && [&]() { |
| 2867 | return Helper.matchPtrAddZero(*MIs[0]); |
| 2868 | return true; |
| 2869 | }() ) { |
| 2870 | LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_with_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'ptr_add_with_zero'\n" ; } } while (false); |
| 2871 | Helper.applyPtrAddZero(*MIs[0]); |
| 2872 | return true; |
| 2873 | } |
| 2874 | } |
| 2875 | // Leaf name: fold_binop_into_select |
| 2876 | // Rule: fold_binop_into_select |
| 2877 | if (!RuleConfig->isRuleDisabled(106)) { |
| 2878 | if (1 |
| 2879 | && [&]() { |
| 2880 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2881 | return true; |
| 2882 | }() ) { |
| 2883 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2884 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2885 | return true; |
| 2886 | } |
| 2887 | } |
| 2888 | return false; |
| 2889 | } |
| 2890 | if (Partition == 32 /* TargetOpcode::G_ROTL */) { |
| 2891 | // Leaf name: right_identity_zero |
| 2892 | // Rule: right_identity_zero |
| 2893 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2894 | if (1 |
| 2895 | && [&]() { |
| 2896 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2897 | return true; |
| 2898 | }() ) { |
| 2899 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2900 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2901 | return true; |
| 2902 | } |
| 2903 | } |
| 2904 | return false; |
| 2905 | } |
| 2906 | if (Partition == 33 /* TargetOpcode::G_ROTR */) { |
| 2907 | // Leaf name: right_identity_zero |
| 2908 | // Rule: right_identity_zero |
| 2909 | if (!RuleConfig->isRuleDisabled(24)) { |
| 2910 | if (1 |
| 2911 | && [&]() { |
| 2912 | return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); |
| 2913 | return true; |
| 2914 | }() ) { |
| 2915 | LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'right_identity_zero'\n" ; } } while (false); |
| 2916 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2917 | return true; |
| 2918 | } |
| 2919 | } |
| 2920 | return false; |
| 2921 | } |
| 2922 | if (Partition == 34 /* TargetOpcode::G_SDIV */) { |
| 2923 | // Leaf name: binop_left_to_zero |
| 2924 | // Rule: binop_left_to_zero |
| 2925 | if (!RuleConfig->isRuleDisabled(26)) { |
| 2926 | if (1 |
| 2927 | && [&]() { |
| 2928 | return Helper.matchOperandIsZero(*MIs[0], 1); |
| 2929 | return true; |
| 2930 | }() ) { |
| 2931 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
| 2932 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2933 | return true; |
| 2934 | } |
| 2935 | } |
| 2936 | // Leaf name: div_rem_to_divrem |
| 2937 | // Rule: div_rem_to_divrem |
| 2938 | if (!RuleConfig->isRuleDisabled(83)) { |
| 2939 | if (1 |
| 2940 | && [&]() { |
| 2941 | return Helper.matchCombineDivRem(*MIs[0], MatchData83); |
| 2942 | return true; |
| 2943 | }() ) { |
| 2944 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
| 2945 | Helper.applyCombineDivRem(*MIs[0], MatchData83); |
| 2946 | return true; |
| 2947 | } |
| 2948 | } |
| 2949 | // Leaf name: sdiv_by_const |
| 2950 | // Rule: sdiv_by_const |
| 2951 | if (!RuleConfig->isRuleDisabled(94)) { |
| 2952 | if (1 |
| 2953 | && [&]() { |
| 2954 | return Helper.matchSDivByConst(*MIs[0]); |
| 2955 | return true; |
| 2956 | }() ) { |
| 2957 | LLVM_DEBUG(dbgs() << "Applying rule 'sdiv_by_const'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'sdiv_by_const'\n" ; } } while (false); |
| 2958 | Helper.applySDivByConst(*MIs[0]); |
| 2959 | return true; |
| 2960 | } |
| 2961 | } |
| 2962 | // Leaf name: fold_binop_into_select |
| 2963 | // Rule: fold_binop_into_select |
| 2964 | if (!RuleConfig->isRuleDisabled(106)) { |
| 2965 | if (1 |
| 2966 | && [&]() { |
| 2967 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2968 | return true; |
| 2969 | }() ) { |
| 2970 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 2971 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 2972 | return true; |
| 2973 | } |
| 2974 | } |
| 2975 | return false; |
| 2976 | } |
| 2977 | if (Partition == 35 /* TargetOpcode::G_SREM */) { |
| 2978 | // Leaf name: binop_left_to_zero |
| 2979 | // Rule: binop_left_to_zero |
| 2980 | if (!RuleConfig->isRuleDisabled(26)) { |
| 2981 | if (1 |
| 2982 | && [&]() { |
| 2983 | return Helper.matchOperandIsZero(*MIs[0], 1); |
| 2984 | return true; |
| 2985 | }() ) { |
| 2986 | LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'binop_left_to_zero'\n" ; } } while (false); |
| 2987 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 2988 | return true; |
| 2989 | } |
| 2990 | } |
| 2991 | // Leaf name: div_rem_to_divrem |
| 2992 | // Rule: div_rem_to_divrem |
| 2993 | if (!RuleConfig->isRuleDisabled(83)) { |
| 2994 | if (1 |
| 2995 | && [&]() { |
| 2996 | return Helper.matchCombineDivRem(*MIs[0], MatchData83); |
| 2997 | return true; |
| 2998 | }() ) { |
| 2999 | LLVM_DEBUG(dbgs() << "Applying rule 'div_rem_to_divrem'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'div_rem_to_divrem'\n" ; } } while (false); |
| 3000 | Helper.applyCombineDivRem(*MIs[0], MatchData83); |
| 3001 | return true; |
| 3002 | } |
| 3003 | } |
| 3004 | // Leaf name: fold_binop_into_select |
| 3005 | // Rule: fold_binop_into_select |
| 3006 | if (!RuleConfig->isRuleDisabled(106)) { |
| 3007 | if (1 |
| 3008 | && [&]() { |
| 3009 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 3010 | return true; |
| 3011 | }() ) { |
| 3012 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 3013 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 3014 | return true; |
| 3015 | } |
| 3016 | } |
| 3017 | return false; |
| 3018 | } |
| 3019 | if (Partition == 36 /* TargetOpcode::G_INTTOPTR */) { |
| 3020 | // Leaf name: p2i_to_i2p |
| 3021 | // Rule: p2i_to_i2p |
| 3022 | if (!RuleConfig->isRuleDisabled(28)) { |
| 3023 | if (1 |
| 3024 | && [&]() { |
| 3025 | return Helper.matchCombineI2PToP2I(*MIs[0], MatchData28); |
| 3026 | return true; |
| 3027 | }() ) { |
| 3028 | LLVM_DEBUG(dbgs() << "Applying rule 'p2i_to_i2p'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'p2i_to_i2p'\n" ; } } while (false); |
| 3029 | Helper.applyCombineI2PToP2I(*MIs[0], MatchData28); |
| 3030 | return true; |
| 3031 | } |
| 3032 | } |
| 3033 | return false; |
| 3034 | } |
| 3035 | if (Partition == 37 /* TargetOpcode::G_PTRTOINT */) { |
| 3036 | Partition = -1; |
| 3037 | if (MIs.size() <= 1) MIs.resize(2); |
| 3038 | MIs[1] = nullptr; |
| 3039 | if (MIs[0]->getOperand(1).isReg()) |
| 3040 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
| 3041 | if (MIs[1] != nullptr) Partition = 0; |
| 3042 | if (Partition == -1) return false; |
| 3043 | if (Partition == 0 /* true */) { |
| 3044 | Partition = -1; |
| 3045 | switch (MIs[1]->getOpcode()) { |
| 3046 | case TargetOpcode::G_INTTOPTR: Partition = 0; break; |
| 3047 | } |
| 3048 | // Default case but without conflicting with potential default case in selection. |
| 3049 | if (Partition == -1) return false; |
| 3050 | if (Partition == 0 /* TargetOpcode::G_INTTOPTR */) { |
| 3051 | // Leaf name: i2p_to_p2i |
| 3052 | // Rule: i2p_to_p2i |
| 3053 | if (!RuleConfig->isRuleDisabled(29)) { |
| 3054 | if (1 |
| 3055 | && [&]() { |
| 3056 | MatchData29 = MIs[1]->getOperand(1).getReg(); |
| 3057 | return true; |
| 3058 | }() ) { |
| 3059 | LLVM_DEBUG(dbgs() << "Applying rule 'i2p_to_p2i'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'i2p_to_p2i'\n" ; } } while (false); |
| 3060 | Helper.applyCombineP2IToI2P(*MIs[0], MatchData29); |
| 3061 | return true; |
| 3062 | } |
| 3063 | } |
| 3064 | return false; |
| 3065 | } |
| 3066 | } |
| 3067 | } |
| 3068 | if (Partition == 38 /* TargetOpcode::G_ANYEXT */) { |
| 3069 | // Leaf name: anyext_trunc_fold |
| 3070 | // Rule: anyext_trunc_fold |
| 3071 | if (!RuleConfig->isRuleDisabled(30)) { |
| 3072 | if (1 |
| 3073 | && [&]() { |
| 3074 | return Helper.matchCombineAnyExtTrunc(*MIs[0], MatchData30); |
| 3075 | return true; |
| 3076 | }() ) { |
| 3077 | LLVM_DEBUG(dbgs() << "Applying rule 'anyext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'anyext_trunc_fold'\n" ; } } while (false); |
| 3078 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData30); |
| 3079 | return true; |
| 3080 | } |
| 3081 | } |
| 3082 | // Leaf name: ext_ext_fold |
| 3083 | // Rule: ext_ext_fold |
| 3084 | if (!RuleConfig->isRuleDisabled(60)) { |
| 3085 | if (1 |
| 3086 | && [&]() { |
| 3087 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData60); |
| 3088 | return true; |
| 3089 | }() ) { |
| 3090 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
| 3091 | Helper.applyCombineExtOfExt(*MIs[0], MatchData60); |
| 3092 | return true; |
| 3093 | } |
| 3094 | } |
| 3095 | return false; |
| 3096 | } |
| 3097 | if (Partition == 39 /* TargetOpcode::G_FNEG */) { |
| 3098 | Partition = -1; |
| 3099 | if (MIs.size() <= 1) MIs.resize(2); |
| 3100 | MIs[1] = nullptr; |
| 3101 | if (MIs[0]->getOperand(1).isReg()) |
| 3102 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
| 3103 | if (MIs[1] == nullptr) Partition = 1; |
| 3104 | if (MIs[1] != nullptr) Partition = 0; |
| 3105 | if (Partition == -1) return false; |
| 3106 | if (Partition == 0 /* true */) { |
| 3107 | Partition = -1; |
Value stored to 'Partition' is never read | |
| 3108 | switch (MIs[1]->getOpcode()) { |
| 3109 | case TargetOpcode::G_FNEG: Partition = 0; break; |
| 3110 | default: Partition = 1; break; |
| 3111 | } |
| 3112 | // Default case but without conflicting with potential default case in selection. |
| 3113 | if (Partition == -1) return false; |
| 3114 | if (Partition == 0 /* TargetOpcode::G_FNEG */) { |
| 3115 | // Leaf name: fneg_fneg_fold |
| 3116 | // Rule: fneg_fneg_fold |
| 3117 | if (!RuleConfig->isRuleDisabled(31)) { |
| 3118 | if (1 |
| 3119 | && [&]() { |
| 3120 | MatchData31 = MIs[1]->getOperand(1).getReg(); |
| 3121 | return true; |
| 3122 | }() ) { |
| 3123 | LLVM_DEBUG(dbgs() << "Applying rule 'fneg_fneg_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fneg_fneg_fold'\n" ; } } while (false); |
| 3124 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData31); |
| 3125 | return true; |
| 3126 | } |
| 3127 | } |
| 3128 | // Leaf name: constant_fp_op |
| 3129 | // Rule: constant_fp_op |
| 3130 | if (!RuleConfig->isRuleDisabled(70)) { |
| 3131 | if (1 |
| 3132 | && [&]() { |
| 3133 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3134 | return true; |
| 3135 | }() ) { |
| 3136 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3137 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3138 | return true; |
| 3139 | } |
| 3140 | } |
| 3141 | // Leaf name: foldable_fneg |
| 3142 | // Rule: foldable_fneg |
| 3143 | if (!RuleConfig->isRuleDisabled(113)) { |
| 3144 | if (1 |
| 3145 | && [&]() { |
| 3146 | return Helper.matchFoldableFneg(*MIs[0], MatchData113); |
| 3147 | return true; |
| 3148 | }() ) { |
| 3149 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
| 3150 | Helper.applyFoldableFneg(*MIs[0], MatchData113); |
| 3151 | return true; |
| 3152 | } |
| 3153 | } |
| 3154 | return false; |
| 3155 | } |
| 3156 | if (Partition == 1 /* * or nullptr */) { |
| 3157 | // Leaf name: constant_fp_op |
| 3158 | // Rule: constant_fp_op |
| 3159 | if (!RuleConfig->isRuleDisabled(70)) { |
| 3160 | if (1 |
| 3161 | && [&]() { |
| 3162 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3163 | return true; |
| 3164 | }() ) { |
| 3165 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3166 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3167 | return true; |
| 3168 | } |
| 3169 | } |
| 3170 | // Leaf name: foldable_fneg |
| 3171 | // Rule: foldable_fneg |
| 3172 | if (!RuleConfig->isRuleDisabled(113)) { |
| 3173 | if (1 |
| 3174 | && [&]() { |
| 3175 | return Helper.matchFoldableFneg(*MIs[0], MatchData113); |
| 3176 | return true; |
| 3177 | }() ) { |
| 3178 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
| 3179 | Helper.applyFoldableFneg(*MIs[0], MatchData113); |
| 3180 | return true; |
| 3181 | } |
| 3182 | } |
| 3183 | return false; |
| 3184 | } |
| 3185 | } |
| 3186 | if (Partition == 1 /* false */) { |
| 3187 | // Leaf name: constant_fp_op |
| 3188 | // Rule: constant_fp_op |
| 3189 | if (!RuleConfig->isRuleDisabled(70)) { |
| 3190 | if (1 |
| 3191 | && [&]() { |
| 3192 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3193 | return true; |
| 3194 | }() ) { |
| 3195 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3196 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3197 | return true; |
| 3198 | } |
| 3199 | } |
| 3200 | // Leaf name: foldable_fneg |
| 3201 | // Rule: foldable_fneg |
| 3202 | if (!RuleConfig->isRuleDisabled(113)) { |
| 3203 | if (1 |
| 3204 | && [&]() { |
| 3205 | return Helper.matchFoldableFneg(*MIs[0], MatchData113); |
| 3206 | return true; |
| 3207 | }() ) { |
| 3208 | LLVM_DEBUG(dbgs() << "Applying rule 'foldable_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'foldable_fneg'\n" ; } } while (false); |
| 3209 | Helper.applyFoldableFneg(*MIs[0], MatchData113); |
| 3210 | return true; |
| 3211 | } |
| 3212 | } |
| 3213 | return false; |
| 3214 | } |
| 3215 | } |
| 3216 | if (Partition == 40 /* TargetOpcode::G_BUILD_VECTOR_TRUNC */) { |
| 3217 | // Leaf name: buildvector_identity_fold |
| 3218 | // Rule: buildvector_identity_fold |
| 3219 | if (!RuleConfig->isRuleDisabled(34)) { |
| 3220 | if (1 |
| 3221 | && [&]() { |
| 3222 | return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData34); |
| 3223 | return true; |
| 3224 | }() ) { |
| 3225 | LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'buildvector_identity_fold'\n" ; } } while (false); |
| 3226 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData34); |
| 3227 | return true; |
| 3228 | } |
| 3229 | } |
| 3230 | return false; |
| 3231 | } |
| 3232 | if (Partition == 41 /* TargetOpcode::G_BITCAST */) { |
| 3233 | Partition = -1; |
| 3234 | if (MIs.size() <= 1) MIs.resize(2); |
| 3235 | MIs[1] = nullptr; |
| 3236 | if (MIs[0]->getOperand(1).isReg()) |
| 3237 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
| 3238 | if (MIs[1] != nullptr) Partition = 0; |
| 3239 | if (Partition == -1) return false; |
| 3240 | if (Partition == 0 /* true */) { |
| 3241 | Partition = -1; |
| 3242 | switch (MIs[1]->getOpcode()) { |
| 3243 | case TargetOpcode::G_BITCAST: Partition = 0; break; |
| 3244 | } |
| 3245 | // Default case but without conflicting with potential default case in selection. |
| 3246 | if (Partition == -1) return false; |
| 3247 | if (Partition == 0 /* TargetOpcode::G_BITCAST */) { |
| 3248 | // Leaf name: bitcast_bitcast_fold |
| 3249 | // Rule: bitcast_bitcast_fold |
| 3250 | if (!RuleConfig->isRuleDisabled(37)) { |
| 3251 | if (1 |
| 3252 | && [&]() { |
| 3253 | return MRI.getType(MIs[1]->getOperand(1).getReg()) == MRI.getType(MIs[0]->getOperand(0).getReg()); |
| 3254 | return true; |
| 3255 | }() ) { |
| 3256 | LLVM_DEBUG(dbgs() << "Applying rule 'bitcast_bitcast_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitcast_bitcast_fold'\n" ; } } while (false); |
| 3257 | Helper.replaceSingleDefInstWithReg(*MIs[0], MIs[1]->getOperand(1).getReg()); |
| 3258 | return true; |
| 3259 | } |
| 3260 | } |
| 3261 | return false; |
| 3262 | } |
| 3263 | } |
| 3264 | } |
| 3265 | if (Partition == 42 /* TargetOpcode::G_FPTRUNC */) { |
| 3266 | Partition = -1; |
| 3267 | if (MIs.size() <= 1) MIs.resize(2); |
| 3268 | MIs[1] = nullptr; |
| 3269 | if (MIs[0]->getOperand(1).isReg()) |
| 3270 | MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); |
| 3271 | if (MIs[1] == nullptr) Partition = 1; |
| 3272 | if (MIs[1] != nullptr) Partition = 0; |
| 3273 | if (Partition == -1) return false; |
| 3274 | if (Partition == 0 /* true */) { |
| 3275 | Partition = -1; |
| 3276 | switch (MIs[1]->getOpcode()) { |
| 3277 | case TargetOpcode::G_FPEXT: Partition = 0; break; |
| 3278 | default: Partition = 1; break; |
| 3279 | } |
| 3280 | // Default case but without conflicting with potential default case in selection. |
| 3281 | if (Partition == -1) return false; |
| 3282 | if (Partition == 0 /* TargetOpcode::G_FPEXT */) { |
| 3283 | // Leaf name: fptrunc_fpext_fold |
| 3284 | // Rule: fptrunc_fpext_fold |
| 3285 | if (!RuleConfig->isRuleDisabled(38)) { |
| 3286 | if (1 |
| 3287 | && [&]() { |
| 3288 | return MRI.getType(MIs[1]->getOperand(1).getReg()) == MRI.getType(MIs[0]->getOperand(0).getReg()); |
| 3289 | return true; |
| 3290 | }() ) { |
| 3291 | LLVM_DEBUG(dbgs() << "Applying rule 'fptrunc_fpext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fptrunc_fpext_fold'\n" ; } } while (false); |
| 3292 | Helper.replaceSingleDefInstWithReg(*MIs[0], MIs[1]->getOperand(1).getReg()); |
| 3293 | return true; |
| 3294 | } |
| 3295 | } |
| 3296 | // Leaf name: constant_fp_op |
| 3297 | // Rule: constant_fp_op |
| 3298 | if (!RuleConfig->isRuleDisabled(70)) { |
| 3299 | if (1 |
| 3300 | && [&]() { |
| 3301 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3302 | return true; |
| 3303 | }() ) { |
| 3304 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3305 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3306 | return true; |
| 3307 | } |
| 3308 | } |
| 3309 | return false; |
| 3310 | } |
| 3311 | if (Partition == 1 /* * or nullptr */) { |
| 3312 | // Leaf name: constant_fp_op |
| 3313 | // Rule: constant_fp_op |
| 3314 | if (!RuleConfig->isRuleDisabled(70)) { |
| 3315 | if (1 |
| 3316 | && [&]() { |
| 3317 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3318 | return true; |
| 3319 | }() ) { |
| 3320 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3321 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3322 | return true; |
| 3323 | } |
| 3324 | } |
| 3325 | return false; |
| 3326 | } |
| 3327 | } |
| 3328 | if (Partition == 1 /* false */) { |
| 3329 | // Leaf name: constant_fp_op |
| 3330 | // Rule: constant_fp_op |
| 3331 | if (!RuleConfig->isRuleDisabled(70)) { |
| 3332 | if (1 |
| 3333 | && [&]() { |
| 3334 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3335 | return true; |
| 3336 | }() ) { |
| 3337 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3338 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3339 | return true; |
| 3340 | } |
| 3341 | } |
| 3342 | return false; |
| 3343 | } |
| 3344 | } |
| 3345 | if (Partition == 43 /* TargetOpcode::G_PHI */) { |
| 3346 | // Leaf name: extend_through_phis |
| 3347 | // Rule: extend_through_phis |
| 3348 | if (!RuleConfig->isRuleDisabled(39)) { |
| 3349 | if (1 |
| 3350 | && [&]() { |
| 3351 | return Helper.matchExtendThroughPhis(*MIs[0], MatchData39); |
| 3352 | return true; |
| 3353 | }() ) { |
| 3354 | LLVM_DEBUG(dbgs() << "Applying rule 'extend_through_phis'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'extend_through_phis'\n" ; } } while (false); |
| 3355 | Helper.applyExtendThroughPhis(*MIs[0], MatchData39); |
| 3356 | return true; |
| 3357 | } |
| 3358 | } |
| 3359 | return false; |
| 3360 | } |
| 3361 | if (Partition == 44 /* TargetOpcode::G_SEXT_INREG */) { |
| 3362 | // Leaf name: sext_inreg_of_load |
| 3363 | // Rule: sext_inreg_of_load |
| 3364 | if (!RuleConfig->isRuleDisabled(46)) { |
| 3365 | if (1 |
| 3366 | && [&]() { |
| 3367 | return Helper.matchSextInRegOfLoad(*MIs[0], MatchData46); |
| 3368 | return true; |
| 3369 | }() ) { |
| 3370 | LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_of_load'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_of_load'\n" ; } } while (false); |
| 3371 | Helper.applySextInRegOfLoad(*MIs[0], MatchData46); |
| 3372 | return true; |
| 3373 | } |
| 3374 | } |
| 3375 | // Leaf name: redundant_sext_inreg |
| 3376 | // Rule: redundant_sext_inreg |
| 3377 | if (!RuleConfig->isRuleDisabled(53)) { |
| 3378 | if (1 |
| 3379 | && [&]() { |
| 3380 | return Helper.matchRedundantSExtInReg(*MIs[0]); |
| 3381 | return true; |
| 3382 | }() ) { |
| 3383 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_sext_inreg'\n" ; } } while (false); |
| 3384 | return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); |
| 3385 | return true; |
| 3386 | } |
| 3387 | } |
| 3388 | // Leaf name: sext_inreg_to_zext_inreg |
| 3389 | // Rule: sext_inreg_to_zext_inreg |
| 3390 | if (!RuleConfig->isRuleDisabled(59)) { |
| 3391 | if (1 |
| 3392 | && [&]() { |
| 3393 | |
| 3394 | unsigned BitWidth = MRI.getType(MIs[0]->getOperand(1).getReg()).getScalarSizeInBits(); |
| 3395 | return Helper.getKnownBits()->maskedValueIsZero(MIs[0]->getOperand(1).getReg(), |
| 3396 | APInt::getOneBitSet(BitWidth, MIs[0]->getOperand(2).getImm() - 1)); |
| 3397 | return true; |
| 3398 | }() ) { |
| 3399 | LLVM_DEBUG(dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'sext_inreg_to_zext_inreg'\n" ; } } while (false); |
| 3400 | |
| 3401 | Helper.getBuilder().setInstrAndDebugLoc(*MIs[0]); |
| 3402 | Helper.getBuilder().buildZExtInReg(MIs[0]->getOperand(0), MIs[0]->getOperand(1), MIs[0]->getOperand(2).getImm()); |
| 3403 | MIs[0]->eraseFromParent(); |
| 3404 | return true; |
| 3405 | |
| 3406 | return true; |
| 3407 | } |
| 3408 | } |
| 3409 | // Leaf name: bitfield_extract_from_sext_inreg |
| 3410 | // Rule: bitfield_extract_from_sext_inreg |
| 3411 | if (!RuleConfig->isRuleDisabled(87)) { |
| 3412 | if (1 |
| 3413 | && [&]() { |
| 3414 | return Helper.matchBitfieldExtractFromSExtInReg(*MIs[0], MatchData87); |
| 3415 | return true; |
| 3416 | }() ) { |
| 3417 | LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n" ; } } while (false); |
| 3418 | Helper.applyBuildFn(*MIs[0], MatchData87); |
| 3419 | return true; |
| 3420 | } |
| 3421 | } |
| 3422 | return false; |
| 3423 | } |
| 3424 | if (Partition == 45 /* TargetOpcode::G_ZEXT */) { |
| 3425 | // Leaf name: zext_trunc_fold |
| 3426 | // Rule: zext_trunc_fold |
| 3427 | if (!RuleConfig->isRuleDisabled(56)) { |
| 3428 | if (1 |
| 3429 | && [&]() { |
| 3430 | return Helper.matchCombineZextTrunc(*MIs[0], MatchData56); |
| 3431 | return true; |
| 3432 | }() ) { |
| 3433 | LLVM_DEBUG(dbgs() << "Applying rule 'zext_trunc_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'zext_trunc_fold'\n" ; } } while (false); |
| 3434 | return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData56); |
| 3435 | return true; |
| 3436 | } |
| 3437 | } |
| 3438 | // Leaf name: ext_ext_fold |
| 3439 | // Rule: ext_ext_fold |
| 3440 | if (!RuleConfig->isRuleDisabled(60)) { |
| 3441 | if (1 |
| 3442 | && [&]() { |
| 3443 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData60); |
| 3444 | return true; |
| 3445 | }() ) { |
| 3446 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
| 3447 | Helper.applyCombineExtOfExt(*MIs[0], MatchData60); |
| 3448 | return true; |
| 3449 | } |
| 3450 | } |
| 3451 | return false; |
| 3452 | } |
| 3453 | if (Partition == 46 /* TargetOpcode::G_ICMP */) { |
| 3454 | // Leaf name: icmp_to_true_false_known_bits |
| 3455 | // Rule: icmp_to_true_false_known_bits |
| 3456 | if (!RuleConfig->isRuleDisabled(57)) { |
| 3457 | if (1 |
| 3458 | && [&]() { |
| 3459 | return Helper.matchICmpToTrueFalseKnownBits(*MIs[0], MatchData57); |
| 3460 | return true; |
| 3461 | }() ) { |
| 3462 | LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n" ; } } while (false); |
| 3463 | Helper.replaceInstWithConstant(*MIs[0], MatchData57); |
| 3464 | return true; |
| 3465 | } |
| 3466 | } |
| 3467 | // Leaf name: icmp_to_lhs_known_bits |
| 3468 | // Rule: icmp_to_lhs_known_bits |
| 3469 | if (!RuleConfig->isRuleDisabled(58)) { |
| 3470 | if (1 |
| 3471 | && [&]() { |
| 3472 | return Helper.matchICmpToLHSKnownBits(*MIs[0], MatchData58); |
| 3473 | return true; |
| 3474 | }() ) { |
| 3475 | LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'icmp_to_lhs_known_bits'\n" ; } } while (false); |
| 3476 | Helper.applyBuildFn(*MIs[0], MatchData58); |
| 3477 | return true; |
| 3478 | } |
| 3479 | } |
| 3480 | // Leaf name: redundant_binop_in_equality |
| 3481 | // Rule: redundant_binop_in_equality |
| 3482 | if (!RuleConfig->isRuleDisabled(109)) { |
| 3483 | if (1 |
| 3484 | && [&]() { |
| 3485 | return Helper.matchRedundantBinOpInEquality(*MIs[0], MatchData109); |
| 3486 | return true; |
| 3487 | }() ) { |
| 3488 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_binop_in_equality'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_binop_in_equality'\n" ; } } while (false); |
| 3489 | Helper.applyBuildFn(*MIs[0], MatchData109); |
| 3490 | return true; |
| 3491 | } |
| 3492 | } |
| 3493 | return false; |
| 3494 | } |
| 3495 | if (Partition == 47 /* TargetOpcode::G_SEXT */) { |
| 3496 | // Leaf name: ext_ext_fold |
| 3497 | // Rule: ext_ext_fold |
| 3498 | if (!RuleConfig->isRuleDisabled(60)) { |
| 3499 | if (1 |
| 3500 | && [&]() { |
| 3501 | return Helper.matchCombineExtOfExt(*MIs[0], MatchData60); |
| 3502 | return true; |
| 3503 | }() ) { |
| 3504 | LLVM_DEBUG(dbgs() << "Applying rule 'ext_ext_fold'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'ext_ext_fold'\n" ; } } while (false); |
| 3505 | Helper.applyCombineExtOfExt(*MIs[0], MatchData60); |
| 3506 | return true; |
| 3507 | } |
| 3508 | } |
| 3509 | return false; |
| 3510 | } |
| 3511 | if (Partition == 48 /* TargetOpcode::G_BR */) { |
| 3512 | // Leaf name: opt_brcond_by_inverting_cond |
| 3513 | // Rule: opt_brcond_by_inverting_cond |
| 3514 | if (!RuleConfig->isRuleDisabled(62)) { |
| 3515 | if (1 |
| 3516 | && [&]() { |
| 3517 | return Helper.matchOptBrCondByInvertingCond(*MIs[0], MatchData62); |
| 3518 | return true; |
| 3519 | }() ) { |
| 3520 | LLVM_DEBUG(dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'opt_brcond_by_inverting_cond'\n" ; } } while (false); |
| 3521 | Helper.applyOptBrCondByInvertingCond(*MIs[0], MatchData62); |
| 3522 | return true; |
| 3523 | } |
| 3524 | } |
| 3525 | return false; |
| 3526 | } |
| 3527 | if (Partition == 49 /* TargetOpcode::G_MERGE_VALUES */) { |
| 3528 | // Leaf name: merge_unmerge |
| 3529 | // Rule: merge_unmerge |
| 3530 | if (!RuleConfig->isRuleDisabled(67)) { |
| 3531 | if (1 |
| 3532 | && [&]() { |
| 3533 | return Helper.matchCombineMergeUnmerge(*MIs[0], MatchData67); |
| 3534 | return true; |
| 3535 | }() ) { |
| 3536 | LLVM_DEBUG(dbgs() << "Applying rule 'merge_unmerge'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'merge_unmerge'\n" ; } } while (false); |
| 3537 | Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData67); |
| 3538 | return true; |
| 3539 | } |
| 3540 | } |
| 3541 | return false; |
| 3542 | } |
| 3543 | if (Partition == 50 /* TargetOpcode::G_FSQRT */) { |
| 3544 | // Leaf name: constant_fp_op |
| 3545 | // Rule: constant_fp_op |
| 3546 | if (!RuleConfig->isRuleDisabled(70)) { |
| 3547 | if (1 |
| 3548 | && [&]() { |
| 3549 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3550 | return true; |
| 3551 | }() ) { |
| 3552 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3553 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3554 | return true; |
| 3555 | } |
| 3556 | } |
| 3557 | return false; |
| 3558 | } |
| 3559 | if (Partition == 51 /* TargetOpcode::G_FLOG2 */) { |
| 3560 | // Leaf name: constant_fp_op |
| 3561 | // Rule: constant_fp_op |
| 3562 | if (!RuleConfig->isRuleDisabled(70)) { |
| 3563 | if (1 |
| 3564 | && [&]() { |
| 3565 | return Helper.matchCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3566 | return true; |
| 3567 | }() ) { |
| 3568 | LLVM_DEBUG(dbgs() << "Applying rule 'constant_fp_op'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'constant_fp_op'\n" ; } } while (false); |
| 3569 | Helper.applyCombineConstantFoldFpUnary(*MIs[0], MatchData70); |
| 3570 | return true; |
| 3571 | } |
| 3572 | } |
| 3573 | return false; |
| 3574 | } |
| 3575 | if (Partition == 52 /* TargetOpcode::G_UMULO */) { |
| 3576 | // Leaf name: mulo_by_2 |
| 3577 | // Rule: mulo_by_2 |
| 3578 | if (!RuleConfig->isRuleDisabled(73)) { |
| 3579 | if (1 |
| 3580 | && [&]() { |
| 3581 | return Helper.matchMulOBy2(*MIs[0], MatchData73); |
| 3582 | return true; |
| 3583 | }() ) { |
| 3584 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n" ; } } while (false); |
| 3585 | Helper.applyBuildFnNoErase(*MIs[0], MatchData73); |
| 3586 | return true; |
| 3587 | } |
| 3588 | } |
| 3589 | // Leaf name: mulo_by_0 |
| 3590 | // Rule: mulo_by_0 |
| 3591 | if (!RuleConfig->isRuleDisabled(74)) { |
| 3592 | if (1 |
| 3593 | && [&]() { |
| 3594 | return Helper.matchMulOBy0(*MIs[0], MatchData74); |
| 3595 | return true; |
| 3596 | }() ) { |
| 3597 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n" ; } } while (false); |
| 3598 | Helper.applyBuildFn(*MIs[0], MatchData74); |
| 3599 | return true; |
| 3600 | } |
| 3601 | } |
| 3602 | return false; |
| 3603 | } |
| 3604 | if (Partition == 53 /* TargetOpcode::G_SMULO */) { |
| 3605 | // Leaf name: mulo_by_2 |
| 3606 | // Rule: mulo_by_2 |
| 3607 | if (!RuleConfig->isRuleDisabled(73)) { |
| 3608 | if (1 |
| 3609 | && [&]() { |
| 3610 | return Helper.matchMulOBy2(*MIs[0], MatchData73); |
| 3611 | return true; |
| 3612 | }() ) { |
| 3613 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_2'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_2'\n" ; } } while (false); |
| 3614 | Helper.applyBuildFnNoErase(*MIs[0], MatchData73); |
| 3615 | return true; |
| 3616 | } |
| 3617 | } |
| 3618 | // Leaf name: mulo_by_0 |
| 3619 | // Rule: mulo_by_0 |
| 3620 | if (!RuleConfig->isRuleDisabled(74)) { |
| 3621 | if (1 |
| 3622 | && [&]() { |
| 3623 | return Helper.matchMulOBy0(*MIs[0], MatchData74); |
| 3624 | return true; |
| 3625 | }() ) { |
| 3626 | LLVM_DEBUG(dbgs() << "Applying rule 'mulo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulo_by_0'\n" ; } } while (false); |
| 3627 | Helper.applyBuildFn(*MIs[0], MatchData74); |
| 3628 | return true; |
| 3629 | } |
| 3630 | } |
| 3631 | return false; |
| 3632 | } |
| 3633 | if (Partition == 54 /* TargetOpcode::G_UADDO */) { |
| 3634 | // Leaf name: addo_by_0 |
| 3635 | // Rule: addo_by_0 |
| 3636 | if (!RuleConfig->isRuleDisabled(75)) { |
| 3637 | if (1 |
| 3638 | && [&]() { |
| 3639 | return Helper.matchAddOBy0(*MIs[0], MatchData75); |
| 3640 | return true; |
| 3641 | }() ) { |
| 3642 | LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n" ; } } while (false); |
| 3643 | Helper.applyBuildFn(*MIs[0], MatchData75); |
| 3644 | return true; |
| 3645 | } |
| 3646 | } |
| 3647 | return false; |
| 3648 | } |
| 3649 | if (Partition == 55 /* TargetOpcode::G_SADDO */) { |
| 3650 | // Leaf name: addo_by_0 |
| 3651 | // Rule: addo_by_0 |
| 3652 | if (!RuleConfig->isRuleDisabled(75)) { |
| 3653 | if (1 |
| 3654 | && [&]() { |
| 3655 | return Helper.matchAddOBy0(*MIs[0], MatchData75); |
| 3656 | return true; |
| 3657 | }() ) { |
| 3658 | LLVM_DEBUG(dbgs() << "Applying rule 'addo_by_0'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'addo_by_0'\n" ; } } while (false); |
| 3659 | Helper.applyBuildFn(*MIs[0], MatchData75); |
| 3660 | return true; |
| 3661 | } |
| 3662 | } |
| 3663 | return false; |
| 3664 | } |
| 3665 | if (Partition == 56 /* TargetOpcode::G_UADDE */) { |
| 3666 | // Leaf name: adde_to_addo |
| 3667 | // Rule: adde_to_addo |
| 3668 | if (!RuleConfig->isRuleDisabled(76)) { |
| 3669 | if (1 |
| 3670 | && [&]() { |
| 3671 | return Helper.matchAddEToAddO(*MIs[0], MatchData76); |
| 3672 | return true; |
| 3673 | }() ) { |
| 3674 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
| 3675 | Helper.applyBuildFnNoErase(*MIs[0], MatchData76); |
| 3676 | return true; |
| 3677 | } |
| 3678 | } |
| 3679 | return false; |
| 3680 | } |
| 3681 | if (Partition == 57 /* TargetOpcode::G_SADDE */) { |
| 3682 | // Leaf name: adde_to_addo |
| 3683 | // Rule: adde_to_addo |
| 3684 | if (!RuleConfig->isRuleDisabled(76)) { |
| 3685 | if (1 |
| 3686 | && [&]() { |
| 3687 | return Helper.matchAddEToAddO(*MIs[0], MatchData76); |
| 3688 | return true; |
| 3689 | }() ) { |
| 3690 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
| 3691 | Helper.applyBuildFnNoErase(*MIs[0], MatchData76); |
| 3692 | return true; |
| 3693 | } |
| 3694 | } |
| 3695 | return false; |
| 3696 | } |
| 3697 | if (Partition == 58 /* TargetOpcode::G_USUBE */) { |
| 3698 | // Leaf name: adde_to_addo |
| 3699 | // Rule: adde_to_addo |
| 3700 | if (!RuleConfig->isRuleDisabled(76)) { |
| 3701 | if (1 |
| 3702 | && [&]() { |
| 3703 | return Helper.matchAddEToAddO(*MIs[0], MatchData76); |
| 3704 | return true; |
| 3705 | }() ) { |
| 3706 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
| 3707 | Helper.applyBuildFnNoErase(*MIs[0], MatchData76); |
| 3708 | return true; |
| 3709 | } |
| 3710 | } |
| 3711 | return false; |
| 3712 | } |
| 3713 | if (Partition == 59 /* TargetOpcode::G_SSUBE */) { |
| 3714 | // Leaf name: adde_to_addo |
| 3715 | // Rule: adde_to_addo |
| 3716 | if (!RuleConfig->isRuleDisabled(76)) { |
| 3717 | if (1 |
| 3718 | && [&]() { |
| 3719 | return Helper.matchAddEToAddO(*MIs[0], MatchData76); |
| 3720 | return true; |
| 3721 | }() ) { |
| 3722 | LLVM_DEBUG(dbgs() << "Applying rule 'adde_to_addo'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'adde_to_addo'\n" ; } } while (false); |
| 3723 | Helper.applyBuildFnNoErase(*MIs[0], MatchData76); |
| 3724 | return true; |
| 3725 | } |
| 3726 | } |
| 3727 | return false; |
| 3728 | } |
| 3729 | if (Partition == 60 /* TargetOpcode::G_FMINNUM */) { |
| 3730 | // Leaf name: combine_minmax_nan |
| 3731 | // Rule: combine_minmax_nan |
| 3732 | if (!RuleConfig->isRuleDisabled(77)) { |
| 3733 | if (1 |
| 3734 | && [&]() { |
| 3735 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77); |
| 3736 | return true; |
| 3737 | }() ) { |
| 3738 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
| 3739 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77); |
| 3740 | return true; |
| 3741 | } |
| 3742 | } |
| 3743 | // Leaf name: fold_binop_into_select |
| 3744 | // Rule: fold_binop_into_select |
| 3745 | if (!RuleConfig->isRuleDisabled(106)) { |
| 3746 | if (1 |
| 3747 | && [&]() { |
| 3748 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 3749 | return true; |
| 3750 | }() ) { |
| 3751 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 3752 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 3753 | return true; |
| 3754 | } |
| 3755 | } |
| 3756 | return false; |
| 3757 | } |
| 3758 | if (Partition == 61 /* TargetOpcode::G_FMAXNUM */) { |
| 3759 | // Leaf name: combine_minmax_nan |
| 3760 | // Rule: combine_minmax_nan |
| 3761 | if (!RuleConfig->isRuleDisabled(77)) { |
| 3762 | if (1 |
| 3763 | && [&]() { |
| 3764 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77); |
| 3765 | return true; |
| 3766 | }() ) { |
| 3767 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
| 3768 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77); |
| 3769 | return true; |
| 3770 | } |
| 3771 | } |
| 3772 | // Leaf name: fold_binop_into_select |
| 3773 | // Rule: fold_binop_into_select |
| 3774 | if (!RuleConfig->isRuleDisabled(106)) { |
| 3775 | if (1 |
| 3776 | && [&]() { |
| 3777 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 3778 | return true; |
| 3779 | }() ) { |
| 3780 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 3781 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 3782 | return true; |
| 3783 | } |
| 3784 | } |
| 3785 | return false; |
| 3786 | } |
| 3787 | if (Partition == 62 /* TargetOpcode::G_FMINIMUM */) { |
| 3788 | // Leaf name: combine_minmax_nan |
| 3789 | // Rule: combine_minmax_nan |
| 3790 | if (!RuleConfig->isRuleDisabled(77)) { |
| 3791 | if (1 |
| 3792 | && [&]() { |
| 3793 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77); |
| 3794 | return true; |
| 3795 | }() ) { |
| 3796 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
| 3797 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77); |
| 3798 | return true; |
| 3799 | } |
| 3800 | } |
| 3801 | // Leaf name: fold_binop_into_select |
| 3802 | // Rule: fold_binop_into_select |
| 3803 | if (!RuleConfig->isRuleDisabled(106)) { |
| 3804 | if (1 |
| 3805 | && [&]() { |
| 3806 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 3807 | return true; |
| 3808 | }() ) { |
| 3809 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 3810 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 3811 | return true; |
| 3812 | } |
| 3813 | } |
| 3814 | return false; |
| 3815 | } |
| 3816 | if (Partition == 63 /* TargetOpcode::G_FMAXIMUM */) { |
| 3817 | // Leaf name: combine_minmax_nan |
| 3818 | // Rule: combine_minmax_nan |
| 3819 | if (!RuleConfig->isRuleDisabled(77)) { |
| 3820 | if (1 |
| 3821 | && [&]() { |
| 3822 | return Helper.matchCombineFMinMaxNaN(*MIs[0], MatchData77); |
| 3823 | return true; |
| 3824 | }() ) { |
| 3825 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_minmax_nan'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_minmax_nan'\n" ; } } while (false); |
| 3826 | Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData77); |
| 3827 | return true; |
| 3828 | } |
| 3829 | } |
| 3830 | // Leaf name: fold_binop_into_select |
| 3831 | // Rule: fold_binop_into_select |
| 3832 | if (!RuleConfig->isRuleDisabled(106)) { |
| 3833 | if (1 |
| 3834 | && [&]() { |
| 3835 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 3836 | return true; |
| 3837 | }() ) { |
| 3838 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 3839 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 3840 | return true; |
| 3841 | } |
| 3842 | } |
| 3843 | return false; |
| 3844 | } |
| 3845 | if (Partition == 64 /* TargetOpcode::G_SSHLSAT */) { |
| 3846 | // Leaf name: shift_immed_chain |
| 3847 | // Rule: shift_immed_chain |
| 3848 | if (!RuleConfig->isRuleDisabled(80)) { |
| 3849 | if (1 |
| 3850 | && [&]() { |
| 3851 | return Helper.matchShiftImmedChain(*MIs[0], MatchData80); |
| 3852 | return true; |
| 3853 | }() ) { |
| 3854 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
| 3855 | Helper.applyShiftImmedChain(*MIs[0], MatchData80); |
| 3856 | return true; |
| 3857 | } |
| 3858 | } |
| 3859 | // Leaf name: shift_of_shifted_logic_chain |
| 3860 | // Rule: shift_of_shifted_logic_chain |
| 3861 | if (!RuleConfig->isRuleDisabled(81)) { |
| 3862 | if (1 |
| 3863 | && [&]() { |
| 3864 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81); |
| 3865 | return true; |
| 3866 | }() ) { |
| 3867 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
| 3868 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81); |
| 3869 | return true; |
| 3870 | } |
| 3871 | } |
| 3872 | return false; |
| 3873 | } |
| 3874 | if (Partition == 65 /* TargetOpcode::G_USHLSAT */) { |
| 3875 | // Leaf name: shift_immed_chain |
| 3876 | // Rule: shift_immed_chain |
| 3877 | if (!RuleConfig->isRuleDisabled(80)) { |
| 3878 | if (1 |
| 3879 | && [&]() { |
| 3880 | return Helper.matchShiftImmedChain(*MIs[0], MatchData80); |
| 3881 | return true; |
| 3882 | }() ) { |
| 3883 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_immed_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_immed_chain'\n" ; } } while (false); |
| 3884 | Helper.applyShiftImmedChain(*MIs[0], MatchData80); |
| 3885 | return true; |
| 3886 | } |
| 3887 | } |
| 3888 | // Leaf name: shift_of_shifted_logic_chain |
| 3889 | // Rule: shift_of_shifted_logic_chain |
| 3890 | if (!RuleConfig->isRuleDisabled(81)) { |
| 3891 | if (1 |
| 3892 | && [&]() { |
| 3893 | return Helper.matchShiftOfShiftedLogic(*MIs[0], MatchData81); |
| 3894 | return true; |
| 3895 | }() ) { |
| 3896 | LLVM_DEBUG(dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'shift_of_shifted_logic_chain'\n" ; } } while (false); |
| 3897 | Helper.applyShiftOfShiftedLogic(*MIs[0], MatchData81); |
| 3898 | return true; |
| 3899 | } |
| 3900 | } |
| 3901 | return false; |
| 3902 | } |
| 3903 | if (Partition == 66 /* TargetOpcode::G_FSHL */) { |
| 3904 | // Leaf name: funnel_shift_to_rotate |
| 3905 | // Rule: funnel_shift_to_rotate |
| 3906 | if (!RuleConfig->isRuleDisabled(85)) { |
| 3907 | if (1 |
| 3908 | && [&]() { |
| 3909 | return Helper.matchFunnelShiftToRotate(*MIs[0]); |
| 3910 | return true; |
| 3911 | }() ) { |
| 3912 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n" ; } } while (false); |
| 3913 | Helper.applyFunnelShiftToRotate(*MIs[0]); |
| 3914 | return true; |
| 3915 | } |
| 3916 | } |
| 3917 | return false; |
| 3918 | } |
| 3919 | if (Partition == 67 /* TargetOpcode::G_FSHR */) { |
| 3920 | // Leaf name: funnel_shift_to_rotate |
| 3921 | // Rule: funnel_shift_to_rotate |
| 3922 | if (!RuleConfig->isRuleDisabled(85)) { |
| 3923 | if (1 |
| 3924 | && [&]() { |
| 3925 | return Helper.matchFunnelShiftToRotate(*MIs[0]); |
| 3926 | return true; |
| 3927 | }() ) { |
| 3928 | LLVM_DEBUG(dbgs() << "Applying rule 'funnel_shift_to_rotate'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'funnel_shift_to_rotate'\n" ; } } while (false); |
| 3929 | Helper.applyFunnelShiftToRotate(*MIs[0]); |
| 3930 | return true; |
| 3931 | } |
| 3932 | } |
| 3933 | return false; |
| 3934 | } |
| 3935 | if (Partition == 68 /* TargetOpcode::G_UMULH */) { |
| 3936 | // Leaf name: mulh_to_lshr |
| 3937 | // Rule: mulh_to_lshr |
| 3938 | if (!RuleConfig->isRuleDisabled(95)) { |
| 3939 | if (1 |
| 3940 | && [&]() { |
| 3941 | return Helper.matchUMulHToLShr(*MIs[0]); |
| 3942 | return true; |
| 3943 | }() ) { |
| 3944 | LLVM_DEBUG(dbgs() << "Applying rule 'mulh_to_lshr'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'mulh_to_lshr'\n" ; } } while (false); |
| 3945 | Helper.applyUMulHToLShr(*MIs[0]); |
| 3946 | return true; |
| 3947 | } |
| 3948 | } |
| 3949 | return false; |
| 3950 | } |
| 3951 | if (Partition == 69 /* TargetOpcode::G_FADD */) { |
| 3952 | // Leaf name: redundant_neg_operands |
| 3953 | // Rule: redundant_neg_operands |
| 3954 | if (!RuleConfig->isRuleDisabled(96)) { |
| 3955 | if (1 |
| 3956 | && [&]() { |
| 3957 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
| 3958 | return true; |
| 3959 | }() ) { |
| 3960 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 3961 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
| 3962 | return true; |
| 3963 | } |
| 3964 | } |
| 3965 | // Leaf name: combine_fadd_fmul_to_fmad_or_fma |
| 3966 | // Rule: combine_fadd_fmul_to_fmad_or_fma |
| 3967 | if (!RuleConfig->isRuleDisabled(98)) { |
| 3968 | if (1 |
| 3969 | && [&]() { |
| 3970 | return Helper.matchCombineFAddFMulToFMadOrFMA(*MIs[0], |
| 3971 | MatchData98); |
| 3972 | return true; |
| 3973 | }() ) { |
| 3974 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 3975 | Helper.applyBuildFn(*MIs[0], MatchData98); |
| 3976 | return true; |
| 3977 | } |
| 3978 | } |
| 3979 | // Leaf name: combine_fadd_fpext_fmul_to_fmad_or_fma |
| 3980 | // Rule: combine_fadd_fpext_fmul_to_fmad_or_fma |
| 3981 | if (!RuleConfig->isRuleDisabled(99)) { |
| 3982 | if (1 |
| 3983 | && [&]() { |
| 3984 | return Helper.matchCombineFAddFpExtFMulToFMadOrFMA(*MIs[0], |
| 3985 | MatchData99); |
| 3986 | return true; |
| 3987 | }() ) { |
| 3988 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 3989 | Helper.applyBuildFn(*MIs[0], MatchData99); |
| 3990 | return true; |
| 3991 | } |
| 3992 | } |
| 3993 | // Leaf name: combine_fadd_fma_fmul_to_fmad_or_fma |
| 3994 | // Rule: combine_fadd_fma_fmul_to_fmad_or_fma |
| 3995 | if (!RuleConfig->isRuleDisabled(100)) { |
| 3996 | if (1 |
| 3997 | && [&]() { |
| 3998 | return Helper.matchCombineFAddFMAFMulToFMadOrFMA(*MIs[0], |
| 3999 | MatchData100); |
| 4000 | return true; |
| 4001 | }() ) { |
| 4002 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fma_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 4003 | Helper.applyBuildFn(*MIs[0], MatchData100); |
| 4004 | return true; |
| 4005 | } |
| 4006 | } |
| 4007 | // Leaf name: combine_fadd_fpext_fma_fmul_to_fmad_or_fma |
| 4008 | // Rule: combine_fadd_fpext_fma_fmul_to_fmad_or_fma |
| 4009 | if (!RuleConfig->isRuleDisabled(101)) { |
| 4010 | if (1 |
| 4011 | && [&]() { |
| 4012 | return Helper.matchCombineFAddFpExtFMulToFMadOrFMAAggressive( |
| 4013 | *MIs[0], MatchData101); |
| 4014 | return true; |
| 4015 | }() ) { |
| 4016 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fadd_fpext_fma_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 4017 | Helper.applyBuildFn(*MIs[0], MatchData101); |
| 4018 | return true; |
| 4019 | } |
| 4020 | } |
| 4021 | // Leaf name: fold_binop_into_select |
| 4022 | // Rule: fold_binop_into_select |
| 4023 | if (!RuleConfig->isRuleDisabled(106)) { |
| 4024 | if (1 |
| 4025 | && [&]() { |
| 4026 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4027 | return true; |
| 4028 | }() ) { |
| 4029 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4030 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4031 | return true; |
| 4032 | } |
| 4033 | } |
| 4034 | return false; |
| 4035 | } |
| 4036 | if (Partition == 70 /* TargetOpcode::G_FSUB */) { |
| 4037 | // Leaf name: redundant_neg_operands |
| 4038 | // Rule: redundant_neg_operands |
| 4039 | if (!RuleConfig->isRuleDisabled(96)) { |
| 4040 | if (1 |
| 4041 | && [&]() { |
| 4042 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
| 4043 | return true; |
| 4044 | }() ) { |
| 4045 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 4046 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
| 4047 | return true; |
| 4048 | } |
| 4049 | } |
| 4050 | // Leaf name: combine_fsub_fmul_to_fmad_or_fma |
| 4051 | // Rule: combine_fsub_fmul_to_fmad_or_fma |
| 4052 | if (!RuleConfig->isRuleDisabled(102)) { |
| 4053 | if (1 |
| 4054 | && [&]() { |
| 4055 | return Helper.matchCombineFSubFMulToFMadOrFMA(*MIs[0], |
| 4056 | MatchData102); |
| 4057 | return true; |
| 4058 | }() ) { |
| 4059 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 4060 | Helper.applyBuildFn(*MIs[0], MatchData102); |
| 4061 | return true; |
| 4062 | } |
| 4063 | } |
| 4064 | // Leaf name: combine_fsub_fneg_fmul_to_fmad_or_fma |
| 4065 | // Rule: combine_fsub_fneg_fmul_to_fmad_or_fma |
| 4066 | if (!RuleConfig->isRuleDisabled(103)) { |
| 4067 | if (1 |
| 4068 | && [&]() { |
| 4069 | return Helper.matchCombineFSubFNegFMulToFMadOrFMA(*MIs[0], |
| 4070 | MatchData103); |
| 4071 | return true; |
| 4072 | }() ) { |
| 4073 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fneg_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 4074 | Helper.applyBuildFn(*MIs[0], MatchData103); |
| 4075 | return true; |
| 4076 | } |
| 4077 | } |
| 4078 | // Leaf name: combine_fsub_fpext_fmul_to_fmad_or_fma |
| 4079 | // Rule: combine_fsub_fpext_fmul_to_fmad_or_fma |
| 4080 | if (!RuleConfig->isRuleDisabled(104)) { |
| 4081 | if (1 |
| 4082 | && [&]() { |
| 4083 | return Helper.matchCombineFSubFpExtFMulToFMadOrFMA(*MIs[0], |
| 4084 | MatchData104); |
| 4085 | return true; |
| 4086 | }() ) { |
| 4087 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 4088 | Helper.applyBuildFn(*MIs[0], MatchData104); |
| 4089 | return true; |
| 4090 | } |
| 4091 | } |
| 4092 | // Leaf name: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma |
| 4093 | // Rule: combine_fsub_fpext_fneg_fmul_to_fmad_or_fma |
| 4094 | if (!RuleConfig->isRuleDisabled(105)) { |
| 4095 | if (1 |
| 4096 | && [&]() { |
| 4097 | return Helper.matchCombineFSubFpExtFNegFMulToFMadOrFMA( |
| 4098 | *MIs[0], MatchData105); |
| 4099 | return true; |
| 4100 | }() ) { |
| 4101 | LLVM_DEBUG(dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'combine_fsub_fpext_fneg_fmul_to_fmad_or_fma'\n" ; } } while (false); |
| 4102 | Helper.applyBuildFn(*MIs[0], MatchData105); |
| 4103 | return true; |
| 4104 | } |
| 4105 | } |
| 4106 | // Leaf name: fold_binop_into_select |
| 4107 | // Rule: fold_binop_into_select |
| 4108 | if (!RuleConfig->isRuleDisabled(106)) { |
| 4109 | if (1 |
| 4110 | && [&]() { |
| 4111 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4112 | return true; |
| 4113 | }() ) { |
| 4114 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4115 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4116 | return true; |
| 4117 | } |
| 4118 | } |
| 4119 | // Leaf name: fsub_to_fneg |
| 4120 | // Rule: fsub_to_fneg |
| 4121 | if (!RuleConfig->isRuleDisabled(110)) { |
| 4122 | if (1 |
| 4123 | && [&]() { |
| 4124 | return Helper.matchFsubToFneg(*MIs[0], MatchData110); |
| 4125 | return true; |
| 4126 | }() ) { |
| 4127 | LLVM_DEBUG(dbgs() << "Applying rule 'fsub_to_fneg'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fsub_to_fneg'\n" ; } } while (false); |
| 4128 | Helper.applyFsubToFneg(*MIs[0], MatchData110); |
| 4129 | return true; |
| 4130 | } |
| 4131 | } |
| 4132 | return false; |
| 4133 | } |
| 4134 | if (Partition == 71 /* TargetOpcode::G_FMUL */) { |
| 4135 | // Leaf name: redundant_neg_operands |
| 4136 | // Rule: redundant_neg_operands |
| 4137 | if (!RuleConfig->isRuleDisabled(96)) { |
| 4138 | if (1 |
| 4139 | && [&]() { |
| 4140 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
| 4141 | return true; |
| 4142 | }() ) { |
| 4143 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 4144 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
| 4145 | return true; |
| 4146 | } |
| 4147 | } |
| 4148 | // Leaf name: fold_binop_into_select |
| 4149 | // Rule: fold_binop_into_select |
| 4150 | if (!RuleConfig->isRuleDisabled(106)) { |
| 4151 | if (1 |
| 4152 | && [&]() { |
| 4153 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4154 | return true; |
| 4155 | }() ) { |
| 4156 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4157 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4158 | return true; |
| 4159 | } |
| 4160 | } |
| 4161 | return false; |
| 4162 | } |
| 4163 | if (Partition == 72 /* TargetOpcode::G_FDIV */) { |
| 4164 | // Leaf name: redundant_neg_operands |
| 4165 | // Rule: redundant_neg_operands |
| 4166 | if (!RuleConfig->isRuleDisabled(96)) { |
| 4167 | if (1 |
| 4168 | && [&]() { |
| 4169 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
| 4170 | return true; |
| 4171 | }() ) { |
| 4172 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 4173 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
| 4174 | return true; |
| 4175 | } |
| 4176 | } |
| 4177 | // Leaf name: fold_binop_into_select |
| 4178 | // Rule: fold_binop_into_select |
| 4179 | if (!RuleConfig->isRuleDisabled(106)) { |
| 4180 | if (1 |
| 4181 | && [&]() { |
| 4182 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4183 | return true; |
| 4184 | }() ) { |
| 4185 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4186 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4187 | return true; |
| 4188 | } |
| 4189 | } |
| 4190 | return false; |
| 4191 | } |
| 4192 | if (Partition == 73 /* TargetOpcode::G_FMAD */) { |
| 4193 | // Leaf name: redundant_neg_operands |
| 4194 | // Rule: redundant_neg_operands |
| 4195 | if (!RuleConfig->isRuleDisabled(96)) { |
| 4196 | if (1 |
| 4197 | && [&]() { |
| 4198 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
| 4199 | return true; |
| 4200 | }() ) { |
| 4201 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 4202 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
| 4203 | return true; |
| 4204 | } |
| 4205 | } |
| 4206 | return false; |
| 4207 | } |
| 4208 | if (Partition == 74 /* TargetOpcode::G_FMA */) { |
| 4209 | // Leaf name: redundant_neg_operands |
| 4210 | // Rule: redundant_neg_operands |
| 4211 | if (!RuleConfig->isRuleDisabled(96)) { |
| 4212 | if (1 |
| 4213 | && [&]() { |
| 4214 | return Helper.matchRedundantNegOperands(*MIs[0], MatchData96); |
| 4215 | return true; |
| 4216 | }() ) { |
| 4217 | LLVM_DEBUG(dbgs() << "Applying rule 'redundant_neg_operands'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'redundant_neg_operands'\n" ; } } while (false); |
| 4218 | Helper.applyBuildFnNoErase(*MIs[0], MatchData96); |
| 4219 | return true; |
| 4220 | } |
| 4221 | } |
| 4222 | return false; |
| 4223 | } |
| 4224 | if (Partition == 75 /* TargetOpcode::G_SMIN */) { |
| 4225 | // Leaf name: fold_binop_into_select |
| 4226 | // Rule: fold_binop_into_select |
| 4227 | if (!RuleConfig->isRuleDisabled(106)) { |
| 4228 | if (1 |
| 4229 | && [&]() { |
| 4230 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4231 | return true; |
| 4232 | }() ) { |
| 4233 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4234 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4235 | return true; |
| 4236 | } |
| 4237 | } |
| 4238 | return false; |
| 4239 | } |
| 4240 | if (Partition == 76 /* TargetOpcode::G_SMAX */) { |
| 4241 | // Leaf name: fold_binop_into_select |
| 4242 | // Rule: fold_binop_into_select |
| 4243 | if (!RuleConfig->isRuleDisabled(106)) { |
| 4244 | if (1 |
| 4245 | && [&]() { |
| 4246 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4247 | return true; |
| 4248 | }() ) { |
| 4249 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4250 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4251 | return true; |
| 4252 | } |
| 4253 | } |
| 4254 | return false; |
| 4255 | } |
| 4256 | if (Partition == 77 /* TargetOpcode::G_UMIN */) { |
| 4257 | // Leaf name: fold_binop_into_select |
| 4258 | // Rule: fold_binop_into_select |
| 4259 | if (!RuleConfig->isRuleDisabled(106)) { |
| 4260 | if (1 |
| 4261 | && [&]() { |
| 4262 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4263 | return true; |
| 4264 | }() ) { |
| 4265 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4266 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4267 | return true; |
| 4268 | } |
| 4269 | } |
| 4270 | return false; |
| 4271 | } |
| 4272 | if (Partition == 78 /* TargetOpcode::G_UMAX */) { |
| 4273 | // Leaf name: fold_binop_into_select |
| 4274 | // Rule: fold_binop_into_select |
| 4275 | if (!RuleConfig->isRuleDisabled(106)) { |
| 4276 | if (1 |
| 4277 | && [&]() { |
| 4278 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4279 | return true; |
| 4280 | }() ) { |
| 4281 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4282 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4283 | return true; |
| 4284 | } |
| 4285 | } |
| 4286 | return false; |
| 4287 | } |
| 4288 | if (Partition == 79 /* TargetOpcode::G_FREM */) { |
| 4289 | // Leaf name: fold_binop_into_select |
| 4290 | // Rule: fold_binop_into_select |
| 4291 | if (!RuleConfig->isRuleDisabled(106)) { |
| 4292 | if (1 |
| 4293 | && [&]() { |
| 4294 | return Helper.matchFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4295 | return true; |
| 4296 | }() ) { |
| 4297 | LLVM_DEBUG(dbgs() << "Applying rule 'fold_binop_into_select'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("amdgpu-prelegalizer-combiner")) { dbgs() << "Applying rule 'fold_binop_into_select'\n" ; } } while (false); |
| 4298 | return Helper.applyFoldBinOpIntoSelect(*MIs[0], MatchData106); |
| 4299 | return true; |
| 4300 | } |
| 4301 | } |
| 4302 | return false; |
| 4303 | } |
| 4304 | |
| 4305 | return false; |
| 4306 | } |
| 4307 | #endif // ifdef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP |