Bug Summary

File:lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
Warning:line 90, column 23
1st function call argument is an uninitialized value

Annotated Source Code

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clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name AMDGPUTargetStreamer.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -mrelocation-model pic -pic-level 2 -mthread-model posix -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu x86-64 -dwarf-column-info -debugger-tuning=gdb -momit-leaf-frame-pointer -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-8/lib/clang/8.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/lib/Target/AMDGPU/MCTargetDesc -I /build/llvm-toolchain-snapshot-8~svn345461/lib/Target/AMDGPU/MCTargetDesc -I /build/llvm-toolchain-snapshot-8~svn345461/lib/Target/AMDGPU -I /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/lib/Target/AMDGPU -I /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/include -I /build/llvm-toolchain-snapshot-8~svn345461/include -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/backward -internal-isystem /usr/include/clang/8.0.0/include/ -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-8/lib/clang/8.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++11 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/lib/Target/AMDGPU/MCTargetDesc -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -o /tmp/scan-build-2018-10-27-211344-32123-1 -x c++ /build/llvm-toolchain-snapshot-8~svn345461/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp -faddrsig
1//===-- AMDGPUTargetStreamer.cpp - Mips Target Streamer Methods -----------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file provides AMDGPU specific target streamer methods.
11//
12//===----------------------------------------------------------------------===//
13
14#include "AMDGPUTargetStreamer.h"
15#include "AMDGPU.h"
16#include "SIDefines.h"
17#include "Utils/AMDGPUBaseInfo.h"
18#include "Utils/AMDKernelCodeTUtils.h"
19#include "llvm/ADT/Twine.h"
20#include "llvm/BinaryFormat/ELF.h"
21#include "llvm/IR/Constants.h"
22#include "llvm/IR/Function.h"
23#include "llvm/IR/Metadata.h"
24#include "llvm/IR/Module.h"
25#include "llvm/MC/MCContext.h"
26#include "llvm/MC/MCELFStreamer.h"
27#include "llvm/MC/MCObjectFileInfo.h"
28#include "llvm/MC/MCSectionELF.h"
29#include "llvm/Support/FormattedStream.h"
30#include "llvm/Support/TargetParser.h"
31
32namespace llvm {
33#include "AMDGPUPTNote.h"
34}
35
36using namespace llvm;
37using namespace llvm::AMDGPU;
38
39//===----------------------------------------------------------------------===//
40// AMDGPUTargetStreamer
41//===----------------------------------------------------------------------===//
42
43bool AMDGPUTargetStreamer::EmitHSAMetadata(StringRef HSAMetadataString) {
44 HSAMD::Metadata HSAMetadata;
45 if (HSAMD::fromString(HSAMetadataString, HSAMetadata))
46 return false;
47
48 return EmitHSAMetadata(HSAMetadata);
49}
50
51StringRef AMDGPUTargetStreamer::getArchNameFromElfMach(unsigned ElfMach) {
52 AMDGPU::GPUKind AK;
1
'AK' declared without an initial value
→
53
54 switch (ElfMach) {
2
←
'Default' branch taken. Execution continues on line 90
→
55 case ELF::EF_AMDGPU_MACH_R600_R600: AK = GK_R600; break;
56 case ELF::EF_AMDGPU_MACH_R600_R630: AK = GK_R630; break;
57 case ELF::EF_AMDGPU_MACH_R600_RS880: AK = GK_RS880; break;
58 case ELF::EF_AMDGPU_MACH_R600_RV670: AK = GK_RV670; break;
59 case ELF::EF_AMDGPU_MACH_R600_RV710: AK = GK_RV710; break;
60 case ELF::EF_AMDGPU_MACH_R600_RV730: AK = GK_RV730; break;
61 case ELF::EF_AMDGPU_MACH_R600_RV770: AK = GK_RV770; break;
62 case ELF::EF_AMDGPU_MACH_R600_CEDAR: AK = GK_CEDAR; break;
63 case ELF::EF_AMDGPU_MACH_R600_CYPRESS: AK = GK_CYPRESS; break;
64 case ELF::EF_AMDGPU_MACH_R600_JUNIPER: AK = GK_JUNIPER; break;
65 case ELF::EF_AMDGPU_MACH_R600_REDWOOD: AK = GK_REDWOOD; break;
66 case ELF::EF_AMDGPU_MACH_R600_SUMO: AK = GK_SUMO; break;
67 case ELF::EF_AMDGPU_MACH_R600_BARTS: AK = GK_BARTS; break;
68 case ELF::EF_AMDGPU_MACH_R600_CAICOS: AK = GK_CAICOS; break;
69 case ELF::EF_AMDGPU_MACH_R600_CAYMAN: AK = GK_CAYMAN; break;
70 case ELF::EF_AMDGPU_MACH_R600_TURKS: AK = GK_TURKS; break;
71 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX600: AK = GK_GFX600; break;
72 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX601: AK = GK_GFX601; break;
73 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX700: AK = GK_GFX700; break;
74 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX701: AK = GK_GFX701; break;
75 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX702: AK = GK_GFX702; break;
76 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX703: AK = GK_GFX703; break;
77 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX704: AK = GK_GFX704; break;
78 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX801: AK = GK_GFX801; break;
79 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX802: AK = GK_GFX802; break;
80 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX803: AK = GK_GFX803; break;
81 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX810: AK = GK_GFX810; break;
82 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX900: AK = GK_GFX900; break;
83 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX902: AK = GK_GFX902; break;
84 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX904: AK = GK_GFX904; break;
85 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX906: AK = GK_GFX906; break;
86 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX909: AK = GK_GFX909; break;
87 case ELF::EF_AMDGPU_MACH_NONE: AK = GK_NONE; break;
88 }
89
90 StringRef GPUName = getArchNameAMDGCN(AK);
3
←
1st function call argument is an uninitialized value
91 if (GPUName != "")
92 return GPUName;
93 return getArchNameR600(AK);
94}
95
96unsigned AMDGPUTargetStreamer::getElfMach(StringRef GPU) {
97 AMDGPU::GPUKind AK = parseArchAMDGCN(GPU);
98 if (AK == AMDGPU::GPUKind::GK_NONE)
99 AK = parseArchR600(GPU);
100
101 switch (AK) {
102 case GK_R600: return ELF::EF_AMDGPU_MACH_R600_R600;
103 case GK_R630: return ELF::EF_AMDGPU_MACH_R600_R630;
104 case GK_RS880: return ELF::EF_AMDGPU_MACH_R600_RS880;
105 case GK_RV670: return ELF::EF_AMDGPU_MACH_R600_RV670;
106 case GK_RV710: return ELF::EF_AMDGPU_MACH_R600_RV710;
107 case GK_RV730: return ELF::EF_AMDGPU_MACH_R600_RV730;
108 case GK_RV770: return ELF::EF_AMDGPU_MACH_R600_RV770;
109 case GK_CEDAR: return ELF::EF_AMDGPU_MACH_R600_CEDAR;
110 case GK_CYPRESS: return ELF::EF_AMDGPU_MACH_R600_CYPRESS;
111 case GK_JUNIPER: return ELF::EF_AMDGPU_MACH_R600_JUNIPER;
112 case GK_REDWOOD: return ELF::EF_AMDGPU_MACH_R600_REDWOOD;
113 case GK_SUMO: return ELF::EF_AMDGPU_MACH_R600_SUMO;
114 case GK_BARTS: return ELF::EF_AMDGPU_MACH_R600_BARTS;
115 case GK_CAICOS: return ELF::EF_AMDGPU_MACH_R600_CAICOS;
116 case GK_CAYMAN: return ELF::EF_AMDGPU_MACH_R600_CAYMAN;
117 case GK_TURKS: return ELF::EF_AMDGPU_MACH_R600_TURKS;
118 case GK_GFX600: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX600;
119 case GK_GFX601: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX601;
120 case GK_GFX700: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX700;
121 case GK_GFX701: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX701;
122 case GK_GFX702: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX702;
123 case GK_GFX703: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX703;
124 case GK_GFX704: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX704;
125 case GK_GFX801: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX801;
126 case GK_GFX802: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX802;
127 case GK_GFX803: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX803;
128 case GK_GFX810: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX810;
129 case GK_GFX900: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX900;
130 case GK_GFX902: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX902;
131 case GK_GFX904: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX904;
132 case GK_GFX906: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX906;
133 case GK_GFX909: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX909;
134 case GK_NONE: return ELF::EF_AMDGPU_MACH_NONE;
135 }
136
137 llvm_unreachable("unknown GPU")::llvm::llvm_unreachable_internal("unknown GPU", "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp"
, 137);
138}
139
140//===----------------------------------------------------------------------===//
141// AMDGPUTargetAsmStreamer
142//===----------------------------------------------------------------------===//
143
144AMDGPUTargetAsmStreamer::AMDGPUTargetAsmStreamer(MCStreamer &S,
145 formatted_raw_ostream &OS)
146 : AMDGPUTargetStreamer(S), OS(OS) { }
147
148void AMDGPUTargetAsmStreamer::EmitDirectiveAMDGCNTarget(StringRef Target) {
149 OS << "\t.amdgcn_target \"" << Target << "\"\n";
150}
151
152void AMDGPUTargetAsmStreamer::EmitDirectiveHSACodeObjectVersion(
153 uint32_t Major, uint32_t Minor) {
154 OS << "\t.hsa_code_object_version " <<
155 Twine(Major) << "," << Twine(Minor) << '\n';
156}
157
158void
159AMDGPUTargetAsmStreamer::EmitDirectiveHSACodeObjectISA(uint32_t Major,
160 uint32_t Minor,
161 uint32_t Stepping,
162 StringRef VendorName,
163 StringRef ArchName) {
164 OS << "\t.hsa_code_object_isa " <<
165 Twine(Major) << "," << Twine(Minor) << "," << Twine(Stepping) <<
166 ",\"" << VendorName << "\",\"" << ArchName << "\"\n";
167
168}
169
170void
171AMDGPUTargetAsmStreamer::EmitAMDKernelCodeT(const amd_kernel_code_t &Header) {
172 OS << "\t.amd_kernel_code_t\n";
173 dumpAmdKernelCode(&Header, OS, "\t\t");
174 OS << "\t.end_amd_kernel_code_t\n";
175}
176
177void AMDGPUTargetAsmStreamer::EmitAMDGPUSymbolType(StringRef SymbolName,
178 unsigned Type) {
179 switch (Type) {
180 default: llvm_unreachable("Invalid AMDGPU symbol type")::llvm::llvm_unreachable_internal("Invalid AMDGPU symbol type"
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp"
, 180);
181 case ELF::STT_AMDGPU_HSA_KERNEL:
182 OS << "\t.amdgpu_hsa_kernel " << SymbolName << '\n' ;
183 break;
184 }
185}
186
187bool AMDGPUTargetAsmStreamer::EmitISAVersion(StringRef IsaVersionString) {
188 OS << "\t.amd_amdgpu_isa \"" << IsaVersionString << "\"\n";
189 return true;
190}
191
192bool AMDGPUTargetAsmStreamer::EmitHSAMetadata(
193 const AMDGPU::HSAMD::Metadata &HSAMetadata) {
194 std::string HSAMetadataString;
195 if (HSAMD::toString(HSAMetadata, HSAMetadataString))
196 return false;
197
198 OS << '\t' << HSAMD::AssemblerDirectiveBegin << '\n';
199 OS << HSAMetadataString << '\n';
200 OS << '\t' << HSAMD::AssemblerDirectiveEnd << '\n';
201 return true;
202}
203
204bool AMDGPUTargetAsmStreamer::EmitPALMetadata(
205 const PALMD::Metadata &PALMetadata) {
206 std::string PALMetadataString;
207 if (PALMD::toString(PALMetadata, PALMetadataString))
208 return false;
209
210 OS << '\t' << PALMD::AssemblerDirective << PALMetadataString << '\n';
211 return true;
212}
213
214void AMDGPUTargetAsmStreamer::EmitAmdhsaKernelDescriptor(
215 const MCSubtargetInfo &STI, StringRef KernelName,
216 const amdhsa::kernel_descriptor_t &KD, uint64_t NextVGPR, uint64_t NextSGPR,
217 bool ReserveVCC, bool ReserveFlatScr, bool ReserveXNACK) {
218 IsaVersion IVersion = getIsaVersion(STI.getCPU());
219
220 OS << "\t.amdhsa_kernel " << KernelName << '\n';
221
222#define PRINT_FIELD(STREAM, DIRECTIVE, KERNEL_DESC, MEMBER_NAME, FIELD_NAME) \
223 STREAM << "\t\t" << DIRECTIVE << " " \
224 << AMDHSA_BITS_GET(KERNEL_DESC.MEMBER_NAME, FIELD_NAME)((KERNEL_DESC.MEMBER_NAME & FIELD_NAME) >> FIELD_NAME_SHIFT
) << '\n';
225
226 OS << "\t\t.amdhsa_group_segment_fixed_size " << KD.group_segment_fixed_size
227 << '\n';
228 OS << "\t\t.amdhsa_private_segment_fixed_size "
229 << KD.private_segment_fixed_size << '\n';
230
231 PRINT_FIELD(OS, ".amdhsa_user_sgpr_private_segment_buffer", KD,
232 kernel_code_properties,
233 amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER);
234 PRINT_FIELD(OS, ".amdhsa_user_sgpr_dispatch_ptr", KD,
235 kernel_code_properties,
236 amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR);
237 PRINT_FIELD(OS, ".amdhsa_user_sgpr_queue_ptr", KD,
238 kernel_code_properties,
239 amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR);
240 PRINT_FIELD(OS, ".amdhsa_user_sgpr_kernarg_segment_ptr", KD,
241 kernel_code_properties,
242 amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR);
243 PRINT_FIELD(OS, ".amdhsa_user_sgpr_dispatch_id", KD,
244 kernel_code_properties,
245 amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID);
246 PRINT_FIELD(OS, ".amdhsa_user_sgpr_flat_scratch_init", KD,
247 kernel_code_properties,
248 amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT);
249 PRINT_FIELD(OS, ".amdhsa_user_sgpr_private_segment_size", KD,
250 kernel_code_properties,
251 amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE);
252 PRINT_FIELD(
253 OS, ".amdhsa_system_sgpr_private_segment_wavefront_offset", KD,
254 compute_pgm_rsrc2,
255 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_SGPR_PRIVATE_SEGMENT_WAVEFRONT_OFFSET);
256 PRINT_FIELD(OS, ".amdhsa_system_sgpr_workgroup_id_x", KD,
257 compute_pgm_rsrc2,
258 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_X);
259 PRINT_FIELD(OS, ".amdhsa_system_sgpr_workgroup_id_y", KD,
260 compute_pgm_rsrc2,
261 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Y);
262 PRINT_FIELD(OS, ".amdhsa_system_sgpr_workgroup_id_z", KD,
263 compute_pgm_rsrc2,
264 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Z);
265 PRINT_FIELD(OS, ".amdhsa_system_sgpr_workgroup_info", KD,
266 compute_pgm_rsrc2,
267 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_INFO);
268 PRINT_FIELD(OS, ".amdhsa_system_vgpr_workitem_id", KD,
269 compute_pgm_rsrc2,
270 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_VGPR_WORKITEM_ID);
271
272 // These directives are required.
273 OS << "\t\t.amdhsa_next_free_vgpr " << NextVGPR << '\n';
274 OS << "\t\t.amdhsa_next_free_sgpr " << NextSGPR << '\n';
275
276 if (!ReserveVCC)
277 OS << "\t\t.amdhsa_reserve_vcc " << ReserveVCC << '\n';
278 if (IVersion.Major >= 7 && !ReserveFlatScr)
279 OS << "\t\t.amdhsa_reserve_flat_scratch " << ReserveFlatScr << '\n';
280 if (IVersion.Major >= 8 && ReserveXNACK != hasXNACK(STI))
281 OS << "\t\t.amdhsa_reserve_xnack_mask " << ReserveXNACK << '\n';
282
283 PRINT_FIELD(OS, ".amdhsa_float_round_mode_32", KD,
284 compute_pgm_rsrc1,
285 amdhsa::COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_32);
286 PRINT_FIELD(OS, ".amdhsa_float_round_mode_16_64", KD,
287 compute_pgm_rsrc1,
288 amdhsa::COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_16_64);
289 PRINT_FIELD(OS, ".amdhsa_float_denorm_mode_32", KD,
290 compute_pgm_rsrc1,
291 amdhsa::COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_32);
292 PRINT_FIELD(OS, ".amdhsa_float_denorm_mode_16_64", KD,
293 compute_pgm_rsrc1,
294 amdhsa::COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_16_64);
295 PRINT_FIELD(OS, ".amdhsa_dx10_clamp", KD,
296 compute_pgm_rsrc1,
297 amdhsa::COMPUTE_PGM_RSRC1_ENABLE_DX10_CLAMP);
298 PRINT_FIELD(OS, ".amdhsa_ieee_mode", KD,
299 compute_pgm_rsrc1,
300 amdhsa::COMPUTE_PGM_RSRC1_ENABLE_IEEE_MODE);
301 if (IVersion.Major >= 9)
302 PRINT_FIELD(OS, ".amdhsa_fp16_overflow", KD,
303 compute_pgm_rsrc1,
304 amdhsa::COMPUTE_PGM_RSRC1_FP16_OVFL);
305 PRINT_FIELD(
306 OS, ".amdhsa_exception_fp_ieee_invalid_op", KD,
307 compute_pgm_rsrc2,
308 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INVALID_OPERATION);
309 PRINT_FIELD(OS, ".amdhsa_exception_fp_denorm_src", KD,
310 compute_pgm_rsrc2,
311 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_FP_DENORMAL_SOURCE);
312 PRINT_FIELD(
313 OS, ".amdhsa_exception_fp_ieee_div_zero", KD,
314 compute_pgm_rsrc2,
315 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_DIVISION_BY_ZERO);
316 PRINT_FIELD(OS, ".amdhsa_exception_fp_ieee_overflow", KD,
317 compute_pgm_rsrc2,
318 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_OVERFLOW);
319 PRINT_FIELD(OS, ".amdhsa_exception_fp_ieee_underflow", KD,
320 compute_pgm_rsrc2,
321 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_UNDERFLOW);
322 PRINT_FIELD(OS, ".amdhsa_exception_fp_ieee_inexact", KD,
323 compute_pgm_rsrc2,
324 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INEXACT);
325 PRINT_FIELD(OS, ".amdhsa_exception_int_div_zero", KD,
326 compute_pgm_rsrc2,
327 amdhsa::COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_INT_DIVIDE_BY_ZERO);
328#undef PRINT_FIELD
329
330 OS << "\t.end_amdhsa_kernel\n";
331}
332
333//===----------------------------------------------------------------------===//
334// AMDGPUTargetELFStreamer
335//===----------------------------------------------------------------------===//
336
337AMDGPUTargetELFStreamer::AMDGPUTargetELFStreamer(
338 MCStreamer &S, const MCSubtargetInfo &STI)
339 : AMDGPUTargetStreamer(S), Streamer(S) {
340 MCAssembler &MCA = getStreamer().getAssembler();
341 unsigned EFlags = MCA.getELFHeaderEFlags();
342
343 EFlags &= ~ELF::EF_AMDGPU_MACH;
344 EFlags |= getElfMach(STI.getCPU());
345
346 EFlags &= ~ELF::EF_AMDGPU_XNACK;
347 if (AMDGPU::hasXNACK(STI))
348 EFlags |= ELF::EF_AMDGPU_XNACK;
349
350 MCA.setELFHeaderEFlags(EFlags);
351}
352
353MCELFStreamer &AMDGPUTargetELFStreamer::getStreamer() {
354 return static_cast<MCELFStreamer &>(Streamer);
355}
356
357void AMDGPUTargetELFStreamer::EmitAMDGPUNote(
358 const MCExpr *DescSZ, unsigned NoteType,
359 function_ref<void(MCELFStreamer &)> EmitDesc) {
360 auto &S = getStreamer();
361 auto &Context = S.getContext();
362
363 auto NameSZ = sizeof(ElfNote::NoteName);
364
365 S.PushSection();
366 S.SwitchSection(Context.getELFSection(
367 ElfNote::SectionName, ELF::SHT_NOTE, ELF::SHF_ALLOC));
368 S.EmitIntValue(NameSZ, 4); // namesz
369 S.EmitValue(DescSZ, 4); // descz
370 S.EmitIntValue(NoteType, 4); // type
371 S.EmitBytes(StringRef(ElfNote::NoteName, NameSZ)); // name
372 S.EmitValueToAlignment(4, 0, 1, 0); // padding 0
373 EmitDesc(S); // desc
374 S.EmitValueToAlignment(4, 0, 1, 0); // padding 0
375 S.PopSection();
376}
377
378void AMDGPUTargetELFStreamer::EmitDirectiveAMDGCNTarget(StringRef Target) {}
379
380void AMDGPUTargetELFStreamer::EmitDirectiveHSACodeObjectVersion(
381 uint32_t Major, uint32_t Minor) {
382
383 EmitAMDGPUNote(
384 MCConstantExpr::create(8, getContext()),
385 ElfNote::NT_AMDGPU_HSA_CODE_OBJECT_VERSION,
386 [&](MCELFStreamer &OS){
387 OS.EmitIntValue(Major, 4);
388 OS.EmitIntValue(Minor, 4);
389 }
390 );
391}
392
393void
394AMDGPUTargetELFStreamer::EmitDirectiveHSACodeObjectISA(uint32_t Major,
395 uint32_t Minor,
396 uint32_t Stepping,
397 StringRef VendorName,
398 StringRef ArchName) {
399 uint16_t VendorNameSize = VendorName.size() + 1;
400 uint16_t ArchNameSize = ArchName.size() + 1;
401
402 unsigned DescSZ = sizeof(VendorNameSize) + sizeof(ArchNameSize) +
403 sizeof(Major) + sizeof(Minor) + sizeof(Stepping) +
404 VendorNameSize + ArchNameSize;
405
406 EmitAMDGPUNote(
407 MCConstantExpr::create(DescSZ, getContext()),
408 ElfNote::NT_AMDGPU_HSA_ISA,
409 [&](MCELFStreamer &OS) {
410 OS.EmitIntValue(VendorNameSize, 2);
411 OS.EmitIntValue(ArchNameSize, 2);
412 OS.EmitIntValue(Major, 4);
413 OS.EmitIntValue(Minor, 4);
414 OS.EmitIntValue(Stepping, 4);
415 OS.EmitBytes(VendorName);
416 OS.EmitIntValue(0, 1); // NULL terminate VendorName
417 OS.EmitBytes(ArchName);
418 OS.EmitIntValue(0, 1); // NULL terminte ArchName
419 }
420 );
421}
422
423void
424AMDGPUTargetELFStreamer::EmitAMDKernelCodeT(const amd_kernel_code_t &Header) {
425
426 MCStreamer &OS = getStreamer();
427 OS.PushSection();
428 OS.EmitBytes(StringRef((const char*)&Header, sizeof(Header)));
429 OS.PopSection();
430}
431
432void AMDGPUTargetELFStreamer::EmitAMDGPUSymbolType(StringRef SymbolName,
433 unsigned Type) {
434 MCSymbolELF *Symbol = cast<MCSymbolELF>(
435 getStreamer().getContext().getOrCreateSymbol(SymbolName));
436 Symbol->setType(Type);
437}
438
439bool AMDGPUTargetELFStreamer::EmitISAVersion(StringRef IsaVersionString) {
440 // Create two labels to mark the beginning and end of the desc field
441 // and a MCExpr to calculate the size of the desc field.
442 auto &Context = getContext();
443 auto *DescBegin = Context.createTempSymbol();
444 auto *DescEnd = Context.createTempSymbol();
445 auto *DescSZ = MCBinaryExpr::createSub(
446 MCSymbolRefExpr::create(DescEnd, Context),
447 MCSymbolRefExpr::create(DescBegin, Context), Context);
448
449 EmitAMDGPUNote(
450 DescSZ,
451 ELF::NT_AMD_AMDGPU_ISA,
452 [&](MCELFStreamer &OS) {
453 OS.EmitLabel(DescBegin);
454 OS.EmitBytes(IsaVersionString);
455 OS.EmitLabel(DescEnd);
456 }
457 );
458 return true;
459}
460
461bool AMDGPUTargetELFStreamer::EmitHSAMetadata(
462 const AMDGPU::HSAMD::Metadata &HSAMetadata) {
463 std::string HSAMetadataString;
464 if (HSAMD::toString(HSAMetadata, HSAMetadataString))
465 return false;
466
467 // Create two labels to mark the beginning and end of the desc field
468 // and a MCExpr to calculate the size of the desc field.
469 auto &Context = getContext();
470 auto *DescBegin = Context.createTempSymbol();
471 auto *DescEnd = Context.createTempSymbol();
472 auto *DescSZ = MCBinaryExpr::createSub(
473 MCSymbolRefExpr::create(DescEnd, Context),
474 MCSymbolRefExpr::create(DescBegin, Context), Context);
475
476 EmitAMDGPUNote(
477 DescSZ,
478 ELF::NT_AMD_AMDGPU_HSA_METADATA,
479 [&](MCELFStreamer &OS) {
480 OS.EmitLabel(DescBegin);
481 OS.EmitBytes(HSAMetadataString);
482 OS.EmitLabel(DescEnd);
483 }
484 );
485 return true;
486}
487
488bool AMDGPUTargetELFStreamer::EmitPALMetadata(
489 const PALMD::Metadata &PALMetadata) {
490 EmitAMDGPUNote(
491 MCConstantExpr::create(PALMetadata.size() * sizeof(uint32_t), getContext()),
492 ELF::NT_AMD_AMDGPU_PAL_METADATA,
493 [&](MCELFStreamer &OS){
494 for (auto I : PALMetadata)
495 OS.EmitIntValue(I, sizeof(uint32_t));
496 }
497 );
498 return true;
499}
500
501void AMDGPUTargetELFStreamer::EmitAmdhsaKernelDescriptor(
502 const MCSubtargetInfo &STI, StringRef KernelName,
503 const amdhsa::kernel_descriptor_t &KernelDescriptor, uint64_t NextVGPR,
504 uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr,
505 bool ReserveXNACK) {
506 auto &Streamer = getStreamer();
507 auto &Context = Streamer.getContext();
508
509 MCSymbolELF *KernelDescriptorSymbol = cast<MCSymbolELF>(
510 Context.getOrCreateSymbol(Twine(KernelName) + Twine(".kd")));
511 KernelDescriptorSymbol->setBinding(ELF::STB_GLOBAL);
512 KernelDescriptorSymbol->setType(ELF::STT_OBJECT);
513 KernelDescriptorSymbol->setSize(
514 MCConstantExpr::create(sizeof(KernelDescriptor), Context));
515
516 MCSymbolELF *KernelCodeSymbol = cast<MCSymbolELF>(
517 Context.getOrCreateSymbol(Twine(KernelName)));
518 KernelCodeSymbol->setBinding(ELF::STB_LOCAL);
519
520 Streamer.EmitLabel(KernelDescriptorSymbol);
521 Streamer.EmitBytes(StringRef(
522 (const char*)&(KernelDescriptor),
523 offsetof(amdhsa::kernel_descriptor_t, kernel_code_entry_byte_offset)__builtin_offsetof(amdhsa::kernel_descriptor_t, kernel_code_entry_byte_offset
)));
524 // FIXME: Remove the use of VK_AMDGPU_REL64 in the expression below. The
525 // expression being created is:
526 // (start of kernel code) - (start of kernel descriptor)
527 // It implies R_AMDGPU_REL64, but ends up being R_AMDGPU_ABS64.
528 Streamer.EmitValue(MCBinaryExpr::createSub(
529 MCSymbolRefExpr::create(
530 KernelCodeSymbol, MCSymbolRefExpr::VK_AMDGPU_REL64, Context),
531 MCSymbolRefExpr::create(
532 KernelDescriptorSymbol, MCSymbolRefExpr::VK_None, Context),
533 Context),
534 sizeof(KernelDescriptor.kernel_code_entry_byte_offset));
535 Streamer.EmitBytes(StringRef(
536 (const char*)&(KernelDescriptor) +
537 offsetof(amdhsa::kernel_descriptor_t, kernel_code_entry_byte_offset)__builtin_offsetof(amdhsa::kernel_descriptor_t, kernel_code_entry_byte_offset
) +
538 sizeof(KernelDescriptor.kernel_code_entry_byte_offset),
539 sizeof(KernelDescriptor) -
540 offsetof(amdhsa::kernel_descriptor_t, kernel_code_entry_byte_offset)__builtin_offsetof(amdhsa::kernel_descriptor_t, kernel_code_entry_byte_offset
) -
541 sizeof(KernelDescriptor.kernel_code_entry_byte_offset)));
542}