Bug Summary

File:include/llvm/ADT/SmallBitVector.h
Warning:line 125, column 3
Potential memory leak

Annotated Source Code

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clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name DwarfExpression.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -mrelocation-model pic -pic-level 2 -mthread-model posix -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu x86-64 -dwarf-column-info -debugger-tuning=gdb -momit-leaf-frame-pointer -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-8/lib/clang/8.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/lib/CodeGen/AsmPrinter -I /build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter -I /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/include -I /build/llvm-toolchain-snapshot-8~svn345461/include -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/backward -internal-isystem /usr/include/clang/8.0.0/include/ -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-8/lib/clang/8.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++11 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/lib/CodeGen/AsmPrinter -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -o /tmp/scan-build-2018-10-27-211344-32123-1 -x c++ /build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp -faddrsig

/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp

1//===- llvm/CodeGen/DwarfExpression.cpp - Dwarf Debug Framework -----------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains support for writing dwarf debug info into asm files.
11//
12//===----------------------------------------------------------------------===//
13
14#include "DwarfExpression.h"
15#include "llvm/ADT/APInt.h"
16#include "llvm/ADT/SmallBitVector.h"
17#include "llvm/BinaryFormat/Dwarf.h"
18#include "llvm/CodeGen/TargetRegisterInfo.h"
19#include "llvm/IR/DebugInfoMetadata.h"
20#include "llvm/Support/ErrorHandling.h"
21#include <algorithm>
22#include <cassert>
23#include <cstdint>
24
25using namespace llvm;
26
27void DwarfExpression::emitConstu(uint64_t Value) {
28 if (Value < 32)
29 emitOp(dwarf::DW_OP_lit0 + Value);
30 else if (Value == std::numeric_limits<uint64_t>::max()) {
31 // Only do this for 64-bit values as the DWARF expression stack uses
32 // target-address-size values.
33 emitOp(dwarf::DW_OP_lit0);
34 emitOp(dwarf::DW_OP_not);
35 } else {
36 emitOp(dwarf::DW_OP_constu);
37 emitUnsigned(Value);
38 }
39}
40
41void DwarfExpression::addReg(int DwarfReg, const char *Comment) {
42 assert(DwarfReg >= 0 && "invalid negative dwarf register number")((DwarfReg >= 0 && "invalid negative dwarf register number"
) ? static_cast<void> (0) : __assert_fail ("DwarfReg >= 0 && \"invalid negative dwarf register number\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 42, __PRETTY_FUNCTION__))
;
43 assert((LocationKind == Unknown || LocationKind == Register) &&(((LocationKind == Unknown || LocationKind == Register) &&
"location description already locked down") ? static_cast<
void> (0) : __assert_fail ("(LocationKind == Unknown || LocationKind == Register) && \"location description already locked down\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 44, __PRETTY_FUNCTION__))
44 "location description already locked down")(((LocationKind == Unknown || LocationKind == Register) &&
"location description already locked down") ? static_cast<
void> (0) : __assert_fail ("(LocationKind == Unknown || LocationKind == Register) && \"location description already locked down\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 44, __PRETTY_FUNCTION__))
;
45 LocationKind = Register;
46 if (DwarfReg < 32) {
47 emitOp(dwarf::DW_OP_reg0 + DwarfReg, Comment);
48 } else {
49 emitOp(dwarf::DW_OP_regx, Comment);
50 emitUnsigned(DwarfReg);
51 }
52}
53
54void DwarfExpression::addBReg(int DwarfReg, int Offset) {
55 assert(DwarfReg >= 0 && "invalid negative dwarf register number")((DwarfReg >= 0 && "invalid negative dwarf register number"
) ? static_cast<void> (0) : __assert_fail ("DwarfReg >= 0 && \"invalid negative dwarf register number\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 55, __PRETTY_FUNCTION__))
;
56 assert(LocationKind != Register && "location description already locked down")((LocationKind != Register && "location description already locked down"
) ? static_cast<void> (0) : __assert_fail ("LocationKind != Register && \"location description already locked down\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 56, __PRETTY_FUNCTION__))
;
57 if (DwarfReg < 32) {
58 emitOp(dwarf::DW_OP_breg0 + DwarfReg);
59 } else {
60 emitOp(dwarf::DW_OP_bregx);
61 emitUnsigned(DwarfReg);
62 }
63 emitSigned(Offset);
64}
65
66void DwarfExpression::addFBReg(int Offset) {
67 emitOp(dwarf::DW_OP_fbreg);
68 emitSigned(Offset);
69}
70
71void DwarfExpression::addOpPiece(unsigned SizeInBits, unsigned OffsetInBits) {
72 if (!SizeInBits)
73 return;
74
75 const unsigned SizeOfByte = 8;
76 if (OffsetInBits > 0 || SizeInBits % SizeOfByte) {
77 emitOp(dwarf::DW_OP_bit_piece);
78 emitUnsigned(SizeInBits);
79 emitUnsigned(OffsetInBits);
80 } else {
81 emitOp(dwarf::DW_OP_piece);
82 unsigned ByteSize = SizeInBits / SizeOfByte;
83 emitUnsigned(ByteSize);
84 }
85 this->OffsetInBits += SizeInBits;
86}
87
88void DwarfExpression::addShr(unsigned ShiftBy) {
89 emitConstu(ShiftBy);
90 emitOp(dwarf::DW_OP_shr);
91}
92
93void DwarfExpression::addAnd(unsigned Mask) {
94 emitConstu(Mask);
95 emitOp(dwarf::DW_OP_and);
96}
97
98bool DwarfExpression::addMachineReg(const TargetRegisterInfo &TRI,
99 unsigned MachineReg, unsigned MaxSize) {
100 if (!TRI.isPhysicalRegister(MachineReg)) {
4
Taking false branch
101 if (isFrameRegister(TRI, MachineReg)) {
102 DwarfRegs.push_back({-1, 0, nullptr});
103 return true;
104 }
105 return false;
106 }
107
108 int Reg = TRI.getDwarfRegNum(MachineReg, false);
109
110 // If this is a valid register number, emit it.
111 if (Reg >= 0) {
5
Assuming 'Reg' is < 0
6
Taking false branch
112 DwarfRegs.push_back({Reg, 0, nullptr});
113 return true;
114 }
115
116 // Walk up the super-register chain until we find a valid number.
117 // For example, EAX on x86_64 is a 32-bit fragment of RAX with offset 0.
118 for (MCSuperRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) {
7
Loop condition is false. Execution continues on line 133
119 Reg = TRI.getDwarfRegNum(*SR, false);
120 if (Reg >= 0) {
121 unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg);
122 unsigned Size = TRI.getSubRegIdxSize(Idx);
123 unsigned RegOffset = TRI.getSubRegIdxOffset(Idx);
124 DwarfRegs.push_back({Reg, 0, "super-register"});
125 // Use a DW_OP_bit_piece to describe the sub-register.
126 setSubRegisterPiece(Size, RegOffset);
127 return true;
128 }
129 }
130
131 // Otherwise, attempt to find a covering set of sub-register numbers.
132 // For example, Q0 on ARM is a composition of D0+D1.
133 unsigned CurPos = 0;
134 // The size of the register in bits.
135 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(MachineReg);
136 unsigned RegSize = TRI.getRegSizeInBits(*RC);
137 // Keep track of the bits in the register we already emitted, so we
138 // can avoid emitting redundant aliasing subregs. Because this is
139 // just doing a greedy scan of all subregisters, it is possible that
140 // this doesn't find a combination of subregisters that fully cover
141 // the register (even though one may exist).
142 SmallBitVector Coverage(RegSize, false);
143 for (MCSubRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) {
8
Loop condition is true. Entering loop body
144 unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR);
145 unsigned Size = TRI.getSubRegIdxSize(Idx);
146 unsigned Offset = TRI.getSubRegIdxOffset(Idx);
147 Reg = TRI.getDwarfRegNum(*SR, false);
148 if (Reg < 0)
9
Assuming 'Reg' is >= 0
10
Taking false branch
149 continue;
150
151 // Intersection between the bits we already emitted and the bits
152 // covered by this subregister.
153 SmallBitVector CurSubReg(RegSize, false);
11
Calling constructor for 'SmallBitVector'
14
Returning from constructor for 'SmallBitVector'
154 CurSubReg.set(Offset, Offset + Size);
15
Calling 'SmallBitVector::set'
155
156 // If this sub-register has a DWARF number and we haven't covered
157 // its range, emit a DWARF piece for it.
158 if (CurSubReg.test(Coverage)) {
159 // Emit a piece for any gap in the coverage.
160 if (Offset > CurPos)
161 DwarfRegs.push_back({-1, Offset - CurPos, "no DWARF register encoding"});
162 DwarfRegs.push_back(
163 {Reg, std::min<unsigned>(Size, MaxSize - Offset), "sub-register"});
164 if (Offset >= MaxSize)
165 break;
166
167 // Mark it as emitted.
168 Coverage.set(Offset, Offset + Size);
169 CurPos = Offset + Size;
170 }
171 }
172 // Failed to find any DWARF encoding.
173 if (CurPos == 0)
174 return false;
175 // Found a partial or complete DWARF encoding.
176 if (CurPos < RegSize)
177 DwarfRegs.push_back({-1, RegSize - CurPos, "no DWARF register encoding"});
178 return true;
179}
180
181void DwarfExpression::addStackValue() {
182 if (DwarfVersion >= 4)
183 emitOp(dwarf::DW_OP_stack_value);
184}
185
186void DwarfExpression::addSignedConstant(int64_t Value) {
187 assert(LocationKind == Implicit || LocationKind == Unknown)((LocationKind == Implicit || LocationKind == Unknown) ? static_cast
<void> (0) : __assert_fail ("LocationKind == Implicit || LocationKind == Unknown"
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 187, __PRETTY_FUNCTION__))
;
188 LocationKind = Implicit;
189 emitOp(dwarf::DW_OP_consts);
190 emitSigned(Value);
191}
192
193void DwarfExpression::addUnsignedConstant(uint64_t Value) {
194 assert(LocationKind == Implicit || LocationKind == Unknown)((LocationKind == Implicit || LocationKind == Unknown) ? static_cast
<void> (0) : __assert_fail ("LocationKind == Implicit || LocationKind == Unknown"
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 194, __PRETTY_FUNCTION__))
;
195 LocationKind = Implicit;
196 emitConstu(Value);
197}
198
199void DwarfExpression::addUnsignedConstant(const APInt &Value) {
200 assert(LocationKind == Implicit || LocationKind == Unknown)((LocationKind == Implicit || LocationKind == Unknown) ? static_cast
<void> (0) : __assert_fail ("LocationKind == Implicit || LocationKind == Unknown"
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 200, __PRETTY_FUNCTION__))
;
201 LocationKind = Implicit;
202
203 unsigned Size = Value.getBitWidth();
204 const uint64_t *Data = Value.getRawData();
205
206 // Chop it up into 64-bit pieces, because that's the maximum that
207 // addUnsignedConstant takes.
208 unsigned Offset = 0;
209 while (Offset < Size) {
210 addUnsignedConstant(*Data++);
211 if (Offset == 0 && Size <= 64)
212 break;
213 addStackValue();
214 addOpPiece(std::min(Size - Offset, 64u), Offset);
215 Offset += 64;
216 }
217}
218
219bool DwarfExpression::addMachineRegExpression(const TargetRegisterInfo &TRI,
220 DIExpressionCursor &ExprCursor,
221 unsigned MachineReg,
222 unsigned FragmentOffsetInBits) {
223 auto Fragment = ExprCursor.getFragmentInfo();
224 if (!addMachineReg(TRI, MachineReg, Fragment ? Fragment->SizeInBits : ~1U)) {
1
Assuming the condition is false
2
'?' condition is false
3
Calling 'DwarfExpression::addMachineReg'
225 LocationKind = Unknown;
226 return false;
227 }
228
229 bool HasComplexExpression = false;
230 auto Op = ExprCursor.peek();
231 if (Op && Op->getOp() != dwarf::DW_OP_LLVM_fragment)
232 HasComplexExpression = true;
233
234 // If the register can only be described by a complex expression (i.e.,
235 // multiple subregisters) it doesn't safely compose with another complex
236 // expression. For example, it is not possible to apply a DW_OP_deref
237 // operation to multiple DW_OP_pieces.
238 if (HasComplexExpression && DwarfRegs.size() > 1) {
239 DwarfRegs.clear();
240 LocationKind = Unknown;
241 return false;
242 }
243
244 // Handle simple register locations.
245 if (LocationKind != Memory && !HasComplexExpression) {
246 for (auto &Reg : DwarfRegs) {
247 if (Reg.DwarfRegNo >= 0)
248 addReg(Reg.DwarfRegNo, Reg.Comment);
249 addOpPiece(Reg.Size);
250 }
251 DwarfRegs.clear();
252 return true;
253 }
254
255 // Don't emit locations that cannot be expressed without DW_OP_stack_value.
256 if (DwarfVersion < 4)
257 if (any_of(ExprCursor, [](DIExpression::ExprOperand Op) -> bool {
258 return Op.getOp() == dwarf::DW_OP_stack_value;
259 })) {
260 DwarfRegs.clear();
261 LocationKind = Unknown;
262 return false;
263 }
264
265 assert(DwarfRegs.size() == 1)((DwarfRegs.size() == 1) ? static_cast<void> (0) : __assert_fail
("DwarfRegs.size() == 1", "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 265, __PRETTY_FUNCTION__))
;
266 auto Reg = DwarfRegs[0];
267 bool FBReg = isFrameRegister(TRI, MachineReg);
268 int SignedOffset = 0;
269 assert(Reg.Size == 0 && "subregister has same size as superregister")((Reg.Size == 0 && "subregister has same size as superregister"
) ? static_cast<void> (0) : __assert_fail ("Reg.Size == 0 && \"subregister has same size as superregister\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 269, __PRETTY_FUNCTION__))
;
270
271 // Pattern-match combinations for which more efficient representations exist.
272 // [Reg, DW_OP_plus_uconst, Offset] --> [DW_OP_breg, Offset].
273 if (Op && (Op->getOp() == dwarf::DW_OP_plus_uconst)) {
274 SignedOffset = Op->getArg(0);
275 ExprCursor.take();
276 }
277
278 // [Reg, DW_OP_constu, Offset, DW_OP_plus] --> [DW_OP_breg, Offset]
279 // [Reg, DW_OP_constu, Offset, DW_OP_minus] --> [DW_OP_breg,-Offset]
280 // If Reg is a subregister we need to mask it out before subtracting.
281 if (Op && Op->getOp() == dwarf::DW_OP_constu) {
282 auto N = ExprCursor.peekNext();
283 if (N && (N->getOp() == dwarf::DW_OP_plus ||
284 (N->getOp() == dwarf::DW_OP_minus && !SubRegisterSizeInBits))) {
285 int Offset = Op->getArg(0);
286 SignedOffset = (N->getOp() == dwarf::DW_OP_minus) ? -Offset : Offset;
287 ExprCursor.consume(2);
288 }
289 }
290
291 if (FBReg)
292 addFBReg(SignedOffset);
293 else
294 addBReg(Reg.DwarfRegNo, SignedOffset);
295 DwarfRegs.clear();
296 return true;
297}
298
299/// Assuming a well-formed expression, match "DW_OP_deref* DW_OP_LLVM_fragment?".
300static bool isMemoryLocation(DIExpressionCursor ExprCursor) {
301 while (ExprCursor) {
302 auto Op = ExprCursor.take();
303 switch (Op->getOp()) {
304 case dwarf::DW_OP_deref:
305 case dwarf::DW_OP_LLVM_fragment:
306 break;
307 default:
308 return false;
309 }
310 }
311 return true;
312}
313
314void DwarfExpression::addExpression(DIExpressionCursor &&ExprCursor,
315 unsigned FragmentOffsetInBits) {
316 // If we need to mask out a subregister, do it now, unless the next
317 // operation would emit an OpPiece anyway.
318 auto N = ExprCursor.peek();
319 if (SubRegisterSizeInBits && N && (N->getOp() != dwarf::DW_OP_LLVM_fragment))
320 maskSubRegister();
321
322 while (ExprCursor) {
323 auto Op = ExprCursor.take();
324 switch (Op->getOp()) {
325 case dwarf::DW_OP_LLVM_fragment: {
326 unsigned SizeInBits = Op->getArg(1);
327 unsigned FragmentOffset = Op->getArg(0);
328 // The fragment offset must have already been adjusted by emitting an
329 // empty DW_OP_piece / DW_OP_bit_piece before we emitted the base
330 // location.
331 assert(OffsetInBits >= FragmentOffset && "fragment offset not added?")((OffsetInBits >= FragmentOffset && "fragment offset not added?"
) ? static_cast<void> (0) : __assert_fail ("OffsetInBits >= FragmentOffset && \"fragment offset not added?\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 331, __PRETTY_FUNCTION__))
;
332
333 // If addMachineReg already emitted DW_OP_piece operations to represent
334 // a super-register by splicing together sub-registers, subtract the size
335 // of the pieces that was already emitted.
336 SizeInBits -= OffsetInBits - FragmentOffset;
337
338 // If addMachineReg requested a DW_OP_bit_piece to stencil out a
339 // sub-register that is smaller than the current fragment's size, use it.
340 if (SubRegisterSizeInBits)
341 SizeInBits = std::min<unsigned>(SizeInBits, SubRegisterSizeInBits);
342
343 // Emit a DW_OP_stack_value for implicit location descriptions.
344 if (LocationKind == Implicit)
345 addStackValue();
346
347 // Emit the DW_OP_piece.
348 addOpPiece(SizeInBits, SubRegisterOffsetInBits);
349 setSubRegisterPiece(0, 0);
350 // Reset the location description kind.
351 LocationKind = Unknown;
352 return;
353 }
354 case dwarf::DW_OP_plus_uconst:
355 assert(LocationKind != Register)((LocationKind != Register) ? static_cast<void> (0) : __assert_fail
("LocationKind != Register", "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 355, __PRETTY_FUNCTION__))
;
356 emitOp(dwarf::DW_OP_plus_uconst);
357 emitUnsigned(Op->getArg(0));
358 break;
359 case dwarf::DW_OP_plus:
360 case dwarf::DW_OP_minus:
361 case dwarf::DW_OP_mul:
362 case dwarf::DW_OP_div:
363 case dwarf::DW_OP_mod:
364 case dwarf::DW_OP_or:
365 case dwarf::DW_OP_and:
366 case dwarf::DW_OP_xor:
367 case dwarf::DW_OP_shl:
368 case dwarf::DW_OP_shr:
369 case dwarf::DW_OP_shra:
370 case dwarf::DW_OP_lit0:
371 case dwarf::DW_OP_not:
372 case dwarf::DW_OP_dup:
373 emitOp(Op->getOp());
374 break;
375 case dwarf::DW_OP_deref:
376 assert(LocationKind != Register)((LocationKind != Register) ? static_cast<void> (0) : __assert_fail
("LocationKind != Register", "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 376, __PRETTY_FUNCTION__))
;
377 if (LocationKind != Memory && ::isMemoryLocation(ExprCursor))
378 // Turning this into a memory location description makes the deref
379 // implicit.
380 LocationKind = Memory;
381 else
382 emitOp(dwarf::DW_OP_deref);
383 break;
384 case dwarf::DW_OP_constu:
385 assert(LocationKind != Register)((LocationKind != Register) ? static_cast<void> (0) : __assert_fail
("LocationKind != Register", "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 385, __PRETTY_FUNCTION__))
;
386 emitConstu(Op->getArg(0));
387 break;
388 case dwarf::DW_OP_stack_value:
389 LocationKind = Implicit;
390 break;
391 case dwarf::DW_OP_swap:
392 assert(LocationKind != Register)((LocationKind != Register) ? static_cast<void> (0) : __assert_fail
("LocationKind != Register", "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 392, __PRETTY_FUNCTION__))
;
393 emitOp(dwarf::DW_OP_swap);
394 break;
395 case dwarf::DW_OP_xderef:
396 assert(LocationKind != Register)((LocationKind != Register) ? static_cast<void> (0) : __assert_fail
("LocationKind != Register", "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 396, __PRETTY_FUNCTION__))
;
397 emitOp(dwarf::DW_OP_xderef);
398 break;
399 default:
400 llvm_unreachable("unhandled opcode found in expression")::llvm::llvm_unreachable_internal("unhandled opcode found in expression"
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 400)
;
401 }
402 }
403
404 if (LocationKind == Implicit)
405 // Turn this into an implicit location description.
406 addStackValue();
407}
408
409/// add masking operations to stencil out a subregister.
410void DwarfExpression::maskSubRegister() {
411 assert(SubRegisterSizeInBits && "no subregister was registered")((SubRegisterSizeInBits && "no subregister was registered"
) ? static_cast<void> (0) : __assert_fail ("SubRegisterSizeInBits && \"no subregister was registered\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 411, __PRETTY_FUNCTION__))
;
412 if (SubRegisterOffsetInBits > 0)
413 addShr(SubRegisterOffsetInBits);
414 uint64_t Mask = (1ULL << (uint64_t)SubRegisterSizeInBits) - 1ULL;
415 addAnd(Mask);
416}
417
418void DwarfExpression::finalize() {
419 assert(DwarfRegs.size() == 0 && "dwarf registers not emitted")((DwarfRegs.size() == 0 && "dwarf registers not emitted"
) ? static_cast<void> (0) : __assert_fail ("DwarfRegs.size() == 0 && \"dwarf registers not emitted\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 419, __PRETTY_FUNCTION__))
;
420 // Emit any outstanding DW_OP_piece operations to mask out subregisters.
421 if (SubRegisterSizeInBits == 0)
422 return;
423 // Don't emit a DW_OP_piece for a subregister at offset 0.
424 if (SubRegisterOffsetInBits == 0)
425 return;
426 addOpPiece(SubRegisterSizeInBits, SubRegisterOffsetInBits);
427}
428
429void DwarfExpression::addFragmentOffset(const DIExpression *Expr) {
430 if (!Expr || !Expr->isFragment())
431 return;
432
433 uint64_t FragmentOffset = Expr->getFragmentInfo()->OffsetInBits;
434 assert(FragmentOffset >= OffsetInBits &&((FragmentOffset >= OffsetInBits && "overlapping or duplicate fragments"
) ? static_cast<void> (0) : __assert_fail ("FragmentOffset >= OffsetInBits && \"overlapping or duplicate fragments\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 435, __PRETTY_FUNCTION__))
435 "overlapping or duplicate fragments")((FragmentOffset >= OffsetInBits && "overlapping or duplicate fragments"
) ? static_cast<void> (0) : __assert_fail ("FragmentOffset >= OffsetInBits && \"overlapping or duplicate fragments\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/CodeGen/AsmPrinter/DwarfExpression.cpp"
, 435, __PRETTY_FUNCTION__))
;
436 if (FragmentOffset > OffsetInBits)
437 addOpPiece(FragmentOffset - OffsetInBits);
438 OffsetInBits = FragmentOffset;
439}

/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h

1//===- llvm/ADT/SmallBitVector.h - 'Normally small' bit vectors -*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the SmallBitVector class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_ADT_SMALLBITVECTOR_H
15#define LLVM_ADT_SMALLBITVECTOR_H
16
17#include "llvm/ADT/BitVector.h"
18#include "llvm/ADT/iterator_range.h"
19#include "llvm/Support/MathExtras.h"
20#include <algorithm>
21#include <cassert>
22#include <climits>
23#include <cstddef>
24#include <cstdint>
25#include <limits>
26#include <utility>
27
28namespace llvm {
29
30/// This is a 'bitvector' (really, a variable-sized bit array), optimized for
31/// the case when the array is small. It contains one pointer-sized field, which
32/// is directly used as a plain collection of bits when possible, or as a
33/// pointer to a larger heap-allocated array when necessary. This allows normal
34/// "small" cases to be fast without losing generality for large inputs.
35class SmallBitVector {
36 // TODO: In "large" mode, a pointer to a BitVector is used, leading to an
37 // unnecessary level of indirection. It would be more efficient to use a
38 // pointer to memory containing size, allocation size, and the array of bits.
39 uintptr_t X = 1;
40
41 enum {
42 // The number of bits in this class.
43 NumBaseBits = sizeof(uintptr_t) * CHAR_BIT8,
44
45 // One bit is used to discriminate between small and large mode. The
46 // remaining bits are used for the small-mode representation.
47 SmallNumRawBits = NumBaseBits - 1,
48
49 // A few more bits are used to store the size of the bit set in small mode.
50 // Theoretically this is a ceil-log2. These bits are encoded in the most
51 // significant bits of the raw bits.
52 SmallNumSizeBits = (NumBaseBits == 32 ? 5 :
53 NumBaseBits == 64 ? 6 :
54 SmallNumRawBits),
55
56 // The remaining bits are used to store the actual set in small mode.
57 SmallNumDataBits = SmallNumRawBits - SmallNumSizeBits
58 };
59
60 static_assert(NumBaseBits == 64 || NumBaseBits == 32,
61 "Unsupported word size");
62
63public:
64 using size_type = unsigned;
65
66 // Encapsulation of a single bit.
67 class reference {
68 SmallBitVector &TheVector;
69 unsigned BitPos;
70
71 public:
72 reference(SmallBitVector &b, unsigned Idx) : TheVector(b), BitPos(Idx) {}
73
74 reference(const reference&) = default;
75
76 reference& operator=(reference t) {
77 *this = bool(t);
78 return *this;
79 }
80
81 reference& operator=(bool t) {
82 if (t)
83 TheVector.set(BitPos);
84 else
85 TheVector.reset(BitPos);
86 return *this;
87 }
88
89 operator bool() const {
90 return const_cast<const SmallBitVector &>(TheVector).operator[](BitPos);
91 }
92 };
93
94private:
95 bool isSmall() const {
96 return X & uintptr_t(1);
97 }
98
99 BitVector *getPointer() const {
100 assert(!isSmall())((!isSmall()) ? static_cast<void> (0) : __assert_fail (
"!isSmall()", "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 100, __PRETTY_FUNCTION__))
;
101 return reinterpret_cast<BitVector *>(X);
102 }
103
104 void switchToSmall(uintptr_t NewSmallBits, size_t NewSize) {
105 X = 1;
106 setSmallSize(NewSize);
107 setSmallBits(NewSmallBits);
108 }
109
110 void switchToLarge(BitVector *BV) {
111 X = reinterpret_cast<uintptr_t>(BV);
112 assert(!isSmall() && "Tried to use an unaligned pointer")((!isSmall() && "Tried to use an unaligned pointer") ?
static_cast<void> (0) : __assert_fail ("!isSmall() && \"Tried to use an unaligned pointer\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 112, __PRETTY_FUNCTION__))
;
113 }
114
115 // Return all the bits used for the "small" representation; this includes
116 // bits for the size as well as the element bits.
117 uintptr_t getSmallRawBits() const {
118 assert(isSmall())((isSmall()) ? static_cast<void> (0) : __assert_fail ("isSmall()"
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 118, __PRETTY_FUNCTION__))
;
119 return X >> 1;
120 }
121
122 void setSmallRawBits(uintptr_t NewRawBits) {
123 assert(isSmall())((isSmall()) ? static_cast<void> (0) : __assert_fail ("isSmall()"
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 123, __PRETTY_FUNCTION__))
;
124 X = (NewRawBits << 1) | uintptr_t(1);
125 }
21
Potential memory leak
126
127 // Return the size.
128 size_t getSmallSize() const { return getSmallRawBits() >> SmallNumDataBits; }
129
130 void setSmallSize(size_t Size) {
131 setSmallRawBits(getSmallBits() | (Size << SmallNumDataBits));
132 }
133
134 // Return the element bits.
135 uintptr_t getSmallBits() const {
136 return getSmallRawBits() & ~(~uintptr_t(0) << getSmallSize());
137 }
138
139 void setSmallBits(uintptr_t NewBits) {
140 setSmallRawBits((NewBits & ~(~uintptr_t(0) << getSmallSize())) |
20
Calling 'SmallBitVector::setSmallRawBits'
141 (getSmallSize() << SmallNumDataBits));
142 }
143
144public:
145 /// Creates an empty bitvector.
146 SmallBitVector() = default;
147
148 /// Creates a bitvector of specified number of bits. All bits are initialized
149 /// to the specified value.
150 explicit SmallBitVector(unsigned s, bool t = false) {
151 if (s <= SmallNumDataBits)
12
Taking false branch
152 switchToSmall(t ? ~uintptr_t(0) : 0, s);
153 else
154 switchToLarge(new BitVector(s, t));
13
Memory is allocated
155 }
156
157 /// SmallBitVector copy ctor.
158 SmallBitVector(const SmallBitVector &RHS) {
159 if (RHS.isSmall())
160 X = RHS.X;
161 else
162 switchToLarge(new BitVector(*RHS.getPointer()));
163 }
164
165 SmallBitVector(SmallBitVector &&RHS) : X(RHS.X) {
166 RHS.X = 1;
167 }
168
169 ~SmallBitVector() {
170 if (!isSmall())
171 delete getPointer();
172 }
173
174 using const_set_bits_iterator = const_set_bits_iterator_impl<SmallBitVector>;
175 using set_iterator = const_set_bits_iterator;
176
177 const_set_bits_iterator set_bits_begin() const {
178 return const_set_bits_iterator(*this);
179 }
180
181 const_set_bits_iterator set_bits_end() const {
182 return const_set_bits_iterator(*this, -1);
183 }
184
185 iterator_range<const_set_bits_iterator> set_bits() const {
186 return make_range(set_bits_begin(), set_bits_end());
187 }
188
189 /// Tests whether there are no bits in this bitvector.
190 bool empty() const {
191 return isSmall() ? getSmallSize() == 0 : getPointer()->empty();
192 }
193
194 /// Returns the number of bits in this bitvector.
195 size_t size() const {
196 return isSmall() ? getSmallSize() : getPointer()->size();
197 }
198
199 /// Returns the number of bits which are set.
200 size_type count() const {
201 if (isSmall()) {
202 uintptr_t Bits = getSmallBits();
203 return countPopulation(Bits);
204 }
205 return getPointer()->count();
206 }
207
208 /// Returns true if any bit is set.
209 bool any() const {
210 if (isSmall())
211 return getSmallBits() != 0;
212 return getPointer()->any();
213 }
214
215 /// Returns true if all bits are set.
216 bool all() const {
217 if (isSmall())
218 return getSmallBits() == (uintptr_t(1) << getSmallSize()) - 1;
219 return getPointer()->all();
220 }
221
222 /// Returns true if none of the bits are set.
223 bool none() const {
224 if (isSmall())
225 return getSmallBits() == 0;
226 return getPointer()->none();
227 }
228
229 /// Returns the index of the first set bit, -1 if none of the bits are set.
230 int find_first() const {
231 if (isSmall()) {
232 uintptr_t Bits = getSmallBits();
233 if (Bits == 0)
234 return -1;
235 return countTrailingZeros(Bits);
236 }
237 return getPointer()->find_first();
238 }
239
240 int find_last() const {
241 if (isSmall()) {
242 uintptr_t Bits = getSmallBits();
243 if (Bits == 0)
244 return -1;
245 return NumBaseBits - countLeadingZeros(Bits);
246 }
247 return getPointer()->find_last();
248 }
249
250 /// Returns the index of the first unset bit, -1 if all of the bits are set.
251 int find_first_unset() const {
252 if (isSmall()) {
253 if (count() == getSmallSize())
254 return -1;
255
256 uintptr_t Bits = getSmallBits();
257 return countTrailingOnes(Bits);
258 }
259 return getPointer()->find_first_unset();
260 }
261
262 int find_last_unset() const {
263 if (isSmall()) {
264 if (count() == getSmallSize())
265 return -1;
266
267 uintptr_t Bits = getSmallBits();
268 return NumBaseBits - countLeadingOnes(Bits);
269 }
270 return getPointer()->find_last_unset();
271 }
272
273 /// Returns the index of the next set bit following the "Prev" bit.
274 /// Returns -1 if the next set bit is not found.
275 int find_next(unsigned Prev) const {
276 if (isSmall()) {
277 uintptr_t Bits = getSmallBits();
278 // Mask off previous bits.
279 Bits &= ~uintptr_t(0) << (Prev + 1);
280 if (Bits == 0 || Prev + 1 >= getSmallSize())
281 return -1;
282 return countTrailingZeros(Bits);
283 }
284 return getPointer()->find_next(Prev);
285 }
286
287 /// Returns the index of the next unset bit following the "Prev" bit.
288 /// Returns -1 if the next unset bit is not found.
289 int find_next_unset(unsigned Prev) const {
290 if (isSmall()) {
291 ++Prev;
292 uintptr_t Bits = getSmallBits();
293 // Mask in previous bits.
294 uintptr_t Mask = (1 << Prev) - 1;
295 Bits |= Mask;
296
297 if (Bits == ~uintptr_t(0) || Prev + 1 >= getSmallSize())
298 return -1;
299 return countTrailingOnes(Bits);
300 }
301 return getPointer()->find_next_unset(Prev);
302 }
303
304 /// find_prev - Returns the index of the first set bit that precedes the
305 /// the bit at \p PriorTo. Returns -1 if all previous bits are unset.
306 int find_prev(unsigned PriorTo) const {
307 if (isSmall()) {
308 if (PriorTo == 0)
309 return -1;
310
311 --PriorTo;
312 uintptr_t Bits = getSmallBits();
313 Bits &= maskTrailingOnes<uintptr_t>(PriorTo + 1);
314 if (Bits == 0)
315 return -1;
316
317 return NumBaseBits - countLeadingZeros(Bits) - 1;
318 }
319 return getPointer()->find_prev(PriorTo);
320 }
321
322 /// Clear all bits.
323 void clear() {
324 if (!isSmall())
325 delete getPointer();
326 switchToSmall(0, 0);
327 }
328
329 /// Grow or shrink the bitvector.
330 void resize(unsigned N, bool t = false) {
331 if (!isSmall()) {
332 getPointer()->resize(N, t);
333 } else if (SmallNumDataBits >= N) {
334 uintptr_t NewBits = t ? ~uintptr_t(0) << getSmallSize() : 0;
335 setSmallSize(N);
336 setSmallBits(NewBits | getSmallBits());
337 } else {
338 BitVector *BV = new BitVector(N, t);
339 uintptr_t OldBits = getSmallBits();
340 for (size_t i = 0, e = getSmallSize(); i != e; ++i)
341 (*BV)[i] = (OldBits >> i) & 1;
342 switchToLarge(BV);
343 }
344 }
345
346 void reserve(unsigned N) {
347 if (isSmall()) {
348 if (N > SmallNumDataBits) {
349 uintptr_t OldBits = getSmallRawBits();
350 size_t SmallSize = getSmallSize();
351 BitVector *BV = new BitVector(SmallSize);
352 for (size_t i = 0; i < SmallSize; ++i)
353 if ((OldBits >> i) & 1)
354 BV->set(i);
355 BV->reserve(N);
356 switchToLarge(BV);
357 }
358 } else {
359 getPointer()->reserve(N);
360 }
361 }
362
363 // Set, reset, flip
364 SmallBitVector &set() {
365 if (isSmall())
366 setSmallBits(~uintptr_t(0));
367 else
368 getPointer()->set();
369 return *this;
370 }
371
372 SmallBitVector &set(unsigned Idx) {
373 if (isSmall()) {
374 assert(Idx <= static_cast<unsigned>(((Idx <= static_cast<unsigned>( std::numeric_limits<
uintptr_t>::digits) && "undefined behavior") ? static_cast
<void> (0) : __assert_fail ("Idx <= static_cast<unsigned>( std::numeric_limits<uintptr_t>::digits) && \"undefined behavior\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 376, __PRETTY_FUNCTION__))
375 std::numeric_limits<uintptr_t>::digits) &&((Idx <= static_cast<unsigned>( std::numeric_limits<
uintptr_t>::digits) && "undefined behavior") ? static_cast
<void> (0) : __assert_fail ("Idx <= static_cast<unsigned>( std::numeric_limits<uintptr_t>::digits) && \"undefined behavior\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 376, __PRETTY_FUNCTION__))
376 "undefined behavior")((Idx <= static_cast<unsigned>( std::numeric_limits<
uintptr_t>::digits) && "undefined behavior") ? static_cast
<void> (0) : __assert_fail ("Idx <= static_cast<unsigned>( std::numeric_limits<uintptr_t>::digits) && \"undefined behavior\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 376, __PRETTY_FUNCTION__))
;
377 setSmallBits(getSmallBits() | (uintptr_t(1) << Idx));
378 }
379 else
380 getPointer()->set(Idx);
381 return *this;
382 }
383
384 /// Efficiently set a range of bits in [I, E)
385 SmallBitVector &set(unsigned I, unsigned E) {
386 assert(I <= E && "Attempted to set backwards range!")((I <= E && "Attempted to set backwards range!") ?
static_cast<void> (0) : __assert_fail ("I <= E && \"Attempted to set backwards range!\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 386, __PRETTY_FUNCTION__))
;
387 assert(E <= size() && "Attempted to set out-of-bounds range!")((E <= size() && "Attempted to set out-of-bounds range!"
) ? static_cast<void> (0) : __assert_fail ("E <= size() && \"Attempted to set out-of-bounds range!\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 387, __PRETTY_FUNCTION__))
;
388 if (I == E) return *this;
16
Assuming 'I' is not equal to 'E'
17
Taking false branch
389 if (isSmall()) {
18
Taking true branch
390 uintptr_t EMask = ((uintptr_t)1) << E;
391 uintptr_t IMask = ((uintptr_t)1) << I;
392 uintptr_t Mask = EMask - IMask;
393 setSmallBits(getSmallBits() | Mask);
19
Calling 'SmallBitVector::setSmallBits'
394 } else
395 getPointer()->set(I, E);
396 return *this;
397 }
398
399 SmallBitVector &reset() {
400 if (isSmall())
401 setSmallBits(0);
402 else
403 getPointer()->reset();
404 return *this;
405 }
406
407 SmallBitVector &reset(unsigned Idx) {
408 if (isSmall())
409 setSmallBits(getSmallBits() & ~(uintptr_t(1) << Idx));
410 else
411 getPointer()->reset(Idx);
412 return *this;
413 }
414
415 /// Efficiently reset a range of bits in [I, E)
416 SmallBitVector &reset(unsigned I, unsigned E) {
417 assert(I <= E && "Attempted to reset backwards range!")((I <= E && "Attempted to reset backwards range!")
? static_cast<void> (0) : __assert_fail ("I <= E && \"Attempted to reset backwards range!\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 417, __PRETTY_FUNCTION__))
;
418 assert(E <= size() && "Attempted to reset out-of-bounds range!")((E <= size() && "Attempted to reset out-of-bounds range!"
) ? static_cast<void> (0) : __assert_fail ("E <= size() && \"Attempted to reset out-of-bounds range!\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 418, __PRETTY_FUNCTION__))
;
419 if (I == E) return *this;
420 if (isSmall()) {
421 uintptr_t EMask = ((uintptr_t)1) << E;
422 uintptr_t IMask = ((uintptr_t)1) << I;
423 uintptr_t Mask = EMask - IMask;
424 setSmallBits(getSmallBits() & ~Mask);
425 } else
426 getPointer()->reset(I, E);
427 return *this;
428 }
429
430 SmallBitVector &flip() {
431 if (isSmall())
432 setSmallBits(~getSmallBits());
433 else
434 getPointer()->flip();
435 return *this;
436 }
437
438 SmallBitVector &flip(unsigned Idx) {
439 if (isSmall())
440 setSmallBits(getSmallBits() ^ (uintptr_t(1) << Idx));
441 else
442 getPointer()->flip(Idx);
443 return *this;
444 }
445
446 // No argument flip.
447 SmallBitVector operator~() const {
448 return SmallBitVector(*this).flip();
449 }
450
451 // Indexing.
452 reference operator[](unsigned Idx) {
453 assert(Idx < size() && "Out-of-bounds Bit access.")((Idx < size() && "Out-of-bounds Bit access.") ? static_cast
<void> (0) : __assert_fail ("Idx < size() && \"Out-of-bounds Bit access.\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 453, __PRETTY_FUNCTION__))
;
454 return reference(*this, Idx);
455 }
456
457 bool operator[](unsigned Idx) const {
458 assert(Idx < size() && "Out-of-bounds Bit access.")((Idx < size() && "Out-of-bounds Bit access.") ? static_cast
<void> (0) : __assert_fail ("Idx < size() && \"Out-of-bounds Bit access.\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 458, __PRETTY_FUNCTION__))
;
459 if (isSmall())
460 return ((getSmallBits() >> Idx) & 1) != 0;
461 return getPointer()->operator[](Idx);
462 }
463
464 bool test(unsigned Idx) const {
465 return (*this)[Idx];
466 }
467
468 // Push single bit to end of vector.
469 void push_back(bool Val) {
470 resize(size() + 1, Val);
471 }
472
473 /// Test if any common bits are set.
474 bool anyCommon(const SmallBitVector &RHS) const {
475 if (isSmall() && RHS.isSmall())
476 return (getSmallBits() & RHS.getSmallBits()) != 0;
477 if (!isSmall() && !RHS.isSmall())
478 return getPointer()->anyCommon(*RHS.getPointer());
479
480 for (unsigned i = 0, e = std::min(size(), RHS.size()); i != e; ++i)
481 if (test(i) && RHS.test(i))
482 return true;
483 return false;
484 }
485
486 // Comparison operators.
487 bool operator==(const SmallBitVector &RHS) const {
488 if (size() != RHS.size())
489 return false;
490 if (isSmall())
491 return getSmallBits() == RHS.getSmallBits();
492 else
493 return *getPointer() == *RHS.getPointer();
494 }
495
496 bool operator!=(const SmallBitVector &RHS) const {
497 return !(*this == RHS);
498 }
499
500 // Intersection, union, disjoint union.
501 SmallBitVector &operator&=(const SmallBitVector &RHS) {
502 resize(std::max(size(), RHS.size()));
503 if (isSmall())
504 setSmallBits(getSmallBits() & RHS.getSmallBits());
505 else if (!RHS.isSmall())
506 getPointer()->operator&=(*RHS.getPointer());
507 else {
508 SmallBitVector Copy = RHS;
509 Copy.resize(size());
510 getPointer()->operator&=(*Copy.getPointer());
511 }
512 return *this;
513 }
514
515 /// Reset bits that are set in RHS. Same as *this &= ~RHS.
516 SmallBitVector &reset(const SmallBitVector &RHS) {
517 if (isSmall() && RHS.isSmall())
518 setSmallBits(getSmallBits() & ~RHS.getSmallBits());
519 else if (!isSmall() && !RHS.isSmall())
520 getPointer()->reset(*RHS.getPointer());
521 else
522 for (unsigned i = 0, e = std::min(size(), RHS.size()); i != e; ++i)
523 if (RHS.test(i))
524 reset(i);
525
526 return *this;
527 }
528
529 /// Check if (This - RHS) is zero. This is the same as reset(RHS) and any().
530 bool test(const SmallBitVector &RHS) const {
531 if (isSmall() && RHS.isSmall())
532 return (getSmallBits() & ~RHS.getSmallBits()) != 0;
533 if (!isSmall() && !RHS.isSmall())
534 return getPointer()->test(*RHS.getPointer());
535
536 unsigned i, e;
537 for (i = 0, e = std::min(size(), RHS.size()); i != e; ++i)
538 if (test(i) && !RHS.test(i))
539 return true;
540
541 for (e = size(); i != e; ++i)
542 if (test(i))
543 return true;
544
545 return false;
546 }
547
548 SmallBitVector &operator|=(const SmallBitVector &RHS) {
549 resize(std::max(size(), RHS.size()));
550 if (isSmall())
551 setSmallBits(getSmallBits() | RHS.getSmallBits());
552 else if (!RHS.isSmall())
553 getPointer()->operator|=(*RHS.getPointer());
554 else {
555 SmallBitVector Copy = RHS;
556 Copy.resize(size());
557 getPointer()->operator|=(*Copy.getPointer());
558 }
559 return *this;
560 }
561
562 SmallBitVector &operator^=(const SmallBitVector &RHS) {
563 resize(std::max(size(), RHS.size()));
564 if (isSmall())
565 setSmallBits(getSmallBits() ^ RHS.getSmallBits());
566 else if (!RHS.isSmall())
567 getPointer()->operator^=(*RHS.getPointer());
568 else {
569 SmallBitVector Copy = RHS;
570 Copy.resize(size());
571 getPointer()->operator^=(*Copy.getPointer());
572 }
573 return *this;
574 }
575
576 SmallBitVector &operator<<=(unsigned N) {
577 if (isSmall())
578 setSmallBits(getSmallBits() << N);
579 else
580 getPointer()->operator<<=(N);
581 return *this;
582 }
583
584 SmallBitVector &operator>>=(unsigned N) {
585 if (isSmall())
586 setSmallBits(getSmallBits() >> N);
587 else
588 getPointer()->operator>>=(N);
589 return *this;
590 }
591
592 // Assignment operator.
593 const SmallBitVector &operator=(const SmallBitVector &RHS) {
594 if (isSmall()) {
595 if (RHS.isSmall())
596 X = RHS.X;
597 else
598 switchToLarge(new BitVector(*RHS.getPointer()));
599 } else {
600 if (!RHS.isSmall())
601 *getPointer() = *RHS.getPointer();
602 else {
603 delete getPointer();
604 X = RHS.X;
605 }
606 }
607 return *this;
608 }
609
610 const SmallBitVector &operator=(SmallBitVector &&RHS) {
611 if (this != &RHS) {
612 clear();
613 swap(RHS);
614 }
615 return *this;
616 }
617
618 void swap(SmallBitVector &RHS) {
619 std::swap(X, RHS.X);
620 }
621
622 /// Add '1' bits from Mask to this vector. Don't resize.
623 /// This computes "*this |= Mask".
624 void setBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
625 if (isSmall())
626 applyMask<true, false>(Mask, MaskWords);
627 else
628 getPointer()->setBitsInMask(Mask, MaskWords);
629 }
630
631 /// Clear any bits in this vector that are set in Mask. Don't resize.
632 /// This computes "*this &= ~Mask".
633 void clearBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
634 if (isSmall())
635 applyMask<false, false>(Mask, MaskWords);
636 else
637 getPointer()->clearBitsInMask(Mask, MaskWords);
638 }
639
640 /// Add a bit to this vector for every '0' bit in Mask. Don't resize.
641 /// This computes "*this |= ~Mask".
642 void setBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
643 if (isSmall())
644 applyMask<true, true>(Mask, MaskWords);
645 else
646 getPointer()->setBitsNotInMask(Mask, MaskWords);
647 }
648
649 /// Clear a bit in this vector for every '0' bit in Mask. Don't resize.
650 /// This computes "*this &= Mask".
651 void clearBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
652 if (isSmall())
653 applyMask<false, true>(Mask, MaskWords);
654 else
655 getPointer()->clearBitsNotInMask(Mask, MaskWords);
656 }
657
658private:
659 template <bool AddBits, bool InvertMask>
660 void applyMask(const uint32_t *Mask, unsigned MaskWords) {
661 assert(MaskWords <= sizeof(uintptr_t) && "Mask is larger than base!")((MaskWords <= sizeof(uintptr_t) && "Mask is larger than base!"
) ? static_cast<void> (0) : __assert_fail ("MaskWords <= sizeof(uintptr_t) && \"Mask is larger than base!\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/ADT/SmallBitVector.h"
, 661, __PRETTY_FUNCTION__))
;
662 uintptr_t M = Mask[0];
663 if (NumBaseBits == 64)
664 M |= uint64_t(Mask[1]) << 32;
665 if (InvertMask)
666 M = ~M;
667 if (AddBits)
668 setSmallBits(getSmallBits() | M);
669 else
670 setSmallBits(getSmallBits() & ~M);
671 }
672};
673
674inline SmallBitVector
675operator&(const SmallBitVector &LHS, const SmallBitVector &RHS) {
676 SmallBitVector Result(LHS);
677 Result &= RHS;
678 return Result;
679}
680
681inline SmallBitVector
682operator|(const SmallBitVector &LHS, const SmallBitVector &RHS) {
683 SmallBitVector Result(LHS);
684 Result |= RHS;
685 return Result;
686}
687
688inline SmallBitVector
689operator^(const SmallBitVector &LHS, const SmallBitVector &RHS) {
690 SmallBitVector Result(LHS);
691 Result ^= RHS;
692 return Result;
693}
694
695} // end namespace llvm
696
697namespace std {
698
699/// Implement std::swap in terms of BitVector swap.
700inline void
701swap(llvm::SmallBitVector &LHS, llvm::SmallBitVector &RHS) {
702 LHS.swap(RHS);
703}
704
705} // end namespace std
706
707#endif // LLVM_ADT_SMALLBITVECTOR_H