Bug Summary

File:include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h
Warning:line 35, column 40
Called C++ object pointer is null

Annotated Source Code

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clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name InstructionSelect.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -analyzer-config-compatibility-mode=true -mrelocation-model pic -pic-level 2 -mthread-model posix -mframe-pointer=none -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu x86-64 -dwarf-column-info -debugger-tuning=gdb -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-10/lib/clang/10.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-10~svn374877/build-llvm/lib/CodeGen/GlobalISel -I /build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/GlobalISel -I /build/llvm-toolchain-snapshot-10~svn374877/build-llvm/include -I /build/llvm-toolchain-snapshot-10~svn374877/include -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/backward -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-10/lib/clang/10.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++14 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-10~svn374877/build-llvm/lib/CodeGen/GlobalISel -fdebug-prefix-map=/build/llvm-toolchain-snapshot-10~svn374877=. -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -stack-protector 2 -fgnuc-version=4.2.1 -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -faddrsig -o /tmp/scan-build-2019-10-15-233810-7101-1 -x c++ /build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/GlobalISel/InstructionSelect.cpp

/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/GlobalISel/InstructionSelect.cpp

1//===- llvm/CodeGen/GlobalISel/InstructionSelect.cpp - InstructionSelect ---==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9/// This file implements the InstructionSelect class.
10//===----------------------------------------------------------------------===//
11
12#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
13#include "llvm/ADT/PostOrderIterator.h"
14#include "llvm/ADT/Twine.h"
15#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
16#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
17#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
18#include "llvm/CodeGen/GlobalISel/Utils.h"
19#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
20#include "llvm/CodeGen/MachineFrameInfo.h"
21#include "llvm/CodeGen/MachineRegisterInfo.h"
22#include "llvm/CodeGen/TargetInstrInfo.h"
23#include "llvm/CodeGen/TargetLowering.h"
24#include "llvm/CodeGen/TargetPassConfig.h"
25#include "llvm/CodeGen/TargetSubtargetInfo.h"
26#include "llvm/Config/config.h"
27#include "llvm/IR/Constants.h"
28#include "llvm/IR/Function.h"
29#include "llvm/Support/CommandLine.h"
30#include "llvm/Support/Debug.h"
31#include "llvm/Support/TargetRegistry.h"
32
33#define DEBUG_TYPE"instruction-select" "instruction-select"
34
35using namespace llvm;
36
37#ifdef LLVM_GISEL_COV_PREFIX
38static cl::opt<std::string>
39 CoveragePrefix("gisel-coverage-prefix", cl::init(LLVM_GISEL_COV_PREFIX),
40 cl::desc("Record GlobalISel rule coverage files of this "
41 "prefix if instrumentation was generated"));
42#else
43static const std::string CoveragePrefix = "";
44#endif
45
46char InstructionSelect::ID = 0;
47INITIALIZE_PASS_BEGIN(InstructionSelect, DEBUG_TYPE,static void *initializeInstructionSelectPassOnce(PassRegistry
&Registry) {
48 "Select target instructions out of generic instructions",static void *initializeInstructionSelectPassOnce(PassRegistry
&Registry) {
49 false, false)static void *initializeInstructionSelectPassOnce(PassRegistry
&Registry) {
50INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)initializeTargetPassConfigPass(Registry);
51INITIALIZE_PASS_DEPENDENCY(GISelKnownBitsAnalysis)initializeGISelKnownBitsAnalysisPass(Registry);
52INITIALIZE_PASS_END(InstructionSelect, DEBUG_TYPE,PassInfo *PI = new PassInfo( "Select target instructions out of generic instructions"
, "instruction-select", &InstructionSelect::ID, PassInfo::
NormalCtor_t(callDefaultCtor<InstructionSelect>), false
, false); Registry.registerPass(*PI, true); return PI; } static
llvm::once_flag InitializeInstructionSelectPassFlag; void llvm
::initializeInstructionSelectPass(PassRegistry &Registry)
{ llvm::call_once(InitializeInstructionSelectPassFlag, initializeInstructionSelectPassOnce
, std::ref(Registry)); }
53 "Select target instructions out of generic instructions",PassInfo *PI = new PassInfo( "Select target instructions out of generic instructions"
, "instruction-select", &InstructionSelect::ID, PassInfo::
NormalCtor_t(callDefaultCtor<InstructionSelect>), false
, false); Registry.registerPass(*PI, true); return PI; } static
llvm::once_flag InitializeInstructionSelectPassFlag; void llvm
::initializeInstructionSelectPass(PassRegistry &Registry)
{ llvm::call_once(InitializeInstructionSelectPassFlag, initializeInstructionSelectPassOnce
, std::ref(Registry)); }
54 false, false)PassInfo *PI = new PassInfo( "Select target instructions out of generic instructions"
, "instruction-select", &InstructionSelect::ID, PassInfo::
NormalCtor_t(callDefaultCtor<InstructionSelect>), false
, false); Registry.registerPass(*PI, true); return PI; } static
llvm::once_flag InitializeInstructionSelectPassFlag; void llvm
::initializeInstructionSelectPass(PassRegistry &Registry)
{ llvm::call_once(InitializeInstructionSelectPassFlag, initializeInstructionSelectPassOnce
, std::ref(Registry)); }
55
56InstructionSelect::InstructionSelect() : MachineFunctionPass(ID) { }
57
58void InstructionSelect::getAnalysisUsage(AnalysisUsage &AU) const {
59 AU.addRequired<TargetPassConfig>();
60 AU.addRequired<GISelKnownBitsAnalysis>();
61 AU.addPreserved<GISelKnownBitsAnalysis>();
62 getSelectionDAGFallbackAnalysisUsage(AU);
63 MachineFunctionPass::getAnalysisUsage(AU);
64}
65
66bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
67 // If the ISel pipeline failed, do not bother running that pass.
68 if (MF.getProperties().hasProperty(
1
Taking false branch
69 MachineFunctionProperties::Property::FailedISel))
70 return false;
71
72 LLVM_DEBUG(dbgs() << "Selecting function: " << MF.getName() << '\n')do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { dbgs() << "Selecting function: "
<< MF.getName() << '\n'; } } while (false)
;
2
Assuming 'DebugFlag' is false
3
Loop condition is false. Exiting loop
73 GISelKnownBits &KB = getAnalysis<GISelKnownBitsAnalysis>().get(MF);
74
75 const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
76 InstructionSelector *ISel = MF.getSubtarget().getInstructionSelector();
77 CodeGenCoverage CoverageInfo;
78 assert(ISel && "Cannot work without InstructionSelector")((ISel && "Cannot work without InstructionSelector") ?
static_cast<void> (0) : __assert_fail ("ISel && \"Cannot work without InstructionSelector\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/GlobalISel/InstructionSelect.cpp"
, 78, __PRETTY_FUNCTION__))
;
4
Assuming 'ISel' is non-null
5
'?' condition is true
79 ISel->setupMF(MF, KB, CoverageInfo);
80
81 // An optimization remark emitter. Used to report failures.
82 MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
83
84 // FIXME: There are many other MF/MFI fields we need to initialize.
85
86 MachineRegisterInfo &MRI = MF.getRegInfo();
87#ifndef NDEBUG
88 // Check that our input is fully legal: we require the function to have the
89 // Legalized property, so it should be.
90 // FIXME: This should be in the MachineVerifier, as the RegBankSelected
91 // property check already is.
92 if (!DisableGISelLegalityCheck)
6
Assuming the condition is false
7
Taking false branch
93 if (const MachineInstr *MI = machineFunctionIsIllegal(MF)) {
94 reportGISelFailure(MF, TPC, MORE, "gisel-select",
95 "instruction is not legal", *MI);
96 return false;
97 }
98 // FIXME: We could introduce new blocks and will need to fix the outer loop.
99 // Until then, keep track of the number of blocks to assert that we don't.
100 const size_t NumBlocks = MF.size();
101#endif
102
103 for (MachineBasicBlock *MBB : post_order(&MF)) {
104 if (MBB->empty())
105 continue;
106
107 // Select instructions in reverse block order. We permit erasing so have
108 // to resort to manually iterating and recognizing the begin (rend) case.
109 bool ReachedBegin = false;
110 for (auto MII = std::prev(MBB->end()), Begin = MBB->begin();
111 !ReachedBegin;) {
112#ifndef NDEBUG
113 // Keep track of the insertion range for debug printing.
114 const auto AfterIt = std::next(MII);
115#endif
116 // Select this instruction.
117 MachineInstr &MI = *MII;
118
119 // And have our iterator point to the next instruction, if there is one.
120 if (MII == Begin)
121 ReachedBegin = true;
122 else
123 --MII;
124
125 LLVM_DEBUG(dbgs() << "Selecting: \n " << MI)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { dbgs() << "Selecting: \n " <<
MI; } } while (false)
;
126
127 // We could have folded this instruction away already, making it dead.
128 // If so, erase it.
129 if (isTriviallyDead(MI, MRI)) {
130 LLVM_DEBUG(dbgs() << "Is dead; erasing.\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { dbgs() << "Is dead; erasing.\n"
; } } while (false)
;
131 MI.eraseFromParentAndMarkDBGValuesForRemoval();
132 continue;
133 }
134
135 if (!ISel->select(MI)) {
136 // FIXME: It would be nice to dump all inserted instructions. It's
137 // not obvious how, esp. considering select() can insert after MI.
138 reportGISelFailure(MF, TPC, MORE, "gisel-select", "cannot select", MI);
139 return false;
140 }
141
142 // Dump the range of instructions that MI expanded into.
143 LLVM_DEBUG({do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
144 auto InsertedBegin = ReachedBegin ? MBB->begin() : std::next(MII);do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
145 dbgs() << "Into:\n";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
146 for (auto &InsertedMI : make_range(InsertedBegin, AfterIt))do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
147 dbgs() << " " << InsertedMI;do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
148 dbgs() << '\n';do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
149 })do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
;
150 }
151 }
152
153 for (MachineBasicBlock &MBB : MF) {
154 if (MBB.empty())
155 continue;
156
157 // Try to find redundant copies b/w vregs of the same register class.
158 bool ReachedBegin = false;
159 for (auto MII = std::prev(MBB.end()), Begin = MBB.begin(); !ReachedBegin;) {
160 // Select this instruction.
161 MachineInstr &MI = *MII;
162
163 // And have our iterator point to the next instruction, if there is one.
164 if (MII == Begin)
165 ReachedBegin = true;
166 else
167 --MII;
168 if (MI.getOpcode() != TargetOpcode::COPY)
169 continue;
170 Register SrcReg = MI.getOperand(1).getReg();
171 Register DstReg = MI.getOperand(0).getReg();
172 if (Register::isVirtualRegister(SrcReg) &&
173 Register::isVirtualRegister(DstReg)) {
174 auto SrcRC = MRI.getRegClass(SrcReg);
175 auto DstRC = MRI.getRegClass(DstReg);
176 if (SrcRC == DstRC) {
177 MRI.replaceRegWith(DstReg, SrcReg);
178 MI.eraseFromParentAndMarkDBGValuesForRemoval();
179 }
180 }
181 }
182 }
183
184#ifndef NDEBUG
185 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
186 // Now that selection is complete, there are no more generic vregs. Verify
187 // that the size of the now-constrained vreg is unchanged and that it has a
188 // register class.
189 for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
8
Assuming 'I' is equal to 'E'
9
Loop condition is false. Execution continues on line 216
190 unsigned VReg = Register::index2VirtReg(I);
191
192 MachineInstr *MI = nullptr;
193 if (!MRI.def_empty(VReg))
194 MI = &*MRI.def_instr_begin(VReg);
195 else if (!MRI.use_empty(VReg))
196 MI = &*MRI.use_instr_begin(VReg);
197 if (!MI)
198 continue;
199
200 const TargetRegisterClass *RC = MRI.getRegClassOrNull(VReg);
201 if (!RC) {
202 reportGISelFailure(MF, TPC, MORE, "gisel-select",
203 "VReg has no regclass after selection", *MI);
204 return false;
205 }
206
207 const LLT Ty = MRI.getType(VReg);
208 if (Ty.isValid() && Ty.getSizeInBits() > TRI.getRegSizeInBits(*RC)) {
209 reportGISelFailure(
210 MF, TPC, MORE, "gisel-select",
211 "VReg's low-level type and register class have different sizes", *MI);
212 return false;
213 }
214 }
215
216 if (MF.size() != NumBlocks) {
10
Assuming the condition is true
11
Taking true branch
217 MachineOptimizationRemarkMissed R("gisel-select", "GISelFailure",
13
Calling constructor for 'MachineOptimizationRemarkMissed'
218 MF.getFunction().getSubprogram(),
219 /*MBB=*/nullptr);
12
Passing null pointer value via 4th parameter 'MBB'
220 R << "inserting blocks is not supported yet";
221 reportGISelFailure(MF, TPC, MORE, R);
222 return false;
223 }
224#endif
225 auto &TLI = *MF.getSubtarget().getTargetLowering();
226 TLI.finalizeLowering(MF);
227
228 // Determine if there are any calls in this machine function. Ported from
229 // SelectionDAG.
230 MachineFrameInfo &MFI = MF.getFrameInfo();
231 for (const auto &MBB : MF) {
232 if (MFI.hasCalls() && MF.hasInlineAsm())
233 break;
234
235 for (const auto &MI : MBB) {
236 if ((MI.isCall() && !MI.isReturn()) || MI.isStackAligningInlineAsm())
237 MFI.setHasCalls(true);
238 if (MI.isInlineAsm())
239 MF.setHasInlineAsm(true);
240 }
241 }
242
243
244 LLVM_DEBUG({do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
245 dbgs() << "Rules covered by selecting function: " << MF.getName() << ":";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
246 for (auto RuleID : CoverageInfo.covered())do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
247 dbgs() << " id" << RuleID;do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
248 dbgs() << "\n\n";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
249 })do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
;
250 CoverageInfo.emit(CoveragePrefix,
251 MF.getSubtarget()
252 .getTargetLowering()
253 ->getTargetMachine()
254 .getTarget()
255 .getBackendName());
256
257 // If we successfully selected the function nothing is going to use the vreg
258 // types after us (otherwise MIRPrinter would need them). Make sure the types
259 // disappear.
260 MRI.clearVirtRegTypes();
261
262 // FIXME: Should we accurately track changes?
263 return true;
264}

/build/llvm-toolchain-snapshot-10~svn374877/include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h

1///===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*----===//
2///
3/// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4/// See https://llvm.org/LICENSE.txt for license information.
5/// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6///
7///===---------------------------------------------------------------------===//
8/// \file
9/// Optimization diagnostic interfaces for machine passes. It's packaged as an
10/// analysis pass so that by using this service passes become dependent on MBFI
11/// as well. MBFI is used to compute the "hotness" of the diagnostic message.
12///
13///===---------------------------------------------------------------------===//
14
15#ifndef LLVM_CODEGEN_MACHINEOPTIMIZATIONREMARKEMITTER_H
16#define LLVM_CODEGEN_MACHINEOPTIMIZATIONREMARKEMITTER_H
17
18#include "llvm/Analysis/OptimizationRemarkEmitter.h"
19#include "llvm/CodeGen/MachineFunctionPass.h"
20
21namespace llvm {
22class MachineBasicBlock;
23class MachineBlockFrequencyInfo;
24class MachineInstr;
25
26/// Common features for diagnostics dealing with optimization remarks
27/// that are used by machine passes.
28class DiagnosticInfoMIROptimization : public DiagnosticInfoOptimizationBase {
29public:
30 DiagnosticInfoMIROptimization(enum DiagnosticKind Kind, const char *PassName,
31 StringRef RemarkName,
32 const DiagnosticLocation &Loc,
33 const MachineBasicBlock *MBB)
34 : DiagnosticInfoOptimizationBase(Kind, DS_Remark, PassName, RemarkName,
35 MBB->getParent()->getFunction(), Loc),
16
Called C++ object pointer is null
36 MBB(MBB) {}
37
38 /// MI-specific kinds of diagnostic Arguments.
39 struct MachineArgument : public DiagnosticInfoOptimizationBase::Argument {
40 /// Print an entire MachineInstr.
41 MachineArgument(StringRef Key, const MachineInstr &MI);
42 };
43
44 static bool classof(const DiagnosticInfo *DI) {
45 return DI->getKind() >= DK_FirstMachineRemark &&
46 DI->getKind() <= DK_LastMachineRemark;
47 }
48
49 const MachineBasicBlock *getBlock() const { return MBB; }
50
51private:
52 const MachineBasicBlock *MBB;
53};
54
55/// Diagnostic information for applied optimization remarks.
56class MachineOptimizationRemark : public DiagnosticInfoMIROptimization {
57public:
58 /// \p PassName is the name of the pass emitting this diagnostic. If this name
59 /// matches the regular expression given in -Rpass=, then the diagnostic will
60 /// be emitted. \p RemarkName is a textual identifier for the remark. \p
61 /// Loc is the debug location and \p MBB is the block that the optimization
62 /// operates in.
63 MachineOptimizationRemark(const char *PassName, StringRef RemarkName,
64 const DiagnosticLocation &Loc,
65 const MachineBasicBlock *MBB)
66 : DiagnosticInfoMIROptimization(DK_MachineOptimizationRemark, PassName,
67 RemarkName, Loc, MBB) {}
68
69 static bool classof(const DiagnosticInfo *DI) {
70 return DI->getKind() == DK_MachineOptimizationRemark;
71 }
72
73 /// \see DiagnosticInfoOptimizationBase::isEnabled.
74 bool isEnabled() const override {
75 const Function &Fn = getFunction();
76 LLVMContext &Ctx = Fn.getContext();
77 return Ctx.getDiagHandlerPtr()->isPassedOptRemarkEnabled(getPassName());
78 }
79};
80
81/// Diagnostic information for missed-optimization remarks.
82class MachineOptimizationRemarkMissed : public DiagnosticInfoMIROptimization {
83public:
84 /// \p PassName is the name of the pass emitting this diagnostic. If this name
85 /// matches the regular expression given in -Rpass-missed=, then the
86 /// diagnostic will be emitted. \p RemarkName is a textual identifier for the
87 /// remark. \p Loc is the debug location and \p MBB is the block that the
88 /// optimization operates in.
89 MachineOptimizationRemarkMissed(const char *PassName, StringRef RemarkName,
90 const DiagnosticLocation &Loc,
91 const MachineBasicBlock *MBB)
92 : DiagnosticInfoMIROptimization(DK_MachineOptimizationRemarkMissed,
15
Calling constructor for 'DiagnosticInfoMIROptimization'
93 PassName, RemarkName, Loc, MBB) {}
14
Passing null pointer value via 5th parameter 'MBB'
94
95 static bool classof(const DiagnosticInfo *DI) {
96 return DI->getKind() == DK_MachineOptimizationRemarkMissed;
97 }
98
99 /// \see DiagnosticInfoOptimizationBase::isEnabled.
100 bool isEnabled() const override {
101 const Function &Fn = getFunction();
102 LLVMContext &Ctx = Fn.getContext();
103 return Ctx.getDiagHandlerPtr()->isMissedOptRemarkEnabled(getPassName());
104 }
105};
106
107/// Diagnostic information for optimization analysis remarks.
108class MachineOptimizationRemarkAnalysis : public DiagnosticInfoMIROptimization {
109public:
110 /// \p PassName is the name of the pass emitting this diagnostic. If this name
111 /// matches the regular expression given in -Rpass-analysis=, then the
112 /// diagnostic will be emitted. \p RemarkName is a textual identifier for the
113 /// remark. \p Loc is the debug location and \p MBB is the block that the
114 /// optimization operates in.
115 MachineOptimizationRemarkAnalysis(const char *PassName, StringRef RemarkName,
116 const DiagnosticLocation &Loc,
117 const MachineBasicBlock *MBB)
118 : DiagnosticInfoMIROptimization(DK_MachineOptimizationRemarkAnalysis,
119 PassName, RemarkName, Loc, MBB) {}
120
121 static bool classof(const DiagnosticInfo *DI) {
122 return DI->getKind() == DK_MachineOptimizationRemarkAnalysis;
123 }
124
125 /// \see DiagnosticInfoOptimizationBase::isEnabled.
126 bool isEnabled() const override {
127 const Function &Fn = getFunction();
128 LLVMContext &Ctx = Fn.getContext();
129 return Ctx.getDiagHandlerPtr()->isAnalysisRemarkEnabled(getPassName());
130 }
131};
132
133/// Extend llvm::ore:: with MI-specific helper names.
134namespace ore {
135using MNV = DiagnosticInfoMIROptimization::MachineArgument;
136}
137
138/// The optimization diagnostic interface.
139///
140/// It allows reporting when optimizations are performed and when they are not
141/// along with the reasons for it. Hotness information of the corresponding
142/// code region can be included in the remark if DiagnosticsHotnessRequested is
143/// enabled in the LLVM context.
144class MachineOptimizationRemarkEmitter {
145public:
146 MachineOptimizationRemarkEmitter(MachineFunction &MF,
147 MachineBlockFrequencyInfo *MBFI)
148 : MF(MF), MBFI(MBFI) {}
149
150 /// Emit an optimization remark.
151 void emit(DiagnosticInfoOptimizationBase &OptDiag);
152
153 /// Whether we allow for extra compile-time budget to perform more
154 /// analysis to be more informative.
155 ///
156 /// This is useful to enable additional missed optimizations to be reported
157 /// that are normally too noisy. In this mode, we can use the extra analysis
158 /// (1) to filter trivial false positives or (2) to provide more context so
159 /// that non-trivial false positives can be quickly detected by the user.
160 bool allowExtraAnalysis(StringRef PassName) const {
161 return (
162 MF.getFunction().getContext().getRemarkStreamer() ||
163 MF.getFunction().getContext().getDiagHandlerPtr()->isAnyRemarkEnabled(
164 PassName));
165 }
166
167 /// Take a lambda that returns a remark which will be emitted. Second
168 /// argument is only used to restrict this to functions.
169 template <typename T>
170 void emit(T RemarkBuilder, decltype(RemarkBuilder()) * = nullptr) {
171 // Avoid building the remark unless we know there are at least *some*
172 // remarks enabled. We can't currently check whether remarks are requested
173 // for the calling pass since that requires actually building the remark.
174
175 if (MF.getFunction().getContext().getRemarkStreamer() ||
176 MF.getFunction()
177 .getContext()
178 .getDiagHandlerPtr()
179 ->isAnyRemarkEnabled()) {
180 auto R = RemarkBuilder();
181 emit((DiagnosticInfoOptimizationBase &)R);
182 }
183 }
184
185private:
186 MachineFunction &MF;
187
188 /// MBFI is only set if hotness is requested.
189 MachineBlockFrequencyInfo *MBFI;
190
191 /// Compute hotness from IR value (currently assumed to be a block) if PGO is
192 /// available.
193 Optional<uint64_t> computeHotness(const MachineBasicBlock &MBB);
194
195 /// Similar but use value from \p OptDiag and update hotness there.
196 void computeHotness(DiagnosticInfoMIROptimization &Remark);
197
198 /// Only allow verbose messages if we know we're filtering by hotness
199 /// (BFI is only set in this case).
200 bool shouldEmitVerbose() { return MBFI != nullptr; }
201};
202
203/// The analysis pass
204///
205/// Note that this pass shouldn't generally be marked as preserved by other
206/// passes. It's holding onto BFI, so if the pass does not preserve BFI, BFI
207/// could be freed.
208class MachineOptimizationRemarkEmitterPass : public MachineFunctionPass {
209 std::unique_ptr<MachineOptimizationRemarkEmitter> ORE;
210
211public:
212 MachineOptimizationRemarkEmitterPass();
213
214 bool runOnMachineFunction(MachineFunction &MF) override;
215
216 void getAnalysisUsage(AnalysisUsage &AU) const override;
217
218 MachineOptimizationRemarkEmitter &getORE() {
219 assert(ORE && "pass not run yet")((ORE && "pass not run yet") ? static_cast<void>
(0) : __assert_fail ("ORE && \"pass not run yet\"", "/build/llvm-toolchain-snapshot-10~svn374877/include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
, 219, __PRETTY_FUNCTION__))
;
220 return *ORE;
221 }
222
223 static char ID;
224};
225}
226
227#endif