/build/source/llvm/lib/CodeGen/LiveDebugVariables.cpp

Bug Summary

File:	build/source/llvm/lib/CodeGen/LiveDebugVariables.cpp
Warning:	line 219, column 55 Dereference of null pointer
Annotated Source Code

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clang -cc1 -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name LiveDebugVariables.cpp -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -analyzer-config-compatibility-mode=true -mrelocation-model pic -pic-level 2 -mframe-pointer=none -fmath-errno -ffp-contract=on -fno-rounding-math -mconstructor-aliases -funwind-tables=2 -target-cpu x86-64 -tune-cpu generic -debugger-tuning=gdb -ffunction-sections -fdata-sections -fcoverage-compilation-dir=/build/source/build-llvm/tools/clang/stage2-bins -resource-dir /usr/lib/llvm-17/lib/clang/17 -D _DEBUG -D _GLIBCXX_ASSERTIONS -D _GNU_SOURCE -D _LIBCPP_ENABLE_ASSERTIONS -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I lib/CodeGen -I /build/source/llvm/lib/CodeGen -I include -I /build/source/llvm/include -D _FORTIFY_SOURCE=2 -D NDEBUG -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/c++/10 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/x86_64-linux-gnu/c++/10 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/c++/10/backward -internal-isystem /usr/lib/llvm-17/lib/clang/17/include -internal-isystem /usr/local/include -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../x86_64-linux-gnu/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -fmacro-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fmacro-prefix-map=/build/source/= -fcoverage-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fcoverage-prefix-map=/build/source/= -source-date-epoch 1683717183 -O2 -Wno-unused-command-line-argument -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-redundant-move -Wno-pessimizing-move -Wno-noexcept-type -Wno-comment -Wno-misleading-indentation -std=c++17 -fdeprecated-macro -fdebug-compilation-dir=/build/source/build-llvm/tools/clang/stage2-bins -fdebug-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fdebug-prefix-map=/build/source/= -ferror-limit 19 -fvisibility-inlines-hidden -stack-protector 2 -fgnuc-version=4.2.1 -fcolor-diagnostics -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -faddrsig -D__GCC_HAVE_DWARF2_CFI_ASM=1 -o /tmp/scan-build-2023-05-10-133810-16478-1 -x c++ /build/source/llvm/lib/CodeGen/LiveDebugVariables.cpp
1//===- LiveDebugVariables.cpp - Tracking debug info variables -------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the LiveDebugVariables analysis.
10//
11// Remove all DBG_VALUE instructions referencing virtual registers and replace
12// them with a data structure tracking where live user variables are kept - in a
13// virtual register or in a stack slot.
14//
15// Allow the data structure to be updated during register allocation when values
16// are moved between registers and stack slots. Finally emit new DBG_VALUE
17// instructions after register allocation is complete.
18//
19//===----------------------------------------------------------------------===//

21#include "LiveDebugVariables.h"
22#include "llvm/ADT/ArrayRef.h"
23#include "llvm/ADT/DenseMap.h"
24#include "llvm/ADT/IntervalMap.h"
25#include "llvm/ADT/MapVector.h"
26#include "llvm/ADT/STLExtras.h"
27#include "llvm/ADT/SmallSet.h"
28#include "llvm/ADT/SmallVector.h"
29#include "llvm/ADT/Statistic.h"
30#include "llvm/ADT/StringRef.h"
31#include "llvm/BinaryFormat/Dwarf.h"
32#include "llvm/CodeGen/LexicalScopes.h"
33#include "llvm/CodeGen/LiveInterval.h"
34#include "llvm/CodeGen/LiveIntervals.h"
35#include "llvm/CodeGen/MachineBasicBlock.h"
36#include "llvm/CodeGen/MachineDominators.h"
37#include "llvm/CodeGen/MachineFunction.h"
38#include "llvm/CodeGen/MachineInstr.h"
39#include "llvm/CodeGen/MachineInstrBuilder.h"
40#include "llvm/CodeGen/MachineOperand.h"
41#include "llvm/CodeGen/MachineRegisterInfo.h"
42#include "llvm/CodeGen/SlotIndexes.h"
43#include "llvm/CodeGen/TargetInstrInfo.h"
44#include "llvm/CodeGen/TargetOpcodes.h"
45#include "llvm/CodeGen/TargetRegisterInfo.h"
46#include "llvm/CodeGen/TargetSubtargetInfo.h"
47#include "llvm/CodeGen/VirtRegMap.h"
48#include "llvm/Config/llvm-config.h"
49#include "llvm/IR/DebugInfoMetadata.h"
50#include "llvm/IR/DebugLoc.h"
51#include "llvm/IR/Function.h"
52#include "llvm/InitializePasses.h"
53#include "llvm/Pass.h"
54#include "llvm/Support/Casting.h"
55#include "llvm/Support/CommandLine.h"
56#include "llvm/Support/Debug.h"
57#include "llvm/Support/raw_ostream.h"
58#include <algorithm>
59#include <cassert>
60#include <iterator>
61#include <memory>
62#include <optional>
63#include <utility>

65using namespace llvm;

67#define DEBUG_TYPE"livedebugvars" "livedebugvars"

69static cl::opt<bool>
70EnableLDV("live-debug-variables", cl::init(true),
        cl::desc("Enable the live debug variables pass"), cl::Hidden);

73STATISTIC(NumInsertedDebugValues, "Number of DBG_VALUEs inserted")static llvm::Statistic NumInsertedDebugValues = {"livedebugvars"
, "NumInsertedDebugValues", "Number of DBG_VALUEs inserted"};
74STATISTIC(NumInsertedDebugLabels, "Number of DBG_LABELs inserted")static llvm::Statistic NumInsertedDebugLabels = {"livedebugvars"
, "NumInsertedDebugLabels", "Number of DBG_LABELs inserted"};

76char LiveDebugVariables::ID = 0;

78INITIALIZE_PASS_BEGIN(LiveDebugVariables, DEBUG_TYPE,static void *initializeLiveDebugVariablesPassOnce(PassRegistry
 &Registry) {
              "Debug Variable Analysis", false, false)static void *initializeLiveDebugVariablesPassOnce(PassRegistry
 &Registry) {
80INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)initializeMachineDominatorTreePass(Registry);
81INITIALIZE_PASS_DEPENDENCY(LiveIntervals)initializeLiveIntervalsPass(Registry);
82INITIALIZE_PASS_END(LiveDebugVariables, DEBUG_TYPE,PassInfo *PI = new PassInfo( "Debug Variable Analysis", "livedebugvars"
, &LiveDebugVariables::ID, PassInfo::NormalCtor_t(callDefaultCtor
<LiveDebugVariables>), false, false); Registry.registerPass
(*PI, true); return PI; } static llvm::once_flag InitializeLiveDebugVariablesPassFlag
; void llvm::initializeLiveDebugVariablesPass(PassRegistry &
Registry) { llvm::call_once(InitializeLiveDebugVariablesPassFlag
, initializeLiveDebugVariablesPassOnce, std::ref(Registry)); }
              "Debug Variable Analysis", false, false)PassInfo *PI = new PassInfo( "Debug Variable Analysis", "livedebugvars"
, &LiveDebugVariables::ID, PassInfo::NormalCtor_t(callDefaultCtor
<LiveDebugVariables>), false, false); Registry.registerPass
(*PI, true); return PI; } static llvm::once_flag InitializeLiveDebugVariablesPassFlag
; void llvm::initializeLiveDebugVariablesPass(PassRegistry &
Registry) { llvm::call_once(InitializeLiveDebugVariablesPassFlag
, initializeLiveDebugVariablesPassOnce, std::ref(Registry)); }

85void LiveDebugVariables::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineDominatorTree>();
AU.addRequiredTransitive<LiveIntervals>();
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
90}

92LiveDebugVariables::LiveDebugVariables() : MachineFunctionPass(ID) {
initializeLiveDebugVariablesPass(*PassRegistry::getPassRegistry());
94}

96enum : unsigned { UndefLocNo = ~0U };

98namespace {
99/// Describes a debug variable value by location number and expression along
100/// with some flags about the original usage of the location.
101class DbgVariableValue {
102public:
DbgVariableValue(ArrayRef<unsigned> NewLocs, bool WasIndirect, bool WasList,
                 const DIExpression &Expr)
    : WasIndirect(WasIndirect), WasList(WasList), Expression(&Expr) {
  assert(!(WasIndirect && WasList) &&(static_cast <bool> (!(WasIndirect && WasList) &&
 "DBG_VALUE_LISTs should not be indirect.") ? void (0) : __assert_fail
 ("!(WasIndirect && WasList) && \"DBG_VALUE_LISTs should not be indirect.\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 107, __extension__
 __PRETTY_FUNCTION__))
         "DBG_VALUE_LISTs should not be indirect.")(static_cast <bool> (!(WasIndirect && WasList) &&
 "DBG_VALUE_LISTs should not be indirect.") ? void (0) : __assert_fail
 ("!(WasIndirect && WasList) && \"DBG_VALUE_LISTs should not be indirect.\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 107, __extension__
 __PRETTY_FUNCTION__));
  SmallVector<unsigned> LocNoVec;
  for (unsigned LocNo : NewLocs) {
    auto It = find(LocNoVec, LocNo);
    if (It == LocNoVec.end())
      LocNoVec.push_back(LocNo);
    else {
      // Loc duplicates an element in LocNos; replace references to Op
      // with references to the duplicating element.
      unsigned OpIdx = LocNoVec.size();
      unsigned DuplicatingIdx = std::distance(LocNoVec.begin(), It);
      Expression =
          DIExpression::replaceArg(Expression, OpIdx, DuplicatingIdx);
    }
  }
  // FIXME: Debug values referencing 64+ unique machine locations are rare and
  // currently unsupported for performance reasons. If we can verify that
  // performance is acceptable for such debug values, we can increase the
  // bit-width of LocNoCount to 14 to enable up to 16384 unique machine
  // locations. We will also need to verify that this does not cause issues
  // with LiveDebugVariables' use of IntervalMap.
  if (LocNoVec.size() < 64) {
    LocNoCount = LocNoVec.size();
    if (LocNoCount > 0) {
      LocNos = std::make_unique<unsigned[]>(LocNoCount);
      std::copy(LocNoVec.begin(), LocNoVec.end(), loc_nos_begin());
    }
  } else {
    LLVM_DEBUG(dbgs() << "Found debug value with 64+ unique machine "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Found debug value with 64+ unique machine "
 "locations, dropping...\n"; } } while (false)
                         "locations, dropping...\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Found debug value with 64+ unique machine "
 "locations, dropping...\n"; } } while (false);
    LocNoCount = 1;
    // Turn this into an undef debug value list; right now, the simplest form
    // of this is an expression with one arg, and an undef debug operand.
    Expression =
        DIExpression::get(Expr.getContext(), {dwarf::DW_OP_LLVM_arg, 0});
    if (auto FragmentInfoOpt = Expr.getFragmentInfo())
      Expression = *DIExpression::createFragmentExpression(
          Expression, FragmentInfoOpt->OffsetInBits,
          FragmentInfoOpt->SizeInBits);
    LocNos = std::make_unique<unsigned[]>(LocNoCount);
    LocNos[0] = UndefLocNo;
  }
}

DbgVariableValue() : LocNoCount(0), WasIndirect(false), WasList(false) {}
DbgVariableValue(const DbgVariableValue &Other)
    : LocNoCount(Other.LocNoCount), WasIndirect(Other.getWasIndirect()),
      WasList(Other.getWasList()), Expression(Other.getExpression()) {
  if (Other.getLocNoCount()) {
    LocNos.reset(new unsigned[Other.getLocNoCount()]);
    std::copy(Other.loc_nos_begin(), Other.loc_nos_end(), loc_nos_begin());
  }
}

DbgVariableValue &operator=(const DbgVariableValue &Other) {
  if (this == &Other)
    return *this;
  if (Other.getLocNoCount()) {
    LocNos.reset(new unsigned[Other.getLocNoCount()]);
    std::copy(Other.loc_nos_begin(), Other.loc_nos_end(), loc_nos_begin());
  } else {
    LocNos.release();
  }
  LocNoCount = Other.getLocNoCount();
  WasIndirect = Other.getWasIndirect();
  WasList = Other.getWasList();
  Expression = Other.getExpression();
  return *this;
}

const DIExpression *getExpression() const { return Expression; }
uint8_t getLocNoCount() const { return LocNoCount; }
bool containsLocNo(unsigned LocNo) const {
  return is_contained(loc_nos(), LocNo);
}
bool getWasIndirect() const { return WasIndirect; }
bool getWasList() const { return WasList; }
bool isUndef() const { return LocNoCount == 0 || containsLocNo(UndefLocNo); }

DbgVariableValue decrementLocNosAfterPivot(unsigned Pivot) const {
  SmallVector<unsigned, 4> NewLocNos;
  for (unsigned LocNo : loc_nos())
    NewLocNos.push_back(LocNo != UndefLocNo && LocNo > Pivot ? LocNo - 1
                                                             : LocNo);
  return DbgVariableValue(NewLocNos, WasIndirect, WasList, *Expression);
}

DbgVariableValue remapLocNos(ArrayRef<unsigned> LocNoMap) const {
  SmallVector<unsigned> NewLocNos;
  for (unsigned LocNo : loc_nos())
    // Undef values don't exist in locations (and thus not in LocNoMap
    // either) so skip over them. See getLocationNo().
    NewLocNos.push_back(LocNo == UndefLocNo ? UndefLocNo : LocNoMap[LocNo]);
  return DbgVariableValue(NewLocNos, WasIndirect, WasList, *Expression);
}

DbgVariableValue changeLocNo(unsigned OldLocNo, unsigned NewLocNo) const {
  SmallVector<unsigned> NewLocNos;
  NewLocNos.assign(loc_nos_begin(), loc_nos_end());
  auto OldLocIt = find(NewLocNos, OldLocNo);
  assert(OldLocIt != NewLocNos.end() && "Old location must be present.")(static_cast <bool> (OldLocIt != NewLocNos.end() &&
 "Old location must be present.") ? void (0) : __assert_fail (
"OldLocIt != NewLocNos.end() && \"Old location must be present.\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 207, __extension__
 __PRETTY_FUNCTION__));
  *OldLocIt = NewLocNo;
  return DbgVariableValue(NewLocNos, WasIndirect, WasList, *Expression);
}

bool hasLocNoGreaterThan(unsigned LocNo) const {
  return any_of(loc_nos(),
                [LocNo](unsigned ThisLocNo) { return ThisLocNo > LocNo; });
}

void printLocNos(llvm::raw_ostream &OS) const {
  for (const unsigned &Loc : loc_nos())
20
←
Assuming '__begin2' is not equal to '__end2'→
21
←
'Loc' initialized to the value of '__begin2'→
    OS << (&Loc == loc_nos_begin() ? " " : ", ") << Loc;
22
←
Assuming pointer value is null→
23
←
'?' condition is true→
24
←
Dereference of null pointer
}

friend inline bool operator==(const DbgVariableValue &LHS,
                              const DbgVariableValue &RHS) {
  if (std::tie(LHS.LocNoCount, LHS.WasIndirect, LHS.WasList,
               LHS.Expression) !=
      std::tie(RHS.LocNoCount, RHS.WasIndirect, RHS.WasList, RHS.Expression))
    return false;
  return std::equal(LHS.loc_nos_begin(), LHS.loc_nos_end(),
                    RHS.loc_nos_begin());
}

friend inline bool operator!=(const DbgVariableValue &LHS,
                              const DbgVariableValue &RHS) {
  return !(LHS == RHS);
}

unsigned *loc_nos_begin() { return LocNos.get(); }
const unsigned *loc_nos_begin() const { return LocNos.get(); }
unsigned *loc_nos_end() { return LocNos.get() + LocNoCount; }
const unsigned *loc_nos_end() const { return LocNos.get() + LocNoCount; }
ArrayRef<unsigned> loc_nos() const {
  return ArrayRef<unsigned>(LocNos.get(), LocNoCount);
}

245private:
// IntervalMap requires the value object to be very small, to the extent
// that we do not have enough room for an std::vector. Using a C-style array
// (with a unique_ptr wrapper for convenience) allows us to optimize for this
// specific case by packing the array size into only 6 bits (it is highly
// unlikely that any debug value will need 64+ locations).
std::unique_ptr<unsigned[]> LocNos;
uint8_t LocNoCount : 6;
bool WasIndirect : 1;
bool WasList : 1;
const DIExpression *Expression = nullptr;
256};
257} // namespace

259/// Map of where a user value is live to that value.
260using LocMap = IntervalMap<SlotIndex, DbgVariableValue, 4>;

262/// Map of stack slot offsets for spilled locations.
263/// Non-spilled locations are not added to the map.
264using SpillOffsetMap = DenseMap<unsigned, unsigned>;

266/// Cache to save the location where it can be used as the starting
267/// position as input for calling MachineBasicBlock::SkipPHIsLabelsAndDebug.
268/// This is to prevent MachineBasicBlock::SkipPHIsLabelsAndDebug from
269/// repeatedly searching the same set of PHIs/Labels/Debug instructions
270/// if it is called many times for the same block.
271using BlockSkipInstsMap =
  DenseMap<MachineBasicBlock *, MachineBasicBlock::iterator>;

274namespace {

276class LDVImpl;

278/// A user value is a part of a debug info user variable.
279///
280/// A DBG_VALUE instruction notes that (a sub-register of) a virtual register
281/// holds part of a user variable. The part is identified by a byte offset.
282///
283/// UserValues are grouped into equivalence classes for easier searching. Two
284/// user values are related if they are held by the same virtual register. The
285/// equivalence class is the transitive closure of that relation.
286class UserValue {
const DILocalVariable *Variable; ///< The debug info variable we are part of.
/// The part of the variable we describe.
const std::optional<DIExpression::FragmentInfo> Fragment;
DebugLoc dl;            ///< The debug location for the variable. This is
                        ///< used by dwarf writer to find lexical scope.
UserValue *leader;      ///< Equivalence class leader.
UserValue *next = nullptr; ///< Next value in equivalence class, or null.

/// Numbered locations referenced by locmap.
SmallVector<MachineOperand, 4> locations;

/// Map of slot indices where this value is live.
LocMap locInts;

/// Set of interval start indexes that have been trimmed to the
/// lexical scope.
SmallSet<SlotIndex, 2> trimmedDefs;

/// Insert a DBG_VALUE into MBB at Idx for DbgValue.
void insertDebugValue(MachineBasicBlock *MBB, SlotIndex StartIdx,
                      SlotIndex StopIdx, DbgVariableValue DbgValue,
                      ArrayRef<bool> LocSpills,
                      ArrayRef<unsigned> SpillOffsets, LiveIntervals &LIS,
                      const TargetInstrInfo &TII,
                      const TargetRegisterInfo &TRI,
                      BlockSkipInstsMap &BBSkipInstsMap);

/// Replace OldLocNo ranges with NewRegs ranges where NewRegs
/// is live. Returns true if any changes were made.
bool splitLocation(unsigned OldLocNo, ArrayRef<Register> NewRegs,
                   LiveIntervals &LIS);

319public:
/// Create a new UserValue.
UserValue(const DILocalVariable *var,
          std::optional<DIExpression::FragmentInfo> Fragment, DebugLoc L,
          LocMap::Allocator &alloc)
    : Variable(var), Fragment(Fragment), dl(std::move(L)), leader(this),
      locInts(alloc) {}

/// Get the leader of this value's equivalence class.
UserValue *getLeader() {
  UserValue *l = leader;
  while (l != l->leader)
    l = l->leader;
  return leader = l;
}

/// Return the next UserValue in the equivalence class.
UserValue *getNext() const { return next; }

/// Merge equivalence classes.
static UserValue *merge(UserValue *L1, UserValue *L2) {
  L2 = L2->getLeader();
  if (!L1)
    return L2;
  L1 = L1->getLeader();
  if (L1 == L2)
    return L1;
  // Splice L2 before L1's members.
  UserValue *End = L2;
  while (End->next) {
    End->leader = L1;
    End = End->next;
  }
  End->leader = L1;
  End->next = L1->next;
  L1->next = L2;
  return L1;
}

/// Return the location number that matches Loc.
///
/// For undef values we always return location number UndefLocNo without
/// inserting anything in locations. Since locations is a vector and the
/// location number is the position in the vector and UndefLocNo is ~0,
/// we would need a very big vector to put the value at the right position.
unsigned getLocationNo(const MachineOperand &LocMO) {
  if (LocMO.isReg()) {
    if (LocMO.getReg() == 0)
      return UndefLocNo;
    // For register locations we dont care about use/def and other flags.
    for (unsigned i = 0, e = locations.size(); i != e; ++i)
      if (locations[i].isReg() &&
          locations[i].getReg() == LocMO.getReg() &&
          locations[i].getSubReg() == LocMO.getSubReg())
        return i;
  } else
    for (unsigned i = 0, e = locations.size(); i != e; ++i)
      if (LocMO.isIdenticalTo(locations[i]))
        return i;
  locations.push_back(LocMO);
  // We are storing a MachineOperand outside a MachineInstr.
  locations.back().clearParent();
  // Don't store def operands.
  if (locations.back().isReg()) {
    if (locations.back().isDef())
      locations.back().setIsDead(false);
    locations.back().setIsUse();
  }
  return locations.size() - 1;
}

/// Remove (recycle) a location number. If \p LocNo still is used by the
/// locInts nothing is done.
void removeLocationIfUnused(unsigned LocNo) {
  // Bail out if LocNo still is used.
  for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I) {
    const DbgVariableValue &DbgValue = I.value();
    if (DbgValue.containsLocNo(LocNo))
      return;
  }
  // Remove the entry in the locations vector, and adjust all references to
  // location numbers above the removed entry.
  locations.erase(locations.begin() + LocNo);
  for (LocMap::iterator I = locInts.begin(); I.valid(); ++I) {
    const DbgVariableValue &DbgValue = I.value();
    if (DbgValue.hasLocNoGreaterThan(LocNo))
      I.setValueUnchecked(DbgValue.decrementLocNosAfterPivot(LocNo));
  }
}

/// Ensure that all virtual register locations are mapped.
void mapVirtRegs(LDVImpl *LDV);

/// Add a definition point to this user value.
void addDef(SlotIndex Idx, ArrayRef<MachineOperand> LocMOs, bool IsIndirect,
            bool IsList, const DIExpression &Expr) {
  SmallVector<unsigned> Locs;
  for (const MachineOperand &Op : LocMOs)
    Locs.push_back(getLocationNo(Op));
  DbgVariableValue DbgValue(Locs, IsIndirect, IsList, Expr);
  // Add a singular (Idx,Idx) -> value mapping.
  LocMap::iterator I = locInts.find(Idx);
  if (!I.valid() || I.start() != Idx)
    I.insert(Idx, Idx.getNextSlot(), std::move(DbgValue));
  else
    // A later DBG_VALUE at the same SlotIndex overrides the old location.
    I.setValue(std::move(DbgValue));
}

/// Extend the current definition as far as possible down.
///
/// Stop when meeting an existing def or when leaving the live
/// range of VNI. End points where VNI is no longer live are added to Kills.
///
/// We only propagate DBG_VALUES locally here. LiveDebugValues performs a
/// data-flow analysis to propagate them beyond basic block boundaries.
///
/// \param Idx Starting point for the definition.
/// \param DbgValue value to propagate.
/// \param LiveIntervalInfo For each location number key in this map,
/// restricts liveness to where the LiveRange has the value equal to the\
/// VNInfo.
/// \param [out] Kills Append end points of VNI's live range to Kills.
/// \param LIS Live intervals analysis.
void
extendDef(SlotIndex Idx, DbgVariableValue DbgValue,
          SmallDenseMap<unsigned, std::pair<LiveRange *, const VNInfo *>>
              &LiveIntervalInfo,
          std::optional<std::pair<SlotIndex, SmallVector<unsigned>>> &Kills,
          LiveIntervals &LIS);

/// The value in LI may be copies to other registers. Determine if
/// any of the copies are available at the kill points, and add defs if
/// possible.
///
/// \param DbgValue Location number of LI->reg, and DIExpression.
/// \param LocIntervals Scan for copies of the value for each location in the
/// corresponding LiveInterval->reg.
/// \param KilledAt The point where the range of DbgValue could be extended.
/// \param [in,out] NewDefs Append (Idx, DbgValue) of inserted defs here.
void addDefsFromCopies(
    DbgVariableValue DbgValue,
    SmallVectorImpl<std::pair<unsigned, LiveInterval *>> &LocIntervals,
    SlotIndex KilledAt,
    SmallVectorImpl<std::pair<SlotIndex, DbgVariableValue>> &NewDefs,
    MachineRegisterInfo &MRI, LiveIntervals &LIS);

/// Compute the live intervals of all locations after collecting all their
/// def points.
void computeIntervals(MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
                      LiveIntervals &LIS, LexicalScopes &LS);

/// Replace OldReg ranges with NewRegs ranges where NewRegs is
/// live. Returns true if any changes were made.
bool splitRegister(Register OldReg, ArrayRef<Register> NewRegs,
                   LiveIntervals &LIS);

/// Rewrite virtual register locations according to the provided virtual
/// register map. Record the stack slot offsets for the locations that
/// were spilled.
void rewriteLocations(VirtRegMap &VRM, const MachineFunction &MF,
                      const TargetInstrInfo &TII,
                      const TargetRegisterInfo &TRI,
                      SpillOffsetMap &SpillOffsets);

/// Recreate DBG_VALUE instruction from data structures.
void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
                     const TargetInstrInfo &TII,
                     const TargetRegisterInfo &TRI,
                     const SpillOffsetMap &SpillOffsets,
                     BlockSkipInstsMap &BBSkipInstsMap);

/// Return DebugLoc of this UserValue.
const DebugLoc &getDebugLoc() { return dl; }

void print(raw_ostream &, const TargetRegisterInfo *);
495};

497/// A user label is a part of a debug info user label.
498class UserLabel {
const DILabel *Label; ///< The debug info label we are part of.
DebugLoc dl;          ///< The debug location for the label. This is
                      ///< used by dwarf writer to find lexical scope.
SlotIndex loc;        ///< Slot used by the debug label.

/// Insert a DBG_LABEL into MBB at Idx.
void insertDebugLabel(MachineBasicBlock *MBB, SlotIndex Idx,
                      LiveIntervals &LIS, const TargetInstrInfo &TII,
                      BlockSkipInstsMap &BBSkipInstsMap);

509public:
/// Create a new UserLabel.
UserLabel(const DILabel *label, DebugLoc L, SlotIndex Idx)
    : Label(label), dl(std::move(L)), loc(Idx) {}

/// Does this UserLabel match the parameters?
bool matches(const DILabel *L, const DILocation *IA,
           const SlotIndex Index) const {
  return Label == L && dl->getInlinedAt() == IA && loc == Index;
}

/// Recreate DBG_LABEL instruction from data structures.
void emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII,
                    BlockSkipInstsMap &BBSkipInstsMap);

/// Return DebugLoc of this UserLabel.
const DebugLoc &getDebugLoc() { return dl; }

void print(raw_ostream &, const TargetRegisterInfo *);
528};

530/// Implementation of the LiveDebugVariables pass.
531class LDVImpl {
LiveDebugVariables &pass;
LocMap::Allocator allocator;
MachineFunction *MF = nullptr;
LiveIntervals *LIS;
const TargetRegisterInfo *TRI;

/// Position and VReg of a PHI instruction during register allocation.
struct PHIValPos {
  SlotIndex SI;    /// Slot where this PHI occurs.
  Register Reg;    /// VReg this PHI occurs in.
  unsigned SubReg; /// Qualifiying subregister for Reg.
};

/// Map from debug instruction number to PHI position during allocation.
std::map<unsigned, PHIValPos> PHIValToPos;
/// Index of, for each VReg, which debug instruction numbers and corresponding
/// PHIs are sensitive to splitting. Each VReg may have multiple PHI defs,
/// at different positions.
DenseMap<Register, std::vector<unsigned>> RegToPHIIdx;

/// Record for any debug instructions unlinked from their blocks during
/// regalloc. Stores the instr and it's location, so that they can be
/// re-inserted after regalloc is over.
struct InstrPos {
  MachineInstr *MI;       ///< Debug instruction, unlinked from it's block.
  SlotIndex Idx;          ///< Slot position where MI should be re-inserted.
  MachineBasicBlock *MBB; ///< Block that MI was in.
};

/// Collection of stored debug instructions, preserved until after regalloc.
SmallVector<InstrPos, 32> StashedDebugInstrs;

/// Whether emitDebugValues is called.
bool EmitDone = false;

/// Whether the machine function is modified during the pass.
bool ModifiedMF = false;

/// All allocated UserValue instances.
SmallVector<std::unique_ptr<UserValue>, 8> userValues;

/// All allocated UserLabel instances.
SmallVector<std::unique_ptr<UserLabel>, 2> userLabels;

/// Map virtual register to eq class leader.
using VRMap = DenseMap<unsigned, UserValue *>;
VRMap virtRegToEqClass;

/// Map to find existing UserValue instances.
using UVMap = DenseMap<DebugVariable, UserValue *>;
UVMap userVarMap;

/// Find or create a UserValue.
UserValue *getUserValue(const DILocalVariable *Var,
                        std::optional<DIExpression::FragmentInfo> Fragment,
                        const DebugLoc &DL);

/// Find the EC leader for VirtReg or null.
UserValue *lookupVirtReg(Register VirtReg);

/// Add DBG_VALUE instruction to our maps.
///
/// \param MI DBG_VALUE instruction
/// \param Idx Last valid SLotIndex before instruction.
///
/// \returns True if the DBG_VALUE instruction should be deleted.
bool handleDebugValue(MachineInstr &MI, SlotIndex Idx);

/// Track variable location debug instructions while using the instruction
/// referencing implementation. Such debug instructions do not need to be
/// updated during regalloc because they identify instructions rather than
/// register locations. However, they needs to be removed from the
/// MachineFunction during regalloc, then re-inserted later, to avoid
/// disrupting the allocator.
///
/// \param MI Any DBG_VALUE / DBG_INSTR_REF / DBG_PHI instruction
/// \param Idx Last valid SlotIndex before instruction
///
/// \returns Iterator to continue processing from after unlinking.
MachineBasicBlock::iterator handleDebugInstr(MachineInstr &MI, SlotIndex Idx);

/// Add DBG_LABEL instruction to UserLabel.
///
/// \param MI DBG_LABEL instruction
/// \param Idx Last valid SlotIndex before instruction.
///
/// \returns True if the DBG_LABEL instruction should be deleted.
bool handleDebugLabel(MachineInstr &MI, SlotIndex Idx);

/// Collect and erase all DBG_VALUE instructions, adding a UserValue def
/// for each instruction.
///
/// \param mf MachineFunction to be scanned.
/// \param InstrRef Whether to operate in instruction referencing mode. If
///        true, most of LiveDebugVariables doesn't run.
///
/// \returns True if any debug values were found.
bool collectDebugValues(MachineFunction &mf, bool InstrRef);

/// Compute the live intervals of all user values after collecting all
/// their def points.
void computeIntervals();

635public:
LDVImpl(LiveDebugVariables *ps) : pass(*ps) {}

bool runOnMachineFunction(MachineFunction &mf, bool InstrRef);

/// Release all memory.
void clear() {
  MF = nullptr;
  PHIValToPos.clear();
  RegToPHIIdx.clear();
  StashedDebugInstrs.clear();
  userValues.clear();
  userLabels.clear();
  virtRegToEqClass.clear();
  userVarMap.clear();
  // Make sure we call emitDebugValues if the machine function was modified.
  assert((!ModifiedMF || EmitDone) &&(static_cast <bool> ((!ModifiedMF || EmitDone) &&
 "Dbg values are not emitted in LDV") ? void (0) : __assert_fail
 ("(!ModifiedMF || EmitDone) && \"Dbg values are not emitted in LDV\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 652, __extension__
 __PRETTY_FUNCTION__))
         "Dbg values are not emitted in LDV")(static_cast <bool> ((!ModifiedMF || EmitDone) &&
 "Dbg values are not emitted in LDV") ? void (0) : __assert_fail
 ("(!ModifiedMF || EmitDone) && \"Dbg values are not emitted in LDV\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 652, __extension__
 __PRETTY_FUNCTION__));
  EmitDone = false;
  ModifiedMF = false;
}

/// Map virtual register to an equivalence class.
void mapVirtReg(Register VirtReg, UserValue *EC);

/// Replace any PHI referring to OldReg with its corresponding NewReg, if
/// present.
void splitPHIRegister(Register OldReg, ArrayRef<Register> NewRegs);

/// Replace all references to OldReg with NewRegs.
void splitRegister(Register OldReg, ArrayRef<Register> NewRegs);

/// Recreate DBG_VALUE instruction from data structures.
void emitDebugValues(VirtRegMap *VRM);

void print(raw_ostream&);
671};

673} // end anonymous namespace

675#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
676static void printDebugLoc(const DebugLoc &DL, raw_ostream &CommentOS,
                        const LLVMContext &Ctx) {
if (!DL)
  return;

auto *Scope = cast<DIScope>(DL.getScope());
// Omit the directory, because it's likely to be long and uninteresting.
CommentOS << Scope->getFilename();
CommentOS << ':' << DL.getLine();
if (DL.getCol() != 0)
  CommentOS << ':' << DL.getCol();

DebugLoc InlinedAtDL = DL.getInlinedAt();
if (!InlinedAtDL)
  return;

CommentOS << " @[ ";
printDebugLoc(InlinedAtDL, CommentOS, Ctx);
CommentOS << " ]";
695}

697static void printExtendedName(raw_ostream &OS, const DINode *Node,
                            const DILocation *DL) {
const LLVMContext &Ctx = Node->getContext();
StringRef Res;
unsigned Line = 0;
if (const auto *V = dyn_cast<const DILocalVariable>(Node)) {
  Res = V->getName();
  Line = V->getLine();
} else if (const auto *L = dyn_cast<const DILabel>(Node)) {
  Res = L->getName();
  Line = L->getLine();
}

if (!Res.empty())
  OS << Res << "," << Line;
auto *InlinedAt = DL ? DL->getInlinedAt() : nullptr;
if (InlinedAt) {
  if (DebugLoc InlinedAtDL = InlinedAt) {
    OS << " @[";
    printDebugLoc(InlinedAtDL, OS, Ctx);
    OS << "]";
  }
}
720}

722void UserValue::print(raw_ostream &OS, const TargetRegisterInfo *TRI) {
OS << "!\"";
printExtendedName(OS, Variable, dl);

OS << "\"\t";
for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I) {
  OS << " [" << I.start() << ';' << I.stop() << "):";
  if (I.value().isUndef())
    OS << " undef";
  else {
    I.value().printLocNos(OS);
    if (I.value().getWasIndirect())
      OS << " ind";
    else if (I.value().getWasList())
      OS << " list";
  }
}
for (unsigned i = 0, e = locations.size(); i != e; ++i) {
  OS << " Loc" << i << '=';
  locations[i].print(OS, TRI);
}
OS << '\n';
744}

746void UserLabel::print(raw_ostream &OS, const TargetRegisterInfo *TRI) {
OS << "!\"";
printExtendedName(OS, Label, dl);

OS << "\"\t";
OS << loc;
OS << '\n';
753}

755void LDVImpl::print(raw_ostream &OS) {
OS << "********** DEBUG VARIABLES **********\n";
for (auto &userValue : userValues)
  userValue->print(OS, TRI);
OS << "********** DEBUG LABELS **********\n";
for (auto &userLabel : userLabels)
  userLabel->print(OS, TRI);
762}
763#endif

765void UserValue::mapVirtRegs(LDVImpl *LDV) {
for (unsigned i = 0, e = locations.size(); i != e; ++i)
  if (locations[i].isReg() && locations[i].getReg().isVirtual())
    LDV->mapVirtReg(locations[i].getReg(), this);
769}

771UserValue *
772LDVImpl::getUserValue(const DILocalVariable *Var,
                    std::optional<DIExpression::FragmentInfo> Fragment,
                    const DebugLoc &DL) {
// FIXME: Handle partially overlapping fragments. See
// https://reviews.llvm.org/D70121#1849741.
DebugVariable ID(Var, Fragment, DL->getInlinedAt());
UserValue *&UV = userVarMap[ID];
if (!UV) {
  userValues.push_back(
      std::make_unique<UserValue>(Var, Fragment, DL, allocator));
  UV = userValues.back().get();
}
return UV;
785}

787void LDVImpl::mapVirtReg(Register VirtReg, UserValue *EC) {
assert(VirtReg.isVirtual() && "Only map VirtRegs")(static_cast <bool> (VirtReg.isVirtual() && "Only map VirtRegs"
) ? void (0) : __assert_fail ("VirtReg.isVirtual() && \"Only map VirtRegs\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 788, __extension__
 __PRETTY_FUNCTION__));
UserValue *&Leader = virtRegToEqClass[VirtReg];
Leader = UserValue::merge(Leader, EC);
791}

793UserValue *LDVImpl::lookupVirtReg(Register VirtReg) {
if (UserValue *UV = virtRegToEqClass.lookup(VirtReg))
  return UV->getLeader();
return nullptr;
797}

799bool LDVImpl::handleDebugValue(MachineInstr &MI, SlotIndex Idx) {
// DBG_VALUE loc, offset, variable, expr
// DBG_VALUE_LIST variable, expr, locs...
if (!MI.isDebugValue()) {
  LLVM_DEBUG(dbgs() << "Can't handle non-DBG_VALUE*: " << MI)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Can't handle non-DBG_VALUE*: "
 << MI; } } while (false);
  return false;
}
if (!MI.getDebugVariableOp().isMetadata()) {
  LLVM_DEBUG(dbgs() << "Can't handle DBG_VALUE* with invalid variable: "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Can't handle DBG_VALUE* with invalid variable: "
 << MI; } } while (false)
                    << MI)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Can't handle DBG_VALUE* with invalid variable: "
 << MI; } } while (false);
  return false;
}
if (MI.isNonListDebugValue() &&
    (MI.getNumOperands() != 4 ||
     !(MI.getDebugOffset().isImm() || MI.getDebugOffset().isReg()))) {
  LLVM_DEBUG(dbgs() << "Can't handle malformed DBG_VALUE: " << MI)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Can't handle malformed DBG_VALUE: "
 << MI; } } while (false);
  return false;
}

// Detect invalid DBG_VALUE instructions, with a debug-use of a virtual
// register that hasn't been defined yet. If we do not remove those here, then
// the re-insertion of the DBG_VALUE instruction after register allocation
// will be incorrect.
bool Discard = false;
for (const MachineOperand &Op : MI.debug_operands()) {
  if (Op.isReg() && Op.getReg().isVirtual()) {
    const Register Reg = Op.getReg();
    if (!LIS->hasInterval(Reg)) {
      // The DBG_VALUE is described by a virtual register that does not have a
      // live interval. Discard the DBG_VALUE.
      Discard = true;
      LLVM_DEBUG(dbgs() << "Discarding debug info (no LIS interval): " << Idxdo { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Discarding debug info (no LIS interval): "
 << Idx << " " << MI; } } while (false)
                        << " " << MI)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Discarding debug info (no LIS interval): "
 << Idx << " " << MI; } } while (false);
    } else {
      // The DBG_VALUE is only valid if either Reg is live out from Idx, or
      // Reg is defined dead at Idx (where Idx is the slot index for the
      // instruction preceding the DBG_VALUE).
      const LiveInterval &LI = LIS->getInterval(Reg);
      LiveQueryResult LRQ = LI.Query(Idx);
      if (!LRQ.valueOutOrDead()) {
        // We have found a DBG_VALUE with the value in a virtual register that
        // is not live. Discard the DBG_VALUE.
        Discard = true;
        LLVM_DEBUG(dbgs() << "Discarding debug info (reg not live): " << Idxdo { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Discarding debug info (reg not live): "
 << Idx << " " << MI; } } while (false)
                          << " " << MI)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Discarding debug info (reg not live): "
 << Idx << " " << MI; } } while (false);
      }
    }
  }
}

// Get or create the UserValue for (variable,offset) here.
bool IsIndirect = MI.isDebugOffsetImm();
if (IsIndirect)
  assert(MI.getDebugOffset().getImm() == 0 &&(static_cast <bool> (MI.getDebugOffset().getImm() == 0 &&
 "DBG_VALUE with nonzero offset") ? void (0) : __assert_fail (
"MI.getDebugOffset().getImm() == 0 && \"DBG_VALUE with nonzero offset\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 853, __extension__
 __PRETTY_FUNCTION__))
         "DBG_VALUE with nonzero offset")(static_cast <bool> (MI.getDebugOffset().getImm() == 0 &&
 "DBG_VALUE with nonzero offset") ? void (0) : __assert_fail (
"MI.getDebugOffset().getImm() == 0 && \"DBG_VALUE with nonzero offset\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 853, __extension__
 __PRETTY_FUNCTION__));
bool IsList = MI.isDebugValueList();
const DILocalVariable *Var = MI.getDebugVariable();
const DIExpression *Expr = MI.getDebugExpression();
UserValue *UV = getUserValue(Var, Expr->getFragmentInfo(), MI.getDebugLoc());
if (!Discard)
  UV->addDef(Idx,
             ArrayRef<MachineOperand>(MI.debug_operands().begin(),
                                      MI.debug_operands().end()),
             IsIndirect, IsList, *Expr);
else {
  MachineOperand MO = MachineOperand::CreateReg(0U, false);
  MO.setIsDebug();
  // We should still pass a list the same size as MI.debug_operands() even if
  // all MOs are undef, so that DbgVariableValue can correctly adjust the
  // expression while removing the duplicated undefs.
  SmallVector<MachineOperand, 4> UndefMOs(MI.getNumDebugOperands(), MO);
  UV->addDef(Idx, UndefMOs, false, IsList, *Expr);
}
return true;
873}

875MachineBasicBlock::iterator LDVImpl::handleDebugInstr(MachineInstr &MI,
                                                    SlotIndex Idx) {
assert(MI.isDebugValueLike() || MI.isDebugPHI())(static_cast <bool> (MI.isDebugValueLike() || MI.isDebugPHI
()) ? void (0) : __assert_fail ("MI.isDebugValueLike() || MI.isDebugPHI()"
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 877, __extension__
 __PRETTY_FUNCTION__));

// In instruction referencing mode, there should be no DBG_VALUE instructions
// that refer to virtual registers. They might still refer to constants.
if (MI.isDebugValueLike())
  assert(none_of(MI.debug_operands(),(static_cast <bool> (none_of(MI.debug_operands(), [](const
 MachineOperand &MO) { return MO.isReg() && MO.getReg
().isVirtual(); }) && "MIs should not refer to Virtual Registers in InstrRef mode."
) ? void (0) : __assert_fail ("none_of(MI.debug_operands(), [](const MachineOperand &MO) { return MO.isReg() && MO.getReg().isVirtual(); }) && \"MIs should not refer to Virtual Registers in InstrRef mode.\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 886, __extension__
 __PRETTY_FUNCTION__))
                 [](const MachineOperand &MO) {(static_cast <bool> (none_of(MI.debug_operands(), [](const
 MachineOperand &MO) { return MO.isReg() && MO.getReg
().isVirtual(); }) && "MIs should not refer to Virtual Registers in InstrRef mode."
) ? void (0) : __assert_fail ("none_of(MI.debug_operands(), [](const MachineOperand &MO) { return MO.isReg() && MO.getReg().isVirtual(); }) && \"MIs should not refer to Virtual Registers in InstrRef mode.\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 886, __extension__
 __PRETTY_FUNCTION__))
                   return MO.isReg() && MO.getReg().isVirtual();(static_cast <bool> (none_of(MI.debug_operands(), [](const
 MachineOperand &MO) { return MO.isReg() && MO.getReg
().isVirtual(); }) && "MIs should not refer to Virtual Registers in InstrRef mode."
) ? void (0) : __assert_fail ("none_of(MI.debug_operands(), [](const MachineOperand &MO) { return MO.isReg() && MO.getReg().isVirtual(); }) && \"MIs should not refer to Virtual Registers in InstrRef mode.\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 886, __extension__
 __PRETTY_FUNCTION__))
                 }) &&(static_cast <bool> (none_of(MI.debug_operands(), [](const
 MachineOperand &MO) { return MO.isReg() && MO.getReg
().isVirtual(); }) && "MIs should not refer to Virtual Registers in InstrRef mode."
) ? void (0) : __assert_fail ("none_of(MI.debug_operands(), [](const MachineOperand &MO) { return MO.isReg() && MO.getReg().isVirtual(); }) && \"MIs should not refer to Virtual Registers in InstrRef mode.\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 886, __extension__
 __PRETTY_FUNCTION__))
         "MIs should not refer to Virtual Registers in InstrRef mode.")(static_cast <bool> (none_of(MI.debug_operands(), [](const
 MachineOperand &MO) { return MO.isReg() && MO.getReg
().isVirtual(); }) && "MIs should not refer to Virtual Registers in InstrRef mode."
) ? void (0) : __assert_fail ("none_of(MI.debug_operands(), [](const MachineOperand &MO) { return MO.isReg() && MO.getReg().isVirtual(); }) && \"MIs should not refer to Virtual Registers in InstrRef mode.\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 886, __extension__
 __PRETTY_FUNCTION__));

// Unlink the instruction, store it in the debug instructions collection.
auto NextInst = std::next(MI.getIterator());
auto *MBB = MI.getParent();
MI.removeFromParent();
StashedDebugInstrs.push_back({&MI, Idx, MBB});
return NextInst;
894}

896bool LDVImpl::handleDebugLabel(MachineInstr &MI, SlotIndex Idx) {
// DBG_LABEL label
if (MI.getNumOperands() != 1 || !MI.getOperand(0).isMetadata()) {
  LLVM_DEBUG(dbgs() << "Can't handle " << MI)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Can't handle " <<
 MI; } } while (false);
  return false;
}

// Get or create the UserLabel for label here.
const DILabel *Label = MI.getDebugLabel();
const DebugLoc &DL = MI.getDebugLoc();
bool Found = false;
for (auto const &L : userLabels) {
  if (L->matches(Label, DL->getInlinedAt(), Idx)) {
    Found = true;
    break;
  }
}
if (!Found)
  userLabels.push_back(std::make_unique<UserLabel>(Label, DL, Idx));

return true;
917}

919bool LDVImpl::collectDebugValues(MachineFunction &mf, bool InstrRef) {
bool Changed = false;
for (MachineBasicBlock &MBB : mf) {
  for (MachineBasicBlock::iterator MBBI = MBB.begin(), MBBE = MBB.end();
       MBBI != MBBE;) {
    // Use the first debug instruction in the sequence to get a SlotIndex
    // for following consecutive debug instructions.
    if (!MBBI->isDebugOrPseudoInstr()) {
      ++MBBI;
      continue;
    }
    // Debug instructions has no slot index. Use the previous
    // non-debug instruction's SlotIndex as its SlotIndex.
    SlotIndex Idx =
        MBBI == MBB.begin()
            ? LIS->getMBBStartIdx(&MBB)
            : LIS->getInstructionIndex(*std::prev(MBBI)).getRegSlot();
    // Handle consecutive debug instructions with the same slot index.
    do {
      // In instruction referencing mode, pass each instr to handleDebugInstr
      // to be unlinked. Ignore DBG_VALUE_LISTs -- they refer to vregs, and
      // need to go through the normal live interval splitting process.
      if (InstrRef && (MBBI->isNonListDebugValue() || MBBI->isDebugPHI() ||
                       MBBI->isDebugRef())) {
        MBBI = handleDebugInstr(*MBBI, Idx);
        Changed = true;
      // In normal debug mode, use the dedicated DBG_VALUE / DBG_LABEL handler
      // to track things through register allocation, and erase the instr.
      } else if ((MBBI->isDebugValue() && handleDebugValue(*MBBI, Idx)) ||
                 (MBBI->isDebugLabel() && handleDebugLabel(*MBBI, Idx))) {
        MBBI = MBB.erase(MBBI);
        Changed = true;
      } else
        ++MBBI;
    } while (MBBI != MBBE && MBBI->isDebugOrPseudoInstr());
  }
}
return Changed;
957}

959void UserValue::extendDef(
  SlotIndex Idx, DbgVariableValue DbgValue,
  SmallDenseMap<unsigned, std::pair<LiveRange *, const VNInfo *>>
      &LiveIntervalInfo,
  std::optional<std::pair<SlotIndex, SmallVector<unsigned>>> &Kills,
  LiveIntervals &LIS) {
SlotIndex Start = Idx;
MachineBasicBlock *MBB = LIS.getMBBFromIndex(Start);
SlotIndex Stop = LIS.getMBBEndIdx(MBB);
LocMap::iterator I = locInts.find(Start);

// Limit to the intersection of the VNIs' live ranges.
for (auto &LII : LiveIntervalInfo) {
  LiveRange *LR = LII.second.first;
  assert(LR && LII.second.second && "Missing range info for Idx.")(static_cast <bool> (LR && LII.second.second &&
 "Missing range info for Idx.") ? void (0) : __assert_fail ("LR && LII.second.second && \"Missing range info for Idx.\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 973, __extension__
 __PRETTY_FUNCTION__));
  LiveInterval::Segment *Segment = LR->getSegmentContaining(Start);
  assert(Segment && Segment->valno == LII.second.second &&(static_cast <bool> (Segment && Segment->valno
 == LII.second.second && "Invalid VNInfo for Idx given?"
) ? void (0) : __assert_fail ("Segment && Segment->valno == LII.second.second && \"Invalid VNInfo for Idx given?\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 976, __extension__
 __PRETTY_FUNCTION__))
         "Invalid VNInfo for Idx given?")(static_cast <bool> (Segment && Segment->valno
 == LII.second.second && "Invalid VNInfo for Idx given?"
) ? void (0) : __assert_fail ("Segment && Segment->valno == LII.second.second && \"Invalid VNInfo for Idx given?\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 976, __extension__
 __PRETTY_FUNCTION__));
  if (Segment->end < Stop) {
    Stop = Segment->end;
    Kills = {Stop, {LII.first}};
  } else if (Segment->end == Stop && Kills) {
    // If multiple locations end at the same place, track all of them in
    // Kills.
    Kills->second.push_back(LII.first);
  }
}

// There could already be a short def at Start.
if (I.valid() && I.start() <= Start) {
  // Stop when meeting a different location or an already extended interval.
  Start = Start.getNextSlot();
  if (I.value() != DbgValue || I.stop() != Start) {
    // Clear `Kills`, as we have a new def available.
    Kills = std::nullopt;
    return;
  }
  // This is a one-slot placeholder. Just skip it.
  ++I;
}

// Limited by the next def.
if (I.valid() && I.start() < Stop) {
  Stop = I.start();
  // Clear `Kills`, as we have a new def available.
  Kills = std::nullopt;
}

if (Start < Stop) {
  DbgVariableValue ExtDbgValue(DbgValue);
  I.insert(Start, Stop, std::move(ExtDbgValue));
}
1011}

1013void UserValue::addDefsFromCopies(
  DbgVariableValue DbgValue,
  SmallVectorImpl<std::pair<unsigned, LiveInterval *>> &LocIntervals,
  SlotIndex KilledAt,
  SmallVectorImpl<std::pair<SlotIndex, DbgVariableValue>> &NewDefs,
  MachineRegisterInfo &MRI, LiveIntervals &LIS) {
// Don't track copies from physregs, there are too many uses.
if (any_of(LocIntervals,
           [](auto LocI) { return !LocI.second->reg().isVirtual(); }))
  return;

// Collect all the (vreg, valno) pairs that are copies of LI.
SmallDenseMap<unsigned,
              SmallVector<std::pair<LiveInterval *, const VNInfo *>, 4>>
    CopyValues;
for (auto &LocInterval : LocIntervals) {
  unsigned LocNo = LocInterval.first;
  LiveInterval *LI = LocInterval.second;
  for (MachineOperand &MO : MRI.use_nodbg_operands(LI->reg())) {
    MachineInstr *MI = MO.getParent();
    // Copies of the full value.
    if (MO.getSubReg() || !MI->isCopy())
      continue;
    Register DstReg = MI->getOperand(0).getReg();

    // Don't follow copies to physregs. These are usually setting up call
    // arguments, and the argument registers are always call clobbered. We are
    // better off in the source register which could be a callee-saved
    // register, or it could be spilled.
    if (!DstReg.isVirtual())
      continue;

    // Is the value extended to reach this copy? If not, another def may be
    // blocking it, or we are looking at a wrong value of LI.
    SlotIndex Idx = LIS.getInstructionIndex(*MI);
    LocMap::iterator I = locInts.find(Idx.getRegSlot(true));
    if (!I.valid() || I.value() != DbgValue)
      continue;

    if (!LIS.hasInterval(DstReg))
      continue;
    LiveInterval *DstLI = &LIS.getInterval(DstReg);
    const VNInfo *DstVNI = DstLI->getVNInfoAt(Idx.getRegSlot());
    assert(DstVNI && DstVNI->def == Idx.getRegSlot() && "Bad copy value")(static_cast <bool> (DstVNI && DstVNI->def ==
 Idx.getRegSlot() && "Bad copy value") ? void (0) : __assert_fail
 ("DstVNI && DstVNI->def == Idx.getRegSlot() && \"Bad copy value\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 1056, __extension__
 __PRETTY_FUNCTION__));
    CopyValues[LocNo].push_back(std::make_pair(DstLI, DstVNI));
  }
}

if (CopyValues.empty())
  return;

1064#if !defined(NDEBUG)
for (auto &LocInterval : LocIntervals)
  LLVM_DEBUG(dbgs() << "Got " << CopyValues[LocInterval.first].size()do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Got " << CopyValues
[LocInterval.first].size() << " copies of " << *LocInterval
.second << '\n'; } } while (false)
                    << " copies of " << *LocInterval.second << '\n')do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Got " << CopyValues
[LocInterval.first].size() << " copies of " << *LocInterval
.second << '\n'; } } while (false);
1068#endif

// Try to add defs of the copied values for the kill point. Check that there
// isn't already a def at Idx.
LocMap::iterator I = locInts.find(KilledAt);
if (I.valid() && I.start() <= KilledAt)
  return;
DbgVariableValue NewValue(DbgValue);
for (auto &LocInterval : LocIntervals) {
  unsigned LocNo = LocInterval.first;
  bool FoundCopy = false;
  for (auto &LIAndVNI : CopyValues[LocNo]) {
    LiveInterval *DstLI = LIAndVNI.first;
    const VNInfo *DstVNI = LIAndVNI.second;
    if (DstLI->getVNInfoAt(KilledAt) != DstVNI)
      continue;
    LLVM_DEBUG(dbgs() << "Kill at " << KilledAt << " covered by valno #"do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Kill at " << KilledAt
 << " covered by valno #" << DstVNI->id <<
 " in " << *DstLI << '\n'; } } while (false)
                      << DstVNI->id << " in " << *DstLI << '\n')do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "Kill at " << KilledAt
 << " covered by valno #" << DstVNI->id <<
 " in " << *DstLI << '\n'; } } while (false);
    MachineInstr *CopyMI = LIS.getInstructionFromIndex(DstVNI->def);
    assert(CopyMI && CopyMI->isCopy() && "Bad copy value")(static_cast <bool> (CopyMI && CopyMI->isCopy
() && "Bad copy value") ? void (0) : __assert_fail ("CopyMI && CopyMI->isCopy() && \"Bad copy value\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 1087, __extension__
 __PRETTY_FUNCTION__));
    unsigned NewLocNo = getLocationNo(CopyMI->getOperand(0));
    NewValue = NewValue.changeLocNo(LocNo, NewLocNo);
    FoundCopy = true;
    break;
  }
  // If there are any killed locations we can't find a copy for, we can't
  // extend the variable value.
  if (!FoundCopy)
    return;
}
I.insert(KilledAt, KilledAt.getNextSlot(), NewValue);
NewDefs.push_back(std::make_pair(KilledAt, NewValue));
1100}

1102void UserValue::computeIntervals(MachineRegisterInfo &MRI,
                               const TargetRegisterInfo &TRI,
                               LiveIntervals &LIS, LexicalScopes &LS) {
SmallVector<std::pair<SlotIndex, DbgVariableValue>, 16> Defs;

// Collect all defs to be extended (Skipping undefs).
for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I)
  if (!I.value().isUndef())
    Defs.push_back(std::make_pair(I.start(), I.value()));

// Extend all defs, and possibly add new ones along the way.
for (unsigned i = 0; i != Defs.size(); ++i) {
  SlotIndex Idx = Defs[i].first;
  DbgVariableValue DbgValue = Defs[i].second;
  SmallDenseMap<unsigned, std::pair<LiveRange *, const VNInfo *>> LIs;
  SmallVector<const VNInfo *, 4> VNIs;
  bool ShouldExtendDef = false;
  for (unsigned LocNo : DbgValue.loc_nos()) {
    const MachineOperand &LocMO = locations[LocNo];
    if (!LocMO.isReg() || !LocMO.getReg().isVirtual()) {
      ShouldExtendDef |= !LocMO.isReg();
      continue;
    }
    ShouldExtendDef = true;
    LiveInterval *LI = nullptr;
    const VNInfo *VNI = nullptr;
    if (LIS.hasInterval(LocMO.getReg())) {
      LI = &LIS.getInterval(LocMO.getReg());
      VNI = LI->getVNInfoAt(Idx);
    }
    if (LI && VNI)
      LIs[LocNo] = {LI, VNI};
  }
  if (ShouldExtendDef) {
    std::optional<std::pair<SlotIndex, SmallVector<unsigned>>> Kills;
    extendDef(Idx, DbgValue, LIs, Kills, LIS);

    if (Kills) {
      SmallVector<std::pair<unsigned, LiveInterval *>, 2> KilledLocIntervals;
      bool AnySubreg = false;
      for (unsigned LocNo : Kills->second) {
        const MachineOperand &LocMO = this->locations[LocNo];
        if (LocMO.getSubReg()) {
          AnySubreg = true;
          break;
        }
        LiveInterval *LI = &LIS.getInterval(LocMO.getReg());
        KilledLocIntervals.push_back({LocNo, LI});
      }

      // FIXME: Handle sub-registers in addDefsFromCopies. The problem is that
      // if the original location for example is %vreg0:sub_hi, and we find a
      // full register copy in addDefsFromCopies (at the moment it only
      // handles full register copies), then we must add the sub1 sub-register
      // index to the new location. However, that is only possible if the new
      // virtual register is of the same regclass (or if there is an
      // equivalent sub-register in that regclass). For now, simply skip
      // handling copies if a sub-register is involved.
      if (!AnySubreg)
        addDefsFromCopies(DbgValue, KilledLocIntervals, Kills->first, Defs,
                          MRI, LIS);
    }
  }

  // For physregs, we only mark the start slot idx. DwarfDebug will see it
  // as if the DBG_VALUE is valid up until the end of the basic block, or
  // the next def of the physical register. So we do not need to extend the
  // range. It might actually happen that the DBG_VALUE is the last use of
  // the physical register (e.g. if this is an unused input argument to a
  // function).
}

// The computed intervals may extend beyond the range of the debug
// location's lexical scope. In this case, splitting of an interval
// can result in an interval outside of the scope being created,
// causing extra unnecessary DBG_VALUEs to be emitted. To prevent
// this, trim the intervals to the lexical scope in the case of inlined
// variables, since heavy inlining may cause production of dramatically big
// number of DBG_VALUEs to be generated.
if (!dl.getInlinedAt())
  return;

LexicalScope *Scope = LS.findLexicalScope(dl);
if (!Scope)
  return;

SlotIndex PrevEnd;
LocMap::iterator I = locInts.begin();

// Iterate over the lexical scope ranges. Each time round the loop
// we check the intervals for overlap with the end of the previous
// range and the start of the next. The first range is handled as
// a special case where there is no PrevEnd.
for (const InsnRange &Range : Scope->getRanges()) {
  SlotIndex RStart = LIS.getInstructionIndex(*Range.first);
  SlotIndex REnd = LIS.getInstructionIndex(*Range.second);

  // Variable locations at the first instruction of a block should be
  // based on the block's SlotIndex, not the first instruction's index.
  if (Range.first == Range.first->getParent()->begin())
    RStart = LIS.getSlotIndexes()->getIndexBefore(*Range.first);

  // At the start of each iteration I has been advanced so that
  // I.stop() >= PrevEnd. Check for overlap.
  if (PrevEnd && I.start() < PrevEnd) {
    SlotIndex IStop = I.stop();
    DbgVariableValue DbgValue = I.value();

    // Stop overlaps previous end - trim the end of the interval to
    // the scope range.
    I.setStopUnchecked(PrevEnd);
    ++I;

    // If the interval also overlaps the start of the "next" (i.e.
    // current) range create a new interval for the remainder (which
    // may be further trimmed).
    if (RStart < IStop)
      I.insert(RStart, IStop, DbgValue);
  }

  // Advance I so that I.stop() >= RStart, and check for overlap.
  I.advanceTo(RStart);
  if (!I.valid())
    return;

  if (I.start() < RStart) {
    // Interval start overlaps range - trim to the scope range.
    I.setStartUnchecked(RStart);
    // Remember that this interval was trimmed.
    trimmedDefs.insert(RStart);
  }

  // The end of a lexical scope range is the last instruction in the
  // range. To convert to an interval we need the index of the
  // instruction after it.
  REnd = REnd.getNextIndex();

  // Advance I to first interval outside current range.
  I.advanceTo(REnd);
  if (!I.valid())
    return;

  PrevEnd = REnd;
}

// Check for overlap with end of final range.
if (PrevEnd && I.start() < PrevEnd)
  I.setStopUnchecked(PrevEnd);
1250}

1252void LDVImpl::computeIntervals() {
LexicalScopes LS;
LS.initialize(*MF);

for (unsigned i = 0, e = userValues.size(); i != e; ++i) {
  userValues[i]->computeIntervals(MF->getRegInfo(), *TRI, *LIS, LS);
  userValues[i]->mapVirtRegs(this);
}
1260}

1262bool LDVImpl::runOnMachineFunction(MachineFunction &mf, bool InstrRef) {
clear();
MF = &mf;
LIS = &pass.getAnalysis<LiveIntervals>();
TRI = mf.getSubtarget().getRegisterInfo();
LLVM_DEBUG(dbgs() << "********** COMPUTING LIVE DEBUG VARIABLES: "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "********** COMPUTING LIVE DEBUG VARIABLES: "
 << mf.getName() << " **********\n"; } } while (false
)
                  << mf.getName() << " **********\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "********** COMPUTING LIVE DEBUG VARIABLES: "
 << mf.getName() << " **********\n"; } } while (false
);

bool Changed = collectDebugValues(mf, InstrRef);
computeIntervals();
LLVM_DEBUG(print(dbgs()))do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { print(dbgs()); } } while (false);

// Collect the set of VReg / SlotIndexs where PHIs occur; index the sensitive
// VRegs too, for when we're notified of a range split.
SlotIndexes *Slots = LIS->getSlotIndexes();
for (const auto &PHIIt : MF->DebugPHIPositions) {
  const MachineFunction::DebugPHIRegallocPos &Position = PHIIt.second;
  MachineBasicBlock *MBB = Position.MBB;
  Register Reg = Position.Reg;
  unsigned SubReg = Position.SubReg;
  SlotIndex SI = Slots->getMBBStartIdx(MBB);
  PHIValPos VP = {SI, Reg, SubReg};
  PHIValToPos.insert(std::make_pair(PHIIt.first, VP));
  RegToPHIIdx[Reg].push_back(PHIIt.first);
}

ModifiedMF = Changed;
return Changed;
1290}

1292static void removeDebugInstrs(MachineFunction &mf) {
for (MachineBasicBlock &MBB : mf) {
  for (MachineInstr &MI : llvm::make_early_inc_range(MBB))
    if (MI.isDebugInstr())
      MBB.erase(&MI);
}
1298}

1300bool LiveDebugVariables::runOnMachineFunction(MachineFunction &mf) {
if (!EnableLDV)
  return false;
if (!mf.getFunction().getSubprogram()) {
  removeDebugInstrs(mf);
  return false;
}

// Have we been asked to track variable locations using instruction
// referencing?
bool InstrRef = mf.useDebugInstrRef();

if (!pImpl)
  pImpl = new LDVImpl(this);
return static_cast<LDVImpl *>(pImpl)->runOnMachineFunction(mf, InstrRef);
1315}

1317void LiveDebugVariables::releaseMemory() {
if (pImpl)
  static_cast<LDVImpl*>(pImpl)->clear();
1320}

1322LiveDebugVariables::~LiveDebugVariables() {
if (pImpl)
  delete static_cast<LDVImpl*>(pImpl);
1325}

1327//===----------------------------------------------------------------------===//
1328//                           Live Range Splitting
1329//===----------------------------------------------------------------------===//

1331bool
1332UserValue::splitLocation(unsigned OldLocNo, ArrayRef<Register> NewRegs,
                       LiveIntervals& LIS) {
LLVM_DEBUG({do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { { dbgs() << "Splitting Loc" <<
 OldLocNo << '\t'; print(dbgs(), nullptr); }; } } while
 (false)
  dbgs() << "Splitting Loc" << OldLocNo << '\t';do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { { dbgs() << "Splitting Loc" <<
 OldLocNo << '\t'; print(dbgs(), nullptr); }; } } while
 (false)
  print(dbgs(), nullptr);do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { { dbgs() << "Splitting Loc" <<
 OldLocNo << '\t'; print(dbgs(), nullptr); }; } } while
 (false)
})do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { { dbgs() << "Splitting Loc" <<
 OldLocNo << '\t'; print(dbgs(), nullptr); }; } } while
 (false);
bool DidChange = false;
LocMap::iterator LocMapI;
LocMapI.setMap(locInts);
for (Register NewReg : NewRegs) {
  LiveInterval *LI = &LIS.getInterval(NewReg);
  if (LI->empty())
    continue;

  // Don't allocate the new LocNo until it is needed.
  unsigned NewLocNo = UndefLocNo;

  // Iterate over the overlaps between locInts and LI.
  LocMapI.find(LI->beginIndex());
  if (!LocMapI.valid())
    continue;
  LiveInterval::iterator LII = LI->advanceTo(LI->begin(), LocMapI.start());
  LiveInterval::iterator LIE = LI->end();
  while (LocMapI.valid() && LII != LIE) {
    // At this point, we know that LocMapI.stop() > LII->start.
    LII = LI->advanceTo(LII, LocMapI.start());
    if (LII == LIE)
      break;

    // Now LII->end > LocMapI.start(). Do we have an overlap?
    if (LocMapI.value().containsLocNo(OldLocNo) &&
        LII->start < LocMapI.stop()) {
      // Overlapping correct location. Allocate NewLocNo now.
      if (NewLocNo == UndefLocNo) {
        MachineOperand MO = MachineOperand::CreateReg(LI->reg(), false);
        MO.setSubReg(locations[OldLocNo].getSubReg());
        NewLocNo = getLocationNo(MO);
        DidChange = true;
      }

      SlotIndex LStart = LocMapI.start();
      SlotIndex LStop = LocMapI.stop();
      DbgVariableValue OldDbgValue = LocMapI.value();

      // Trim LocMapI down to the LII overlap.
      if (LStart < LII->start)
        LocMapI.setStartUnchecked(LII->start);
      if (LStop > LII->end)
        LocMapI.setStopUnchecked(LII->end);

      // Change the value in the overlap. This may trigger coalescing.
      LocMapI.setValue(OldDbgValue.changeLocNo(OldLocNo, NewLocNo));

      // Re-insert any removed OldDbgValue ranges.
      if (LStart < LocMapI.start()) {
        LocMapI.insert(LStart, LocMapI.start(), OldDbgValue);
        ++LocMapI;
        assert(LocMapI.valid() && "Unexpected coalescing")(static_cast <bool> (LocMapI.valid() && "Unexpected coalescing"
) ? void (0) : __assert_fail ("LocMapI.valid() && \"Unexpected coalescing\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 1389, __extension__
 __PRETTY_FUNCTION__));
      }
      if (LStop > LocMapI.stop()) {
        ++LocMapI;
        LocMapI.insert(LII->end, LStop, OldDbgValue);
        --LocMapI;
      }
    }

    // Advance to the next overlap.
    if (LII->end < LocMapI.stop()) {
      if (++LII == LIE)
        break;
      LocMapI.advanceTo(LII->start);
    } else {
      ++LocMapI;
      if (!LocMapI.valid())
        break;
      LII = LI->advanceTo(LII, LocMapI.start());
    }
  }
}

// Finally, remove OldLocNo unless it is still used by some interval in the
// locInts map. One case when OldLocNo still is in use is when the register
// has been spilled. In such situations the spilled register is kept as a
// location until rewriteLocations is called (VirtRegMap is mapping the old
// register to the spill slot). So for a while we can have locations that map
// to virtual registers that have been removed from both the MachineFunction
// and from LiveIntervals.
//
// We may also just be using the location for a value with a different
// expression.
removeLocationIfUnused(OldLocNo);

LLVM_DEBUG({do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { { dbgs() << "Split result: \t"; print
(dbgs(), nullptr); }; } } while (false)
  dbgs() << "Split result: \t";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { { dbgs() << "Split result: \t"; print
(dbgs(), nullptr); }; } } while (false)
  print(dbgs(), nullptr);do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { { dbgs() << "Split result: \t"; print
(dbgs(), nullptr); }; } } while (false)
})do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { { dbgs() << "Split result: \t"; print
(dbgs(), nullptr); }; } } while (false);
return DidChange;
1429}

1431bool
1432UserValue::splitRegister(Register OldReg, ArrayRef<Register> NewRegs,
                       LiveIntervals &LIS) {
bool DidChange = false;
// Split locations referring to OldReg. Iterate backwards so splitLocation can
// safely erase unused locations.
for (unsigned i = locations.size(); i ; --i) {
  unsigned LocNo = i-1;
  const MachineOperand *Loc = &locations[LocNo];
  if (!Loc->isReg() || Loc->getReg() != OldReg)
    continue;
  DidChange |= splitLocation(LocNo, NewRegs, LIS);
}
return DidChange;
1445}

1447void LDVImpl::splitPHIRegister(Register OldReg, ArrayRef<Register> NewRegs) {
auto RegIt = RegToPHIIdx.find(OldReg);
if (RegIt == RegToPHIIdx.end())
  return;

std::vector<std::pair<Register, unsigned>> NewRegIdxes;
// Iterate over all the debug instruction numbers affected by this split.
for (unsigned InstrID : RegIt->second) {
  auto PHIIt = PHIValToPos.find(InstrID);
  assert(PHIIt != PHIValToPos.end())(static_cast <bool> (PHIIt != PHIValToPos.end()) ? void
 (0) : __assert_fail ("PHIIt != PHIValToPos.end()", "llvm/lib/CodeGen/LiveDebugVariables.cpp"
, 1456, __extension__ __PRETTY_FUNCTION__));
  const SlotIndex &Slot = PHIIt->second.SI;
  assert(OldReg == PHIIt->second.Reg)(static_cast <bool> (OldReg == PHIIt->second.Reg) ? void
 (0) : __assert_fail ("OldReg == PHIIt->second.Reg", "llvm/lib/CodeGen/LiveDebugVariables.cpp"
, 1458, __extension__ __PRETTY_FUNCTION__));

  // Find the new register that covers this position.
  for (auto NewReg : NewRegs) {
    const LiveInterval &LI = LIS->getInterval(NewReg);
    auto LII = LI.find(Slot);
    if (LII != LI.end() && LII->start <= Slot) {
      // This new register covers this PHI position, record this for indexing.
      NewRegIdxes.push_back(std::make_pair(NewReg, InstrID));
      // Record that this value lives in a different VReg now.
      PHIIt->second.Reg = NewReg;
      break;
    }
  }

  // If we do not find a new register covering this PHI, then register
  // allocation has dropped its location, for example because it's not live.
  // The old VReg will not be mapped to a physreg, and the instruction
  // number will have been optimized out.
}

// Re-create register index using the new register numbers.
RegToPHIIdx.erase(RegIt);
for (auto &RegAndInstr : NewRegIdxes)
  RegToPHIIdx[RegAndInstr.first].push_back(RegAndInstr.second);
1483}

1485void LDVImpl::splitRegister(Register OldReg, ArrayRef<Register> NewRegs) {
// Consider whether this split range affects any PHI locations.
splitPHIRegister(OldReg, NewRegs);

// Check whether any intervals mapped by a DBG_VALUE were split and need
// updating.
bool DidChange = false;
for (UserValue *UV = lookupVirtReg(OldReg); UV; UV = UV->getNext())
  DidChange |= UV->splitRegister(OldReg, NewRegs, *LIS);

if (!DidChange)
  return;

// Map all of the new virtual registers.
UserValue *UV = lookupVirtReg(OldReg);
for (Register NewReg : NewRegs)
  mapVirtReg(NewReg, UV);
1502}

1504void LiveDebugVariables::
1505splitRegister(Register OldReg, ArrayRef<Register> NewRegs, LiveIntervals &LIS) {
if (pImpl)
  static_cast<LDVImpl*>(pImpl)->splitRegister(OldReg, NewRegs);
1508}

1510void UserValue::rewriteLocations(VirtRegMap &VRM, const MachineFunction &MF,
                               const TargetInstrInfo &TII,
                               const TargetRegisterInfo &TRI,
                               SpillOffsetMap &SpillOffsets) {
// Build a set of new locations with new numbers so we can coalesce our
// IntervalMap if two vreg intervals collapse to the same physical location.
// Use MapVector instead of SetVector because MapVector::insert returns the
// position of the previously or newly inserted element. The boolean value
// tracks if the location was produced by a spill.
// FIXME: This will be problematic if we ever support direct and indirect
// frame index locations, i.e. expressing both variables in memory and
// 'int x, *px = &x'. The "spilled" bit must become part of the location.
MapVector<MachineOperand, std::pair<bool, unsigned>> NewLocations;
SmallVector<unsigned, 4> LocNoMap(locations.size());
for (unsigned I = 0, E = locations.size(); I != E; ++I) {
  bool Spilled = false;
  unsigned SpillOffset = 0;
  MachineOperand Loc = locations[I];
  // Only virtual registers are rewritten.
  if (Loc.isReg() && Loc.getReg() && Loc.getReg().isVirtual()) {
    Register VirtReg = Loc.getReg();
    if (VRM.isAssignedReg(VirtReg) &&
        Register::isPhysicalRegister(VRM.getPhys(VirtReg))) {
      // This can create a %noreg operand in rare cases when the sub-register
      // index is no longer available. That means the user value is in a
      // non-existent sub-register, and %noreg is exactly what we want.
      Loc.substPhysReg(VRM.getPhys(VirtReg), TRI);
    } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) {
      // Retrieve the stack slot offset.
      unsigned SpillSize;
      const MachineRegisterInfo &MRI = MF.getRegInfo();
      const TargetRegisterClass *TRC = MRI.getRegClass(VirtReg);
      bool Success = TII.getStackSlotRange(TRC, Loc.getSubReg(), SpillSize,
                                           SpillOffset, MF);

      // FIXME: Invalidate the location if the offset couldn't be calculated.
      (void)Success;

      Loc = MachineOperand::CreateFI(VRM.getStackSlot(VirtReg));
      Spilled = true;
    } else {
      Loc.setReg(0);
      Loc.setSubReg(0);
    }
  }

  // Insert this location if it doesn't already exist and record a mapping
  // from the old number to the new number.
  auto InsertResult = NewLocations.insert({Loc, {Spilled, SpillOffset}});
  unsigned NewLocNo = std::distance(NewLocations.begin(), InsertResult.first);
  LocNoMap[I] = NewLocNo;
}

// Rewrite the locations and record the stack slot offsets for spills.
locations.clear();
SpillOffsets.clear();
for (auto &Pair : NewLocations) {
  bool Spilled;
  unsigned SpillOffset;
  std::tie(Spilled, SpillOffset) = Pair.second;
  locations.push_back(Pair.first);
  if (Spilled) {
    unsigned NewLocNo = std::distance(&*NewLocations.begin(), &Pair);
    SpillOffsets[NewLocNo] = SpillOffset;
  }
}

// Update the interval map, but only coalesce left, since intervals to the
// right use the old location numbers. This should merge two contiguous
// DBG_VALUE intervals with different vregs that were allocated to the same
// physical register.
for (LocMap::iterator I = locInts.begin(); I.valid(); ++I) {
  I.setValueUnchecked(I.value().remapLocNos(LocNoMap));
  I.setStart(I.start());
}
1585}

1587/// Find an iterator for inserting a DBG_VALUE instruction.
1588static MachineBasicBlock::iterator
1589findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx, LiveIntervals &LIS,
                 BlockSkipInstsMap &BBSkipInstsMap) {
SlotIndex Start = LIS.getMBBStartIdx(MBB);
Idx = Idx.getBaseIndex();

// Try to find an insert location by going backwards from Idx.
MachineInstr *MI;
while (!(MI = LIS.getInstructionFromIndex(Idx))) {
  // We've reached the beginning of MBB.
  if (Idx == Start) {
    // Retrieve the last PHI/Label/Debug location found when calling
    // SkipPHIsLabelsAndDebug last time. Start searching from there.
    //
    // Note the iterator kept in BBSkipInstsMap is one step back based
    // on the iterator returned by SkipPHIsLabelsAndDebug last time.
    // One exception is when SkipPHIsLabelsAndDebug returns MBB->begin(),
    // BBSkipInstsMap won't save it. This is to consider the case that
    // new instructions may be inserted at the beginning of MBB after
    // last call of SkipPHIsLabelsAndDebug. If we save MBB->begin() in
    // BBSkipInstsMap, after new non-phi/non-label/non-debug instructions
    // are inserted at the beginning of the MBB, the iterator in
    // BBSkipInstsMap won't point to the beginning of the MBB anymore.
    // Therefore The next search in SkipPHIsLabelsAndDebug will skip those
    // newly added instructions and that is unwanted.
    MachineBasicBlock::iterator BeginIt;
    auto MapIt = BBSkipInstsMap.find(MBB);
    if (MapIt == BBSkipInstsMap.end())
      BeginIt = MBB->begin();
    else
      BeginIt = std::next(MapIt->second);
    auto I = MBB->SkipPHIsLabelsAndDebug(BeginIt);
    if (I != BeginIt)
      BBSkipInstsMap[MBB] = std::prev(I);
    return I;
  }
  Idx = Idx.getPrevIndex();
}

// Don't insert anything after the first terminator, though.
return MI->isTerminator() ? MBB->getFirstTerminator() :
                            std::next(MachineBasicBlock::iterator(MI));
1630}

1632/// Find an iterator for inserting the next DBG_VALUE instruction
1633/// (or end if no more insert locations found).
1634static MachineBasicBlock::iterator
1635findNextInsertLocation(MachineBasicBlock *MBB, MachineBasicBlock::iterator I,
                     SlotIndex StopIdx, ArrayRef<MachineOperand> LocMOs,
                     LiveIntervals &LIS, const TargetRegisterInfo &TRI) {
SmallVector<Register, 4> Regs;
for (const MachineOperand &LocMO : LocMOs)
  if (LocMO.isReg())
    Regs.push_back(LocMO.getReg());
if (Regs.empty())
  return MBB->instr_end();

// Find the next instruction in the MBB that define the register Reg.
while (I != MBB->end() && !I->isTerminator()) {
  if (!LIS.isNotInMIMap(*I) &&
      SlotIndex::isEarlierEqualInstr(StopIdx, LIS.getInstructionIndex(*I)))
    break;
  if (any_of(Regs, [&I, &TRI](Register &Reg) {
        return I->definesRegister(Reg, &TRI);
      }))
    // The insert location is directly after the instruction/bundle.
    return std::next(I);
  ++I;
}
return MBB->end();
1658}

1660void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex StartIdx,
                               SlotIndex StopIdx, DbgVariableValue DbgValue,
                               ArrayRef<bool> LocSpills,
                               ArrayRef<unsigned> SpillOffsets,
                               LiveIntervals &LIS, const TargetInstrInfo &TII,
                               const TargetRegisterInfo &TRI,
                               BlockSkipInstsMap &BBSkipInstsMap) {
SlotIndex MBBEndIdx = LIS.getMBBEndIdx(&*MBB);
// Only search within the current MBB.
StopIdx = (MBBEndIdx < StopIdx) ? MBBEndIdx : StopIdx;
MachineBasicBlock::iterator I =
    findInsertLocation(MBB, StartIdx, LIS, BBSkipInstsMap);
// Undef values don't exist in locations so create new "noreg" register MOs
// for them. See getLocationNo().
SmallVector<MachineOperand, 8> MOs;
if (DbgValue.isUndef()) {
  MOs.assign(DbgValue.loc_nos().size(),
             MachineOperand::CreateReg(
                 /* Reg */ 0, /* isDef */ false, /* isImp */ false,
                 /* isKill */ false, /* isDead */ false,
                 /* isUndef */ false, /* isEarlyClobber */ false,
                 /* SubReg */ 0, /* isDebug */ true));
} else {
  for (unsigned LocNo : DbgValue.loc_nos())
    MOs.push_back(locations[LocNo]);
}

++NumInsertedDebugValues;

assert(cast<DILocalVariable>(Variable)(static_cast <bool> (cast<DILocalVariable>(Variable
) ->isValidLocationForIntrinsic(getDebugLoc()) && "Expected inlined-at fields to agree"
) ? void (0) : __assert_fail ("cast<DILocalVariable>(Variable) ->isValidLocationForIntrinsic(getDebugLoc()) && \"Expected inlined-at fields to agree\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 1691, __extension__
 __PRETTY_FUNCTION__))
           ->isValidLocationForIntrinsic(getDebugLoc()) &&(static_cast <bool> (cast<DILocalVariable>(Variable
) ->isValidLocationForIntrinsic(getDebugLoc()) && "Expected inlined-at fields to agree"
) ? void (0) : __assert_fail ("cast<DILocalVariable>(Variable) ->isValidLocationForIntrinsic(getDebugLoc()) && \"Expected inlined-at fields to agree\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 1691, __extension__
 __PRETTY_FUNCTION__))
       "Expected inlined-at fields to agree")(static_cast <bool> (cast<DILocalVariable>(Variable
) ->isValidLocationForIntrinsic(getDebugLoc()) && "Expected inlined-at fields to agree"
) ? void (0) : __assert_fail ("cast<DILocalVariable>(Variable) ->isValidLocationForIntrinsic(getDebugLoc()) && \"Expected inlined-at fields to agree\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 1691, __extension__
 __PRETTY_FUNCTION__));

// If the location was spilled, the new DBG_VALUE will be indirect. If the
// original DBG_VALUE was indirect, we need to add DW_OP_deref to indicate
// that the original virtual register was a pointer. Also, add the stack slot
// offset for the spilled register to the expression.
const DIExpression *Expr = DbgValue.getExpression();
bool IsIndirect = DbgValue.getWasIndirect();
bool IsList = DbgValue.getWasList();
for (unsigned I = 0, E = LocSpills.size(); I != E; ++I) {
  if (LocSpills[I]) {
    if (!IsList) {
      uint8_t DIExprFlags = DIExpression::ApplyOffset;
      if (IsIndirect)
        DIExprFlags |= DIExpression::DerefAfter;
      Expr = DIExpression::prepend(Expr, DIExprFlags, SpillOffsets[I]);
      IsIndirect = true;
    } else {
      SmallVector<uint64_t, 4> Ops;
      DIExpression::appendOffset(Ops, SpillOffsets[I]);
      Ops.push_back(dwarf::DW_OP_deref);
      Expr = DIExpression::appendOpsToArg(Expr, Ops, I);
    }
  }

  assert((!LocSpills[I] || MOs[I].isFI()) &&(static_cast <bool> ((!LocSpills[I] || MOs[I].isFI()) &&
 "a spilled location must be a frame index") ? void (0) : __assert_fail
 ("(!LocSpills[I] || MOs[I].isFI()) && \"a spilled location must be a frame index\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 1717, __extension__
 __PRETTY_FUNCTION__))
         "a spilled location must be a frame index")(static_cast <bool> ((!LocSpills[I] || MOs[I].isFI()) &&
 "a spilled location must be a frame index") ? void (0) : __assert_fail
 ("(!LocSpills[I] || MOs[I].isFI()) && \"a spilled location must be a frame index\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 1717, __extension__
 __PRETTY_FUNCTION__));
}

unsigned DbgValueOpcode =
    IsList ? TargetOpcode::DBG_VALUE_LIST : TargetOpcode::DBG_VALUE;
do {
  BuildMI(*MBB, I, getDebugLoc(), TII.get(DbgValueOpcode), IsIndirect, MOs,
          Variable, Expr);

  // Continue and insert DBG_VALUES after every redefinition of a register
  // associated with the debug value within the range
  I = findNextInsertLocation(MBB, I, StopIdx, MOs, LIS, TRI);
} while (I != MBB->end());
1730}

1732void UserLabel::insertDebugLabel(MachineBasicBlock *MBB, SlotIndex Idx,
                               LiveIntervals &LIS, const TargetInstrInfo &TII,
                               BlockSkipInstsMap &BBSkipInstsMap) {
MachineBasicBlock::iterator I =
    findInsertLocation(MBB, Idx, LIS, BBSkipInstsMap);
++NumInsertedDebugLabels;
BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_LABEL))
    .addMetadata(Label);
1740}

1742void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
                              const TargetInstrInfo &TII,
                              const TargetRegisterInfo &TRI,
                              const SpillOffsetMap &SpillOffsets,
                              BlockSkipInstsMap &BBSkipInstsMap) {
MachineFunction::iterator MFEnd = VRM->getMachineFunction().end();

for (LocMap::const_iterator I = locInts.begin(); I.valid();) {
12
←
Loop condition is true.  Entering loop body→
  SlotIndex Start = I.start();
  SlotIndex Stop = I.stop();
  DbgVariableValue DbgValue = I.value();

  SmallVector<bool> SpilledLocs;
  SmallVector<unsigned> LocSpillOffsets;
  for (unsigned LocNo : DbgValue.loc_nos()) {
13
←
Assuming '__begin2' is equal to '__end2'→
    auto SpillIt =
        !DbgValue.isUndef() ? SpillOffsets.find(LocNo) : SpillOffsets.end();
    bool Spilled = SpillIt != SpillOffsets.end();
    SpilledLocs.push_back(Spilled);
    LocSpillOffsets.push_back(Spilled ? SpillIt->second : 0);
  }

  // If the interval start was trimmed to the lexical scope insert the
  // DBG_VALUE at the previous index (otherwise it appears after the
  // first instruction in the range).
  if (trimmedDefs.count(Start))
14
←
Assuming the condition is false→
    Start = Start.getPrevIndex();

  LLVM_DEBUG(auto &dbg = dbgs(); dbg << "\t[" << Start << ';' << Stop << "):";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { auto &dbg = dbgs(); dbg << "\t["
 << Start << ';' << Stop << "):"; DbgValue
.printLocNos(dbg); } } while (false)
15
←
Taking false branch→
16
←
Assuming 'DebugFlag' is true→
17
←
Assuming the condition is true→
18
←
Taking true branch→
19
←
Calling 'DbgVariableValue::printLocNos'→
             DbgValue.printLocNos(dbg))do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { auto &dbg = dbgs(); dbg << "\t["
 << Start << ';' << Stop << "):"; DbgValue
.printLocNos(dbg); } } while (false);
  MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start)->getIterator();
  SlotIndex MBBEnd = LIS.getMBBEndIdx(&*MBB);

  LLVM_DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << ' ' << printMBBReference
(*MBB) << '-' << MBBEnd; } } while (false);
  insertDebugValue(&*MBB, Start, Stop, DbgValue, SpilledLocs, LocSpillOffsets,
                   LIS, TII, TRI, BBSkipInstsMap);
  // This interval may span multiple basic blocks.
  // Insert a DBG_VALUE into each one.
  while (Stop > MBBEnd) {
    // Move to the next block.
    Start = MBBEnd;
    if (++MBB == MFEnd)
      break;
    MBBEnd = LIS.getMBBEndIdx(&*MBB);
    LLVM_DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << ' ' << printMBBReference
(*MBB) << '-' << MBBEnd; } } while (false);
    insertDebugValue(&*MBB, Start, Stop, DbgValue, SpilledLocs,
                     LocSpillOffsets, LIS, TII, TRI, BBSkipInstsMap);
  }
  LLVM_DEBUG(dbgs() << '\n')do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << '\n'; } } while (false);
  if (MBB == MFEnd)
    break;

  ++I;
}
1796}

1798void UserLabel::emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII,
                             BlockSkipInstsMap &BBSkipInstsMap) {
LLVM_DEBUG(dbgs() << "\t" << loc)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "\t" << loc; } } while
 (false);
MachineFunction::iterator MBB = LIS.getMBBFromIndex(loc)->getIterator();

LLVM_DEBUG(dbgs() << ' ' << printMBBReference(*MBB))do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << ' ' << printMBBReference
(*MBB); } } while (false);
insertDebugLabel(&*MBB, loc, LIS, TII, BBSkipInstsMap);

LLVM_DEBUG(dbgs() << '\n')do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << '\n'; } } while (false);
1807}

1809void LDVImpl::emitDebugValues(VirtRegMap *VRM) {
LLVM_DEBUG(dbgs() << "********** EMITTING LIVE DEBUG VARIABLES **********\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "********** EMITTING LIVE DEBUG VARIABLES **********\n"
; } } while (false);
4
←
Assuming 'DebugFlag' is false→
5
←
Loop condition is false.  Exiting loop→
if (!MF)
6
←
Assuming field 'MF' is non-null→
7
←
Taking false branch→
  return;

BlockSkipInstsMap BBSkipInstsMap;
const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
SpillOffsetMap SpillOffsets;
for (auto &userValue : userValues) {
8
←
Assuming '__begin1' is not equal to '__end1'→
  LLVM_DEBUG(userValue->print(dbgs(), TRI))do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { userValue->print(dbgs(), TRI); } } while
 (false);
9
←
Assuming 'DebugFlag' is false→
10
←
Loop condition is false.  Exiting loop→
  userValue->rewriteLocations(*VRM, *MF, *TII, *TRI, SpillOffsets);
  userValue->emitDebugValues(VRM, *LIS, *TII, *TRI, SpillOffsets,
11
←
Calling 'UserValue::emitDebugValues'→
                             BBSkipInstsMap);
}
LLVM_DEBUG(dbgs() << "********** EMITTING LIVE DEBUG LABELS **********\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "********** EMITTING LIVE DEBUG LABELS **********\n"
; } } while (false);
for (auto &userLabel : userLabels) {
  LLVM_DEBUG(userLabel->print(dbgs(), TRI))do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { userLabel->print(dbgs(), TRI); } } while
 (false);
  userLabel->emitDebugLabel(*LIS, *TII, BBSkipInstsMap);
}

LLVM_DEBUG(dbgs() << "********** EMITTING DEBUG PHIS **********\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "********** EMITTING DEBUG PHIS **********\n"
; } } while (false);

auto Slots = LIS->getSlotIndexes();
for (auto &It : PHIValToPos) {
  // For each ex-PHI, identify its physreg location or stack slot, and emit
  // a DBG_PHI for it.
  unsigned InstNum = It.first;
  auto Slot = It.second.SI;
  Register Reg = It.second.Reg;
  unsigned SubReg = It.second.SubReg;

  MachineBasicBlock *OrigMBB = Slots->getMBBFromIndex(Slot);
  if (VRM->isAssignedReg(Reg) &&
      Register::isPhysicalRegister(VRM->getPhys(Reg))) {
    unsigned PhysReg = VRM->getPhys(Reg);
    if (SubReg != 0)
      PhysReg = TRI->getSubReg(PhysReg, SubReg);

    auto Builder = BuildMI(*OrigMBB, OrigMBB->begin(), DebugLoc(),
                           TII->get(TargetOpcode::DBG_PHI));
    Builder.addReg(PhysReg);
    Builder.addImm(InstNum);
  } else if (VRM->getStackSlot(Reg) != VirtRegMap::NO_STACK_SLOT) {
    const MachineRegisterInfo &MRI = MF->getRegInfo();
    const TargetRegisterClass *TRC = MRI.getRegClass(Reg);
    unsigned SpillSize, SpillOffset;

    unsigned regSizeInBits = TRI->getRegSizeInBits(*TRC);
    if (SubReg)
      regSizeInBits = TRI->getSubRegIdxSize(SubReg);

    // Test whether this location is legal with the given subreg. If the
    // subregister has a nonzero offset, drop this location, it's too complex
    // to describe. (TODO: future work).
    bool Success =
        TII->getStackSlotRange(TRC, SubReg, SpillSize, SpillOffset, *MF);

    if (Success && SpillOffset == 0) {
      auto Builder = BuildMI(*OrigMBB, OrigMBB->begin(), DebugLoc(),
                             TII->get(TargetOpcode::DBG_PHI));
      Builder.addFrameIndex(VRM->getStackSlot(Reg));
      Builder.addImm(InstNum);
      // Record how large the original value is. The stack slot might be
      // merged and altered during optimisation, but we will want to know how
      // large the value is, at this DBG_PHI.
      Builder.addImm(regSizeInBits);
    }

    LLVM_DEBUG(do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { if (SpillOffset != 0) { dbgs() << "DBG_PHI for Vreg "
 << Reg << " subreg " << SubReg << " has nonzero offset\n"
; }; } } while (false)
    if (SpillOffset != 0) {do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { if (SpillOffset != 0) { dbgs() << "DBG_PHI for Vreg "
 << Reg << " subreg " << SubReg << " has nonzero offset\n"
; }; } } while (false)
      dbgs() << "DBG_PHI for Vreg " << Reg << " subreg " << SubReg <<do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { if (SpillOffset != 0) { dbgs() << "DBG_PHI for Vreg "
 << Reg << " subreg " << SubReg << " has nonzero offset\n"
; }; } } while (false)
                " has nonzero offset\n";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { if (SpillOffset != 0) { dbgs() << "DBG_PHI for Vreg "
 << Reg << " subreg " << SubReg << " has nonzero offset\n"
; }; } } while (false)
    }do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { if (SpillOffset != 0) { dbgs() << "DBG_PHI for Vreg "
 << Reg << " subreg " << SubReg << " has nonzero offset\n"
; }; } } while (false)
    )do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { if (SpillOffset != 0) { dbgs() << "DBG_PHI for Vreg "
 << Reg << " subreg " << SubReg << " has nonzero offset\n"
; }; } } while (false);
  }
  // If there was no mapping for a value ID, it's optimized out. Create no
  // DBG_PHI, and any variables using this value will become optimized out.
}
MF->DebugPHIPositions.clear();

LLVM_DEBUG(dbgs() << "********** EMITTING INSTR REFERENCES **********\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("livedebugvars")) { dbgs() << "********** EMITTING INSTR REFERENCES **********\n"
; } } while (false);

// Re-insert any debug instrs back in the position they were. We must
// re-insert in the same order to ensure that debug instructions don't swap,
// which could re-order assignments. Do so in a batch -- once we find the
// insert position, insert all instructions at the same SlotIdx. They are
// guaranteed to appear in-sequence in StashedDebugInstrs because we insert
// them in order.
for (auto *StashIt = StashedDebugInstrs.begin();
     StashIt != StashedDebugInstrs.end(); ++StashIt) {
  SlotIndex Idx = StashIt->Idx;
  MachineBasicBlock *MBB = StashIt->MBB;
  MachineInstr *MI = StashIt->MI;

  auto EmitInstsHere = [this, &StashIt, MBB, Idx,
                        MI](MachineBasicBlock::iterator InsertPos) {
    // Insert this debug instruction.
    MBB->insert(InsertPos, MI);

    // Look at subsequent stashed debug instructions: if they're at the same
    // index, insert those too.
    auto NextItem = std::next(StashIt);
    while (NextItem != StashedDebugInstrs.end() && NextItem->Idx == Idx) {
      assert(NextItem->MBB == MBB && "Instrs with same slot index should be"(static_cast <bool> (NextItem->MBB == MBB &&
 "Instrs with same slot index should be" "in the same block")
 ? void (0) : __assert_fail ("NextItem->MBB == MBB && \"Instrs with same slot index should be\" \"in the same block\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 1913, __extension__
 __PRETTY_FUNCTION__))
             "in the same block")(static_cast <bool> (NextItem->MBB == MBB &&
 "Instrs with same slot index should be" "in the same block")
 ? void (0) : __assert_fail ("NextItem->MBB == MBB && \"Instrs with same slot index should be\" \"in the same block\""
, "llvm/lib/CodeGen/LiveDebugVariables.cpp", 1913, __extension__
 __PRETTY_FUNCTION__));
      MBB->insert(InsertPos, NextItem->MI);
      StashIt = NextItem;
      NextItem = std::next(StashIt);
    };
  };

  // Start block index: find the first non-debug instr in the block, and
  // insert before it.
  if (Idx == Slots->getMBBStartIdx(MBB)) {
    MachineBasicBlock::iterator InsertPos =
        findInsertLocation(MBB, Idx, *LIS, BBSkipInstsMap);
    EmitInstsHere(InsertPos);
    continue;
  }

  if (MachineInstr *Pos = Slots->getInstructionFromIndex(Idx)) {
    // Insert at the end of any debug instructions.
    auto PostDebug = std::next(Pos->getIterator());
    PostDebug = skipDebugInstructionsForward(PostDebug, MBB->instr_end());
    EmitInstsHere(PostDebug);
  } else {
    // Insert position disappeared; walk forwards through slots until we
    // find a new one.
    SlotIndex End = Slots->getMBBEndIdx(MBB);
    for (; Idx < End; Idx = Slots->getNextNonNullIndex(Idx)) {
      Pos = Slots->getInstructionFromIndex(Idx);
      if (Pos) {
        EmitInstsHere(Pos->getIterator());
        break;
      }
    }

    // We have reached the end of the block and didn't find anywhere to
    // insert! It's not safe to discard any debug instructions; place them
    // in front of the first terminator, or in front of end().
    if (Idx >= End) {
      auto TermIt = MBB->getFirstTerminator();
      EmitInstsHere(TermIt);
    }
  }
}

EmitDone = true;
BBSkipInstsMap.clear();
1958}

1960void LiveDebugVariables::emitDebugValues(VirtRegMap *VRM) {
if (pImpl)
1
Assuming field 'pImpl' is non-null→
2
←
Taking true branch→
  static_cast<LDVImpl*>(pImpl)->emitDebugValues(VRM);
3
←
Calling 'LDVImpl::emitDebugValues'→
1963}

1965#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1966LLVM_DUMP_METHOD__attribute__((noinline)) __attribute__((__used__)) void LiveDebugVariables::dump() const {
if (pImpl)
  static_cast<LDVImpl*>(pImpl)->print(dbgs());
1969}
1970#endif