Bug Summary

File:llvm/include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h
Warning:line 35, column 40
Called C++ object pointer is null

Annotated Source Code

Press '?' to see keyboard shortcuts

clang -cc1 -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name InstructionSelect.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -analyzer-config-compatibility-mode=true -mrelocation-model pic -pic-level 2 -mframe-pointer=none -fmath-errno -fno-rounding-math -mconstructor-aliases -funwind-tables=2 -target-cpu x86-64 -tune-cpu generic -debugger-tuning=gdb -ffunction-sections -fdata-sections -fcoverage-compilation-dir=/build/llvm-toolchain-snapshot-14~++20211016100712+8e1d532707fd/build-llvm -resource-dir /usr/lib/llvm-14/lib/clang/14.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I lib/CodeGen/GlobalISel -I /build/llvm-toolchain-snapshot-14~++20211016100712+8e1d532707fd/llvm/lib/CodeGen/GlobalISel -I include -I /build/llvm-toolchain-snapshot-14~++20211016100712+8e1d532707fd/llvm/include -D NDEBUG -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/c++/10 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/x86_64-linux-gnu/c++/10 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/c++/10/backward -internal-isystem /usr/lib/llvm-14/lib/clang/14.0.0/include -internal-isystem /usr/local/include -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../x86_64-linux-gnu/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-command-line-argument -Wno-unknown-warning-option -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-redundant-move -Wno-pessimizing-move -Wno-noexcept-type -Wno-comment -std=c++14 -fdeprecated-macro -fdebug-compilation-dir=/build/llvm-toolchain-snapshot-14~++20211016100712+8e1d532707fd/build-llvm -ferror-limit 19 -fvisibility-inlines-hidden -fgnuc-version=4.2.1 -fcolor-diagnostics -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -faddrsig -D__GCC_HAVE_DWARF2_CFI_ASM=1 -o /tmp/scan-build-2021-10-17-004846-21170-1 -x c++ /build/llvm-toolchain-snapshot-14~++20211016100712+8e1d532707fd/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp

/build/llvm-toolchain-snapshot-14~++20211016100712+8e1d532707fd/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp

1//===- llvm/CodeGen/GlobalISel/InstructionSelect.cpp - InstructionSelect ---==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9/// This file implements the InstructionSelect class.
10//===----------------------------------------------------------------------===//
11
12#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
13#include "llvm/ADT/PostOrderIterator.h"
14#include "llvm/ADT/ScopeExit.h"
15#include "llvm/ADT/Twine.h"
16#include "llvm/Analysis/BlockFrequencyInfo.h"
17#include "llvm/Analysis/LazyBlockFrequencyInfo.h"
18#include "llvm/Analysis/ProfileSummaryInfo.h"
19#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
20#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
21#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
22#include "llvm/CodeGen/GlobalISel/Utils.h"
23#include "llvm/CodeGen/MachineFrameInfo.h"
24#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
25#include "llvm/CodeGen/MachineRegisterInfo.h"
26#include "llvm/CodeGen/TargetInstrInfo.h"
27#include "llvm/CodeGen/TargetLowering.h"
28#include "llvm/CodeGen/TargetPassConfig.h"
29#include "llvm/CodeGen/TargetSubtargetInfo.h"
30#include "llvm/Config/config.h"
31#include "llvm/IR/Constants.h"
32#include "llvm/IR/Function.h"
33#include "llvm/MC/TargetRegistry.h"
34#include "llvm/Support/CommandLine.h"
35#include "llvm/Support/Debug.h"
36#include "llvm/Target/TargetMachine.h"
37
38#define DEBUG_TYPE"instruction-select" "instruction-select"
39
40using namespace llvm;
41
42#ifdef LLVM_GISEL_COV_PREFIX
43static cl::opt<std::string>
44 CoveragePrefix("gisel-coverage-prefix", cl::init(LLVM_GISEL_COV_PREFIX),
45 cl::desc("Record GlobalISel rule coverage files of this "
46 "prefix if instrumentation was generated"));
47#else
48static const std::string CoveragePrefix;
49#endif
50
51char InstructionSelect::ID = 0;
52INITIALIZE_PASS_BEGIN(InstructionSelect, DEBUG_TYPE,static void *initializeInstructionSelectPassOnce(PassRegistry
&Registry) {
53 "Select target instructions out of generic instructions",static void *initializeInstructionSelectPassOnce(PassRegistry
&Registry) {
54 false, false)static void *initializeInstructionSelectPassOnce(PassRegistry
&Registry) {
55INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)initializeTargetPassConfigPass(Registry);
56INITIALIZE_PASS_DEPENDENCY(GISelKnownBitsAnalysis)initializeGISelKnownBitsAnalysisPass(Registry);
57INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass)initializeProfileSummaryInfoWrapperPassPass(Registry);
58INITIALIZE_PASS_DEPENDENCY(LazyBlockFrequencyInfoPass)initializeLazyBlockFrequencyInfoPassPass(Registry);
59INITIALIZE_PASS_END(InstructionSelect, DEBUG_TYPE,PassInfo *PI = new PassInfo( "Select target instructions out of generic instructions"
, "instruction-select", &InstructionSelect::ID, PassInfo::
NormalCtor_t(callDefaultCtor<InstructionSelect>), false
, false); Registry.registerPass(*PI, true); return PI; } static
llvm::once_flag InitializeInstructionSelectPassFlag; void llvm
::initializeInstructionSelectPass(PassRegistry &Registry)
{ llvm::call_once(InitializeInstructionSelectPassFlag, initializeInstructionSelectPassOnce
, std::ref(Registry)); }
60 "Select target instructions out of generic instructions",PassInfo *PI = new PassInfo( "Select target instructions out of generic instructions"
, "instruction-select", &InstructionSelect::ID, PassInfo::
NormalCtor_t(callDefaultCtor<InstructionSelect>), false
, false); Registry.registerPass(*PI, true); return PI; } static
llvm::once_flag InitializeInstructionSelectPassFlag; void llvm
::initializeInstructionSelectPass(PassRegistry &Registry)
{ llvm::call_once(InitializeInstructionSelectPassFlag, initializeInstructionSelectPassOnce
, std::ref(Registry)); }
61 false, false)PassInfo *PI = new PassInfo( "Select target instructions out of generic instructions"
, "instruction-select", &InstructionSelect::ID, PassInfo::
NormalCtor_t(callDefaultCtor<InstructionSelect>), false
, false); Registry.registerPass(*PI, true); return PI; } static
llvm::once_flag InitializeInstructionSelectPassFlag; void llvm
::initializeInstructionSelectPass(PassRegistry &Registry)
{ llvm::call_once(InitializeInstructionSelectPassFlag, initializeInstructionSelectPassOnce
, std::ref(Registry)); }
62
63InstructionSelect::InstructionSelect(CodeGenOpt::Level OL)
64 : MachineFunctionPass(ID), OptLevel(OL) {}
65
66// In order not to crash when calling getAnalysis during testing with -run-pass
67// we use the default opt level here instead of None, so that the addRequired()
68// calls are made in getAnalysisUsage().
69InstructionSelect::InstructionSelect()
70 : MachineFunctionPass(ID), OptLevel(CodeGenOpt::Default) {}
71
72void InstructionSelect::getAnalysisUsage(AnalysisUsage &AU) const {
73 AU.addRequired<TargetPassConfig>();
74 if (OptLevel != CodeGenOpt::None) {
75 AU.addRequired<GISelKnownBitsAnalysis>();
76 AU.addPreserved<GISelKnownBitsAnalysis>();
77 AU.addRequired<ProfileSummaryInfoWrapperPass>();
78 LazyBlockFrequencyInfoPass::getLazyBFIAnalysisUsage(AU);
79 }
80 getSelectionDAGFallbackAnalysisUsage(AU);
81 MachineFunctionPass::getAnalysisUsage(AU);
82}
83
84bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
85 // If the ISel pipeline failed, do not bother running that pass.
86 if (MF.getProperties().hasProperty(
87 MachineFunctionProperties::Property::FailedISel))
88 return false;
89
90 LLVM_DEBUG(dbgs() << "Selecting function: " << MF.getName() << '\n')do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { dbgs() << "Selecting function: "
<< MF.getName() << '\n'; } } while (false)
;
1
Taking false branch
2
Assuming 'DebugFlag' is false
3
Loop condition is false. Exiting loop
91
92 const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
93 InstructionSelector *ISel = MF.getSubtarget().getInstructionSelector();
94
95 CodeGenOpt::Level OldOptLevel = OptLevel;
96 auto RestoreOptLevel = make_scope_exit([=]() { OptLevel = OldOptLevel; });
97 OptLevel = MF.getFunction().hasOptNone() ? CodeGenOpt::None
4
Assuming the condition is true
5
'?' condition is true
98 : MF.getTarget().getOptLevel();
99
100 GISelKnownBits *KB = nullptr;
101 if (OptLevel
5.1
Field 'OptLevel' is equal to None
5.1
Field 'OptLevel' is equal to None
!= CodeGenOpt::None) {
6
Taking false branch
102 KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF);
103 PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
104 if (PSI && PSI->hasProfileSummary())
105 BFI = &getAnalysis<LazyBlockFrequencyInfoPass>().getBFI();
106 }
107
108 CodeGenCoverage CoverageInfo;
109 assert(ISel && "Cannot work without InstructionSelector")(static_cast <bool> (ISel && "Cannot work without InstructionSelector"
) ? void (0) : __assert_fail ("ISel && \"Cannot work without InstructionSelector\""
, "/build/llvm-toolchain-snapshot-14~++20211016100712+8e1d532707fd/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp"
, 109, __extension__ __PRETTY_FUNCTION__))
;
7
Assuming 'ISel' is non-null
8
'?' condition is true
110 ISel->setupMF(MF, KB, CoverageInfo, PSI, BFI);
111
112 // An optimization remark emitter. Used to report failures.
113 MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
114
115 // FIXME: There are many other MF/MFI fields we need to initialize.
116
117 MachineRegisterInfo &MRI = MF.getRegInfo();
118#ifndef NDEBUG
119 // Check that our input is fully legal: we require the function to have the
120 // Legalized property, so it should be.
121 // FIXME: This should be in the MachineVerifier, as the RegBankSelected
122 // property check already is.
123 if (!DisableGISelLegalityCheck)
9
Assuming the condition is false
10
Taking false branch
124 if (const MachineInstr *MI = machineFunctionIsIllegal(MF)) {
125 reportGISelFailure(MF, TPC, MORE, "gisel-select",
126 "instruction is not legal", *MI);
127 return false;
128 }
129 // FIXME: We could introduce new blocks and will need to fix the outer loop.
130 // Until then, keep track of the number of blocks to assert that we don't.
131 const size_t NumBlocks = MF.size();
132#endif
133 // Keep track of selected blocks, so we can delete unreachable ones later.
134 DenseSet<MachineBasicBlock *> SelectedBlocks;
135
136 for (MachineBasicBlock *MBB : post_order(&MF)) {
137 ISel->CurMBB = MBB;
138 SelectedBlocks.insert(MBB);
139 if (MBB->empty())
140 continue;
141
142 // Select instructions in reverse block order. We permit erasing so have
143 // to resort to manually iterating and recognizing the begin (rend) case.
144 bool ReachedBegin = false;
145 for (auto MII = std::prev(MBB->end()), Begin = MBB->begin();
146 !ReachedBegin;) {
147#ifndef NDEBUG
148 // Keep track of the insertion range for debug printing.
149 const auto AfterIt = std::next(MII);
150#endif
151 // Select this instruction.
152 MachineInstr &MI = *MII;
153
154 // And have our iterator point to the next instruction, if there is one.
155 if (MII == Begin)
156 ReachedBegin = true;
157 else
158 --MII;
159
160 LLVM_DEBUG(dbgs() << "Selecting: \n " << MI)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { dbgs() << "Selecting: \n " <<
MI; } } while (false)
;
161
162 // We could have folded this instruction away already, making it dead.
163 // If so, erase it.
164 if (isTriviallyDead(MI, MRI)) {
165 LLVM_DEBUG(dbgs() << "Is dead; erasing.\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { dbgs() << "Is dead; erasing.\n"
; } } while (false)
;
166 MI.eraseFromParentAndMarkDBGValuesForRemoval();
167 continue;
168 }
169
170 // Eliminate hints.
171 if (isPreISelGenericOptimizationHint(MI.getOpcode())) {
172 Register DstReg = MI.getOperand(0).getReg();
173 Register SrcReg = MI.getOperand(1).getReg();
174
175 // At this point, the destination register class of the hint may have
176 // been decided.
177 //
178 // Propagate that through to the source register.
179 const TargetRegisterClass *DstRC = MRI.getRegClassOrNull(DstReg);
180 if (DstRC)
181 MRI.setRegClass(SrcReg, DstRC);
182 assert(canReplaceReg(DstReg, SrcReg, MRI) &&(static_cast <bool> (canReplaceReg(DstReg, SrcReg, MRI)
&& "Must be able to replace dst with src!") ? void (
0) : __assert_fail ("canReplaceReg(DstReg, SrcReg, MRI) && \"Must be able to replace dst with src!\""
, "/build/llvm-toolchain-snapshot-14~++20211016100712+8e1d532707fd/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp"
, 183, __extension__ __PRETTY_FUNCTION__))
183 "Must be able to replace dst with src!")(static_cast <bool> (canReplaceReg(DstReg, SrcReg, MRI)
&& "Must be able to replace dst with src!") ? void (
0) : __assert_fail ("canReplaceReg(DstReg, SrcReg, MRI) && \"Must be able to replace dst with src!\""
, "/build/llvm-toolchain-snapshot-14~++20211016100712+8e1d532707fd/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp"
, 183, __extension__ __PRETTY_FUNCTION__))
;
184 MI.eraseFromParent();
185 MRI.replaceRegWith(DstReg, SrcReg);
186 continue;
187 }
188
189 if (!ISel->select(MI)) {
190 // FIXME: It would be nice to dump all inserted instructions. It's
191 // not obvious how, esp. considering select() can insert after MI.
192 reportGISelFailure(MF, TPC, MORE, "gisel-select", "cannot select", MI);
193 return false;
194 }
195
196 // Dump the range of instructions that MI expanded into.
197 LLVM_DEBUG({do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
198 auto InsertedBegin = ReachedBegin ? MBB->begin() : std::next(MII);do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
199 dbgs() << "Into:\n";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
200 for (auto &InsertedMI : make_range(InsertedBegin, AfterIt))do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
201 dbgs() << " " << InsertedMI;do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
202 dbgs() << '\n';do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
203 })do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
;
204 }
205 }
206
207 for (MachineBasicBlock &MBB : MF) {
208 if (MBB.empty())
209 continue;
210
211 if (!SelectedBlocks.contains(&MBB)) {
212 // This is an unreachable block and therefore hasn't been selected, since
213 // the main selection loop above uses a postorder block traversal.
214 // We delete all the instructions in this block since it's unreachable.
215 MBB.clear();
216 // Don't delete the block in case the block has it's address taken or is
217 // still being referenced by a phi somewhere.
218 continue;
219 }
220 // Try to find redundant copies b/w vregs of the same register class.
221 bool ReachedBegin = false;
222 for (auto MII = std::prev(MBB.end()), Begin = MBB.begin(); !ReachedBegin;) {
223 // Select this instruction.
224 MachineInstr &MI = *MII;
225
226 // And have our iterator point to the next instruction, if there is one.
227 if (MII == Begin)
228 ReachedBegin = true;
229 else
230 --MII;
231 if (MI.getOpcode() != TargetOpcode::COPY)
232 continue;
233 Register SrcReg = MI.getOperand(1).getReg();
234 Register DstReg = MI.getOperand(0).getReg();
235 if (Register::isVirtualRegister(SrcReg) &&
236 Register::isVirtualRegister(DstReg)) {
237 auto SrcRC = MRI.getRegClass(SrcReg);
238 auto DstRC = MRI.getRegClass(DstReg);
239 if (SrcRC == DstRC) {
240 MRI.replaceRegWith(DstReg, SrcReg);
241 MI.eraseFromParent();
242 }
243 }
244 }
245 }
246
247#ifndef NDEBUG
248 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
249 // Now that selection is complete, there are no more generic vregs. Verify
250 // that the size of the now-constrained vreg is unchanged and that it has a
251 // register class.
252 for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
11
Assuming 'I' is equal to 'E'
12
Loop condition is false. Execution continues on line 279
253 unsigned VReg = Register::index2VirtReg(I);
254
255 MachineInstr *MI = nullptr;
256 if (!MRI.def_empty(VReg))
257 MI = &*MRI.def_instr_begin(VReg);
258 else if (!MRI.use_empty(VReg))
259 MI = &*MRI.use_instr_begin(VReg);
260 if (!MI)
261 continue;
262
263 const TargetRegisterClass *RC = MRI.getRegClassOrNull(VReg);
264 if (!RC) {
265 reportGISelFailure(MF, TPC, MORE, "gisel-select",
266 "VReg has no regclass after selection", *MI);
267 return false;
268 }
269
270 const LLT Ty = MRI.getType(VReg);
271 if (Ty.isValid() && Ty.getSizeInBits() > TRI.getRegSizeInBits(*RC)) {
272 reportGISelFailure(
273 MF, TPC, MORE, "gisel-select",
274 "VReg's low-level type and register class have different sizes", *MI);
275 return false;
276 }
277 }
278
279 if (MF.size() != NumBlocks) {
13
Assuming the condition is true
14
Taking true branch
280 MachineOptimizationRemarkMissed R("gisel-select", "GISelFailure",
16
Calling constructor for 'MachineOptimizationRemarkMissed'
281 MF.getFunction().getSubprogram(),
282 /*MBB=*/nullptr);
15
Passing null pointer value via 4th parameter 'MBB'
283 R << "inserting blocks is not supported yet";
284 reportGISelFailure(MF, TPC, MORE, R);
285 return false;
286 }
287#endif
288 // Determine if there are any calls in this machine function. Ported from
289 // SelectionDAG.
290 MachineFrameInfo &MFI = MF.getFrameInfo();
291 for (const auto &MBB : MF) {
292 if (MFI.hasCalls() && MF.hasInlineAsm())
293 break;
294
295 for (const auto &MI : MBB) {
296 if ((MI.isCall() && !MI.isReturn()) || MI.isStackAligningInlineAsm())
297 MFI.setHasCalls(true);
298 if (MI.isInlineAsm())
299 MF.setHasInlineAsm(true);
300 }
301 }
302
303 // FIXME: FinalizeISel pass calls finalizeLowering, so it's called twice.
304 auto &TLI = *MF.getSubtarget().getTargetLowering();
305 TLI.finalizeLowering(MF);
306
307 LLVM_DEBUG({do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
308 dbgs() << "Rules covered by selecting function: " << MF.getName() << ":";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
309 for (auto RuleID : CoverageInfo.covered())do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
310 dbgs() << " id" << RuleID;do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
311 dbgs() << "\n\n";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
312 })do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { dbgs() << "Rules covered by selecting function: "
<< MF.getName() << ":"; for (auto RuleID : CoverageInfo
.covered()) dbgs() << " id" << RuleID; dbgs() <<
"\n\n"; }; } } while (false)
;
313 CoverageInfo.emit(CoveragePrefix,
314 TLI.getTargetMachine().getTarget().getBackendName());
315
316 // If we successfully selected the function nothing is going to use the vreg
317 // types after us (otherwise MIRPrinter would need them). Make sure the types
318 // disappear.
319 MRI.clearVirtRegTypes();
320
321 // FIXME: Should we accurately track changes?
322 return true;
323}

/build/llvm-toolchain-snapshot-14~++20211016100712+8e1d532707fd/llvm/include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h

1///===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*----===//
2///
3/// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4/// See https://llvm.org/LICENSE.txt for license information.
5/// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6///
7///===---------------------------------------------------------------------===//
8/// \file
9/// Optimization diagnostic interfaces for machine passes. It's packaged as an
10/// analysis pass so that by using this service passes become dependent on MBFI
11/// as well. MBFI is used to compute the "hotness" of the diagnostic message.
12///
13///===---------------------------------------------------------------------===//
14
15#ifndef LLVM_CODEGEN_MACHINEOPTIMIZATIONREMARKEMITTER_H
16#define LLVM_CODEGEN_MACHINEOPTIMIZATIONREMARKEMITTER_H
17
18#include "llvm/Analysis/OptimizationRemarkEmitter.h"
19#include "llvm/CodeGen/MachineFunctionPass.h"
20
21namespace llvm {
22class MachineBasicBlock;
23class MachineBlockFrequencyInfo;
24class MachineInstr;
25
26/// Common features for diagnostics dealing with optimization remarks
27/// that are used by machine passes.
28class DiagnosticInfoMIROptimization : public DiagnosticInfoOptimizationBase {
29public:
30 DiagnosticInfoMIROptimization(enum DiagnosticKind Kind, const char *PassName,
31 StringRef RemarkName,
32 const DiagnosticLocation &Loc,
33 const MachineBasicBlock *MBB)
34 : DiagnosticInfoOptimizationBase(Kind, DS_Remark, PassName, RemarkName,
35 MBB->getParent()->getFunction(), Loc),
19
Called C++ object pointer is null
36 MBB(MBB) {}
37
38 /// MI-specific kinds of diagnostic Arguments.
39 struct MachineArgument : public DiagnosticInfoOptimizationBase::Argument {
40 /// Print an entire MachineInstr.
41 MachineArgument(StringRef Key, const MachineInstr &MI);
42 };
43
44 static bool classof(const DiagnosticInfo *DI) {
45 return DI->getKind() >= DK_FirstMachineRemark &&
46 DI->getKind() <= DK_LastMachineRemark;
47 }
48
49 const MachineBasicBlock *getBlock() const { return MBB; }
50
51private:
52 const MachineBasicBlock *MBB;
53};
54
55/// Diagnostic information for applied optimization remarks.
56class MachineOptimizationRemark : public DiagnosticInfoMIROptimization {
57public:
58 /// \p PassName is the name of the pass emitting this diagnostic. If this name
59 /// matches the regular expression given in -Rpass=, then the diagnostic will
60 /// be emitted. \p RemarkName is a textual identifier for the remark. \p
61 /// Loc is the debug location and \p MBB is the block that the optimization
62 /// operates in.
63 MachineOptimizationRemark(const char *PassName, StringRef RemarkName,
64 const DiagnosticLocation &Loc,
65 const MachineBasicBlock *MBB)
66 : DiagnosticInfoMIROptimization(DK_MachineOptimizationRemark, PassName,
67 RemarkName, Loc, MBB) {}
68
69 static bool classof(const DiagnosticInfo *DI) {
70 return DI->getKind() == DK_MachineOptimizationRemark;
71 }
72
73 /// \see DiagnosticInfoOptimizationBase::isEnabled.
74 bool isEnabled() const override {
75 const Function &Fn = getFunction();
76 LLVMContext &Ctx = Fn.getContext();
77 return Ctx.getDiagHandlerPtr()->isPassedOptRemarkEnabled(getPassName());
78 }
79};
80
81/// Diagnostic information for missed-optimization remarks.
82class MachineOptimizationRemarkMissed : public DiagnosticInfoMIROptimization {
83public:
84 /// \p PassName is the name of the pass emitting this diagnostic. If this name
85 /// matches the regular expression given in -Rpass-missed=, then the
86 /// diagnostic will be emitted. \p RemarkName is a textual identifier for the
87 /// remark. \p Loc is the debug location and \p MBB is the block that the
88 /// optimization operates in.
89 MachineOptimizationRemarkMissed(const char *PassName, StringRef RemarkName,
90 const DiagnosticLocation &Loc,
91 const MachineBasicBlock *MBB)
92 : DiagnosticInfoMIROptimization(DK_MachineOptimizationRemarkMissed,
18
Calling constructor for 'DiagnosticInfoMIROptimization'
93 PassName, RemarkName, Loc, MBB) {}
17
Passing null pointer value via 5th parameter 'MBB'
94
95 static bool classof(const DiagnosticInfo *DI) {
96 return DI->getKind() == DK_MachineOptimizationRemarkMissed;
97 }
98
99 /// \see DiagnosticInfoOptimizationBase::isEnabled.
100 bool isEnabled() const override {
101 const Function &Fn = getFunction();
102 LLVMContext &Ctx = Fn.getContext();
103 return Ctx.getDiagHandlerPtr()->isMissedOptRemarkEnabled(getPassName());
104 }
105};
106
107/// Diagnostic information for optimization analysis remarks.
108class MachineOptimizationRemarkAnalysis : public DiagnosticInfoMIROptimization {
109public:
110 /// \p PassName is the name of the pass emitting this diagnostic. If this name
111 /// matches the regular expression given in -Rpass-analysis=, then the
112 /// diagnostic will be emitted. \p RemarkName is a textual identifier for the
113 /// remark. \p Loc is the debug location and \p MBB is the block that the
114 /// optimization operates in.
115 MachineOptimizationRemarkAnalysis(const char *PassName, StringRef RemarkName,
116 const DiagnosticLocation &Loc,
117 const MachineBasicBlock *MBB)
118 : DiagnosticInfoMIROptimization(DK_MachineOptimizationRemarkAnalysis,
119 PassName, RemarkName, Loc, MBB) {}
120
121 MachineOptimizationRemarkAnalysis(const char *PassName, StringRef RemarkName,
122 const MachineInstr *MI)
123 : DiagnosticInfoMIROptimization(DK_MachineOptimizationRemarkAnalysis,
124 PassName, RemarkName, MI->getDebugLoc(),
125 MI->getParent()) {}
126
127 static bool classof(const DiagnosticInfo *DI) {
128 return DI->getKind() == DK_MachineOptimizationRemarkAnalysis;
129 }
130
131 /// \see DiagnosticInfoOptimizationBase::isEnabled.
132 bool isEnabled() const override {
133 const Function &Fn = getFunction();
134 LLVMContext &Ctx = Fn.getContext();
135 return Ctx.getDiagHandlerPtr()->isAnalysisRemarkEnabled(getPassName());
136 }
137};
138
139/// Extend llvm::ore:: with MI-specific helper names.
140namespace ore {
141using MNV = DiagnosticInfoMIROptimization::MachineArgument;
142}
143
144/// The optimization diagnostic interface.
145///
146/// It allows reporting when optimizations are performed and when they are not
147/// along with the reasons for it. Hotness information of the corresponding
148/// code region can be included in the remark if DiagnosticsHotnessRequested is
149/// enabled in the LLVM context.
150class MachineOptimizationRemarkEmitter {
151public:
152 MachineOptimizationRemarkEmitter(MachineFunction &MF,
153 MachineBlockFrequencyInfo *MBFI)
154 : MF(MF), MBFI(MBFI) {}
155
156 /// Emit an optimization remark.
157 void emit(DiagnosticInfoOptimizationBase &OptDiag);
158
159 /// Whether we allow for extra compile-time budget to perform more
160 /// analysis to be more informative.
161 ///
162 /// This is useful to enable additional missed optimizations to be reported
163 /// that are normally too noisy. In this mode, we can use the extra analysis
164 /// (1) to filter trivial false positives or (2) to provide more context so
165 /// that non-trivial false positives can be quickly detected by the user.
166 bool allowExtraAnalysis(StringRef PassName) const {
167 return (
168 MF.getFunction().getContext().getLLVMRemarkStreamer() ||
169 MF.getFunction().getContext().getDiagHandlerPtr()->isAnyRemarkEnabled(
170 PassName));
171 }
172
173 /// Take a lambda that returns a remark which will be emitted. Second
174 /// argument is only used to restrict this to functions.
175 template <typename T>
176 void emit(T RemarkBuilder, decltype(RemarkBuilder()) * = nullptr) {
177 // Avoid building the remark unless we know there are at least *some*
178 // remarks enabled. We can't currently check whether remarks are requested
179 // for the calling pass since that requires actually building the remark.
180
181 if (MF.getFunction().getContext().getLLVMRemarkStreamer() ||
182 MF.getFunction()
183 .getContext()
184 .getDiagHandlerPtr()
185 ->isAnyRemarkEnabled()) {
186 auto R = RemarkBuilder();
187 emit((DiagnosticInfoOptimizationBase &)R);
188 }
189 }
190
191 MachineBlockFrequencyInfo *getBFI() {
192 return MBFI;
193 }
194
195private:
196 MachineFunction &MF;
197
198 /// MBFI is only set if hotness is requested.
199 MachineBlockFrequencyInfo *MBFI;
200
201 /// Compute hotness from IR value (currently assumed to be a block) if PGO is
202 /// available.
203 Optional<uint64_t> computeHotness(const MachineBasicBlock &MBB);
204
205 /// Similar but use value from \p OptDiag and update hotness there.
206 void computeHotness(DiagnosticInfoMIROptimization &Remark);
207
208 /// Only allow verbose messages if we know we're filtering by hotness
209 /// (BFI is only set in this case).
210 bool shouldEmitVerbose() { return MBFI != nullptr; }
211};
212
213/// The analysis pass
214///
215/// Note that this pass shouldn't generally be marked as preserved by other
216/// passes. It's holding onto BFI, so if the pass does not preserve BFI, BFI
217/// could be freed.
218class MachineOptimizationRemarkEmitterPass : public MachineFunctionPass {
219 std::unique_ptr<MachineOptimizationRemarkEmitter> ORE;
220
221public:
222 MachineOptimizationRemarkEmitterPass();
223
224 bool runOnMachineFunction(MachineFunction &MF) override;
225
226 void getAnalysisUsage(AnalysisUsage &AU) const override;
227
228 MachineOptimizationRemarkEmitter &getORE() {
229 assert(ORE && "pass not run yet")(static_cast <bool> (ORE && "pass not run yet")
? void (0) : __assert_fail ("ORE && \"pass not run yet\""
, "/build/llvm-toolchain-snapshot-14~++20211016100712+8e1d532707fd/llvm/include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
, 229, __extension__ __PRETTY_FUNCTION__))
;
230 return *ORE;
231 }
232
233 static char ID;
234};
235}
236
237#endif