/build/source/llvm/lib/CodeGen/RDFGraph.cpp

Bug Summary

File:	build/source/llvm/lib/CodeGen/RDFGraph.cpp
Warning:	line 510, column 17 Called C++ object pointer is null
Annotated Source Code

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clang -cc1 -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name RDFGraph.cpp -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -analyzer-config-compatibility-mode=true -mrelocation-model pic -pic-level 2 -mframe-pointer=none -fmath-errno -ffp-contract=on -fno-rounding-math -mconstructor-aliases -funwind-tables=2 -target-cpu x86-64 -tune-cpu generic -debugger-tuning=gdb -ffunction-sections -fdata-sections -fcoverage-compilation-dir=/build/source/build-llvm/tools/clang/stage2-bins -resource-dir /usr/lib/llvm-17/lib/clang/17 -D _DEBUG -D _GLIBCXX_ASSERTIONS -D _GNU_SOURCE -D _LIBCPP_ENABLE_ASSERTIONS -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I lib/CodeGen -I /build/source/llvm/lib/CodeGen -I include -I /build/source/llvm/include -D _FORTIFY_SOURCE=2 -D NDEBUG -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/c++/10 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/x86_64-linux-gnu/c++/10 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../include/c++/10/backward -internal-isystem /usr/lib/llvm-17/lib/clang/17/include -internal-isystem /usr/local/include -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/10/../../../../x86_64-linux-gnu/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -fmacro-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fmacro-prefix-map=/build/source/= -fcoverage-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fcoverage-prefix-map=/build/source/= -source-date-epoch 1683717183 -O2 -Wno-unused-command-line-argument -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-redundant-move -Wno-pessimizing-move -Wno-noexcept-type -Wno-comment -Wno-misleading-indentation -std=c++17 -fdeprecated-macro -fdebug-compilation-dir=/build/source/build-llvm/tools/clang/stage2-bins -fdebug-prefix-map=/build/source/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -fdebug-prefix-map=/build/source/= -ferror-limit 19 -fvisibility-inlines-hidden -stack-protector 2 -fgnuc-version=4.2.1 -fcolor-diagnostics -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -faddrsig -D__GCC_HAVE_DWARF2_CFI_ASM=1 -o /tmp/scan-build-2023-05-10-133810-16478-1 -x c++ /build/source/llvm/lib/CodeGen/RDFGraph.cpp
1//===- RDFGraph.cpp -------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Target-independent, SSA-based data flow graph for register data flow (RDF).
10//
11#include "llvm/CodeGen/RDFGraph.h"
12#include "llvm/ADT/BitVector.h"
13#include "llvm/ADT/STLExtras.h"
14#include "llvm/ADT/SetVector.h"
15#include "llvm/CodeGen/MachineBasicBlock.h"
16#include "llvm/CodeGen/MachineDominanceFrontier.h"
17#include "llvm/CodeGen/MachineDominators.h"
18#include "llvm/CodeGen/MachineFunction.h"
19#include "llvm/CodeGen/MachineInstr.h"
20#include "llvm/CodeGen/MachineOperand.h"
21#include "llvm/CodeGen/MachineRegisterInfo.h"
22#include "llvm/CodeGen/RDFRegisters.h"
23#include "llvm/CodeGen/TargetInstrInfo.h"
24#include "llvm/CodeGen/TargetLowering.h"
25#include "llvm/CodeGen/TargetRegisterInfo.h"
26#include "llvm/CodeGen/TargetSubtargetInfo.h"
27#include "llvm/IR/Function.h"
28#include "llvm/MC/LaneBitmask.h"
29#include "llvm/MC/MCInstrDesc.h"
30#include "llvm/Support/ErrorHandling.h"
31#include "llvm/Support/raw_ostream.h"
32#include <algorithm>
33#include <cassert>
34#include <cstdint>
35#include <cstring>
36#include <iterator>
37#include <set>
38#include <utility>
39#include <vector>

41using namespace llvm;
42using namespace rdf;

44// Printing functions. Have them here first, so that the rest of the code
45// can use them.
46namespace llvm {
47namespace rdf {

49raw_ostream &operator<< (raw_ostream &OS, const PrintLaneMaskOpt &P) {
if (!P.Mask.all())
  OS << ':' << PrintLaneMask(P.Mask);
return OS;
53}

55raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterRef> &P) {
auto &TRI = P.G.getTRI();
if (P.Obj.Reg > 0 && P.Obj.Reg < TRI.getNumRegs())
  OS << TRI.getName(P.Obj.Reg);
else
  OS << '#' << P.Obj.Reg;
OS << PrintLaneMaskOpt(P.Obj.Mask);
return OS;
63}

65raw_ostream &operator<< (raw_ostream &OS, const Print<NodeId> &P) {
auto NA = P.G.addr<NodeBase*>(P.Obj);
uint16_t Attrs = NA.Addr->getAttrs();
uint16_t Kind = NodeAttrs::kind(Attrs);
uint16_t Flags = NodeAttrs::flags(Attrs);
switch (NodeAttrs::type(Attrs)) {
  case NodeAttrs::Code:
    switch (Kind) {
      case NodeAttrs::Func:   OS << 'f'; break;
      case NodeAttrs::Block:  OS << 'b'; break;
      case NodeAttrs::Stmt:   OS << 's'; break;
      case NodeAttrs::Phi:    OS << 'p'; break;
      default:                OS << "c?"; break;
    }
    break;
  case NodeAttrs::Ref:
    if (Flags & NodeAttrs::Undef)
      OS << '/';
    if (Flags & NodeAttrs::Dead)
      OS << '\\';
    if (Flags & NodeAttrs::Preserving)
      OS << '+';
    if (Flags & NodeAttrs::Clobbering)
      OS << '~';
    switch (Kind) {
      case NodeAttrs::Use:    OS << 'u'; break;
      case NodeAttrs::Def:    OS << 'd'; break;
      case NodeAttrs::Block:  OS << 'b'; break;
      default:                OS << "r?"; break;
    }
    break;
  default:
    OS << '?';
    break;
}
OS << P.Obj;
if (Flags & NodeAttrs::Shadow)
  OS << '"';
return OS;
104}

106static void printRefHeader(raw_ostream &OS, const NodeAddr<RefNode*> RA,
              const DataFlowGraph &G) {
OS << Print(RA.Id, G) << '<'
   << Print(RA.Addr->getRegRef(G), G) << '>';
if (RA.Addr->getFlags() & NodeAttrs::Fixed)
  OS << '!';
112}

114raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<DefNode*>> &P) {
printRefHeader(OS, P.Obj, P.G);
OS << '(';
if (NodeId N = P.Obj.Addr->getReachingDef())
  OS << Print(N, P.G);
OS << ',';
if (NodeId N = P.Obj.Addr->getReachedDef())
  OS << Print(N, P.G);
OS << ',';
if (NodeId N = P.Obj.Addr->getReachedUse())
  OS << Print(N, P.G);
OS << "):";
if (NodeId N = P.Obj.Addr->getSibling())
  OS << Print(N, P.G);
return OS;
129}

131raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<UseNode*>> &P) {
printRefHeader(OS, P.Obj, P.G);
OS << '(';
if (NodeId N = P.Obj.Addr->getReachingDef())
  OS << Print(N, P.G);
OS << "):";
if (NodeId N = P.Obj.Addr->getSibling())
  OS << Print(N, P.G);
return OS;
140}

142raw_ostream &operator<< (raw_ostream &OS,
    const Print<NodeAddr<PhiUseNode*>> &P) {
printRefHeader(OS, P.Obj, P.G);
OS << '(';
if (NodeId N = P.Obj.Addr->getReachingDef())
  OS << Print(N, P.G);
OS << ',';
if (NodeId N = P.Obj.Addr->getPredecessor())
  OS << Print(N, P.G);
OS << "):";
if (NodeId N = P.Obj.Addr->getSibling())
  OS << Print(N, P.G);
return OS;
155}

157raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<RefNode*>> &P) {
switch (P.Obj.Addr->getKind()) {
  case NodeAttrs::Def:
    OS << PrintNode<DefNode*>(P.Obj, P.G);
    break;
  case NodeAttrs::Use:
    if (P.Obj.Addr->getFlags() & NodeAttrs::PhiRef)
      OS << PrintNode<PhiUseNode*>(P.Obj, P.G);
    else
      OS << PrintNode<UseNode*>(P.Obj, P.G);
    break;
}
return OS;
170}

172raw_ostream &operator<< (raw_ostream &OS, const Print<NodeList> &P) {
unsigned N = P.Obj.size();
for (auto I : P.Obj) {
  OS << Print(I.Id, P.G);
  if (--N)
    OS << ' ';
}
return OS;
180}

182raw_ostream &operator<< (raw_ostream &OS, const Print<NodeSet> &P) {
unsigned N = P.Obj.size();
for (auto I : P.Obj) {
  OS << Print(I, P.G);
  if (--N)
    OS << ' ';
}
return OS;
190}

192namespace {

template <typename T>
struct PrintListV {
  PrintListV(const NodeList &L, const DataFlowGraph &G) : List(L), G(G) {}

  using Type = T;
  const NodeList &List;
  const DataFlowGraph &G;
};

template <typename T>
raw_ostream &operator<< (raw_ostream &OS, const PrintListV<T> &P) {
  unsigned N = P.List.size();
  for (NodeAddr<T> A : P.List) {
    OS << PrintNode<T>(A, P.G);
    if (--N)
      OS << ", ";
  }
  return OS;
}

214} // end anonymous namespace

216raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<PhiNode*>> &P) {
OS << Print(P.Obj.Id, P.G) << ": phi ["
   << PrintListV<RefNode*>(P.Obj.Addr->members(P.G), P.G) << ']';
return OS;
220}

222raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<StmtNode *>> &P) {
const MachineInstr &MI = *P.Obj.Addr->getCode();
unsigned Opc = MI.getOpcode();
OS << Print(P.Obj.Id, P.G) << ": " << P.G.getTII().getName(Opc);
// Print the target for calls and branches (for readability).
if (MI.isCall() || MI.isBranch()) {
  MachineInstr::const_mop_iterator T =
        llvm::find_if(MI.operands(),
                      [] (const MachineOperand &Op) -> bool {
                        return Op.isMBB() || Op.isGlobal() || Op.isSymbol();
                      });
  if (T != MI.operands_end()) {
    OS << ' ';
    if (T->isMBB())
      OS << printMBBReference(*T->getMBB());
    else if (T->isGlobal())
      OS << T->getGlobal()->getName();
    else if (T->isSymbol())
      OS << T->getSymbolName();
  }
}
OS << " [" << PrintListV<RefNode*>(P.Obj.Addr->members(P.G), P.G) << ']';
return OS;
245}

247raw_ostream &operator<< (raw_ostream &OS,
    const Print<NodeAddr<InstrNode*>> &P) {
switch (P.Obj.Addr->getKind()) {
  case NodeAttrs::Phi:
    OS << PrintNode<PhiNode*>(P.Obj, P.G);
    break;
  case NodeAttrs::Stmt:
    OS << PrintNode<StmtNode*>(P.Obj, P.G);
    break;
  default:
    OS << "instr? " << Print(P.Obj.Id, P.G);
    break;
}
return OS;
261}

263raw_ostream &operator<< (raw_ostream &OS,
    const Print<NodeAddr<BlockNode*>> &P) {
MachineBasicBlock *BB = P.Obj.Addr->getCode();
unsigned NP = BB->pred_size();
std::vector<int> Ns;
auto PrintBBs = [&OS] (std::vector<int> Ns) -> void {
  unsigned N = Ns.size();
  for (int I : Ns) {
    OS << "%bb." << I;
    if (--N)
      OS << ", ";
  }
};

OS << Print(P.Obj.Id, P.G) << ": --- " << printMBBReference(*BB)
   << " --- preds(" << NP << "): ";
for (MachineBasicBlock *B : BB->predecessors())
  Ns.push_back(B->getNumber());
PrintBBs(Ns);

unsigned NS = BB->succ_size();
OS << "  succs(" << NS << "): ";
Ns.clear();
for (MachineBasicBlock *B : BB->successors())
  Ns.push_back(B->getNumber());
PrintBBs(Ns);
OS << '\n';

for (auto I : P.Obj.Addr->members(P.G))
  OS << PrintNode<InstrNode*>(I, P.G) << '\n';
return OS;
294}

296raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<FuncNode *>> &P) {
OS << "DFG dump:[\n" << Print(P.Obj.Id, P.G) << ": Function: "
   << P.Obj.Addr->getCode()->getName() << '\n';
for (auto I : P.Obj.Addr->members(P.G))
  OS << PrintNode<BlockNode*>(I, P.G) << '\n';
OS << "]\n";
return OS;
303}

305raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterSet> &P) {
OS << '{';
for (auto I : P.Obj)
  OS << ' ' << Print(I, P.G);
OS << " }";
return OS;
311}

313raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterAggr> &P) {
P.Obj.print(OS);
return OS;
316}

318raw_ostream &operator<< (raw_ostream &OS,
    const Print<DataFlowGraph::DefStack> &P) {
for (auto I = P.Obj.top(), E = P.Obj.bottom(); I != E; ) {
  OS << Print(I->Id, P.G)
     << '<' << Print(I->Addr->getRegRef(P.G), P.G) << '>';
  I.down();
  if (I != E)
    OS << ' ';
}
return OS;
328}

330} // end namespace rdf
331} // end namespace llvm

333// Node allocation functions.
334//
335// Node allocator is like a slab memory allocator: it allocates blocks of
336// memory in sizes that are multiples of the size of a node. Each block has
337// the same size. Nodes are allocated from the currently active block, and
338// when it becomes full, a new one is created.
339// There is a mapping scheme between node id and its location in a block,
340// and within that block is described in the header file.
341//
342void NodeAllocator::startNewBlock() {
void *T = MemPool.Allocate(NodesPerBlock*NodeMemSize, NodeMemSize);
char *P = static_cast<char*>(T);
Blocks.push_back(P);
// Check if the block index is still within the allowed range, i.e. less
// than 2^N, where N is the number of bits in NodeId for the block index.
// BitsPerIndex is the number of bits per node index.
assert((Blocks.size() < ((size_t)1 << (8*sizeof(NodeId)-BitsPerIndex))) &&(static_cast <bool> ((Blocks.size() < ((size_t)1 <<
 (8*sizeof(NodeId)-BitsPerIndex))) && "Out of bits for block index"
) ? void (0) : __assert_fail ("(Blocks.size() < ((size_t)1 << (8*sizeof(NodeId)-BitsPerIndex))) && \"Out of bits for block index\""
, "llvm/lib/CodeGen/RDFGraph.cpp", 350, __extension__ __PRETTY_FUNCTION__
))
       "Out of bits for block index")(static_cast <bool> ((Blocks.size() < ((size_t)1 <<
 (8*sizeof(NodeId)-BitsPerIndex))) && "Out of bits for block index"
) ? void (0) : __assert_fail ("(Blocks.size() < ((size_t)1 << (8*sizeof(NodeId)-BitsPerIndex))) && \"Out of bits for block index\""
, "llvm/lib/CodeGen/RDFGraph.cpp", 350, __extension__ __PRETTY_FUNCTION__
));
ActiveEnd = P;
352}

354bool NodeAllocator::needNewBlock() {
if (Blocks.empty())
  return true;

char *ActiveBegin = Blocks.back();
uint32_t Index = (ActiveEnd-ActiveBegin)/NodeMemSize;
return Index >= NodesPerBlock;
361}

363NodeAddr<NodeBase*> NodeAllocator::New() {
if (needNewBlock())
  startNewBlock();

uint32_t ActiveB = Blocks.size()-1;
uint32_t Index = (ActiveEnd - Blocks[ActiveB])/NodeMemSize;
NodeAddr<NodeBase*> NA = { reinterpret_cast<NodeBase*>(ActiveEnd),
                           makeId(ActiveB, Index) };
ActiveEnd += NodeMemSize;
return NA;
373}

375NodeId NodeAllocator::id(const NodeBase *P) const {
uintptr_t A = reinterpret_cast<uintptr_t>(P);
for (unsigned i = 0, n = Blocks.size(); i != n; ++i) {
  uintptr_t B = reinterpret_cast<uintptr_t>(Blocks[i]);
  if (A < B || A >= B + NodesPerBlock*NodeMemSize)
    continue;
  uint32_t Idx = (A-B)/NodeMemSize;
  return makeId(i, Idx);
}
llvm_unreachable("Invalid node address")::llvm::llvm_unreachable_internal("Invalid node address", "llvm/lib/CodeGen/RDFGraph.cpp"
, 384);
385}

387void NodeAllocator::clear() {
MemPool.Reset();
Blocks.clear();
ActiveEnd = nullptr;
391}

393// Insert node NA after "this" in the circular chain.
394void NodeBase::append(NodeAddr<NodeBase*> NA) {
NodeId Nx = Next;
// If NA is already "next", do nothing.
if (Next != NA.Id) {
  Next = NA.Id;
  NA.Addr->Next = Nx;
}
401}

403// Fundamental node manipulator functions.

405// Obtain the register reference from a reference node.
406RegisterRef RefNode::getRegRef(const DataFlowGraph &G) const {
assert(NodeAttrs::type(Attrs) == NodeAttrs::Ref)(static_cast <bool> (NodeAttrs::type(Attrs) == NodeAttrs
::Ref) ? void (0) : __assert_fail ("NodeAttrs::type(Attrs) == NodeAttrs::Ref"
, "llvm/lib/CodeGen/RDFGraph.cpp", 407, __extension__ __PRETTY_FUNCTION__
));
if (NodeAttrs::flags(Attrs) & NodeAttrs::PhiRef)
  return G.unpack(Ref.PR);
assert(Ref.Op != nullptr)(static_cast <bool> (Ref.Op != nullptr) ? void (0) : __assert_fail
 ("Ref.Op != nullptr", "llvm/lib/CodeGen/RDFGraph.cpp", 410, __extension__
 __PRETTY_FUNCTION__));
return G.makeRegRef(*Ref.Op);
412}

414// Set the register reference in the reference node directly (for references
415// in phi nodes).
416void RefNode::setRegRef(RegisterRef RR, DataFlowGraph &G) {
assert(NodeAttrs::type(Attrs) == NodeAttrs::Ref)(static_cast <bool> (NodeAttrs::type(Attrs) == NodeAttrs
::Ref) ? void (0) : __assert_fail ("NodeAttrs::type(Attrs) == NodeAttrs::Ref"
, "llvm/lib/CodeGen/RDFGraph.cpp", 417, __extension__ __PRETTY_FUNCTION__
));
assert(NodeAttrs::flags(Attrs) & NodeAttrs::PhiRef)(static_cast <bool> (NodeAttrs::flags(Attrs) & NodeAttrs
::PhiRef) ? void (0) : __assert_fail ("NodeAttrs::flags(Attrs) & NodeAttrs::PhiRef"
, "llvm/lib/CodeGen/RDFGraph.cpp", 418, __extension__ __PRETTY_FUNCTION__
));
Ref.PR = G.pack(RR);
420}

422// Set the register reference in the reference node based on a machine
423// operand (for references in statement nodes).
424void RefNode::setRegRef(MachineOperand *Op, DataFlowGraph &G) {
assert(NodeAttrs::type(Attrs) == NodeAttrs::Ref)(static_cast <bool> (NodeAttrs::type(Attrs) == NodeAttrs
::Ref) ? void (0) : __assert_fail ("NodeAttrs::type(Attrs) == NodeAttrs::Ref"
, "llvm/lib/CodeGen/RDFGraph.cpp", 425, __extension__ __PRETTY_FUNCTION__
));
assert(!(NodeAttrs::flags(Attrs) & NodeAttrs::PhiRef))(static_cast <bool> (!(NodeAttrs::flags(Attrs) & NodeAttrs
::PhiRef)) ? void (0) : __assert_fail ("!(NodeAttrs::flags(Attrs) & NodeAttrs::PhiRef)"
, "llvm/lib/CodeGen/RDFGraph.cpp", 426, __extension__ __PRETTY_FUNCTION__
));
(void)G;
Ref.Op = Op;
429}

431// Get the owner of a given reference node.
432NodeAddr<NodeBase*> RefNode::getOwner(const DataFlowGraph &G) {
NodeAddr<NodeBase*> NA = G.addr<NodeBase*>(getNext());

while (NA.Addr != this) {
  if (NA.Addr->getType() == NodeAttrs::Code)
    return NA;
  NA = G.addr<NodeBase*>(NA.Addr->getNext());
}
llvm_unreachable("No owner in circular list")::llvm::llvm_unreachable_internal("No owner in circular list"
, "llvm/lib/CodeGen/RDFGraph.cpp", 440);
441}

443// Connect the def node to the reaching def node.
444void DefNode::linkToDef(NodeId Self, NodeAddr<DefNode*> DA) {
Ref.RD = DA.Id;
Ref.Sib = DA.Addr->getReachedDef();
DA.Addr->setReachedDef(Self);
448}

450// Connect the use node to the reaching def node.
451void UseNode::linkToDef(NodeId Self, NodeAddr<DefNode*> DA) {
Ref.RD = DA.Id;
Ref.Sib = DA.Addr->getReachedUse();
DA.Addr->setReachedUse(Self);
455}

457// Get the first member of the code node.
458NodeAddr<NodeBase*> CodeNode::getFirstMember(const DataFlowGraph &G) const {
if (Code.FirstM == 0)
  return NodeAddr<NodeBase*>();
return G.addr<NodeBase*>(Code.FirstM);
462}

464// Get the last member of the code node.
465NodeAddr<NodeBase*> CodeNode::getLastMember(const DataFlowGraph &G) const {
if (Code.LastM == 0)
  return NodeAddr<NodeBase*>();
return G.addr<NodeBase*>(Code.LastM);
469}

471// Add node NA at the end of the member list of the given code node.
472void CodeNode::addMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G) {
NodeAddr<NodeBase*> ML = getLastMember(G);
if (ML.Id != 0) {
  ML.Addr->append(NA);
} else {
  Code.FirstM = NA.Id;
  NodeId Self = G.id(this);
  NA.Addr->setNext(Self);
}
Code.LastM = NA.Id;
482}

484// Add node NA after member node MA in the given code node.
485void CodeNode::addMemberAfter(NodeAddr<NodeBase*> MA, NodeAddr<NodeBase*> NA,
    const DataFlowGraph &G) {
MA.Addr->append(NA);
if (Code.LastM == MA.Id)
  Code.LastM = NA.Id;
490}

492// Remove member node NA from the given code node.
493void CodeNode::removeMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G) {
NodeAddr<NodeBase*> MA = getFirstMember(G);
assert(MA.Id != 0)(static_cast <bool> (MA.Id != 0) ? void (0) : __assert_fail
 ("MA.Id != 0", "llvm/lib/CodeGen/RDFGraph.cpp", 495, __extension__
 __PRETTY_FUNCTION__));
22
←
'?' condition is true→

// Special handling if the member to remove is the first member.
if (MA.Id == NA.Id) {
23
←
Assuming 'MA.Id' is not equal to 'NA.Id'→
24
←
Taking false branch→
  if (Code.LastM == MA.Id) {
    // If it is the only member, set both first and last to 0.
    Code.FirstM = Code.LastM = 0;
  } else {
    // Otherwise, advance the first member.
    Code.FirstM = MA.Addr->getNext();
  }
  return;
}

while (MA.Addr != this) {
25
←
Assuming the condition is true→
26
←
Loop condition is true.  Entering loop body→
30
←
Loop condition is true.  Entering loop body→
  NodeId MX = MA.Addr->getNext();
31
←
Called C++ object pointer is null
  if (MX == NA.Id) {
27
←
Assuming 'MX' is not equal to field 'Id'→
28
←
Taking false branch→
    MA.Addr->setNext(NA.Addr->getNext());
    // If the member to remove happens to be the last one, update the
    // LastM indicator.
    if (Code.LastM == NA.Id)
      Code.LastM = MA.Id;
    return;
  }
  MA = G.addr<NodeBase*>(MX);
29
←
Null pointer value stored to 'MA.Addr'→
}
llvm_unreachable("No such member")::llvm::llvm_unreachable_internal("No such member", "llvm/lib/CodeGen/RDFGraph.cpp"
, 521);
522}

524// Return the list of all members of the code node.
525NodeList CodeNode::members(const DataFlowGraph &G) const {
static auto True = [] (NodeAddr<NodeBase*>) -> bool { return true; };
return members_if(True, G);
528}

530// Return the owner of the given instr node.
531NodeAddr<NodeBase*> InstrNode::getOwner(const DataFlowGraph &G) {
NodeAddr<NodeBase*> NA = G.addr<NodeBase*>(getNext());

while (NA.Addr != this) {
  assert(NA.Addr->getType() == NodeAttrs::Code)(static_cast <bool> (NA.Addr->getType() == NodeAttrs
::Code) ? void (0) : __assert_fail ("NA.Addr->getType() == NodeAttrs::Code"
, "llvm/lib/CodeGen/RDFGraph.cpp", 535, __extension__ __PRETTY_FUNCTION__
));
  if (NA.Addr->getKind() == NodeAttrs::Block)
    return NA;
  NA = G.addr<NodeBase*>(NA.Addr->getNext());
}
llvm_unreachable("No owner in circular list")::llvm::llvm_unreachable_internal("No owner in circular list"
, "llvm/lib/CodeGen/RDFGraph.cpp", 540);
541}

543// Add the phi node PA to the given block node.
544void BlockNode::addPhi(NodeAddr<PhiNode*> PA, const DataFlowGraph &G) {
NodeAddr<NodeBase*> M = getFirstMember(G);
if (M.Id == 0) {
  addMember(PA, G);
  return;
}

assert(M.Addr->getType() == NodeAttrs::Code)(static_cast <bool> (M.Addr->getType() == NodeAttrs::
Code) ? void (0) : __assert_fail ("M.Addr->getType() == NodeAttrs::Code"
, "llvm/lib/CodeGen/RDFGraph.cpp", 551, __extension__ __PRETTY_FUNCTION__
));
if (M.Addr->getKind() == NodeAttrs::Stmt) {
  // If the first member of the block is a statement, insert the phi as
  // the first member.
  Code.FirstM = PA.Id;
  PA.Addr->setNext(M.Id);
} else {
  // If the first member is a phi, find the last phi, and append PA to it.
  assert(M.Addr->getKind() == NodeAttrs::Phi)(static_cast <bool> (M.Addr->getKind() == NodeAttrs::
Phi) ? void (0) : __assert_fail ("M.Addr->getKind() == NodeAttrs::Phi"
, "llvm/lib/CodeGen/RDFGraph.cpp", 559, __extension__ __PRETTY_FUNCTION__
));
  NodeAddr<NodeBase*> MN = M;
  do {
    M = MN;
    MN = G.addr<NodeBase*>(M.Addr->getNext());
    assert(MN.Addr->getType() == NodeAttrs::Code)(static_cast <bool> (MN.Addr->getType() == NodeAttrs
::Code) ? void (0) : __assert_fail ("MN.Addr->getType() == NodeAttrs::Code"
, "llvm/lib/CodeGen/RDFGraph.cpp", 564, __extension__ __PRETTY_FUNCTION__
));
  } while (MN.Addr->getKind() == NodeAttrs::Phi);

  // M is the last phi.
  addMemberAfter(M, PA, G);
}
570}

572// Find the block node corresponding to the machine basic block BB in the
573// given func node.
574NodeAddr<BlockNode*> FuncNode::findBlock(const MachineBasicBlock *BB,
    const DataFlowGraph &G) const {
auto EqBB = [BB] (NodeAddr<NodeBase*> NA) -> bool {
  return NodeAddr<BlockNode*>(NA).Addr->getCode() == BB;
};
NodeList Ms = members_if(EqBB, G);
if (!Ms.empty())
  return Ms[0];
return NodeAddr<BlockNode*>();
583}

585// Get the block node for the entry block in the given function.
586NodeAddr<BlockNode*> FuncNode::getEntryBlock(const DataFlowGraph &G) {
MachineBasicBlock *EntryB = &getCode()->front();
return findBlock(EntryB, G);
589}

591// Target operand information.
592//

594// For a given instruction, check if there are any bits of RR that can remain
595// unchanged across this def.
596bool TargetOperandInfo::isPreserving(const MachineInstr &In, unsigned OpNum)
    const {
return TII.isPredicated(In);
599}

601// Check if the definition of RR produces an unspecified value.
602bool TargetOperandInfo::isClobbering(const MachineInstr &In, unsigned OpNum)
    const {
const MachineOperand &Op = In.getOperand(OpNum);
if (Op.isRegMask())
  return true;
assert(Op.isReg())(static_cast <bool> (Op.isReg()) ? void (0) : __assert_fail
 ("Op.isReg()", "llvm/lib/CodeGen/RDFGraph.cpp", 607, __extension__
 __PRETTY_FUNCTION__));
if (In.isCall())
  if (Op.isDef() && Op.isDead())
    return true;
return false;
612}

614// Check if the given instruction specifically requires
615bool TargetOperandInfo::isFixedReg(const MachineInstr &In, unsigned OpNum)
    const {
if (In.isCall() || In.isReturn() || In.isInlineAsm())
  return true;
// Check for a tail call.
if (In.isBranch())
  for (const MachineOperand &O : In.operands())
    if (O.isGlobal() || O.isSymbol())
      return true;

const MCInstrDesc &D = In.getDesc();
if (D.implicit_defs().empty() && D.implicit_uses().empty())
  return false;
const MachineOperand &Op = In.getOperand(OpNum);
// If there is a sub-register, treat the operand as non-fixed. Currently,
// fixed registers are those that are listed in the descriptor as implicit
// uses or defs, and those lists do not allow sub-registers.
if (Op.getSubReg() != 0)
  return false;
Register Reg = Op.getReg();
ArrayRef<MCPhysReg> ImpOps =
    Op.isDef() ? D.implicit_defs() : D.implicit_uses();
return is_contained(ImpOps, Reg);
638}

640//
641// The data flow graph construction.
642//

644DataFlowGraph::DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
    const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
    const MachineDominanceFrontier &mdf)
  : DefaultTOI(std::make_unique<TargetOperandInfo>(tii)), MF(mf), TII(tii),
    TRI(tri), PRI(tri, mf), MDT(mdt), MDF(mdf), TOI(*DefaultTOI),
    LiveIns(PRI) {
650}

652DataFlowGraph::DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
    const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
    const MachineDominanceFrontier &mdf, const TargetOperandInfo &toi)
  : MF(mf), TII(tii), TRI(tri), PRI(tri, mf), MDT(mdt), MDF(mdf), TOI(toi),
    LiveIns(PRI) {
657}

659// The implementation of the definition stack.
660// Each register reference has its own definition stack. In particular,
661// for a register references "Reg" and "Reg:subreg" will each have their
662// own definition stacks.

664// Construct a stack iterator.
665DataFlowGraph::DefStack::Iterator::Iterator(const DataFlowGraph::DefStack &S,
    bool Top) : DS(S) {
if (!Top) {
  // Initialize to bottom.
  Pos = 0;
  return;
}
// Initialize to the top, i.e. top-most non-delimiter (or 0, if empty).
Pos = DS.Stack.size();
while (Pos > 0 && DS.isDelimiter(DS.Stack[Pos-1]))
  Pos--;
676}

678// Return the size of the stack, including block delimiters.
679unsigned DataFlowGraph::DefStack::size() const {
unsigned S = 0;
for (auto I = top(), E = bottom(); I != E; I.down())
  S++;
return S;
684}

686// Remove the top entry from the stack. Remove all intervening delimiters
687// so that after this, the stack is either empty, or the top of the stack
688// is a non-delimiter.
689void DataFlowGraph::DefStack::pop() {
assert(!empty())(static_cast <bool> (!empty()) ? void (0) : __assert_fail
 ("!empty()", "llvm/lib/CodeGen/RDFGraph.cpp", 690, __extension__
 __PRETTY_FUNCTION__));
unsigned P = nextDown(Stack.size());
Stack.resize(P);
693}

695// Push a delimiter for block node N on the stack.
696void DataFlowGraph::DefStack::start_block(NodeId N) {
assert(N != 0)(static_cast <bool> (N != 0) ? void (0) : __assert_fail
 ("N != 0", "llvm/lib/CodeGen/RDFGraph.cpp", 697, __extension__
 __PRETTY_FUNCTION__));
Stack.push_back(NodeAddr<DefNode*>(nullptr, N));
699}

701// Remove all nodes from the top of the stack, until the delimited for
702// block node N is encountered. Remove the delimiter as well. In effect,
703// this will remove from the stack all definitions from block N.
704void DataFlowGraph::DefStack::clear_block(NodeId N) {
assert(N != 0)(static_cast <bool> (N != 0) ? void (0) : __assert_fail
 ("N != 0", "llvm/lib/CodeGen/RDFGraph.cpp", 705, __extension__
 __PRETTY_FUNCTION__));
unsigned P = Stack.size();
while (P > 0) {
  bool Found = isDelimiter(Stack[P-1], N);
  P--;
  if (Found)
    break;
}
// This will also remove the delimiter, if found.
Stack.resize(P);
715}

717// Move the stack iterator up by one.
718unsigned DataFlowGraph::DefStack::nextUp(unsigned P) const {
// Get the next valid position after P (skipping all delimiters).
// The input position P does not have to point to a non-delimiter.
unsigned SS = Stack.size();
bool IsDelim;
assert(P < SS)(static_cast <bool> (P < SS) ? void (0) : __assert_fail
 ("P < SS", "llvm/lib/CodeGen/RDFGraph.cpp", 723, __extension__
 __PRETTY_FUNCTION__));
do {
  P++;
  IsDelim = isDelimiter(Stack[P-1]);
} while (P < SS && IsDelim);
assert(!IsDelim)(static_cast <bool> (!IsDelim) ? void (0) : __assert_fail
 ("!IsDelim", "llvm/lib/CodeGen/RDFGraph.cpp", 728, __extension__
 __PRETTY_FUNCTION__));
return P;
730}

732// Move the stack iterator down by one.
733unsigned DataFlowGraph::DefStack::nextDown(unsigned P) const {
// Get the preceding valid position before P (skipping all delimiters).
// The input position P does not have to point to a non-delimiter.
assert(P > 0 && P <= Stack.size())(static_cast <bool> (P > 0 && P <= Stack.
size()) ? void (0) : __assert_fail ("P > 0 && P <= Stack.size()"
, "llvm/lib/CodeGen/RDFGraph.cpp", 736, __extension__ __PRETTY_FUNCTION__
));
bool IsDelim = isDelimiter(Stack[P-1]);
do {
  if (--P == 0)
    break;
  IsDelim = isDelimiter(Stack[P-1]);
} while (P > 0 && IsDelim);
assert(!IsDelim)(static_cast <bool> (!IsDelim) ? void (0) : __assert_fail
 ("!IsDelim", "llvm/lib/CodeGen/RDFGraph.cpp", 743, __extension__
 __PRETTY_FUNCTION__));
return P;
745}

747// Register information.

749RegisterSet DataFlowGraph::getLandingPadLiveIns() const {
RegisterSet LR;
const Function &F = MF.getFunction();
const Constant *PF = F.hasPersonalityFn() ? F.getPersonalityFn()
                                          : nullptr;
const TargetLowering &TLI = *MF.getSubtarget().getTargetLowering();
if (RegisterId R = TLI.getExceptionPointerRegister(PF))
  LR.insert(RegisterRef(R));
if (!isFuncletEHPersonality(classifyEHPersonality(PF))) {
  if (RegisterId R = TLI.getExceptionSelectorRegister(PF))
    LR.insert(RegisterRef(R));
}
return LR;
762}

764// Node management functions.

766// Get the pointer to the node with the id N.
767NodeBase *DataFlowGraph::ptr(NodeId N) const {
if (N == 0)
  return nullptr;
return Memory.ptr(N);
771}

773// Get the id of the node at the address P.
774NodeId DataFlowGraph::id(const NodeBase *P) const {
if (P == nullptr)
  return 0;
return Memory.id(P);
778}

780// Allocate a new node and set the attributes to Attrs.
781NodeAddr<NodeBase*> DataFlowGraph::newNode(uint16_t Attrs) {
NodeAddr<NodeBase*> P = Memory.New();
P.Addr->init();
P.Addr->setAttrs(Attrs);
return P;
786}

788// Make a copy of the given node B, except for the data-flow links, which
789// are set to 0.
790NodeAddr<NodeBase*> DataFlowGraph::cloneNode(const NodeAddr<NodeBase*> B) {
NodeAddr<NodeBase*> NA = newNode(0);
memcpy(NA.Addr, B.Addr, sizeof(NodeBase));
// Ref nodes need to have the data-flow links reset.
if (NA.Addr->getType() == NodeAttrs::Ref) {
  NodeAddr<RefNode*> RA = NA;
  RA.Addr->setReachingDef(0);
  RA.Addr->setSibling(0);
  if (NA.Addr->getKind() == NodeAttrs::Def) {
    NodeAddr<DefNode*> DA = NA;
    DA.Addr->setReachedDef(0);
    DA.Addr->setReachedUse(0);
  }
}
return NA;
805}

807// Allocation routines for specific node types/kinds.

809NodeAddr<UseNode*> DataFlowGraph::newUse(NodeAddr<InstrNode*> Owner,
    MachineOperand &Op, uint16_t Flags) {
NodeAddr<UseNode*> UA = newNode(NodeAttrs::Ref | NodeAttrs::Use | Flags);
UA.Addr->setRegRef(&Op, *this);
return UA;
814}

816NodeAddr<PhiUseNode*> DataFlowGraph::newPhiUse(NodeAddr<PhiNode*> Owner,
    RegisterRef RR, NodeAddr<BlockNode*> PredB, uint16_t Flags) {
NodeAddr<PhiUseNode*> PUA = newNode(NodeAttrs::Ref | NodeAttrs::Use | Flags);
assert(Flags & NodeAttrs::PhiRef)(static_cast <bool> (Flags & NodeAttrs::PhiRef) ? void
 (0) : __assert_fail ("Flags & NodeAttrs::PhiRef", "llvm/lib/CodeGen/RDFGraph.cpp"
, 819, __extension__ __PRETTY_FUNCTION__));
PUA.Addr->setRegRef(RR, *this);
PUA.Addr->setPredecessor(PredB.Id);
return PUA;
823}

825NodeAddr<DefNode*> DataFlowGraph::newDef(NodeAddr<InstrNode*> Owner,
    MachineOperand &Op, uint16_t Flags) {
NodeAddr<DefNode*> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
DA.Addr->setRegRef(&Op, *this);
return DA;
830}

832NodeAddr<DefNode*> DataFlowGraph::newDef(NodeAddr<InstrNode*> Owner,
    RegisterRef RR, uint16_t Flags) {
NodeAddr<DefNode*> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
assert(Flags & NodeAttrs::PhiRef)(static_cast <bool> (Flags & NodeAttrs::PhiRef) ? void
 (0) : __assert_fail ("Flags & NodeAttrs::PhiRef", "llvm/lib/CodeGen/RDFGraph.cpp"
, 835, __extension__ __PRETTY_FUNCTION__));
DA.Addr->setRegRef(RR, *this);
return DA;
838}

840NodeAddr<PhiNode*> DataFlowGraph::newPhi(NodeAddr<BlockNode*> Owner) {
NodeAddr<PhiNode*> PA = newNode(NodeAttrs::Code | NodeAttrs::Phi);
Owner.Addr->addPhi(PA, *this);
return PA;
844}

846NodeAddr<StmtNode*> DataFlowGraph::newStmt(NodeAddr<BlockNode*> Owner,
    MachineInstr *MI) {
NodeAddr<StmtNode*> SA = newNode(NodeAttrs::Code | NodeAttrs::Stmt);
SA.Addr->setCode(MI);
Owner.Addr->addMember(SA, *this);
return SA;
852}

854NodeAddr<BlockNode*> DataFlowGraph::newBlock(NodeAddr<FuncNode*> Owner,
    MachineBasicBlock *BB) {
NodeAddr<BlockNode*> BA = newNode(NodeAttrs::Code | NodeAttrs::Block);
BA.Addr->setCode(BB);
Owner.Addr->addMember(BA, *this);
return BA;
860}

862NodeAddr<FuncNode*> DataFlowGraph::newFunc(MachineFunction *MF) {
NodeAddr<FuncNode*> FA = newNode(NodeAttrs::Code | NodeAttrs::Func);
FA.Addr->setCode(MF);
return FA;
866}

868// Build the data flow graph.
869void DataFlowGraph::build(unsigned Options) {
reset();
Func = newFunc(&MF);

if (MF.empty())
1
Assuming the condition is false→
2
←
Taking false branch→
  return;

for (MachineBasicBlock &B : MF) {
  NodeAddr<BlockNode*> BA = newBlock(Func, &B);
  BlockNodes.insert(std::make_pair(&B, BA));
  for (MachineInstr &I : B) {
    if (I.isDebugInstr())
      continue;
    buildStmt(BA, I);
  }
}

NodeAddr<BlockNode*> EA = Func.Addr->getEntryBlock(*this);
NodeList Blocks = Func.Addr->members(*this);

// Collect information about block references.
RegisterSet AllRefs;
for (NodeAddr<BlockNode*> BA : Blocks)
3
←
Assuming '__begin1' is equal to '__end1'→
  for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this))
    for (NodeAddr<RefNode*> RA : IA.Addr->members(*this))
      AllRefs.insert(RA.Addr->getRegRef(*this));

// Collect function live-ins and entry block live-ins.
MachineRegisterInfo &MRI = MF.getRegInfo();
MachineBasicBlock &EntryB = *EA.Addr->getCode();
assert(EntryB.pred_empty() && "Function entry block has predecessors")(static_cast <bool> (EntryB.pred_empty() && "Function entry block has predecessors"
) ? void (0) : __assert_fail ("EntryB.pred_empty() && \"Function entry block has predecessors\""
, "llvm/lib/CodeGen/RDFGraph.cpp", 899, __extension__ __PRETTY_FUNCTION__
));
4
←
Assuming the condition is true→
5
←
'?' condition is true→
for (std::pair<unsigned,unsigned> P : MRI.liveins())
6
←
Assuming '__begin1' is equal to '__end1'→
  LiveIns.insert(RegisterRef(P.first));
if (MRI.tracksLiveness()) {
7
←
Taking false branch→
  for (auto I : EntryB.liveins())
    LiveIns.insert(RegisterRef(I.PhysReg, I.LaneMask));
}

// Add function-entry phi nodes for the live-in registers.
//for (std::pair<RegisterId,LaneBitmask> P : LiveIns) {
for (auto I = LiveIns.rr_begin(), E = LiveIns.rr_end(); I != E; ++I) {
8
←
Loop condition is false. Execution continues on line 922→
  RegisterRef RR = *I;
  NodeAddr<PhiNode*> PA = newPhi(EA);
  uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
  NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
  PA.Addr->addMember(DA, *this);
}

// Add phis for landing pads.
// Landing pads, unlike usual backs blocks, are not entered through
// branches in the program, or fall-throughs from other blocks. They
// are entered from the exception handling runtime and target's ABI
// may define certain registers as defined on entry to such a block.
RegisterSet EHRegs = getLandingPadLiveIns();
if (!EHRegs.empty()) {
9
←
Assuming the condition is false→
10
←
Taking false branch→
  for (NodeAddr<BlockNode*> BA : Blocks) {
    const MachineBasicBlock &B = *BA.Addr->getCode();
    if (!B.isEHPad())
      continue;

    // Prepare a list of NodeIds of the block's predecessors.
    NodeList Preds;
    for (MachineBasicBlock *PB : B.predecessors())
      Preds.push_back(findBlock(PB));

    // Build phi nodes for each live-in.
    for (RegisterRef RR : EHRegs) {
      NodeAddr<PhiNode*> PA = newPhi(BA);
      uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
      // Add def:
      NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
      PA.Addr->addMember(DA, *this);
      // Add uses (no reaching defs for phi uses):
      for (NodeAddr<BlockNode*> PBA : Preds) {
        NodeAddr<PhiUseNode*> PUA = newPhiUse(PA, RR, PBA);
        PA.Addr->addMember(PUA, *this);
      }
    }
  }
}

// Build a map "PhiM" which will contain, for each block, the set
// of references that will require phi definitions in that block.
BlockRefsMap PhiM;
for (NodeAddr<BlockNode*> BA : Blocks)
11
←
Assuming '__begin1' is equal to '__end1'→
  recordDefsForDF(PhiM, BA);
for (NodeAddr<BlockNode*> BA : Blocks)
12
←
Assuming '__begin1' is equal to '__end1'→
  buildPhis(PhiM, AllRefs, BA);

// Link all the refs. This will recursively traverse the dominator tree.
DefStackMap DM;
linkBlockRefs(DM, EA);

// Finally, remove all unused phi nodes.
if (!(Options & BuildOptions::KeepDeadPhis))
13
←
Assuming the condition is true→
14
←
Taking true branch→
  removeUnusedPhis();
15
←
Calling 'DataFlowGraph::removeUnusedPhis'→
965}

967RegisterRef DataFlowGraph::makeRegRef(unsigned Reg, unsigned Sub) const {
assert(PhysicalRegisterInfo::isRegMaskId(Reg) ||(static_cast <bool> (PhysicalRegisterInfo::isRegMaskId(
Reg) || Register::isPhysicalRegister(Reg)) ? void (0) : __assert_fail
 ("PhysicalRegisterInfo::isRegMaskId(Reg) || Register::isPhysicalRegister(Reg)"
, "llvm/lib/CodeGen/RDFGraph.cpp", 969, __extension__ __PRETTY_FUNCTION__
))
       Register::isPhysicalRegister(Reg))(static_cast <bool> (PhysicalRegisterInfo::isRegMaskId(
Reg) || Register::isPhysicalRegister(Reg)) ? void (0) : __assert_fail
 ("PhysicalRegisterInfo::isRegMaskId(Reg) || Register::isPhysicalRegister(Reg)"
, "llvm/lib/CodeGen/RDFGraph.cpp", 969, __extension__ __PRETTY_FUNCTION__
));
assert(Reg != 0)(static_cast <bool> (Reg != 0) ? void (0) : __assert_fail
 ("Reg != 0", "llvm/lib/CodeGen/RDFGraph.cpp", 970, __extension__
 __PRETTY_FUNCTION__));
if (Sub != 0)
  Reg = TRI.getSubReg(Reg, Sub);
return RegisterRef(Reg);
974}

976RegisterRef DataFlowGraph::makeRegRef(const MachineOperand &Op) const {
assert(Op.isReg() || Op.isRegMask())(static_cast <bool> (Op.isReg() || Op.isRegMask()) ? void
 (0) : __assert_fail ("Op.isReg() || Op.isRegMask()", "llvm/lib/CodeGen/RDFGraph.cpp"
, 977, __extension__ __PRETTY_FUNCTION__));
if (Op.isReg())
  return makeRegRef(Op.getReg(), Op.getSubReg());
return RegisterRef(PRI.getRegMaskId(Op.getRegMask()), LaneBitmask::getAll());
981}

983// For each stack in the map DefM, push the delimiter for block B on it.
984void DataFlowGraph::markBlock(NodeId B, DefStackMap &DefM) {
// Push block delimiters.
for (auto &P : DefM)
  P.second.start_block(B);
988}

990// Remove all definitions coming from block B from each stack in DefM.
991void DataFlowGraph::releaseBlock(NodeId B, DefStackMap &DefM) {
// Pop all defs from this block from the definition stack. Defs that were
// added to the map during the traversal of instructions will not have a
// delimiter, but for those, the whole stack will be emptied.
for (auto &P : DefM)
  P.second.clear_block(B);

// Finally, remove empty stacks from the map.
for (auto I = DefM.begin(), E = DefM.end(), NextI = I; I != E; I = NextI) {
  NextI = std::next(I);
  // This preserves the validity of iterators other than I.
  if (I->second.empty())
    DefM.erase(I);
}
1005}

1007// Push all definitions from the instruction node IA to an appropriate
1008// stack in DefM.
1009void DataFlowGraph::pushAllDefs(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
pushClobbers(IA, DefM);
pushDefs(IA, DefM);
1012}

1014// Push all definitions from the instruction node IA to an appropriate
1015// stack in DefM.
1016void DataFlowGraph::pushClobbers(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
NodeSet Visited;
std::set<RegisterId> Defined;

// The important objectives of this function are:
// - to be able to handle instructions both while the graph is being
//   constructed, and after the graph has been constructed, and
// - maintain proper ordering of definitions on the stack for each
//   register reference:
//   - if there are two or more related defs in IA (i.e. coming from
//     the same machine operand), then only push one def on the stack,
//   - if there are multiple unrelated defs of non-overlapping
//     subregisters of S, then the stack for S will have both (in an
//     unspecified order), but the order does not matter from the data-
//     -flow perspective.

for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) {
  if (Visited.count(DA.Id))
    continue;
  if (!(DA.Addr->getFlags() & NodeAttrs::Clobbering))
    continue;

  NodeList Rel = getRelatedRefs(IA, DA);
  NodeAddr<DefNode*> PDA = Rel.front();
  RegisterRef RR = PDA.Addr->getRegRef(*this);

  // Push the definition on the stack for the register and all aliases.
  // The def stack traversal in linkNodeUp will check the exact aliasing.
  DefM[RR.Reg].push(DA);
  Defined.insert(RR.Reg);
  for (RegisterId A : PRI.getAliasSet(RR.Reg)) {
    // Check that we don't push the same def twice.
    assert(A != RR.Reg)(static_cast <bool> (A != RR.Reg) ? void (0) : __assert_fail
 ("A != RR.Reg", "llvm/lib/CodeGen/RDFGraph.cpp", 1048, __extension__
 __PRETTY_FUNCTION__));
    if (!Defined.count(A))
      DefM[A].push(DA);
  }
  // Mark all the related defs as visited.
  for (NodeAddr<NodeBase*> T : Rel)
    Visited.insert(T.Id);
}
1056}

1058// Push all definitions from the instruction node IA to an appropriate
1059// stack in DefM.
1060void DataFlowGraph::pushDefs(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
NodeSet Visited;
1062#ifndef NDEBUG
std::set<RegisterId> Defined;
1064#endif

// The important objectives of this function are:
// - to be able to handle instructions both while the graph is being
//   constructed, and after the graph has been constructed, and
// - maintain proper ordering of definitions on the stack for each
//   register reference:
//   - if there are two or more related defs in IA (i.e. coming from
//     the same machine operand), then only push one def on the stack,
//   - if there are multiple unrelated defs of non-overlapping
//     subregisters of S, then the stack for S will have both (in an
//     unspecified order), but the order does not matter from the data-
//     -flow perspective.

for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) {
  if (Visited.count(DA.Id))
    continue;
  if (DA.Addr->getFlags() & NodeAttrs::Clobbering)
    continue;

  NodeList Rel = getRelatedRefs(IA, DA);
  NodeAddr<DefNode*> PDA = Rel.front();
  RegisterRef RR = PDA.Addr->getRegRef(*this);
1087#ifndef NDEBUG
  // Assert if the register is defined in two or more unrelated defs.
  // This could happen if there are two or more def operands defining it.
  if (!Defined.insert(RR.Reg).second) {
    MachineInstr *MI = NodeAddr<StmtNode*>(IA).Addr->getCode();
    dbgs() << "Multiple definitions of register: "
           << Print(RR, *this) << " in\n  " << *MI << "in "
           << printMBBReference(*MI->getParent()) << '\n';
    llvm_unreachable(nullptr)::llvm::llvm_unreachable_internal(nullptr, "llvm/lib/CodeGen/RDFGraph.cpp"
, 1095);
  }
1097#endif
  // Push the definition on the stack for the register and all aliases.
  // The def stack traversal in linkNodeUp will check the exact aliasing.
  DefM[RR.Reg].push(DA);
  for (RegisterId A : PRI.getAliasSet(RR.Reg)) {
    // Check that we don't push the same def twice.
    assert(A != RR.Reg)(static_cast <bool> (A != RR.Reg) ? void (0) : __assert_fail
 ("A != RR.Reg", "llvm/lib/CodeGen/RDFGraph.cpp", 1103, __extension__
 __PRETTY_FUNCTION__));
    DefM[A].push(DA);
  }
  // Mark all the related defs as visited.
  for (NodeAddr<NodeBase*> T : Rel)
    Visited.insert(T.Id);
}
1110}

1112// Return the list of all reference nodes related to RA, including RA itself.
1113// See "getNextRelated" for the meaning of a "related reference".
1114NodeList DataFlowGraph::getRelatedRefs(NodeAddr<InstrNode*> IA,
    NodeAddr<RefNode*> RA) const {
assert(IA.Id != 0 && RA.Id != 0)(static_cast <bool> (IA.Id != 0 && RA.Id != 0) ?
 void (0) : __assert_fail ("IA.Id != 0 && RA.Id != 0"
, "llvm/lib/CodeGen/RDFGraph.cpp", 1116, __extension__ __PRETTY_FUNCTION__
));

NodeList Refs;
NodeId Start = RA.Id;
do {
  Refs.push_back(RA);
  RA = getNextRelated(IA, RA);
} while (RA.Id != 0 && RA.Id != Start);
return Refs;
1125}

1127// Clear all information in the graph.
1128void DataFlowGraph::reset() {
Memory.clear();
BlockNodes.clear();
Func = NodeAddr<FuncNode*>();
1132}

1134// Return the next reference node in the instruction node IA that is related
1135// to RA. Conceptually, two reference nodes are related if they refer to the
1136// same instance of a register access, but differ in flags or other minor
1137// characteristics. Specific examples of related nodes are shadow reference
1138// nodes.
1139// Return the equivalent of nullptr if there are no more related references.
1140NodeAddr<RefNode*> DataFlowGraph::getNextRelated(NodeAddr<InstrNode*> IA,
    NodeAddr<RefNode*> RA) const {
assert(IA.Id != 0 && RA.Id != 0)(static_cast <bool> (IA.Id != 0 && RA.Id != 0) ?
 void (0) : __assert_fail ("IA.Id != 0 && RA.Id != 0"
, "llvm/lib/CodeGen/RDFGraph.cpp", 1142, __extension__ __PRETTY_FUNCTION__
));

auto Related = [this,RA](NodeAddr<RefNode*> TA) -> bool {
  if (TA.Addr->getKind() != RA.Addr->getKind())
    return false;
  if (TA.Addr->getRegRef(*this) != RA.Addr->getRegRef(*this))
    return false;
  return true;
};
auto RelatedStmt = [&Related,RA](NodeAddr<RefNode*> TA) -> bool {
  return Related(TA) &&
         &RA.Addr->getOp() == &TA.Addr->getOp();
};
auto RelatedPhi = [&Related,RA](NodeAddr<RefNode*> TA) -> bool {
  if (!Related(TA))
    return false;
  if (TA.Addr->getKind() != NodeAttrs::Use)
    return true;
  // For phi uses, compare predecessor blocks.
  const NodeAddr<const PhiUseNode*> TUA = TA;
  const NodeAddr<const PhiUseNode*> RUA = RA;
  return TUA.Addr->getPredecessor() == RUA.Addr->getPredecessor();
};

RegisterRef RR = RA.Addr->getRegRef(*this);
if (IA.Addr->getKind() == NodeAttrs::Stmt)
  return RA.Addr->getNextRef(RR, RelatedStmt, true, *this);
return RA.Addr->getNextRef(RR, RelatedPhi, true, *this);
1170}

1172// Find the next node related to RA in IA that satisfies condition P.
1173// If such a node was found, return a pair where the second element is the
1174// located node. If such a node does not exist, return a pair where the
1175// first element is the element after which such a node should be inserted,
1176// and the second element is a null-address.
1177template <typename Predicate>
1178std::pair<NodeAddr<RefNode*>,NodeAddr<RefNode*>>
1179DataFlowGraph::locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA,
    Predicate P) const {
assert(IA.Id != 0 && RA.Id != 0)(static_cast <bool> (IA.Id != 0 && RA.Id != 0) ?
 void (0) : __assert_fail ("IA.Id != 0 && RA.Id != 0"
, "llvm/lib/CodeGen/RDFGraph.cpp", 1181, __extension__ __PRETTY_FUNCTION__
));

NodeAddr<RefNode*> NA;
NodeId Start = RA.Id;
while (true) {
  NA = getNextRelated(IA, RA);
  if (NA.Id == 0 || NA.Id == Start)
    break;
  if (P(NA))
    break;
  RA = NA;
}

if (NA.Id != 0 && NA.Id != Start)
  return std::make_pair(RA, NA);
return std::make_pair(RA, NodeAddr<RefNode*>());
1197}

1199// Get the next shadow node in IA corresponding to RA, and optionally create
1200// such a node if it does not exist.
1201NodeAddr<RefNode*> DataFlowGraph::getNextShadow(NodeAddr<InstrNode*> IA,
    NodeAddr<RefNode*> RA, bool Create) {
assert(IA.Id != 0 && RA.Id != 0)(static_cast <bool> (IA.Id != 0 && RA.Id != 0) ?
 void (0) : __assert_fail ("IA.Id != 0 && RA.Id != 0"
, "llvm/lib/CodeGen/RDFGraph.cpp", 1203, __extension__ __PRETTY_FUNCTION__
));

uint16_t Flags = RA.Addr->getFlags() | NodeAttrs::Shadow;
auto IsShadow = [Flags] (NodeAddr<RefNode*> TA) -> bool {
  return TA.Addr->getFlags() == Flags;
};
auto Loc = locateNextRef(IA, RA, IsShadow);
if (Loc.second.Id != 0 || !Create)
  return Loc.second;

// Create a copy of RA and mark is as shadow.
NodeAddr<RefNode*> NA = cloneNode(RA);
NA.Addr->setFlags(Flags | NodeAttrs::Shadow);
IA.Addr->addMemberAfter(Loc.first, NA, *this);
return NA;
1218}

1220// Get the next shadow node in IA corresponding to RA. Return null-address
1221// if such a node does not exist.
1222NodeAddr<RefNode*> DataFlowGraph::getNextShadow(NodeAddr<InstrNode*> IA,
    NodeAddr<RefNode*> RA) const {
assert(IA.Id != 0 && RA.Id != 0)(static_cast <bool> (IA.Id != 0 && RA.Id != 0) ?
 void (0) : __assert_fail ("IA.Id != 0 && RA.Id != 0"
, "llvm/lib/CodeGen/RDFGraph.cpp", 1224, __extension__ __PRETTY_FUNCTION__
));
uint16_t Flags = RA.Addr->getFlags() | NodeAttrs::Shadow;
auto IsShadow = [Flags] (NodeAddr<RefNode*> TA) -> bool {
  return TA.Addr->getFlags() == Flags;
};
return locateNextRef(IA, RA, IsShadow).second;
1230}

1232// Create a new statement node in the block node BA that corresponds to
1233// the machine instruction MI.
1234void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) {
NodeAddr<StmtNode*> SA = newStmt(BA, &In);

auto isCall = [] (const MachineInstr &In) -> bool {
  if (In.isCall())
    return true;
  // Is tail call?
  if (In.isBranch()) {
    for (const MachineOperand &Op : In.operands())
      if (Op.isGlobal() || Op.isSymbol())
        return true;
    // Assume indirect branches are calls. This is for the purpose of
    // keeping implicit operands, and so it won't hurt on intra-function
    // indirect branches.
    if (In.isIndirectBranch())
      return true;
  }
  return false;
};

auto isDefUndef = [this] (const MachineInstr &In, RegisterRef DR) -> bool {
  // This instruction defines DR. Check if there is a use operand that
  // would make DR live on entry to the instruction.
  for (const MachineOperand &Op : In.operands()) {
    if (!Op.isReg() || Op.getReg() == 0 || !Op.isUse() || Op.isUndef())
      continue;
    RegisterRef UR = makeRegRef(Op);
    if (PRI.alias(DR, UR))
      return false;
  }
  return true;
};

bool IsCall = isCall(In);
unsigned NumOps = In.getNumOperands();

// Avoid duplicate implicit defs. This will not detect cases of implicit
// defs that define registers that overlap, but it is not clear how to
// interpret that in the absence of explicit defs. Overlapping explicit
// defs are likely illegal already.
BitVector DoneDefs(TRI.getNumRegs());
// Process explicit defs first.
for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
  MachineOperand &Op = In.getOperand(OpN);
  if (!Op.isReg() || !Op.isDef() || Op.isImplicit())
    continue;
  Register R = Op.getReg();
  if (!R || !R.isPhysical())
    continue;
  uint16_t Flags = NodeAttrs::None;
  if (TOI.isPreserving(In, OpN)) {
    Flags |= NodeAttrs::Preserving;
    // If the def is preserving, check if it is also undefined.
    if (isDefUndef(In, makeRegRef(Op)))
      Flags |= NodeAttrs::Undef;
  }
  if (TOI.isClobbering(In, OpN))
    Flags |= NodeAttrs::Clobbering;
  if (TOI.isFixedReg(In, OpN))
    Flags |= NodeAttrs::Fixed;
  if (IsCall && Op.isDead())
    Flags |= NodeAttrs::Dead;
  NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
  SA.Addr->addMember(DA, *this);
  assert(!DoneDefs.test(R))(static_cast <bool> (!DoneDefs.test(R)) ? void (0) : __assert_fail
 ("!DoneDefs.test(R)", "llvm/lib/CodeGen/RDFGraph.cpp", 1298,
 __extension__ __PRETTY_FUNCTION__));
  DoneDefs.set(R);
}

// Process reg-masks (as clobbers).
BitVector DoneClobbers(TRI.getNumRegs());
for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
  MachineOperand &Op = In.getOperand(OpN);
  if (!Op.isRegMask())
    continue;
  uint16_t Flags = NodeAttrs::Clobbering | NodeAttrs::Fixed |
                   NodeAttrs::Dead;
  NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
  SA.Addr->addMember(DA, *this);
  // Record all clobbered registers in DoneDefs.
  const uint32_t *RM = Op.getRegMask();
  for (unsigned i = 1, e = TRI.getNumRegs(); i != e; ++i)
    if (!(RM[i/32] & (1u << (i%32))))
      DoneClobbers.set(i);
}

// Process implicit defs, skipping those that have already been added
// as explicit.
for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
  MachineOperand &Op = In.getOperand(OpN);
  if (!Op.isReg() || !Op.isDef() || !Op.isImplicit())
    continue;
  Register R = Op.getReg();
  if (!R || !R.isPhysical() || DoneDefs.test(R))
    continue;
  RegisterRef RR = makeRegRef(Op);
  uint16_t Flags = NodeAttrs::None;
  if (TOI.isPreserving(In, OpN)) {
    Flags |= NodeAttrs::Preserving;
    // If the def is preserving, check if it is also undefined.
    if (isDefUndef(In, RR))
      Flags |= NodeAttrs::Undef;
  }
  if (TOI.isClobbering(In, OpN))
    Flags |= NodeAttrs::Clobbering;
  if (TOI.isFixedReg(In, OpN))
    Flags |= NodeAttrs::Fixed;
  if (IsCall && Op.isDead()) {
    if (DoneClobbers.test(R))
      continue;
    Flags |= NodeAttrs::Dead;
  }
  NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
  SA.Addr->addMember(DA, *this);
  DoneDefs.set(R);
}

for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
  MachineOperand &Op = In.getOperand(OpN);
  if (!Op.isReg() || !Op.isUse())
    continue;
  Register R = Op.getReg();
  if (!R || !R.isPhysical())
    continue;
  uint16_t Flags = NodeAttrs::None;
  if (Op.isUndef())
    Flags |= NodeAttrs::Undef;
  if (TOI.isFixedReg(In, OpN))
    Flags |= NodeAttrs::Fixed;
  NodeAddr<UseNode*> UA = newUse(SA, Op, Flags);
  SA.Addr->addMember(UA, *this);
}
1365}

1367// Scan all defs in the block node BA and record in PhiM the locations of
1368// phi nodes corresponding to these defs.
1369void DataFlowGraph::recordDefsForDF(BlockRefsMap &PhiM,
    NodeAddr<BlockNode*> BA) {
// Check all defs from block BA and record them in each block in BA's
// iterated dominance frontier. This information will later be used to
// create phi nodes.
MachineBasicBlock *BB = BA.Addr->getCode();
assert(BB)(static_cast <bool> (BB) ? void (0) : __assert_fail ("BB"
, "llvm/lib/CodeGen/RDFGraph.cpp", 1375, __extension__ __PRETTY_FUNCTION__
));
auto DFLoc = MDF.find(BB);
if (DFLoc == MDF.end() || DFLoc->second.empty())
  return;

// Traverse all instructions in the block and collect the set of all
// defined references. For each reference there will be a phi created
// in the block's iterated dominance frontier.
// This is done to make sure that each defined reference gets only one
// phi node, even if it is defined multiple times.
RegisterSet Defs;
for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this))
  for (NodeAddr<RefNode*> RA : IA.Addr->members_if(IsDef, *this))
    Defs.insert(RA.Addr->getRegRef(*this));

// Calculate the iterated dominance frontier of BB.
const MachineDominanceFrontier::DomSetType &DF = DFLoc->second;
SetVector<MachineBasicBlock*> IDF(DF.begin(), DF.end());
for (unsigned i = 0; i < IDF.size(); ++i) {
  auto F = MDF.find(IDF[i]);
  if (F != MDF.end())
    IDF.insert(F->second.begin(), F->second.end());
}

// Finally, add the set of defs to each block in the iterated dominance
// frontier.
for (auto *DB : IDF) {
  NodeAddr<BlockNode*> DBA = findBlock(DB);
  PhiM[DBA.Id].insert(Defs.begin(), Defs.end());
}
1405}

1407// Given the locations of phi nodes in the map PhiM, create the phi nodes
1408// that are located in the block node BA.
1409void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, RegisterSet &AllRefs,
    NodeAddr<BlockNode*> BA) {
// Check if this blocks has any DF defs, i.e. if there are any defs
// that this block is in the iterated dominance frontier of.
auto HasDF = PhiM.find(BA.Id);
if (HasDF == PhiM.end() || HasDF->second.empty())
  return;

// First, remove all R in Refs in such that there exists T in Refs
// such that T covers R. In other words, only leave those refs that
// are not covered by another ref (i.e. maximal with respect to covering).

auto MaxCoverIn = [this] (RegisterRef RR, RegisterSet &RRs) -> RegisterRef {
  for (RegisterRef I : RRs)
    if (I != RR && RegisterAggr::isCoverOf(I, RR, PRI))
      RR = I;
  return RR;
};

RegisterSet MaxDF;
for (RegisterRef I : HasDF->second)
  MaxDF.insert(MaxCoverIn(I, HasDF->second));

std::vector<RegisterRef> MaxRefs;
for (RegisterRef I : MaxDF)
  MaxRefs.push_back(MaxCoverIn(I, AllRefs));

// Now, for each R in MaxRefs, get the alias closure of R. If the closure
// only has R in it, create a phi a def for R. Otherwise, create a phi,
// and add a def for each S in the closure.

// Sort the refs so that the phis will be created in a deterministic order.
llvm::sort(MaxRefs);
// Remove duplicates.
auto NewEnd = std::unique(MaxRefs.begin(), MaxRefs.end());
MaxRefs.erase(NewEnd, MaxRefs.end());

auto Aliased = [this,&MaxRefs](RegisterRef RR,
                               std::vector<unsigned> &Closure) -> bool {
  for (unsigned I : Closure)
    if (PRI.alias(RR, MaxRefs[I]))
      return true;
  return false;
};

// Prepare a list of NodeIds of the block's predecessors.
NodeList Preds;
const MachineBasicBlock *MBB = BA.Addr->getCode();
for (MachineBasicBlock *PB : MBB->predecessors())
  Preds.push_back(findBlock(PB));

while (!MaxRefs.empty()) {
  // Put the first element in the closure, and then add all subsequent
  // elements from MaxRefs to it, if they alias at least one element
  // already in the closure.
  // ClosureIdx: vector of indices in MaxRefs of members of the closure.
  std::vector<unsigned> ClosureIdx = { 0 };
  for (unsigned i = 1; i != MaxRefs.size(); ++i)
    if (Aliased(MaxRefs[i], ClosureIdx))
      ClosureIdx.push_back(i);

  // Build a phi for the closure.
  unsigned CS = ClosureIdx.size();
  NodeAddr<PhiNode*> PA = newPhi(BA);

  // Add defs.
  for (unsigned X = 0; X != CS; ++X) {
    RegisterRef RR = MaxRefs[ClosureIdx[X]];
    uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
    NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
    PA.Addr->addMember(DA, *this);
  }
  // Add phi uses.
  for (NodeAddr<BlockNode*> PBA : Preds) {
    for (unsigned X = 0; X != CS; ++X) {
      RegisterRef RR = MaxRefs[ClosureIdx[X]];
      NodeAddr<PhiUseNode*> PUA = newPhiUse(PA, RR, PBA);
      PA.Addr->addMember(PUA, *this);
    }
  }

  // Erase from MaxRefs all elements in the closure.
  auto Begin = MaxRefs.begin();
  for (unsigned Idx : llvm::reverse(ClosureIdx))
    MaxRefs.erase(Begin + Idx);
}
1495}

1497// Remove any unneeded phi nodes that were created during the build process.
1498void DataFlowGraph::removeUnusedPhis() {
// This will remove unused phis, i.e. phis where each def does not reach
// any uses or other defs. This will not detect or remove circular phi
// chains that are otherwise dead. Unused/dead phis are created during
// the build process and this function is intended to remove these cases
// that are easily determinable to be unnecessary.

SetVector<NodeId> PhiQ;
for (NodeAddr<BlockNode*> BA : Func.Addr->members(*this)) {
16
←
Assuming '__begin1' is equal to '__end1'→
  for (auto P : BA.Addr->members_if(IsPhi, *this))
    PhiQ.insert(P.Id);
}

static auto HasUsedDef = [](NodeList &Ms) -> bool {
  for (NodeAddr<NodeBase*> M : Ms) {
    if (M.Addr->getKind() != NodeAttrs::Def)
      continue;
    NodeAddr<DefNode*> DA = M;
    if (DA.Addr->getReachedDef() != 0 || DA.Addr->getReachedUse() != 0)
      return true;
  }
  return false;
};

// Any phi, if it is removed, may affect other phis (make them dead).
// For each removed phi, collect the potentially affected phis and add
// them back to the queue.
while (!PhiQ.empty()) {
17
←
Assuming the condition is true→
18
←
Loop condition is true.  Entering loop body→
  auto PA = addr<PhiNode*>(PhiQ[0]);
  PhiQ.remove(PA.Id);
  NodeList Refs = PA.Addr->members(*this);
  if (HasUsedDef(Refs))
19
←
Taking false branch→
    continue;
  for (NodeAddr<RefNode*> RA : Refs) {
20
←
Assuming '__begin2' is equal to '__end2'→
    if (NodeId RD = RA.Addr->getReachingDef()) {
      auto RDA = addr<DefNode*>(RD);
      NodeAddr<InstrNode*> OA = RDA.Addr->getOwner(*this);
      if (IsPhi(OA))
        PhiQ.insert(OA.Id);
    }
    if (RA.Addr->isDef())
      unlinkDef(RA, true);
    else
      unlinkUse(RA, true);
  }
  NodeAddr<BlockNode*> BA = PA.Addr->getOwner(*this);
  BA.Addr->removeMember(PA, *this);
21
←
Calling 'CodeNode::removeMember'→
}
1546}

1548// For a given reference node TA in an instruction node IA, connect the
1549// reaching def of TA to the appropriate def node. Create any shadow nodes
1550// as appropriate.
1551template <typename T>
1552void DataFlowGraph::linkRefUp(NodeAddr<InstrNode*> IA, NodeAddr<T> TA,
    DefStack &DS) {
if (DS.empty())
  return;
RegisterRef RR = TA.Addr->getRegRef(*this);
NodeAddr<T> TAP;

// References from the def stack that have been examined so far.
RegisterAggr Defs(PRI);

for (auto I = DS.top(), E = DS.bottom(); I != E; I.down()) {
  RegisterRef QR = I->Addr->getRegRef(*this);

  // Skip all defs that are aliased to any of the defs that we have already
  // seen. If this completes a cover of RR, stop the stack traversal.
  bool Alias = Defs.hasAliasOf(QR);
  bool Cover = Defs.insert(QR).hasCoverOf(RR);
  if (Alias) {
    if (Cover)
      break;
    continue;
  }

  // The reaching def.
  NodeAddr<DefNode*> RDA = *I;

  // Pick the reached node.
  if (TAP.Id == 0) {
    TAP = TA;
  } else {
    // Mark the existing ref as "shadow" and create a new shadow.
    TAP.Addr->setFlags(TAP.Addr->getFlags() | NodeAttrs::Shadow);
    TAP = getNextShadow(IA, TAP, true);
  }

  // Create the link.
  TAP.Addr->linkToDef(TAP.Id, RDA);

  if (Cover)
    break;
}
1593}

1595// Create data-flow links for all reference nodes in the statement node SA.
1596template <typename Predicate>
1597void DataFlowGraph::linkStmtRefs(DefStackMap &DefM, NodeAddr<StmtNode*> SA,
    Predicate P) {
1599#ifndef NDEBUG
RegisterSet Defs;
1601#endif

// Link all nodes (upwards in the data-flow) with their reaching defs.
for (NodeAddr<RefNode*> RA : SA.Addr->members_if(P, *this)) {
  uint16_t Kind = RA.Addr->getKind();
  assert(Kind == NodeAttrs::Def || Kind == NodeAttrs::Use)(static_cast <bool> (Kind == NodeAttrs::Def || Kind == NodeAttrs
::Use) ? void (0) : __assert_fail ("Kind == NodeAttrs::Def || Kind == NodeAttrs::Use"
, "llvm/lib/CodeGen/RDFGraph.cpp", 1606, __extension__ __PRETTY_FUNCTION__
));
  RegisterRef RR = RA.Addr->getRegRef(*this);
1608#ifndef NDEBUG
  // Do not expect multiple defs of the same reference.
  assert(Kind != NodeAttrs::Def || !Defs.count(RR))(static_cast <bool> (Kind != NodeAttrs::Def || !Defs.count
(RR)) ? void (0) : __assert_fail ("Kind != NodeAttrs::Def || !Defs.count(RR)"
, "llvm/lib/CodeGen/RDFGraph.cpp", 1610, __extension__ __PRETTY_FUNCTION__
));
  Defs.insert(RR);
1612#endif

  auto F = DefM.find(RR.Reg);
  if (F == DefM.end())
    continue;
  DefStack &DS = F->second;
  if (Kind == NodeAttrs::Use)
    linkRefUp<UseNode*>(SA, RA, DS);
  else if (Kind == NodeAttrs::Def)
    linkRefUp<DefNode*>(SA, RA, DS);
  else
    llvm_unreachable("Unexpected node in instruction")::llvm::llvm_unreachable_internal("Unexpected node in instruction"
, "llvm/lib/CodeGen/RDFGraph.cpp", 1623);
}
1625}

1627// Create data-flow links for all instructions in the block node BA. This
1628// will include updating any phi nodes in BA.
1629void DataFlowGraph::linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode*> BA) {
// Push block delimiters.
markBlock(BA.Id, DefM);

auto IsClobber = [] (NodeAddr<RefNode*> RA) -> bool {
  return IsDef(RA) && (RA.Addr->getFlags() & NodeAttrs::Clobbering);
};
auto IsNoClobber = [] (NodeAddr<RefNode*> RA) -> bool {
  return IsDef(RA) && !(RA.Addr->getFlags() & NodeAttrs::Clobbering);
};

assert(BA.Addr && "block node address is needed to create a data-flow link")(static_cast <bool> (BA.Addr && "block node address is needed to create a data-flow link"
) ? void (0) : __assert_fail ("BA.Addr && \"block node address is needed to create a data-flow link\""
, "llvm/lib/CodeGen/RDFGraph.cpp", 1640, __extension__ __PRETTY_FUNCTION__
));
// For each non-phi instruction in the block, link all the defs and uses
// to their reaching defs. For any member of the block (including phis),
// push the defs on the corresponding stacks.
for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this)) {
  // Ignore phi nodes here. They will be linked part by part from the
  // predecessors.
  if (IA.Addr->getKind() == NodeAttrs::Stmt) {
    linkStmtRefs(DefM, IA, IsUse);
    linkStmtRefs(DefM, IA, IsClobber);
  }

  // Push the definitions on the stack.
  pushClobbers(IA, DefM);

  if (IA.Addr->getKind() == NodeAttrs::Stmt)
    linkStmtRefs(DefM, IA, IsNoClobber);

  pushDefs(IA, DefM);
}

// Recursively process all children in the dominator tree.
MachineDomTreeNode *N = MDT.getNode(BA.Addr->getCode());
for (auto *I : *N) {
  MachineBasicBlock *SB = I->getBlock();
  NodeAddr<BlockNode*> SBA = findBlock(SB);
  linkBlockRefs(DefM, SBA);
}

// Link the phi uses from the successor blocks.
auto IsUseForBA = [BA](NodeAddr<NodeBase*> NA) -> bool {
  if (NA.Addr->getKind() != NodeAttrs::Use)
    return false;
  assert(NA.Addr->getFlags() & NodeAttrs::PhiRef)(static_cast <bool> (NA.Addr->getFlags() & NodeAttrs
::PhiRef) ? void (0) : __assert_fail ("NA.Addr->getFlags() & NodeAttrs::PhiRef"
, "llvm/lib/CodeGen/RDFGraph.cpp", 1673, __extension__ __PRETTY_FUNCTION__
));
  NodeAddr<PhiUseNode*> PUA = NA;
  return PUA.Addr->getPredecessor() == BA.Id;
};

RegisterSet EHLiveIns = getLandingPadLiveIns();
MachineBasicBlock *MBB = BA.Addr->getCode();

for (MachineBasicBlock *SB : MBB->successors()) {
  bool IsEHPad = SB->isEHPad();
  NodeAddr<BlockNode*> SBA = findBlock(SB);
  for (NodeAddr<InstrNode*> IA : SBA.Addr->members_if(IsPhi, *this)) {
    // Do not link phi uses for landing pad live-ins.
    if (IsEHPad) {
      // Find what register this phi is for.
      NodeAddr<RefNode*> RA = IA.Addr->getFirstMember(*this);
      assert(RA.Id != 0)(static_cast <bool> (RA.Id != 0) ? void (0) : __assert_fail
 ("RA.Id != 0", "llvm/lib/CodeGen/RDFGraph.cpp", 1689, __extension__
 __PRETTY_FUNCTION__));
      if (EHLiveIns.count(RA.Addr->getRegRef(*this)))
        continue;
    }
    // Go over each phi use associated with MBB, and link it.
    for (auto U : IA.Addr->members_if(IsUseForBA, *this)) {
      NodeAddr<PhiUseNode*> PUA = U;
      RegisterRef RR = PUA.Addr->getRegRef(*this);
      linkRefUp<UseNode*>(IA, PUA, DefM[RR.Reg]);
    }
  }
}

// Pop all defs from this block from the definition stacks.
releaseBlock(BA.Id, DefM);
1704}

1706// Remove the use node UA from any data-flow and structural links.
1707void DataFlowGraph::unlinkUseDF(NodeAddr<UseNode*> UA) {
NodeId RD = UA.Addr->getReachingDef();
NodeId Sib = UA.Addr->getSibling();

if (RD == 0) {
  assert(Sib == 0)(static_cast <bool> (Sib == 0) ? void (0) : __assert_fail
 ("Sib == 0", "llvm/lib/CodeGen/RDFGraph.cpp", 1712, __extension__
 __PRETTY_FUNCTION__));
  return;
}

auto RDA = addr<DefNode*>(RD);
auto TA = addr<UseNode*>(RDA.Addr->getReachedUse());
if (TA.Id == UA.Id) {
  RDA.Addr->setReachedUse(Sib);
  return;
}

while (TA.Id != 0) {
  NodeId S = TA.Addr->getSibling();
  if (S == UA.Id) {
    TA.Addr->setSibling(UA.Addr->getSibling());
    return;
  }
  TA = addr<UseNode*>(S);
}
1731}

1733// Remove the def node DA from any data-flow and structural links.
1734void DataFlowGraph::unlinkDefDF(NodeAddr<DefNode*> DA) {
//
//         RD
//         | reached
//         | def
//         :
//         .
//        +----+
// ... -- | DA | -- ... -- 0  : sibling chain of DA
//        +----+
//         |  | reached
//         |  : def
//         |  .
//         | ...  : Siblings (defs)
//         |
//         : reached
//         . use
//        ... : sibling chain of reached uses

NodeId RD = DA.Addr->getReachingDef();

// Visit all siblings of the reached def and reset their reaching defs.
// Also, defs reached by DA are now "promoted" to being reached by RD,
// so all of them will need to be spliced into the sibling chain where
// DA belongs.
auto getAllNodes = [this] (NodeId N) -> NodeList {
  NodeList Res;
  while (N) {
    auto RA = addr<RefNode*>(N);
    // Keep the nodes in the exact sibling order.
    Res.push_back(RA);
    N = RA.Addr->getSibling();
  }
  return Res;
};
NodeList ReachedDefs = getAllNodes(DA.Addr->getReachedDef());
NodeList ReachedUses = getAllNodes(DA.Addr->getReachedUse());

if (RD == 0) {
  for (NodeAddr<RefNode*> I : ReachedDefs)
    I.Addr->setSibling(0);
  for (NodeAddr<RefNode*> I : ReachedUses)
    I.Addr->setSibling(0);
}
for (NodeAddr<DefNode*> I : ReachedDefs)
  I.Addr->setReachingDef(RD);
for (NodeAddr<UseNode*> I : ReachedUses)
  I.Addr->setReachingDef(RD);

NodeId Sib = DA.Addr->getSibling();
if (RD == 0) {
  assert(Sib == 0)(static_cast <bool> (Sib == 0) ? void (0) : __assert_fail
 ("Sib == 0", "llvm/lib/CodeGen/RDFGraph.cpp", 1785, __extension__
 __PRETTY_FUNCTION__));
  return;
}

// Update the reaching def node and remove DA from the sibling list.
auto RDA = addr<DefNode*>(RD);
auto TA = addr<DefNode*>(RDA.Addr->getReachedDef());
if (TA.Id == DA.Id) {
  // If DA is the first reached def, just update the RD's reached def
  // to the DA's sibling.
  RDA.Addr->setReachedDef(Sib);
} else {
  // Otherwise, traverse the sibling list of the reached defs and remove
  // DA from it.
  while (TA.Id != 0) {
    NodeId S = TA.Addr->getSibling();
    if (S == DA.Id) {
      TA.Addr->setSibling(Sib);
      break;
    }
    TA = addr<DefNode*>(S);
  }
}

// Splice the DA's reached defs into the RDA's reached def chain.
if (!ReachedDefs.empty()) {
  auto Last = NodeAddr<DefNode*>(ReachedDefs.back());
  Last.Addr->setSibling(RDA.Addr->getReachedDef());
  RDA.Addr->setReachedDef(ReachedDefs.front().Id);
}
// Splice the DA's reached uses into the RDA's reached use chain.
if (!ReachedUses.empty()) {
  auto Last = NodeAddr<UseNode*>(ReachedUses.back());
  Last.Addr->setSibling(RDA.Addr->getReachedUse());
  RDA.Addr->setReachedUse(ReachedUses.front().Id);
}
1821}