/build/llvm-toolchain-snapshot-10~svn374877/include/llvm/CodeGen/SelectionDAGNodes.h

Bug Summary

File:	include/llvm/CodeGen/SelectionDAGNodes.h
Warning:	line 1159, column 10 Called C++ object pointer is null
Annotated Source Code

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clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name SelectionDAG.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -analyzer-config-compatibility-mode=true -mrelocation-model pic -pic-level 2 -mthread-model posix -mframe-pointer=none -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu x86-64 -dwarf-column-info -debugger-tuning=gdb -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-10/lib/clang/10.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-10~svn374877/build-llvm/lib/CodeGen/SelectionDAG -I /build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG -I /build/llvm-toolchain-snapshot-10~svn374877/build-llvm/include -I /build/llvm-toolchain-snapshot-10~svn374877/include -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/backward -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-10/lib/clang/10.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++14 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-10~svn374877/build-llvm/lib/CodeGen/SelectionDAG -fdebug-prefix-map=/build/llvm-toolchain-snapshot-10~svn374877=. -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -stack-protector 2 -fgnuc-version=4.2.1 -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -faddrsig -o /tmp/scan-build-2019-10-15-233810-7101-1 -x c++ /build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

→
1//===- SelectionDAG.cpp - Implement the SelectionDAG data structures ------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG class.
10//
11//===----------------------------------------------------------------------===//

13#include "llvm/CodeGen/SelectionDAG.h"
14#include "SDNodeDbgValue.h"
15#include "llvm/ADT/APFloat.h"
16#include "llvm/ADT/APInt.h"
17#include "llvm/ADT/APSInt.h"
18#include "llvm/ADT/ArrayRef.h"
19#include "llvm/ADT/BitVector.h"
20#include "llvm/ADT/FoldingSet.h"
21#include "llvm/ADT/None.h"
22#include "llvm/ADT/STLExtras.h"
23#include "llvm/ADT/SmallPtrSet.h"
24#include "llvm/ADT/SmallVector.h"
25#include "llvm/ADT/Triple.h"
26#include "llvm/ADT/Twine.h"
27#include "llvm/Analysis/ValueTracking.h"
28#include "llvm/CodeGen/ISDOpcodes.h"
29#include "llvm/CodeGen/MachineBasicBlock.h"
30#include "llvm/CodeGen/MachineConstantPool.h"
31#include "llvm/CodeGen/MachineFrameInfo.h"
32#include "llvm/CodeGen/MachineFunction.h"
33#include "llvm/CodeGen/MachineMemOperand.h"
34#include "llvm/CodeGen/RuntimeLibcalls.h"
35#include "llvm/CodeGen/SelectionDAGAddressAnalysis.h"
36#include "llvm/CodeGen/SelectionDAGNodes.h"
37#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
38#include "llvm/CodeGen/TargetLowering.h"
39#include "llvm/CodeGen/TargetRegisterInfo.h"
40#include "llvm/CodeGen/TargetSubtargetInfo.h"
41#include "llvm/CodeGen/ValueTypes.h"
42#include "llvm/IR/Constant.h"
43#include "llvm/IR/Constants.h"
44#include "llvm/IR/DataLayout.h"
45#include "llvm/IR/DebugInfoMetadata.h"
46#include "llvm/IR/DebugLoc.h"
47#include "llvm/IR/DerivedTypes.h"
48#include "llvm/IR/Function.h"
49#include "llvm/IR/GlobalValue.h"
50#include "llvm/IR/Metadata.h"
51#include "llvm/IR/Type.h"
52#include "llvm/IR/Value.h"
53#include "llvm/Support/Casting.h"
54#include "llvm/Support/CodeGen.h"
55#include "llvm/Support/Compiler.h"
56#include "llvm/Support/Debug.h"
57#include "llvm/Support/ErrorHandling.h"
58#include "llvm/Support/KnownBits.h"
59#include "llvm/Support/MachineValueType.h"
60#include "llvm/Support/ManagedStatic.h"
61#include "llvm/Support/MathExtras.h"
62#include "llvm/Support/Mutex.h"
63#include "llvm/Support/raw_ostream.h"
64#include "llvm/Target/TargetMachine.h"
65#include "llvm/Target/TargetOptions.h"
66#include <algorithm>
67#include <cassert>
68#include <cstdint>
69#include <cstdlib>
70#include <limits>
71#include <set>
72#include <string>
73#include <utility>
74#include <vector>

76using namespace llvm;

78/// makeVTList - Return an instance of the SDVTList struct initialized with the
79/// specified members.
80static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
SDVTList Res = {VTs, NumVTs};
return Res;
83}

85// Default null implementations of the callbacks.
86void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
87void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
88void SelectionDAG::DAGUpdateListener::NodeInserted(SDNode *) {}

90void SelectionDAG::DAGNodeDeletedListener::anchor() {}

92#define DEBUG_TYPE"selectiondag" "selectiondag"

94static cl::opt<bool> EnableMemCpyDAGOpt("enable-memcpy-dag-opt",
     cl::Hidden, cl::init(true),
     cl::desc("Gang up loads and stores generated by inlining of memcpy"));

98static cl::opt<int> MaxLdStGlue("ldstmemcpy-glue-max",
     cl::desc("Number limit for gluing ld/st of memcpy."),
     cl::Hidden, cl::init(0));

102static void NewSDValueDbgMsg(SDValue V, StringRef Msg, SelectionDAG *G) {
LLVM_DEBUG(dbgs() << Msg; V.getNode()->dump(G);)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("selectiondag")) { dbgs() << Msg; V.getNode()->dump
(G);; } } while (false);
104}

106//===----------------------------------------------------------------------===//
107//                              ConstantFPSDNode Class
108//===----------------------------------------------------------------------===//

110/// isExactlyValue - We don't rely on operator== working on double values, as
111/// it returns true for things that are clearly not equal, like -0.0 and 0.0.
112/// As such, this method can be used to do an exact bit-for-bit comparison of
113/// two floating point values.
114bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
return getValueAPF().bitwiseIsEqual(V);
116}

118bool ConstantFPSDNode::isValueValidForType(EVT VT,
                                         const APFloat& Val) {
assert(VT.isFloatingPoint() && "Can only convert between FP types")((VT.isFloatingPoint() && "Can only convert between FP types"
) ? static_cast<void> (0) : __assert_fail ("VT.isFloatingPoint() && \"Can only convert between FP types\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 120, __PRETTY_FUNCTION__));

// convert modifies in place, so make a copy.
APFloat Val2 = APFloat(Val);
bool losesInfo;
(void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
                    APFloat::rmNearestTiesToEven,
                    &losesInfo);
return !losesInfo;
129}

131//===----------------------------------------------------------------------===//
132//                              ISD Namespace
133//===----------------------------------------------------------------------===//

135bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) {
auto *BV = dyn_cast<BuildVectorSDNode>(N);
if (!BV)
  return false;

APInt SplatUndef;
unsigned SplatBitSize;
bool HasUndefs;
unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
return BV->isConstantSplat(SplatVal, SplatUndef, SplatBitSize, HasUndefs,
                           EltSize) &&
       EltSize == SplatBitSize;
147}

149// FIXME: AllOnes and AllZeros duplicate a lot of code. Could these be
150// specializations of the more general isConstantSplatVector()?

152bool ISD::isBuildVectorAllOnes(const SDNode *N) {
// Look through a bit convert.
while (N->getOpcode() == ISD::BITCAST)
  N = N->getOperand(0).getNode();

if (N->getOpcode() != ISD::BUILD_VECTOR) return false;

unsigned i = 0, e = N->getNumOperands();

// Skip over all of the undef values.
while (i != e && N->getOperand(i).isUndef())
  ++i;

// Do not accept an all-undef vector.
if (i == e) return false;

// Do not accept build_vectors that aren't all constants or which have non-~0
// elements. We have to be a bit careful here, as the type of the constant
// may not be the same as the type of the vector elements due to type
// legalization (the elements are promoted to a legal type for the target and
// a vector of a type may be legal when the base element type is not).
// We only want to check enough bits to cover the vector elements, because
// we care if the resultant vector is all ones, not whether the individual
// constants are.
SDValue NotZero = N->getOperand(i);
unsigned EltSize = N->getValueType(0).getScalarSizeInBits();
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
  if (CN->getAPIntValue().countTrailingOnes() < EltSize)
    return false;
} else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
  if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
    return false;
} else
  return false;

// Okay, we have at least one ~0 value, check to see if the rest match or are
// undefs. Even with the above element type twiddling, this should be OK, as
// the same type legalization should have applied to all the elements.
for (++i; i != e; ++i)
  if (N->getOperand(i) != NotZero && !N->getOperand(i).isUndef())
    return false;
return true;
194}

196bool ISD::isBuildVectorAllZeros(const SDNode *N) {
// Look through a bit convert.
while (N->getOpcode() == ISD::BITCAST)
  N = N->getOperand(0).getNode();

if (N->getOpcode() != ISD::BUILD_VECTOR) return false;

bool IsAllUndef = true;
for (const SDValue &Op : N->op_values()) {
  if (Op.isUndef())
    continue;
  IsAllUndef = false;
  // Do not accept build_vectors that aren't all constants or which have non-0
  // elements. We have to be a bit careful here, as the type of the constant
  // may not be the same as the type of the vector elements due to type
  // legalization (the elements are promoted to a legal type for the target
  // and a vector of a type may be legal when the base element type is not).
  // We only want to check enough bits to cover the vector elements, because
  // we care if the resultant vector is all zeros, not whether the individual
  // constants are.
  unsigned EltSize = N->getValueType(0).getScalarSizeInBits();
  if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op)) {
    if (CN->getAPIntValue().countTrailingZeros() < EltSize)
      return false;
  } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Op)) {
    if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
      return false;
  } else
    return false;
}

// Do not accept an all-undef vector.
if (IsAllUndef)
  return false;
return true;
231}

233bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
if (N->getOpcode() != ISD::BUILD_VECTOR)
  return false;

for (const SDValue &Op : N->op_values()) {
  if (Op.isUndef())
    continue;
  if (!isa<ConstantSDNode>(Op))
    return false;
}
return true;
244}

246bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
if (N->getOpcode() != ISD::BUILD_VECTOR)
  return false;

for (const SDValue &Op : N->op_values()) {
  if (Op.isUndef())
    continue;
  if (!isa<ConstantFPSDNode>(Op))
    return false;
}
return true;
257}

259bool ISD::allOperandsUndef(const SDNode *N) {
// Return false if the node has no operands.
// This is "logically inconsistent" with the definition of "all" but
// is probably the desired behavior.
if (N->getNumOperands() == 0)
  return false;
return all_of(N->op_values(), [](SDValue Op) { return Op.isUndef(); });
266}

268bool ISD::matchUnaryPredicate(SDValue Op,
                            std::function<bool(ConstantSDNode *)> Match,
                            bool AllowUndefs) {
// FIXME: Add support for scalar UNDEF cases?
if (auto *Cst = dyn_cast<ConstantSDNode>(Op))
  return Match(Cst);

// FIXME: Add support for vector UNDEF cases?
if (ISD::BUILD_VECTOR != Op.getOpcode())
  return false;

EVT SVT = Op.getValueType().getScalarType();
for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
  if (AllowUndefs && Op.getOperand(i).isUndef()) {
    if (!Match(nullptr))
      return false;
    continue;
  }

  auto *Cst = dyn_cast<ConstantSDNode>(Op.getOperand(i));
  if (!Cst || Cst->getValueType(0) != SVT || !Match(Cst))
    return false;
}
return true;
292}

294bool ISD::matchBinaryPredicate(
  SDValue LHS, SDValue RHS,
  std::function<bool(ConstantSDNode *, ConstantSDNode *)> Match,
  bool AllowUndefs, bool AllowTypeMismatch) {
if (!AllowTypeMismatch && LHS.getValueType() != RHS.getValueType())
1
Assuming 'AllowTypeMismatch' is true→
2
←
Taking false branch→
  return false;

// TODO: Add support for scalar UNDEF cases?
if (auto *LHSCst = dyn_cast<ConstantSDNode>(LHS))
3
←
Calling 'dyn_cast<llvm::ConstantSDNode, llvm::SDValue>'→
18
←
Returning from 'dyn_cast<llvm::ConstantSDNode, llvm::SDValue>'→
19
←
Assuming 'LHSCst' is null→
20
←
Taking false branch→
  if (auto *RHSCst = dyn_cast<ConstantSDNode>(RHS))
    return Match(LHSCst, RHSCst);

// TODO: Add support for vector UNDEF cases?
if (ISD::BUILD_VECTOR != LHS.getOpcode() ||
21
←
Calling 'SDValue::getOpcode'→
    ISD::BUILD_VECTOR != RHS.getOpcode())
  return false;

EVT SVT = LHS.getValueType().getScalarType();
for (unsigned i = 0, e = LHS.getNumOperands(); i != e; ++i) {
  SDValue LHSOp = LHS.getOperand(i);
  SDValue RHSOp = RHS.getOperand(i);
  bool LHSUndef = AllowUndefs && LHSOp.isUndef();
  bool RHSUndef = AllowUndefs && RHSOp.isUndef();
  auto *LHSCst = dyn_cast<ConstantSDNode>(LHSOp);
  auto *RHSCst = dyn_cast<ConstantSDNode>(RHSOp);
  if ((!LHSCst && !LHSUndef) || (!RHSCst && !RHSUndef))
    return false;
  if (!AllowTypeMismatch && (LHSOp.getValueType() != SVT ||
                             LHSOp.getValueType() != RHSOp.getValueType()))
    return false;
  if (!Match(LHSCst, RHSCst))
    return false;
}
return true;
328}

330ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
switch (ExtType) {
case ISD::EXTLOAD:
  return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
case ISD::SEXTLOAD:
  return ISD::SIGN_EXTEND;
case ISD::ZEXTLOAD:
  return ISD::ZERO_EXTEND;
default:
  break;
}

llvm_unreachable("Invalid LoadExtType")::llvm::llvm_unreachable_internal("Invalid LoadExtType", "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 342);
343}

345ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
// To perform this operation, we just need to swap the L and G bits of the
// operation.
unsigned OldL = (Operation >> 2) & 1;
unsigned OldG = (Operation >> 1) & 1;
return ISD::CondCode((Operation & ~6) |  // Keep the N, U, E bits
                     (OldL << 1) |       // New G bit
                     (OldG << 2));       // New L bit.
353}

355ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
unsigned Operation = Op;
if (isInteger)
  Operation ^= 7;   // Flip L, G, E bits, but not U.
else
  Operation ^= 15;  // Flip all of the condition bits.

if (Operation > ISD::SETTRUE2)
  Operation &= ~8;  // Don't let N and U bits get set.

return ISD::CondCode(Operation);
366}

368/// For an integer comparison, return 1 if the comparison is a signed operation
369/// and 2 if the result is an unsigned comparison. Return zero if the operation
370/// does not depend on the sign of the input (setne and seteq).
371static int isSignedOp(ISD::CondCode Opcode) {
switch (Opcode) {
default: llvm_unreachable("Illegal integer setcc operation!")::llvm::llvm_unreachable_internal("Illegal integer setcc operation!"
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 373);
case ISD::SETEQ:
case ISD::SETNE: return 0;
case ISD::SETLT:
case ISD::SETLE:
case ISD::SETGT:
case ISD::SETGE: return 1;
case ISD::SETULT:
case ISD::SETULE:
case ISD::SETUGT:
case ISD::SETUGE: return 2;
}
385}

387ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
                                     bool IsInteger) {
if (IsInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
  // Cannot fold a signed integer setcc with an unsigned integer setcc.
  return ISD::SETCC_INVALID;

unsigned Op = Op1 | Op2;  // Combine all of the condition bits.

// If the N and U bits get set, then the resultant comparison DOES suddenly
// care about orderedness, and it is true when ordered.
if (Op > ISD::SETTRUE2)
  Op &= ~16;     // Clear the U bit if the N bit is set.

// Canonicalize illegal integer setcc's.
if (IsInteger && Op == ISD::SETUNE)  // e.g. SETUGT | SETULT
  Op = ISD::SETNE;

return ISD::CondCode(Op);
405}

407ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
                                      bool IsInteger) {
if (IsInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
  // Cannot fold a signed setcc with an unsigned setcc.
  return ISD::SETCC_INVALID;

// Combine all of the condition bits.
ISD::CondCode Result = ISD::CondCode(Op1 & Op2);

// Canonicalize illegal integer setcc's.
if (IsInteger) {
  switch (Result) {
  default: break;
  case ISD::SETUO : Result = ISD::SETFALSE; break;  // SETUGT & SETULT
  case ISD::SETOEQ:                                 // SETEQ  & SETU[LG]E
  case ISD::SETUEQ: Result = ISD::SETEQ   ; break;  // SETUGE & SETULE
  case ISD::SETOLT: Result = ISD::SETULT  ; break;  // SETULT & SETNE
  case ISD::SETOGT: Result = ISD::SETUGT  ; break;  // SETUGT & SETNE
  }
}

return Result;
429}

431//===----------------------------------------------------------------------===//
432//                           SDNode Profile Support
433//===----------------------------------------------------------------------===//

435/// AddNodeIDOpcode - Add the node opcode to the NodeID data.
436static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC)  {
ID.AddInteger(OpC);
438}

440/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
441/// solely with their pointer.
442static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
ID.AddPointer(VTList.VTs);
444}

446/// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
447static void AddNodeIDOperands(FoldingSetNodeID &ID,
                            ArrayRef<SDValue> Ops) {
for (auto& Op : Ops) {
  ID.AddPointer(Op.getNode());
  ID.AddInteger(Op.getResNo());
}
453}

455/// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
456static void AddNodeIDOperands(FoldingSetNodeID &ID,
                            ArrayRef<SDUse> Ops) {
for (auto& Op : Ops) {
  ID.AddPointer(Op.getNode());
  ID.AddInteger(Op.getResNo());
}
462}

464static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
                        SDVTList VTList, ArrayRef<SDValue> OpList) {
AddNodeIDOpcode(ID, OpC);
AddNodeIDValueTypes(ID, VTList);
AddNodeIDOperands(ID, OpList);
469}

471/// If this is an SDNode with special info, add this info to the NodeID data.
472static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
switch (N->getOpcode()) {
case ISD::TargetExternalSymbol:
case ISD::ExternalSymbol:
case ISD::MCSymbol:
  llvm_unreachable("Should only be used on nodes with operands")::llvm::llvm_unreachable_internal("Should only be used on nodes with operands"
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 477);
default: break;  // Normal nodes don't need extra info.
case ISD::TargetConstant:
case ISD::Constant: {
  const ConstantSDNode *C = cast<ConstantSDNode>(N);
  ID.AddPointer(C->getConstantIntValue());
  ID.AddBoolean(C->isOpaque());
  break;
}
case ISD::TargetConstantFP:
case ISD::ConstantFP:
  ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
  break;
case ISD::TargetGlobalAddress:
case ISD::GlobalAddress:
case ISD::TargetGlobalTLSAddress:
case ISD::GlobalTLSAddress: {
  const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
  ID.AddPointer(GA->getGlobal());
  ID.AddInteger(GA->getOffset());
  ID.AddInteger(GA->getTargetFlags());
  break;
}
case ISD::BasicBlock:
  ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
  break;
case ISD::Register:
  ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
  break;
case ISD::RegisterMask:
  ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
  break;
case ISD::SRCVALUE:
  ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
  break;
case ISD::FrameIndex:
case ISD::TargetFrameIndex:
  ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
  break;
case ISD::LIFETIME_START:
case ISD::LIFETIME_END:
  if (cast<LifetimeSDNode>(N)->hasOffset()) {
    ID.AddInteger(cast<LifetimeSDNode>(N)->getSize());
    ID.AddInteger(cast<LifetimeSDNode>(N)->getOffset());
  }
  break;
case ISD::JumpTable:
case ISD::TargetJumpTable:
  ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
  ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
  break;
case ISD::ConstantPool:
case ISD::TargetConstantPool: {
  const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
  ID.AddInteger(CP->getAlignment());
  ID.AddInteger(CP->getOffset());
  if (CP->isMachineConstantPoolEntry())
    CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
  else
    ID.AddPointer(CP->getConstVal());
  ID.AddInteger(CP->getTargetFlags());
  break;
}
case ISD::TargetIndex: {
  const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
  ID.AddInteger(TI->getIndex());
  ID.AddInteger(TI->getOffset());
  ID.AddInteger(TI->getTargetFlags());
  break;
}
case ISD::LOAD: {
  const LoadSDNode *LD = cast<LoadSDNode>(N);
  ID.AddInteger(LD->getMemoryVT().getRawBits());
  ID.AddInteger(LD->getRawSubclassData());
  ID.AddInteger(LD->getPointerInfo().getAddrSpace());
  break;
}
case ISD::STORE: {
  const StoreSDNode *ST = cast<StoreSDNode>(N);
  ID.AddInteger(ST->getMemoryVT().getRawBits());
  ID.AddInteger(ST->getRawSubclassData());
  ID.AddInteger(ST->getPointerInfo().getAddrSpace());
  break;
}
case ISD::MLOAD: {
  const MaskedLoadSDNode *MLD = cast<MaskedLoadSDNode>(N);
  ID.AddInteger(MLD->getMemoryVT().getRawBits());
  ID.AddInteger(MLD->getRawSubclassData());
  ID.AddInteger(MLD->getPointerInfo().getAddrSpace());
  break;
}
case ISD::MSTORE: {
  const MaskedStoreSDNode *MST = cast<MaskedStoreSDNode>(N);
  ID.AddInteger(MST->getMemoryVT().getRawBits());
  ID.AddInteger(MST->getRawSubclassData());
  ID.AddInteger(MST->getPointerInfo().getAddrSpace());
  break;
}
case ISD::MGATHER: {
  const MaskedGatherSDNode *MG = cast<MaskedGatherSDNode>(N);
  ID.AddInteger(MG->getMemoryVT().getRawBits());
  ID.AddInteger(MG->getRawSubclassData());
  ID.AddInteger(MG->getPointerInfo().getAddrSpace());
  break;
}
case ISD::MSCATTER: {
  const MaskedScatterSDNode *MS = cast<MaskedScatterSDNode>(N);
  ID.AddInteger(MS->getMemoryVT().getRawBits());
  ID.AddInteger(MS->getRawSubclassData());
  ID.AddInteger(MS->getPointerInfo().getAddrSpace());
  break;
}
case ISD::ATOMIC_CMP_SWAP:
case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
case ISD::ATOMIC_SWAP:
case ISD::ATOMIC_LOAD_ADD:
case ISD::ATOMIC_LOAD_SUB:
case ISD::ATOMIC_LOAD_AND:
case ISD::ATOMIC_LOAD_CLR:
case ISD::ATOMIC_LOAD_OR:
case ISD::ATOMIC_LOAD_XOR:
case ISD::ATOMIC_LOAD_NAND:
case ISD::ATOMIC_LOAD_MIN:
case ISD::ATOMIC_LOAD_MAX:
case ISD::ATOMIC_LOAD_UMIN:
case ISD::ATOMIC_LOAD_UMAX:
case ISD::ATOMIC_LOAD:
case ISD::ATOMIC_STORE: {
  const AtomicSDNode *AT = cast<AtomicSDNode>(N);
  ID.AddInteger(AT->getMemoryVT().getRawBits());
  ID.AddInteger(AT->getRawSubclassData());
  ID.AddInteger(AT->getPointerInfo().getAddrSpace());
  break;
}
case ISD::PREFETCH: {
  const MemSDNode *PF = cast<MemSDNode>(N);
  ID.AddInteger(PF->getPointerInfo().getAddrSpace());
  break;
}
case ISD::VECTOR_SHUFFLE: {
  const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
  for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
       i != e; ++i)
    ID.AddInteger(SVN->getMaskElt(i));
  break;
}
case ISD::TargetBlockAddress:
case ISD::BlockAddress: {
  const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
  ID.AddPointer(BA->getBlockAddress());
  ID.AddInteger(BA->getOffset());
  ID.AddInteger(BA->getTargetFlags());
  break;
}
} // end switch (N->getOpcode())

// Target specific memory nodes could also have address spaces to check.
if (N->isTargetMemoryOpcode())
  ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
636}

638/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
639/// data.
640static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
AddNodeIDOpcode(ID, N->getOpcode());
// Add the return value info.
AddNodeIDValueTypes(ID, N->getVTList());
// Add the operand info.
AddNodeIDOperands(ID, N->ops());

// Handle SDNode leafs with special info.
AddNodeIDCustom(ID, N);
649}

651//===----------------------------------------------------------------------===//
652//                              SelectionDAG Class
653//===----------------------------------------------------------------------===//

655/// doNotCSE - Return true if CSE should not be performed for this node.
656static bool doNotCSE(SDNode *N) {
if (N->getValueType(0) == MVT::Glue)
  return true; // Never CSE anything that produces a flag.

switch (N->getOpcode()) {
default: break;
case ISD::HANDLENODE:
case ISD::EH_LABEL:
  return true;   // Never CSE these nodes.
}

// Check that remaining values produced are not flags.
for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
  if (N->getValueType(i) == MVT::Glue)
    return true; // Never CSE anything that produces a flag.

return false;
673}

675/// RemoveDeadNodes - This method deletes all unreachable nodes in the
676/// SelectionDAG.
677void SelectionDAG::RemoveDeadNodes() {
// Create a dummy node (which is not added to allnodes), that adds a reference
// to the root node, preventing it from being deleted.
HandleSDNode Dummy(getRoot());

SmallVector<SDNode*, 128> DeadNodes;

// Add all obviously-dead nodes to the DeadNodes worklist.
for (SDNode &Node : allnodes())
  if (Node.use_empty())
    DeadNodes.push_back(&Node);

RemoveDeadNodes(DeadNodes);

// If the root changed (e.g. it was a dead load, update the root).
setRoot(Dummy.getValue());
693}

695/// RemoveDeadNodes - This method deletes the unreachable nodes in the
696/// given list, and any nodes that become unreachable as a result.
697void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {

// Process the worklist, deleting the nodes and adding their uses to the
// worklist.
while (!DeadNodes.empty()) {
  SDNode *N = DeadNodes.pop_back_val();
  // Skip to next node if we've already managed to delete the node. This could
  // happen if replacing a node causes a node previously added to the node to
  // be deleted.
  if (N->getOpcode() == ISD::DELETED_NODE)
    continue;

  for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
    DUL->NodeDeleted(N, nullptr);

  // Take the node out of the appropriate CSE map.
  RemoveNodeFromCSEMaps(N);

  // Next, brutally remove the operand list.  This is safe to do, as there are
  // no cycles in the graph.
  for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
    SDUse &Use = *I++;
    SDNode *Operand = Use.getNode();
    Use.set(SDValue());

    // Now that we removed this operand, see if there are no uses of it left.
    if (Operand->use_empty())
      DeadNodes.push_back(Operand);
  }

  DeallocateNode(N);
}
729}

731void SelectionDAG::RemoveDeadNode(SDNode *N){
SmallVector<SDNode*, 16> DeadNodes(1, N);

// Create a dummy node that adds a reference to the root node, preventing
// it from being deleted.  (This matters if the root is an operand of the
// dead node.)
HandleSDNode Dummy(getRoot());

RemoveDeadNodes(DeadNodes);
740}

742void SelectionDAG::DeleteNode(SDNode *N) {
// First take this out of the appropriate CSE map.
RemoveNodeFromCSEMaps(N);

// Finally, remove uses due to operands of this node, remove from the
// AllNodes list, and delete the node.
DeleteNodeNotInCSEMaps(N);
749}

751void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
assert(N->getIterator() != AllNodes.begin() &&((N->getIterator() != AllNodes.begin() && "Cannot delete the entry node!"
) ? static_cast<void> (0) : __assert_fail ("N->getIterator() != AllNodes.begin() && \"Cannot delete the entry node!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 753, __PRETTY_FUNCTION__))
       "Cannot delete the entry node!")((N->getIterator() != AllNodes.begin() && "Cannot delete the entry node!"
) ? static_cast<void> (0) : __assert_fail ("N->getIterator() != AllNodes.begin() && \"Cannot delete the entry node!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 753, __PRETTY_FUNCTION__));
assert(N->use_empty() && "Cannot delete a node that is not dead!")((N->use_empty() && "Cannot delete a node that is not dead!"
) ? static_cast<void> (0) : __assert_fail ("N->use_empty() && \"Cannot delete a node that is not dead!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 754, __PRETTY_FUNCTION__));

// Drop all of the operands and decrement used node's use counts.
N->DropOperands();

DeallocateNode(N);
760}

762void SDDbgInfo::erase(const SDNode *Node) {
DbgValMapType::iterator I = DbgValMap.find(Node);
if (I == DbgValMap.end())
  return;
for (auto &Val: I->second)
  Val->setIsInvalidated();
DbgValMap.erase(I);
769}

771void SelectionDAG::DeallocateNode(SDNode *N) {
// If we have operands, deallocate them.
removeOperands(N);

NodeAllocator.Deallocate(AllNodes.remove(N));

// Set the opcode to DELETED_NODE to help catch bugs when node
// memory is reallocated.
// FIXME: There are places in SDag that have grown a dependency on the opcode
// value in the released node.
__asan_unpoison_memory_region(&N->NodeType, sizeof(N->NodeType));
N->NodeType = ISD::DELETED_NODE;

// If any of the SDDbgValue nodes refer to this SDNode, invalidate
// them and forget about that node.
DbgInfo->erase(N);
787}

789#ifndef NDEBUG
790/// VerifySDNode - Sanity check the given SDNode.  Aborts if it is invalid.
791static void VerifySDNode(SDNode *N) {
switch (N->getOpcode()) {
default:
  break;
case ISD::BUILD_PAIR: {
  EVT VT = N->getValueType(0);
  assert(N->getNumValues() == 1 && "Too many results!")((N->getNumValues() == 1 && "Too many results!") ?
 static_cast<void> (0) : __assert_fail ("N->getNumValues() == 1 && \"Too many results!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 797, __PRETTY_FUNCTION__));
  assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&((!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint
()) && "Wrong return type!") ? static_cast<void>
 (0) : __assert_fail ("!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && \"Wrong return type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 799, __PRETTY_FUNCTION__))
         "Wrong return type!")((!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint
()) && "Wrong return type!") ? static_cast<void>
 (0) : __assert_fail ("!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && \"Wrong return type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 799, __PRETTY_FUNCTION__));
  assert(N->getNumOperands() == 2 && "Wrong number of operands!")((N->getNumOperands() == 2 && "Wrong number of operands!"
) ? static_cast<void> (0) : __assert_fail ("N->getNumOperands() == 2 && \"Wrong number of operands!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 800, __PRETTY_FUNCTION__));
  assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&((N->getOperand(0).getValueType() == N->getOperand(1).getValueType
() && "Mismatched operand types!") ? static_cast<void
> (0) : __assert_fail ("N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && \"Mismatched operand types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 802, __PRETTY_FUNCTION__))
         "Mismatched operand types!")((N->getOperand(0).getValueType() == N->getOperand(1).getValueType
() && "Mismatched operand types!") ? static_cast<void
> (0) : __assert_fail ("N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && \"Mismatched operand types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 802, __PRETTY_FUNCTION__));
  assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&((N->getOperand(0).getValueType().isInteger() == VT.isInteger
() && "Wrong operand type!") ? static_cast<void>
 (0) : __assert_fail ("N->getOperand(0).getValueType().isInteger() == VT.isInteger() && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 804, __PRETTY_FUNCTION__))
         "Wrong operand type!")((N->getOperand(0).getValueType().isInteger() == VT.isInteger
() && "Wrong operand type!") ? static_cast<void>
 (0) : __assert_fail ("N->getOperand(0).getValueType().isInteger() == VT.isInteger() && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 804, __PRETTY_FUNCTION__));
  assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&((VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits
() && "Wrong return type size") ? static_cast<void
> (0) : __assert_fail ("VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && \"Wrong return type size\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 806, __PRETTY_FUNCTION__))
         "Wrong return type size")((VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits
() && "Wrong return type size") ? static_cast<void
> (0) : __assert_fail ("VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && \"Wrong return type size\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 806, __PRETTY_FUNCTION__));
  break;
}
case ISD::BUILD_VECTOR: {
  assert(N->getNumValues() == 1 && "Too many results!")((N->getNumValues() == 1 && "Too many results!") ?
 static_cast<void> (0) : __assert_fail ("N->getNumValues() == 1 && \"Too many results!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 810, __PRETTY_FUNCTION__));
  assert(N->getValueType(0).isVector() && "Wrong return type!")((N->getValueType(0).isVector() && "Wrong return type!"
) ? static_cast<void> (0) : __assert_fail ("N->getValueType(0).isVector() && \"Wrong return type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 811, __PRETTY_FUNCTION__));
  assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&((N->getNumOperands() == N->getValueType(0).getVectorNumElements
() && "Wrong number of operands!") ? static_cast<void
> (0) : __assert_fail ("N->getNumOperands() == N->getValueType(0).getVectorNumElements() && \"Wrong number of operands!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 813, __PRETTY_FUNCTION__))
         "Wrong number of operands!")((N->getNumOperands() == N->getValueType(0).getVectorNumElements
() && "Wrong number of operands!") ? static_cast<void
> (0) : __assert_fail ("N->getNumOperands() == N->getValueType(0).getVectorNumElements() && \"Wrong number of operands!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 813, __PRETTY_FUNCTION__));
  EVT EltVT = N->getValueType(0).getVectorElementType();
  for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
    assert((I->getValueType() == EltVT ||(((I->getValueType() == EltVT || (EltVT.isInteger() &&
 I->getValueType().isInteger() && EltVT.bitsLE(I->
getValueType()))) && "Wrong operand type!") ? static_cast
<void> (0) : __assert_fail ("(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 819, __PRETTY_FUNCTION__))
           (EltVT.isInteger() && I->getValueType().isInteger() &&(((I->getValueType() == EltVT || (EltVT.isInteger() &&
 I->getValueType().isInteger() && EltVT.bitsLE(I->
getValueType()))) && "Wrong operand type!") ? static_cast
<void> (0) : __assert_fail ("(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 819, __PRETTY_FUNCTION__))
            EltVT.bitsLE(I->getValueType()))) &&(((I->getValueType() == EltVT || (EltVT.isInteger() &&
 I->getValueType().isInteger() && EltVT.bitsLE(I->
getValueType()))) && "Wrong operand type!") ? static_cast
<void> (0) : __assert_fail ("(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 819, __PRETTY_FUNCTION__))
          "Wrong operand type!")(((I->getValueType() == EltVT || (EltVT.isInteger() &&
 I->getValueType().isInteger() && EltVT.bitsLE(I->
getValueType()))) && "Wrong operand type!") ? static_cast
<void> (0) : __assert_fail ("(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 819, __PRETTY_FUNCTION__));
    assert(I->getValueType() == N->getOperand(0).getValueType() &&((I->getValueType() == N->getOperand(0).getValueType() &&
 "Operands must all have the same type") ? static_cast<void
> (0) : __assert_fail ("I->getValueType() == N->getOperand(0).getValueType() && \"Operands must all have the same type\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 821, __PRETTY_FUNCTION__))
           "Operands must all have the same type")((I->getValueType() == N->getOperand(0).getValueType() &&
 "Operands must all have the same type") ? static_cast<void
> (0) : __assert_fail ("I->getValueType() == N->getOperand(0).getValueType() && \"Operands must all have the same type\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 821, __PRETTY_FUNCTION__));
  }
  break;
}
}
826}
827#endif // NDEBUG

829/// Insert a newly allocated node into the DAG.
830///
831/// Handles insertion into the all nodes list and CSE map, as well as
832/// verification and other common operations when a new node is allocated.
833void SelectionDAG::InsertNode(SDNode *N) {
AllNodes.push_back(N);
835#ifndef NDEBUG
N->PersistentId = NextPersistentId++;
VerifySDNode(N);
838#endif
for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
  DUL->NodeInserted(N);
841}

843/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
844/// correspond to it.  This is useful when we're about to delete or repurpose
845/// the node.  We don't want future request for structurally identical nodes
846/// to return N anymore.
847bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
bool Erased = false;
switch (N->getOpcode()) {
case ISD::HANDLENODE: return false;  // noop.
case ISD::CONDCODE:
  assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&((CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
 "Cond code doesn't exist!") ? static_cast<void> (0) : __assert_fail
 ("CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && \"Cond code doesn't exist!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 853, __PRETTY_FUNCTION__))
         "Cond code doesn't exist!")((CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
 "Cond code doesn't exist!") ? static_cast<void> (0) : __assert_fail
 ("CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && \"Cond code doesn't exist!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 853, __PRETTY_FUNCTION__));
  Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
  CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
  break;
case ISD::ExternalSymbol:
  Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
  break;
case ISD::TargetExternalSymbol: {
  ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
  Erased = TargetExternalSymbols.erase(std::pair<std::string, unsigned>(
      ESN->getSymbol(), ESN->getTargetFlags()));
  break;
}
case ISD::MCSymbol: {
  auto *MCSN = cast<MCSymbolSDNode>(N);
  Erased = MCSymbols.erase(MCSN->getMCSymbol());
  break;
}
case ISD::VALUETYPE: {
  EVT VT = cast<VTSDNode>(N)->getVT();
  if (VT.isExtended()) {
    Erased = ExtendedValueTypeNodes.erase(VT);
  } else {
    Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
    ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
  }
  break;
}
default:
  // Remove it from the CSE Map.
  assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!")((N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"
) ? static_cast<void> (0) : __assert_fail ("N->getOpcode() != ISD::DELETED_NODE && \"DELETED_NODE in CSEMap!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 883, __PRETTY_FUNCTION__));
  assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!")((N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"
) ? static_cast<void> (0) : __assert_fail ("N->getOpcode() != ISD::EntryToken && \"EntryToken in CSEMap!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 884, __PRETTY_FUNCTION__));
  Erased = CSEMap.RemoveNode(N);
  break;
}
888#ifndef NDEBUG
// Verify that the node was actually in one of the CSE maps, unless it has a
// flag result (which cannot be CSE'd) or is one of the special cases that are
// not subject to CSE.
if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
    !N->isMachineOpcode() && !doNotCSE(N)) {
  N->dump(this);
  dbgs() << "\n";
  llvm_unreachable("Node is not in map!")::llvm::llvm_unreachable_internal("Node is not in map!", "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 896);
}
898#endif
return Erased;
900}

902/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
903/// maps and modified in place. Add it back to the CSE maps, unless an identical
904/// node already exists, in which case transfer all its users to the existing
905/// node. This transfer can potentially trigger recursive merging.
906void
907SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
// For node types that aren't CSE'd, just act as if no identical node
// already exists.
if (!doNotCSE(N)) {
  SDNode *Existing = CSEMap.GetOrInsertNode(N);
  if (Existing != N) {
    // If there was already an existing matching node, use ReplaceAllUsesWith
    // to replace the dead one with the existing one.  This can cause
    // recursive merging of other unrelated nodes down the line.
    ReplaceAllUsesWith(N, Existing);

    // N is now dead. Inform the listeners and delete it.
    for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
      DUL->NodeDeleted(N, Existing);
    DeleteNodeNotInCSEMaps(N);
    return;
  }
}

// If the node doesn't already exist, we updated it.  Inform listeners.
for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
  DUL->NodeUpdated(N);
929}

931/// FindModifiedNodeSlot - Find a slot for the specified node if its operands
932/// were replaced with those specified.  If this node is never memoized,
933/// return null, otherwise return a pointer to the slot it would take.  If a
934/// node already exists with these operands, the slot will be non-null.
935SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
                                         void *&InsertPos) {
if (doNotCSE(N))
  return nullptr;

SDValue Ops[] = { Op };
FoldingSetNodeID ID;
AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
AddNodeIDCustom(ID, N);
SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
if (Node)
  Node->intersectFlagsWith(N->getFlags());
return Node;
948}

950/// FindModifiedNodeSlot - Find a slot for the specified node if its operands
951/// were replaced with those specified.  If this node is never memoized,
952/// return null, otherwise return a pointer to the slot it would take.  If a
953/// node already exists with these operands, the slot will be non-null.
954SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
                                         SDValue Op1, SDValue Op2,
                                         void *&InsertPos) {
if (doNotCSE(N))
  return nullptr;

SDValue Ops[] = { Op1, Op2 };
FoldingSetNodeID ID;
AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
AddNodeIDCustom(ID, N);
SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
if (Node)
  Node->intersectFlagsWith(N->getFlags());
return Node;
968}

970/// FindModifiedNodeSlot - Find a slot for the specified node if its operands
971/// were replaced with those specified.  If this node is never memoized,
972/// return null, otherwise return a pointer to the slot it would take.  If a
973/// node already exists with these operands, the slot will be non-null.
974SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
                                         void *&InsertPos) {
if (doNotCSE(N))
  return nullptr;

FoldingSetNodeID ID;
AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
AddNodeIDCustom(ID, N);
SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
if (Node)
  Node->intersectFlagsWith(N->getFlags());
return Node;
986}

988unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
Type *Ty = VT == MVT::iPTR ?
                 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
                 VT.getTypeForEVT(*getContext());

return getDataLayout().getABITypeAlignment(Ty);
994}

996// EntryNode could meaningfully have debug info if we can find it...
997SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
  : TM(tm), OptLevel(OL),
    EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
    Root(getEntryNode()) {
InsertNode(&EntryNode);
DbgInfo = new SDDbgInfo();
1003}

1005void SelectionDAG::init(MachineFunction &NewMF,
                      OptimizationRemarkEmitter &NewORE,
                      Pass *PassPtr, const TargetLibraryInfo *LibraryInfo,
                      LegacyDivergenceAnalysis * Divergence) {
MF = &NewMF;
SDAGISelPass = PassPtr;
ORE = &NewORE;
TLI = getSubtarget().getTargetLowering();
TSI = getSubtarget().getSelectionDAGInfo();
LibInfo = LibraryInfo;
Context = &MF->getFunction().getContext();
DA = Divergence;
1017}

1019SelectionDAG::~SelectionDAG() {
assert(!UpdateListeners && "Dangling registered DAGUpdateListeners")((!UpdateListeners && "Dangling registered DAGUpdateListeners"
) ? static_cast<void> (0) : __assert_fail ("!UpdateListeners && \"Dangling registered DAGUpdateListeners\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1020, __PRETTY_FUNCTION__));
allnodes_clear();
OperandRecycler.clear(OperandAllocator);
delete DbgInfo;
1024}

1026void SelectionDAG::allnodes_clear() {
assert(&*AllNodes.begin() == &EntryNode)((&*AllNodes.begin() == &EntryNode) ? static_cast<
void> (0) : __assert_fail ("&*AllNodes.begin() == &EntryNode"
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1027, __PRETTY_FUNCTION__));
AllNodes.remove(AllNodes.begin());
while (!AllNodes.empty())
  DeallocateNode(&AllNodes.front());
1031#ifndef NDEBUG
NextPersistentId = 0;
1033#endif
1034}

1036SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
                                        void *&InsertPos) {
SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
if (N) {
  switch (N->getOpcode()) {
  default: break;
  case ISD::Constant:
  case ISD::ConstantFP:
    llvm_unreachable("Querying for Constant and ConstantFP nodes requires "::llvm::llvm_unreachable_internal("Querying for Constant and ConstantFP nodes requires "
 "debug location.  Use another overload.", "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1045)
                     "debug location.  Use another overload.")::llvm::llvm_unreachable_internal("Querying for Constant and ConstantFP nodes requires "
 "debug location.  Use another overload.", "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1045);
  }
}
return N;
1049}

1051SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
                                        const SDLoc &DL, void *&InsertPos) {
SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
if (N) {
  switch (N->getOpcode()) {
  case ISD::Constant:
  case ISD::ConstantFP:
    // Erase debug location from the node if the node is used at several
    // different places. Do not propagate one location to all uses as it
    // will cause a worse single stepping debugging experience.
    if (N->getDebugLoc() != DL.getDebugLoc())
      N->setDebugLoc(DebugLoc());
    break;
  default:
    // When the node's point of use is located earlier in the instruction
    // sequence than its prior point of use, update its debug info to the
    // earlier location.
    if (DL.getIROrder() && DL.getIROrder() < N->getIROrder())
      N->setDebugLoc(DL.getDebugLoc());
    break;
  }
}
return N;
1074}

1076void SelectionDAG::clear() {
allnodes_clear();
OperandRecycler.clear(OperandAllocator);
OperandAllocator.Reset();
CSEMap.clear();

ExtendedValueTypeNodes.clear();
ExternalSymbols.clear();
TargetExternalSymbols.clear();
MCSymbols.clear();
SDCallSiteDbgInfo.clear();
std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
          static_cast<CondCodeSDNode*>(nullptr));
std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
          static_cast<SDNode*>(nullptr));

EntryNode.UseList = nullptr;
InsertNode(&EntryNode);
Root = getEntryNode();
DbgInfo->clear();
1096}

1098SDValue SelectionDAG::getFPExtendOrRound(SDValue Op, const SDLoc &DL, EVT VT) {
return VT.bitsGT(Op.getValueType())
           ? getNode(ISD::FP_EXTEND, DL, VT, Op)
           : getNode(ISD::FP_ROUND, DL, VT, Op, getIntPtrConstant(0, DL));
1102}

1104SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
return VT.bitsGT(Op.getValueType()) ?
  getNode(ISD::ANY_EXTEND, DL, VT, Op) :
  getNode(ISD::TRUNCATE, DL, VT, Op);
1108}

1110SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
return VT.bitsGT(Op.getValueType()) ?
  getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
  getNode(ISD::TRUNCATE, DL, VT, Op);
1114}

1116SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
return VT.bitsGT(Op.getValueType()) ?
  getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
  getNode(ISD::TRUNCATE, DL, VT, Op);
1120}

1122SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT,
                                      EVT OpVT) {
if (VT.bitsLE(Op.getValueType()))
  return getNode(ISD::TRUNCATE, SL, VT, Op);

TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1129}

1131SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT) {
assert(!VT.isVector() &&((!VT.isVector() && "getZeroExtendInReg should use the vector element type instead of "
 "the vector type!") ? static_cast<void> (0) : __assert_fail
 ("!VT.isVector() && \"getZeroExtendInReg should use the vector element type instead of \" \"the vector type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1134, __PRETTY_FUNCTION__))
       "getZeroExtendInReg should use the vector element type instead of "((!VT.isVector() && "getZeroExtendInReg should use the vector element type instead of "
 "the vector type!") ? static_cast<void> (0) : __assert_fail
 ("!VT.isVector() && \"getZeroExtendInReg should use the vector element type instead of \" \"the vector type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1134, __PRETTY_FUNCTION__))
       "the vector type!")((!VT.isVector() && "getZeroExtendInReg should use the vector element type instead of "
 "the vector type!") ? static_cast<void> (0) : __assert_fail
 ("!VT.isVector() && \"getZeroExtendInReg should use the vector element type instead of \" \"the vector type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1134, __PRETTY_FUNCTION__));
if (Op.getValueType().getScalarType() == VT) return Op;
unsigned BitWidth = Op.getScalarValueSizeInBits();
APInt Imm = APInt::getLowBitsSet(BitWidth,
                                 VT.getSizeInBits());
return getNode(ISD::AND, DL, Op.getValueType(), Op,
               getConstant(Imm, DL, Op.getValueType()));
1141}

1143SDValue SelectionDAG::getPtrExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
// Only unsigned pointer semantics are supported right now. In the future this
// might delegate to TLI to check pointer signedness.
return getZExtOrTrunc(Op, DL, VT);
1147}

1149SDValue SelectionDAG::getPtrExtendInReg(SDValue Op, const SDLoc &DL, EVT VT) {
// Only unsigned pointer semantics are supported right now. In the future this
// might delegate to TLI to check pointer signedness.
return getZeroExtendInReg(Op, DL, VT);
1153}

1155/// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1156SDValue SelectionDAG::getNOT(const SDLoc &DL, SDValue Val, EVT VT) {
EVT EltVT = VT.getScalarType();
SDValue NegOne =
  getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL, VT);
return getNode(ISD::XOR, DL, VT, Val, NegOne);
1161}

1163SDValue SelectionDAG::getLogicalNOT(const SDLoc &DL, SDValue Val, EVT VT) {
SDValue TrueValue = getBoolConstant(true, DL, VT, VT);
return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1166}

1168SDValue SelectionDAG::getBoolConstant(bool V, const SDLoc &DL, EVT VT,
                                    EVT OpVT) {
if (!V)
  return getConstant(0, DL, VT);

switch (TLI->getBooleanContents(OpVT)) {
case TargetLowering::ZeroOrOneBooleanContent:
case TargetLowering::UndefinedBooleanContent:
  return getConstant(1, DL, VT);
case TargetLowering::ZeroOrNegativeOneBooleanContent:
  return getAllOnesConstant(DL, VT);
}
llvm_unreachable("Unexpected boolean content enum!")::llvm::llvm_unreachable_internal("Unexpected boolean content enum!"
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1180);
1181}

1183SDValue SelectionDAG::getConstant(uint64_t Val, const SDLoc &DL, EVT VT,
                                bool isT, bool isO) {
EVT EltVT = VT.getScalarType();
assert((EltVT.getSizeInBits() >= 64 ||(((EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >>
 EltVT.getSizeInBits()) + 1 < 2) && "getConstant with a uint64_t value that doesn't fit in the type!"
) ? static_cast<void> (0) : __assert_fail ("(EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && \"getConstant with a uint64_t value that doesn't fit in the type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1188, __PRETTY_FUNCTION__))
       (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&(((EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >>
 EltVT.getSizeInBits()) + 1 < 2) && "getConstant with a uint64_t value that doesn't fit in the type!"
) ? static_cast<void> (0) : __assert_fail ("(EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && \"getConstant with a uint64_t value that doesn't fit in the type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1188, __PRETTY_FUNCTION__))
       "getConstant with a uint64_t value that doesn't fit in the type!")(((EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >>
 EltVT.getSizeInBits()) + 1 < 2) && "getConstant with a uint64_t value that doesn't fit in the type!"
) ? static_cast<void> (0) : __assert_fail ("(EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && \"getConstant with a uint64_t value that doesn't fit in the type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1188, __PRETTY_FUNCTION__));
return getConstant(APInt(EltVT.getSizeInBits(), Val), DL, VT, isT, isO);
1190}

1192SDValue SelectionDAG::getConstant(const APInt &Val, const SDLoc &DL, EVT VT,
                                bool isT, bool isO) {
return getConstant(*ConstantInt::get(*Context, Val), DL, VT, isT, isO);
1195}

1197SDValue SelectionDAG::getConstant(const ConstantInt &Val, const SDLoc &DL,
                                EVT VT, bool isT, bool isO) {
assert(VT.isInteger() && "Cannot create FP integer constant!")((VT.isInteger() && "Cannot create FP integer constant!"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && \"Cannot create FP integer constant!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1199, __PRETTY_FUNCTION__));

EVT EltVT = VT.getScalarType();
const ConstantInt *Elt = &Val;

// In some cases the vector type is legal but the element type is illegal and
// needs to be promoted, for example v8i8 on ARM.  In this case, promote the
// inserted value (the type does not need to match the vector element type).
// Any extra bits introduced will be truncated away.
if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
    TargetLowering::TypePromoteInteger) {
 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
 APInt NewVal = Elt->getValue().zextOrTrunc(EltVT.getSizeInBits());
 Elt = ConstantInt::get(*getContext(), NewVal);
}
// In other cases the element type is illegal and needs to be expanded, for
// example v2i64 on MIPS32. In this case, find the nearest legal type, split
// the value into n parts and use a vector type with n-times the elements.
// Then bitcast to the type requested.
// Legalizing constants too early makes the DAGCombiner's job harder so we
// only legalize if the DAG tells us we must produce legal types.
else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
         TLI->getTypeAction(*getContext(), EltVT) ==
         TargetLowering::TypeExpandInteger) {
  const APInt &NewVal = Elt->getValue();
  EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
  unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
  unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
  EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);

  // Check the temporary vector is the correct size. If this fails then
  // getTypeToTransformTo() probably returned a type whose size (in bits)
  // isn't a power-of-2 factor of the requested type size.
  assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits())((ViaVecVT.getSizeInBits() == VT.getSizeInBits()) ? static_cast
<void> (0) : __assert_fail ("ViaVecVT.getSizeInBits() == VT.getSizeInBits()"
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1232, __PRETTY_FUNCTION__));

  SmallVector<SDValue, 2> EltParts;
  for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
    EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
                                         .zextOrTrunc(ViaEltSizeInBits), DL,
                                   ViaEltVT, isT, isO));
  }

  // EltParts is currently in little endian order. If we actually want
  // big-endian order then reverse it now.
  if (getDataLayout().isBigEndian())
    std::reverse(EltParts.begin(), EltParts.end());

  // The elements must be reversed when the element order is different
  // to the endianness of the elements (because the BITCAST is itself a
  // vector shuffle in this situation). However, we do not need any code to
  // perform this reversal because getConstant() is producing a vector
  // splat.
  // This situation occurs in MIPS MSA.

  SmallVector<SDValue, 8> Ops;
  for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i)
    Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());

  SDValue V = getNode(ISD::BITCAST, DL, VT, getBuildVector(ViaVecVT, DL, Ops));
  return V;
}

assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&((Elt->getBitWidth() == EltVT.getSizeInBits() && "APInt size does not match type size!"
) ? static_cast<void> (0) : __assert_fail ("Elt->getBitWidth() == EltVT.getSizeInBits() && \"APInt size does not match type size!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1262, __PRETTY_FUNCTION__))
       "APInt size does not match type size!")((Elt->getBitWidth() == EltVT.getSizeInBits() && "APInt size does not match type size!"
) ? static_cast<void> (0) : __assert_fail ("Elt->getBitWidth() == EltVT.getSizeInBits() && \"APInt size does not match type size!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1262, __PRETTY_FUNCTION__));
unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
ID.AddPointer(Elt);
ID.AddBoolean(isO);
void *IP = nullptr;
SDNode *N = nullptr;
if ((N = FindNodeOrInsertPos(ID, DL, IP)))
  if (!VT.isVector())
    return SDValue(N, 0);

if (!N) {
  N = newSDNode<ConstantSDNode>(isT, isO, Elt, EltVT);
  CSEMap.InsertNode(N, IP);
  InsertNode(N);
  NewSDValueDbgMsg(SDValue(N, 0), "Creating constant: ", this);
}

SDValue Result(N, 0);
if (VT.isVector())
  Result = getSplatBuildVector(VT, DL, Result);

return Result;
1286}

1288SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, const SDLoc &DL,
                                      bool isTarget) {
return getConstant(Val, DL, TLI->getPointerTy(getDataLayout()), isTarget);
1291}

1293SDValue SelectionDAG::getShiftAmountConstant(uint64_t Val, EVT VT,
                                           const SDLoc &DL, bool LegalTypes) {
EVT ShiftVT = TLI->getShiftAmountTy(VT, getDataLayout(), LegalTypes);
return getConstant(Val, DL, ShiftVT);
1297}

1299SDValue SelectionDAG::getConstantFP(const APFloat &V, const SDLoc &DL, EVT VT,
                                  bool isTarget) {
return getConstantFP(*ConstantFP::get(*getContext(), V), DL, VT, isTarget);
1302}

1304SDValue SelectionDAG::getConstantFP(const ConstantFP &V, const SDLoc &DL,
                                  EVT VT, bool isTarget) {
assert(VT.isFloatingPoint() && "Cannot create integer FP constant!")((VT.isFloatingPoint() && "Cannot create integer FP constant!"
) ? static_cast<void> (0) : __assert_fail ("VT.isFloatingPoint() && \"Cannot create integer FP constant!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1306, __PRETTY_FUNCTION__));

EVT EltVT = VT.getScalarType();

// Do the map lookup using the actual bit pattern for the floating point
// value, so that we don't have problems with 0.0 comparing equal to -0.0, and
// we don't have issues with SNANs.
unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
ID.AddPointer(&V);
void *IP = nullptr;
SDNode *N = nullptr;
if ((N = FindNodeOrInsertPos(ID, DL, IP)))
  if (!VT.isVector())
    return SDValue(N, 0);

if (!N) {
  N = newSDNode<ConstantFPSDNode>(isTarget, &V, EltVT);
  CSEMap.InsertNode(N, IP);
  InsertNode(N);
}

SDValue Result(N, 0);
if (VT.isVector())
  Result = getSplatBuildVector(VT, DL, Result);
NewSDValueDbgMsg(Result, "Creating fp constant: ", this);
return Result;
1334}

1336SDValue SelectionDAG::getConstantFP(double Val, const SDLoc &DL, EVT VT,
                                  bool isTarget) {
EVT EltVT = VT.getScalarType();
if (EltVT == MVT::f32)
  return getConstantFP(APFloat((float)Val), DL, VT, isTarget);
else if (EltVT == MVT::f64)
  return getConstantFP(APFloat(Val), DL, VT, isTarget);
else if (EltVT == MVT::f80 || EltVT == MVT::f128 || EltVT == MVT::ppcf128 ||
         EltVT == MVT::f16) {
  bool Ignored;
  APFloat APF = APFloat(Val);
  APF.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
              &Ignored);
  return getConstantFP(APF, DL, VT, isTarget);
} else
  llvm_unreachable("Unsupported type in getConstantFP")::llvm::llvm_unreachable_internal("Unsupported type in getConstantFP"
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1351);
1352}

1354SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, const SDLoc &DL,
                                     EVT VT, int64_t Offset, bool isTargetGA,
                                     unsigned TargetFlags) {
assert((TargetFlags == 0 || isTargetGA) &&(((TargetFlags == 0 || isTargetGA) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTargetGA) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1358, __PRETTY_FUNCTION__))
       "Cannot set target flags on target-independent globals")(((TargetFlags == 0 || isTargetGA) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTargetGA) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1358, __PRETTY_FUNCTION__));

// Truncate (with sign-extension) the offset value to the pointer size.
unsigned BitWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
if (BitWidth < 64)
  Offset = SignExtend64(Offset, BitWidth);

unsigned Opc;
if (GV->isThreadLocal())
  Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
else
  Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;

FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(VT), None);
ID.AddPointer(GV);
ID.AddInteger(Offset);
ID.AddInteger(TargetFlags);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
  return SDValue(E, 0);

auto *N = newSDNode<GlobalAddressSDNode>(
    Opc, DL.getIROrder(), DL.getDebugLoc(), GV, VT, Offset, TargetFlags);
CSEMap.InsertNode(N, IP);
  InsertNode(N);
return SDValue(N, 0);
1385}

1387SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(VT), None);
ID.AddInteger(FI);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N = newSDNode<FrameIndexSDNode>(FI, VT, isTarget);
CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1400}

1402SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
                                 unsigned TargetFlags) {
assert((TargetFlags == 0 || isTarget) &&(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent jump tables"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent jump tables\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1405, __PRETTY_FUNCTION__))
       "Cannot set target flags on target-independent jump tables")(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent jump tables"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent jump tables\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1405, __PRETTY_FUNCTION__));
unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(VT), None);
ID.AddInteger(JTI);
ID.AddInteger(TargetFlags);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N = newSDNode<JumpTableSDNode>(JTI, VT, isTarget, TargetFlags);
CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1419}

1421SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
                                    unsigned Alignment, int Offset,
                                    bool isTarget,
                                    unsigned TargetFlags) {
assert((TargetFlags == 0 || isTarget) &&(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1426, __PRETTY_FUNCTION__))
       "Cannot set target flags on target-independent globals")(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1426, __PRETTY_FUNCTION__));
if (Alignment == 0)
  Alignment = MF->getFunction().hasOptSize()
                  ? getDataLayout().getABITypeAlignment(C->getType())
                  : getDataLayout().getPrefTypeAlignment(C->getType());
unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(VT), None);
ID.AddInteger(Alignment);
ID.AddInteger(Offset);
ID.AddPointer(C);
ID.AddInteger(TargetFlags);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VT, Offset, Alignment,
                                        TargetFlags);
CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1447}

1449SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
                                    unsigned Alignment, int Offset,
                                    bool isTarget,
                                    unsigned TargetFlags) {
assert((TargetFlags == 0 || isTarget) &&(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1454, __PRETTY_FUNCTION__))
       "Cannot set target flags on target-independent globals")(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1454, __PRETTY_FUNCTION__));
if (Alignment == 0)
  Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(VT), None);
ID.AddInteger(Alignment);
ID.AddInteger(Offset);
C->addSelectionDAGCSEId(ID);
ID.AddInteger(TargetFlags);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VT, Offset, Alignment,
                                        TargetFlags);
CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1473}

1475SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
                                   unsigned TargetFlags) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
ID.AddInteger(Index);
ID.AddInteger(Offset);
ID.AddInteger(TargetFlags);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N = newSDNode<TargetIndexSDNode>(Index, VT, Offset, TargetFlags);
CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1490}

1492SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
ID.AddPointer(MBB);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N = newSDNode<BasicBlockSDNode>(MBB);
CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1504}

1506SDValue SelectionDAG::getValueType(EVT VT) {
if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
    ValueTypeNodes.size())
  ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);

SDNode *&N = VT.isExtended() ?
  ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];

if (N) return SDValue(N, 0);
N = newSDNode<VTSDNode>(VT);
InsertNode(N);
return SDValue(N, 0);
1518}

1520SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
SDNode *&N = ExternalSymbols[Sym];
if (N) return SDValue(N, 0);
N = newSDNode<ExternalSymbolSDNode>(false, Sym, 0, VT);
InsertNode(N);
return SDValue(N, 0);
1526}

1528SDValue SelectionDAG::getMCSymbol(MCSymbol *Sym, EVT VT) {
SDNode *&N = MCSymbols[Sym];
if (N)
  return SDValue(N, 0);
N = newSDNode<MCSymbolSDNode>(Sym, VT);
InsertNode(N);
return SDValue(N, 0);
1535}

1537SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
                                            unsigned TargetFlags) {
SDNode *&N =
    TargetExternalSymbols[std::pair<std::string, unsigned>(Sym, TargetFlags)];
if (N) return SDValue(N, 0);
N = newSDNode<ExternalSymbolSDNode>(true, Sym, TargetFlags, VT);
InsertNode(N);
return SDValue(N, 0);
1545}

1547SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
if ((unsigned)Cond >= CondCodeNodes.size())
  CondCodeNodes.resize(Cond+1);

if (!CondCodeNodes[Cond]) {
  auto *N = newSDNode<CondCodeSDNode>(Cond);
  CondCodeNodes[Cond] = N;
  InsertNode(N);
}

return SDValue(CondCodeNodes[Cond], 0);
1558}

1560/// Swaps the values of N1 and N2. Swaps all indices in the shuffle mask M that
1561/// point at N1 to point at N2 and indices that point at N2 to point at N1.
1562static void commuteShuffle(SDValue &N1, SDValue &N2, MutableArrayRef<int> M) {
std::swap(N1, N2);
ShuffleVectorSDNode::commuteMask(M);
1565}

1567SDValue SelectionDAG::getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1,
                                     SDValue N2, ArrayRef<int> Mask) {
assert(VT.getVectorNumElements() == Mask.size() &&((VT.getVectorNumElements() == Mask.size() && "Must have the same number of vector elements as mask elements!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == Mask.size() && \"Must have the same number of vector elements as mask elements!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1570, __PRETTY_FUNCTION__))
         "Must have the same number of vector elements as mask elements!")((VT.getVectorNumElements() == Mask.size() && "Must have the same number of vector elements as mask elements!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == Mask.size() && \"Must have the same number of vector elements as mask elements!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1570, __PRETTY_FUNCTION__));
assert(VT == N1.getValueType() && VT == N2.getValueType() &&((VT == N1.getValueType() && VT == N2.getValueType() &&
 "Invalid VECTOR_SHUFFLE") ? static_cast<void> (0) : __assert_fail
 ("VT == N1.getValueType() && VT == N2.getValueType() && \"Invalid VECTOR_SHUFFLE\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1572, __PRETTY_FUNCTION__))
       "Invalid VECTOR_SHUFFLE")((VT == N1.getValueType() && VT == N2.getValueType() &&
 "Invalid VECTOR_SHUFFLE") ? static_cast<void> (0) : __assert_fail
 ("VT == N1.getValueType() && VT == N2.getValueType() && \"Invalid VECTOR_SHUFFLE\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1572, __PRETTY_FUNCTION__));

// Canonicalize shuffle undef, undef -> undef
if (N1.isUndef() && N2.isUndef())
  return getUNDEF(VT);

// Validate that all indices in Mask are within the range of the elements
// input to the shuffle.
int NElts = Mask.size();
assert(llvm::all_of(Mask,((llvm::all_of(Mask, [&](int M) { return M < (NElts * 2
) && M >= -1; }) && "Index out of range") ?
 static_cast<void> (0) : __assert_fail ("llvm::all_of(Mask, [&](int M) { return M < (NElts * 2) && M >= -1; }) && \"Index out of range\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1583, __PRETTY_FUNCTION__))
                    [&](int M) { return M < (NElts * 2) && M >= -1; }) &&((llvm::all_of(Mask, [&](int M) { return M < (NElts * 2
) && M >= -1; }) && "Index out of range") ?
 static_cast<void> (0) : __assert_fail ("llvm::all_of(Mask, [&](int M) { return M < (NElts * 2) && M >= -1; }) && \"Index out of range\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1583, __PRETTY_FUNCTION__))
       "Index out of range")((llvm::all_of(Mask, [&](int M) { return M < (NElts * 2
) && M >= -1; }) && "Index out of range") ?
 static_cast<void> (0) : __assert_fail ("llvm::all_of(Mask, [&](int M) { return M < (NElts * 2) && M >= -1; }) && \"Index out of range\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1583, __PRETTY_FUNCTION__));

// Copy the mask so we can do any needed cleanup.
SmallVector<int, 8> MaskVec(Mask.begin(), Mask.end());

// Canonicalize shuffle v, v -> v, undef
if (N1 == N2) {
  N2 = getUNDEF(VT);
  for (int i = 0; i != NElts; ++i)
    if (MaskVec[i] >= NElts) MaskVec[i] -= NElts;
}

// Canonicalize shuffle undef, v -> v, undef.  Commute the shuffle mask.
if (N1.isUndef())
  commuteShuffle(N1, N2, MaskVec);

if (TLI->hasVectorBlend()) {
  // If shuffling a splat, try to blend the splat instead. We do this here so
  // that even when this arises during lowering we don't have to re-handle it.
  auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
    BitVector UndefElements;
    SDValue Splat = BV->getSplatValue(&UndefElements);
    if (!Splat)
      return;

    for (int i = 0; i < NElts; ++i) {
      if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + NElts))
        continue;

      // If this input comes from undef, mark it as such.
      if (UndefElements[MaskVec[i] - Offset]) {
        MaskVec[i] = -1;
        continue;
      }

      // If we can blend a non-undef lane, use that instead.
      if (!UndefElements[i])
        MaskVec[i] = i + Offset;
    }
  };
  if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
    BlendSplat(N1BV, 0);
  if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
    BlendSplat(N2BV, NElts);
}

// Canonicalize all index into lhs, -> shuffle lhs, undef
// Canonicalize all index into rhs, -> shuffle rhs, undef
bool AllLHS = true, AllRHS = true;
bool N2Undef = N2.isUndef();
for (int i = 0; i != NElts; ++i) {
  if (MaskVec[i] >= NElts) {
    if (N2Undef)
      MaskVec[i] = -1;
    else
      AllLHS = false;
  } else if (MaskVec[i] >= 0) {
    AllRHS = false;
  }
}
if (AllLHS && AllRHS)
  return getUNDEF(VT);
if (AllLHS && !N2Undef)
  N2 = getUNDEF(VT);
if (AllRHS) {
  N1 = getUNDEF(VT);
  commuteShuffle(N1, N2, MaskVec);
}
// Reset our undef status after accounting for the mask.
N2Undef = N2.isUndef();
// Re-check whether both sides ended up undef.
if (N1.isUndef() && N2Undef)
  return getUNDEF(VT);

// If Identity shuffle return that node.
bool Identity = true, AllSame = true;
for (int i = 0; i != NElts; ++i) {
  if (MaskVec[i] >= 0 && MaskVec[i] != i) Identity = false;
  if (MaskVec[i] != MaskVec[0]) AllSame = false;
}
if (Identity && NElts)
  return N1;

// Shuffling a constant splat doesn't change the result.
if (N2Undef) {
  SDValue V = N1;

  // Look through any bitcasts. We check that these don't change the number
  // (and size) of elements and just changes their types.
  while (V.getOpcode() == ISD::BITCAST)
    V = V->getOperand(0);

  // A splat should always show up as a build vector node.
  if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
    BitVector UndefElements;
    SDValue Splat = BV->getSplatValue(&UndefElements);
    // If this is a splat of an undef, shuffling it is also undef.
    if (Splat && Splat.isUndef())
      return getUNDEF(VT);

    bool SameNumElts =
        V.getValueType().getVectorNumElements() == VT.getVectorNumElements();

    // We only have a splat which can skip shuffles if there is a splatted
    // value and no undef lanes rearranged by the shuffle.
    if (Splat && UndefElements.none()) {
      // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
      // number of elements match or the value splatted is a zero constant.
      if (SameNumElts)
        return N1;
      if (auto *C = dyn_cast<ConstantSDNode>(Splat))
        if (C->isNullValue())
          return N1;
    }

    // If the shuffle itself creates a splat, build the vector directly.
    if (AllSame && SameNumElts) {
      EVT BuildVT = BV->getValueType(0);
      const SDValue &Splatted = BV->getOperand(MaskVec[0]);
      SDValue NewBV = getSplatBuildVector(BuildVT, dl, Splatted);

      // We may have jumped through bitcasts, so the type of the
      // BUILD_VECTOR may not match the type of the shuffle.
      if (BuildVT != VT)
        NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
      return NewBV;
    }
  }
}

FoldingSetNodeID ID;
SDValue Ops[2] = { N1, N2 };
AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
for (int i = 0; i != NElts; ++i)
  ID.AddInteger(MaskVec[i]);

void* IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
  return SDValue(E, 0);

// Allocate the mask array for the node out of the BumpPtrAllocator, since
// SDNode doesn't have access to it.  This memory will be "leaked" when
// the node is deallocated, but recovered when the NodeAllocator is released.
int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
llvm::copy(MaskVec, MaskAlloc);

auto *N = newSDNode<ShuffleVectorSDNode>(VT, dl.getIROrder(),
                                         dl.getDebugLoc(), MaskAlloc);
createOperands(N, Ops);

CSEMap.InsertNode(N, IP);
InsertNode(N);
SDValue V = SDValue(N, 0);
NewSDValueDbgMsg(V, "Creating new node: ", this);
return V;
1738}

1740SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
EVT VT = SV.getValueType(0);
SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
ShuffleVectorSDNode::commuteMask(MaskVec);

SDValue Op0 = SV.getOperand(0);
SDValue Op1 = SV.getOperand(1);
return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, MaskVec);
1748}

1750SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
ID.AddInteger(RegNo);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N = newSDNode<RegisterSDNode>(RegNo, VT);
N->SDNodeBits.IsDivergent = TLI->isSDNodeSourceOfDivergence(N, FLI, DA);
CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1763}

1765SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
ID.AddPointer(RegMask);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N = newSDNode<RegisterMaskSDNode>(RegMask);
CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1777}

1779SDValue SelectionDAG::getEHLabel(const SDLoc &dl, SDValue Root,
                               MCSymbol *Label) {
return getLabelNode(ISD::EH_LABEL, dl, Root, Label);
1782}

1784SDValue SelectionDAG::getLabelNode(unsigned Opcode, const SDLoc &dl,
                                 SDValue Root, MCSymbol *Label) {
FoldingSetNodeID ID;
SDValue Ops[] = { Root };
AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), Ops);
ID.AddPointer(Label);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N =
    newSDNode<LabelSDNode>(Opcode, dl.getIROrder(), dl.getDebugLoc(), Label);
createOperands(N, Ops);

CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1801}

1803SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
                                    int64_t Offset, bool isTarget,
                                    unsigned TargetFlags) {
unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;

FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(VT), None);
ID.AddPointer(BA);
ID.AddInteger(Offset);
ID.AddInteger(TargetFlags);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N = newSDNode<BlockAddressSDNode>(Opc, VT, BA, Offset, TargetFlags);
CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1821}

1823SDValue SelectionDAG::getSrcValue(const Value *V) {
assert((!V || V->getType()->isPointerTy()) &&(((!V || V->getType()->isPointerTy()) && "SrcValue is not a pointer?"
) ? static_cast<void> (0) : __assert_fail ("(!V || V->getType()->isPointerTy()) && \"SrcValue is not a pointer?\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1825, __PRETTY_FUNCTION__))
       "SrcValue is not a pointer?")(((!V || V->getType()->isPointerTy()) && "SrcValue is not a pointer?"
) ? static_cast<void> (0) : __assert_fail ("(!V || V->getType()->isPointerTy()) && \"SrcValue is not a pointer?\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1825, __PRETTY_FUNCTION__));

FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
ID.AddPointer(V);

void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N = newSDNode<SrcValueSDNode>(V);
CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1839}

1841SDValue SelectionDAG::getMDNode(const MDNode *MD) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
ID.AddPointer(MD);

void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, IP))
  return SDValue(E, 0);

auto *N = newSDNode<MDNodeSDNode>(MD);
CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1854}

1856SDValue SelectionDAG::getBitcast(EVT VT, SDValue V) {
if (VT == V.getValueType())
  return V;

return getNode(ISD::BITCAST, SDLoc(V), VT, V);
1861}

1863SDValue SelectionDAG::getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr,
                                     unsigned SrcAS, unsigned DestAS) {
SDValue Ops[] = {Ptr};
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
ID.AddInteger(SrcAS);
ID.AddInteger(DestAS);

void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
  return SDValue(E, 0);

auto *N = newSDNode<AddrSpaceCastSDNode>(dl.getIROrder(), dl.getDebugLoc(),
                                         VT, SrcAS, DestAS);
createOperands(N, Ops);

CSEMap.InsertNode(N, IP);
InsertNode(N);
return SDValue(N, 0);
1882}

1884/// getShiftAmountOperand - Return the specified value casted to
1885/// the target's desired shift amount type.
1886SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
EVT OpTy = Op.getValueType();
EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout());
if (OpTy == ShTy || OpTy.isVector()) return Op;

return getZExtOrTrunc(Op, SDLoc(Op), ShTy);
1892}

1894SDValue SelectionDAG::expandVAArg(SDNode *Node) {
SDLoc dl(Node);
const TargetLowering &TLI = getTargetLoweringInfo();
const Value *V = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
EVT VT = Node->getValueType(0);
SDValue Tmp1 = Node->getOperand(0);
SDValue Tmp2 = Node->getOperand(1);
const MaybeAlign MA(Node->getConstantOperandVal(3));

SDValue VAListLoad = getLoad(TLI.getPointerTy(getDataLayout()), dl, Tmp1,
                             Tmp2, MachinePointerInfo(V));
SDValue VAList = VAListLoad;

if (MA && *MA > TLI.getMinStackArgumentAlignment()) {
  VAList = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
                   getConstant(MA->value() - 1, dl, VAList.getValueType()));

  VAList =
      getNode(ISD::AND, dl, VAList.getValueType(), VAList,
              getConstant(-(int64_t)MA->value(), dl, VAList.getValueType()));
}

// Increment the pointer, VAList, to the next vaarg
Tmp1 = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
               getConstant(getDataLayout().getTypeAllocSize(
                                             VT.getTypeForEVT(*getContext())),
                           dl, VAList.getValueType()));
// Store the incremented VAList to the legalized pointer
Tmp1 =
    getStore(VAListLoad.getValue(1), dl, Tmp1, Tmp2, MachinePointerInfo(V));
// Load the actual argument out of the pointer VAList
return getLoad(VT, dl, Tmp1, VAList, MachinePointerInfo());
1926}

1928SDValue SelectionDAG::expandVACopy(SDNode *Node) {
SDLoc dl(Node);
const TargetLowering &TLI = getTargetLoweringInfo();
// This defaults to loading a pointer from the input and storing it to the
// output, returning the chain.
const Value *VD = cast<SrcValueSDNode>(Node->getOperand(3))->getValue();
const Value *VS = cast<SrcValueSDNode>(Node->getOperand(4))->getValue();
SDValue Tmp1 =
    getLoad(TLI.getPointerTy(getDataLayout()), dl, Node->getOperand(0),
            Node->getOperand(2), MachinePointerInfo(VS));
return getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
                MachinePointerInfo(VD));
1940}

1942SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
MachineFrameInfo &MFI = getMachineFunction().getFrameInfo();
unsigned ByteSize = VT.getStoreSize();
Type *Ty = VT.getTypeForEVT(*getContext());
unsigned StackAlign =
    std::max((unsigned)getDataLayout().getPrefTypeAlignment(Ty), minAlign);

int FrameIdx = MFI.CreateStackObject(ByteSize, StackAlign, false);
return getFrameIndex(FrameIdx, TLI->getFrameIndexTy(getDataLayout()));
1951}

1953SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
unsigned Bytes = std::max(VT1.getStoreSize(), VT2.getStoreSize());
Type *Ty1 = VT1.getTypeForEVT(*getContext());
Type *Ty2 = VT2.getTypeForEVT(*getContext());
const DataLayout &DL = getDataLayout();
unsigned Align =
    std::max(DL.getPrefTypeAlignment(Ty1), DL.getPrefTypeAlignment(Ty2));

MachineFrameInfo &MFI = getMachineFunction().getFrameInfo();
int FrameIdx = MFI.CreateStackObject(Bytes, Align, false);
return getFrameIndex(FrameIdx, TLI->getFrameIndexTy(getDataLayout()));
1964}

1966SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, SDValue N2,
                              ISD::CondCode Cond, const SDLoc &dl) {
EVT OpVT = N1.getValueType();

// These setcc operations always fold.
switch (Cond) {
default: break;
case ISD::SETFALSE:
case ISD::SETFALSE2: return getBoolConstant(false, dl, VT, OpVT);
case ISD::SETTRUE:
case ISD::SETTRUE2: return getBoolConstant(true, dl, VT, OpVT);

case ISD::SETOEQ:
case ISD::SETOGT:
case ISD::SETOGE:
case ISD::SETOLT:
case ISD::SETOLE:
case ISD::SETONE:
case ISD::SETO:
case ISD::SETUO:
case ISD::SETUEQ:
case ISD::SETUNE:
  assert(!OpVT.isInteger() && "Illegal setcc for integer!")((!OpVT.isInteger() && "Illegal setcc for integer!") ?
 static_cast<void> (0) : __assert_fail ("!OpVT.isInteger() && \"Illegal setcc for integer!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1988, __PRETTY_FUNCTION__));
  break;
}

if (OpVT.isInteger()) {
  // For EQ and NE, we can always pick a value for the undef to make the
  // predicate pass or fail, so we can return undef.
  // Matches behavior in llvm::ConstantFoldCompareInstruction.
  // icmp eq/ne X, undef -> undef.
  if ((N1.isUndef() || N2.isUndef()) &&
      (Cond == ISD::SETEQ || Cond == ISD::SETNE))
    return getUNDEF(VT);

  // If both operands are undef, we can return undef for int comparison.
  // icmp undef, undef -> undef.
  if (N1.isUndef() && N2.isUndef())
    return getUNDEF(VT);

  // icmp X, X -> true/false
  // icmp X, undef -> true/false because undef could be X.
  if (N1 == N2)
    return getBoolConstant(ISD::isTrueWhenEqual(Cond), dl, VT, OpVT);
}

if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2)) {
  const APInt &C2 = N2C->getAPIntValue();
  if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
    const APInt &C1 = N1C->getAPIntValue();

    switch (Cond) {
    default: llvm_unreachable("Unknown integer setcc!")::llvm::llvm_unreachable_internal("Unknown integer setcc!", "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2018);
    case ISD::SETEQ:  return getBoolConstant(C1 == C2, dl, VT, OpVT);
    case ISD::SETNE:  return getBoolConstant(C1 != C2, dl, VT, OpVT);
    case ISD::SETULT: return getBoolConstant(C1.ult(C2), dl, VT, OpVT);
    case ISD::SETUGT: return getBoolConstant(C1.ugt(C2), dl, VT, OpVT);
    case ISD::SETULE: return getBoolConstant(C1.ule(C2), dl, VT, OpVT);
    case ISD::SETUGE: return getBoolConstant(C1.uge(C2), dl, VT, OpVT);
    case ISD::SETLT:  return getBoolConstant(C1.slt(C2), dl, VT, OpVT);
    case ISD::SETGT:  return getBoolConstant(C1.sgt(C2), dl, VT, OpVT);
    case ISD::SETLE:  return getBoolConstant(C1.sle(C2), dl, VT, OpVT);
    case ISD::SETGE:  return getBoolConstant(C1.sge(C2), dl, VT, OpVT);
    }
  }
}

auto *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
auto *N2CFP = dyn_cast<ConstantFPSDNode>(N2);

if (N1CFP && N2CFP) {
  APFloat::cmpResult R = N1CFP->getValueAPF().compare(N2CFP->getValueAPF());
  switch (Cond) {
  default: break;
  case ISD::SETEQ:  if (R==APFloat::cmpUnordered)
                      return getUNDEF(VT);
                    LLVM_FALLTHROUGH[[gnu::fallthrough]];
  case ISD::SETOEQ: return getBoolConstant(R==APFloat::cmpEqual, dl, VT,
                                           OpVT);
  case ISD::SETNE:  if (R==APFloat::cmpUnordered)
                      return getUNDEF(VT);
                    LLVM_FALLTHROUGH[[gnu::fallthrough]];
  case ISD::SETONE: return getBoolConstant(R==APFloat::cmpGreaterThan ||
                                           R==APFloat::cmpLessThan, dl, VT,
                                           OpVT);
  case ISD::SETLT:  if (R==APFloat::cmpUnordered)
                      return getUNDEF(VT);
                    LLVM_FALLTHROUGH[[gnu::fallthrough]];
  case ISD::SETOLT: return getBoolConstant(R==APFloat::cmpLessThan, dl, VT,
                                           OpVT);
  case ISD::SETGT:  if (R==APFloat::cmpUnordered)
                      return getUNDEF(VT);
                    LLVM_FALLTHROUGH[[gnu::fallthrough]];
  case ISD::SETOGT: return getBoolConstant(R==APFloat::cmpGreaterThan, dl,
                                           VT, OpVT);
  case ISD::SETLE:  if (R==APFloat::cmpUnordered)
                      return getUNDEF(VT);
                    LLVM_FALLTHROUGH[[gnu::fallthrough]];
  case ISD::SETOLE: return getBoolConstant(R==APFloat::cmpLessThan ||
                                           R==APFloat::cmpEqual, dl, VT,
                                           OpVT);
  case ISD::SETGE:  if (R==APFloat::cmpUnordered)
                      return getUNDEF(VT);
                    LLVM_FALLTHROUGH[[gnu::fallthrough]];
  case ISD::SETOGE: return getBoolConstant(R==APFloat::cmpGreaterThan ||
                                       R==APFloat::cmpEqual, dl, VT, OpVT);
  case ISD::SETO:   return getBoolConstant(R!=APFloat::cmpUnordered, dl, VT,
                                           OpVT);
  case ISD::SETUO:  return getBoolConstant(R==APFloat::cmpUnordered, dl, VT,
                                           OpVT);
  case ISD::SETUEQ: return getBoolConstant(R==APFloat::cmpUnordered ||
                                           R==APFloat::cmpEqual, dl, VT,
                                           OpVT);
  case ISD::SETUNE: return getBoolConstant(R!=APFloat::cmpEqual, dl, VT,
                                           OpVT);
  case ISD::SETULT: return getBoolConstant(R==APFloat::cmpUnordered ||
                                           R==APFloat::cmpLessThan, dl, VT,
                                           OpVT);
  case ISD::SETUGT: return getBoolConstant(R==APFloat::cmpGreaterThan ||
                                           R==APFloat::cmpUnordered, dl, VT,
                                           OpVT);
  case ISD::SETULE: return getBoolConstant(R!=APFloat::cmpGreaterThan, dl,
                                           VT, OpVT);
  case ISD::SETUGE: return getBoolConstant(R!=APFloat::cmpLessThan, dl, VT,
                                           OpVT);
  }
} else if (N1CFP && OpVT.isSimple() && !N2.isUndef()) {
  // Ensure that the constant occurs on the RHS.
  ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
  if (!TLI->isCondCodeLegal(SwappedCond, OpVT.getSimpleVT()))
    return SDValue();
  return getSetCC(dl, VT, N2, N1, SwappedCond);
} else if ((N2CFP && N2CFP->getValueAPF().isNaN()) ||
           (OpVT.isFloatingPoint() && (N1.isUndef() || N2.isUndef()))) {
  // If an operand is known to be a nan (or undef that could be a nan), we can
  // fold it.
  // Choosing NaN for the undef will always make unordered comparison succeed
  // and ordered comparison fails.
  // Matches behavior in llvm::ConstantFoldCompareInstruction.
  switch (ISD::getUnorderedFlavor(Cond)) {
  default:
    llvm_unreachable("Unknown flavor!")::llvm::llvm_unreachable_internal("Unknown flavor!", "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2107);
  case 0: // Known false.
    return getBoolConstant(false, dl, VT, OpVT);
  case 1: // Known true.
    return getBoolConstant(true, dl, VT, OpVT);
  case 2: // Undefined.
    return getUNDEF(VT);
  }
}

// Could not fold it.
return SDValue();
2119}

2121/// See if the specified operand can be simplified with the knowledge that only
2122/// the bits specified by DemandedBits are used.
2123/// TODO: really we should be making this into the DAG equivalent of
2124/// SimplifyMultipleUseDemandedBits and not generate any new nodes.
2125SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &DemandedBits) {
EVT VT = V.getValueType();
APInt DemandedElts = VT.isVector()
                         ? APInt::getAllOnesValue(VT.getVectorNumElements())
                         : APInt(1, 1);
return GetDemandedBits(V, DemandedBits, DemandedElts);
2131}

2133/// See if the specified operand can be simplified with the knowledge that only
2134/// the bits specified by DemandedBits are used in the elements specified by
2135/// DemandedElts.
2136/// TODO: really we should be making this into the DAG equivalent of
2137/// SimplifyMultipleUseDemandedBits and not generate any new nodes.
2138SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &DemandedBits,
                                    const APInt &DemandedElts) {
switch (V.getOpcode()) {
default:
  break;
case ISD::Constant: {
  auto *CV = cast<ConstantSDNode>(V.getNode());
  assert(CV && "Const value should be ConstSDNode.")((CV && "Const value should be ConstSDNode.") ? static_cast
<void> (0) : __assert_fail ("CV && \"Const value should be ConstSDNode.\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2145, __PRETTY_FUNCTION__));
  const APInt &CVal = CV->getAPIntValue();
  APInt NewVal = CVal & DemandedBits;
  if (NewVal != CVal)
    return getConstant(NewVal, SDLoc(V), V.getValueType());
  break;
}
case ISD::OR:
case ISD::XOR:
case ISD::SIGN_EXTEND_INREG:
  return TLI->SimplifyMultipleUseDemandedBits(V, DemandedBits, DemandedElts,
                                              *this, 0);
case ISD::SRL:
  // Only look at single-use SRLs.
  if (!V.getNode()->hasOneUse())
    break;
  if (auto *RHSC = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
    // See if we can recursively simplify the LHS.
    unsigned Amt = RHSC->getZExtValue();

    // Watch out for shift count overflow though.
    if (Amt >= DemandedBits.getBitWidth())
      break;
    APInt SrcDemandedBits = DemandedBits << Amt;
    if (SDValue SimplifyLHS =
            GetDemandedBits(V.getOperand(0), SrcDemandedBits))
      return getNode(ISD::SRL, SDLoc(V), V.getValueType(), SimplifyLHS,
                     V.getOperand(1));
  }
  break;
case ISD::AND: {
  // X & -1 -> X (ignoring bits which aren't demanded).
  // Also handle the case where masked out bits in X are known to be zero.
  if (ConstantSDNode *RHSC = isConstOrConstSplat(V.getOperand(1))) {
    const APInt &AndVal = RHSC->getAPIntValue();
    if (DemandedBits.isSubsetOf(AndVal) ||
        DemandedBits.isSubsetOf(computeKnownBits(V.getOperand(0)).Zero |
                                AndVal))
      return V.getOperand(0);
  }
  break;
}
case ISD::ANY_EXTEND: {
  SDValue Src = V.getOperand(0);
  unsigned SrcBitWidth = Src.getScalarValueSizeInBits();
  // Being conservative here - only peek through if we only demand bits in the
  // non-extended source (even though the extended bits are technically
  // undef).
  if (DemandedBits.getActiveBits() > SrcBitWidth)
    break;
  APInt SrcDemandedBits = DemandedBits.trunc(SrcBitWidth);
  if (SDValue DemandedSrc = GetDemandedBits(Src, SrcDemandedBits))
    return getNode(ISD::ANY_EXTEND, SDLoc(V), V.getValueType(), DemandedSrc);
  break;
}
}
return SDValue();
2202}

2204/// SignBitIsZero - Return true if the sign bit of Op is known to be zero.  We
2205/// use this predicate to simplify operations downstream.
2206bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
unsigned BitWidth = Op.getScalarValueSizeInBits();
return MaskedValueIsZero(Op, APInt::getSignMask(BitWidth), Depth);
2209}

2211/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero.  We use
2212/// this predicate to simplify operations downstream.  Mask is known to be zero
2213/// for bits that V cannot have.
2214bool SelectionDAG::MaskedValueIsZero(SDValue V, const APInt &Mask,
                                   unsigned Depth) const {
EVT VT = V.getValueType();
APInt DemandedElts = VT.isVector()
                         ? APInt::getAllOnesValue(VT.getVectorNumElements())
                         : APInt(1, 1);
return MaskedValueIsZero(V, Mask, DemandedElts, Depth);
2221}

2223/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero in
2224/// DemandedElts.  We use this predicate to simplify operations downstream.
2225/// Mask is known to be zero for bits that V cannot have.
2226bool SelectionDAG::MaskedValueIsZero(SDValue V, const APInt &Mask,
                                   const APInt &DemandedElts,
                                   unsigned Depth) const {
return Mask.isSubsetOf(computeKnownBits(V, DemandedElts, Depth).Zero);
2230}

2232/// MaskedValueIsAllOnes - Return true if '(Op & Mask) == Mask'.
2233bool SelectionDAG::MaskedValueIsAllOnes(SDValue V, const APInt &Mask,
                                      unsigned Depth) const {
return Mask.isSubsetOf(computeKnownBits(V, Depth).One);
2236}

2238/// isSplatValue - Return true if the vector V has the same value
2239/// across all DemandedElts.
2240bool SelectionDAG::isSplatValue(SDValue V, const APInt &DemandedElts,
                              APInt &UndefElts) {
if (!DemandedElts)
  return false; // No demanded elts, better to assume we don't know anything.

EVT VT = V.getValueType();
assert(VT.isVector() && "Vector type expected")((VT.isVector() && "Vector type expected") ? static_cast
<void> (0) : __assert_fail ("VT.isVector() && \"Vector type expected\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2246, __PRETTY_FUNCTION__));

unsigned NumElts = VT.getVectorNumElements();
assert(NumElts == DemandedElts.getBitWidth() && "Vector size mismatch")((NumElts == DemandedElts.getBitWidth() && "Vector size mismatch"
) ? static_cast<void> (0) : __assert_fail ("NumElts == DemandedElts.getBitWidth() && \"Vector size mismatch\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2249, __PRETTY_FUNCTION__));
UndefElts = APInt::getNullValue(NumElts);

switch (V.getOpcode()) {
case ISD::BUILD_VECTOR: {
  SDValue Scl;
  for (unsigned i = 0; i != NumElts; ++i) {
    SDValue Op = V.getOperand(i);
    if (Op.isUndef()) {
      UndefElts.setBit(i);
      continue;
    }
    if (!DemandedElts[i])
      continue;
    if (Scl && Scl != Op)
      return false;
    Scl = Op;
  }
  return true;
}
case ISD::VECTOR_SHUFFLE: {
  // Check if this is a shuffle node doing a splat.
  // TODO: Do we need to handle shuffle(splat, undef, mask)?
  int SplatIndex = -1;
  ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(V)->getMask();
  for (int i = 0; i != (int)NumElts; ++i) {
    int M = Mask[i];
    if (M < 0) {
      UndefElts.setBit(i);
      continue;
    }
    if (!DemandedElts[i])
      continue;
    if (0 <= SplatIndex && SplatIndex != M)
      return false;
    SplatIndex = M;
  }
  return true;
}
case ISD::EXTRACT_SUBVECTOR: {
  SDValue Src = V.getOperand(0);
  ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(V.getOperand(1));
  unsigned NumSrcElts = Src.getValueType().getVectorNumElements();
  if (SubIdx && SubIdx->getAPIntValue().ule(NumSrcElts - NumElts)) {
    // Offset the demanded elts by the subvector index.
    uint64_t Idx = SubIdx->getZExtValue();
    APInt UndefSrcElts;
    APInt DemandedSrc = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx);
    if (isSplatValue(Src, DemandedSrc, UndefSrcElts)) {
      UndefElts = UndefSrcElts.extractBits(NumElts, Idx);
      return true;
    }
  }
  break;
}
case ISD::ADD:
case ISD::SUB:
case ISD::AND: {
  APInt UndefLHS, UndefRHS;
  SDValue LHS = V.getOperand(0);
  SDValue RHS = V.getOperand(1);
  if (isSplatValue(LHS, DemandedElts, UndefLHS) &&
      isSplatValue(RHS, DemandedElts, UndefRHS)) {
    UndefElts = UndefLHS | UndefRHS;
    return true;
  }
  break;
}
}

return false;
2320}

2322/// Helper wrapper to main isSplatValue function.
2323bool SelectionDAG::isSplatValue(SDValue V, bool AllowUndefs) {
EVT VT = V.getValueType();
assert(VT.isVector() && "Vector type expected")((VT.isVector() && "Vector type expected") ? static_cast
<void> (0) : __assert_fail ("VT.isVector() && \"Vector type expected\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2325, __PRETTY_FUNCTION__));
unsigned NumElts = VT.getVectorNumElements();

APInt UndefElts;
APInt DemandedElts = APInt::getAllOnesValue(NumElts);
return isSplatValue(V, DemandedElts, UndefElts) &&
       (AllowUndefs || !UndefElts);
2332}

2334SDValue SelectionDAG::getSplatSourceVector(SDValue V, int &SplatIdx) {
V = peekThroughExtractSubvectors(V);

EVT VT = V.getValueType();
unsigned Opcode = V.getOpcode();
switch (Opcode) {
default: {
  APInt UndefElts;
  APInt DemandedElts = APInt::getAllOnesValue(VT.getVectorNumElements());
  if (isSplatValue(V, DemandedElts, UndefElts)) {
    // Handle case where all demanded elements are UNDEF.
    if (DemandedElts.isSubsetOf(UndefElts)) {
      SplatIdx = 0;
      return getUNDEF(VT);
    }
    SplatIdx = (UndefElts & DemandedElts).countTrailingOnes();
    return V;
  }
  break;
}
case ISD::VECTOR_SHUFFLE: {
  // Check if this is a shuffle node doing a splat.
  // TODO - remove this and rely purely on SelectionDAG::isSplatValue,
  // getTargetVShiftNode currently struggles without the splat source.
  auto *SVN = cast<ShuffleVectorSDNode>(V);
  if (!SVN->isSplat())
    break;
  int Idx = SVN->getSplatIndex();
  int NumElts = V.getValueType().getVectorNumElements();
  SplatIdx = Idx % NumElts;
  return V.getOperand(Idx / NumElts);
}
}

return SDValue();
2369}

2371SDValue SelectionDAG::getSplatValue(SDValue V) {
int SplatIdx;
if (SDValue SrcVector = getSplatSourceVector(V, SplatIdx))
  return getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(V),
                 SrcVector.getValueType().getScalarType(), SrcVector,
                 getIntPtrConstant(SplatIdx, SDLoc(V)));
return SDValue();
2378}

2380/// If a SHL/SRA/SRL node has a constant or splat constant shift amount that
2381/// is less than the element bit-width of the shift node, return it.
2382static const APInt *getValidShiftAmountConstant(SDValue V) {
unsigned BitWidth = V.getScalarValueSizeInBits();
if (ConstantSDNode *SA = isConstOrConstSplat(V.getOperand(1))) {
  // Shifting more than the bitwidth is not valid.
  const APInt &ShAmt = SA->getAPIntValue();
  if (ShAmt.ult(BitWidth))
    return &ShAmt;
}
return nullptr;
2391}

2393/// If a SHL/SRA/SRL node has constant vector shift amounts that are all less
2394/// than the element bit-width of the shift node, return the minimum value.
2395static const APInt *getValidMinimumShiftAmountConstant(SDValue V) {
unsigned BitWidth = V.getScalarValueSizeInBits();
auto *BV = dyn_cast<BuildVectorSDNode>(V.getOperand(1));
if (!BV)
  return nullptr;
const APInt *MinShAmt = nullptr;
for (unsigned i = 0, e = BV->getNumOperands(); i != e; ++i) {
  auto *SA = dyn_cast<ConstantSDNode>(BV->getOperand(i));
  if (!SA)
    return nullptr;
  // Shifting more than the bitwidth is not valid.
  const APInt &ShAmt = SA->getAPIntValue();
  if (ShAmt.uge(BitWidth))
    return nullptr;
  if (MinShAmt && MinShAmt->ule(ShAmt))
    continue;
  MinShAmt = &ShAmt;
}
return MinShAmt;
2414}

2416/// Determine which bits of Op are known to be either zero or one and return
2417/// them in Known. For vectors, the known bits are those that are shared by
2418/// every vector element.
2419KnownBits SelectionDAG::computeKnownBits(SDValue Op, unsigned Depth) const {
EVT VT = Op.getValueType();
APInt DemandedElts = VT.isVector()
                         ? APInt::getAllOnesValue(VT.getVectorNumElements())
                         : APInt(1, 1);
return computeKnownBits(Op, DemandedElts, Depth);
2425}

2427/// Determine which bits of Op are known to be either zero or one and return
2428/// them in Known. The DemandedElts argument allows us to only collect the known
2429/// bits that are shared by the requested vector elements.
2430KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
                                       unsigned Depth) const {
unsigned BitWidth = Op.getScalarValueSizeInBits();

KnownBits Known(BitWidth);   // Don't know anything.

if (auto *C = dyn_cast<ConstantSDNode>(Op)) {
  // We know all of the bits for a constant!
  Known.One = C->getAPIntValue();
  Known.Zero = ~Known.One;
  return Known;
}
if (auto *C = dyn_cast<ConstantFPSDNode>(Op)) {
  // We know all of the bits for a constant fp!
  Known.One = C->getValueAPF().bitcastToAPInt();
  Known.Zero = ~Known.One;
  return Known;
}

if (Depth >= MaxRecursionDepth)
  return Known;  // Limit search depth.

KnownBits Known2;
unsigned NumElts = DemandedElts.getBitWidth();
assert((!Op.getValueType().isVector() ||(((!Op.getValueType().isVector() || NumElts == Op.getValueType
().getVectorNumElements()) && "Unexpected vector size"
) ? static_cast<void> (0) : __assert_fail ("(!Op.getValueType().isVector() || NumElts == Op.getValueType().getVectorNumElements()) && \"Unexpected vector size\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2456, __PRETTY_FUNCTION__))
        NumElts == Op.getValueType().getVectorNumElements()) &&(((!Op.getValueType().isVector() || NumElts == Op.getValueType
().getVectorNumElements()) && "Unexpected vector size"
) ? static_cast<void> (0) : __assert_fail ("(!Op.getValueType().isVector() || NumElts == Op.getValueType().getVectorNumElements()) && \"Unexpected vector size\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2456, __PRETTY_FUNCTION__))
       "Unexpected vector size")(((!Op.getValueType().isVector() || NumElts == Op.getValueType
().getVectorNumElements()) && "Unexpected vector size"
) ? static_cast<void> (0) : __assert_fail ("(!Op.getValueType().isVector() || NumElts == Op.getValueType().getVectorNumElements()) && \"Unexpected vector size\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2456, __PRETTY_FUNCTION__));

if (!DemandedElts)
  return Known;  // No demanded elts, better to assume we don't know anything.

unsigned Opcode = Op.getOpcode();
switch (Opcode) {
case ISD::BUILD_VECTOR:
  // Collect the known bits that are shared by every demanded vector element.
  Known.Zero.setAllBits(); Known.One.setAllBits();
  for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
    if (!DemandedElts[i])
      continue;

    SDValue SrcOp = Op.getOperand(i);
    Known2 = computeKnownBits(SrcOp, Depth + 1);

    // BUILD_VECTOR can implicitly truncate sources, we must handle this.
    if (SrcOp.getValueSizeInBits() != BitWidth) {
      assert(SrcOp.getValueSizeInBits() > BitWidth &&((SrcOp.getValueSizeInBits() > BitWidth && "Expected BUILD_VECTOR implicit truncation"
) ? static_cast<void> (0) : __assert_fail ("SrcOp.getValueSizeInBits() > BitWidth && \"Expected BUILD_VECTOR implicit truncation\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2476, __PRETTY_FUNCTION__))
             "Expected BUILD_VECTOR implicit truncation")((SrcOp.getValueSizeInBits() > BitWidth && "Expected BUILD_VECTOR implicit truncation"
) ? static_cast<void> (0) : __assert_fail ("SrcOp.getValueSizeInBits() > BitWidth && \"Expected BUILD_VECTOR implicit truncation\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2476, __PRETTY_FUNCTION__));
      Known2 = Known2.trunc(BitWidth);
    }

    // Known bits are the values that are shared by every demanded element.
    Known.One &= Known2.One;
    Known.Zero &= Known2.Zero;

    // If we don't know any bits, early out.
    if (Known.isUnknown())
      break;
  }
  break;
case ISD::VECTOR_SHUFFLE: {
  // Collect the known bits that are shared by every vector element referenced
  // by the shuffle.
  APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0);
  Known.Zero.setAllBits(); Known.One.setAllBits();
  const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op);
  assert(NumElts == SVN->getMask().size() && "Unexpected vector size")((NumElts == SVN->getMask().size() && "Unexpected vector size"
) ? static_cast<void> (0) : __assert_fail ("NumElts == SVN->getMask().size() && \"Unexpected vector size\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2495, __PRETTY_FUNCTION__));
  for (unsigned i = 0; i != NumElts; ++i) {
    if (!DemandedElts[i])
      continue;

    int M = SVN->getMaskElt(i);
    if (M < 0) {
      // For UNDEF elements, we don't know anything about the common state of
      // the shuffle result.
      Known.resetAll();
      DemandedLHS.clearAllBits();
      DemandedRHS.clearAllBits();
      break;
    }

    if ((unsigned)M < NumElts)
      DemandedLHS.setBit((unsigned)M % NumElts);
    else
      DemandedRHS.setBit((unsigned)M % NumElts);
  }
  // Known bits are the values that are shared by every demanded element.
  if (!!DemandedLHS) {
    SDValue LHS = Op.getOperand(0);
    Known2 = computeKnownBits(LHS, DemandedLHS, Depth + 1);
    Known.One &= Known2.One;
    Known.Zero &= Known2.Zero;
  }
  // If we don't know any bits, early out.
  if (Known.isUnknown())
    break;
  if (!!DemandedRHS) {
    SDValue RHS = Op.getOperand(1);
    Known2 = computeKnownBits(RHS, DemandedRHS, Depth + 1);
    Known.One &= Known2.One;
    Known.Zero &= Known2.Zero;
  }
  break;
}
case ISD::CONCAT_VECTORS: {
  // Split DemandedElts and test each of the demanded subvectors.
  Known.Zero.setAllBits(); Known.One.setAllBits();
  EVT SubVectorVT = Op.getOperand(0).getValueType();
  unsigned NumSubVectorElts = SubVectorVT.getVectorNumElements();
  unsigned NumSubVectors = Op.getNumOperands();
  for (unsigned i = 0; i != NumSubVectors; ++i) {
    APInt DemandedSub = DemandedElts.lshr(i * NumSubVectorElts);
    DemandedSub = DemandedSub.trunc(NumSubVectorElts);
    if (!!DemandedSub) {
      SDValue Sub = Op.getOperand(i);
      Known2 = computeKnownBits(Sub, DemandedSub, Depth + 1);
      Known.One &= Known2.One;
      Known.Zero &= Known2.Zero;
    }
    // If we don't know any bits, early out.
    if (Known.isUnknown())
      break;
  }
  break;
}
case ISD::INSERT_SUBVECTOR: {
  // If we know the element index, demand any elements from the subvector and
  // the remainder from the src its inserted into, otherwise demand them all.
  SDValue Src = Op.getOperand(0);
  SDValue Sub = Op.getOperand(1);
  ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
  unsigned NumSubElts = Sub.getValueType().getVectorNumElements();
  if (SubIdx && SubIdx->getAPIntValue().ule(NumElts - NumSubElts)) {
    Known.One.setAllBits();
    Known.Zero.setAllBits();
    uint64_t Idx = SubIdx->getZExtValue();
    APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx);
    if (!!DemandedSubElts) {
      Known = computeKnownBits(Sub, DemandedSubElts, Depth + 1);
      if (Known.isUnknown())
        break; // early-out.
    }
    APInt SubMask = APInt::getBitsSet(NumElts, Idx, Idx + NumSubElts);
    APInt DemandedSrcElts = DemandedElts & ~SubMask;
    if (!!DemandedSrcElts) {
      Known2 = computeKnownBits(Src, DemandedSrcElts, Depth + 1);
      Known.One &= Known2.One;
      Known.Zero &= Known2.Zero;
    }
  } else {
    Known = computeKnownBits(Sub, Depth + 1);
    if (Known.isUnknown())
      break; // early-out.
    Known2 = computeKnownBits(Src, Depth + 1);
    Known.One &= Known2.One;
    Known.Zero &= Known2.Zero;
  }
  break;
}
case ISD::EXTRACT_SUBVECTOR: {
  // If we know the element index, just demand that subvector elements,
  // otherwise demand them all.
  SDValue Src = Op.getOperand(0);
  ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
  unsigned NumSrcElts = Src.getValueType().getVectorNumElements();
  APInt DemandedSrc = APInt::getAllOnesValue(NumSrcElts);
  if (SubIdx && SubIdx->getAPIntValue().ule(NumSrcElts - NumElts)) {
    // Offset the demanded elts by the subvector index.
    uint64_t Idx = SubIdx->getZExtValue();
    DemandedSrc = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx);
  }
  Known = computeKnownBits(Src, DemandedSrc, Depth + 1);
  break;
}
case ISD::SCALAR_TO_VECTOR: {
  // We know about scalar_to_vector as much as we know about it source,
  // which becomes the first element of otherwise unknown vector.
  if (DemandedElts != 1)
    break;

  SDValue N0 = Op.getOperand(0);
  Known = computeKnownBits(N0, Depth + 1);
  if (N0.getValueSizeInBits() != BitWidth)
    Known = Known.trunc(BitWidth);

  break;
}
case ISD::BITCAST: {
  SDValue N0 = Op.getOperand(0);
  EVT SubVT = N0.getValueType();
  unsigned SubBitWidth = SubVT.getScalarSizeInBits();

  // Ignore bitcasts from unsupported types.
  if (!(SubVT.isInteger() || SubVT.isFloatingPoint()))
    break;

  // Fast handling of 'identity' bitcasts.
  if (BitWidth == SubBitWidth) {
    Known = computeKnownBits(N0, DemandedElts, Depth + 1);
    break;
  }

  bool IsLE = getDataLayout().isLittleEndian();

  // Bitcast 'small element' vector to 'large element' scalar/vector.
  if ((BitWidth % SubBitWidth) == 0) {
    assert(N0.getValueType().isVector() && "Expected bitcast from vector")((N0.getValueType().isVector() && "Expected bitcast from vector"
) ? static_cast<void> (0) : __assert_fail ("N0.getValueType().isVector() && \"Expected bitcast from vector\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2635, __PRETTY_FUNCTION__));

    // Collect known bits for the (larger) output by collecting the known
    // bits from each set of sub elements and shift these into place.
    // We need to separately call computeKnownBits for each set of
    // sub elements as the knownbits for each is likely to be different.
    unsigned SubScale = BitWidth / SubBitWidth;
    APInt SubDemandedElts(NumElts * SubScale, 0);
    for (unsigned i = 0; i != NumElts; ++i)
      if (DemandedElts[i])
        SubDemandedElts.setBit(i * SubScale);

    for (unsigned i = 0; i != SubScale; ++i) {
      Known2 = computeKnownBits(N0, SubDemandedElts.shl(i),
                       Depth + 1);
      unsigned Shifts = IsLE ? i : SubScale - 1 - i;
      Known.One |= Known2.One.zext(BitWidth).shl(SubBitWidth * Shifts);
      Known.Zero |= Known2.Zero.zext(BitWidth).shl(SubBitWidth * Shifts);
    }
  }

  // Bitcast 'large element' scalar/vector to 'small element' vector.
  if ((SubBitWidth % BitWidth) == 0) {
    assert(Op.getValueType().isVector() && "Expected bitcast to vector")((Op.getValueType().isVector() && "Expected bitcast to vector"
) ? static_cast<void> (0) : __assert_fail ("Op.getValueType().isVector() && \"Expected bitcast to vector\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2658, __PRETTY_FUNCTION__));

    // Collect known bits for the (smaller) output by collecting the known
    // bits from the overlapping larger input elements and extracting the
    // sub sections we actually care about.
    unsigned SubScale = SubBitWidth / BitWidth;
    APInt SubDemandedElts(NumElts / SubScale, 0);
    for (unsigned i = 0; i != NumElts; ++i)
      if (DemandedElts[i])
        SubDemandedElts.setBit(i / SubScale);

    Known2 = computeKnownBits(N0, SubDemandedElts, Depth + 1);

    Known.Zero.setAllBits(); Known.One.setAllBits();
    for (unsigned i = 0; i != NumElts; ++i)
      if (DemandedElts[i]) {
        unsigned Shifts = IsLE ? i : NumElts - 1 - i;
        unsigned Offset = (Shifts % SubScale) * BitWidth;
        Known.One &= Known2.One.lshr(Offset).trunc(BitWidth);
        Known.Zero &= Known2.Zero.lshr(Offset).trunc(BitWidth);
        // If we don't know any bits, early out.
        if (Known.isUnknown())
          break;
      }
  }
  break;
}
case ISD::AND:
  // If either the LHS or the RHS are Zero, the result is zero.
  Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
  Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);

  // Output known-1 bits are only known if set in both the LHS & RHS.
  Known.One &= Known2.One;
  // Output known-0 are known to be clear if zero in either the LHS | RHS.
  Known.Zero |= Known2.Zero;
  break;
case ISD::OR:
  Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
  Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);

  // Output known-0 bits are only known if clear in both the LHS & RHS.
  Known.Zero &= Known2.Zero;
  // Output known-1 are known to be set if set in either the LHS | RHS.
  Known.One |= Known2.One;
  break;
case ISD::XOR: {
  Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
  Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);

  // Output known-0 bits are known if clear or set in both the LHS & RHS.
  APInt KnownZeroOut = (Known.Zero & Known2.Zero) | (Known.One & Known2.One);
  // Output known-1 are known to be set if set in only one of the LHS, RHS.
  Known.One = (Known.Zero & Known2.One) | (Known.One & Known2.Zero);
  Known.Zero = KnownZeroOut;
  break;
}
case ISD::MUL: {
  Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
  Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);

  // If low bits are zero in either operand, output low known-0 bits.
  // Also compute a conservative estimate for high known-0 bits.
  // More trickiness is possible, but this is sufficient for the
  // interesting case of alignment computation.
  unsigned TrailZ = Known.countMinTrailingZeros() +
                    Known2.countMinTrailingZeros();
  unsigned LeadZ =  std::max(Known.countMinLeadingZeros() +
                             Known2.countMinLeadingZeros(),
                             BitWidth) - BitWidth;

  Known.resetAll();
  Known.Zero.setLowBits(std::min(TrailZ, BitWidth));
  Known.Zero.setHighBits(std::min(LeadZ, BitWidth));
  break;
}
case ISD::UDIV: {
  // For the purposes of computing leading zeros we can conservatively
  // treat a udiv as a logical right shift by the power of 2 known to
  // be less than the denominator.
  Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  unsigned LeadZ = Known2.countMinLeadingZeros();

  Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
  unsigned RHSMaxLeadingZeros = Known2.countMaxLeadingZeros();
  if (RHSMaxLeadingZeros != BitWidth)
    LeadZ = std::min(BitWidth, LeadZ + BitWidth - RHSMaxLeadingZeros - 1);

  Known.Zero.setHighBits(LeadZ);
  break;
}
case ISD::SELECT:
case ISD::VSELECT:
  Known = computeKnownBits(Op.getOperand(2), DemandedElts, Depth+1);
  // If we don't know any bits, early out.
  if (Known.isUnknown())
    break;
  Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth+1);

  // Only known if known in both the LHS and RHS.
  Known.One &= Known2.One;
  Known.Zero &= Known2.Zero;
  break;
case ISD::SELECT_CC:
  Known = computeKnownBits(Op.getOperand(3), DemandedElts, Depth+1);
  // If we don't know any bits, early out.
  if (Known.isUnknown())
    break;
  Known2 = computeKnownBits(Op.getOperand(2), DemandedElts, Depth+1);

  // Only known if known in both the LHS and RHS.
  Known.One &= Known2.One;
  Known.Zero &= Known2.Zero;
  break;
case ISD::SMULO:
case ISD::UMULO:
case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
  if (Op.getResNo() != 1)
    break;
  // The boolean result conforms to getBooleanContents.
  // If we know the result of a setcc has the top bits zero, use this info.
  // We know that we have an integer-based boolean since these operations
  // are only available for integer.
  if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
          TargetLowering::ZeroOrOneBooleanContent &&
      BitWidth > 1)
    Known.Zero.setBitsFrom(1);
  break;
case ISD::SETCC:
  // If we know the result of a setcc has the top bits zero, use this info.
  if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
          TargetLowering::ZeroOrOneBooleanContent &&
      BitWidth > 1)
    Known.Zero.setBitsFrom(1);
  break;
case ISD::SHL:
  if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
    Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    unsigned Shift = ShAmt->getZExtValue();
    Known.Zero <<= Shift;
    Known.One <<= Shift;
    // Low bits are known zero.
    Known.Zero.setLowBits(Shift);
  }
  break;
case ISD::SRL:
  if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
    Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    unsigned Shift = ShAmt->getZExtValue();
    Known.Zero.lshrInPlace(Shift);
    Known.One.lshrInPlace(Shift);
    // High bits are known zero.
    Known.Zero.setHighBits(Shift);
  } else if (const APInt *ShMinAmt = getValidMinimumShiftAmountConstant(Op)) {
    // Minimum shift high bits are known zero.
    Known.Zero.setHighBits(ShMinAmt->getZExtValue());
  }
  break;
case ISD::SRA:
  if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
    Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    unsigned Shift = ShAmt->getZExtValue();
    // Sign extend known zero/one bit (else is unknown).
    Known.Zero.ashrInPlace(Shift);
    Known.One.ashrInPlace(Shift);
  }
  break;
case ISD::FSHL:
case ISD::FSHR:
  if (ConstantSDNode *C = isConstOrConstSplat(Op.getOperand(2), DemandedElts)) {
    unsigned Amt = C->getAPIntValue().urem(BitWidth);

    // For fshl, 0-shift returns the 1st arg.
    // For fshr, 0-shift returns the 2nd arg.
    if (Amt == 0) {
      Known = computeKnownBits(Op.getOperand(Opcode == ISD::FSHL ? 0 : 1),
                               DemandedElts, Depth + 1);
      break;
    }

    // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
    // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
    Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    if (Opcode == ISD::FSHL) {
      Known.One <<= Amt;
      Known.Zero <<= Amt;
      Known2.One.lshrInPlace(BitWidth - Amt);
      Known2.Zero.lshrInPlace(BitWidth - Amt);
    } else {
      Known.One <<= BitWidth - Amt;
      Known.Zero <<= BitWidth - Amt;
      Known2.One.lshrInPlace(Amt);
      Known2.Zero.lshrInPlace(Amt);
    }
    Known.One |= Known2.One;
    Known.Zero |= Known2.Zero;
  }
  break;
case ISD::SIGN_EXTEND_INREG: {
  EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
  unsigned EBits = EVT.getScalarSizeInBits();

  // Sign extension.  Compute the demanded bits in the result that are not
  // present in the input.
  APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);

  APInt InSignMask = APInt::getSignMask(EBits);
  APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);

  // If the sign extended bits are demanded, we know that the sign
  // bit is demanded.
  InSignMask = InSignMask.zext(BitWidth);
  if (NewBits.getBoolValue())
    InputDemandedBits |= InSignMask;

  Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  Known.One &= InputDemandedBits;
  Known.Zero &= InputDemandedBits;

  // If the sign bit of the input is known set or clear, then we know the
  // top bits of the result.
  if (Known.Zero.intersects(InSignMask)) {        // Input sign bit known clear
    Known.Zero |= NewBits;
    Known.One  &= ~NewBits;
  } else if (Known.One.intersects(InSignMask)) {  // Input sign bit known set
    Known.One  |= NewBits;
    Known.Zero &= ~NewBits;
  } else {                              // Input sign bit unknown
    Known.Zero &= ~NewBits;
    Known.One  &= ~NewBits;
  }
  break;
}
case ISD::CTTZ:
case ISD::CTTZ_ZERO_UNDEF: {
  Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  // If we have a known 1, its position is our upper bound.
  unsigned PossibleTZ = Known2.countMaxTrailingZeros();
  unsigned LowBits = Log2_32(PossibleTZ) + 1;
  Known.Zero.setBitsFrom(LowBits);
  break;
}
case ISD::CTLZ:
case ISD::CTLZ_ZERO_UNDEF: {
  Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  // If we have a known 1, its position is our upper bound.
  unsigned PossibleLZ = Known2.countMaxLeadingZeros();
  unsigned LowBits = Log2_32(PossibleLZ) + 1;
  Known.Zero.setBitsFrom(LowBits);
  break;
}
case ISD::CTPOP: {
  Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  // If we know some of the bits are zero, they can't be one.
  unsigned PossibleOnes = Known2.countMaxPopulation();
  Known.Zero.setBitsFrom(Log2_32(PossibleOnes) + 1);
  break;
}
case ISD::LOAD: {
  LoadSDNode *LD = cast<LoadSDNode>(Op);
  const Constant *Cst = TLI->getTargetConstantFromLoad(LD);
  if (ISD::isNON_EXTLoad(LD) && Cst) {
    // Determine any common known bits from the loaded constant pool value.
    Type *CstTy = Cst->getType();
    if ((NumElts * BitWidth) == CstTy->getPrimitiveSizeInBits()) {
      // If its a vector splat, then we can (quickly) reuse the scalar path.
      // NOTE: We assume all elements match and none are UNDEF.
      if (CstTy->isVectorTy()) {
        if (const Constant *Splat = Cst->getSplatValue()) {
          Cst = Splat;
          CstTy = Cst->getType();
        }
      }
      // TODO - do we need to handle different bitwidths?
      if (CstTy->isVectorTy() && BitWidth == CstTy->getScalarSizeInBits()) {
        // Iterate across all vector elements finding common known bits.
        Known.One.setAllBits();
        Known.Zero.setAllBits();
        for (unsigned i = 0; i != NumElts; ++i) {
          if (!DemandedElts[i])
            continue;
          if (Constant *Elt = Cst->getAggregateElement(i)) {
            if (auto *CInt = dyn_cast<ConstantInt>(Elt)) {
              const APInt &Value = CInt->getValue();
              Known.One &= Value;
              Known.Zero &= ~Value;
              continue;
            }
            if (auto *CFP = dyn_cast<ConstantFP>(Elt)) {
              APInt Value = CFP->getValueAPF().bitcastToAPInt();
              Known.One &= Value;
              Known.Zero &= ~Value;
              continue;
            }
          }
          Known.One.clearAllBits();
          Known.Zero.clearAllBits();
          break;
        }
      } else if (BitWidth == CstTy->getPrimitiveSizeInBits()) {
        if (auto *CInt = dyn_cast<ConstantInt>(Cst)) {
          const APInt &Value = CInt->getValue();
          Known.One = Value;
          Known.Zero = ~Value;
        } else if (auto *CFP = dyn_cast<ConstantFP>(Cst)) {
          APInt Value = CFP->getValueAPF().bitcastToAPInt();
          Known.One = Value;
          Known.Zero = ~Value;
        }
      }
    }
  } else if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
    // If this is a ZEXTLoad and we are looking at the loaded value.
    EVT VT = LD->getMemoryVT();
    unsigned MemBits = VT.getScalarSizeInBits();
    Known.Zero.setBitsFrom(MemBits);
  } else if (const MDNode *Ranges = LD->getRanges()) {
    if (LD->getExtensionType() == ISD::NON_EXTLOAD)
      computeKnownBitsFromRangeMetadata(*Ranges, Known);
  }
  break;
}
case ISD::ZERO_EXTEND_VECTOR_INREG: {
  EVT InVT = Op.getOperand(0).getValueType();
  APInt InDemandedElts = DemandedElts.zextOrSelf(InVT.getVectorNumElements());
  Known = computeKnownBits(Op.getOperand(0), InDemandedElts, Depth + 1);
  Known = Known.zext(BitWidth, true /* ExtendedBitsAreKnownZero */);
  break;
}
case ISD::ZERO_EXTEND: {
  Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  Known = Known.zext(BitWidth, true /* ExtendedBitsAreKnownZero */);
  break;
}
case ISD::SIGN_EXTEND_VECTOR_INREG: {
  EVT InVT = Op.getOperand(0).getValueType();
  APInt InDemandedElts = DemandedElts.zextOrSelf(InVT.getVectorNumElements());
  Known = computeKnownBits(Op.getOperand(0), InDemandedElts, Depth + 1);
  // If the sign bit is known to be zero or one, then sext will extend
  // it to the top bits, else it will just zext.
  Known = Known.sext(BitWidth);
  break;
}
case ISD::SIGN_EXTEND: {
  Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  // If the sign bit is known to be zero or one, then sext will extend
  // it to the top bits, else it will just zext.
  Known = Known.sext(BitWidth);
  break;
}
case ISD::ANY_EXTEND: {
  Known = computeKnownBits(Op.getOperand(0), Depth+1);
  Known = Known.zext(BitWidth, false /* ExtendedBitsAreKnownZero */);
  break;
}
case ISD::TRUNCATE: {
  Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  Known = Known.trunc(BitWidth);
  break;
}
case ISD::AssertZext: {
  EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
  APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
  Known = computeKnownBits(Op.getOperand(0), Depth+1);
  Known.Zero |= (~InMask);
  Known.One  &= (~Known.Zero);
  break;
}
case ISD::FGETSIGN:
  // All bits are zero except the low bit.
  Known.Zero.setBitsFrom(1);
  break;
case ISD::USUBO:
case ISD::SSUBO:
  if (Op.getResNo() == 1) {
    // If we know the result of a setcc has the top bits zero, use this info.
    if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
            TargetLowering::ZeroOrOneBooleanContent &&
        BitWidth > 1)
      Known.Zero.setBitsFrom(1);
    break;
  }
  LLVM_FALLTHROUGH[[gnu::fallthrough]];
case ISD::SUB:
case ISD::SUBC: {
  Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
  Known = KnownBits::computeForAddSub(/* Add */ false, /* NSW */ false,
                                      Known, Known2);
  break;
}
case ISD::UADDO:
case ISD::SADDO:
case ISD::ADDCARRY:
  if (Op.getResNo() == 1) {
    // If we know the result of a setcc has the top bits zero, use this info.
    if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
            TargetLowering::ZeroOrOneBooleanContent &&
        BitWidth > 1)
      Known.Zero.setBitsFrom(1);
    break;
  }
  LLVM_FALLTHROUGH[[gnu::fallthrough]];
case ISD::ADD:
case ISD::ADDC:
case ISD::ADDE: {
  assert(Op.getResNo() == 0 && "We only compute knownbits for the sum here.")((Op.getResNo() == 0 && "We only compute knownbits for the sum here."
) ? static_cast<void> (0) : __assert_fail ("Op.getResNo() == 0 && \"We only compute knownbits for the sum here.\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3065, __PRETTY_FUNCTION__));

  // With ADDE and ADDCARRY, a carry bit may be added in.
  KnownBits Carry(1);
  if (Opcode == ISD::ADDE)
    // Can't track carry from glue, set carry to unknown.
    Carry.resetAll();
  else if (Opcode == ISD::ADDCARRY)
    // TODO: Compute known bits for the carry operand. Not sure if it is worth
    // the trouble (how often will we find a known carry bit). And I haven't
    // tested this very much yet, but something like this might work:
    //   Carry = computeKnownBits(Op.getOperand(2), DemandedElts, Depth + 1);
    //   Carry = Carry.zextOrTrunc(1, false);
    Carry.resetAll();
  else
    Carry.setAllZero();

  Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
  Known = KnownBits::computeForAddCarry(Known, Known2, Carry);
  break;
}
case ISD::SREM:
  if (ConstantSDNode *Rem = isConstOrConstSplat(Op.getOperand(1))) {
    const APInt &RA = Rem->getAPIntValue().abs();
    if (RA.isPowerOf2()) {
      APInt LowBits = RA - 1;
      Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);

      // The low bits of the first operand are unchanged by the srem.
      Known.Zero = Known2.Zero & LowBits;
      Known.One = Known2.One & LowBits;

      // If the first operand is non-negative or has all low bits zero, then
      // the upper bits are all zero.
      if (Known2.isNonNegative() || LowBits.isSubsetOf(Known2.Zero))
        Known.Zero |= ~LowBits;

      // If the first operand is negative and not all low bits are zero, then
      // the upper bits are all one.
      if (Known2.isNegative() && LowBits.intersects(Known2.One))
        Known.One |= ~LowBits;
      assert((Known.Zero & Known.One) == 0&&"Bits known to be one AND zero?")(((Known.Zero & Known.One) == 0&&"Bits known to be one AND zero?"
) ? static_cast<void> (0) : __assert_fail ("(Known.Zero & Known.One) == 0&&\"Bits known to be one AND zero?\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3107, __PRETTY_FUNCTION__));
    }
  }
  break;
case ISD::UREM: {
  if (ConstantSDNode *Rem = isConstOrConstSplat(Op.getOperand(1))) {
    const APInt &RA = Rem->getAPIntValue();
    if (RA.isPowerOf2()) {
      APInt LowBits = (RA - 1);
      Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);

      // The upper bits are all zero, the lower ones are unchanged.
      Known.Zero = Known2.Zero | ~LowBits;
      Known.One = Known2.One & LowBits;
      break;
    }
  }

  // Since the result is less than or equal to either operand, any leading
  // zero bits in either operand must also exist in the result.
  Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);

  uint32_t Leaders =
      std::max(Known.countMinLeadingZeros(), Known2.countMinLeadingZeros());
  Known.resetAll();
  Known.Zero.setHighBits(Leaders);
  break;
}
case ISD::EXTRACT_ELEMENT: {
  Known = computeKnownBits(Op.getOperand(0), Depth+1);
  const unsigned Index = Op.getConstantOperandVal(1);
  const unsigned EltBitWidth = Op.getValueSizeInBits();

  // Remove low part of known bits mask
  Known.Zero = Known.Zero.getHiBits(Known.getBitWidth() - Index * EltBitWidth);
  Known.One = Known.One.getHiBits(Known.getBitWidth() - Index * EltBitWidth);

  // Remove high part of known bit mask
  Known = Known.trunc(EltBitWidth);
  break;
}
case ISD::EXTRACT_VECTOR_ELT: {
  SDValue InVec = Op.getOperand(0);
  SDValue EltNo = Op.getOperand(1);
  EVT VecVT = InVec.getValueType();
  const unsigned EltBitWidth = VecVT.getScalarSizeInBits();
  const unsigned NumSrcElts = VecVT.getVectorNumElements();
  // If BitWidth > EltBitWidth the value is anyext:ed. So we do not know
  // anything about the extended bits.
  if (BitWidth > EltBitWidth)
    Known = Known.trunc(EltBitWidth);
  ConstantSDNode *ConstEltNo = dyn_cast<ConstantSDNode>(EltNo);
  if (ConstEltNo && ConstEltNo->getAPIntValue().ult(NumSrcElts)) {
    // If we know the element index, just demand that vector element.
    unsigned Idx = ConstEltNo->getZExtValue();
    APInt DemandedElt = APInt::getOneBitSet(NumSrcElts, Idx);
    Known = computeKnownBits(InVec, DemandedElt, Depth + 1);
  } else {
    // Unknown element index, so ignore DemandedElts and demand them all.
    Known = computeKnownBits(InVec, Depth + 1);
  }
  if (BitWidth > EltBitWidth)
    Known = Known.zext(BitWidth, false /* => any extend */);
  break;
}
case ISD::INSERT_VECTOR_ELT: {
  SDValue InVec = Op.getOperand(0);
  SDValue InVal = Op.getOperand(1);
  SDValue EltNo = Op.getOperand(2);

  ConstantSDNode *CEltNo = dyn_cast<ConstantSDNode>(EltNo);
  if (CEltNo && CEltNo->getAPIntValue().ult(NumElts)) {
    // If we know the element index, split the demand between the
    // source vector and the inserted element.
    Known.Zero = Known.One = APInt::getAllOnesValue(BitWidth);
    unsigned EltIdx = CEltNo->getZExtValue();

    // If we demand the inserted element then add its common known bits.
    if (DemandedElts[EltIdx]) {
      Known2 = computeKnownBits(InVal, Depth + 1);
      Known.One &= Known2.One.zextOrTrunc(Known.One.getBitWidth());
      Known.Zero &= Known2.Zero.zextOrTrunc(Known.Zero.getBitWidth());
    }

    // If we demand the source vector then add its common known bits, ensuring
    // that we don't demand the inserted element.
    APInt VectorElts = DemandedElts & ~(APInt::getOneBitSet(NumElts, EltIdx));
    if (!!VectorElts) {
      Known2 = computeKnownBits(InVec, VectorElts, Depth + 1);
      Known.One &= Known2.One;
      Known.Zero &= Known2.Zero;
    }
  } else {
    // Unknown element index, so ignore DemandedElts and demand them all.
    Known = computeKnownBits(InVec, Depth + 1);
    Known2 = computeKnownBits(InVal, Depth + 1);
    Known.One &= Known2.One.zextOrTrunc(Known.One.getBitWidth());
    Known.Zero &= Known2.Zero.zextOrTrunc(Known.Zero.getBitWidth());
  }
  break;
}
case ISD::BITREVERSE: {
  Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  Known.Zero = Known2.Zero.reverseBits();
  Known.One = Known2.One.reverseBits();
  break;
}
case ISD::BSWAP: {
  Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  Known.Zero = Known2.Zero.byteSwap();
  Known.One = Known2.One.byteSwap();
  break;
}
case ISD::ABS: {
  Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);

  // If the source's MSB is zero then we know the rest of the bits already.
  if (Known2.isNonNegative()) {
    Known.Zero = Known2.Zero;
    Known.One = Known2.One;
    break;
  }

  // We only know that the absolute values's MSB will be zero iff there is
  // a set bit that isn't the sign bit (otherwise it could be INT_MIN).
  Known2.One.clearSignBit();
  if (Known2.One.getBoolValue()) {
    Known.Zero = APInt::getSignMask(BitWidth);
    break;
  }
  break;
}
case ISD::UMIN: {
  Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);

  // UMIN - we know that the result will have the maximum of the
  // known zero leading bits of the inputs.
  unsigned LeadZero = Known.countMinLeadingZeros();
  LeadZero = std::max(LeadZero, Known2.countMinLeadingZeros());

  Known.Zero &= Known2.Zero;
  Known.One &= Known2.One;
  Known.Zero.setHighBits(LeadZero);
  break;
}
case ISD::UMAX: {
  Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);

  // UMAX - we know that the result will have the maximum of the
  // known one leading bits of the inputs.
  unsigned LeadOne = Known.countMinLeadingOnes();
  LeadOne = std::max(LeadOne, Known2.countMinLeadingOnes());

  Known.Zero &= Known2.Zero;
  Known.One &= Known2.One;
  Known.One.setHighBits(LeadOne);
  break;
}
case ISD::SMIN:
case ISD::SMAX: {
  // If we have a clamp pattern, we know that the number of sign bits will be
  // the minimum of the clamp min/max range.
  bool IsMax = (Opcode == ISD::SMAX);
  ConstantSDNode *CstLow = nullptr, *CstHigh = nullptr;
  if ((CstLow = isConstOrConstSplat(Op.getOperand(1), DemandedElts)))
    if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
      CstHigh =
          isConstOrConstSplat(Op.getOperand(0).getOperand(1), DemandedElts);
  if (CstLow && CstHigh) {
    if (!IsMax)
      std::swap(CstLow, CstHigh);

    const APInt &ValueLow = CstLow->getAPIntValue();
    const APInt &ValueHigh = CstHigh->getAPIntValue();
    if (ValueLow.sle(ValueHigh)) {
      unsigned LowSignBits = ValueLow.getNumSignBits();
      unsigned HighSignBits = ValueHigh.getNumSignBits();
      unsigned MinSignBits = std::min(LowSignBits, HighSignBits);
      if (ValueLow.isNegative() && ValueHigh.isNegative()) {
        Known.One.setHighBits(MinSignBits);
        break;
      }
      if (ValueLow.isNonNegative() && ValueHigh.isNonNegative()) {
        Known.Zero.setHighBits(MinSignBits);
        break;
      }
    }
  }

  // Fallback - just get the shared known bits of the operands.
  Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
  if (Known.isUnknown()) break; // Early-out
  Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
  Known.Zero &= Known2.Zero;
  Known.One &= Known2.One;
  break;
}
case ISD::FrameIndex:
case ISD::TargetFrameIndex:
  TLI->computeKnownBitsForFrameIndex(Op, Known, DemandedElts, *this, Depth);
  break;

default:
  if (Opcode < ISD::BUILTIN_OP_END)
    break;
  LLVM_FALLTHROUGH[[gnu::fallthrough]];
case ISD::INTRINSIC_WO_CHAIN:
case ISD::INTRINSIC_W_CHAIN:
case ISD::INTRINSIC_VOID:
  // Allow the target to implement this method for its nodes.
  TLI->computeKnownBitsForTargetNode(Op, Known, DemandedElts, *this, Depth);
  break;
}

assert(!Known.hasConflict() && "Bits known to be one AND zero?")((!Known.hasConflict() && "Bits known to be one AND zero?"
) ? static_cast<void> (0) : __assert_fail ("!Known.hasConflict() && \"Bits known to be one AND zero?\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3324, __PRETTY_FUNCTION__));
return Known;
3326}

3328SelectionDAG::OverflowKind SelectionDAG::computeOverflowKind(SDValue N0,
                                                           SDValue N1) const {
// X + 0 never overflow
if (isNullConstant(N1))
  return OFK_Never;

KnownBits N1Known = computeKnownBits(N1);
if (N1Known.Zero.getBoolValue()) {
  KnownBits N0Known = computeKnownBits(N0);

  bool overflow;
  (void)(~N0Known.Zero).uadd_ov(~N1Known.Zero, overflow);
  if (!overflow)
    return OFK_Never;
}

// mulhi + 1 never overflow
if (N0.getOpcode() == ISD::UMUL_LOHI && N0.getResNo() == 1 &&
    (~N1Known.Zero & 0x01) == ~N1Known.Zero)
  return OFK_Never;

if (N1.getOpcode() == ISD::UMUL_LOHI && N1.getResNo() == 1) {
  KnownBits N0Known = computeKnownBits(N0);

  if ((~N0Known.Zero & 0x01) == ~N0Known.Zero)
    return OFK_Never;
}

return OFK_Sometime;
3357}

3359bool SelectionDAG::isKnownToBeAPowerOfTwo(SDValue Val) const {
EVT OpVT = Val.getValueType();
unsigned BitWidth = OpVT.getScalarSizeInBits();

// Is the constant a known power of 2?
if (ConstantSDNode *Const = dyn_cast<ConstantSDNode>(Val))
  return Const->getAPIntValue().zextOrTrunc(BitWidth).isPowerOf2();

// A left-shift of a constant one will have exactly one bit set because
// shifting the bit off the end is undefined.
if (Val.getOpcode() == ISD::SHL) {
  auto *C = isConstOrConstSplat(Val.getOperand(0));
  if (C && C->getAPIntValue() == 1)
    return true;
}

// Similarly, a logical right-shift of a constant sign-bit will have exactly
// one bit set.
if (Val.getOpcode() == ISD::SRL) {
  auto *C = isConstOrConstSplat(Val.getOperand(0));
  if (C && C->getAPIntValue().isSignMask())
    return true;
}

// Are all operands of a build vector constant powers of two?
if (Val.getOpcode() == ISD::BUILD_VECTOR)
  if (llvm::all_of(Val->ops(), [BitWidth](SDValue E) {
        if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(E))
          return C->getAPIntValue().zextOrTrunc(BitWidth).isPowerOf2();
        return false;
      }))
    return true;

// More could be done here, though the above checks are enough
// to handle some common cases.

// Fall back to computeKnownBits to catch other known cases.
KnownBits Known = computeKnownBits(Val);
return (Known.countMaxPopulation() == 1) && (Known.countMinPopulation() == 1);
3398}

3400unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const {
EVT VT = Op.getValueType();
APInt DemandedElts = VT.isVector()
                         ? APInt::getAllOnesValue(VT.getVectorNumElements())
                         : APInt(1, 1);
return ComputeNumSignBits(Op, DemandedElts, Depth);
3406}

3408unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
                                        unsigned Depth) const {
EVT VT = Op.getValueType();
assert((VT.isInteger() || VT.isFloatingPoint()) && "Invalid VT!")(((VT.isInteger() || VT.isFloatingPoint()) && "Invalid VT!"
) ? static_cast<void> (0) : __assert_fail ("(VT.isInteger() || VT.isFloatingPoint()) && \"Invalid VT!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3411, __PRETTY_FUNCTION__));
unsigned VTBits = VT.getScalarSizeInBits();
unsigned NumElts = DemandedElts.getBitWidth();
unsigned Tmp, Tmp2;
unsigned FirstAnswer = 1;

if (auto *C = dyn_cast<ConstantSDNode>(Op)) {
  const APInt &Val = C->getAPIntValue();
  return Val.getNumSignBits();
}

if (Depth >= MaxRecursionDepth)
  return 1;  // Limit search depth.

if (!DemandedElts)
  return 1;  // No demanded elts, better to assume we don't know anything.

unsigned Opcode = Op.getOpcode();
switch (Opcode) {
default: break;
case ISD::AssertSext:
  Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
  return VTBits-Tmp+1;
case ISD::AssertZext:
  Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
  return VTBits-Tmp;

case ISD::BUILD_VECTOR:
  Tmp = VTBits;
  for (unsigned i = 0, e = Op.getNumOperands(); (i < e) && (Tmp > 1); ++i) {
    if (!DemandedElts[i])
      continue;

    SDValue SrcOp = Op.getOperand(i);
    Tmp2 = ComputeNumSignBits(Op.getOperand(i), Depth + 1);

    // BUILD_VECTOR can implicitly truncate sources, we must handle this.
    if (SrcOp.getValueSizeInBits() != VTBits) {
      assert(SrcOp.getValueSizeInBits() > VTBits &&((SrcOp.getValueSizeInBits() > VTBits && "Expected BUILD_VECTOR implicit truncation"
) ? static_cast<void> (0) : __assert_fail ("SrcOp.getValueSizeInBits() > VTBits && \"Expected BUILD_VECTOR implicit truncation\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3450, __PRETTY_FUNCTION__))
             "Expected BUILD_VECTOR implicit truncation")((SrcOp.getValueSizeInBits() > VTBits && "Expected BUILD_VECTOR implicit truncation"
) ? static_cast<void> (0) : __assert_fail ("SrcOp.getValueSizeInBits() > VTBits && \"Expected BUILD_VECTOR implicit truncation\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3450, __PRETTY_FUNCTION__));
      unsigned ExtraBits = SrcOp.getValueSizeInBits() - VTBits;
      Tmp2 = (Tmp2 > ExtraBits ? Tmp2 - ExtraBits : 1);
    }
    Tmp = std::min(Tmp, Tmp2);
  }
  return Tmp;

case ISD::VECTOR_SHUFFLE: {
  // Collect the minimum number of sign bits that are shared by every vector
  // element referenced by the shuffle.
  APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0);
  const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op);
  assert(NumElts == SVN->getMask().size() && "Unexpected vector size")((NumElts == SVN->getMask().size() && "Unexpected vector size"
) ? static_cast<void> (0) : __assert_fail ("NumElts == SVN->getMask().size() && \"Unexpected vector size\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3463, __PRETTY_FUNCTION__));
  for (unsigned i = 0; i != NumElts; ++i) {
    int M = SVN->getMaskElt(i);
    if (!DemandedElts[i])
      continue;
    // For UNDEF elements, we don't know anything about the common state of
    // the shuffle result.
    if (M < 0)
      return 1;
    if ((unsigned)M < NumElts)
      DemandedLHS.setBit((unsigned)M % NumElts);
    else
      DemandedRHS.setBit((unsigned)M % NumElts);
  }
  Tmp = std::numeric_limits<unsigned>::max();
  if (!!DemandedLHS)
    Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedLHS, Depth + 1);
  if (!!DemandedRHS) {
    Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedRHS, Depth + 1);
    Tmp = std::min(Tmp, Tmp2);
  }
  // If we don't know anything, early out and try computeKnownBits fall-back.
  if (Tmp == 1)
    break;
  assert(Tmp <= VTBits && "Failed to determine minimum sign bits")((Tmp <= VTBits && "Failed to determine minimum sign bits"
) ? static_cast<void> (0) : __assert_fail ("Tmp <= VTBits && \"Failed to determine minimum sign bits\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3487, __PRETTY_FUNCTION__));
  return Tmp;
}

case ISD::BITCAST: {
  SDValue N0 = Op.getOperand(0);
  EVT SrcVT = N0.getValueType();
  unsigned SrcBits = SrcVT.getScalarSizeInBits();

  // Ignore bitcasts from unsupported types..
  if (!(SrcVT.isInteger() || SrcVT.isFloatingPoint()))
    break;

  // Fast handling of 'identity' bitcasts.
  if (VTBits == SrcBits)
    return ComputeNumSignBits(N0, DemandedElts, Depth + 1);

  bool IsLE = getDataLayout().isLittleEndian();

  // Bitcast 'large element' scalar/vector to 'small element' vector.
  if ((SrcBits % VTBits) == 0) {
    assert(VT.isVector() && "Expected bitcast to vector")((VT.isVector() && "Expected bitcast to vector") ? static_cast
<void> (0) : __assert_fail ("VT.isVector() && \"Expected bitcast to vector\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3508, __PRETTY_FUNCTION__));

    unsigned Scale = SrcBits / VTBits;
    APInt SrcDemandedElts(NumElts / Scale, 0);
    for (unsigned i = 0; i != NumElts; ++i)
      if (DemandedElts[i])
        SrcDemandedElts.setBit(i / Scale);

    // Fast case - sign splat can be simply split across the small elements.
    Tmp = ComputeNumSignBits(N0, SrcDemandedElts, Depth + 1);
    if (Tmp == SrcBits)
      return VTBits;

    // Slow case - determine how far the sign extends into each sub-element.
    Tmp2 = VTBits;
    for (unsigned i = 0; i != NumElts; ++i)
      if (DemandedElts[i]) {
        unsigned SubOffset = i % Scale;
        SubOffset = (IsLE ? ((Scale - 1) - SubOffset) : SubOffset);
        SubOffset = SubOffset * VTBits;
        if (Tmp <= SubOffset)
          return 1;
        Tmp2 = std::min(Tmp2, Tmp - SubOffset);
      }
    return Tmp2;
  }
  break;
}

case ISD::SIGN_EXTEND:
  Tmp = VTBits - Op.getOperand(0).getScalarValueSizeInBits();
  return ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1) + Tmp;
case ISD::SIGN_EXTEND_INREG:
  // Max of the input and what this extends.
  Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarSizeInBits();
  Tmp = VTBits-Tmp+1;
  Tmp2 = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
  return std::max(Tmp, Tmp2);
case ISD::SIGN_EXTEND_VECTOR_INREG: {
  SDValue Src = Op.getOperand(0);
  EVT SrcVT = Src.getValueType();
  APInt DemandedSrcElts = DemandedElts.zextOrSelf(SrcVT.getVectorNumElements());
  Tmp = VTBits - SrcVT.getScalarSizeInBits();
  return ComputeNumSignBits(Src, DemandedSrcElts, Depth+1) + Tmp;
}

case ISD::SRA:
  Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
  // SRA X, C   -> adds C sign bits.
  if (ConstantSDNode *C =
          isConstOrConstSplat(Op.getOperand(1), DemandedElts)) {
    APInt ShiftVal = C->getAPIntValue();
    ShiftVal += Tmp;
    Tmp = ShiftVal.uge(VTBits) ? VTBits : ShiftVal.getZExtValue();
  }
  return Tmp;
case ISD::SHL:
  if (ConstantSDNode *C =
          isConstOrConstSplat(Op.getOperand(1), DemandedElts)) {
    // shl destroys sign bits.
    Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
    if (C->getAPIntValue().uge(VTBits) ||      // Bad shift.
        C->getAPIntValue().uge(Tmp)) break;    // Shifted all sign bits out.
    return Tmp - C->getZExtValue();
  }
  break;
case ISD::AND:
case ISD::OR:
case ISD::XOR:    // NOT is handled here.
  // Logical binary ops preserve the number of sign bits at the worst.
  Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
  if (Tmp != 1) {
    Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth+1);
    FirstAnswer = std::min(Tmp, Tmp2);
    // We computed what we know about the sign bits as our first
    // answer. Now proceed to the generic code that uses
    // computeKnownBits, and pick whichever answer is better.
  }
  break;

case ISD::SELECT:
case ISD::VSELECT:
  Tmp = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth+1);
  if (Tmp == 1) return 1;  // Early out.
  Tmp2 = ComputeNumSignBits(Op.getOperand(2), DemandedElts, Depth+1);
  return std::min(Tmp, Tmp2);
case ISD::SELECT_CC:
  Tmp = ComputeNumSignBits(Op.getOperand(2), DemandedElts, Depth+1);
  if (Tmp == 1) return 1;  // Early out.
  Tmp2 = ComputeNumSignBits(Op.getOperand(3), DemandedElts, Depth+1);
  return std::min(Tmp, Tmp2);

case ISD::SMIN:
case ISD::SMAX: {
  // If we have a clamp pattern, we know that the number of sign bits will be
  // the minimum of the clamp min/max range.
  bool IsMax = (Opcode == ISD::SMAX);
  ConstantSDNode *CstLow = nullptr, *CstHigh = nullptr;
  if ((CstLow = isConstOrConstSplat(Op.getOperand(1), DemandedElts)))
    if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
      CstHigh =
          isConstOrConstSplat(Op.getOperand(0).getOperand(1), DemandedElts);
  if (CstLow && CstHigh) {
    if (!IsMax)
      std::swap(CstLow, CstHigh);
    if (CstLow->getAPIntValue().sle(CstHigh->getAPIntValue())) {
      Tmp = CstLow->getAPIntValue().getNumSignBits();
      Tmp2 = CstHigh->getAPIntValue().getNumSignBits();
      return std::min(Tmp, Tmp2);
    }
  }

  // Fallback - just get the minimum number of sign bits of the operands.
  Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
  if (Tmp == 1)
    return 1;  // Early out.
  Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
  return std::min(Tmp, Tmp2);
}
case ISD::UMIN:
case ISD::UMAX:
  Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
  if (Tmp == 1)
    return 1;  // Early out.
  Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
  return std::min(Tmp, Tmp2);
case ISD::SADDO:
case ISD::UADDO:
case ISD::SSUBO:
case ISD::USUBO:
case ISD::SMULO:
case ISD::UMULO:
  if (Op.getResNo() != 1)
    break;
  // The boolean result conforms to getBooleanContents.  Fall through.
  // If setcc returns 0/-1, all bits are sign bits.
  // We know that we have an integer-based boolean since these operations
  // are only available for integer.
  if (TLI->getBooleanContents(VT.isVector(), false) ==
      TargetLowering::ZeroOrNegativeOneBooleanContent)
    return VTBits;
  break;
case ISD::SETCC:
  // If setcc returns 0/-1, all bits are sign bits.
  if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
      TargetLowering::ZeroOrNegativeOneBooleanContent)
    return VTBits;
  break;
case ISD::ROTL:
case ISD::ROTR:
  if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
    unsigned RotAmt = C->getAPIntValue().urem(VTBits);

    // Handle rotate right by N like a rotate left by 32-N.
    if (Opcode == ISD::ROTR)
      RotAmt = (VTBits - RotAmt) % VTBits;

    // If we aren't rotating out all of the known-in sign bits, return the
    // number that are left.  This handles rotl(sext(x), 1) for example.
    Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
    if (Tmp > (RotAmt + 1)) return (Tmp - RotAmt);
  }
  break;
case ISD::ADD:
case ISD::ADDC:
  // Add can have at most one carry bit.  Thus we know that the output
  // is, at worst, one more bit than the inputs.
  Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
  if (Tmp == 1) return 1;  // Early out.

  // Special case decrementing a value (ADD X, -1):
  if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
    if (CRHS->isAllOnesValue()) {
      KnownBits Known = computeKnownBits(Op.getOperand(0), Depth+1);

      // If the input is known to be 0 or 1, the output is 0/-1, which is all
      // sign bits set.
      if ((Known.Zero | 1).isAllOnesValue())
        return VTBits;

      // If we are subtracting one from a positive number, there is no carry
      // out of the result.
      if (Known.isNonNegative())
        return Tmp;
    }

  Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
  if (Tmp2 == 1) return 1;
  return std::min(Tmp, Tmp2)-1;

case ISD::SUB:
  Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
  if (Tmp2 == 1) return 1;

  // Handle NEG.
  if (ConstantSDNode *CLHS = isConstOrConstSplat(Op.getOperand(0)))
    if (CLHS->isNullValue()) {
      KnownBits Known = computeKnownBits(Op.getOperand(1), Depth+1);
      // If the input is known to be 0 or 1, the output is 0/-1, which is all
      // sign bits set.
      if ((Known.Zero | 1).isAllOnesValue())
        return VTBits;

      // If the input is known to be positive (the sign bit is known clear),
      // the output of the NEG has the same number of sign bits as the input.
      if (Known.isNonNegative())
        return Tmp2;

      // Otherwise, we treat this like a SUB.
    }

  // Sub can have at most one carry bit.  Thus we know that the output
  // is, at worst, one more bit than the inputs.
  Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
  if (Tmp == 1) return 1;  // Early out.
  return std::min(Tmp, Tmp2)-1;
case ISD::MUL: {
  // The output of the Mul can be at most twice the valid bits in the inputs.
  unsigned SignBitsOp0 = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
  if (SignBitsOp0 == 1)
    break;
  unsigned SignBitsOp1 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
  if (SignBitsOp1 == 1)
    break;
  unsigned OutValidBits =
      (VTBits - SignBitsOp0 + 1) + (VTBits - SignBitsOp1 + 1);
  return OutValidBits > VTBits ? 1 : VTBits - OutValidBits + 1;
}
case ISD::TRUNCATE: {
  // Check if the sign bits of source go down as far as the truncated value.
  unsigned NumSrcBits = Op.getOperand(0).getScalarValueSizeInBits();
  unsigned NumSrcSignBits = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
  if (NumSrcSignBits > (NumSrcBits - VTBits))
    return NumSrcSignBits - (NumSrcBits - VTBits);
  break;
}
case ISD::EXTRACT_ELEMENT: {
  const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
  const int BitWidth = Op.getValueSizeInBits();
  const int Items = Op.getOperand(0).getValueSizeInBits() / BitWidth;

  // Get reverse index (starting from 1), Op1 value indexes elements from
  // little end. Sign starts at big end.
  const int rIndex = Items - 1 - Op.getConstantOperandVal(1);

  // If the sign portion ends in our element the subtraction gives correct
  // result. Otherwise it gives either negative or > bitwidth result
  return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
}
case ISD::INSERT_VECTOR_ELT: {
  SDValue InVec = Op.getOperand(0);
  SDValue InVal = Op.getOperand(1);
  SDValue EltNo = Op.getOperand(2);

  ConstantSDNode *CEltNo = dyn_cast<ConstantSDNode>(EltNo);
  if (CEltNo && CEltNo->getAPIntValue().ult(NumElts)) {
    // If we know the element index, split the demand between the
    // source vector and the inserted element.
    unsigned EltIdx = CEltNo->getZExtValue();

    // If we demand the inserted element then get its sign bits.
    Tmp = std::numeric_limits<unsigned>::max();
    if (DemandedElts[EltIdx]) {
      // TODO - handle implicit truncation of inserted elements.
      if (InVal.getScalarValueSizeInBits() != VTBits)
        break;
      Tmp = ComputeNumSignBits(InVal, Depth + 1);
    }

    // If we demand the source vector then get its sign bits, and determine
    // the minimum.
    APInt VectorElts = DemandedElts;
    VectorElts.clearBit(EltIdx);
    if (!!VectorElts) {
      Tmp2 = ComputeNumSignBits(InVec, VectorElts, Depth + 1);
      Tmp = std::min(Tmp, Tmp2);
    }
  } else {
    // Unknown element index, so ignore DemandedElts and demand them all.
    Tmp = ComputeNumSignBits(InVec, Depth + 1);
    Tmp2 = ComputeNumSignBits(InVal, Depth + 1);
    Tmp = std::min(Tmp, Tmp2);
  }
  assert(Tmp <= VTBits && "Failed to determine minimum sign bits")((Tmp <= VTBits && "Failed to determine minimum sign bits"
) ? static_cast<void> (0) : __assert_fail ("Tmp <= VTBits && \"Failed to determine minimum sign bits\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3791, __PRETTY_FUNCTION__));
  return Tmp;
}
case ISD::EXTRACT_VECTOR_ELT: {
  SDValue InVec = Op.getOperand(0);
  SDValue EltNo = Op.getOperand(1);
  EVT VecVT = InVec.getValueType();
  const unsigned BitWidth = Op.getValueSizeInBits();
  const unsigned EltBitWidth = Op.getOperand(0).getScalarValueSizeInBits();
  const unsigned NumSrcElts = VecVT.getVectorNumElements();

  // If BitWidth > EltBitWidth the value is anyext:ed, and we do not know
  // anything about sign bits. But if the sizes match we can derive knowledge
  // about sign bits from the vector operand.
  if (BitWidth != EltBitWidth)
    break;

  // If we know the element index, just demand that vector element, else for
  // an unknown element index, ignore DemandedElts and demand them all.
  APInt DemandedSrcElts = APInt::getAllOnesValue(NumSrcElts);
  ConstantSDNode *ConstEltNo = dyn_cast<ConstantSDNode>(EltNo);
  if (ConstEltNo && ConstEltNo->getAPIntValue().ult(NumSrcElts))
    DemandedSrcElts =
        APInt::getOneBitSet(NumSrcElts, ConstEltNo->getZExtValue());

  return ComputeNumSignBits(InVec, DemandedSrcElts, Depth + 1);
}
case ISD::EXTRACT_SUBVECTOR: {
  // If we know the element index, just demand that subvector elements,
  // otherwise demand them all.
  SDValue Src = Op.getOperand(0);
  ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
  unsigned NumSrcElts = Src.getValueType().getVectorNumElements();
  APInt DemandedSrc = APInt::getAllOnesValue(NumSrcElts);
  if (SubIdx && SubIdx->getAPIntValue().ule(NumSrcElts - NumElts)) {
    // Offset the demanded elts by the subvector index.
    uint64_t Idx = SubIdx->getZExtValue();
    DemandedSrc = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx);
  }
  return ComputeNumSignBits(Src, DemandedSrc, Depth + 1);
}
case ISD::CONCAT_VECTORS: {
  // Determine the minimum number of sign bits across all demanded
  // elts of the input vectors. Early out if the result is already 1.
  Tmp = std::numeric_limits<unsigned>::max();
  EVT SubVectorVT = Op.getOperand(0).getValueType();
  unsigned NumSubVectorElts = SubVectorVT.getVectorNumElements();
  unsigned NumSubVectors = Op.getNumOperands();
  for (unsigned i = 0; (i < NumSubVectors) && (Tmp > 1); ++i) {
    APInt DemandedSub = DemandedElts.lshr(i * NumSubVectorElts);
    DemandedSub = DemandedSub.trunc(NumSubVectorElts);
    if (!DemandedSub)
      continue;
    Tmp2 = ComputeNumSignBits(Op.getOperand(i), DemandedSub, Depth + 1);
    Tmp = std::min(Tmp, Tmp2);
  }
  assert(Tmp <= VTBits && "Failed to determine minimum sign bits")((Tmp <= VTBits && "Failed to determine minimum sign bits"
) ? static_cast<void> (0) : __assert_fail ("Tmp <= VTBits && \"Failed to determine minimum sign bits\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3847, __PRETTY_FUNCTION__));
  return Tmp;
}
case ISD::INSERT_SUBVECTOR: {
  // If we know the element index, demand any elements from the subvector and
  // the remainder from the src its inserted into, otherwise demand them all.
  SDValue Src = Op.getOperand(0);
  SDValue Sub = Op.getOperand(1);
  auto *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
  unsigned NumSubElts = Sub.getValueType().getVectorNumElements();
  if (SubIdx && SubIdx->getAPIntValue().ule(NumElts - NumSubElts)) {
    Tmp = std::numeric_limits<unsigned>::max();
    uint64_t Idx = SubIdx->getZExtValue();
    APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx);
    if (!!DemandedSubElts) {
      Tmp = ComputeNumSignBits(Sub, DemandedSubElts, Depth + 1);
      if (Tmp == 1) return 1; // early-out
    }
    APInt SubMask = APInt::getBitsSet(NumElts, Idx, Idx + NumSubElts);
    APInt DemandedSrcElts = DemandedElts & ~SubMask;
    if (!!DemandedSrcElts) {
      Tmp2 = ComputeNumSignBits(Src, DemandedSrcElts, Depth + 1);
      Tmp = std::min(Tmp, Tmp2);
    }
    assert(Tmp <= VTBits && "Failed to determine minimum sign bits")((Tmp <= VTBits && "Failed to determine minimum sign bits"
) ? static_cast<void> (0) : __assert_fail ("Tmp <= VTBits && \"Failed to determine minimum sign bits\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3871, __PRETTY_FUNCTION__));
    return Tmp;
  }

  // Not able to determine the index so just assume worst case.
  Tmp = ComputeNumSignBits(Sub, Depth + 1);
  if (Tmp == 1) return 1; // early-out
  Tmp2 = ComputeNumSignBits(Src, Depth + 1);
  Tmp = std::min(Tmp, Tmp2);
  assert(Tmp <= VTBits && "Failed to determine minimum sign bits")((Tmp <= VTBits && "Failed to determine minimum sign bits"
) ? static_cast<void> (0) : __assert_fail ("Tmp <= VTBits && \"Failed to determine minimum sign bits\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3880, __PRETTY_FUNCTION__));
  return Tmp;
}
}

// If we are looking at the loaded value of the SDNode.
if (Op.getResNo() == 0) {
  // Handle LOADX separately here. EXTLOAD case will fallthrough.
  if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
    unsigned ExtType = LD->getExtensionType();
    switch (ExtType) {
    default: break;
    case ISD::SEXTLOAD: // e.g. i16->i32 = '17' bits known.
      Tmp = LD->getMemoryVT().getScalarSizeInBits();
      return VTBits - Tmp + 1;
    case ISD::ZEXTLOAD: // e.g. i16->i32 = '16' bits known.
      Tmp = LD->getMemoryVT().getScalarSizeInBits();
      return VTBits - Tmp;
    case ISD::NON_EXTLOAD:
      if (const Constant *Cst = TLI->getTargetConstantFromLoad(LD)) {
        // We only need to handle vectors - computeKnownBits should handle
        // scalar cases.
        Type *CstTy = Cst->getType();
        if (CstTy->isVectorTy() &&
            (NumElts * VTBits) == CstTy->getPrimitiveSizeInBits()) {
          Tmp = VTBits;
          for (unsigned i = 0; i != NumElts; ++i) {
            if (!DemandedElts[i])
              continue;
            if (Constant *Elt = Cst->getAggregateElement(i)) {
              if (auto *CInt = dyn_cast<ConstantInt>(Elt)) {
                const APInt &Value = CInt->getValue();
                Tmp = std::min(Tmp, Value.getNumSignBits());
                continue;
              }
              if (auto *CFP = dyn_cast<ConstantFP>(Elt)) {
                APInt Value = CFP->getValueAPF().bitcastToAPInt();
                Tmp = std::min(Tmp, Value.getNumSignBits());
                continue;
              }
            }
            // Unknown type. Conservatively assume no bits match sign bit.
            return 1;
          }
          return Tmp;
        }
      }
      break;
    }
  }
}

// Allow the target to implement this method for its nodes.
if (Opcode >= ISD::BUILTIN_OP_END ||
    Opcode == ISD::INTRINSIC_WO_CHAIN ||
    Opcode == ISD::INTRINSIC_W_CHAIN ||
    Opcode == ISD::INTRINSIC_VOID) {
  unsigned NumBits =
      TLI->ComputeNumSignBitsForTargetNode(Op, DemandedElts, *this, Depth);
  if (NumBits > 1)
    FirstAnswer = std::max(FirstAnswer, NumBits);
}

// Finally, if we can prove that the top bits of the result are 0's or 1's,
// use this information.
KnownBits Known = computeKnownBits(Op, DemandedElts, Depth);

APInt Mask;
if (Known.isNonNegative()) {        // sign bit is 0
  Mask = Known.Zero;
} else if (Known.isNegative()) {  // sign bit is 1;
  Mask = Known.One;
} else {
  // Nothing known.
  return FirstAnswer;
}

// Okay, we know that the sign bit in Mask is set.  Use CLZ to determine
// the number of identical bits in the top of the input value.
Mask = ~Mask;
Mask <<= Mask.getBitWidth()-VTBits;
// Return # leading zeros.  We use 'min' here in case Val was zero before
// shifting.  We don't want to return '64' as for an i32 "0".
return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
3964}

3966bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
    !isa<ConstantSDNode>(Op.getOperand(1)))
  return false;

if (Op.getOpcode() == ISD::OR &&
    !MaskedValueIsZero(Op.getOperand(0), Op.getConstantOperandAPInt(1)))
  return false;

return true;
3976}

3978bool SelectionDAG::isKnownNeverNaN(SDValue Op, bool SNaN, unsigned Depth) const {
// If we're told that NaNs won't happen, assume they won't.
if (getTarget().Options.NoNaNsFPMath || Op->getFlags().hasNoNaNs())
  return true;

if (Depth >= MaxRecursionDepth)
  return false; // Limit search depth.

// TODO: Handle vectors.
// If the value is a constant, we can obviously see if it is a NaN or not.
if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) {
  return !C->getValueAPF().isNaN() ||
         (SNaN && !C->getValueAPF().isSignaling());
}

unsigned Opcode = Op.getOpcode();
switch (Opcode) {
case ISD::FADD:
case ISD::FSUB:
case ISD::FMUL:
case ISD::FDIV:
case ISD::FREM:
case ISD::FSIN:
case ISD::FCOS: {
  if (SNaN)
    return true;
  // TODO: Need isKnownNeverInfinity
  return false;
}
case ISD::FCANONICALIZE:
case ISD::FEXP:
case ISD::FEXP2:
case ISD::FTRUNC:
case ISD::FFLOOR:
case ISD::FCEIL:
case ISD::FROUND:
case ISD::FRINT:
case ISD::FNEARBYINT: {
  if (SNaN)
    return true;
  return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
}
case ISD::FABS:
case ISD::FNEG:
case ISD::FCOPYSIGN: {
  return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
}
case ISD::SELECT:
  return isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
         isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
case ISD::FP_EXTEND:
case ISD::FP_ROUND: {
  if (SNaN)
    return true;
  return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
}
case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP:
  return true;
case ISD::FMA:
case ISD::FMAD: {
  if (SNaN)
    return true;
  return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) &&
         isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
         isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
}
case ISD::FSQRT: // Need is known positive
case ISD::FLOG:
case ISD::FLOG2:
case ISD::FLOG10:
case ISD::FPOWI:
case ISD::FPOW: {
  if (SNaN)
    return true;
  // TODO: Refine on operand
  return false;
}
case ISD::FMINNUM:
case ISD::FMAXNUM: {
  // Only one needs to be known not-nan, since it will be returned if the
  // other ends up being one.
  return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) ||
         isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1);
}
case ISD::FMINNUM_IEEE:
case ISD::FMAXNUM_IEEE: {
  if (SNaN)
    return true;
  // This can return a NaN if either operand is an sNaN, or if both operands
  // are NaN.
  return (isKnownNeverNaN(Op.getOperand(0), false, Depth + 1) &&
          isKnownNeverSNaN(Op.getOperand(1), Depth + 1)) ||
         (isKnownNeverNaN(Op.getOperand(1), false, Depth + 1) &&
          isKnownNeverSNaN(Op.getOperand(0), Depth + 1));
}
case ISD::FMINIMUM:
case ISD::FMAXIMUM: {
  // TODO: Does this quiet or return the origina NaN as-is?
  return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) &&
         isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1);
}
case ISD::EXTRACT_VECTOR_ELT: {
  return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
}
default:
  if (Opcode >= ISD::BUILTIN_OP_END ||
      Opcode == ISD::INTRINSIC_WO_CHAIN ||
      Opcode == ISD::INTRINSIC_W_CHAIN ||
      Opcode == ISD::INTRINSIC_VOID) {
    return TLI->isKnownNeverNaNForTargetNode(Op, *this, SNaN, Depth);
  }

  return false;
}
4093}

4095bool SelectionDAG::isKnownNeverZeroFloat(SDValue Op) const {
assert(Op.getValueType().isFloatingPoint() &&((Op.getValueType().isFloatingPoint() && "Floating point type expected"
) ? static_cast<void> (0) : __assert_fail ("Op.getValueType().isFloatingPoint() && \"Floating point type expected\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4097, __PRETTY_FUNCTION__))
       "Floating point type expected")((Op.getValueType().isFloatingPoint() && "Floating point type expected"
) ? static_cast<void> (0) : __assert_fail ("Op.getValueType().isFloatingPoint() && \"Floating point type expected\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4097, __PRETTY_FUNCTION__));

// If the value is a constant, we can obviously see if it is a zero or not.
// TODO: Add BuildVector support.
if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
  return !C->isZero();
return false;
4104}

4106bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
assert(!Op.getValueType().isFloatingPoint() &&((!Op.getValueType().isFloatingPoint() && "Floating point types unsupported - use isKnownNeverZeroFloat"
) ? static_cast<void> (0) : __assert_fail ("!Op.getValueType().isFloatingPoint() && \"Floating point types unsupported - use isKnownNeverZeroFloat\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4108, __PRETTY_FUNCTION__))
       "Floating point types unsupported - use isKnownNeverZeroFloat")((!Op.getValueType().isFloatingPoint() && "Floating point types unsupported - use isKnownNeverZeroFloat"
) ? static_cast<void> (0) : __assert_fail ("!Op.getValueType().isFloatingPoint() && \"Floating point types unsupported - use isKnownNeverZeroFloat\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4108, __PRETTY_FUNCTION__));

// If the value is a constant, we can obviously see if it is a zero or not.
if (ISD::matchUnaryPredicate(
        Op, [](ConstantSDNode *C) { return !C->isNullValue(); }))
  return true;

// TODO: Recognize more cases here.
switch (Op.getOpcode()) {
default: break;
case ISD::OR:
  if (isKnownNeverZero(Op.getOperand(1)) ||
      isKnownNeverZero(Op.getOperand(0)))
    return true;
  break;
}

return false;
4126}

4128bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
// Check the obvious case.
if (A == B) return true;

// For for negative and positive zero.
if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
  if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
    if (CA->isZero() && CB->isZero()) return true;

// Otherwise they may not be equal.
return false;
4139}

4141// FIXME: unify with llvm::haveNoCommonBitsSet.
4142// FIXME: could also handle masked merge pattern (X & ~M) op (Y & M)
4143bool SelectionDAG::haveNoCommonBitsSet(SDValue A, SDValue B) const {
assert(A.getValueType() == B.getValueType() &&((A.getValueType() == B.getValueType() && "Values must have the same type"
) ? static_cast<void> (0) : __assert_fail ("A.getValueType() == B.getValueType() && \"Values must have the same type\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4145, __PRETTY_FUNCTION__))
       "Values must have the same type")((A.getValueType() == B.getValueType() && "Values must have the same type"
) ? static_cast<void> (0) : __assert_fail ("A.getValueType() == B.getValueType() && \"Values must have the same type\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4145, __PRETTY_FUNCTION__));
return (computeKnownBits(A).Zero | computeKnownBits(B).Zero).isAllOnesValue();
4147}

4149static SDValue FoldBUILD_VECTOR(const SDLoc &DL, EVT VT,
                              ArrayRef<SDValue> Ops,
                              SelectionDAG &DAG) {
int NumOps = Ops.size();
assert(NumOps != 0 && "Can't build an empty vector!")((NumOps != 0 && "Can't build an empty vector!") ? static_cast
<void> (0) : __assert_fail ("NumOps != 0 && \"Can't build an empty vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4153, __PRETTY_FUNCTION__));
assert(VT.getVectorNumElements() == (unsigned)NumOps &&((VT.getVectorNumElements() == (unsigned)NumOps && "Incorrect element count in BUILD_VECTOR!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == (unsigned)NumOps && \"Incorrect element count in BUILD_VECTOR!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4155, __PRETTY_FUNCTION__))
       "Incorrect element count in BUILD_VECTOR!")((VT.getVectorNumElements() == (unsigned)NumOps && "Incorrect element count in BUILD_VECTOR!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == (unsigned)NumOps && \"Incorrect element count in BUILD_VECTOR!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4155, __PRETTY_FUNCTION__));

// BUILD_VECTOR of UNDEFs is UNDEF.
if (llvm::all_of(Ops, [](SDValue Op) { return Op.isUndef(); }))
  return DAG.getUNDEF(VT);

// BUILD_VECTOR of seq extract/insert from the same vector + type is Identity.
SDValue IdentitySrc;
bool IsIdentity = true;
for (int i = 0; i != NumOps; ++i) {
  if (Ops[i].getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
      Ops[i].getOperand(0).getValueType() != VT ||
      (IdentitySrc && Ops[i].getOperand(0) != IdentitySrc) ||
      !isa<ConstantSDNode>(Ops[i].getOperand(1)) ||
      cast<ConstantSDNode>(Ops[i].getOperand(1))->getAPIntValue() != i) {
    IsIdentity = false;
    break;
  }
  IdentitySrc = Ops[i].getOperand(0);
}
if (IsIdentity)
  return IdentitySrc;

return SDValue();
4179}

4181/// Try to simplify vector concatenation to an input value, undef, or build
4182/// vector.
4183static SDValue foldCONCAT_VECTORS(const SDLoc &DL, EVT VT,
                                ArrayRef<SDValue> Ops,
                                SelectionDAG &DAG) {
assert(!Ops.empty() && "Can't concatenate an empty list of vectors!")((!Ops.empty() && "Can't concatenate an empty list of vectors!"
) ? static_cast<void> (0) : __assert_fail ("!Ops.empty() && \"Can't concatenate an empty list of vectors!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4186, __PRETTY_FUNCTION__));
assert(llvm::all_of(Ops,((llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType
() == Op.getValueType(); }) && "Concatenation of vectors with inconsistent value types!"
) ? static_cast<void> (0) : __assert_fail ("llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType() == Op.getValueType(); }) && \"Concatenation of vectors with inconsistent value types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4191, __PRETTY_FUNCTION__))
                    [Ops](SDValue Op) {((llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType
() == Op.getValueType(); }) && "Concatenation of vectors with inconsistent value types!"
) ? static_cast<void> (0) : __assert_fail ("llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType() == Op.getValueType(); }) && \"Concatenation of vectors with inconsistent value types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4191, __PRETTY_FUNCTION__))
                      return Ops[0].getValueType() == Op.getValueType();((llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType
() == Op.getValueType(); }) && "Concatenation of vectors with inconsistent value types!"
) ? static_cast<void> (0) : __assert_fail ("llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType() == Op.getValueType(); }) && \"Concatenation of vectors with inconsistent value types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4191, __PRETTY_FUNCTION__))
                    }) &&((llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType
() == Op.getValueType(); }) && "Concatenation of vectors with inconsistent value types!"
) ? static_cast<void> (0) : __assert_fail ("llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType() == Op.getValueType(); }) && \"Concatenation of vectors with inconsistent value types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4191, __PRETTY_FUNCTION__))
       "Concatenation of vectors with inconsistent value types!")((llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType
() == Op.getValueType(); }) && "Concatenation of vectors with inconsistent value types!"
) ? static_cast<void> (0) : __assert_fail ("llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType() == Op.getValueType(); }) && \"Concatenation of vectors with inconsistent value types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4191, __PRETTY_FUNCTION__));
assert((Ops.size() * Ops[0].getValueType().getVectorNumElements()) ==(((Ops.size() * Ops[0].getValueType().getVectorNumElements())
 == VT.getVectorNumElements() && "Incorrect element count in vector concatenation!"
) ? static_cast<void> (0) : __assert_fail ("(Ops.size() * Ops[0].getValueType().getVectorNumElements()) == VT.getVectorNumElements() && \"Incorrect element count in vector concatenation!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4194, __PRETTY_FUNCTION__))
           VT.getVectorNumElements() &&(((Ops.size() * Ops[0].getValueType().getVectorNumElements())
 == VT.getVectorNumElements() && "Incorrect element count in vector concatenation!"
) ? static_cast<void> (0) : __assert_fail ("(Ops.size() * Ops[0].getValueType().getVectorNumElements()) == VT.getVectorNumElements() && \"Incorrect element count in vector concatenation!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4194, __PRETTY_FUNCTION__))
       "Incorrect element count in vector concatenation!")(((Ops.size() * Ops[0].getValueType().getVectorNumElements())
 == VT.getVectorNumElements() && "Incorrect element count in vector concatenation!"
) ? static_cast<void> (0) : __assert_fail ("(Ops.size() * Ops[0].getValueType().getVectorNumElements()) == VT.getVectorNumElements() && \"Incorrect element count in vector concatenation!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4194, __PRETTY_FUNCTION__));

if (Ops.size() == 1)
  return Ops[0];

// Concat of UNDEFs is UNDEF.
if (llvm::all_of(Ops, [](SDValue Op) { return Op.isUndef(); }))
  return DAG.getUNDEF(VT);

// Scan the operands and look for extract operations from a single source
// that correspond to insertion at the same location via this concatenation:
// concat (extract X, 0*subvec_elts), (extract X, 1*subvec_elts), ...
SDValue IdentitySrc;
bool IsIdentity = true;
for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
  SDValue Op = Ops[i];
  unsigned IdentityIndex = i * Op.getValueType().getVectorNumElements();
  if (Op.getOpcode() != ISD::EXTRACT_SUBVECTOR ||
      Op.getOperand(0).getValueType() != VT ||
      (IdentitySrc && Op.getOperand(0) != IdentitySrc) ||
      !isa<ConstantSDNode>(Op.getOperand(1)) ||
      Op.getConstantOperandVal(1) != IdentityIndex) {
    IsIdentity = false;
    break;
  }
  assert((!IdentitySrc || IdentitySrc == Op.getOperand(0)) &&(((!IdentitySrc || IdentitySrc == Op.getOperand(0)) &&
 "Unexpected identity source vector for concat of extracts") ?
 static_cast<void> (0) : __assert_fail ("(!IdentitySrc || IdentitySrc == Op.getOperand(0)) && \"Unexpected identity source vector for concat of extracts\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4220, __PRETTY_FUNCTION__))
         "Unexpected identity source vector for concat of extracts")(((!IdentitySrc || IdentitySrc == Op.getOperand(0)) &&
 "Unexpected identity source vector for concat of extracts") ?
 static_cast<void> (0) : __assert_fail ("(!IdentitySrc || IdentitySrc == Op.getOperand(0)) && \"Unexpected identity source vector for concat of extracts\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4220, __PRETTY_FUNCTION__));
  IdentitySrc = Op.getOperand(0);
}
if (IsIdentity) {
  assert(IdentitySrc && "Failed to set source vector of extracts")((IdentitySrc && "Failed to set source vector of extracts"
) ? static_cast<void> (0) : __assert_fail ("IdentitySrc && \"Failed to set source vector of extracts\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4224, __PRETTY_FUNCTION__));
  return IdentitySrc;
}

// A CONCAT_VECTOR with all UNDEF/BUILD_VECTOR operands can be
// simplified to one big BUILD_VECTOR.
// FIXME: Add support for SCALAR_TO_VECTOR as well.
EVT SVT = VT.getScalarType();
SmallVector<SDValue, 16> Elts;
for (SDValue Op : Ops) {
  EVT OpVT = Op.getValueType();
  if (Op.isUndef())
    Elts.append(OpVT.getVectorNumElements(), DAG.getUNDEF(SVT));
  else if (Op.getOpcode() == ISD::BUILD_VECTOR)
    Elts.append(Op->op_begin(), Op->op_end());
  else
    return SDValue();
}

// BUILD_VECTOR requires all inputs to be of the same type, find the
// maximum type and extend them all.
for (SDValue Op : Elts)
  SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);

if (SVT.bitsGT(VT.getScalarType()))
  for (SDValue &Op : Elts)
    Op = DAG.getTargetLoweringInfo().isZExtFree(Op.getValueType(), SVT)
             ? DAG.getZExtOrTrunc(Op, DL, SVT)
             : DAG.getSExtOrTrunc(Op, DL, SVT);

SDValue V = DAG.getBuildVector(VT, DL, Elts);
NewSDValueDbgMsg(V, "New node fold concat vectors: ", &DAG);
return V;
4257}

4259/// Gets or creates the specified node.
4260SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, getVTList(VT), None);
void *IP = nullptr;
if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
  return SDValue(E, 0);

auto *N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(),
                            getVTList(VT));
CSEMap.InsertNode(N, IP);

InsertNode(N);
SDValue V = SDValue(N, 0);
NewSDValueDbgMsg(V, "Creating new node: ", this);
return V;
4275}

4277SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
                            SDValue Operand, const SDNodeFlags Flags) {
// Constant fold unary operations with an integer constant operand. Even
// opaque constant will be folded, because the folding of unary operations
// doesn't create new constants with different values. Nevertheless, the
// opaque flag is preserved during folding to prevent future folding with
// other constants.
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand)) {
  const APInt &Val = C->getAPIntValue();
  switch (Opcode) {
  default: break;
  case ISD::SIGN_EXTEND:
    return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), DL, VT,
                       C->isTargetOpcode(), C->isOpaque());
  case ISD::TRUNCATE:
    if (C->isOpaque())
      break;
    LLVM_FALLTHROUGH[[gnu::fallthrough]];
  case ISD::ANY_EXTEND:
  case ISD::ZERO_EXTEND:
    return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), DL, VT,
                       C->isTargetOpcode(), C->isOpaque());
  case ISD::UINT_TO_FP:
  case ISD::SINT_TO_FP: {
    APFloat apf(EVTToAPFloatSemantics(VT),
                APInt::getNullValue(VT.getSizeInBits()));
    (void)apf.convertFromAPInt(Val,
                               Opcode==ISD::SINT_TO_FP,
                               APFloat::rmNearestTiesToEven);
    return getConstantFP(apf, DL, VT);
  }
  case ISD::BITCAST:
    if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
      return getConstantFP(APFloat(APFloat::IEEEhalf(), Val), DL, VT);
    if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
      return getConstantFP(APFloat(APFloat::IEEEsingle(), Val), DL, VT);
    if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
      return getConstantFP(APFloat(APFloat::IEEEdouble(), Val), DL, VT);
    if (VT == MVT::f128 && C->getValueType(0) == MVT::i128)
      return getConstantFP(APFloat(APFloat::IEEEquad(), Val), DL, VT);
    break;
  case ISD::ABS:
    return getConstant(Val.abs(), DL, VT, C->isTargetOpcode(),
                       C->isOpaque());
  case ISD::BITREVERSE:
    return getConstant(Val.reverseBits(), DL, VT, C->isTargetOpcode(),
                       C->isOpaque());
  case ISD::BSWAP:
    return getConstant(Val.byteSwap(), DL, VT, C->isTargetOpcode(),
                       C->isOpaque());
  case ISD::CTPOP:
    return getConstant(Val.countPopulation(), DL, VT, C->isTargetOpcode(),
                       C->isOpaque());
  case ISD::CTLZ:
  case ISD::CTLZ_ZERO_UNDEF:
    return getConstant(Val.countLeadingZeros(), DL, VT, C->isTargetOpcode(),
                       C->isOpaque());
  case ISD::CTTZ:
  case ISD::CTTZ_ZERO_UNDEF:
    return getConstant(Val.countTrailingZeros(), DL, VT, C->isTargetOpcode(),
                       C->isOpaque());
  case ISD::FP16_TO_FP: {
    bool Ignored;
    APFloat FPV(APFloat::IEEEhalf(),
                (Val.getBitWidth() == 16) ? Val : Val.trunc(16));

    // This can return overflow, underflow, or inexact; we don't care.
    // FIXME need to be more flexible about rounding mode.
    (void)FPV.convert(EVTToAPFloatSemantics(VT),
                      APFloat::rmNearestTiesToEven, &Ignored);
    return getConstantFP(FPV, DL, VT);
  }
  }
}

// Constant fold unary operations with a floating point constant operand.
if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand)) {
  APFloat V = C->getValueAPF();    // make copy
  switch (Opcode) {
  case ISD::FNEG:
    V.changeSign();
    return getConstantFP(V, DL, VT);
  case ISD::FABS:
    V.clearSign();
    return getConstantFP(V, DL, VT);
  case ISD::FCEIL: {
    APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
    if (fs == APFloat::opOK || fs == APFloat::opInexact)
      return getConstantFP(V, DL, VT);
    break;
  }
  case ISD::FTRUNC: {
    APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
    if (fs == APFloat::opOK || fs == APFloat::opInexact)
      return getConstantFP(V, DL, VT);
    break;
  }
  case ISD::FFLOOR: {
    APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
    if (fs == APFloat::opOK || fs == APFloat::opInexact)
      return getConstantFP(V, DL, VT);
    break;
  }
  case ISD::FP_EXTEND: {
    bool ignored;
    // This can return overflow, underflow, or inexact; we don't care.
    // FIXME need to be more flexible about rounding mode.
    (void)V.convert(EVTToAPFloatSemantics(VT),
                    APFloat::rmNearestTiesToEven, &ignored);
    return getConstantFP(V, DL, VT);
  }
  case ISD::FP_TO_SINT:
  case ISD::FP_TO_UINT: {
    bool ignored;
    APSInt IntVal(VT.getSizeInBits(), Opcode == ISD::FP_TO_UINT);
    // FIXME need to be more flexible about rounding mode.
    APFloat::opStatus s =
        V.convertToInteger(IntVal, APFloat::rmTowardZero, &ignored);
    if (s == APFloat::opInvalidOp) // inexact is OK, in fact usual
      break;
    return getConstant(IntVal, DL, VT);
  }
  case ISD::BITCAST:
    if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
      return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
    else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
      return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
    else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
      return getConstant(V.bitcastToAPInt().getZExtValue(), DL, VT);
    break;
  case ISD::FP_TO_FP16: {
    bool Ignored;
    // This can return overflow, underflow, or inexact; we don't care.
    // FIXME need to be more flexible about rounding mode.
    (void)V.convert(APFloat::IEEEhalf(),
                    APFloat::rmNearestTiesToEven, &Ignored);
    return getConstant(V.bitcastToAPInt(), DL, VT);
  }
  }
}

// Constant fold unary operations with a vector integer or float operand.
if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand)) {
  if (BV->isConstant()) {
    switch (Opcode) {
    default:
      // FIXME: Entirely reasonable to perform folding of other unary
      // operations here as the need arises.
      break;
    case ISD::FNEG:
    case ISD::FABS:
    case ISD::FCEIL:
    case ISD::FTRUNC:
    case ISD::FFLOOR:
    case ISD::FP_EXTEND:
    case ISD::FP_TO_SINT:
    case ISD::FP_TO_UINT:
    case ISD::TRUNCATE:
    case ISD::ANY_EXTEND:
    case ISD::ZERO_EXTEND:
    case ISD::SIGN_EXTEND:
    case ISD::UINT_TO_FP:
    case ISD::SINT_TO_FP:
    case ISD::ABS:
    case ISD::BITREVERSE:
    case ISD::BSWAP:
    case ISD::CTLZ:
    case ISD::CTLZ_ZERO_UNDEF:
    case ISD::CTTZ:
    case ISD::CTTZ_ZERO_UNDEF:
    case ISD::CTPOP: {
      SDValue Ops = { Operand };
      if (SDValue Fold = FoldConstantVectorArithmetic(Opcode, DL, VT, Ops))
        return Fold;
    }
    }
  }
}

unsigned OpOpcode = Operand.getNode()->getOpcode();
switch (Opcode) {
case ISD::TokenFactor:
case ISD::MERGE_VALUES:
case ISD::CONCAT_VECTORS:
  return Operand;         // Factor, merge or concat of one node?  No need.
case ISD::BUILD_VECTOR: {
  // Attempt to simplify BUILD_VECTOR.
  SDValue Ops[] = {Operand};
  if (SDValue V = FoldBUILD_VECTOR(DL, VT, Ops, *this))
    return V;
  break;
}
case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node")::llvm::llvm_unreachable_internal("Invalid method to make FP_ROUND node"
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4469);
case ISD::FP_EXTEND:
  assert(VT.isFloatingPoint() &&((VT.isFloatingPoint() && Operand.getValueType().isFloatingPoint
() && "Invalid FP cast!") ? static_cast<void> (
0) : __assert_fail ("VT.isFloatingPoint() && Operand.getValueType().isFloatingPoint() && \"Invalid FP cast!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4472, __PRETTY_FUNCTION__))
         Operand.getValueType().isFloatingPoint() && "Invalid FP cast!")((VT.isFloatingPoint() && Operand.getValueType().isFloatingPoint
() && "Invalid FP cast!") ? static_cast<void> (
0) : __assert_fail ("VT.isFloatingPoint() && Operand.getValueType().isFloatingPoint() && \"Invalid FP cast!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4472, __PRETTY_FUNCTION__));
  if (Operand.getValueType() == VT) return Operand;  // noop conversion.
  assert((!VT.isVector() ||(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4477, __PRETTY_FUNCTION__))
          VT.getVectorNumElements() ==(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4477, __PRETTY_FUNCTION__))
          Operand.getValueType().getVectorNumElements()) &&(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4477, __PRETTY_FUNCTION__))
         "Vector element count mismatch!")(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4477, __PRETTY_FUNCTION__));
  assert(Operand.getValueType().bitsLT(VT) &&((Operand.getValueType().bitsLT(VT) && "Invalid fpext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid fpext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4479, __PRETTY_FUNCTION__))
         "Invalid fpext node, dst < src!")((Operand.getValueType().bitsLT(VT) && "Invalid fpext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid fpext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4479, __PRETTY_FUNCTION__));
  if (Operand.isUndef())
    return getUNDEF(VT);
  break;
case ISD::FP_TO_SINT:
case ISD::FP_TO_UINT:
  if (Operand.isUndef())
    return getUNDEF(VT);
  break;
case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP:
  // [us]itofp(undef) = 0, because the result value is bounded.
  if (Operand.isUndef())
    return getConstantFP(0.0, DL, VT);
  break;
case ISD::SIGN_EXTEND:
  assert(VT.isInteger() && Operand.getValueType().isInteger() &&((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid SIGN_EXTEND!") ? static_cast<void>
 (0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid SIGN_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4496, __PRETTY_FUNCTION__))
         "Invalid SIGN_EXTEND!")((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid SIGN_EXTEND!") ? static_cast<void>
 (0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid SIGN_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4496, __PRETTY_FUNCTION__));
  assert(VT.isVector() == Operand.getValueType().isVector() &&((VT.isVector() == Operand.getValueType().isVector() &&
 "SIGN_EXTEND result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"SIGN_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4499, __PRETTY_FUNCTION__))
         "SIGN_EXTEND result type type should be vector iff the operand "((VT.isVector() == Operand.getValueType().isVector() &&
 "SIGN_EXTEND result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"SIGN_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4499, __PRETTY_FUNCTION__))
         "type is vector!")((VT.isVector() == Operand.getValueType().isVector() &&
 "SIGN_EXTEND result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"SIGN_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4499, __PRETTY_FUNCTION__));
  if (Operand.getValueType() == VT) return Operand;   // noop extension
  assert((!VT.isVector() ||(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4504, __PRETTY_FUNCTION__))
          VT.getVectorNumElements() ==(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4504, __PRETTY_FUNCTION__))
          Operand.getValueType().getVectorNumElements()) &&(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4504, __PRETTY_FUNCTION__))
         "Vector element count mismatch!")(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4504, __PRETTY_FUNCTION__));
  assert(Operand.getValueType().bitsLT(VT) &&((Operand.getValueType().bitsLT(VT) && "Invalid sext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid sext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4506, __PRETTY_FUNCTION__))
         "Invalid sext node, dst < src!")((Operand.getValueType().bitsLT(VT) && "Invalid sext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid sext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4506, __PRETTY_FUNCTION__));
  if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
    return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
  else if (OpOpcode == ISD::UNDEF)
    // sext(undef) = 0, because the top bits will all be the same.
    return getConstant(0, DL, VT);
  break;
case ISD::ZERO_EXTEND:
  assert(VT.isInteger() && Operand.getValueType().isInteger() &&((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid ZERO_EXTEND!") ? static_cast<void>
 (0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid ZERO_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4515, __PRETTY_FUNCTION__))
         "Invalid ZERO_EXTEND!")((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid ZERO_EXTEND!") ? static_cast<void>
 (0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid ZERO_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4515, __PRETTY_FUNCTION__));
  assert(VT.isVector() == Operand.getValueType().isVector() &&((VT.isVector() == Operand.getValueType().isVector() &&
 "ZERO_EXTEND result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"ZERO_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4518, __PRETTY_FUNCTION__))
         "ZERO_EXTEND result type type should be vector iff the operand "((VT.isVector() == Operand.getValueType().isVector() &&
 "ZERO_EXTEND result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"ZERO_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4518, __PRETTY_FUNCTION__))
         "type is vector!")((VT.isVector() == Operand.getValueType().isVector() &&
 "ZERO_EXTEND result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"ZERO_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4518, __PRETTY_FUNCTION__));
  if (Operand.getValueType() == VT) return Operand;   // noop extension
  assert((!VT.isVector() ||(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4523, __PRETTY_FUNCTION__))
          VT.getVectorNumElements() ==(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4523, __PRETTY_FUNCTION__))
          Operand.getValueType().getVectorNumElements()) &&(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4523, __PRETTY_FUNCTION__))
         "Vector element count mismatch!")(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4523, __PRETTY_FUNCTION__));
  assert(Operand.getValueType().bitsLT(VT) &&((Operand.getValueType().bitsLT(VT) && "Invalid zext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid zext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4525, __PRETTY_FUNCTION__))
         "Invalid zext node, dst < src!")((Operand.getValueType().bitsLT(VT) && "Invalid zext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid zext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4525, __PRETTY_FUNCTION__));
  if (OpOpcode == ISD::ZERO_EXTEND)   // (zext (zext x)) -> (zext x)
    return getNode(ISD::ZERO_EXTEND, DL, VT, Operand.getOperand(0));
  else if (OpOpcode == ISD::UNDEF)
    // zext(undef) = 0, because the top bits will be zero.
    return getConstant(0, DL, VT);
  break;
case ISD::ANY_EXTEND:
  assert(VT.isInteger() && Operand.getValueType().isInteger() &&((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid ANY_EXTEND!") ? static_cast<void>
 (0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid ANY_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4534, __PRETTY_FUNCTION__))
         "Invalid ANY_EXTEND!")((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid ANY_EXTEND!") ? static_cast<void>
 (0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid ANY_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4534, __PRETTY_FUNCTION__));
  assert(VT.isVector() == Operand.getValueType().isVector() &&((VT.isVector() == Operand.getValueType().isVector() &&
 "ANY_EXTEND result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"ANY_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4537, __PRETTY_FUNCTION__))
         "ANY_EXTEND result type type should be vector iff the operand "((VT.isVector() == Operand.getValueType().isVector() &&
 "ANY_EXTEND result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"ANY_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4537, __PRETTY_FUNCTION__))
         "type is vector!")((VT.isVector() == Operand.getValueType().isVector() &&
 "ANY_EXTEND result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"ANY_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4537, __PRETTY_FUNCTION__));
  if (Operand.getValueType() == VT) return Operand;   // noop extension
  assert((!VT.isVector() ||(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4542, __PRETTY_FUNCTION__))
          VT.getVectorNumElements() ==(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4542, __PRETTY_FUNCTION__))
          Operand.getValueType().getVectorNumElements()) &&(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4542, __PRETTY_FUNCTION__))
         "Vector element count mismatch!")(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4542, __PRETTY_FUNCTION__));
  assert(Operand.getValueType().bitsLT(VT) &&((Operand.getValueType().bitsLT(VT) && "Invalid anyext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid anyext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4544, __PRETTY_FUNCTION__))
         "Invalid anyext node, dst < src!")((Operand.getValueType().bitsLT(VT) && "Invalid anyext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid anyext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4544, __PRETTY_FUNCTION__));

  if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
      OpOpcode == ISD::ANY_EXTEND)
    // (ext (zext x)) -> (zext x)  and  (ext (sext x)) -> (sext x)
    return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
  else if (OpOpcode == ISD::UNDEF)
    return getUNDEF(VT);

  // (ext (trunc x)) -> x
  if (OpOpcode == ISD::TRUNCATE) {
    SDValue OpOp = Operand.getOperand(0);
    if (OpOp.getValueType() == VT) {
      transferDbgValues(Operand, OpOp);
      return OpOp;
    }
  }
  break;
case ISD::TRUNCATE:
  assert(VT.isInteger() && Operand.getValueType().isInteger() &&((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid TRUNCATE!") ? static_cast<void> (
0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid TRUNCATE!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4564, __PRETTY_FUNCTION__))
         "Invalid TRUNCATE!")((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid TRUNCATE!") ? static_cast<void> (
0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid TRUNCATE!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4564, __PRETTY_FUNCTION__));
  assert(VT.isVector() == Operand.getValueType().isVector() &&((VT.isVector() == Operand.getValueType().isVector() &&
 "TRUNCATE result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"TRUNCATE result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4567, __PRETTY_FUNCTION__))
         "TRUNCATE result type type should be vector iff the operand "((VT.isVector() == Operand.getValueType().isVector() &&
 "TRUNCATE result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"TRUNCATE result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4567, __PRETTY_FUNCTION__))
         "type is vector!")((VT.isVector() == Operand.getValueType().isVector() &&
 "TRUNCATE result type type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("VT.isVector() == Operand.getValueType().isVector() && \"TRUNCATE result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4567, __PRETTY_FUNCTION__));
  if (Operand.getValueType() == VT) return Operand;   // noop truncate
  assert((!VT.isVector() ||(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4572, __PRETTY_FUNCTION__))
          VT.getVectorNumElements() ==(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4572, __PRETTY_FUNCTION__))
          Operand.getValueType().getVectorNumElements()) &&(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4572, __PRETTY_FUNCTION__))
         "Vector element count mismatch!")(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4572, __PRETTY_FUNCTION__));
  assert(Operand.getValueType().bitsGT(VT) &&((Operand.getValueType().bitsGT(VT) && "Invalid truncate node, src < dst!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsGT(VT) && \"Invalid truncate node, src < dst!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4574, __PRETTY_FUNCTION__))
         "Invalid truncate node, src < dst!")((Operand.getValueType().bitsGT(VT) && "Invalid truncate node, src < dst!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsGT(VT) && \"Invalid truncate node, src < dst!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4574, __PRETTY_FUNCTION__));
  if (OpOpcode == ISD::TRUNCATE)
    return getNode(ISD::TRUNCATE, DL, VT, Operand.getOperand(0));
  if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
      OpOpcode == ISD::ANY_EXTEND) {
    // If the source is smaller than the dest, we still need an extend.
    if (Operand.getOperand(0).getValueType().getScalarType()
          .bitsLT(VT.getScalarType()))
      return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
    if (Operand.getOperand(0).getValueType().bitsGT(VT))
      return getNode(ISD::TRUNCATE, DL, VT, Operand.getOperand(0));
    return Operand.getOperand(0);
  }
  if (OpOpcode == ISD::UNDEF)
    return getUNDEF(VT);
  break;
case ISD::ANY_EXTEND_VECTOR_INREG:
case ISD::ZERO_EXTEND_VECTOR_INREG:
case ISD::SIGN_EXTEND_VECTOR_INREG:
  assert(VT.isVector() && "This DAG node is restricted to vector types.")((VT.isVector() && "This DAG node is restricted to vector types."
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && \"This DAG node is restricted to vector types.\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4593, __PRETTY_FUNCTION__));
  assert(Operand.getValueType().bitsLE(VT) &&((Operand.getValueType().bitsLE(VT) && "The input must be the same size or smaller than the result."
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLE(VT) && \"The input must be the same size or smaller than the result.\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4595, __PRETTY_FUNCTION__))
         "The input must be the same size or smaller than the result.")((Operand.getValueType().bitsLE(VT) && "The input must be the same size or smaller than the result."
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLE(VT) && \"The input must be the same size or smaller than the result.\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4595, __PRETTY_FUNCTION__));
  assert(VT.getVectorNumElements() <((VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements
() && "The destination vector type must have fewer lanes than the input."
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements() && \"The destination vector type must have fewer lanes than the input.\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4598, __PRETTY_FUNCTION__))
           Operand.getValueType().getVectorNumElements() &&((VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements
() && "The destination vector type must have fewer lanes than the input."
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements() && \"The destination vector type must have fewer lanes than the input.\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4598, __PRETTY_FUNCTION__))
         "The destination vector type must have fewer lanes than the input.")((VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements
() && "The destination vector type must have fewer lanes than the input."
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements() && \"The destination vector type must have fewer lanes than the input.\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4598, __PRETTY_FUNCTION__));
  break;
case ISD::ABS:
  assert(VT.isInteger() && VT == Operand.getValueType() &&((VT.isInteger() && VT == Operand.getValueType() &&
 "Invalid ABS!") ? static_cast<void> (0) : __assert_fail
 ("VT.isInteger() && VT == Operand.getValueType() && \"Invalid ABS!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4602, __PRETTY_FUNCTION__))
         "Invalid ABS!")((VT.isInteger() && VT == Operand.getValueType() &&
 "Invalid ABS!") ? static_cast<void> (0) : __assert_fail
 ("VT.isInteger() && VT == Operand.getValueType() && \"Invalid ABS!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4602, __PRETTY_FUNCTION__));
  if (OpOpcode == ISD::UNDEF)
    return getUNDEF(VT);
  break;
case ISD::BSWAP:
  assert(VT.isInteger() && VT == Operand.getValueType() &&((VT.isInteger() && VT == Operand.getValueType() &&
 "Invalid BSWAP!") ? static_cast<void> (0) : __assert_fail
 ("VT.isInteger() && VT == Operand.getValueType() && \"Invalid BSWAP!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4608, __PRETTY_FUNCTION__))
         "Invalid BSWAP!")((VT.isInteger() && VT == Operand.getValueType() &&
 "Invalid BSWAP!") ? static_cast<void> (0) : __assert_fail
 ("VT.isInteger() && VT == Operand.getValueType() && \"Invalid BSWAP!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4608, __PRETTY_FUNCTION__));
  assert((VT.getScalarSizeInBits() % 16 == 0) &&(((VT.getScalarSizeInBits() % 16 == 0) && "BSWAP types must be a multiple of 16 bits!"
) ? static_cast<void> (0) : __assert_fail ("(VT.getScalarSizeInBits() % 16 == 0) && \"BSWAP types must be a multiple of 16 bits!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4610, __PRETTY_FUNCTION__))
         "BSWAP types must be a multiple of 16 bits!")(((VT.getScalarSizeInBits() % 16 == 0) && "BSWAP types must be a multiple of 16 bits!"
) ? static_cast<void> (0) : __assert_fail ("(VT.getScalarSizeInBits() % 16 == 0) && \"BSWAP types must be a multiple of 16 bits!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4610, __PRETTY_FUNCTION__));
  if (OpOpcode == ISD::UNDEF)
    return getUNDEF(VT);
  break;
case ISD::BITREVERSE:
  assert(VT.isInteger() && VT == Operand.getValueType() &&((VT.isInteger() && VT == Operand.getValueType() &&
 "Invalid BITREVERSE!") ? static_cast<void> (0) : __assert_fail
 ("VT.isInteger() && VT == Operand.getValueType() && \"Invalid BITREVERSE!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4616, __PRETTY_FUNCTION__))
         "Invalid BITREVERSE!")((VT.isInteger() && VT == Operand.getValueType() &&
 "Invalid BITREVERSE!") ? static_cast<void> (0) : __assert_fail
 ("VT.isInteger() && VT == Operand.getValueType() && \"Invalid BITREVERSE!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4616, __PRETTY_FUNCTION__));
  if (OpOpcode == ISD::UNDEF)
    return getUNDEF(VT);
  break;
case ISD::BITCAST:
  // Basic sanity checking.
  assert(VT.getSizeInBits() == Operand.getValueSizeInBits() &&((VT.getSizeInBits() == Operand.getValueSizeInBits() &&
 "Cannot BITCAST between types of different sizes!") ? static_cast
<void> (0) : __assert_fail ("VT.getSizeInBits() == Operand.getValueSizeInBits() && \"Cannot BITCAST between types of different sizes!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4623, __PRETTY_FUNCTION__))
         "Cannot BITCAST between types of different sizes!")((VT.getSizeInBits() == Operand.getValueSizeInBits() &&
 "Cannot BITCAST between types of different sizes!") ? static_cast
<void> (0) : __assert_fail ("VT.getSizeInBits() == Operand.getValueSizeInBits() && \"Cannot BITCAST between types of different sizes!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4623, __PRETTY_FUNCTION__));
  if (VT == Operand.getValueType()) return Operand;  // noop conversion.
  if (OpOpcode == ISD::BITCAST)  // bitconv(bitconv(x)) -> bitconv(x)
    return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
  if (OpOpcode == ISD::UNDEF)
    return getUNDEF(VT);
  break;
case ISD::SCALAR_TO_VECTOR:
  assert(VT.isVector() && !Operand.getValueType().isVector() &&((VT.isVector() && !Operand.getValueType().isVector()
 && (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4636, __PRETTY_FUNCTION__))
         (VT.getVectorElementType() == Operand.getValueType() ||((VT.isVector() && !Operand.getValueType().isVector()
 && (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4636, __PRETTY_FUNCTION__))
          (VT.getVectorElementType().isInteger() &&((VT.isVector() && !Operand.getValueType().isVector()
 && (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4636, __PRETTY_FUNCTION__))
           Operand.getValueType().isInteger() &&((VT.isVector() && !Operand.getValueType().isVector()
 && (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4636, __PRETTY_FUNCTION__))
           VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&((VT.isVector() && !Operand.getValueType().isVector()
 && (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4636, __PRETTY_FUNCTION__))
         "Illegal SCALAR_TO_VECTOR node!")((VT.isVector() && !Operand.getValueType().isVector()
 && (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4636, __PRETTY_FUNCTION__));
  if (OpOpcode == ISD::UNDEF)
    return getUNDEF(VT);
  // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
  if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
      isa<ConstantSDNode>(Operand.getOperand(1)) &&
      Operand.getConstantOperandVal(1) == 0 &&
      Operand.getOperand(0).getValueType() == VT)
    return Operand.getOperand(0);
  break;
case ISD::FNEG:
  // Negation of an unknown bag of bits is still completely undefined.
  if (OpOpcode == ISD::UNDEF)
    return getUNDEF(VT);

  // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
  if ((getTarget().Options.NoSignedZerosFPMath || Flags.hasNoSignedZeros()) &&
      OpOpcode == ISD::FSUB)
    return getNode(ISD::FSUB, DL, VT, Operand.getOperand(1),
                   Operand.getOperand(0), Flags);
  if (OpOpcode == ISD::FNEG)  // --X -> X
    return Operand.getOperand(0);
  break;
case ISD::FABS:
  if (OpOpcode == ISD::FNEG)  // abs(-X) -> abs(X)
    return getNode(ISD::FABS, DL, VT, Operand.getOperand(0));
  break;
}

SDNode *N;
SDVTList VTs = getVTList(VT);
SDValue Ops[] = {Operand};
if (VT != MVT::Glue) { // Don't CSE flag producing nodes
  FoldingSetNodeID ID;
  AddNodeIDNode(ID, Opcode, VTs, Ops);
  void *IP = nullptr;
  if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
    E->intersectFlagsWith(Flags);
    return SDValue(E, 0);
  }

  N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
  N->setFlags(Flags);
  createOperands(N, Ops);
  CSEMap.InsertNode(N, IP);
} else {
  N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
  createOperands(N, Ops);
}

InsertNode(N);
SDValue V = SDValue(N, 0);
NewSDValueDbgMsg(V, "Creating new node: ", this);
return V;
4690}

4692static std::pair<APInt, bool> FoldValue(unsigned Opcode, const APInt &C1,
                                      const APInt &C2) {
switch (Opcode) {
case ISD::ADD:  return std::make_pair(C1 + C2, true);
case ISD::SUB:  return std::make_pair(C1 - C2, true);
case ISD::MUL:  return std::make_pair(C1 * C2, true);
case ISD::AND:  return std::make_pair(C1 & C2, true);
case ISD::OR:   return std::make_pair(C1 | C2, true);
case ISD::XOR:  return std::make_pair(C1 ^ C2, true);
case ISD::SHL:  return std::make_pair(C1 << C2, true);
case ISD::SRL:  return std::make_pair(C1.lshr(C2), true);
case ISD::SRA:  return std::make_pair(C1.ashr(C2), true);
case ISD::ROTL: return std::make_pair(C1.rotl(C2), true);
case ISD::ROTR: return std::make_pair(C1.rotr(C2), true);
case ISD::SMIN: return std::make_pair(C1.sle(C2) ? C1 : C2, true);
case ISD::SMAX: return std::make_pair(C1.sge(C2) ? C1 : C2, true);
case ISD::UMIN: return std::make_pair(C1.ule(C2) ? C1 : C2, true);
case ISD::UMAX: return std::make_pair(C1.uge(C2) ? C1 : C2, true);
case ISD::SADDSAT: return std::make_pair(C1.sadd_sat(C2), true);
case ISD::UADDSAT: return std::make_pair(C1.uadd_sat(C2), true);
case ISD::SSUBSAT: return std::make_pair(C1.ssub_sat(C2), true);
case ISD::USUBSAT: return std::make_pair(C1.usub_sat(C2), true);
case ISD::UDIV:
  if (!C2.getBoolValue())
    break;
  return std::make_pair(C1.udiv(C2), true);
case ISD::UREM:
  if (!C2.getBoolValue())
    break;
  return std::make_pair(C1.urem(C2), true);
case ISD::SDIV:
  if (!C2.getBoolValue())
    break;
  return std::make_pair(C1.sdiv(C2), true);
case ISD::SREM:
  if (!C2.getBoolValue())
    break;
  return std::make_pair(C1.srem(C2), true);
}
return std::make_pair(APInt(1, 0), false);
4732}

4734SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL,
                                           EVT VT, const ConstantSDNode *C1,
                                           const ConstantSDNode *C2) {
if (C1->isOpaque() || C2->isOpaque())
  return SDValue();

std::pair<APInt, bool> Folded = FoldValue(Opcode, C1->getAPIntValue(),
                                          C2->getAPIntValue());
if (!Folded.second)
  return SDValue();
return getConstant(Folded.first, DL, VT);
4745}

4747SDValue SelectionDAG::FoldSymbolOffset(unsigned Opcode, EVT VT,
                                     const GlobalAddressSDNode *GA,
                                     const SDNode *N2) {
if (GA->getOpcode() != ISD::GlobalAddress)
  return SDValue();
if (!TLI->isOffsetFoldingLegal(GA))
  return SDValue();
auto *C2 = dyn_cast<ConstantSDNode>(N2);
if (!C2)
  return SDValue();
int64_t Offset = C2->getSExtValue();
switch (Opcode) {
case ISD::ADD: break;
case ISD::SUB: Offset = -uint64_t(Offset); break;
default: return SDValue();
}
return getGlobalAddress(GA->getGlobal(), SDLoc(C2), VT,
                        GA->getOffset() + uint64_t(Offset));
4765}

4767bool SelectionDAG::isUndef(unsigned Opcode, ArrayRef<SDValue> Ops) {
switch (Opcode) {
case ISD::SDIV:
case ISD::UDIV:
case ISD::SREM:
case ISD::UREM: {
  // If a divisor is zero/undef or any element of a divisor vector is
  // zero/undef, the whole op is undef.
  assert(Ops.size() == 2 && "Div/rem should have 2 operands")((Ops.size() == 2 && "Div/rem should have 2 operands"
) ? static_cast<void> (0) : __assert_fail ("Ops.size() == 2 && \"Div/rem should have 2 operands\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4775, __PRETTY_FUNCTION__));
  SDValue Divisor = Ops[1];
  if (Divisor.isUndef() || isNullConstant(Divisor))
    return true;

  return ISD::isBuildVectorOfConstantSDNodes(Divisor.getNode()) &&
         llvm::any_of(Divisor->op_values(),
                      [](SDValue V) { return V.isUndef() ||
                                      isNullConstant(V); });
  // TODO: Handle signed overflow.
}
// TODO: Handle oversized shifts.
default:
  return false;
}
4790}

4792SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL,
                                           EVT VT, SDNode *N1, SDNode *N2) {
// If the opcode is a target-specific ISD node, there's nothing we can
// do here and the operand rules may not line up with the below, so
// bail early.
if (Opcode >= ISD::BUILTIN_OP_END)
  return SDValue();

if (isUndef(Opcode, {SDValue(N1, 0), SDValue(N2, 0)}))
  return getUNDEF(VT);

// Handle the case of two scalars.
if (auto *C1 = dyn_cast<ConstantSDNode>(N1)) {
  if (auto *C2 = dyn_cast<ConstantSDNode>(N2)) {
    SDValue Folded = FoldConstantArithmetic(Opcode, DL, VT, C1, C2);
    assert((!Folded || !VT.isVector()) &&(((!Folded || !VT.isVector()) && "Can't fold vectors ops with scalar operands"
) ? static_cast<void> (0) : __assert_fail ("(!Folded || !VT.isVector()) && \"Can't fold vectors ops with scalar operands\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4808, __PRETTY_FUNCTION__))
           "Can't fold vectors ops with scalar operands")(((!Folded || !VT.isVector()) && "Can't fold vectors ops with scalar operands"
) ? static_cast<void> (0) : __assert_fail ("(!Folded || !VT.isVector()) && \"Can't fold vectors ops with scalar operands\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4808, __PRETTY_FUNCTION__));
    return Folded;
  }
}

// fold (add Sym, c) -> Sym+c
if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(N1))
  return FoldSymbolOffset(Opcode, VT, GA, N2);
if (TLI->isCommutativeBinOp(Opcode))
  if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(N2))
    return FoldSymbolOffset(Opcode, VT, GA, N1);

// For vectors, extract each constant element and fold them individually.
// Either input may be an undef value.
auto *BV1 = dyn_cast<BuildVectorSDNode>(N1);
if (!BV1 && !N1->isUndef())
  return SDValue();
auto *BV2 = dyn_cast<BuildVectorSDNode>(N2);
if (!BV2 && !N2->isUndef())
  return SDValue();
// If both operands are undef, that's handled the same way as scalars.
if (!BV1 && !BV2)
  return SDValue();

assert((!BV1 || !BV2 || BV1->getNumOperands() == BV2->getNumOperands()) &&(((!BV1 || !BV2 || BV1->getNumOperands() == BV2->getNumOperands
()) && "Vector binop with different number of elements in operands?"
) ? static_cast<void> (0) : __assert_fail ("(!BV1 || !BV2 || BV1->getNumOperands() == BV2->getNumOperands()) && \"Vector binop with different number of elements in operands?\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4833, __PRETTY_FUNCTION__))
       "Vector binop with different number of elements in operands?")(((!BV1 || !BV2 || BV1->getNumOperands() == BV2->getNumOperands
()) && "Vector binop with different number of elements in operands?"
) ? static_cast<void> (0) : __assert_fail ("(!BV1 || !BV2 || BV1->getNumOperands() == BV2->getNumOperands()) && \"Vector binop with different number of elements in operands?\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4833, __PRETTY_FUNCTION__));

EVT SVT = VT.getScalarType();
EVT LegalSVT = SVT;
if (NewNodesMustHaveLegalTypes && LegalSVT.isInteger()) {
  LegalSVT = TLI->getTypeToTransformTo(*getContext(), LegalSVT);
  if (LegalSVT.bitsLT(SVT))
    return SDValue();
}
SmallVector<SDValue, 4> Outputs;
unsigned NumOps = BV1 ? BV1->getNumOperands() : BV2->getNumOperands();
for (unsigned I = 0; I != NumOps; ++I) {
  SDValue V1 = BV1 ? BV1->getOperand(I) : getUNDEF(SVT);
  SDValue V2 = BV2 ? BV2->getOperand(I) : getUNDEF(SVT);
  if (SVT.isInteger()) {
    if (V1->getValueType(0).bitsGT(SVT))
      V1 = getNode(ISD::TRUNCATE, DL, SVT, V1);
    if (V2->getValueType(0).bitsGT(SVT))
      V2 = getNode(ISD::TRUNCATE, DL, SVT, V2);
  }

  if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
    return SDValue();

  // Fold one vector element.
  SDValue ScalarResult = getNode(Opcode, DL, SVT, V1, V2);
  if (LegalSVT != SVT)
    ScalarResult = getNode(ISD::SIGN_EXTEND, DL, LegalSVT, ScalarResult);

  // Scalar folding only succeeded if the result is a constant or UNDEF.
  if (!ScalarResult.isUndef() && ScalarResult.getOpcode() != ISD::Constant &&
      ScalarResult.getOpcode() != ISD::ConstantFP)
    return SDValue();
  Outputs.push_back(ScalarResult);
}

assert(VT.getVectorNumElements() == Outputs.size() &&((VT.getVectorNumElements() == Outputs.size() && "Vector size mismatch!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == Outputs.size() && \"Vector size mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4870, __PRETTY_FUNCTION__))
       "Vector size mismatch!")((VT.getVectorNumElements() == Outputs.size() && "Vector size mismatch!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == Outputs.size() && \"Vector size mismatch!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4870, __PRETTY_FUNCTION__));

// We may have a vector type but a scalar result. Create a splat.
Outputs.resize(VT.getVectorNumElements(), Outputs.back());

// Build a big vector out of the scalar elements we generated.
return getBuildVector(VT, SDLoc(), Outputs);
4877}

4879// TODO: Merge with FoldConstantArithmetic
4880SDValue SelectionDAG::FoldConstantVectorArithmetic(unsigned Opcode,
                                                 const SDLoc &DL, EVT VT,
                                                 ArrayRef<SDValue> Ops,
                                                 const SDNodeFlags Flags) {
// If the opcode is a target-specific ISD node, there's nothing we can
// do here and the operand rules may not line up with the below, so
// bail early.
if (Opcode >= ISD::BUILTIN_OP_END)
  return SDValue();

if (isUndef(Opcode, Ops))
  return getUNDEF(VT);

// We can only fold vectors - maybe merge with FoldConstantArithmetic someday?
if (!VT.isVector())
  return SDValue();

unsigned NumElts = VT.getVectorNumElements();

auto IsScalarOrSameVectorSize = [&](const SDValue &Op) {
  return !Op.getValueType().isVector() ||
         Op.getValueType().getVectorNumElements() == NumElts;
};

auto IsConstantBuildVectorOrUndef = [&](const SDValue &Op) {
  BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Op);
  return (Op.isUndef()) || (Op.getOpcode() == ISD::CONDCODE) ||
         (BV && BV->isConstant());
};

// All operands must be vector types with the same number of elements as
// the result type and must be either UNDEF or a build vector of constant
// or UNDEF scalars.
if (!llvm::all_of(Ops, IsConstantBuildVectorOrUndef) ||
    !llvm::all_of(Ops, IsScalarOrSameVectorSize))
  return SDValue();

// If we are comparing vectors, then the result needs to be a i1 boolean
// that is then sign-extended back to the legal result type.
EVT SVT = (Opcode == ISD::SETCC ? MVT::i1 : VT.getScalarType());

// Find legal integer scalar type for constant promotion and
// ensure that its scalar size is at least as large as source.
EVT LegalSVT = VT.getScalarType();
if (NewNodesMustHaveLegalTypes && LegalSVT.isInteger()) {
  LegalSVT = TLI->getTypeToTransformTo(*getContext(), LegalSVT);
  if (LegalSVT.bitsLT(VT.getScalarType()))
    return SDValue();
}

// Constant fold each scalar lane separately.
SmallVector<SDValue, 4> ScalarResults;
for (unsigned i = 0; i != NumElts; i++) {
  SmallVector<SDValue, 4> ScalarOps;
  for (SDValue Op : Ops) {
    EVT InSVT = Op.getValueType().getScalarType();
    BuildVectorSDNode *InBV = dyn_cast<BuildVectorSDNode>(Op);
    if (!InBV) {
      // We've checked that this is UNDEF or a constant of some kind.
      if (Op.isUndef())
        ScalarOps.push_back(getUNDEF(InSVT));
      else
        ScalarOps.push_back(Op);
      continue;
    }

    SDValue ScalarOp = InBV->getOperand(i);
    EVT ScalarVT = ScalarOp.getValueType();

    // Build vector (integer) scalar operands may need implicit
    // truncation - do this before constant folding.
    if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT))
      ScalarOp = getNode(ISD::TRUNCATE, DL, InSVT, ScalarOp);

    ScalarOps.push_back(ScalarOp);
  }

  // Constant fold the scalar operands.
  SDValue ScalarResult = getNode(Opcode, DL, SVT, ScalarOps, Flags);

  // Legalize the (integer) scalar constant if necessary.
  if (LegalSVT != SVT)
    ScalarResult = getNode(ISD::SIGN_EXTEND, DL, LegalSVT, ScalarResult);

  // Scalar folding only succeeded if the result is a constant or UNDEF.
  if (!ScalarResult.isUndef() && ScalarResult.getOpcode() != ISD::Constant &&
      ScalarResult.getOpcode() != ISD::ConstantFP)
    return SDValue();
  ScalarResults.push_back(ScalarResult);
}

SDValue V = getBuildVector(VT, DL, ScalarResults);
NewSDValueDbgMsg(V, "New node fold constant vector: ", this);
return V;
4974}

4976SDValue SelectionDAG::foldConstantFPMath(unsigned Opcode, const SDLoc &DL,
                                       EVT VT, SDValue N1, SDValue N2) {
// TODO: We don't do any constant folding for strict FP opcodes here, but we
//       should. That will require dealing with a potentially non-default
//       rounding mode, checking the "opStatus" return value from the APFloat
//       math calculations, and possibly other variations.
auto *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
auto *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
if (N1CFP && N2CFP) {
  APFloat C1 = N1CFP->getValueAPF(), C2 = N2CFP->getValueAPF();
  switch (Opcode) {
  case ISD::FADD:
    C1.add(C2, APFloat::rmNearestTiesToEven);
    return getConstantFP(C1, DL, VT);
  case ISD::FSUB:
    C1.subtract(C2, APFloat::rmNearestTiesToEven);
    return getConstantFP(C1, DL, VT);
  case ISD::FMUL:
    C1.multiply(C2, APFloat::rmNearestTiesToEven);
    return getConstantFP(C1, DL, VT);
  case ISD::FDIV:
    C1.divide(C2, APFloat::rmNearestTiesToEven);
    return getConstantFP(C1, DL, VT);
  case ISD::FREM:
    C1.mod(C2);
    return getConstantFP(C1, DL, VT);
  case ISD::FCOPYSIGN:
    C1.copySign(C2);
    return getConstantFP(C1, DL, VT);
  default: break;
  }
}
if (N1CFP && Opcode == ISD::FP_ROUND) {
  APFloat C1 = N1CFP->getValueAPF();    // make copy
  bool Unused;
  // This can return overflow, underflow, or inexact; we don't care.
  // FIXME need to be more flexible about rounding mode.
  (void) C1.convert(EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
                    &Unused);
  return getConstantFP(C1, DL, VT);
}

switch (Opcode) {
case ISD::FADD:
case ISD::FSUB:
case ISD::FMUL:
case ISD::FDIV:
case ISD::FREM:
  // If both operands are undef, the result is undef. If 1 operand is undef,
  // the result is NaN. This should match the behavior of the IR optimizer.
  if (N1.isUndef() && N2.isUndef())
    return getUNDEF(VT);
  if (N1.isUndef() || N2.isUndef())
    return getConstantFP(APFloat::getNaN(EVTToAPFloatSemantics(VT)), DL, VT);
}
return SDValue();
5032}

5034SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
                            SDValue N1, SDValue N2, const SDNodeFlags Flags) {
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);

// Canonicalize constant to RHS if commutative.
if (TLI->isCommutativeBinOp(Opcode)) {
  if (N1C && !N2C) {
    std::swap(N1C, N2C);
    std::swap(N1, N2);
  } else if (N1CFP && !N2CFP) {
    std::swap(N1CFP, N2CFP);
    std::swap(N1, N2);
  }
}

switch (Opcode) {
default: break;
case ISD::TokenFactor:
  assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&((VT == MVT::Other && N1.getValueType() == MVT::Other
 && N2.getValueType() == MVT::Other && "Invalid token factor!"
) ? static_cast<void> (0) : __assert_fail ("VT == MVT::Other && N1.getValueType() == MVT::Other && N2.getValueType() == MVT::Other && \"Invalid token factor!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5056, __PRETTY_FUNCTION__))
         N2.getValueType() == MVT::Other && "Invalid token factor!")((VT == MVT::Other && N1.getValueType() == MVT::Other
 && N2.getValueType() == MVT::Other && "Invalid token factor!"
) ? static_cast<void> (0) : __assert_fail ("VT == MVT::Other && N1.getValueType() == MVT::Other && N2.getValueType() == MVT::Other && \"Invalid token factor!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5056, __PRETTY_FUNCTION__));
  // Fold trivial token factors.
  if (N1.getOpcode() == ISD::EntryToken) return N2;
  if (N2.getOpcode() == ISD::EntryToken) return N1;
  if (N1 == N2) return N1;
  break;
case ISD::BUILD_VECTOR: {
  // Attempt to simplify BUILD_VECTOR.
  SDValue Ops[] = {N1, N2};
  if (SDValue V = FoldBUILD_VECTOR(DL, VT, Ops, *this))
    return V;
  break;
}
case ISD::CONCAT_VECTORS: {
  SDValue Ops[] = {N1, N2};
  if (SDValue V = foldCONCAT_VECTORS(DL, VT, Ops, *this))
    return V;
  break;
}
case ISD::AND:
  assert(VT.isInteger() && "This operator does not apply to FP types!")((VT.isInteger() && "This operator does not apply to FP types!"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && \"This operator does not apply to FP types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5076, __PRETTY_FUNCTION__));
  assert(N1.getValueType() == N2.getValueType() &&((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5078, __PRETTY_FUNCTION__))
         N1.getValueType() == VT && "Binary operator types must match!")((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5078, __PRETTY_FUNCTION__));
  // (X & 0) -> 0.  This commonly occurs when legalizing i64 values, so it's
  // worth handling here.
  if (N2C && N2C->isNullValue())
    return N2;
  if (N2C && N2C->isAllOnesValue())  // X & -1 -> X
    return N1;
  break;
case ISD::OR:
case ISD::XOR:
case ISD::ADD:
case ISD::SUB:
  assert(VT.isInteger() && "This operator does not apply to FP types!")((VT.isInteger() && "This operator does not apply to FP types!"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && \"This operator does not apply to FP types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5090, __PRETTY_FUNCTION__));
  assert(N1.getValueType() == N2.getValueType() &&((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5092, __PRETTY_FUNCTION__))
         N1.getValueType() == VT && "Binary operator types must match!")((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5092, __PRETTY_FUNCTION__));
  // (X ^|+- 0) -> X.  This commonly occurs when legalizing i64 values, so
  // it's worth handling here.
  if (N2C && N2C->isNullValue())
    return N1;
  break;
case ISD::UDIV:
case ISD::UREM:
case ISD::MULHU:
case ISD::MULHS:
case ISD::MUL:
case ISD::SDIV:
case ISD::SREM:
case ISD::SMIN:
case ISD::SMAX:
case ISD::UMIN:
case ISD::UMAX:
case ISD::SADDSAT:
case ISD::SSUBSAT:
case ISD::UADDSAT:
case ISD::USUBSAT:
  assert(VT.isInteger() && "This operator does not apply to FP types!")((VT.isInteger() && "This operator does not apply to FP types!"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && \"This operator does not apply to FP types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5113, __PRETTY_FUNCTION__));
  assert(N1.getValueType() == N2.getValueType() &&((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5115, __PRETTY_FUNCTION__))
         N1.getValueType() == VT && "Binary operator types must match!")((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5115, __PRETTY_FUNCTION__));
  break;
case ISD::FADD:
case ISD::FSUB:
case ISD::FMUL:
case ISD::FDIV:
case ISD::FREM:
  assert(VT.isFloatingPoint() && "This operator only applies to FP types!")((VT.isFloatingPoint() && "This operator only applies to FP types!"
) ? static_cast<void> (0) : __assert_fail ("VT.isFloatingPoint() && \"This operator only applies to FP types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5122, __PRETTY_FUNCTION__));
  assert(N1.getValueType() == N2.getValueType() &&((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5124, __PRETTY_FUNCTION__))
         N1.getValueType() == VT && "Binary operator types must match!")((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5124, __PRETTY_FUNCTION__));
  if (SDValue V = simplifyFPBinop(Opcode, N1, N2))
    return V;
  break;
case ISD::FCOPYSIGN:   // N1 and result must match.  N1/N2 need not match.
  assert(N1.getValueType() == VT &&((N1.getValueType() == VT && N1.getValueType().isFloatingPoint
() && N2.getValueType().isFloatingPoint() && "Invalid FCOPYSIGN!"
) ? static_cast<void> (0) : __assert_fail ("N1.getValueType() == VT && N1.getValueType().isFloatingPoint() && N2.getValueType().isFloatingPoint() && \"Invalid FCOPYSIGN!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5132, __PRETTY_FUNCTION__))
         N1.getValueType().isFloatingPoint() &&((N1.getValueType() == VT && N1.getValueType().isFloatingPoint
() && N2.getValueType().isFloatingPoint() && "Invalid FCOPYSIGN!"
) ? static_cast<void> (0) : __assert_fail ("N1.getValueType() == VT && N1.getValueType().isFloatingPoint() && N2.getValueType().isFloatingPoint() && \"Invalid FCOPYSIGN!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5132, __PRETTY_FUNCTION__))
         N2.getValueType().isFloatingPoint() &&((N1.getValueType() == VT && N1.getValueType().isFloatingPoint
() && N2.getValueType().isFloatingPoint() && "Invalid FCOPYSIGN!"
) ? static_cast<void> (0) : __assert_fail ("N1.getValueType() == VT && N1.getValueType().isFloatingPoint() && N2.getValueType().isFloatingPoint() && \"Invalid FCOPYSIGN!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5132, __PRETTY_FUNCTION__))
         "Invalid FCOPYSIGN!")((N1.getValueType() == VT && N1.getValueType().isFloatingPoint
() && N2.getValueType().isFloatingPoint() && "Invalid FCOPYSIGN!"
) ? static_cast<void> (0) : __assert_fail ("N1.getValueType() == VT && N1.getValueType().isFloatingPoint() && N2.getValueType().isFloatingPoint() && \"Invalid FCOPYSIGN!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5132, __PRETTY_FUNCTION__));
  break;
case ISD::SHL:
case ISD::SRA:
case ISD::SRL:
  if (SDValue V = simplifyShift(N1, N2))
    return V;
  LLVM_FALLTHROUGH[[gnu::fallthrough]];
case ISD::ROTL:
case ISD::ROTR:
  assert(VT == N1.getValueType() &&((VT == N1.getValueType() && "Shift operators return type must be the same as their first arg"
) ? static_cast<void> (0) : __assert_fail ("VT == N1.getValueType() && \"Shift operators return type must be the same as their first arg\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5143, __PRETTY_FUNCTION__))
         "Shift operators return type must be the same as their first arg")((VT == N1.getValueType() && "Shift operators return type must be the same as their first arg"
) ? static_cast<void> (0) : __assert_fail ("VT == N1.getValueType() && \"Shift operators return type must be the same as their first arg\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5143, __PRETTY_FUNCTION__));
  assert(VT.isInteger() && N2.getValueType().isInteger() &&((VT.isInteger() && N2.getValueType().isInteger() &&
 "Shifts only work on integers") ? static_cast<void> (0
) : __assert_fail ("VT.isInteger() && N2.getValueType().isInteger() && \"Shifts only work on integers\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5145, __PRETTY_FUNCTION__))
         "Shifts only work on integers")((VT.isInteger() && N2.getValueType().isInteger() &&
 "Shifts only work on integers") ? static_cast<void> (0
) : __assert_fail ("VT.isInteger() && N2.getValueType().isInteger() && \"Shifts only work on integers\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5145, __PRETTY_FUNCTION__));
  assert((!VT.isVector() || VT == N2.getValueType()) &&(((!VT.isVector() || VT == N2.getValueType()) && "Vector shift amounts must be in the same as their first arg"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT == N2.getValueType()) && \"Vector shift amounts must be in the same as their first arg\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5147, __PRETTY_FUNCTION__))
         "Vector shift amounts must be in the same as their first arg")(((!VT.isVector() || VT == N2.getValueType()) && "Vector shift amounts must be in the same as their first arg"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT == N2.getValueType()) && \"Vector shift amounts must be in the same as their first arg\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5147, __PRETTY_FUNCTION__));
  // Verify that the shift amount VT is big enough to hold valid shift
  // amounts.  This catches things like trying to shift an i1024 value by an
  // i8, which is easy to fall into in generic code that uses
  // TLI.getShiftAmount().
  assert(N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits()) &&((N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits
()) && "Invalid use of small shift amount with oversized value!"
) ? static_cast<void> (0) : __assert_fail ("N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits()) && \"Invalid use of small shift amount with oversized value!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5153, __PRETTY_FUNCTION__))
         "Invalid use of small shift amount with oversized value!")((N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits
()) && "Invalid use of small shift amount with oversized value!"
) ? static_cast<void> (0) : __assert_fail ("N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits()) && \"Invalid use of small shift amount with oversized value!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5153, __PRETTY_FUNCTION__));

  // Always fold shifts of i1 values so the code generator doesn't need to
  // handle them.  Since we know the size of the shift has to be less than the
  // size of the value, the shift/rotate count is guaranteed to be zero.
  if (VT == MVT::i1)
    return N1;
  if (N2C && N2C->isNullValue())
    return N1;
  break;
case ISD::FP_ROUND:
  assert(VT.isFloatingPoint() &&((VT.isFloatingPoint() && N1.getValueType().isFloatingPoint
() && VT.bitsLE(N1.getValueType()) && N2C &&
 (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1)
 && "Invalid FP_ROUND!") ? static_cast<void> (0
) : __assert_fail ("VT.isFloatingPoint() && N1.getValueType().isFloatingPoint() && VT.bitsLE(N1.getValueType()) && N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) && \"Invalid FP_ROUND!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5168, __PRETTY_FUNCTION__))
         N1.getValueType().isFloatingPoint() &&((VT.isFloatingPoint() && N1.getValueType().isFloatingPoint
() && VT.bitsLE(N1.getValueType()) && N2C &&
 (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1)
 && "Invalid FP_ROUND!") ? static_cast<void> (0
) : __assert_fail ("VT.isFloatingPoint() && N1.getValueType().isFloatingPoint() && VT.bitsLE(N1.getValueType()) && N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) && \"Invalid FP_ROUND!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5168, __PRETTY_FUNCTION__))
         VT.bitsLE(N1.getValueType()) &&((VT.isFloatingPoint() && N1.getValueType().isFloatingPoint
() && VT.bitsLE(N1.getValueType()) && N2C &&
 (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1)
 && "Invalid FP_ROUND!") ? static_cast<void> (0
) : __assert_fail ("VT.isFloatingPoint() && N1.getValueType().isFloatingPoint() && VT.bitsLE(N1.getValueType()) && N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) && \"Invalid FP_ROUND!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5168, __PRETTY_FUNCTION__))
         N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) &&((VT.isFloatingPoint() && N1.getValueType().isFloatingPoint
() && VT.bitsLE(N1.getValueType()) && N2C &&
 (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1)
 && "Invalid FP_ROUND!") ? static_cast<void> (0
) : __assert_fail ("VT.isFloatingPoint() && N1.getValueType().isFloatingPoint() && VT.bitsLE(N1.getValueType()) && N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) && \"Invalid FP_ROUND!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5168, __PRETTY_FUNCTION__))
         "Invalid FP_ROUND!")((VT.isFloatingPoint() && N1.getValueType().isFloatingPoint
() && VT.bitsLE(N1.getValueType()) && N2C &&
 (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1)
 && "Invalid FP_ROUND!") ? static_cast<void> (0
) : __assert_fail ("VT.isFloatingPoint() && N1.getValueType().isFloatingPoint() && VT.bitsLE(N1.getValueType()) && N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) && \"Invalid FP_ROUND!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5168, __PRETTY_FUNCTION__));
  if (N1.getValueType() == VT) return N1;  // noop conversion.
  break;
case ISD::AssertSext:
case ISD::AssertZext: {
  EVT EVT = cast<VTSDNode>(N2)->getVT();
  assert(VT == N1.getValueType() && "Not an inreg extend!")((VT == N1.getValueType() && "Not an inreg extend!") ?
 static_cast<void> (0) : __assert_fail ("VT == N1.getValueType() && \"Not an inreg extend!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5174, __PRETTY_FUNCTION__));
  assert(VT.isInteger() && EVT.isInteger() &&((VT.isInteger() && EVT.isInteger() && "Cannot *_EXTEND_INREG FP types"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && EVT.isInteger() && \"Cannot *_EXTEND_INREG FP types\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5176, __PRETTY_FUNCTION__))
         "Cannot *_EXTEND_INREG FP types")((VT.isInteger() && EVT.isInteger() && "Cannot *_EXTEND_INREG FP types"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && EVT.isInteger() && \"Cannot *_EXTEND_INREG FP types\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5176, __PRETTY_FUNCTION__));
  assert(!EVT.isVector() &&((!EVT.isVector() && "AssertSExt/AssertZExt type should be the vector element type "
 "rather than the vector type!") ? static_cast<void> (0
) : __assert_fail ("!EVT.isVector() && \"AssertSExt/AssertZExt type should be the vector element type \" \"rather than the vector type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5179, __PRETTY_FUNCTION__))
         "AssertSExt/AssertZExt type should be the vector element type "((!EVT.isVector() && "AssertSExt/AssertZExt type should be the vector element type "
 "rather than the vector type!") ? static_cast<void> (0
) : __assert_fail ("!EVT.isVector() && \"AssertSExt/AssertZExt type should be the vector element type \" \"rather than the vector type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5179, __PRETTY_FUNCTION__))
         "rather than the vector type!")((!EVT.isVector() && "AssertSExt/AssertZExt type should be the vector element type "
 "rather than the vector type!") ? static_cast<void> (0
) : __assert_fail ("!EVT.isVector() && \"AssertSExt/AssertZExt type should be the vector element type \" \"rather than the vector type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5179, __PRETTY_FUNCTION__));
  assert(EVT.bitsLE(VT.getScalarType()) && "Not extending!")((EVT.bitsLE(VT.getScalarType()) && "Not extending!")
 ? static_cast<void> (0) : __assert_fail ("EVT.bitsLE(VT.getScalarType()) && \"Not extending!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5180, __PRETTY_FUNCTION__));
  if (VT.getScalarType() == EVT) return N1; // noop assertion.
  break;
}
case ISD::SIGN_EXTEND_INREG: {
  EVT EVT = cast<VTSDNode>(N2)->getVT();
  assert(VT == N1.getValueType() && "Not an inreg extend!")((VT == N1.getValueType() && "Not an inreg extend!") ?
 static_cast<void> (0) : __assert_fail ("VT == N1.getValueType() && \"Not an inreg extend!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5186, __PRETTY_FUNCTION__));
  assert(VT.isInteger() && EVT.isInteger() &&((VT.isInteger() && EVT.isInteger() && "Cannot *_EXTEND_INREG FP types"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && EVT.isInteger() && \"Cannot *_EXTEND_INREG FP types\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5188, __PRETTY_FUNCTION__))
         "Cannot *_EXTEND_INREG FP types")((VT.isInteger() && EVT.isInteger() && "Cannot *_EXTEND_INREG FP types"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && EVT.isInteger() && \"Cannot *_EXTEND_INREG FP types\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5188, __PRETTY_FUNCTION__));
  assert(EVT.isVector() == VT.isVector() &&((EVT.isVector() == VT.isVector() && "SIGN_EXTEND_INREG type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("EVT.isVector() == VT.isVector() && \"SIGN_EXTEND_INREG type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5191, __PRETTY_FUNCTION__))
         "SIGN_EXTEND_INREG type should be vector iff the operand "((EVT.isVector() == VT.isVector() && "SIGN_EXTEND_INREG type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("EVT.isVector() == VT.isVector() && \"SIGN_EXTEND_INREG type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5191, __PRETTY_FUNCTION__))
         "type is vector!")((EVT.isVector() == VT.isVector() && "SIGN_EXTEND_INREG type should be vector iff the operand "
 "type is vector!") ? static_cast<void> (0) : __assert_fail
 ("EVT.isVector() == VT.isVector() && \"SIGN_EXTEND_INREG type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5191, __PRETTY_FUNCTION__));
  assert((!EVT.isVector() ||(((!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements
()) && "Vector element counts must match in SIGN_EXTEND_INREG"
) ? static_cast<void> (0) : __assert_fail ("(!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements()) && \"Vector element counts must match in SIGN_EXTEND_INREG\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5194, __PRETTY_FUNCTION__))
          EVT.getVectorNumElements() == VT.getVectorNumElements()) &&(((!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements
()) && "Vector element counts must match in SIGN_EXTEND_INREG"
) ? static_cast<void> (0) : __assert_fail ("(!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements()) && \"Vector element counts must match in SIGN_EXTEND_INREG\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5194, __PRETTY_FUNCTION__))
         "Vector element counts must match in SIGN_EXTEND_INREG")(((!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements
()) && "Vector element counts must match in SIGN_EXTEND_INREG"
) ? static_cast<void> (0) : __assert_fail ("(!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements()) && \"Vector element counts must match in SIGN_EXTEND_INREG\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5194, __PRETTY_FUNCTION__));
  assert(EVT.bitsLE(VT) && "Not extending!")((EVT.bitsLE(VT) && "Not extending!") ? static_cast<
void> (0) : __assert_fail ("EVT.bitsLE(VT) && \"Not extending!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5195, __PRETTY_FUNCTION__));
  if (EVT == VT) return N1;  // Not actually extending

  auto SignExtendInReg = [&](APInt Val, llvm::EVT ConstantVT) {
    unsigned FromBits = EVT.getScalarSizeInBits();
    Val <<= Val.getBitWidth() - FromBits;
    Val.ashrInPlace(Val.getBitWidth() - FromBits);
    return getConstant(Val, DL, ConstantVT);
  };

  if (N1C) {
    const APInt &Val = N1C->getAPIntValue();
    return SignExtendInReg(Val, VT);
  }
  if (ISD::isBuildVectorOfConstantSDNodes(N1.getNode())) {
    SmallVector<SDValue, 8> Ops;
    llvm::EVT OpVT = N1.getOperand(0).getValueType();
    for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
      SDValue Op = N1.getOperand(i);
      if (Op.isUndef()) {
        Ops.push_back(getUNDEF(OpVT));
        continue;
      }
      ConstantSDNode *C = cast<ConstantSDNode>(Op);
      APInt Val = C->getAPIntValue();
      Ops.push_back(SignExtendInReg(Val, OpVT));
    }
    return getBuildVector(VT, DL, Ops);
  }
  break;
}
case ISD::EXTRACT_VECTOR_ELT:
  assert(VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits() &&((VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits
() && "The result of EXTRACT_VECTOR_ELT must be at least as wide as the              element type of the vector."
) ? static_cast<void> (0) : __assert_fail ("VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits() && \"The result of EXTRACT_VECTOR_ELT must be at least as wide as the              element type of the vector.\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5229, __PRETTY_FUNCTION__))
         "The result of EXTRACT_VECTOR_ELT must be at least as wide as the \((VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits
() && "The result of EXTRACT_VECTOR_ELT must be at least as wide as the              element type of the vector."
) ? static_cast<void> (0) : __assert_fail ("VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits() && \"The result of EXTRACT_VECTOR_ELT must be at least as wide as the              element type of the vector.\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5229, __PRETTY_FUNCTION__))
           element type of the vector.")((VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits
() && "The result of EXTRACT_VECTOR_ELT must be at least as wide as the              element type of the vector."
) ? static_cast<void> (0) : __assert_fail ("VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits() && \"The result of EXTRACT_VECTOR_ELT must be at least as wide as the              element type of the vector.\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5229, __PRETTY_FUNCTION__));

  // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
  if (N1.isUndef())
    return getUNDEF(VT);

  // EXTRACT_VECTOR_ELT of out-of-bounds element is an UNDEF
  if (N2C && N2C->getAPIntValue().uge(N1.getValueType().getVectorNumElements()))
    return getUNDEF(VT);

  // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
  // expanding copies of large vectors from registers.
  if (N2C &&
      N1.getOpcode() == ISD::CONCAT_VECTORS &&
      N1.getNumOperands() > 0) {
    unsigned Factor =
      N1.getOperand(0).getValueType().getVectorNumElements();
    return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
                   N1.getOperand(N2C->getZExtValue() / Factor),
                   getConstant(N2C->getZExtValue() % Factor, DL,
                               N2.getValueType()));
  }

  // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
  // expanding large vector constants.
  if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
    SDValue Elt = N1.getOperand(N2C->getZExtValue());

    if (VT != Elt.getValueType())
      // If the vector element type is not legal, the BUILD_VECTOR operands
      // are promoted and implicitly truncated, and the result implicitly
      // extended. Make that explicit here.
      Elt = getAnyExtOrTrunc(Elt, DL, VT);

    return Elt;
  }

  // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
  // operations are lowered to scalars.
  if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
    // If the indices are the same, return the inserted element else
    // if the indices are known different, extract the element from
    // the original vector.
    SDValue N1Op2 = N1.getOperand(2);
    ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2);

    if (N1Op2C && N2C) {
      if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
        if (VT == N1.getOperand(1).getValueType())
          return N1.getOperand(1);
        else
          return getSExtOrTrunc(N1.getOperand(1), DL, VT);
      }

      return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
    }
  }

  // EXTRACT_VECTOR_ELT of v1iX EXTRACT_SUBVECTOR could be formed
  // when vector types are scalarized and v1iX is legal.
  // vextract (v1iX extract_subvector(vNiX, Idx)) -> vextract(vNiX,Idx)
  if (N1.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
      N1.getValueType().getVectorNumElements() == 1) {
    return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0),
                   N1.getOperand(1));
  }
  break;
case ISD::EXTRACT_ELEMENT:
  assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!")((N2C && (unsigned)N2C->getZExtValue() < 2 &&
 "Bad EXTRACT_ELEMENT!") ? static_cast<void> (0) : __assert_fail
 ("N2C && (unsigned)N2C->getZExtValue() < 2 && \"Bad EXTRACT_ELEMENT!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5297, __PRETTY_FUNCTION__));
  assert(!N1.getValueType().isVector() && !VT.isVector() &&((!N1.getValueType().isVector() && !VT.isVector() &&
 (N1.getValueType().isInteger() == VT.isInteger()) &&
 N1.getValueType() != VT && "Wrong types for EXTRACT_ELEMENT!"
) ? static_cast<void> (0) : __assert_fail ("!N1.getValueType().isVector() && !VT.isVector() && (N1.getValueType().isInteger() == VT.isInteger()) && N1.getValueType() != VT && \"Wrong types for EXTRACT_ELEMENT!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5301, __PRETTY_FUNCTION__))
         (N1.getValueType().isInteger() == VT.isInteger()) &&((!N1.getValueType().isVector() && !VT.isVector() &&
 (N1.getValueType().isInteger() == VT.isInteger()) &&
 N1.getValueType() != VT && "Wrong types for EXTRACT_ELEMENT!"
) ? static_cast<void> (0) : __assert_fail ("!N1.getValueType().isVector() && !VT.isVector() && (N1.getValueType().isInteger() == VT.isInteger()) && N1.getValueType() != VT && \"Wrong types for EXTRACT_ELEMENT!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5301, __PRETTY_FUNCTION__))
         N1.getValueType() != VT &&((!N1.getValueType().isVector() && !VT.isVector() &&
 (N1.getValueType().isInteger() == VT.isInteger()) &&
 N1.getValueType() != VT && "Wrong types for EXTRACT_ELEMENT!"
) ? static_cast<void> (0) : __assert_fail ("!N1.getValueType().isVector() && !VT.isVector() && (N1.getValueType().isInteger() == VT.isInteger()) && N1.getValueType() != VT && \"Wrong types for EXTRACT_ELEMENT!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5301, __PRETTY_FUNCTION__))
         "Wrong types for EXTRACT_ELEMENT!")((!N1.getValueType().isVector() && !VT.isVector() &&
 (N1.getValueType().isInteger() == VT.isInteger()) &&
 N1.getValueType() != VT && "Wrong types for EXTRACT_ELEMENT!"
) ? static_cast<void> (0) : __assert_fail ("!N1.getValueType().isVector() && !VT.isVector() && (N1.getValueType().isInteger() == VT.isInteger()) && N1.getValueType() != VT && \"Wrong types for EXTRACT_ELEMENT!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5301, __PRETTY_FUNCTION__));

  // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
  // 64-bit integers into 32-bit parts.  Instead of building the extract of
  // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
  if (N1.getOpcode() == ISD::BUILD_PAIR)
    return N1.getOperand(N2C->getZExtValue());

  // EXTRACT_ELEMENT of a constant int is also very common.
  if (N1C) {
    unsigned ElementSize = VT.getSizeInBits();
    unsigned Shift = ElementSize * N2C->getZExtValue();
    APInt ShiftedVal = N1C->getAPIntValue().lshr(Shift);
    return getConstant(ShiftedVal.trunc(ElementSize), DL, VT);
  }
  break;
case ISD::EXTRACT_SUBVECTOR:
  if (VT.isSimple() && N1.getValueType().isSimple()) {
    assert(VT.isVector() && N1.getValueType().isVector() &&((VT.isVector() && N1.getValueType().isVector() &&
 "Extract subvector VTs must be a vectors!") ? static_cast<
void> (0) : __assert_fail ("VT.isVector() && N1.getValueType().isVector() && \"Extract subvector VTs must be a vectors!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5320, __PRETTY_FUNCTION__))
           "Extract subvector VTs must be a vectors!")((VT.isVector() && N1.getValueType().isVector() &&
 "Extract subvector VTs must be a vectors!") ? static_cast<
void> (0) : __assert_fail ("VT.isVector() && N1.getValueType().isVector() && \"Extract subvector VTs must be a vectors!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5320, __PRETTY_FUNCTION__));
    assert(VT.getVectorElementType() ==((VT.getVectorElementType() == N1.getValueType().getVectorElementType
() && "Extract subvector VTs must have the same element type!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorElementType() == N1.getValueType().getVectorElementType() && \"Extract subvector VTs must have the same element type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5323, __PRETTY_FUNCTION__))
           N1.getValueType().getVectorElementType() &&((VT.getVectorElementType() == N1.getValueType().getVectorElementType
() && "Extract subvector VTs must have the same element type!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorElementType() == N1.getValueType().getVectorElementType() && \"Extract subvector VTs must have the same element type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5323, __PRETTY_FUNCTION__))
           "Extract subvector VTs must have the same element type!")((VT.getVectorElementType() == N1.getValueType().getVectorElementType
() && "Extract subvector VTs must have the same element type!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorElementType() == N1.getValueType().getVectorElementType() && \"Extract subvector VTs must have the same element type!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5323, __PRETTY_FUNCTION__));
    assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&((VT.getSimpleVT() <= N1.getSimpleValueType() && "Extract subvector must be from larger vector to smaller vector!"
) ? static_cast<void> (0) : __assert_fail ("VT.getSimpleVT() <= N1.getSimpleValueType() && \"Extract subvector must be from larger vector to smaller vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5325, __PRETTY_FUNCTION__))
           "Extract subvector must be from larger vector to smaller vector!")((VT.getSimpleVT() <= N1.getSimpleValueType() && "Extract subvector must be from larger vector to smaller vector!"
) ? static_cast<void> (0) : __assert_fail ("VT.getSimpleVT() <= N1.getSimpleValueType() && \"Extract subvector must be from larger vector to smaller vector!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5325, __PRETTY_FUNCTION__));

    if (N2C) {
      assert((VT.getVectorNumElements() + N2C->getZExtValue()(((VT.getVectorNumElements() + N2C->getZExtValue() <= N1
.getValueType().getVectorNumElements()) && "Extract subvector overflow!"
) ? static_cast<void> (0) : __assert_fail ("(VT.getVectorNumElements() + N2C->getZExtValue() <= N1.getValueType().getVectorNumElements()) && \"Extract subvector overflow!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5330, __PRETTY_FUNCTION__))
              <= N1.getValueType().getVectorNumElements())(((VT.getVectorNumElements() + N2C->getZExtValue() <= N1
.getValueType().getVectorNumElements()) && "Extract subvector overflow!"
) ? static_cast<void> (0) : __assert_fail ("(VT.getVectorNumElements() + N2C->getZExtValue() <= N1.getValueType().getVectorNumElements()) && \"Extract subvector overflow!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5330, __PRETTY_FUNCTION__))
             && "Extract subvector overflow!")(((VT.getVectorNumElements() + N2C->getZExtValue() <= N1
.getValueType().getVectorNumElements()) && "Extract subvector overflow!"
) ? static_cast<void> (0) : __assert_fail ("(VT.getVectorNumElements() + N2C->getZExtValue() <= N1.getValueType().getVectorNumElements()) && \"Extract subvector overflow!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5330, __PRETTY_FUNCTION__));
    }

    // Trivial extraction.
    if (VT.getSimpleVT() == N1.getSimpleValueType())
      return N1;

    // EXTRACT_SUBVECTOR of an UNDEF is an UNDEF.
    if (N1.isUndef())
      return getUNDEF(VT);

    // EXTRACT_SUBVECTOR of CONCAT_VECTOR can be simplified if the pieces of
    // the concat have the same type as the extract.
    if (N2C && N1.getOpcode() == ISD::CONCAT_VECTORS &&
        N1.getNumOperands() > 0 &&
        VT == N1.getOperand(0).getValueType()) {
      unsigned Factor = VT.getVectorNumElements();
      return N1.getOperand(N2C->getZExtValue() / Factor);
    }

    // EXTRACT_SUBVECTOR of INSERT_SUBVECTOR is often created
    // during shuffle legalization.
    if (N1.getOpcode() == ISD::INSERT_SUBVECTOR && N2 == N1.getOperand(2) &&
        VT == N1.getOperand(1).getValueType())
      return N1.getOperand(1);
  }
  break;
}

// Perform trivial constant folding.
if (SDValue SV =
        FoldConstantArithmetic(Opcode, DL, VT, N1.getNode(), N2.getNode()))
  return SV;

if (SDValue V = foldConstantFPMath(Opcode, DL, VT, N1, N2))
  return V;

// Canonicalize an UNDEF to the RHS, even over a constant.
if (N1.isUndef()) {
  if (TLI->isCommutativeBinOp(Opcode)) {
    std::swap(N1, N2);
  } else {
    switch (Opcode) {
    case ISD::SIGN_EXTEND_INREG:
    case ISD::SUB:
      return getUNDEF(VT);     // fold op(undef, arg2) -> undef
    case ISD::UDIV:
    case ISD::SDIV:
    case ISD::UREM:
    case ISD::SREM:
    case ISD::SSUBSAT:
    case ISD::USUBSAT:
      return getConstant(0, DL, VT);    // fold op(undef, arg2) -> 0
    }
  }
}

// Fold a bunch of operators when the RHS is undef.
if (N2.isUndef()) {
  switch (Opcode) {
  case ISD::XOR:
    if (N1.isUndef())
      // Handle undef ^ undef -> 0 special case. This is a common
      // idiom (misuse).
      return getConstant(0, DL, VT);
    LLVM_FALLTHROUGH[[gnu::fallthrough]];
  case ISD::ADD:
  case ISD::SUB:
  case ISD::UDIV:
  case ISD::SDIV:
  case ISD::UREM:
  case ISD::SREM:
    return getUNDEF(VT);       // fold op(arg1, undef) -> undef
  case ISD::MUL:
  case ISD::AND:
  case ISD::SSUBSAT:
  case ISD::USUBSAT:
    return getConstant(0, DL, VT);  // fold op(arg1, undef) -> 0
  case ISD::OR:
  case ISD::SADDSAT:
  case ISD::UADDSAT:
    return getAllOnesConstant(DL, VT);
  }
}

// Memoize this node if possible.
SDNode *N;
SDVTList VTs = getVTList(VT);
SDValue Ops[] = {N1, N2};
if (VT != MVT::Glue) {
  FoldingSetNodeID ID;
  AddNodeIDNode(ID, Opcode, VTs, Ops);
  void *IP = nullptr;
  if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
    E->intersectFlagsWith(Flags);
    return SDValue(E, 0);
  }

  N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
  N->setFlags(Flags);
  createOperands(N, Ops);
  CSEMap.InsertNode(N, IP);
} else {
  N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
  createOperands(N, Ops);
}

InsertNode(N);
SDValue V = SDValue(N, 0);
NewSDValueDbgMsg(V, "Creating new node: ", this);
return V;
5441}

5443SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
                            SDValue N1, SDValue N2, SDValue N3,
                            const SDNodeFlags Flags) {
// Perform various simplifications.
switch (Opcode) {
case ISD::FMA: {
  assert(VT.isFloatingPoint() && "This operator only applies to FP types!")((VT.isFloatingPoint() && "This operator only applies to FP types!"
) ? static_cast<void> (0) : __assert_fail ("VT.isFloatingPoint() && \"This operator only applies to FP types!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5449, __PRETTY_FUNCTION__));
  assert(N1.getValueType() == VT && N2.getValueType() == VT &&((N1.getValueType() == VT && N2.getValueType() == VT &&
 N3.getValueType() == VT && "FMA types must match!") ?
 static_cast<void> (0) : __assert_fail ("N1.getValueType() == VT && N2.getValueType() == VT && N3.getValueType() == VT && \"FMA types must match!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5451, __PRETTY_FUNCTION__))
         N3.getValueType() == VT && "FMA types must match!")((N1.getValueType() == VT && N2.getValueType() == VT &&
 N3.getValueType() == VT && "FMA types must match!") ?
 static_cast<void> (0) : __assert_fail ("N1.getValueType() == VT && N2.getValueType() == VT && N3.getValueType() == VT && \"FMA types must match!\""
, "/build/llvm-toolchain-snapshot-10~svn374877/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5451, __PRETTY_FUNCTION__));
  ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
  ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
  ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
  if (N1CFP && N2CFP && N3CFP) {
    APFloat  V1 = N1CFP->getValueAPF();
    const APFloat &V2 = N2CFP->getValueAPF();
    const APFloat &V3 = N3CFP->getValueAPF();
    V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
    return getConstantFP(V1, DL, VT);
  }
  break;
}
case ISD::BUILD_VECTOR: {
  // Attempt to simplify BUILD_VECTOR.