Bug Summary

File:llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Warning:line 1154, column 10
Called C++ object pointer is null

Annotated Source Code

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clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name SelectionDAG.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -analyzer-config-compatibility-mode=true -mrelocation-model pic -pic-level 2 -mthread-model posix -mframe-pointer=none -fmath-errno -fno-rounding-math -masm-verbose -mconstructor-aliases -munwind-tables -target-cpu x86-64 -dwarf-column-info -fno-split-dwarf-inlining -debugger-tuning=gdb -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-10/lib/clang/10.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/build-llvm/lib/CodeGen/SelectionDAG -I /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG -I /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/build-llvm/include -I /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/backward -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-10/lib/clang/10.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++14 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/build-llvm/lib/CodeGen/SelectionDAG -fdebug-prefix-map=/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd=. -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -stack-protector 2 -fgnuc-version=4.2.1 -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -faddrsig -o /tmp/scan-build-2020-01-13-084841-49055-1 -x c++ /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

1//===- SelectionDAG.cpp - Implement the SelectionDAG data structures ------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG class.
10//
11//===----------------------------------------------------------------------===//
12
13#include "llvm/CodeGen/SelectionDAG.h"
14#include "SDNodeDbgValue.h"
15#include "llvm/ADT/APFloat.h"
16#include "llvm/ADT/APInt.h"
17#include "llvm/ADT/APSInt.h"
18#include "llvm/ADT/ArrayRef.h"
19#include "llvm/ADT/BitVector.h"
20#include "llvm/ADT/FoldingSet.h"
21#include "llvm/ADT/None.h"
22#include "llvm/ADT/STLExtras.h"
23#include "llvm/ADT/SmallPtrSet.h"
24#include "llvm/ADT/SmallVector.h"
25#include "llvm/ADT/Triple.h"
26#include "llvm/ADT/Twine.h"
27#include "llvm/Analysis/BlockFrequencyInfo.h"
28#include "llvm/Analysis/MemoryLocation.h"
29#include "llvm/Analysis/ProfileSummaryInfo.h"
30#include "llvm/Analysis/ValueTracking.h"
31#include "llvm/CodeGen/ISDOpcodes.h"
32#include "llvm/CodeGen/MachineBasicBlock.h"
33#include "llvm/CodeGen/MachineConstantPool.h"
34#include "llvm/CodeGen/MachineFrameInfo.h"
35#include "llvm/CodeGen/MachineFunction.h"
36#include "llvm/CodeGen/MachineMemOperand.h"
37#include "llvm/CodeGen/RuntimeLibcalls.h"
38#include "llvm/CodeGen/SelectionDAGAddressAnalysis.h"
39#include "llvm/CodeGen/SelectionDAGNodes.h"
40#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
41#include "llvm/CodeGen/TargetLowering.h"
42#include "llvm/CodeGen/TargetRegisterInfo.h"
43#include "llvm/CodeGen/TargetSubtargetInfo.h"
44#include "llvm/CodeGen/ValueTypes.h"
45#include "llvm/IR/Constant.h"
46#include "llvm/IR/Constants.h"
47#include "llvm/IR/DataLayout.h"
48#include "llvm/IR/DebugInfoMetadata.h"
49#include "llvm/IR/DebugLoc.h"
50#include "llvm/IR/DerivedTypes.h"
51#include "llvm/IR/Function.h"
52#include "llvm/IR/GlobalValue.h"
53#include "llvm/IR/Metadata.h"
54#include "llvm/IR/Type.h"
55#include "llvm/IR/Value.h"
56#include "llvm/Support/Casting.h"
57#include "llvm/Support/CodeGen.h"
58#include "llvm/Support/Compiler.h"
59#include "llvm/Support/Debug.h"
60#include "llvm/Support/ErrorHandling.h"
61#include "llvm/Support/KnownBits.h"
62#include "llvm/Support/MachineValueType.h"
63#include "llvm/Support/ManagedStatic.h"
64#include "llvm/Support/MathExtras.h"
65#include "llvm/Support/Mutex.h"
66#include "llvm/Support/raw_ostream.h"
67#include "llvm/Target/TargetMachine.h"
68#include "llvm/Target/TargetOptions.h"
69#include "llvm/Transforms/Utils/SizeOpts.h"
70#include <algorithm>
71#include <cassert>
72#include <cstdint>
73#include <cstdlib>
74#include <limits>
75#include <set>
76#include <string>
77#include <utility>
78#include <vector>
79
80using namespace llvm;
81
82/// makeVTList - Return an instance of the SDVTList struct initialized with the
83/// specified members.
84static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
85 SDVTList Res = {VTs, NumVTs};
86 return Res;
87}
88
89// Default null implementations of the callbacks.
90void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
91void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
92void SelectionDAG::DAGUpdateListener::NodeInserted(SDNode *) {}
93
94void SelectionDAG::DAGNodeDeletedListener::anchor() {}
95
96#define DEBUG_TYPE"selectiondag" "selectiondag"
97
98static cl::opt<bool> EnableMemCpyDAGOpt("enable-memcpy-dag-opt",
99 cl::Hidden, cl::init(true),
100 cl::desc("Gang up loads and stores generated by inlining of memcpy"));
101
102static cl::opt<int> MaxLdStGlue("ldstmemcpy-glue-max",
103 cl::desc("Number limit for gluing ld/st of memcpy."),
104 cl::Hidden, cl::init(0));
105
106static void NewSDValueDbgMsg(SDValue V, StringRef Msg, SelectionDAG *G) {
107 LLVM_DEBUG(dbgs() << Msg; V.getNode()->dump(G);)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("selectiondag")) { dbgs() << Msg; V.getNode()->dump
(G);; } } while (false)
;
108}
109
110//===----------------------------------------------------------------------===//
111// ConstantFPSDNode Class
112//===----------------------------------------------------------------------===//
113
114/// isExactlyValue - We don't rely on operator== working on double values, as
115/// it returns true for things that are clearly not equal, like -0.0 and 0.0.
116/// As such, this method can be used to do an exact bit-for-bit comparison of
117/// two floating point values.
118bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
119 return getValueAPF().bitwiseIsEqual(V);
120}
121
122bool ConstantFPSDNode::isValueValidForType(EVT VT,
123 const APFloat& Val) {
124 assert(VT.isFloatingPoint() && "Can only convert between FP types")((VT.isFloatingPoint() && "Can only convert between FP types"
) ? static_cast<void> (0) : __assert_fail ("VT.isFloatingPoint() && \"Can only convert between FP types\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 124, __PRETTY_FUNCTION__))
;
125
126 // convert modifies in place, so make a copy.
127 APFloat Val2 = APFloat(Val);
128 bool losesInfo;
129 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
130 APFloat::rmNearestTiesToEven,
131 &losesInfo);
132 return !losesInfo;
133}
134
135//===----------------------------------------------------------------------===//
136// ISD Namespace
137//===----------------------------------------------------------------------===//
138
139bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) {
140 auto *BV = dyn_cast<BuildVectorSDNode>(N);
141 if (!BV)
142 return false;
143
144 APInt SplatUndef;
145 unsigned SplatBitSize;
146 bool HasUndefs;
147 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
148 return BV->isConstantSplat(SplatVal, SplatUndef, SplatBitSize, HasUndefs,
149 EltSize) &&
150 EltSize == SplatBitSize;
151}
152
153// FIXME: AllOnes and AllZeros duplicate a lot of code. Could these be
154// specializations of the more general isConstantSplatVector()?
155
156bool ISD::isBuildVectorAllOnes(const SDNode *N) {
157 // Look through a bit convert.
158 while (N->getOpcode() == ISD::BITCAST)
159 N = N->getOperand(0).getNode();
160
161 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
162
163 unsigned i = 0, e = N->getNumOperands();
164
165 // Skip over all of the undef values.
166 while (i != e && N->getOperand(i).isUndef())
167 ++i;
168
169 // Do not accept an all-undef vector.
170 if (i == e) return false;
171
172 // Do not accept build_vectors that aren't all constants or which have non-~0
173 // elements. We have to be a bit careful here, as the type of the constant
174 // may not be the same as the type of the vector elements due to type
175 // legalization (the elements are promoted to a legal type for the target and
176 // a vector of a type may be legal when the base element type is not).
177 // We only want to check enough bits to cover the vector elements, because
178 // we care if the resultant vector is all ones, not whether the individual
179 // constants are.
180 SDValue NotZero = N->getOperand(i);
181 unsigned EltSize = N->getValueType(0).getScalarSizeInBits();
182 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
183 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
184 return false;
185 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
186 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
187 return false;
188 } else
189 return false;
190
191 // Okay, we have at least one ~0 value, check to see if the rest match or are
192 // undefs. Even with the above element type twiddling, this should be OK, as
193 // the same type legalization should have applied to all the elements.
194 for (++i; i != e; ++i)
195 if (N->getOperand(i) != NotZero && !N->getOperand(i).isUndef())
196 return false;
197 return true;
198}
199
200bool ISD::isBuildVectorAllZeros(const SDNode *N) {
201 // Look through a bit convert.
202 while (N->getOpcode() == ISD::BITCAST)
203 N = N->getOperand(0).getNode();
204
205 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
206
207 bool IsAllUndef = true;
208 for (const SDValue &Op : N->op_values()) {
209 if (Op.isUndef())
210 continue;
211 IsAllUndef = false;
212 // Do not accept build_vectors that aren't all constants or which have non-0
213 // elements. We have to be a bit careful here, as the type of the constant
214 // may not be the same as the type of the vector elements due to type
215 // legalization (the elements are promoted to a legal type for the target
216 // and a vector of a type may be legal when the base element type is not).
217 // We only want to check enough bits to cover the vector elements, because
218 // we care if the resultant vector is all zeros, not whether the individual
219 // constants are.
220 unsigned EltSize = N->getValueType(0).getScalarSizeInBits();
221 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op)) {
222 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
223 return false;
224 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Op)) {
225 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
226 return false;
227 } else
228 return false;
229 }
230
231 // Do not accept an all-undef vector.
232 if (IsAllUndef)
233 return false;
234 return true;
235}
236
237bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
238 if (N->getOpcode() != ISD::BUILD_VECTOR)
239 return false;
240
241 for (const SDValue &Op : N->op_values()) {
242 if (Op.isUndef())
243 continue;
244 if (!isa<ConstantSDNode>(Op))
245 return false;
246 }
247 return true;
248}
249
250bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
251 if (N->getOpcode() != ISD::BUILD_VECTOR)
252 return false;
253
254 for (const SDValue &Op : N->op_values()) {
255 if (Op.isUndef())
256 continue;
257 if (!isa<ConstantFPSDNode>(Op))
258 return false;
259 }
260 return true;
261}
262
263bool ISD::allOperandsUndef(const SDNode *N) {
264 // Return false if the node has no operands.
265 // This is "logically inconsistent" with the definition of "all" but
266 // is probably the desired behavior.
267 if (N->getNumOperands() == 0)
268 return false;
269 return all_of(N->op_values(), [](SDValue Op) { return Op.isUndef(); });
270}
271
272bool ISD::matchUnaryPredicate(SDValue Op,
273 std::function<bool(ConstantSDNode *)> Match,
274 bool AllowUndefs) {
275 // FIXME: Add support for scalar UNDEF cases?
276 if (auto *Cst = dyn_cast<ConstantSDNode>(Op))
277 return Match(Cst);
278
279 // FIXME: Add support for vector UNDEF cases?
280 if (ISD::BUILD_VECTOR != Op.getOpcode())
281 return false;
282
283 EVT SVT = Op.getValueType().getScalarType();
284 for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
285 if (AllowUndefs && Op.getOperand(i).isUndef()) {
286 if (!Match(nullptr))
287 return false;
288 continue;
289 }
290
291 auto *Cst = dyn_cast<ConstantSDNode>(Op.getOperand(i));
292 if (!Cst || Cst->getValueType(0) != SVT || !Match(Cst))
293 return false;
294 }
295 return true;
296}
297
298bool ISD::matchBinaryPredicate(
299 SDValue LHS, SDValue RHS,
300 std::function<bool(ConstantSDNode *, ConstantSDNode *)> Match,
301 bool AllowUndefs, bool AllowTypeMismatch) {
302 if (!AllowTypeMismatch && LHS.getValueType() != RHS.getValueType())
303 return false;
304
305 // TODO: Add support for scalar UNDEF cases?
306 if (auto *LHSCst = dyn_cast<ConstantSDNode>(LHS))
307 if (auto *RHSCst = dyn_cast<ConstantSDNode>(RHS))
308 return Match(LHSCst, RHSCst);
309
310 // TODO: Add support for vector UNDEF cases?
311 if (ISD::BUILD_VECTOR != LHS.getOpcode() ||
312 ISD::BUILD_VECTOR != RHS.getOpcode())
313 return false;
314
315 EVT SVT = LHS.getValueType().getScalarType();
316 for (unsigned i = 0, e = LHS.getNumOperands(); i != e; ++i) {
317 SDValue LHSOp = LHS.getOperand(i);
318 SDValue RHSOp = RHS.getOperand(i);
319 bool LHSUndef = AllowUndefs && LHSOp.isUndef();
320 bool RHSUndef = AllowUndefs && RHSOp.isUndef();
321 auto *LHSCst = dyn_cast<ConstantSDNode>(LHSOp);
322 auto *RHSCst = dyn_cast<ConstantSDNode>(RHSOp);
323 if ((!LHSCst && !LHSUndef) || (!RHSCst && !RHSUndef))
324 return false;
325 if (!AllowTypeMismatch && (LHSOp.getValueType() != SVT ||
326 LHSOp.getValueType() != RHSOp.getValueType()))
327 return false;
328 if (!Match(LHSCst, RHSCst))
329 return false;
330 }
331 return true;
332}
333
334ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
335 switch (ExtType) {
336 case ISD::EXTLOAD:
337 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
338 case ISD::SEXTLOAD:
339 return ISD::SIGN_EXTEND;
340 case ISD::ZEXTLOAD:
341 return ISD::ZERO_EXTEND;
342 default:
343 break;
344 }
345
346 llvm_unreachable("Invalid LoadExtType")::llvm::llvm_unreachable_internal("Invalid LoadExtType", "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 346)
;
347}
348
349ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
350 // To perform this operation, we just need to swap the L and G bits of the
351 // operation.
352 unsigned OldL = (Operation >> 2) & 1;
353 unsigned OldG = (Operation >> 1) & 1;
354 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
355 (OldL << 1) | // New G bit
356 (OldG << 2)); // New L bit.
357}
358
359ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, EVT Type) {
360 bool IsInteger = Type.isInteger();
361 unsigned Operation = Op;
362 if (IsInteger)
363 Operation ^= 7; // Flip L, G, E bits, but not U.
364 else
365 Operation ^= 15; // Flip all of the condition bits.
366
367 if (Operation > ISD::SETTRUE2)
368 Operation &= ~8; // Don't let N and U bits get set.
369
370 return ISD::CondCode(Operation);
371}
372
373/// For an integer comparison, return 1 if the comparison is a signed operation
374/// and 2 if the result is an unsigned comparison. Return zero if the operation
375/// does not depend on the sign of the input (setne and seteq).
376static int isSignedOp(ISD::CondCode Opcode) {
377 switch (Opcode) {
378 default: llvm_unreachable("Illegal integer setcc operation!")::llvm::llvm_unreachable_internal("Illegal integer setcc operation!"
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 378)
;
379 case ISD::SETEQ:
380 case ISD::SETNE: return 0;
381 case ISD::SETLT:
382 case ISD::SETLE:
383 case ISD::SETGT:
384 case ISD::SETGE: return 1;
385 case ISD::SETULT:
386 case ISD::SETULE:
387 case ISD::SETUGT:
388 case ISD::SETUGE: return 2;
389 }
390}
391
392ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
393 EVT Type) {
394 bool IsInteger = Type.isInteger();
395 if (IsInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
396 // Cannot fold a signed integer setcc with an unsigned integer setcc.
397 return ISD::SETCC_INVALID;
398
399 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
400
401 // If the N and U bits get set, then the resultant comparison DOES suddenly
402 // care about orderedness, and it is true when ordered.
403 if (Op > ISD::SETTRUE2)
404 Op &= ~16; // Clear the U bit if the N bit is set.
405
406 // Canonicalize illegal integer setcc's.
407 if (IsInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
408 Op = ISD::SETNE;
409
410 return ISD::CondCode(Op);
411}
412
413ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
414 EVT Type) {
415 bool IsInteger = Type.isInteger();
416 if (IsInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
417 // Cannot fold a signed setcc with an unsigned setcc.
418 return ISD::SETCC_INVALID;
419
420 // Combine all of the condition bits.
421 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
422
423 // Canonicalize illegal integer setcc's.
424 if (IsInteger) {
425 switch (Result) {
426 default: break;
427 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
428 case ISD::SETOEQ: // SETEQ & SETU[LG]E
429 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
430 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
431 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
432 }
433 }
434
435 return Result;
436}
437
438//===----------------------------------------------------------------------===//
439// SDNode Profile Support
440//===----------------------------------------------------------------------===//
441
442/// AddNodeIDOpcode - Add the node opcode to the NodeID data.
443static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
444 ID.AddInteger(OpC);
445}
446
447/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
448/// solely with their pointer.
449static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
450 ID.AddPointer(VTList.VTs);
451}
452
453/// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
454static void AddNodeIDOperands(FoldingSetNodeID &ID,
455 ArrayRef<SDValue> Ops) {
456 for (auto& Op : Ops) {
457 ID.AddPointer(Op.getNode());
458 ID.AddInteger(Op.getResNo());
459 }
460}
461
462/// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
463static void AddNodeIDOperands(FoldingSetNodeID &ID,
464 ArrayRef<SDUse> Ops) {
465 for (auto& Op : Ops) {
466 ID.AddPointer(Op.getNode());
467 ID.AddInteger(Op.getResNo());
468 }
469}
470
471static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
472 SDVTList VTList, ArrayRef<SDValue> OpList) {
473 AddNodeIDOpcode(ID, OpC);
474 AddNodeIDValueTypes(ID, VTList);
475 AddNodeIDOperands(ID, OpList);
476}
477
478/// If this is an SDNode with special info, add this info to the NodeID data.
479static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
480 switch (N->getOpcode()) {
481 case ISD::TargetExternalSymbol:
482 case ISD::ExternalSymbol:
483 case ISD::MCSymbol:
484 llvm_unreachable("Should only be used on nodes with operands")::llvm::llvm_unreachable_internal("Should only be used on nodes with operands"
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 484)
;
485 default: break; // Normal nodes don't need extra info.
486 case ISD::TargetConstant:
487 case ISD::Constant: {
488 const ConstantSDNode *C = cast<ConstantSDNode>(N);
489 ID.AddPointer(C->getConstantIntValue());
490 ID.AddBoolean(C->isOpaque());
491 break;
492 }
493 case ISD::TargetConstantFP:
494 case ISD::ConstantFP:
495 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
496 break;
497 case ISD::TargetGlobalAddress:
498 case ISD::GlobalAddress:
499 case ISD::TargetGlobalTLSAddress:
500 case ISD::GlobalTLSAddress: {
501 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
502 ID.AddPointer(GA->getGlobal());
503 ID.AddInteger(GA->getOffset());
504 ID.AddInteger(GA->getTargetFlags());
505 break;
506 }
507 case ISD::BasicBlock:
508 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
509 break;
510 case ISD::Register:
511 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
512 break;
513 case ISD::RegisterMask:
514 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
515 break;
516 case ISD::SRCVALUE:
517 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
518 break;
519 case ISD::FrameIndex:
520 case ISD::TargetFrameIndex:
521 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
522 break;
523 case ISD::LIFETIME_START:
524 case ISD::LIFETIME_END:
525 if (cast<LifetimeSDNode>(N)->hasOffset()) {
526 ID.AddInteger(cast<LifetimeSDNode>(N)->getSize());
527 ID.AddInteger(cast<LifetimeSDNode>(N)->getOffset());
528 }
529 break;
530 case ISD::JumpTable:
531 case ISD::TargetJumpTable:
532 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
533 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
534 break;
535 case ISD::ConstantPool:
536 case ISD::TargetConstantPool: {
537 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
538 ID.AddInteger(CP->getAlignment());
539 ID.AddInteger(CP->getOffset());
540 if (CP->isMachineConstantPoolEntry())
541 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
542 else
543 ID.AddPointer(CP->getConstVal());
544 ID.AddInteger(CP->getTargetFlags());
545 break;
546 }
547 case ISD::TargetIndex: {
548 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
549 ID.AddInteger(TI->getIndex());
550 ID.AddInteger(TI->getOffset());
551 ID.AddInteger(TI->getTargetFlags());
552 break;
553 }
554 case ISD::LOAD: {
555 const LoadSDNode *LD = cast<LoadSDNode>(N);
556 ID.AddInteger(LD->getMemoryVT().getRawBits());
557 ID.AddInteger(LD->getRawSubclassData());
558 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
559 break;
560 }
561 case ISD::STORE: {
562 const StoreSDNode *ST = cast<StoreSDNode>(N);
563 ID.AddInteger(ST->getMemoryVT().getRawBits());
564 ID.AddInteger(ST->getRawSubclassData());
565 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
566 break;
567 }
568 case ISD::MLOAD: {
569 const MaskedLoadSDNode *MLD = cast<MaskedLoadSDNode>(N);
570 ID.AddInteger(MLD->getMemoryVT().getRawBits());
571 ID.AddInteger(MLD->getRawSubclassData());
572 ID.AddInteger(MLD->getPointerInfo().getAddrSpace());
573 break;
574 }
575 case ISD::MSTORE: {
576 const MaskedStoreSDNode *MST = cast<MaskedStoreSDNode>(N);
577 ID.AddInteger(MST->getMemoryVT().getRawBits());
578 ID.AddInteger(MST->getRawSubclassData());
579 ID.AddInteger(MST->getPointerInfo().getAddrSpace());
580 break;
581 }
582 case ISD::MGATHER: {
583 const MaskedGatherSDNode *MG = cast<MaskedGatherSDNode>(N);
584 ID.AddInteger(MG->getMemoryVT().getRawBits());
585 ID.AddInteger(MG->getRawSubclassData());
586 ID.AddInteger(MG->getPointerInfo().getAddrSpace());
587 break;
588 }
589 case ISD::MSCATTER: {
590 const MaskedScatterSDNode *MS = cast<MaskedScatterSDNode>(N);
591 ID.AddInteger(MS->getMemoryVT().getRawBits());
592 ID.AddInteger(MS->getRawSubclassData());
593 ID.AddInteger(MS->getPointerInfo().getAddrSpace());
594 break;
595 }
596 case ISD::ATOMIC_CMP_SWAP:
597 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
598 case ISD::ATOMIC_SWAP:
599 case ISD::ATOMIC_LOAD_ADD:
600 case ISD::ATOMIC_LOAD_SUB:
601 case ISD::ATOMIC_LOAD_AND:
602 case ISD::ATOMIC_LOAD_CLR:
603 case ISD::ATOMIC_LOAD_OR:
604 case ISD::ATOMIC_LOAD_XOR:
605 case ISD::ATOMIC_LOAD_NAND:
606 case ISD::ATOMIC_LOAD_MIN:
607 case ISD::ATOMIC_LOAD_MAX:
608 case ISD::ATOMIC_LOAD_UMIN:
609 case ISD::ATOMIC_LOAD_UMAX:
610 case ISD::ATOMIC_LOAD:
611 case ISD::ATOMIC_STORE: {
612 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
613 ID.AddInteger(AT->getMemoryVT().getRawBits());
614 ID.AddInteger(AT->getRawSubclassData());
615 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
616 break;
617 }
618 case ISD::PREFETCH: {
619 const MemSDNode *PF = cast<MemSDNode>(N);
620 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
621 break;
622 }
623 case ISD::VECTOR_SHUFFLE: {
624 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
625 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
626 i != e; ++i)
627 ID.AddInteger(SVN->getMaskElt(i));
628 break;
629 }
630 case ISD::TargetBlockAddress:
631 case ISD::BlockAddress: {
632 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
633 ID.AddPointer(BA->getBlockAddress());
634 ID.AddInteger(BA->getOffset());
635 ID.AddInteger(BA->getTargetFlags());
636 break;
637 }
638 } // end switch (N->getOpcode())
639
640 // Target specific memory nodes could also have address spaces to check.
641 if (N->isTargetMemoryOpcode())
642 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
643}
644
645/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
646/// data.
647static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
648 AddNodeIDOpcode(ID, N->getOpcode());
649 // Add the return value info.
650 AddNodeIDValueTypes(ID, N->getVTList());
651 // Add the operand info.
652 AddNodeIDOperands(ID, N->ops());
653
654 // Handle SDNode leafs with special info.
655 AddNodeIDCustom(ID, N);
656}
657
658//===----------------------------------------------------------------------===//
659// SelectionDAG Class
660//===----------------------------------------------------------------------===//
661
662/// doNotCSE - Return true if CSE should not be performed for this node.
663static bool doNotCSE(SDNode *N) {
664 if (N->getValueType(0) == MVT::Glue)
665 return true; // Never CSE anything that produces a flag.
666
667 switch (N->getOpcode()) {
668 default: break;
669 case ISD::HANDLENODE:
670 case ISD::EH_LABEL:
671 return true; // Never CSE these nodes.
672 }
673
674 // Check that remaining values produced are not flags.
675 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
676 if (N->getValueType(i) == MVT::Glue)
677 return true; // Never CSE anything that produces a flag.
678
679 return false;
680}
681
682/// RemoveDeadNodes - This method deletes all unreachable nodes in the
683/// SelectionDAG.
684void SelectionDAG::RemoveDeadNodes() {
685 // Create a dummy node (which is not added to allnodes), that adds a reference
686 // to the root node, preventing it from being deleted.
687 HandleSDNode Dummy(getRoot());
688
689 SmallVector<SDNode*, 128> DeadNodes;
690
691 // Add all obviously-dead nodes to the DeadNodes worklist.
692 for (SDNode &Node : allnodes())
693 if (Node.use_empty())
694 DeadNodes.push_back(&Node);
695
696 RemoveDeadNodes(DeadNodes);
697
698 // If the root changed (e.g. it was a dead load, update the root).
699 setRoot(Dummy.getValue());
700}
701
702/// RemoveDeadNodes - This method deletes the unreachable nodes in the
703/// given list, and any nodes that become unreachable as a result.
704void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
705
706 // Process the worklist, deleting the nodes and adding their uses to the
707 // worklist.
708 while (!DeadNodes.empty()) {
709 SDNode *N = DeadNodes.pop_back_val();
710 // Skip to next node if we've already managed to delete the node. This could
711 // happen if replacing a node causes a node previously added to the node to
712 // be deleted.
713 if (N->getOpcode() == ISD::DELETED_NODE)
714 continue;
715
716 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
717 DUL->NodeDeleted(N, nullptr);
718
719 // Take the node out of the appropriate CSE map.
720 RemoveNodeFromCSEMaps(N);
721
722 // Next, brutally remove the operand list. This is safe to do, as there are
723 // no cycles in the graph.
724 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
725 SDUse &Use = *I++;
726 SDNode *Operand = Use.getNode();
727 Use.set(SDValue());
728
729 // Now that we removed this operand, see if there are no uses of it left.
730 if (Operand->use_empty())
731 DeadNodes.push_back(Operand);
732 }
733
734 DeallocateNode(N);
735 }
736}
737
738void SelectionDAG::RemoveDeadNode(SDNode *N){
739 SmallVector<SDNode*, 16> DeadNodes(1, N);
740
741 // Create a dummy node that adds a reference to the root node, preventing
742 // it from being deleted. (This matters if the root is an operand of the
743 // dead node.)
744 HandleSDNode Dummy(getRoot());
745
746 RemoveDeadNodes(DeadNodes);
747}
748
749void SelectionDAG::DeleteNode(SDNode *N) {
750 // First take this out of the appropriate CSE map.
751 RemoveNodeFromCSEMaps(N);
752
753 // Finally, remove uses due to operands of this node, remove from the
754 // AllNodes list, and delete the node.
755 DeleteNodeNotInCSEMaps(N);
756}
757
758void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
759 assert(N->getIterator() != AllNodes.begin() &&((N->getIterator() != AllNodes.begin() && "Cannot delete the entry node!"
) ? static_cast<void> (0) : __assert_fail ("N->getIterator() != AllNodes.begin() && \"Cannot delete the entry node!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 760, __PRETTY_FUNCTION__))
760 "Cannot delete the entry node!")((N->getIterator() != AllNodes.begin() && "Cannot delete the entry node!"
) ? static_cast<void> (0) : __assert_fail ("N->getIterator() != AllNodes.begin() && \"Cannot delete the entry node!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 760, __PRETTY_FUNCTION__))
;
761 assert(N->use_empty() && "Cannot delete a node that is not dead!")((N->use_empty() && "Cannot delete a node that is not dead!"
) ? static_cast<void> (0) : __assert_fail ("N->use_empty() && \"Cannot delete a node that is not dead!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 761, __PRETTY_FUNCTION__))
;
762
763 // Drop all of the operands and decrement used node's use counts.
764 N->DropOperands();
765
766 DeallocateNode(N);
767}
768
769void SDDbgInfo::erase(const SDNode *Node) {
770 DbgValMapType::iterator I = DbgValMap.find(Node);
771 if (I == DbgValMap.end())
772 return;
773 for (auto &Val: I->second)
774 Val->setIsInvalidated();
775 DbgValMap.erase(I);
776}
777
778void SelectionDAG::DeallocateNode(SDNode *N) {
779 // If we have operands, deallocate them.
780 removeOperands(N);
781
782 NodeAllocator.Deallocate(AllNodes.remove(N));
783
784 // Set the opcode to DELETED_NODE to help catch bugs when node
785 // memory is reallocated.
786 // FIXME: There are places in SDag that have grown a dependency on the opcode
787 // value in the released node.
788 __asan_unpoison_memory_region(&N->NodeType, sizeof(N->NodeType));
789 N->NodeType = ISD::DELETED_NODE;
790
791 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
792 // them and forget about that node.
793 DbgInfo->erase(N);
794}
795
796#ifndef NDEBUG
797/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
798static void VerifySDNode(SDNode *N) {
799 switch (N->getOpcode()) {
800 default:
801 break;
802 case ISD::BUILD_PAIR: {
803 EVT VT = N->getValueType(0);
804 assert(N->getNumValues() == 1 && "Too many results!")((N->getNumValues() == 1 && "Too many results!") ?
static_cast<void> (0) : __assert_fail ("N->getNumValues() == 1 && \"Too many results!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 804, __PRETTY_FUNCTION__))
;
805 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&((!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint
()) && "Wrong return type!") ? static_cast<void>
(0) : __assert_fail ("!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && \"Wrong return type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 806, __PRETTY_FUNCTION__))
806 "Wrong return type!")((!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint
()) && "Wrong return type!") ? static_cast<void>
(0) : __assert_fail ("!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && \"Wrong return type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 806, __PRETTY_FUNCTION__))
;
807 assert(N->getNumOperands() == 2 && "Wrong number of operands!")((N->getNumOperands() == 2 && "Wrong number of operands!"
) ? static_cast<void> (0) : __assert_fail ("N->getNumOperands() == 2 && \"Wrong number of operands!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 807, __PRETTY_FUNCTION__))
;
808 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&((N->getOperand(0).getValueType() == N->getOperand(1).getValueType
() && "Mismatched operand types!") ? static_cast<void
> (0) : __assert_fail ("N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && \"Mismatched operand types!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 809, __PRETTY_FUNCTION__))
809 "Mismatched operand types!")((N->getOperand(0).getValueType() == N->getOperand(1).getValueType
() && "Mismatched operand types!") ? static_cast<void
> (0) : __assert_fail ("N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && \"Mismatched operand types!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 809, __PRETTY_FUNCTION__))
;
810 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&((N->getOperand(0).getValueType().isInteger() == VT.isInteger
() && "Wrong operand type!") ? static_cast<void>
(0) : __assert_fail ("N->getOperand(0).getValueType().isInteger() == VT.isInteger() && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 811, __PRETTY_FUNCTION__))
811 "Wrong operand type!")((N->getOperand(0).getValueType().isInteger() == VT.isInteger
() && "Wrong operand type!") ? static_cast<void>
(0) : __assert_fail ("N->getOperand(0).getValueType().isInteger() == VT.isInteger() && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 811, __PRETTY_FUNCTION__))
;
812 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&((VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits
() && "Wrong return type size") ? static_cast<void
> (0) : __assert_fail ("VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && \"Wrong return type size\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 813, __PRETTY_FUNCTION__))
813 "Wrong return type size")((VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits
() && "Wrong return type size") ? static_cast<void
> (0) : __assert_fail ("VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && \"Wrong return type size\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 813, __PRETTY_FUNCTION__))
;
814 break;
815 }
816 case ISD::BUILD_VECTOR: {
817 assert(N->getNumValues() == 1 && "Too many results!")((N->getNumValues() == 1 && "Too many results!") ?
static_cast<void> (0) : __assert_fail ("N->getNumValues() == 1 && \"Too many results!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 817, __PRETTY_FUNCTION__))
;
818 assert(N->getValueType(0).isVector() && "Wrong return type!")((N->getValueType(0).isVector() && "Wrong return type!"
) ? static_cast<void> (0) : __assert_fail ("N->getValueType(0).isVector() && \"Wrong return type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 818, __PRETTY_FUNCTION__))
;
819 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&((N->getNumOperands() == N->getValueType(0).getVectorNumElements
() && "Wrong number of operands!") ? static_cast<void
> (0) : __assert_fail ("N->getNumOperands() == N->getValueType(0).getVectorNumElements() && \"Wrong number of operands!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 820, __PRETTY_FUNCTION__))
820 "Wrong number of operands!")((N->getNumOperands() == N->getValueType(0).getVectorNumElements
() && "Wrong number of operands!") ? static_cast<void
> (0) : __assert_fail ("N->getNumOperands() == N->getValueType(0).getVectorNumElements() && \"Wrong number of operands!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 820, __PRETTY_FUNCTION__))
;
821 EVT EltVT = N->getValueType(0).getVectorElementType();
822 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
823 assert((I->getValueType() == EltVT ||(((I->getValueType() == EltVT || (EltVT.isInteger() &&
I->getValueType().isInteger() && EltVT.bitsLE(I->
getValueType()))) && "Wrong operand type!") ? static_cast
<void> (0) : __assert_fail ("(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 826, __PRETTY_FUNCTION__))
824 (EltVT.isInteger() && I->getValueType().isInteger() &&(((I->getValueType() == EltVT || (EltVT.isInteger() &&
I->getValueType().isInteger() && EltVT.bitsLE(I->
getValueType()))) && "Wrong operand type!") ? static_cast
<void> (0) : __assert_fail ("(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 826, __PRETTY_FUNCTION__))
825 EltVT.bitsLE(I->getValueType()))) &&(((I->getValueType() == EltVT || (EltVT.isInteger() &&
I->getValueType().isInteger() && EltVT.bitsLE(I->
getValueType()))) && "Wrong operand type!") ? static_cast
<void> (0) : __assert_fail ("(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 826, __PRETTY_FUNCTION__))
826 "Wrong operand type!")(((I->getValueType() == EltVT || (EltVT.isInteger() &&
I->getValueType().isInteger() && EltVT.bitsLE(I->
getValueType()))) && "Wrong operand type!") ? static_cast
<void> (0) : __assert_fail ("(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && \"Wrong operand type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 826, __PRETTY_FUNCTION__))
;
827 assert(I->getValueType() == N->getOperand(0).getValueType() &&((I->getValueType() == N->getOperand(0).getValueType() &&
"Operands must all have the same type") ? static_cast<void
> (0) : __assert_fail ("I->getValueType() == N->getOperand(0).getValueType() && \"Operands must all have the same type\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 828, __PRETTY_FUNCTION__))
828 "Operands must all have the same type")((I->getValueType() == N->getOperand(0).getValueType() &&
"Operands must all have the same type") ? static_cast<void
> (0) : __assert_fail ("I->getValueType() == N->getOperand(0).getValueType() && \"Operands must all have the same type\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 828, __PRETTY_FUNCTION__))
;
829 }
830 break;
831 }
832 }
833}
834#endif // NDEBUG
835
836/// Insert a newly allocated node into the DAG.
837///
838/// Handles insertion into the all nodes list and CSE map, as well as
839/// verification and other common operations when a new node is allocated.
840void SelectionDAG::InsertNode(SDNode *N) {
841 AllNodes.push_back(N);
842#ifndef NDEBUG
843 N->PersistentId = NextPersistentId++;
844 VerifySDNode(N);
845#endif
846 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
847 DUL->NodeInserted(N);
848}
849
850/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
851/// correspond to it. This is useful when we're about to delete or repurpose
852/// the node. We don't want future request for structurally identical nodes
853/// to return N anymore.
854bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
855 bool Erased = false;
856 switch (N->getOpcode()) {
857 case ISD::HANDLENODE: return false; // noop.
858 case ISD::CONDCODE:
859 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&((CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
"Cond code doesn't exist!") ? static_cast<void> (0) : __assert_fail
("CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && \"Cond code doesn't exist!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 860, __PRETTY_FUNCTION__))
860 "Cond code doesn't exist!")((CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
"Cond code doesn't exist!") ? static_cast<void> (0) : __assert_fail
("CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && \"Cond code doesn't exist!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 860, __PRETTY_FUNCTION__))
;
861 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
862 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
863 break;
864 case ISD::ExternalSymbol:
865 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
866 break;
867 case ISD::TargetExternalSymbol: {
868 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
869 Erased = TargetExternalSymbols.erase(std::pair<std::string, unsigned>(
870 ESN->getSymbol(), ESN->getTargetFlags()));
871 break;
872 }
873 case ISD::MCSymbol: {
874 auto *MCSN = cast<MCSymbolSDNode>(N);
875 Erased = MCSymbols.erase(MCSN->getMCSymbol());
876 break;
877 }
878 case ISD::VALUETYPE: {
879 EVT VT = cast<VTSDNode>(N)->getVT();
880 if (VT.isExtended()) {
881 Erased = ExtendedValueTypeNodes.erase(VT);
882 } else {
883 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
884 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
885 }
886 break;
887 }
888 default:
889 // Remove it from the CSE Map.
890 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!")((N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"
) ? static_cast<void> (0) : __assert_fail ("N->getOpcode() != ISD::DELETED_NODE && \"DELETED_NODE in CSEMap!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 890, __PRETTY_FUNCTION__))
;
891 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!")((N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"
) ? static_cast<void> (0) : __assert_fail ("N->getOpcode() != ISD::EntryToken && \"EntryToken in CSEMap!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 891, __PRETTY_FUNCTION__))
;
892 Erased = CSEMap.RemoveNode(N);
893 break;
894 }
895#ifndef NDEBUG
896 // Verify that the node was actually in one of the CSE maps, unless it has a
897 // flag result (which cannot be CSE'd) or is one of the special cases that are
898 // not subject to CSE.
899 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
900 !N->isMachineOpcode() && !doNotCSE(N)) {
901 N->dump(this);
902 dbgs() << "\n";
903 llvm_unreachable("Node is not in map!")::llvm::llvm_unreachable_internal("Node is not in map!", "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 903)
;
904 }
905#endif
906 return Erased;
907}
908
909/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
910/// maps and modified in place. Add it back to the CSE maps, unless an identical
911/// node already exists, in which case transfer all its users to the existing
912/// node. This transfer can potentially trigger recursive merging.
913void
914SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
915 // For node types that aren't CSE'd, just act as if no identical node
916 // already exists.
917 if (!doNotCSE(N)) {
918 SDNode *Existing = CSEMap.GetOrInsertNode(N);
919 if (Existing != N) {
920 // If there was already an existing matching node, use ReplaceAllUsesWith
921 // to replace the dead one with the existing one. This can cause
922 // recursive merging of other unrelated nodes down the line.
923 ReplaceAllUsesWith(N, Existing);
924
925 // N is now dead. Inform the listeners and delete it.
926 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
927 DUL->NodeDeleted(N, Existing);
928 DeleteNodeNotInCSEMaps(N);
929 return;
930 }
931 }
932
933 // If the node doesn't already exist, we updated it. Inform listeners.
934 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
935 DUL->NodeUpdated(N);
936}
937
938/// FindModifiedNodeSlot - Find a slot for the specified node if its operands
939/// were replaced with those specified. If this node is never memoized,
940/// return null, otherwise return a pointer to the slot it would take. If a
941/// node already exists with these operands, the slot will be non-null.
942SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
943 void *&InsertPos) {
944 if (doNotCSE(N))
945 return nullptr;
946
947 SDValue Ops[] = { Op };
948 FoldingSetNodeID ID;
949 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
950 AddNodeIDCustom(ID, N);
951 SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
952 if (Node)
953 Node->intersectFlagsWith(N->getFlags());
954 return Node;
955}
956
957/// FindModifiedNodeSlot - Find a slot for the specified node if its operands
958/// were replaced with those specified. If this node is never memoized,
959/// return null, otherwise return a pointer to the slot it would take. If a
960/// node already exists with these operands, the slot will be non-null.
961SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
962 SDValue Op1, SDValue Op2,
963 void *&InsertPos) {
964 if (doNotCSE(N))
965 return nullptr;
966
967 SDValue Ops[] = { Op1, Op2 };
968 FoldingSetNodeID ID;
969 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
970 AddNodeIDCustom(ID, N);
971 SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
972 if (Node)
973 Node->intersectFlagsWith(N->getFlags());
974 return Node;
975}
976
977/// FindModifiedNodeSlot - Find a slot for the specified node if its operands
978/// were replaced with those specified. If this node is never memoized,
979/// return null, otherwise return a pointer to the slot it would take. If a
980/// node already exists with these operands, the slot will be non-null.
981SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
982 void *&InsertPos) {
983 if (doNotCSE(N))
984 return nullptr;
985
986 FoldingSetNodeID ID;
987 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
988 AddNodeIDCustom(ID, N);
989 SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
990 if (Node)
991 Node->intersectFlagsWith(N->getFlags());
992 return Node;
993}
994
995unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
996 Type *Ty = VT == MVT::iPTR ?
997 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
998 VT.getTypeForEVT(*getContext());
999
1000 return getDataLayout().getABITypeAlignment(Ty);
1001}
1002
1003// EntryNode could meaningfully have debug info if we can find it...
1004SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
1005 : TM(tm), OptLevel(OL),
1006 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
1007 Root(getEntryNode()) {
1008 InsertNode(&EntryNode);
1009 DbgInfo = new SDDbgInfo();
1010}
1011
1012void SelectionDAG::init(MachineFunction &NewMF,
1013 OptimizationRemarkEmitter &NewORE,
1014 Pass *PassPtr, const TargetLibraryInfo *LibraryInfo,
1015 LegacyDivergenceAnalysis * Divergence,
1016 ProfileSummaryInfo *PSIin,
1017 BlockFrequencyInfo *BFIin) {
1018 MF = &NewMF;
1019 SDAGISelPass = PassPtr;
1020 ORE = &NewORE;
1021 TLI = getSubtarget().getTargetLowering();
1022 TSI = getSubtarget().getSelectionDAGInfo();
1023 LibInfo = LibraryInfo;
1024 Context = &MF->getFunction().getContext();
1025 DA = Divergence;
1026 PSI = PSIin;
1027 BFI = BFIin;
1028}
1029
1030SelectionDAG::~SelectionDAG() {
1031 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners")((!UpdateListeners && "Dangling registered DAGUpdateListeners"
) ? static_cast<void> (0) : __assert_fail ("!UpdateListeners && \"Dangling registered DAGUpdateListeners\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1031, __PRETTY_FUNCTION__))
;
1032 allnodes_clear();
1033 OperandRecycler.clear(OperandAllocator);
1034 delete DbgInfo;
1035}
1036
1037bool SelectionDAG::shouldOptForSize() const {
1038 return MF->getFunction().hasOptSize() ||
1039 llvm::shouldOptimizeForSize(FLI->MBB->getBasicBlock(), PSI, BFI);
1040}
1041
1042void SelectionDAG::allnodes_clear() {
1043 assert(&*AllNodes.begin() == &EntryNode)((&*AllNodes.begin() == &EntryNode) ? static_cast<
void> (0) : __assert_fail ("&*AllNodes.begin() == &EntryNode"
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1043, __PRETTY_FUNCTION__))
;
1044 AllNodes.remove(AllNodes.begin());
1045 while (!AllNodes.empty())
1046 DeallocateNode(&AllNodes.front());
1047#ifndef NDEBUG
1048 NextPersistentId = 0;
1049#endif
1050}
1051
1052SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
1053 void *&InsertPos) {
1054 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
1055 if (N) {
1056 switch (N->getOpcode()) {
1057 default: break;
1058 case ISD::Constant:
1059 case ISD::ConstantFP:
1060 llvm_unreachable("Querying for Constant and ConstantFP nodes requires "::llvm::llvm_unreachable_internal("Querying for Constant and ConstantFP nodes requires "
"debug location. Use another overload.", "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1061)
1061 "debug location. Use another overload.")::llvm::llvm_unreachable_internal("Querying for Constant and ConstantFP nodes requires "
"debug location. Use another overload.", "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1061)
;
1062 }
1063 }
1064 return N;
1065}
1066
1067SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
1068 const SDLoc &DL, void *&InsertPos) {
1069 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
1070 if (N) {
1071 switch (N->getOpcode()) {
1072 case ISD::Constant:
1073 case ISD::ConstantFP:
1074 // Erase debug location from the node if the node is used at several
1075 // different places. Do not propagate one location to all uses as it
1076 // will cause a worse single stepping debugging experience.
1077 if (N->getDebugLoc() != DL.getDebugLoc())
1078 N->setDebugLoc(DebugLoc());
1079 break;
1080 default:
1081 // When the node's point of use is located earlier in the instruction
1082 // sequence than its prior point of use, update its debug info to the
1083 // earlier location.
1084 if (DL.getIROrder() && DL.getIROrder() < N->getIROrder())
1085 N->setDebugLoc(DL.getDebugLoc());
1086 break;
1087 }
1088 }
1089 return N;
1090}
1091
1092void SelectionDAG::clear() {
1093 allnodes_clear();
1094 OperandRecycler.clear(OperandAllocator);
1095 OperandAllocator.Reset();
1096 CSEMap.clear();
1097
1098 ExtendedValueTypeNodes.clear();
1099 ExternalSymbols.clear();
1100 TargetExternalSymbols.clear();
1101 MCSymbols.clear();
1102 SDCallSiteDbgInfo.clear();
1103 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
1104 static_cast<CondCodeSDNode*>(nullptr));
1105 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
1106 static_cast<SDNode*>(nullptr));
1107
1108 EntryNode.UseList = nullptr;
1109 InsertNode(&EntryNode);
1110 Root = getEntryNode();
1111 DbgInfo->clear();
1112}
1113
1114SDValue SelectionDAG::getFPExtendOrRound(SDValue Op, const SDLoc &DL, EVT VT) {
1115 return VT.bitsGT(Op.getValueType())
1116 ? getNode(ISD::FP_EXTEND, DL, VT, Op)
1117 : getNode(ISD::FP_ROUND, DL, VT, Op, getIntPtrConstant(0, DL));
1118}
1119
1120std::pair<SDValue, SDValue>
1121SelectionDAG::getStrictFPExtendOrRound(SDValue Op, SDValue Chain,
1122 const SDLoc &DL, EVT VT) {
1123 assert(!VT.bitsEq(Op.getValueType()) &&((!VT.bitsEq(Op.getValueType()) && "Strict no-op FP extend/round not allowed."
) ? static_cast<void> (0) : __assert_fail ("!VT.bitsEq(Op.getValueType()) && \"Strict no-op FP extend/round not allowed.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1124, __PRETTY_FUNCTION__))
1124 "Strict no-op FP extend/round not allowed.")((!VT.bitsEq(Op.getValueType()) && "Strict no-op FP extend/round not allowed."
) ? static_cast<void> (0) : __assert_fail ("!VT.bitsEq(Op.getValueType()) && \"Strict no-op FP extend/round not allowed.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1124, __PRETTY_FUNCTION__))
;
1125 SDValue Res =
1126 VT.bitsGT(Op.getValueType())
1127 ? getNode(ISD::STRICT_FP_EXTEND, DL, {VT, MVT::Other}, {Chain, Op})
1128 : getNode(ISD::STRICT_FP_ROUND, DL, {VT, MVT::Other},
1129 {Chain, Op, getIntPtrConstant(0, DL)});
1130
1131 return std::pair<SDValue, SDValue>(Res, SDValue(Res.getNode(), 1));
1132}
1133
1134SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
1135 return VT.bitsGT(Op.getValueType()) ?
1136 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1137 getNode(ISD::TRUNCATE, DL, VT, Op);
1138}
1139
1140SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
1141 return VT.bitsGT(Op.getValueType()) ?
1142 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1143 getNode(ISD::TRUNCATE, DL, VT, Op);
1144}
1145
1146SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
1147 return VT.bitsGT(Op.getValueType()) ?
1148 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1149 getNode(ISD::TRUNCATE, DL, VT, Op);
1150}
1151
1152SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT,
1153 EVT OpVT) {
1154 if (VT.bitsLE(Op.getValueType()))
1155 return getNode(ISD::TRUNCATE, SL, VT, Op);
1156
1157 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1158 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1159}
1160
1161SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT) {
1162 assert(!VT.isVector() &&((!VT.isVector() && "getZeroExtendInReg should use the vector element type instead of "
"the vector type!") ? static_cast<void> (0) : __assert_fail
("!VT.isVector() && \"getZeroExtendInReg should use the vector element type instead of \" \"the vector type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1164, __PRETTY_FUNCTION__))
1163 "getZeroExtendInReg should use the vector element type instead of "((!VT.isVector() && "getZeroExtendInReg should use the vector element type instead of "
"the vector type!") ? static_cast<void> (0) : __assert_fail
("!VT.isVector() && \"getZeroExtendInReg should use the vector element type instead of \" \"the vector type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1164, __PRETTY_FUNCTION__))
1164 "the vector type!")((!VT.isVector() && "getZeroExtendInReg should use the vector element type instead of "
"the vector type!") ? static_cast<void> (0) : __assert_fail
("!VT.isVector() && \"getZeroExtendInReg should use the vector element type instead of \" \"the vector type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1164, __PRETTY_FUNCTION__))
;
1165 if (Op.getValueType().getScalarType() == VT) return Op;
1166 unsigned BitWidth = Op.getScalarValueSizeInBits();
1167 APInt Imm = APInt::getLowBitsSet(BitWidth,
1168 VT.getSizeInBits());
1169 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1170 getConstant(Imm, DL, Op.getValueType()));
1171}
1172
1173SDValue SelectionDAG::getPtrExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
1174 // Only unsigned pointer semantics are supported right now. In the future this
1175 // might delegate to TLI to check pointer signedness.
1176 return getZExtOrTrunc(Op, DL, VT);
1177}
1178
1179SDValue SelectionDAG::getPtrExtendInReg(SDValue Op, const SDLoc &DL, EVT VT) {
1180 // Only unsigned pointer semantics are supported right now. In the future this
1181 // might delegate to TLI to check pointer signedness.
1182 return getZeroExtendInReg(Op, DL, VT);
1183}
1184
1185/// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1186SDValue SelectionDAG::getNOT(const SDLoc &DL, SDValue Val, EVT VT) {
1187 EVT EltVT = VT.getScalarType();
1188 SDValue NegOne =
1189 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL, VT);
1190 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1191}
1192
1193SDValue SelectionDAG::getLogicalNOT(const SDLoc &DL, SDValue Val, EVT VT) {
1194 SDValue TrueValue = getBoolConstant(true, DL, VT, VT);
1195 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1196}
1197
1198SDValue SelectionDAG::getBoolConstant(bool V, const SDLoc &DL, EVT VT,
1199 EVT OpVT) {
1200 if (!V)
1201 return getConstant(0, DL, VT);
1202
1203 switch (TLI->getBooleanContents(OpVT)) {
1204 case TargetLowering::ZeroOrOneBooleanContent:
1205 case TargetLowering::UndefinedBooleanContent:
1206 return getConstant(1, DL, VT);
1207 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1208 return getAllOnesConstant(DL, VT);
1209 }
1210 llvm_unreachable("Unexpected boolean content enum!")::llvm::llvm_unreachable_internal("Unexpected boolean content enum!"
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1210)
;
1211}
1212
1213SDValue SelectionDAG::getConstant(uint64_t Val, const SDLoc &DL, EVT VT,
1214 bool isT, bool isO) {
1215 EVT EltVT = VT.getScalarType();
1216 assert((EltVT.getSizeInBits() >= 64 ||(((EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >>
EltVT.getSizeInBits()) + 1 < 2) && "getConstant with a uint64_t value that doesn't fit in the type!"
) ? static_cast<void> (0) : __assert_fail ("(EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && \"getConstant with a uint64_t value that doesn't fit in the type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1218, __PRETTY_FUNCTION__))
1217 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&(((EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >>
EltVT.getSizeInBits()) + 1 < 2) && "getConstant with a uint64_t value that doesn't fit in the type!"
) ? static_cast<void> (0) : __assert_fail ("(EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && \"getConstant with a uint64_t value that doesn't fit in the type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1218, __PRETTY_FUNCTION__))
1218 "getConstant with a uint64_t value that doesn't fit in the type!")(((EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >>
EltVT.getSizeInBits()) + 1 < 2) && "getConstant with a uint64_t value that doesn't fit in the type!"
) ? static_cast<void> (0) : __assert_fail ("(EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && \"getConstant with a uint64_t value that doesn't fit in the type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1218, __PRETTY_FUNCTION__))
;
1219 return getConstant(APInt(EltVT.getSizeInBits(), Val), DL, VT, isT, isO);
1220}
1221
1222SDValue SelectionDAG::getConstant(const APInt &Val, const SDLoc &DL, EVT VT,
1223 bool isT, bool isO) {
1224 return getConstant(*ConstantInt::get(*Context, Val), DL, VT, isT, isO);
1225}
1226
1227SDValue SelectionDAG::getConstant(const ConstantInt &Val, const SDLoc &DL,
1228 EVT VT, bool isT, bool isO) {
1229 assert(VT.isInteger() && "Cannot create FP integer constant!")((VT.isInteger() && "Cannot create FP integer constant!"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && \"Cannot create FP integer constant!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1229, __PRETTY_FUNCTION__))
;
1230
1231 EVT EltVT = VT.getScalarType();
1232 const ConstantInt *Elt = &Val;
1233
1234 // In some cases the vector type is legal but the element type is illegal and
1235 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1236 // inserted value (the type does not need to match the vector element type).
1237 // Any extra bits introduced will be truncated away.
1238 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1239 TargetLowering::TypePromoteInteger) {
1240 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1241 APInt NewVal = Elt->getValue().zextOrTrunc(EltVT.getSizeInBits());
1242 Elt = ConstantInt::get(*getContext(), NewVal);
1243 }
1244 // In other cases the element type is illegal and needs to be expanded, for
1245 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1246 // the value into n parts and use a vector type with n-times the elements.
1247 // Then bitcast to the type requested.
1248 // Legalizing constants too early makes the DAGCombiner's job harder so we
1249 // only legalize if the DAG tells us we must produce legal types.
1250 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1251 TLI->getTypeAction(*getContext(), EltVT) ==
1252 TargetLowering::TypeExpandInteger) {
1253 const APInt &NewVal = Elt->getValue();
1254 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1255 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1256 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1257 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1258
1259 // Check the temporary vector is the correct size. If this fails then
1260 // getTypeToTransformTo() probably returned a type whose size (in bits)
1261 // isn't a power-of-2 factor of the requested type size.
1262 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits())((ViaVecVT.getSizeInBits() == VT.getSizeInBits()) ? static_cast
<void> (0) : __assert_fail ("ViaVecVT.getSizeInBits() == VT.getSizeInBits()"
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1262, __PRETTY_FUNCTION__))
;
1263
1264 SmallVector<SDValue, 2> EltParts;
1265 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1266 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1267 .zextOrTrunc(ViaEltSizeInBits), DL,
1268 ViaEltVT, isT, isO));
1269 }
1270
1271 // EltParts is currently in little endian order. If we actually want
1272 // big-endian order then reverse it now.
1273 if (getDataLayout().isBigEndian())
1274 std::reverse(EltParts.begin(), EltParts.end());
1275
1276 // The elements must be reversed when the element order is different
1277 // to the endianness of the elements (because the BITCAST is itself a
1278 // vector shuffle in this situation). However, we do not need any code to
1279 // perform this reversal because getConstant() is producing a vector
1280 // splat.
1281 // This situation occurs in MIPS MSA.
1282
1283 SmallVector<SDValue, 8> Ops;
1284 for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i)
1285 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1286
1287 SDValue V = getNode(ISD::BITCAST, DL, VT, getBuildVector(ViaVecVT, DL, Ops));
1288 return V;
1289 }
1290
1291 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&((Elt->getBitWidth() == EltVT.getSizeInBits() && "APInt size does not match type size!"
) ? static_cast<void> (0) : __assert_fail ("Elt->getBitWidth() == EltVT.getSizeInBits() && \"APInt size does not match type size!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1292, __PRETTY_FUNCTION__))
1292 "APInt size does not match type size!")((Elt->getBitWidth() == EltVT.getSizeInBits() && "APInt size does not match type size!"
) ? static_cast<void> (0) : __assert_fail ("Elt->getBitWidth() == EltVT.getSizeInBits() && \"APInt size does not match type size!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1292, __PRETTY_FUNCTION__))
;
1293 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1294 FoldingSetNodeID ID;
1295 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1296 ID.AddPointer(Elt);
1297 ID.AddBoolean(isO);
1298 void *IP = nullptr;
1299 SDNode *N = nullptr;
1300 if ((N = FindNodeOrInsertPos(ID, DL, IP)))
1301 if (!VT.isVector())
1302 return SDValue(N, 0);
1303
1304 if (!N) {
1305 N = newSDNode<ConstantSDNode>(isT, isO, Elt, EltVT);
1306 CSEMap.InsertNode(N, IP);
1307 InsertNode(N);
1308 NewSDValueDbgMsg(SDValue(N, 0), "Creating constant: ", this);
1309 }
1310
1311 SDValue Result(N, 0);
1312 if (VT.isScalableVector())
1313 Result = getSplatVector(VT, DL, Result);
1314 else if (VT.isVector())
1315 Result = getSplatBuildVector(VT, DL, Result);
1316
1317 return Result;
1318}
1319
1320SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, const SDLoc &DL,
1321 bool isTarget) {
1322 return getConstant(Val, DL, TLI->getPointerTy(getDataLayout()), isTarget);
1323}
1324
1325SDValue SelectionDAG::getShiftAmountConstant(uint64_t Val, EVT VT,
1326 const SDLoc &DL, bool LegalTypes) {
1327 EVT ShiftVT = TLI->getShiftAmountTy(VT, getDataLayout(), LegalTypes);
1328 return getConstant(Val, DL, ShiftVT);
1329}
1330
1331SDValue SelectionDAG::getConstantFP(const APFloat &V, const SDLoc &DL, EVT VT,
1332 bool isTarget) {
1333 return getConstantFP(*ConstantFP::get(*getContext(), V), DL, VT, isTarget);
1334}
1335
1336SDValue SelectionDAG::getConstantFP(const ConstantFP &V, const SDLoc &DL,
1337 EVT VT, bool isTarget) {
1338 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!")((VT.isFloatingPoint() && "Cannot create integer FP constant!"
) ? static_cast<void> (0) : __assert_fail ("VT.isFloatingPoint() && \"Cannot create integer FP constant!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1338, __PRETTY_FUNCTION__))
;
1339
1340 EVT EltVT = VT.getScalarType();
1341
1342 // Do the map lookup using the actual bit pattern for the floating point
1343 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1344 // we don't have issues with SNANs.
1345 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1346 FoldingSetNodeID ID;
1347 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1348 ID.AddPointer(&V);
1349 void *IP = nullptr;
1350 SDNode *N = nullptr;
1351 if ((N = FindNodeOrInsertPos(ID, DL, IP)))
1352 if (!VT.isVector())
1353 return SDValue(N, 0);
1354
1355 if (!N) {
1356 N = newSDNode<ConstantFPSDNode>(isTarget, &V, EltVT);
1357 CSEMap.InsertNode(N, IP);
1358 InsertNode(N);
1359 }
1360
1361 SDValue Result(N, 0);
1362 if (VT.isVector())
1363 Result = getSplatBuildVector(VT, DL, Result);
1364 NewSDValueDbgMsg(Result, "Creating fp constant: ", this);
1365 return Result;
1366}
1367
1368SDValue SelectionDAG::getConstantFP(double Val, const SDLoc &DL, EVT VT,
1369 bool isTarget) {
1370 EVT EltVT = VT.getScalarType();
1371 if (EltVT == MVT::f32)
1372 return getConstantFP(APFloat((float)Val), DL, VT, isTarget);
1373 else if (EltVT == MVT::f64)
1374 return getConstantFP(APFloat(Val), DL, VT, isTarget);
1375 else if (EltVT == MVT::f80 || EltVT == MVT::f128 || EltVT == MVT::ppcf128 ||
1376 EltVT == MVT::f16) {
1377 bool Ignored;
1378 APFloat APF = APFloat(Val);
1379 APF.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1380 &Ignored);
1381 return getConstantFP(APF, DL, VT, isTarget);
1382 } else
1383 llvm_unreachable("Unsupported type in getConstantFP")::llvm::llvm_unreachable_internal("Unsupported type in getConstantFP"
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1383)
;
1384}
1385
1386SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, const SDLoc &DL,
1387 EVT VT, int64_t Offset, bool isTargetGA,
1388 unsigned TargetFlags) {
1389 assert((TargetFlags == 0 || isTargetGA) &&(((TargetFlags == 0 || isTargetGA) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTargetGA) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1390, __PRETTY_FUNCTION__))
1390 "Cannot set target flags on target-independent globals")(((TargetFlags == 0 || isTargetGA) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTargetGA) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1390, __PRETTY_FUNCTION__))
;
1391
1392 // Truncate (with sign-extension) the offset value to the pointer size.
1393 unsigned BitWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
1394 if (BitWidth < 64)
1395 Offset = SignExtend64(Offset, BitWidth);
1396
1397 unsigned Opc;
1398 if (GV->isThreadLocal())
1399 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1400 else
1401 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1402
1403 FoldingSetNodeID ID;
1404 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1405 ID.AddPointer(GV);
1406 ID.AddInteger(Offset);
1407 ID.AddInteger(TargetFlags);
1408 void *IP = nullptr;
1409 if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
1410 return SDValue(E, 0);
1411
1412 auto *N = newSDNode<GlobalAddressSDNode>(
1413 Opc, DL.getIROrder(), DL.getDebugLoc(), GV, VT, Offset, TargetFlags);
1414 CSEMap.InsertNode(N, IP);
1415 InsertNode(N);
1416 return SDValue(N, 0);
1417}
1418
1419SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1420 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1421 FoldingSetNodeID ID;
1422 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1423 ID.AddInteger(FI);
1424 void *IP = nullptr;
1425 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1426 return SDValue(E, 0);
1427
1428 auto *N = newSDNode<FrameIndexSDNode>(FI, VT, isTarget);
1429 CSEMap.InsertNode(N, IP);
1430 InsertNode(N);
1431 return SDValue(N, 0);
1432}
1433
1434SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1435 unsigned TargetFlags) {
1436 assert((TargetFlags == 0 || isTarget) &&(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent jump tables"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent jump tables\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1437, __PRETTY_FUNCTION__))
1437 "Cannot set target flags on target-independent jump tables")(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent jump tables"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent jump tables\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1437, __PRETTY_FUNCTION__))
;
1438 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1439 FoldingSetNodeID ID;
1440 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1441 ID.AddInteger(JTI);
1442 ID.AddInteger(TargetFlags);
1443 void *IP = nullptr;
1444 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1445 return SDValue(E, 0);
1446
1447 auto *N = newSDNode<JumpTableSDNode>(JTI, VT, isTarget, TargetFlags);
1448 CSEMap.InsertNode(N, IP);
1449 InsertNode(N);
1450 return SDValue(N, 0);
1451}
1452
1453SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1454 unsigned Alignment, int Offset,
1455 bool isTarget,
1456 unsigned TargetFlags) {
1457 assert((TargetFlags == 0 || isTarget) &&(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1458, __PRETTY_FUNCTION__))
1458 "Cannot set target flags on target-independent globals")(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1458, __PRETTY_FUNCTION__))
;
1459 if (Alignment == 0)
1460 Alignment = shouldOptForSize()
1461 ? getDataLayout().getABITypeAlignment(C->getType())
1462 : getDataLayout().getPrefTypeAlignment(C->getType());
1463 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1464 FoldingSetNodeID ID;
1465 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1466 ID.AddInteger(Alignment);
1467 ID.AddInteger(Offset);
1468 ID.AddPointer(C);
1469 ID.AddInteger(TargetFlags);
1470 void *IP = nullptr;
1471 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1472 return SDValue(E, 0);
1473
1474 auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VT, Offset, Alignment,
1475 TargetFlags);
1476 CSEMap.InsertNode(N, IP);
1477 InsertNode(N);
1478 return SDValue(N, 0);
1479}
1480
1481SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1482 unsigned Alignment, int Offset,
1483 bool isTarget,
1484 unsigned TargetFlags) {
1485 assert((TargetFlags == 0 || isTarget) &&(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1486, __PRETTY_FUNCTION__))
1486 "Cannot set target flags on target-independent globals")(((TargetFlags == 0 || isTarget) && "Cannot set target flags on target-independent globals"
) ? static_cast<void> (0) : __assert_fail ("(TargetFlags == 0 || isTarget) && \"Cannot set target flags on target-independent globals\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1486, __PRETTY_FUNCTION__))
;
1487 if (Alignment == 0)
1488 Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
1489 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1490 FoldingSetNodeID ID;
1491 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1492 ID.AddInteger(Alignment);
1493 ID.AddInteger(Offset);
1494 C->addSelectionDAGCSEId(ID);
1495 ID.AddInteger(TargetFlags);
1496 void *IP = nullptr;
1497 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1498 return SDValue(E, 0);
1499
1500 auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VT, Offset, Alignment,
1501 TargetFlags);
1502 CSEMap.InsertNode(N, IP);
1503 InsertNode(N);
1504 return SDValue(N, 0);
1505}
1506
1507SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1508 unsigned TargetFlags) {
1509 FoldingSetNodeID ID;
1510 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1511 ID.AddInteger(Index);
1512 ID.AddInteger(Offset);
1513 ID.AddInteger(TargetFlags);
1514 void *IP = nullptr;
1515 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1516 return SDValue(E, 0);
1517
1518 auto *N = newSDNode<TargetIndexSDNode>(Index, VT, Offset, TargetFlags);
1519 CSEMap.InsertNode(N, IP);
1520 InsertNode(N);
1521 return SDValue(N, 0);
1522}
1523
1524SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1525 FoldingSetNodeID ID;
1526 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1527 ID.AddPointer(MBB);
1528 void *IP = nullptr;
1529 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1530 return SDValue(E, 0);
1531
1532 auto *N = newSDNode<BasicBlockSDNode>(MBB);
1533 CSEMap.InsertNode(N, IP);
1534 InsertNode(N);
1535 return SDValue(N, 0);
1536}
1537
1538SDValue SelectionDAG::getValueType(EVT VT) {
1539 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1540 ValueTypeNodes.size())
1541 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1542
1543 SDNode *&N = VT.isExtended() ?
1544 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1545
1546 if (N) return SDValue(N, 0);
1547 N = newSDNode<VTSDNode>(VT);
1548 InsertNode(N);
1549 return SDValue(N, 0);
1550}
1551
1552SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1553 SDNode *&N = ExternalSymbols[Sym];
1554 if (N) return SDValue(N, 0);
1555 N = newSDNode<ExternalSymbolSDNode>(false, Sym, 0, VT);
1556 InsertNode(N);
1557 return SDValue(N, 0);
1558}
1559
1560SDValue SelectionDAG::getMCSymbol(MCSymbol *Sym, EVT VT) {
1561 SDNode *&N = MCSymbols[Sym];
1562 if (N)
1563 return SDValue(N, 0);
1564 N = newSDNode<MCSymbolSDNode>(Sym, VT);
1565 InsertNode(N);
1566 return SDValue(N, 0);
1567}
1568
1569SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1570 unsigned TargetFlags) {
1571 SDNode *&N =
1572 TargetExternalSymbols[std::pair<std::string, unsigned>(Sym, TargetFlags)];
1573 if (N) return SDValue(N, 0);
1574 N = newSDNode<ExternalSymbolSDNode>(true, Sym, TargetFlags, VT);
1575 InsertNode(N);
1576 return SDValue(N, 0);
1577}
1578
1579SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1580 if ((unsigned)Cond >= CondCodeNodes.size())
1581 CondCodeNodes.resize(Cond+1);
1582
1583 if (!CondCodeNodes[Cond]) {
1584 auto *N = newSDNode<CondCodeSDNode>(Cond);
1585 CondCodeNodes[Cond] = N;
1586 InsertNode(N);
1587 }
1588
1589 return SDValue(CondCodeNodes[Cond], 0);
1590}
1591
1592/// Swaps the values of N1 and N2. Swaps all indices in the shuffle mask M that
1593/// point at N1 to point at N2 and indices that point at N2 to point at N1.
1594static void commuteShuffle(SDValue &N1, SDValue &N2, MutableArrayRef<int> M) {
1595 std::swap(N1, N2);
1596 ShuffleVectorSDNode::commuteMask(M);
1597}
1598
1599SDValue SelectionDAG::getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1,
1600 SDValue N2, ArrayRef<int> Mask) {
1601 assert(VT.getVectorNumElements() == Mask.size() &&((VT.getVectorNumElements() == Mask.size() && "Must have the same number of vector elements as mask elements!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == Mask.size() && \"Must have the same number of vector elements as mask elements!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1602, __PRETTY_FUNCTION__))
1602 "Must have the same number of vector elements as mask elements!")((VT.getVectorNumElements() == Mask.size() && "Must have the same number of vector elements as mask elements!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == Mask.size() && \"Must have the same number of vector elements as mask elements!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1602, __PRETTY_FUNCTION__))
;
1603 assert(VT == N1.getValueType() && VT == N2.getValueType() &&((VT == N1.getValueType() && VT == N2.getValueType() &&
"Invalid VECTOR_SHUFFLE") ? static_cast<void> (0) : __assert_fail
("VT == N1.getValueType() && VT == N2.getValueType() && \"Invalid VECTOR_SHUFFLE\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1604, __PRETTY_FUNCTION__))
1604 "Invalid VECTOR_SHUFFLE")((VT == N1.getValueType() && VT == N2.getValueType() &&
"Invalid VECTOR_SHUFFLE") ? static_cast<void> (0) : __assert_fail
("VT == N1.getValueType() && VT == N2.getValueType() && \"Invalid VECTOR_SHUFFLE\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1604, __PRETTY_FUNCTION__))
;
1605
1606 // Canonicalize shuffle undef, undef -> undef
1607 if (N1.isUndef() && N2.isUndef())
1608 return getUNDEF(VT);
1609
1610 // Validate that all indices in Mask are within the range of the elements
1611 // input to the shuffle.
1612 int NElts = Mask.size();
1613 assert(llvm::all_of(Mask,((llvm::all_of(Mask, [&](int M) { return M < (NElts * 2
) && M >= -1; }) && "Index out of range") ?
static_cast<void> (0) : __assert_fail ("llvm::all_of(Mask, [&](int M) { return M < (NElts * 2) && M >= -1; }) && \"Index out of range\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1615, __PRETTY_FUNCTION__))
1614 [&](int M) { return M < (NElts * 2) && M >= -1; }) &&((llvm::all_of(Mask, [&](int M) { return M < (NElts * 2
) && M >= -1; }) && "Index out of range") ?
static_cast<void> (0) : __assert_fail ("llvm::all_of(Mask, [&](int M) { return M < (NElts * 2) && M >= -1; }) && \"Index out of range\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1615, __PRETTY_FUNCTION__))
1615 "Index out of range")((llvm::all_of(Mask, [&](int M) { return M < (NElts * 2
) && M >= -1; }) && "Index out of range") ?
static_cast<void> (0) : __assert_fail ("llvm::all_of(Mask, [&](int M) { return M < (NElts * 2) && M >= -1; }) && \"Index out of range\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1615, __PRETTY_FUNCTION__))
;
1616
1617 // Copy the mask so we can do any needed cleanup.
1618 SmallVector<int, 8> MaskVec(Mask.begin(), Mask.end());
1619
1620 // Canonicalize shuffle v, v -> v, undef
1621 if (N1 == N2) {
1622 N2 = getUNDEF(VT);
1623 for (int i = 0; i != NElts; ++i)
1624 if (MaskVec[i] >= NElts) MaskVec[i] -= NElts;
1625 }
1626
1627 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1628 if (N1.isUndef())
1629 commuteShuffle(N1, N2, MaskVec);
1630
1631 if (TLI->hasVectorBlend()) {
1632 // If shuffling a splat, try to blend the splat instead. We do this here so
1633 // that even when this arises during lowering we don't have to re-handle it.
1634 auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
1635 BitVector UndefElements;
1636 SDValue Splat = BV->getSplatValue(&UndefElements);
1637 if (!Splat)
1638 return;
1639
1640 for (int i = 0; i < NElts; ++i) {
1641 if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + NElts))
1642 continue;
1643
1644 // If this input comes from undef, mark it as such.
1645 if (UndefElements[MaskVec[i] - Offset]) {
1646 MaskVec[i] = -1;
1647 continue;
1648 }
1649
1650 // If we can blend a non-undef lane, use that instead.
1651 if (!UndefElements[i])
1652 MaskVec[i] = i + Offset;
1653 }
1654 };
1655 if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
1656 BlendSplat(N1BV, 0);
1657 if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
1658 BlendSplat(N2BV, NElts);
1659 }
1660
1661 // Canonicalize all index into lhs, -> shuffle lhs, undef
1662 // Canonicalize all index into rhs, -> shuffle rhs, undef
1663 bool AllLHS = true, AllRHS = true;
1664 bool N2Undef = N2.isUndef();
1665 for (int i = 0; i != NElts; ++i) {
1666 if (MaskVec[i] >= NElts) {
1667 if (N2Undef)
1668 MaskVec[i] = -1;
1669 else
1670 AllLHS = false;
1671 } else if (MaskVec[i] >= 0) {
1672 AllRHS = false;
1673 }
1674 }
1675 if (AllLHS && AllRHS)
1676 return getUNDEF(VT);
1677 if (AllLHS && !N2Undef)
1678 N2 = getUNDEF(VT);
1679 if (AllRHS) {
1680 N1 = getUNDEF(VT);
1681 commuteShuffle(N1, N2, MaskVec);
1682 }
1683 // Reset our undef status after accounting for the mask.
1684 N2Undef = N2.isUndef();
1685 // Re-check whether both sides ended up undef.
1686 if (N1.isUndef() && N2Undef)
1687 return getUNDEF(VT);
1688
1689 // If Identity shuffle return that node.
1690 bool Identity = true, AllSame = true;
1691 for (int i = 0; i != NElts; ++i) {
1692 if (MaskVec[i] >= 0 && MaskVec[i] != i) Identity = false;
1693 if (MaskVec[i] != MaskVec[0]) AllSame = false;
1694 }
1695 if (Identity && NElts)
1696 return N1;
1697
1698 // Shuffling a constant splat doesn't change the result.
1699 if (N2Undef) {
1700 SDValue V = N1;
1701
1702 // Look through any bitcasts. We check that these don't change the number
1703 // (and size) of elements and just changes their types.
1704 while (V.getOpcode() == ISD::BITCAST)
1705 V = V->getOperand(0);
1706
1707 // A splat should always show up as a build vector node.
1708 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1709 BitVector UndefElements;
1710 SDValue Splat = BV->getSplatValue(&UndefElements);
1711 // If this is a splat of an undef, shuffling it is also undef.
1712 if (Splat && Splat.isUndef())
1713 return getUNDEF(VT);
1714
1715 bool SameNumElts =
1716 V.getValueType().getVectorNumElements() == VT.getVectorNumElements();
1717
1718 // We only have a splat which can skip shuffles if there is a splatted
1719 // value and no undef lanes rearranged by the shuffle.
1720 if (Splat && UndefElements.none()) {
1721 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1722 // number of elements match or the value splatted is a zero constant.
1723 if (SameNumElts)
1724 return N1;
1725 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1726 if (C->isNullValue())
1727 return N1;
1728 }
1729
1730 // If the shuffle itself creates a splat, build the vector directly.
1731 if (AllSame && SameNumElts) {
1732 EVT BuildVT = BV->getValueType(0);
1733 const SDValue &Splatted = BV->getOperand(MaskVec[0]);
1734 SDValue NewBV = getSplatBuildVector(BuildVT, dl, Splatted);
1735
1736 // We may have jumped through bitcasts, so the type of the
1737 // BUILD_VECTOR may not match the type of the shuffle.
1738 if (BuildVT != VT)
1739 NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
1740 return NewBV;
1741 }
1742 }
1743 }
1744
1745 FoldingSetNodeID ID;
1746 SDValue Ops[2] = { N1, N2 };
1747 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1748 for (int i = 0; i != NElts; ++i)
1749 ID.AddInteger(MaskVec[i]);
1750
1751 void* IP = nullptr;
1752 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
1753 return SDValue(E, 0);
1754
1755 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1756 // SDNode doesn't have access to it. This memory will be "leaked" when
1757 // the node is deallocated, but recovered when the NodeAllocator is released.
1758 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1759 llvm::copy(MaskVec, MaskAlloc);
1760
1761 auto *N = newSDNode<ShuffleVectorSDNode>(VT, dl.getIROrder(),
1762 dl.getDebugLoc(), MaskAlloc);
1763 createOperands(N, Ops);
1764
1765 CSEMap.InsertNode(N, IP);
1766 InsertNode(N);
1767 SDValue V = SDValue(N, 0);
1768 NewSDValueDbgMsg(V, "Creating new node: ", this);
1769 return V;
1770}
1771
1772SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1773 EVT VT = SV.getValueType(0);
1774 SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
1775 ShuffleVectorSDNode::commuteMask(MaskVec);
1776
1777 SDValue Op0 = SV.getOperand(0);
1778 SDValue Op1 = SV.getOperand(1);
1779 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, MaskVec);
1780}
1781
1782SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1783 FoldingSetNodeID ID;
1784 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1785 ID.AddInteger(RegNo);
1786 void *IP = nullptr;
1787 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1788 return SDValue(E, 0);
1789
1790 auto *N = newSDNode<RegisterSDNode>(RegNo, VT);
1791 N->SDNodeBits.IsDivergent = TLI->isSDNodeSourceOfDivergence(N, FLI, DA);
1792 CSEMap.InsertNode(N, IP);
1793 InsertNode(N);
1794 return SDValue(N, 0);
1795}
1796
1797SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1798 FoldingSetNodeID ID;
1799 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1800 ID.AddPointer(RegMask);
1801 void *IP = nullptr;
1802 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1803 return SDValue(E, 0);
1804
1805 auto *N = newSDNode<RegisterMaskSDNode>(RegMask);
1806 CSEMap.InsertNode(N, IP);
1807 InsertNode(N);
1808 return SDValue(N, 0);
1809}
1810
1811SDValue SelectionDAG::getEHLabel(const SDLoc &dl, SDValue Root,
1812 MCSymbol *Label) {
1813 return getLabelNode(ISD::EH_LABEL, dl, Root, Label);
1814}
1815
1816SDValue SelectionDAG::getLabelNode(unsigned Opcode, const SDLoc &dl,
1817 SDValue Root, MCSymbol *Label) {
1818 FoldingSetNodeID ID;
1819 SDValue Ops[] = { Root };
1820 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), Ops);
1821 ID.AddPointer(Label);
1822 void *IP = nullptr;
1823 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1824 return SDValue(E, 0);
1825
1826 auto *N =
1827 newSDNode<LabelSDNode>(Opcode, dl.getIROrder(), dl.getDebugLoc(), Label);
1828 createOperands(N, Ops);
1829
1830 CSEMap.InsertNode(N, IP);
1831 InsertNode(N);
1832 return SDValue(N, 0);
1833}
1834
1835SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1836 int64_t Offset, bool isTarget,
1837 unsigned TargetFlags) {
1838 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1839
1840 FoldingSetNodeID ID;
1841 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1842 ID.AddPointer(BA);
1843 ID.AddInteger(Offset);
1844 ID.AddInteger(TargetFlags);
1845 void *IP = nullptr;
1846 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1847 return SDValue(E, 0);
1848
1849 auto *N = newSDNode<BlockAddressSDNode>(Opc, VT, BA, Offset, TargetFlags);
1850 CSEMap.InsertNode(N, IP);
1851 InsertNode(N);
1852 return SDValue(N, 0);
1853}
1854
1855SDValue SelectionDAG::getSrcValue(const Value *V) {
1856 assert((!V || V->getType()->isPointerTy()) &&(((!V || V->getType()->isPointerTy()) && "SrcValue is not a pointer?"
) ? static_cast<void> (0) : __assert_fail ("(!V || V->getType()->isPointerTy()) && \"SrcValue is not a pointer?\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1857, __PRETTY_FUNCTION__))
1857 "SrcValue is not a pointer?")(((!V || V->getType()->isPointerTy()) && "SrcValue is not a pointer?"
) ? static_cast<void> (0) : __assert_fail ("(!V || V->getType()->isPointerTy()) && \"SrcValue is not a pointer?\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 1857, __PRETTY_FUNCTION__))
;
1858
1859 FoldingSetNodeID ID;
1860 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1861 ID.AddPointer(V);
1862
1863 void *IP = nullptr;
1864 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1865 return SDValue(E, 0);
1866
1867 auto *N = newSDNode<SrcValueSDNode>(V);
1868 CSEMap.InsertNode(N, IP);
1869 InsertNode(N);
1870 return SDValue(N, 0);
1871}
1872
1873SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1874 FoldingSetNodeID ID;
1875 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1876 ID.AddPointer(MD);
1877
1878 void *IP = nullptr;
1879 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1880 return SDValue(E, 0);
1881
1882 auto *N = newSDNode<MDNodeSDNode>(MD);
1883 CSEMap.InsertNode(N, IP);
1884 InsertNode(N);
1885 return SDValue(N, 0);
1886}
1887
1888SDValue SelectionDAG::getBitcast(EVT VT, SDValue V) {
1889 if (VT == V.getValueType())
1890 return V;
1891
1892 return getNode(ISD::BITCAST, SDLoc(V), VT, V);
1893}
1894
1895SDValue SelectionDAG::getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr,
1896 unsigned SrcAS, unsigned DestAS) {
1897 SDValue Ops[] = {Ptr};
1898 FoldingSetNodeID ID;
1899 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1900 ID.AddInteger(SrcAS);
1901 ID.AddInteger(DestAS);
1902
1903 void *IP = nullptr;
1904 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
1905 return SDValue(E, 0);
1906
1907 auto *N = newSDNode<AddrSpaceCastSDNode>(dl.getIROrder(), dl.getDebugLoc(),
1908 VT, SrcAS, DestAS);
1909 createOperands(N, Ops);
1910
1911 CSEMap.InsertNode(N, IP);
1912 InsertNode(N);
1913 return SDValue(N, 0);
1914}
1915
1916/// getShiftAmountOperand - Return the specified value casted to
1917/// the target's desired shift amount type.
1918SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1919 EVT OpTy = Op.getValueType();
1920 EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout());
1921 if (OpTy == ShTy || OpTy.isVector()) return Op;
1922
1923 return getZExtOrTrunc(Op, SDLoc(Op), ShTy);
1924}
1925
1926SDValue SelectionDAG::expandVAArg(SDNode *Node) {
1927 SDLoc dl(Node);
1928 const TargetLowering &TLI = getTargetLoweringInfo();
1929 const Value *V = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
1930 EVT VT = Node->getValueType(0);
1931 SDValue Tmp1 = Node->getOperand(0);
1932 SDValue Tmp2 = Node->getOperand(1);
1933 const MaybeAlign MA(Node->getConstantOperandVal(3));
1934
1935 SDValue VAListLoad = getLoad(TLI.getPointerTy(getDataLayout()), dl, Tmp1,
1936 Tmp2, MachinePointerInfo(V));
1937 SDValue VAList = VAListLoad;
1938
1939 if (MA && *MA > TLI.getMinStackArgumentAlignment()) {
1940 VAList = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
1941 getConstant(MA->value() - 1, dl, VAList.getValueType()));
1942
1943 VAList =
1944 getNode(ISD::AND, dl, VAList.getValueType(), VAList,
1945 getConstant(-(int64_t)MA->value(), dl, VAList.getValueType()));
1946 }
1947
1948 // Increment the pointer, VAList, to the next vaarg
1949 Tmp1 = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
1950 getConstant(getDataLayout().getTypeAllocSize(
1951 VT.getTypeForEVT(*getContext())),
1952 dl, VAList.getValueType()));
1953 // Store the incremented VAList to the legalized pointer
1954 Tmp1 =
1955 getStore(VAListLoad.getValue(1), dl, Tmp1, Tmp2, MachinePointerInfo(V));
1956 // Load the actual argument out of the pointer VAList
1957 return getLoad(VT, dl, Tmp1, VAList, MachinePointerInfo());
1958}
1959
1960SDValue SelectionDAG::expandVACopy(SDNode *Node) {
1961 SDLoc dl(Node);
1962 const TargetLowering &TLI = getTargetLoweringInfo();
1963 // This defaults to loading a pointer from the input and storing it to the
1964 // output, returning the chain.
1965 const Value *VD = cast<SrcValueSDNode>(Node->getOperand(3))->getValue();
1966 const Value *VS = cast<SrcValueSDNode>(Node->getOperand(4))->getValue();
1967 SDValue Tmp1 =
1968 getLoad(TLI.getPointerTy(getDataLayout()), dl, Node->getOperand(0),
1969 Node->getOperand(2), MachinePointerInfo(VS));
1970 return getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
1971 MachinePointerInfo(VD));
1972}
1973
1974SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1975 MachineFrameInfo &MFI = getMachineFunction().getFrameInfo();
1976 unsigned ByteSize = VT.getStoreSize();
1977 Type *Ty = VT.getTypeForEVT(*getContext());
1978 unsigned StackAlign =
1979 std::max((unsigned)getDataLayout().getPrefTypeAlignment(Ty), minAlign);
1980
1981 int FrameIdx = MFI.CreateStackObject(ByteSize, StackAlign, false);
1982 return getFrameIndex(FrameIdx, TLI->getFrameIndexTy(getDataLayout()));
1983}
1984
1985SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1986 unsigned Bytes = std::max(VT1.getStoreSize(), VT2.getStoreSize());
1987 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1988 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1989 const DataLayout &DL = getDataLayout();
1990 unsigned Align =
1991 std::max(DL.getPrefTypeAlignment(Ty1), DL.getPrefTypeAlignment(Ty2));
1992
1993 MachineFrameInfo &MFI = getMachineFunction().getFrameInfo();
1994 int FrameIdx = MFI.CreateStackObject(Bytes, Align, false);
1995 return getFrameIndex(FrameIdx, TLI->getFrameIndexTy(getDataLayout()));
1996}
1997
1998SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, SDValue N2,
1999 ISD::CondCode Cond, const SDLoc &dl) {
2000 EVT OpVT = N1.getValueType();
2001
2002 // These setcc operations always fold.
2003 switch (Cond) {
2004 default: break;
2005 case ISD::SETFALSE:
2006 case ISD::SETFALSE2: return getBoolConstant(false, dl, VT, OpVT);
2007 case ISD::SETTRUE:
2008 case ISD::SETTRUE2: return getBoolConstant(true, dl, VT, OpVT);
2009
2010 case ISD::SETOEQ:
2011 case ISD::SETOGT:
2012 case ISD::SETOGE:
2013 case ISD::SETOLT:
2014 case ISD::SETOLE:
2015 case ISD::SETONE:
2016 case ISD::SETO:
2017 case ISD::SETUO:
2018 case ISD::SETUEQ:
2019 case ISD::SETUNE:
2020 assert(!OpVT.isInteger() && "Illegal setcc for integer!")((!OpVT.isInteger() && "Illegal setcc for integer!") ?
static_cast<void> (0) : __assert_fail ("!OpVT.isInteger() && \"Illegal setcc for integer!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2020, __PRETTY_FUNCTION__))
;
2021 break;
2022 }
2023
2024 if (OpVT.isInteger()) {
2025 // For EQ and NE, we can always pick a value for the undef to make the
2026 // predicate pass or fail, so we can return undef.
2027 // Matches behavior in llvm::ConstantFoldCompareInstruction.
2028 // icmp eq/ne X, undef -> undef.
2029 if ((N1.isUndef() || N2.isUndef()) &&
2030 (Cond == ISD::SETEQ || Cond == ISD::SETNE))
2031 return getUNDEF(VT);
2032
2033 // If both operands are undef, we can return undef for int comparison.
2034 // icmp undef, undef -> undef.
2035 if (N1.isUndef() && N2.isUndef())
2036 return getUNDEF(VT);
2037
2038 // icmp X, X -> true/false
2039 // icmp X, undef -> true/false because undef could be X.
2040 if (N1 == N2)
2041 return getBoolConstant(ISD::isTrueWhenEqual(Cond), dl, VT, OpVT);
2042 }
2043
2044 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2)) {
2045 const APInt &C2 = N2C->getAPIntValue();
2046 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
2047 const APInt &C1 = N1C->getAPIntValue();
2048
2049 switch (Cond) {
2050 default: llvm_unreachable("Unknown integer setcc!")::llvm::llvm_unreachable_internal("Unknown integer setcc!", "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2050)
;
2051 case ISD::SETEQ: return getBoolConstant(C1 == C2, dl, VT, OpVT);
2052 case ISD::SETNE: return getBoolConstant(C1 != C2, dl, VT, OpVT);
2053 case ISD::SETULT: return getBoolConstant(C1.ult(C2), dl, VT, OpVT);
2054 case ISD::SETUGT: return getBoolConstant(C1.ugt(C2), dl, VT, OpVT);
2055 case ISD::SETULE: return getBoolConstant(C1.ule(C2), dl, VT, OpVT);
2056 case ISD::SETUGE: return getBoolConstant(C1.uge(C2), dl, VT, OpVT);
2057 case ISD::SETLT: return getBoolConstant(C1.slt(C2), dl, VT, OpVT);
2058 case ISD::SETGT: return getBoolConstant(C1.sgt(C2), dl, VT, OpVT);
2059 case ISD::SETLE: return getBoolConstant(C1.sle(C2), dl, VT, OpVT);
2060 case ISD::SETGE: return getBoolConstant(C1.sge(C2), dl, VT, OpVT);
2061 }
2062 }
2063 }
2064
2065 auto *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
2066 auto *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
2067
2068 if (N1CFP && N2CFP) {
2069 APFloat::cmpResult R = N1CFP->getValueAPF().compare(N2CFP->getValueAPF());
2070 switch (Cond) {
2071 default: break;
2072 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
2073 return getUNDEF(VT);
2074 LLVM_FALLTHROUGH[[gnu::fallthrough]];
2075 case ISD::SETOEQ: return getBoolConstant(R==APFloat::cmpEqual, dl, VT,
2076 OpVT);
2077 case ISD::SETNE: if (R==APFloat::cmpUnordered)
2078 return getUNDEF(VT);
2079 LLVM_FALLTHROUGH[[gnu::fallthrough]];
2080 case ISD::SETONE: return getBoolConstant(R==APFloat::cmpGreaterThan ||
2081 R==APFloat::cmpLessThan, dl, VT,
2082 OpVT);
2083 case ISD::SETLT: if (R==APFloat::cmpUnordered)
2084 return getUNDEF(VT);
2085 LLVM_FALLTHROUGH[[gnu::fallthrough]];
2086 case ISD::SETOLT: return getBoolConstant(R==APFloat::cmpLessThan, dl, VT,
2087 OpVT);
2088 case ISD::SETGT: if (R==APFloat::cmpUnordered)
2089 return getUNDEF(VT);
2090 LLVM_FALLTHROUGH[[gnu::fallthrough]];
2091 case ISD::SETOGT: return getBoolConstant(R==APFloat::cmpGreaterThan, dl,
2092 VT, OpVT);
2093 case ISD::SETLE: if (R==APFloat::cmpUnordered)
2094 return getUNDEF(VT);
2095 LLVM_FALLTHROUGH[[gnu::fallthrough]];
2096 case ISD::SETOLE: return getBoolConstant(R==APFloat::cmpLessThan ||
2097 R==APFloat::cmpEqual, dl, VT,
2098 OpVT);
2099 case ISD::SETGE: if (R==APFloat::cmpUnordered)
2100 return getUNDEF(VT);
2101 LLVM_FALLTHROUGH[[gnu::fallthrough]];
2102 case ISD::SETOGE: return getBoolConstant(R==APFloat::cmpGreaterThan ||
2103 R==APFloat::cmpEqual, dl, VT, OpVT);
2104 case ISD::SETO: return getBoolConstant(R!=APFloat::cmpUnordered, dl, VT,
2105 OpVT);
2106 case ISD::SETUO: return getBoolConstant(R==APFloat::cmpUnordered, dl, VT,
2107 OpVT);
2108 case ISD::SETUEQ: return getBoolConstant(R==APFloat::cmpUnordered ||
2109 R==APFloat::cmpEqual, dl, VT,
2110 OpVT);
2111 case ISD::SETUNE: return getBoolConstant(R!=APFloat::cmpEqual, dl, VT,
2112 OpVT);
2113 case ISD::SETULT: return getBoolConstant(R==APFloat::cmpUnordered ||
2114 R==APFloat::cmpLessThan, dl, VT,
2115 OpVT);
2116 case ISD::SETUGT: return getBoolConstant(R==APFloat::cmpGreaterThan ||
2117 R==APFloat::cmpUnordered, dl, VT,
2118 OpVT);
2119 case ISD::SETULE: return getBoolConstant(R!=APFloat::cmpGreaterThan, dl,
2120 VT, OpVT);
2121 case ISD::SETUGE: return getBoolConstant(R!=APFloat::cmpLessThan, dl, VT,
2122 OpVT);
2123 }
2124 } else if (N1CFP && OpVT.isSimple() && !N2.isUndef()) {
2125 // Ensure that the constant occurs on the RHS.
2126 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
2127 if (!TLI->isCondCodeLegal(SwappedCond, OpVT.getSimpleVT()))
2128 return SDValue();
2129 return getSetCC(dl, VT, N2, N1, SwappedCond);
2130 } else if ((N2CFP && N2CFP->getValueAPF().isNaN()) ||
2131 (OpVT.isFloatingPoint() && (N1.isUndef() || N2.isUndef()))) {
2132 // If an operand is known to be a nan (or undef that could be a nan), we can
2133 // fold it.
2134 // Choosing NaN for the undef will always make unordered comparison succeed
2135 // and ordered comparison fails.
2136 // Matches behavior in llvm::ConstantFoldCompareInstruction.
2137 switch (ISD::getUnorderedFlavor(Cond)) {
2138 default:
2139 llvm_unreachable("Unknown flavor!")::llvm::llvm_unreachable_internal("Unknown flavor!", "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2139)
;
2140 case 0: // Known false.
2141 return getBoolConstant(false, dl, VT, OpVT);
2142 case 1: // Known true.
2143 return getBoolConstant(true, dl, VT, OpVT);
2144 case 2: // Undefined.
2145 return getUNDEF(VT);
2146 }
2147 }
2148
2149 // Could not fold it.
2150 return SDValue();
2151}
2152
2153/// See if the specified operand can be simplified with the knowledge that only
2154/// the bits specified by DemandedBits are used.
2155/// TODO: really we should be making this into the DAG equivalent of
2156/// SimplifyMultipleUseDemandedBits and not generate any new nodes.
2157SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &DemandedBits) {
2158 EVT VT = V.getValueType();
2159 APInt DemandedElts = VT.isVector()
2160 ? APInt::getAllOnesValue(VT.getVectorNumElements())
2161 : APInt(1, 1);
2162 return GetDemandedBits(V, DemandedBits, DemandedElts);
2163}
2164
2165/// See if the specified operand can be simplified with the knowledge that only
2166/// the bits specified by DemandedBits are used in the elements specified by
2167/// DemandedElts.
2168/// TODO: really we should be making this into the DAG equivalent of
2169/// SimplifyMultipleUseDemandedBits and not generate any new nodes.
2170SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &DemandedBits,
2171 const APInt &DemandedElts) {
2172 switch (V.getOpcode()) {
2173 default:
2174 break;
2175 case ISD::Constant: {
2176 auto *CV = cast<ConstantSDNode>(V.getNode());
2177 assert(CV && "Const value should be ConstSDNode.")((CV && "Const value should be ConstSDNode.") ? static_cast
<void> (0) : __assert_fail ("CV && \"Const value should be ConstSDNode.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2177, __PRETTY_FUNCTION__))
;
2178 const APInt &CVal = CV->getAPIntValue();
2179 APInt NewVal = CVal & DemandedBits;
2180 if (NewVal != CVal)
2181 return getConstant(NewVal, SDLoc(V), V.getValueType());
2182 break;
2183 }
2184 case ISD::OR:
2185 case ISD::XOR:
2186 case ISD::SIGN_EXTEND_INREG:
2187 return TLI->SimplifyMultipleUseDemandedBits(V, DemandedBits, DemandedElts,
2188 *this, 0);
2189 case ISD::SRL:
2190 // Only look at single-use SRLs.
2191 if (!V.getNode()->hasOneUse())
2192 break;
2193 if (auto *RHSC = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
2194 // See if we can recursively simplify the LHS.
2195 unsigned Amt = RHSC->getZExtValue();
2196
2197 // Watch out for shift count overflow though.
2198 if (Amt >= DemandedBits.getBitWidth())
2199 break;
2200 APInt SrcDemandedBits = DemandedBits << Amt;
2201 if (SDValue SimplifyLHS =
2202 GetDemandedBits(V.getOperand(0), SrcDemandedBits))
2203 return getNode(ISD::SRL, SDLoc(V), V.getValueType(), SimplifyLHS,
2204 V.getOperand(1));
2205 }
2206 break;
2207 case ISD::AND: {
2208 // X & -1 -> X (ignoring bits which aren't demanded).
2209 // Also handle the case where masked out bits in X are known to be zero.
2210 if (ConstantSDNode *RHSC = isConstOrConstSplat(V.getOperand(1))) {
2211 const APInt &AndVal = RHSC->getAPIntValue();
2212 if (DemandedBits.isSubsetOf(AndVal) ||
2213 DemandedBits.isSubsetOf(computeKnownBits(V.getOperand(0)).Zero |
2214 AndVal))
2215 return V.getOperand(0);
2216 }
2217 break;
2218 }
2219 case ISD::ANY_EXTEND: {
2220 SDValue Src = V.getOperand(0);
2221 unsigned SrcBitWidth = Src.getScalarValueSizeInBits();
2222 // Being conservative here - only peek through if we only demand bits in the
2223 // non-extended source (even though the extended bits are technically
2224 // undef).
2225 if (DemandedBits.getActiveBits() > SrcBitWidth)
2226 break;
2227 APInt SrcDemandedBits = DemandedBits.trunc(SrcBitWidth);
2228 if (SDValue DemandedSrc = GetDemandedBits(Src, SrcDemandedBits))
2229 return getNode(ISD::ANY_EXTEND, SDLoc(V), V.getValueType(), DemandedSrc);
2230 break;
2231 }
2232 }
2233 return SDValue();
2234}
2235
2236/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
2237/// use this predicate to simplify operations downstream.
2238bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
2239 unsigned BitWidth = Op.getScalarValueSizeInBits();
2240 return MaskedValueIsZero(Op, APInt::getSignMask(BitWidth), Depth);
2241}
2242
2243/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
2244/// this predicate to simplify operations downstream. Mask is known to be zero
2245/// for bits that V cannot have.
2246bool SelectionDAG::MaskedValueIsZero(SDValue V, const APInt &Mask,
2247 unsigned Depth) const {
2248 EVT VT = V.getValueType();
2249 APInt DemandedElts = VT.isVector()
2250 ? APInt::getAllOnesValue(VT.getVectorNumElements())
2251 : APInt(1, 1);
2252 return MaskedValueIsZero(V, Mask, DemandedElts, Depth);
2253}
2254
2255/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero in
2256/// DemandedElts. We use this predicate to simplify operations downstream.
2257/// Mask is known to be zero for bits that V cannot have.
2258bool SelectionDAG::MaskedValueIsZero(SDValue V, const APInt &Mask,
2259 const APInt &DemandedElts,
2260 unsigned Depth) const {
2261 return Mask.isSubsetOf(computeKnownBits(V, DemandedElts, Depth).Zero);
2262}
2263
2264/// MaskedValueIsAllOnes - Return true if '(Op & Mask) == Mask'.
2265bool SelectionDAG::MaskedValueIsAllOnes(SDValue V, const APInt &Mask,
2266 unsigned Depth) const {
2267 return Mask.isSubsetOf(computeKnownBits(V, Depth).One);
2268}
2269
2270/// isSplatValue - Return true if the vector V has the same value
2271/// across all DemandedElts.
2272bool SelectionDAG::isSplatValue(SDValue V, const APInt &DemandedElts,
2273 APInt &UndefElts) {
2274 if (!DemandedElts)
2275 return false; // No demanded elts, better to assume we don't know anything.
2276
2277 EVT VT = V.getValueType();
2278 assert(VT.isVector() && "Vector type expected")((VT.isVector() && "Vector type expected") ? static_cast
<void> (0) : __assert_fail ("VT.isVector() && \"Vector type expected\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2278, __PRETTY_FUNCTION__))
;
2279
2280 unsigned NumElts = VT.getVectorNumElements();
2281 assert(NumElts == DemandedElts.getBitWidth() && "Vector size mismatch")((NumElts == DemandedElts.getBitWidth() && "Vector size mismatch"
) ? static_cast<void> (0) : __assert_fail ("NumElts == DemandedElts.getBitWidth() && \"Vector size mismatch\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2281, __PRETTY_FUNCTION__))
;
2282 UndefElts = APInt::getNullValue(NumElts);
2283
2284 switch (V.getOpcode()) {
2285 case ISD::BUILD_VECTOR: {
2286 SDValue Scl;
2287 for (unsigned i = 0; i != NumElts; ++i) {
2288 SDValue Op = V.getOperand(i);
2289 if (Op.isUndef()) {
2290 UndefElts.setBit(i);
2291 continue;
2292 }
2293 if (!DemandedElts[i])
2294 continue;
2295 if (Scl && Scl != Op)
2296 return false;
2297 Scl = Op;
2298 }
2299 return true;
2300 }
2301 case ISD::VECTOR_SHUFFLE: {
2302 // Check if this is a shuffle node doing a splat.
2303 // TODO: Do we need to handle shuffle(splat, undef, mask)?
2304 int SplatIndex = -1;
2305 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(V)->getMask();
2306 for (int i = 0; i != (int)NumElts; ++i) {
2307 int M = Mask[i];
2308 if (M < 0) {
2309 UndefElts.setBit(i);
2310 continue;
2311 }
2312 if (!DemandedElts[i])
2313 continue;
2314 if (0 <= SplatIndex && SplatIndex != M)
2315 return false;
2316 SplatIndex = M;
2317 }
2318 return true;
2319 }
2320 case ISD::EXTRACT_SUBVECTOR: {
2321 SDValue Src = V.getOperand(0);
2322 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(V.getOperand(1));
2323 unsigned NumSrcElts = Src.getValueType().getVectorNumElements();
2324 if (SubIdx && SubIdx->getAPIntValue().ule(NumSrcElts - NumElts)) {
2325 // Offset the demanded elts by the subvector index.
2326 uint64_t Idx = SubIdx->getZExtValue();
2327 APInt UndefSrcElts;
2328 APInt DemandedSrc = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx);
2329 if (isSplatValue(Src, DemandedSrc, UndefSrcElts)) {
2330 UndefElts = UndefSrcElts.extractBits(NumElts, Idx);
2331 return true;
2332 }
2333 }
2334 break;
2335 }
2336 case ISD::ADD:
2337 case ISD::SUB:
2338 case ISD::AND: {
2339 APInt UndefLHS, UndefRHS;
2340 SDValue LHS = V.getOperand(0);
2341 SDValue RHS = V.getOperand(1);
2342 if (isSplatValue(LHS, DemandedElts, UndefLHS) &&
2343 isSplatValue(RHS, DemandedElts, UndefRHS)) {
2344 UndefElts = UndefLHS | UndefRHS;
2345 return true;
2346 }
2347 break;
2348 }
2349 }
2350
2351 return false;
2352}
2353
2354/// Helper wrapper to main isSplatValue function.
2355bool SelectionDAG::isSplatValue(SDValue V, bool AllowUndefs) {
2356 EVT VT = V.getValueType();
2357 assert(VT.isVector() && "Vector type expected")((VT.isVector() && "Vector type expected") ? static_cast
<void> (0) : __assert_fail ("VT.isVector() && \"Vector type expected\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2357, __PRETTY_FUNCTION__))
;
2358 unsigned NumElts = VT.getVectorNumElements();
2359
2360 APInt UndefElts;
2361 APInt DemandedElts = APInt::getAllOnesValue(NumElts);
2362 return isSplatValue(V, DemandedElts, UndefElts) &&
2363 (AllowUndefs || !UndefElts);
2364}
2365
2366SDValue SelectionDAG::getSplatSourceVector(SDValue V, int &SplatIdx) {
2367 V = peekThroughExtractSubvectors(V);
2368
2369 EVT VT = V.getValueType();
2370 unsigned Opcode = V.getOpcode();
2371 switch (Opcode) {
2372 default: {
2373 APInt UndefElts;
2374 APInt DemandedElts = APInt::getAllOnesValue(VT.getVectorNumElements());
2375 if (isSplatValue(V, DemandedElts, UndefElts)) {
2376 // Handle case where all demanded elements are UNDEF.
2377 if (DemandedElts.isSubsetOf(UndefElts)) {
2378 SplatIdx = 0;
2379 return getUNDEF(VT);
2380 }
2381 SplatIdx = (UndefElts & DemandedElts).countTrailingOnes();
2382 return V;
2383 }
2384 break;
2385 }
2386 case ISD::VECTOR_SHUFFLE: {
2387 // Check if this is a shuffle node doing a splat.
2388 // TODO - remove this and rely purely on SelectionDAG::isSplatValue,
2389 // getTargetVShiftNode currently struggles without the splat source.
2390 auto *SVN = cast<ShuffleVectorSDNode>(V);
2391 if (!SVN->isSplat())
2392 break;
2393 int Idx = SVN->getSplatIndex();
2394 int NumElts = V.getValueType().getVectorNumElements();
2395 SplatIdx = Idx % NumElts;
2396 return V.getOperand(Idx / NumElts);
2397 }
2398 }
2399
2400 return SDValue();
2401}
2402
2403SDValue SelectionDAG::getSplatValue(SDValue V) {
2404 int SplatIdx;
2405 if (SDValue SrcVector = getSplatSourceVector(V, SplatIdx))
2406 return getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(V),
2407 SrcVector.getValueType().getScalarType(), SrcVector,
2408 getIntPtrConstant(SplatIdx, SDLoc(V)));
2409 return SDValue();
2410}
2411
2412/// If a SHL/SRA/SRL node has a constant or splat constant shift amount that
2413/// is less than the element bit-width of the shift node, return it.
2414static const APInt *getValidShiftAmountConstant(SDValue V) {
2415 unsigned BitWidth = V.getScalarValueSizeInBits();
2416 if (ConstantSDNode *SA = isConstOrConstSplat(V.getOperand(1))) {
2417 // Shifting more than the bitwidth is not valid.
2418 const APInt &ShAmt = SA->getAPIntValue();
2419 if (ShAmt.ult(BitWidth))
2420 return &ShAmt;
2421 }
2422 return nullptr;
2423}
2424
2425/// If a SHL/SRA/SRL node has constant vector shift amounts that are all less
2426/// than the element bit-width of the shift node, return the minimum value.
2427static const APInt *getValidMinimumShiftAmountConstant(SDValue V) {
2428 unsigned BitWidth = V.getScalarValueSizeInBits();
2429 auto *BV = dyn_cast<BuildVectorSDNode>(V.getOperand(1));
2430 if (!BV)
2431 return nullptr;
2432 const APInt *MinShAmt = nullptr;
2433 for (unsigned i = 0, e = BV->getNumOperands(); i != e; ++i) {
2434 auto *SA = dyn_cast<ConstantSDNode>(BV->getOperand(i));
2435 if (!SA)
2436 return nullptr;
2437 // Shifting more than the bitwidth is not valid.
2438 const APInt &ShAmt = SA->getAPIntValue();
2439 if (ShAmt.uge(BitWidth))
2440 return nullptr;
2441 if (MinShAmt && MinShAmt->ule(ShAmt))
2442 continue;
2443 MinShAmt = &ShAmt;
2444 }
2445 return MinShAmt;
2446}
2447
2448/// Determine which bits of Op are known to be either zero or one and return
2449/// them in Known. For vectors, the known bits are those that are shared by
2450/// every vector element.
2451KnownBits SelectionDAG::computeKnownBits(SDValue Op, unsigned Depth) const {
2452 EVT VT = Op.getValueType();
2453 APInt DemandedElts = VT.isVector()
2454 ? APInt::getAllOnesValue(VT.getVectorNumElements())
2455 : APInt(1, 1);
2456 return computeKnownBits(Op, DemandedElts, Depth);
2457}
2458
2459/// Determine which bits of Op are known to be either zero or one and return
2460/// them in Known. The DemandedElts argument allows us to only collect the known
2461/// bits that are shared by the requested vector elements.
2462KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
2463 unsigned Depth) const {
2464 unsigned BitWidth = Op.getScalarValueSizeInBits();
2465
2466 KnownBits Known(BitWidth); // Don't know anything.
2467
2468 if (auto *C = dyn_cast<ConstantSDNode>(Op)) {
2469 // We know all of the bits for a constant!
2470 Known.One = C->getAPIntValue();
2471 Known.Zero = ~Known.One;
2472 return Known;
2473 }
2474 if (auto *C = dyn_cast<ConstantFPSDNode>(Op)) {
2475 // We know all of the bits for a constant fp!
2476 Known.One = C->getValueAPF().bitcastToAPInt();
2477 Known.Zero = ~Known.One;
2478 return Known;
2479 }
2480
2481 if (Depth >= MaxRecursionDepth)
2482 return Known; // Limit search depth.
2483
2484 KnownBits Known2;
2485 unsigned NumElts = DemandedElts.getBitWidth();
2486 assert((!Op.getValueType().isVector() ||(((!Op.getValueType().isVector() || NumElts == Op.getValueType
().getVectorNumElements()) && "Unexpected vector size"
) ? static_cast<void> (0) : __assert_fail ("(!Op.getValueType().isVector() || NumElts == Op.getValueType().getVectorNumElements()) && \"Unexpected vector size\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2488, __PRETTY_FUNCTION__))
2487 NumElts == Op.getValueType().getVectorNumElements()) &&(((!Op.getValueType().isVector() || NumElts == Op.getValueType
().getVectorNumElements()) && "Unexpected vector size"
) ? static_cast<void> (0) : __assert_fail ("(!Op.getValueType().isVector() || NumElts == Op.getValueType().getVectorNumElements()) && \"Unexpected vector size\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2488, __PRETTY_FUNCTION__))
2488 "Unexpected vector size")(((!Op.getValueType().isVector() || NumElts == Op.getValueType
().getVectorNumElements()) && "Unexpected vector size"
) ? static_cast<void> (0) : __assert_fail ("(!Op.getValueType().isVector() || NumElts == Op.getValueType().getVectorNumElements()) && \"Unexpected vector size\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2488, __PRETTY_FUNCTION__))
;
2489
2490 if (!DemandedElts)
2491 return Known; // No demanded elts, better to assume we don't know anything.
2492
2493 unsigned Opcode = Op.getOpcode();
2494 switch (Opcode) {
2495 case ISD::BUILD_VECTOR:
2496 // Collect the known bits that are shared by every demanded vector element.
2497 Known.Zero.setAllBits(); Known.One.setAllBits();
2498 for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
2499 if (!DemandedElts[i])
2500 continue;
2501
2502 SDValue SrcOp = Op.getOperand(i);
2503 Known2 = computeKnownBits(SrcOp, Depth + 1);
2504
2505 // BUILD_VECTOR can implicitly truncate sources, we must handle this.
2506 if (SrcOp.getValueSizeInBits() != BitWidth) {
2507 assert(SrcOp.getValueSizeInBits() > BitWidth &&((SrcOp.getValueSizeInBits() > BitWidth && "Expected BUILD_VECTOR implicit truncation"
) ? static_cast<void> (0) : __assert_fail ("SrcOp.getValueSizeInBits() > BitWidth && \"Expected BUILD_VECTOR implicit truncation\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2508, __PRETTY_FUNCTION__))
2508 "Expected BUILD_VECTOR implicit truncation")((SrcOp.getValueSizeInBits() > BitWidth && "Expected BUILD_VECTOR implicit truncation"
) ? static_cast<void> (0) : __assert_fail ("SrcOp.getValueSizeInBits() > BitWidth && \"Expected BUILD_VECTOR implicit truncation\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2508, __PRETTY_FUNCTION__))
;
2509 Known2 = Known2.trunc(BitWidth);
2510 }
2511
2512 // Known bits are the values that are shared by every demanded element.
2513 Known.One &= Known2.One;
2514 Known.Zero &= Known2.Zero;
2515
2516 // If we don't know any bits, early out.
2517 if (Known.isUnknown())
2518 break;
2519 }
2520 break;
2521 case ISD::VECTOR_SHUFFLE: {
2522 // Collect the known bits that are shared by every vector element referenced
2523 // by the shuffle.
2524 APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0);
2525 Known.Zero.setAllBits(); Known.One.setAllBits();
2526 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op);
2527 assert(NumElts == SVN->getMask().size() && "Unexpected vector size")((NumElts == SVN->getMask().size() && "Unexpected vector size"
) ? static_cast<void> (0) : __assert_fail ("NumElts == SVN->getMask().size() && \"Unexpected vector size\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2527, __PRETTY_FUNCTION__))
;
2528 for (unsigned i = 0; i != NumElts; ++i) {
2529 if (!DemandedElts[i])
2530 continue;
2531
2532 int M = SVN->getMaskElt(i);
2533 if (M < 0) {
2534 // For UNDEF elements, we don't know anything about the common state of
2535 // the shuffle result.
2536 Known.resetAll();
2537 DemandedLHS.clearAllBits();
2538 DemandedRHS.clearAllBits();
2539 break;
2540 }
2541
2542 if ((unsigned)M < NumElts)
2543 DemandedLHS.setBit((unsigned)M % NumElts);
2544 else
2545 DemandedRHS.setBit((unsigned)M % NumElts);
2546 }
2547 // Known bits are the values that are shared by every demanded element.
2548 if (!!DemandedLHS) {
2549 SDValue LHS = Op.getOperand(0);
2550 Known2 = computeKnownBits(LHS, DemandedLHS, Depth + 1);
2551 Known.One &= Known2.One;
2552 Known.Zero &= Known2.Zero;
2553 }
2554 // If we don't know any bits, early out.
2555 if (Known.isUnknown())
2556 break;
2557 if (!!DemandedRHS) {
2558 SDValue RHS = Op.getOperand(1);
2559 Known2 = computeKnownBits(RHS, DemandedRHS, Depth + 1);
2560 Known.One &= Known2.One;
2561 Known.Zero &= Known2.Zero;
2562 }
2563 break;
2564 }
2565 case ISD::CONCAT_VECTORS: {
2566 // Split DemandedElts and test each of the demanded subvectors.
2567 Known.Zero.setAllBits(); Known.One.setAllBits();
2568 EVT SubVectorVT = Op.getOperand(0).getValueType();
2569 unsigned NumSubVectorElts = SubVectorVT.getVectorNumElements();
2570 unsigned NumSubVectors = Op.getNumOperands();
2571 for (unsigned i = 0; i != NumSubVectors; ++i) {
2572 APInt DemandedSub = DemandedElts.lshr(i * NumSubVectorElts);
2573 DemandedSub = DemandedSub.trunc(NumSubVectorElts);
2574 if (!!DemandedSub) {
2575 SDValue Sub = Op.getOperand(i);
2576 Known2 = computeKnownBits(Sub, DemandedSub, Depth + 1);
2577 Known.One &= Known2.One;
2578 Known.Zero &= Known2.Zero;
2579 }
2580 // If we don't know any bits, early out.
2581 if (Known.isUnknown())
2582 break;
2583 }
2584 break;
2585 }
2586 case ISD::INSERT_SUBVECTOR: {
2587 // If we know the element index, demand any elements from the subvector and
2588 // the remainder from the src its inserted into, otherwise demand them all.
2589 SDValue Src = Op.getOperand(0);
2590 SDValue Sub = Op.getOperand(1);
2591 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
2592 unsigned NumSubElts = Sub.getValueType().getVectorNumElements();
2593 if (SubIdx && SubIdx->getAPIntValue().ule(NumElts - NumSubElts)) {
2594 Known.One.setAllBits();
2595 Known.Zero.setAllBits();
2596 uint64_t Idx = SubIdx->getZExtValue();
2597 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx);
2598 if (!!DemandedSubElts) {
2599 Known = computeKnownBits(Sub, DemandedSubElts, Depth + 1);
2600 if (Known.isUnknown())
2601 break; // early-out.
2602 }
2603 APInt SubMask = APInt::getBitsSet(NumElts, Idx, Idx + NumSubElts);
2604 APInt DemandedSrcElts = DemandedElts & ~SubMask;
2605 if (!!DemandedSrcElts) {
2606 Known2 = computeKnownBits(Src, DemandedSrcElts, Depth + 1);
2607 Known.One &= Known2.One;
2608 Known.Zero &= Known2.Zero;
2609 }
2610 } else {
2611 Known = computeKnownBits(Sub, Depth + 1);
2612 if (Known.isUnknown())
2613 break; // early-out.
2614 Known2 = computeKnownBits(Src, Depth + 1);
2615 Known.One &= Known2.One;
2616 Known.Zero &= Known2.Zero;
2617 }
2618 break;
2619 }
2620 case ISD::EXTRACT_SUBVECTOR: {
2621 // If we know the element index, just demand that subvector elements,
2622 // otherwise demand them all.
2623 SDValue Src = Op.getOperand(0);
2624 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
2625 unsigned NumSrcElts = Src.getValueType().getVectorNumElements();
2626 APInt DemandedSrc = APInt::getAllOnesValue(NumSrcElts);
2627 if (SubIdx && SubIdx->getAPIntValue().ule(NumSrcElts - NumElts)) {
2628 // Offset the demanded elts by the subvector index.
2629 uint64_t Idx = SubIdx->getZExtValue();
2630 DemandedSrc = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx);
2631 }
2632 Known = computeKnownBits(Src, DemandedSrc, Depth + 1);
2633 break;
2634 }
2635 case ISD::SCALAR_TO_VECTOR: {
2636 // We know about scalar_to_vector as much as we know about it source,
2637 // which becomes the first element of otherwise unknown vector.
2638 if (DemandedElts != 1)
2639 break;
2640
2641 SDValue N0 = Op.getOperand(0);
2642 Known = computeKnownBits(N0, Depth + 1);
2643 if (N0.getValueSizeInBits() != BitWidth)
2644 Known = Known.trunc(BitWidth);
2645
2646 break;
2647 }
2648 case ISD::BITCAST: {
2649 SDValue N0 = Op.getOperand(0);
2650 EVT SubVT = N0.getValueType();
2651 unsigned SubBitWidth = SubVT.getScalarSizeInBits();
2652
2653 // Ignore bitcasts from unsupported types.
2654 if (!(SubVT.isInteger() || SubVT.isFloatingPoint()))
2655 break;
2656
2657 // Fast handling of 'identity' bitcasts.
2658 if (BitWidth == SubBitWidth) {
2659 Known = computeKnownBits(N0, DemandedElts, Depth + 1);
2660 break;
2661 }
2662
2663 bool IsLE = getDataLayout().isLittleEndian();
2664
2665 // Bitcast 'small element' vector to 'large element' scalar/vector.
2666 if ((BitWidth % SubBitWidth) == 0) {
2667 assert(N0.getValueType().isVector() && "Expected bitcast from vector")((N0.getValueType().isVector() && "Expected bitcast from vector"
) ? static_cast<void> (0) : __assert_fail ("N0.getValueType().isVector() && \"Expected bitcast from vector\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2667, __PRETTY_FUNCTION__))
;
2668
2669 // Collect known bits for the (larger) output by collecting the known
2670 // bits from each set of sub elements and shift these into place.
2671 // We need to separately call computeKnownBits for each set of
2672 // sub elements as the knownbits for each is likely to be different.
2673 unsigned SubScale = BitWidth / SubBitWidth;
2674 APInt SubDemandedElts(NumElts * SubScale, 0);
2675 for (unsigned i = 0; i != NumElts; ++i)
2676 if (DemandedElts[i])
2677 SubDemandedElts.setBit(i * SubScale);
2678
2679 for (unsigned i = 0; i != SubScale; ++i) {
2680 Known2 = computeKnownBits(N0, SubDemandedElts.shl(i),
2681 Depth + 1);
2682 unsigned Shifts = IsLE ? i : SubScale - 1 - i;
2683 Known.One |= Known2.One.zext(BitWidth).shl(SubBitWidth * Shifts);
2684 Known.Zero |= Known2.Zero.zext(BitWidth).shl(SubBitWidth * Shifts);
2685 }
2686 }
2687
2688 // Bitcast 'large element' scalar/vector to 'small element' vector.
2689 if ((SubBitWidth % BitWidth) == 0) {
2690 assert(Op.getValueType().isVector() && "Expected bitcast to vector")((Op.getValueType().isVector() && "Expected bitcast to vector"
) ? static_cast<void> (0) : __assert_fail ("Op.getValueType().isVector() && \"Expected bitcast to vector\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 2690, __PRETTY_FUNCTION__))
;
2691
2692 // Collect known bits for the (smaller) output by collecting the known
2693 // bits from the overlapping larger input elements and extracting the
2694 // sub sections we actually care about.
2695 unsigned SubScale = SubBitWidth / BitWidth;
2696 APInt SubDemandedElts(NumElts / SubScale, 0);
2697 for (unsigned i = 0; i != NumElts; ++i)
2698 if (DemandedElts[i])
2699 SubDemandedElts.setBit(i / SubScale);
2700
2701 Known2 = computeKnownBits(N0, SubDemandedElts, Depth + 1);
2702
2703 Known.Zero.setAllBits(); Known.One.setAllBits();
2704 for (unsigned i = 0; i != NumElts; ++i)
2705 if (DemandedElts[i]) {
2706 unsigned Shifts = IsLE ? i : NumElts - 1 - i;
2707 unsigned Offset = (Shifts % SubScale) * BitWidth;
2708 Known.One &= Known2.One.lshr(Offset).trunc(BitWidth);
2709 Known.Zero &= Known2.Zero.lshr(Offset).trunc(BitWidth);
2710 // If we don't know any bits, early out.
2711 if (Known.isUnknown())
2712 break;
2713 }
2714 }
2715 break;
2716 }
2717 case ISD::AND:
2718 // If either the LHS or the RHS are Zero, the result is zero.
2719 Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2720 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2721
2722 // Output known-1 bits are only known if set in both the LHS & RHS.
2723 Known.One &= Known2.One;
2724 // Output known-0 are known to be clear if zero in either the LHS | RHS.
2725 Known.Zero |= Known2.Zero;
2726 break;
2727 case ISD::OR:
2728 Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2729 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2730
2731 // Output known-0 bits are only known if clear in both the LHS & RHS.
2732 Known.Zero &= Known2.Zero;
2733 // Output known-1 are known to be set if set in either the LHS | RHS.
2734 Known.One |= Known2.One;
2735 break;
2736 case ISD::XOR: {
2737 Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2738 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2739
2740 // Output known-0 bits are known if clear or set in both the LHS & RHS.
2741 APInt KnownZeroOut = (Known.Zero & Known2.Zero) | (Known.One & Known2.One);
2742 // Output known-1 are known to be set if set in only one of the LHS, RHS.
2743 Known.One = (Known.Zero & Known2.One) | (Known.One & Known2.Zero);
2744 Known.Zero = KnownZeroOut;
2745 break;
2746 }
2747 case ISD::MUL: {
2748 Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2749 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2750
2751 // If low bits are zero in either operand, output low known-0 bits.
2752 // Also compute a conservative estimate for high known-0 bits.
2753 // More trickiness is possible, but this is sufficient for the
2754 // interesting case of alignment computation.
2755 unsigned TrailZ = Known.countMinTrailingZeros() +
2756 Known2.countMinTrailingZeros();
2757 unsigned LeadZ = std::max(Known.countMinLeadingZeros() +
2758 Known2.countMinLeadingZeros(),
2759 BitWidth) - BitWidth;
2760
2761 Known.resetAll();
2762 Known.Zero.setLowBits(std::min(TrailZ, BitWidth));
2763 Known.Zero.setHighBits(std::min(LeadZ, BitWidth));
2764 break;
2765 }
2766 case ISD::UDIV: {
2767 // For the purposes of computing leading zeros we can conservatively
2768 // treat a udiv as a logical right shift by the power of 2 known to
2769 // be less than the denominator.
2770 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2771 unsigned LeadZ = Known2.countMinLeadingZeros();
2772
2773 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2774 unsigned RHSMaxLeadingZeros = Known2.countMaxLeadingZeros();
2775 if (RHSMaxLeadingZeros != BitWidth)
2776 LeadZ = std::min(BitWidth, LeadZ + BitWidth - RHSMaxLeadingZeros - 1);
2777
2778 Known.Zero.setHighBits(LeadZ);
2779 break;
2780 }
2781 case ISD::SELECT:
2782 case ISD::VSELECT:
2783 Known = computeKnownBits(Op.getOperand(2), DemandedElts, Depth+1);
2784 // If we don't know any bits, early out.
2785 if (Known.isUnknown())
2786 break;
2787 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth+1);
2788
2789 // Only known if known in both the LHS and RHS.
2790 Known.One &= Known2.One;
2791 Known.Zero &= Known2.Zero;
2792 break;
2793 case ISD::SELECT_CC:
2794 Known = computeKnownBits(Op.getOperand(3), DemandedElts, Depth+1);
2795 // If we don't know any bits, early out.
2796 if (Known.isUnknown())
2797 break;
2798 Known2 = computeKnownBits(Op.getOperand(2), DemandedElts, Depth+1);
2799
2800 // Only known if known in both the LHS and RHS.
2801 Known.One &= Known2.One;
2802 Known.Zero &= Known2.Zero;
2803 break;
2804 case ISD::SMULO:
2805 case ISD::UMULO:
2806 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
2807 if (Op.getResNo() != 1)
2808 break;
2809 // The boolean result conforms to getBooleanContents.
2810 // If we know the result of a setcc has the top bits zero, use this info.
2811 // We know that we have an integer-based boolean since these operations
2812 // are only available for integer.
2813 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2814 TargetLowering::ZeroOrOneBooleanContent &&
2815 BitWidth > 1)
2816 Known.Zero.setBitsFrom(1);
2817 break;
2818 case ISD::SETCC:
2819 case ISD::STRICT_FSETCC:
2820 case ISD::STRICT_FSETCCS: {
2821 unsigned OpNo = Op->isStrictFPOpcode() ? 1 : 0;
2822 // If we know the result of a setcc has the top bits zero, use this info.
2823 if (TLI->getBooleanContents(Op.getOperand(OpNo).getValueType()) ==
2824 TargetLowering::ZeroOrOneBooleanContent &&
2825 BitWidth > 1)
2826 Known.Zero.setBitsFrom(1);
2827 break;
2828 }
2829 case ISD::SHL:
2830 if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
2831 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2832 unsigned Shift = ShAmt->getZExtValue();
2833 Known.Zero <<= Shift;
2834 Known.One <<= Shift;
2835 // Low bits are known zero.
2836 Known.Zero.setLowBits(Shift);
2837 }
2838 break;
2839 case ISD::SRL:
2840 if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
2841 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2842 unsigned Shift = ShAmt->getZExtValue();
2843 Known.Zero.lshrInPlace(Shift);
2844 Known.One.lshrInPlace(Shift);
2845 // High bits are known zero.
2846 Known.Zero.setHighBits(Shift);
2847 } else if (const APInt *ShMinAmt = getValidMinimumShiftAmountConstant(Op)) {
2848 // Minimum shift high bits are known zero.
2849 Known.Zero.setHighBits(ShMinAmt->getZExtValue());
2850 }
2851 break;
2852 case ISD::SRA:
2853 if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
2854 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2855 unsigned Shift = ShAmt->getZExtValue();
2856 // Sign extend known zero/one bit (else is unknown).
2857 Known.Zero.ashrInPlace(Shift);
2858 Known.One.ashrInPlace(Shift);
2859 }
2860 break;
2861 case ISD::FSHL:
2862 case ISD::FSHR:
2863 if (ConstantSDNode *C = isConstOrConstSplat(Op.getOperand(2), DemandedElts)) {
2864 unsigned Amt = C->getAPIntValue().urem(BitWidth);
2865
2866 // For fshl, 0-shift returns the 1st arg.
2867 // For fshr, 0-shift returns the 2nd arg.
2868 if (Amt == 0) {
2869 Known = computeKnownBits(Op.getOperand(Opcode == ISD::FSHL ? 0 : 1),
2870 DemandedElts, Depth + 1);
2871 break;
2872 }
2873
2874 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2875 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2876 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2877 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2878 if (Opcode == ISD::FSHL) {
2879 Known.One <<= Amt;
2880 Known.Zero <<= Amt;
2881 Known2.One.lshrInPlace(BitWidth - Amt);
2882 Known2.Zero.lshrInPlace(BitWidth - Amt);
2883 } else {
2884 Known.One <<= BitWidth - Amt;
2885 Known.Zero <<= BitWidth - Amt;
2886 Known2.One.lshrInPlace(Amt);
2887 Known2.Zero.lshrInPlace(Amt);
2888 }
2889 Known.One |= Known2.One;
2890 Known.Zero |= Known2.Zero;
2891 }
2892 break;
2893 case ISD::SIGN_EXTEND_INREG: {
2894 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2895 unsigned EBits = EVT.getScalarSizeInBits();
2896
2897 // Sign extension. Compute the demanded bits in the result that are not
2898 // present in the input.
2899 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2900
2901 APInt InSignMask = APInt::getSignMask(EBits);
2902 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2903
2904 // If the sign extended bits are demanded, we know that the sign
2905 // bit is demanded.
2906 InSignMask = InSignMask.zext(BitWidth);
2907 if (NewBits.getBoolValue())
2908 InputDemandedBits |= InSignMask;
2909
2910 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2911 Known.One &= InputDemandedBits;
2912 Known.Zero &= InputDemandedBits;
2913
2914 // If the sign bit of the input is known set or clear, then we know the
2915 // top bits of the result.
2916 if (Known.Zero.intersects(InSignMask)) { // Input sign bit known clear
2917 Known.Zero |= NewBits;
2918 Known.One &= ~NewBits;
2919 } else if (Known.One.intersects(InSignMask)) { // Input sign bit known set
2920 Known.One |= NewBits;
2921 Known.Zero &= ~NewBits;
2922 } else { // Input sign bit unknown
2923 Known.Zero &= ~NewBits;
2924 Known.One &= ~NewBits;
2925 }
2926 break;
2927 }
2928 case ISD::CTTZ:
2929 case ISD::CTTZ_ZERO_UNDEF: {
2930 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2931 // If we have a known 1, its position is our upper bound.
2932 unsigned PossibleTZ = Known2.countMaxTrailingZeros();
2933 unsigned LowBits = Log2_32(PossibleTZ) + 1;
2934 Known.Zero.setBitsFrom(LowBits);
2935 break;
2936 }
2937 case ISD::CTLZ:
2938 case ISD::CTLZ_ZERO_UNDEF: {
2939 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2940 // If we have a known 1, its position is our upper bound.
2941 unsigned PossibleLZ = Known2.countMaxLeadingZeros();
2942 unsigned LowBits = Log2_32(PossibleLZ) + 1;
2943 Known.Zero.setBitsFrom(LowBits);
2944 break;
2945 }
2946 case ISD::CTPOP: {
2947 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2948 // If we know some of the bits are zero, they can't be one.
2949 unsigned PossibleOnes = Known2.countMaxPopulation();
2950 Known.Zero.setBitsFrom(Log2_32(PossibleOnes) + 1);
2951 break;
2952 }
2953 case ISD::LOAD: {
2954 LoadSDNode *LD = cast<LoadSDNode>(Op);
2955 const Constant *Cst = TLI->getTargetConstantFromLoad(LD);
2956 if (ISD::isNON_EXTLoad(LD) && Cst) {
2957 // Determine any common known bits from the loaded constant pool value.
2958 Type *CstTy = Cst->getType();
2959 if ((NumElts * BitWidth) == CstTy->getPrimitiveSizeInBits()) {
2960 // If its a vector splat, then we can (quickly) reuse the scalar path.
2961 // NOTE: We assume all elements match and none are UNDEF.
2962 if (CstTy->isVectorTy()) {
2963 if (const Constant *Splat = Cst->getSplatValue()) {
2964 Cst = Splat;
2965 CstTy = Cst->getType();
2966 }
2967 }
2968 // TODO - do we need to handle different bitwidths?
2969 if (CstTy->isVectorTy() && BitWidth == CstTy->getScalarSizeInBits()) {
2970 // Iterate across all vector elements finding common known bits.
2971 Known.One.setAllBits();
2972 Known.Zero.setAllBits();
2973 for (unsigned i = 0; i != NumElts; ++i) {
2974 if (!DemandedElts[i])
2975 continue;
2976 if (Constant *Elt = Cst->getAggregateElement(i)) {
2977 if (auto *CInt = dyn_cast<ConstantInt>(Elt)) {
2978 const APInt &Value = CInt->getValue();
2979 Known.One &= Value;
2980 Known.Zero &= ~Value;
2981 continue;
2982 }
2983 if (auto *CFP = dyn_cast<ConstantFP>(Elt)) {
2984 APInt Value = CFP->getValueAPF().bitcastToAPInt();
2985 Known.One &= Value;
2986 Known.Zero &= ~Value;
2987 continue;
2988 }
2989 }
2990 Known.One.clearAllBits();
2991 Known.Zero.clearAllBits();
2992 break;
2993 }
2994 } else if (BitWidth == CstTy->getPrimitiveSizeInBits()) {
2995 if (auto *CInt = dyn_cast<ConstantInt>(Cst)) {
2996 const APInt &Value = CInt->getValue();
2997 Known.One = Value;
2998 Known.Zero = ~Value;
2999 } else if (auto *CFP = dyn_cast<ConstantFP>(Cst)) {
3000 APInt Value = CFP->getValueAPF().bitcastToAPInt();
3001 Known.One = Value;
3002 Known.Zero = ~Value;
3003 }
3004 }
3005 }
3006 } else if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
3007 // If this is a ZEXTLoad and we are looking at the loaded value.
3008 EVT VT = LD->getMemoryVT();
3009 unsigned MemBits = VT.getScalarSizeInBits();
3010 Known.Zero.setBitsFrom(MemBits);
3011 } else if (const MDNode *Ranges = LD->getRanges()) {
3012 if (LD->getExtensionType() == ISD::NON_EXTLOAD)
3013 computeKnownBitsFromRangeMetadata(*Ranges, Known);
3014 }
3015 break;
3016 }
3017 case ISD::ZERO_EXTEND_VECTOR_INREG: {
3018 EVT InVT = Op.getOperand(0).getValueType();
3019 APInt InDemandedElts = DemandedElts.zextOrSelf(InVT.getVectorNumElements());
3020 Known = computeKnownBits(Op.getOperand(0), InDemandedElts, Depth + 1);
3021 Known = Known.zext(BitWidth, true /* ExtendedBitsAreKnownZero */);
3022 break;
3023 }
3024 case ISD::ZERO_EXTEND: {
3025 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3026 Known = Known.zext(BitWidth, true /* ExtendedBitsAreKnownZero */);
3027 break;
3028 }
3029 case ISD::SIGN_EXTEND_VECTOR_INREG: {
3030 EVT InVT = Op.getOperand(0).getValueType();
3031 APInt InDemandedElts = DemandedElts.zextOrSelf(InVT.getVectorNumElements());
3032 Known = computeKnownBits(Op.getOperand(0), InDemandedElts, Depth + 1);
3033 // If the sign bit is known to be zero or one, then sext will extend
3034 // it to the top bits, else it will just zext.
3035 Known = Known.sext(BitWidth);
3036 break;
3037 }
3038 case ISD::SIGN_EXTEND: {
3039 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3040 // If the sign bit is known to be zero or one, then sext will extend
3041 // it to the top bits, else it will just zext.
3042 Known = Known.sext(BitWidth);
3043 break;
3044 }
3045 case ISD::ANY_EXTEND: {
3046 Known = computeKnownBits(Op.getOperand(0), Depth+1);
3047 Known = Known.zext(BitWidth, false /* ExtendedBitsAreKnownZero */);
3048 break;
3049 }
3050 case ISD::TRUNCATE: {
3051 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3052 Known = Known.trunc(BitWidth);
3053 break;
3054 }
3055 case ISD::AssertZext: {
3056 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
3057 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
3058 Known = computeKnownBits(Op.getOperand(0), Depth+1);
3059 Known.Zero |= (~InMask);
3060 Known.One &= (~Known.Zero);
3061 break;
3062 }
3063 case ISD::FGETSIGN:
3064 // All bits are zero except the low bit.
3065 Known.Zero.setBitsFrom(1);
3066 break;
3067 case ISD::USUBO:
3068 case ISD::SSUBO:
3069 if (Op.getResNo() == 1) {
3070 // If we know the result of a setcc has the top bits zero, use this info.
3071 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
3072 TargetLowering::ZeroOrOneBooleanContent &&
3073 BitWidth > 1)
3074 Known.Zero.setBitsFrom(1);
3075 break;
3076 }
3077 LLVM_FALLTHROUGH[[gnu::fallthrough]];
3078 case ISD::SUB:
3079 case ISD::SUBC: {
3080 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3081 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3082 Known = KnownBits::computeForAddSub(/* Add */ false, /* NSW */ false,
3083 Known, Known2);
3084 break;
3085 }
3086 case ISD::UADDO:
3087 case ISD::SADDO:
3088 case ISD::ADDCARRY:
3089 if (Op.getResNo() == 1) {
3090 // If we know the result of a setcc has the top bits zero, use this info.
3091 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
3092 TargetLowering::ZeroOrOneBooleanContent &&
3093 BitWidth > 1)
3094 Known.Zero.setBitsFrom(1);
3095 break;
3096 }
3097 LLVM_FALLTHROUGH[[gnu::fallthrough]];
3098 case ISD::ADD:
3099 case ISD::ADDC:
3100 case ISD::ADDE: {
3101 assert(Op.getResNo() == 0 && "We only compute knownbits for the sum here.")((Op.getResNo() == 0 && "We only compute knownbits for the sum here."
) ? static_cast<void> (0) : __assert_fail ("Op.getResNo() == 0 && \"We only compute knownbits for the sum here.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3101, __PRETTY_FUNCTION__))
;
3102
3103 // With ADDE and ADDCARRY, a carry bit may be added in.
3104 KnownBits Carry(1);
3105 if (Opcode == ISD::ADDE)
3106 // Can't track carry from glue, set carry to unknown.
3107 Carry.resetAll();
3108 else if (Opcode == ISD::ADDCARRY)
3109 // TODO: Compute known bits for the carry operand. Not sure if it is worth
3110 // the trouble (how often will we find a known carry bit). And I haven't
3111 // tested this very much yet, but something like this might work:
3112 // Carry = computeKnownBits(Op.getOperand(2), DemandedElts, Depth + 1);
3113 // Carry = Carry.zextOrTrunc(1, false);
3114 Carry.resetAll();
3115 else
3116 Carry.setAllZero();
3117
3118 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3119 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3120 Known = KnownBits::computeForAddCarry(Known, Known2, Carry);
3121 break;
3122 }
3123 case ISD::SREM:
3124 if (ConstantSDNode *Rem = isConstOrConstSplat(Op.getOperand(1))) {
3125 const APInt &RA = Rem->getAPIntValue().abs();
3126 if (RA.isPowerOf2()) {
3127 APInt LowBits = RA - 1;
3128 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3129
3130 // The low bits of the first operand are unchanged by the srem.
3131 Known.Zero = Known2.Zero & LowBits;
3132 Known.One = Known2.One & LowBits;
3133
3134 // If the first operand is non-negative or has all low bits zero, then
3135 // the upper bits are all zero.
3136 if (Known2.isNonNegative() || LowBits.isSubsetOf(Known2.Zero))
3137 Known.Zero |= ~LowBits;
3138
3139 // If the first operand is negative and not all low bits are zero, then
3140 // the upper bits are all one.
3141 if (Known2.isNegative() && LowBits.intersects(Known2.One))
3142 Known.One |= ~LowBits;
3143 assert((Known.Zero & Known.One) == 0&&"Bits known to be one AND zero?")(((Known.Zero & Known.One) == 0&&"Bits known to be one AND zero?"
) ? static_cast<void> (0) : __assert_fail ("(Known.Zero & Known.One) == 0&&\"Bits known to be one AND zero?\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3143, __PRETTY_FUNCTION__))
;
3144 }
3145 }
3146 break;
3147 case ISD::UREM: {
3148 if (ConstantSDNode *Rem = isConstOrConstSplat(Op.getOperand(1))) {
3149 const APInt &RA = Rem->getAPIntValue();
3150 if (RA.isPowerOf2()) {
3151 APInt LowBits = (RA - 1);
3152 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3153
3154 // The upper bits are all zero, the lower ones are unchanged.
3155 Known.Zero = Known2.Zero | ~LowBits;
3156 Known.One = Known2.One & LowBits;
3157 break;
3158 }
3159 }
3160
3161 // Since the result is less than or equal to either operand, any leading
3162 // zero bits in either operand must also exist in the result.
3163 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3164 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3165
3166 uint32_t Leaders =
3167 std::max(Known.countMinLeadingZeros(), Known2.countMinLeadingZeros());
3168 Known.resetAll();
3169 Known.Zero.setHighBits(Leaders);
3170 break;
3171 }
3172 case ISD::EXTRACT_ELEMENT: {
3173 Known = computeKnownBits(Op.getOperand(0), Depth+1);
3174 const unsigned Index = Op.getConstantOperandVal(1);
3175 const unsigned EltBitWidth = Op.getValueSizeInBits();
3176
3177 // Remove low part of known bits mask
3178 Known.Zero = Known.Zero.getHiBits(Known.getBitWidth() - Index * EltBitWidth);
3179 Known.One = Known.One.getHiBits(Known.getBitWidth() - Index * EltBitWidth);
3180
3181 // Remove high part of known bit mask
3182 Known = Known.trunc(EltBitWidth);
3183 break;
3184 }
3185 case ISD::EXTRACT_VECTOR_ELT: {
3186 SDValue InVec = Op.getOperand(0);
3187 SDValue EltNo = Op.getOperand(1);
3188 EVT VecVT = InVec.getValueType();
3189 const unsigned EltBitWidth = VecVT.getScalarSizeInBits();
3190 const unsigned NumSrcElts = VecVT.getVectorNumElements();
3191 // If BitWidth > EltBitWidth the value is anyext:ed. So we do not know
3192 // anything about the extended bits.
3193 if (BitWidth > EltBitWidth)
3194 Known = Known.trunc(EltBitWidth);
3195 ConstantSDNode *ConstEltNo = dyn_cast<ConstantSDNode>(EltNo);
3196 if (ConstEltNo && ConstEltNo->getAPIntValue().ult(NumSrcElts)) {
3197 // If we know the element index, just demand that vector element.
3198 unsigned Idx = ConstEltNo->getZExtValue();
3199 APInt DemandedElt = APInt::getOneBitSet(NumSrcElts, Idx);
3200 Known = computeKnownBits(InVec, DemandedElt, Depth + 1);
3201 } else {
3202 // Unknown element index, so ignore DemandedElts and demand them all.
3203 Known = computeKnownBits(InVec, Depth + 1);
3204 }
3205 if (BitWidth > EltBitWidth)
3206 Known = Known.zext(BitWidth, false /* => any extend */);
3207 break;
3208 }
3209 case ISD::INSERT_VECTOR_ELT: {
3210 SDValue InVec = Op.getOperand(0);
3211 SDValue InVal = Op.getOperand(1);
3212 SDValue EltNo = Op.getOperand(2);
3213
3214 ConstantSDNode *CEltNo = dyn_cast<ConstantSDNode>(EltNo);
3215 if (CEltNo && CEltNo->getAPIntValue().ult(NumElts)) {
3216 // If we know the element index, split the demand between the
3217 // source vector and the inserted element.
3218 Known.Zero = Known.One = APInt::getAllOnesValue(BitWidth);
3219 unsigned EltIdx = CEltNo->getZExtValue();
3220
3221 // If we demand the inserted element then add its common known bits.
3222 if (DemandedElts[EltIdx]) {
3223 Known2 = computeKnownBits(InVal, Depth + 1);
3224 Known.One &= Known2.One.zextOrTrunc(Known.One.getBitWidth());
3225 Known.Zero &= Known2.Zero.zextOrTrunc(Known.Zero.getBitWidth());
3226 }
3227
3228 // If we demand the source vector then add its common known bits, ensuring
3229 // that we don't demand the inserted element.
3230 APInt VectorElts = DemandedElts & ~(APInt::getOneBitSet(NumElts, EltIdx));
3231 if (!!VectorElts) {
3232 Known2 = computeKnownBits(InVec, VectorElts, Depth + 1);
3233 Known.One &= Known2.One;
3234 Known.Zero &= Known2.Zero;
3235 }
3236 } else {
3237 // Unknown element index, so ignore DemandedElts and demand them all.
3238 Known = computeKnownBits(InVec, Depth + 1);
3239 Known2 = computeKnownBits(InVal, Depth + 1);
3240 Known.One &= Known2.One.zextOrTrunc(Known.One.getBitWidth());
3241 Known.Zero &= Known2.Zero.zextOrTrunc(Known.Zero.getBitWidth());
3242 }
3243 break;
3244 }
3245 case ISD::BITREVERSE: {
3246 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3247 Known.Zero = Known2.Zero.reverseBits();
3248 Known.One = Known2.One.reverseBits();
3249 break;
3250 }
3251 case ISD::BSWAP: {
3252 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3253 Known.Zero = Known2.Zero.byteSwap();
3254 Known.One = Known2.One.byteSwap();
3255 break;
3256 }
3257 case ISD::ABS: {
3258 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3259
3260 // If the source's MSB is zero then we know the rest of the bits already.
3261 if (Known2.isNonNegative()) {
3262 Known.Zero = Known2.Zero;
3263 Known.One = Known2.One;
3264 break;
3265 }
3266
3267 // We only know that the absolute values's MSB will be zero iff there is
3268 // a set bit that isn't the sign bit (otherwise it could be INT_MIN).
3269 Known2.One.clearSignBit();
3270 if (Known2.One.getBoolValue()) {
3271 Known.Zero = APInt::getSignMask(BitWidth);
3272 break;
3273 }
3274 break;
3275 }
3276 case ISD::UMIN: {
3277 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3278 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3279
3280 // UMIN - we know that the result will have the maximum of the
3281 // known zero leading bits of the inputs.
3282 unsigned LeadZero = Known.countMinLeadingZeros();
3283 LeadZero = std::max(LeadZero, Known2.countMinLeadingZeros());
3284
3285 Known.Zero &= Known2.Zero;
3286 Known.One &= Known2.One;
3287 Known.Zero.setHighBits(LeadZero);
3288 break;
3289 }
3290 case ISD::UMAX: {
3291 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3292 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3293
3294 // UMAX - we know that the result will have the maximum of the
3295 // known one leading bits of the inputs.
3296 unsigned LeadOne = Known.countMinLeadingOnes();
3297 LeadOne = std::max(LeadOne, Known2.countMinLeadingOnes());
3298
3299 Known.Zero &= Known2.Zero;
3300 Known.One &= Known2.One;
3301 Known.One.setHighBits(LeadOne);
3302 break;
3303 }
3304 case ISD::SMIN:
3305 case ISD::SMAX: {
3306 // If we have a clamp pattern, we know that the number of sign bits will be
3307 // the minimum of the clamp min/max range.
3308 bool IsMax = (Opcode == ISD::SMAX);
3309 ConstantSDNode *CstLow = nullptr, *CstHigh = nullptr;
3310 if ((CstLow = isConstOrConstSplat(Op.getOperand(1), DemandedElts)))
3311 if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
3312 CstHigh =
3313 isConstOrConstSplat(Op.getOperand(0).getOperand(1), DemandedElts);
3314 if (CstLow && CstHigh) {
3315 if (!IsMax)
3316 std::swap(CstLow, CstHigh);
3317
3318 const APInt &ValueLow = CstLow->getAPIntValue();
3319 const APInt &ValueHigh = CstHigh->getAPIntValue();
3320 if (ValueLow.sle(ValueHigh)) {
3321 unsigned LowSignBits = ValueLow.getNumSignBits();
3322 unsigned HighSignBits = ValueHigh.getNumSignBits();
3323 unsigned MinSignBits = std::min(LowSignBits, HighSignBits);
3324 if (ValueLow.isNegative() && ValueHigh.isNegative()) {
3325 Known.One.setHighBits(MinSignBits);
3326 break;
3327 }
3328 if (ValueLow.isNonNegative() && ValueHigh.isNonNegative()) {
3329 Known.Zero.setHighBits(MinSignBits);
3330 break;
3331 }
3332 }
3333 }
3334
3335 // Fallback - just get the shared known bits of the operands.
3336 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3337 if (Known.isUnknown()) break; // Early-out
3338 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3339 Known.Zero &= Known2.Zero;
3340 Known.One &= Known2.One;
3341 break;
3342 }
3343 case ISD::FrameIndex:
3344 case ISD::TargetFrameIndex:
3345 TLI->computeKnownBitsForFrameIndex(Op, Known, DemandedElts, *this, Depth);
3346 break;
3347
3348 default:
3349 if (Opcode < ISD::BUILTIN_OP_END)
3350 break;
3351 LLVM_FALLTHROUGH[[gnu::fallthrough]];
3352 case ISD::INTRINSIC_WO_CHAIN:
3353 case ISD::INTRINSIC_W_CHAIN:
3354 case ISD::INTRINSIC_VOID:
3355 // Allow the target to implement this method for its nodes.
3356 TLI->computeKnownBitsForTargetNode(Op, Known, DemandedElts, *this, Depth);
3357 break;
3358 }
3359
3360 assert(!Known.hasConflict() && "Bits known to be one AND zero?")((!Known.hasConflict() && "Bits known to be one AND zero?"
) ? static_cast<void> (0) : __assert_fail ("!Known.hasConflict() && \"Bits known to be one AND zero?\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3360, __PRETTY_FUNCTION__))
;
3361 return Known;
3362}
3363
3364SelectionDAG::OverflowKind SelectionDAG::computeOverflowKind(SDValue N0,
3365 SDValue N1) const {
3366 // X + 0 never overflow
3367 if (isNullConstant(N1))
3368 return OFK_Never;
3369
3370 KnownBits N1Known = computeKnownBits(N1);
3371 if (N1Known.Zero.getBoolValue()) {
3372 KnownBits N0Known = computeKnownBits(N0);
3373
3374 bool overflow;
3375 (void)N0Known.getMaxValue().uadd_ov(N1Known.getMaxValue(), overflow);
3376 if (!overflow)
3377 return OFK_Never;
3378 }
3379
3380 // mulhi + 1 never overflow
3381 if (N0.getOpcode() == ISD::UMUL_LOHI && N0.getResNo() == 1 &&
3382 (N1Known.getMaxValue() & 0x01) == N1Known.getMaxValue())
3383 return OFK_Never;
3384
3385 if (N1.getOpcode() == ISD::UMUL_LOHI && N1.getResNo() == 1) {
3386 KnownBits N0Known = computeKnownBits(N0);
3387
3388 if ((N0Known.getMaxValue() & 0x01) == N0Known.getMaxValue())
3389 return OFK_Never;
3390 }
3391
3392 return OFK_Sometime;
3393}
3394
3395bool SelectionDAG::isKnownToBeAPowerOfTwo(SDValue Val) const {
3396 EVT OpVT = Val.getValueType();
3397 unsigned BitWidth = OpVT.getScalarSizeInBits();
3398
3399 // Is the constant a known power of 2?
3400 if (ConstantSDNode *Const = dyn_cast<ConstantSDNode>(Val))
3401 return Const->getAPIntValue().zextOrTrunc(BitWidth).isPowerOf2();
3402
3403 // A left-shift of a constant one will have exactly one bit set because
3404 // shifting the bit off the end is undefined.
3405 if (Val.getOpcode() == ISD::SHL) {
3406 auto *C = isConstOrConstSplat(Val.getOperand(0));
3407 if (C && C->getAPIntValue() == 1)
3408 return true;
3409 }
3410
3411 // Similarly, a logical right-shift of a constant sign-bit will have exactly
3412 // one bit set.
3413 if (Val.getOpcode() == ISD::SRL) {
3414 auto *C = isConstOrConstSplat(Val.getOperand(0));
3415 if (C && C->getAPIntValue().isSignMask())
3416 return true;
3417 }
3418
3419 // Are all operands of a build vector constant powers of two?
3420 if (Val.getOpcode() == ISD::BUILD_VECTOR)
3421 if (llvm::all_of(Val->ops(), [BitWidth](SDValue E) {
3422 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(E))
3423 return C->getAPIntValue().zextOrTrunc(BitWidth).isPowerOf2();
3424 return false;
3425 }))
3426 return true;
3427
3428 // More could be done here, though the above checks are enough
3429 // to handle some common cases.
3430
3431 // Fall back to computeKnownBits to catch other known cases.
3432 KnownBits Known = computeKnownBits(Val);
3433 return (Known.countMaxPopulation() == 1) && (Known.countMinPopulation() == 1);
3434}
3435
3436unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const {
3437 EVT VT = Op.getValueType();
14
Calling 'SDValue::getValueType'
3438 APInt DemandedElts = VT.isVector()
3439 ? APInt::getAllOnesValue(VT.getVectorNumElements())
3440 : APInt(1, 1);
3441 return ComputeNumSignBits(Op, DemandedElts, Depth);
3442}
3443
3444unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
3445 unsigned Depth) const {
3446 EVT VT = Op.getValueType();
3447 assert((VT.isInteger() || VT.isFloatingPoint()) && "Invalid VT!")(((VT.isInteger() || VT.isFloatingPoint()) && "Invalid VT!"
) ? static_cast<void> (0) : __assert_fail ("(VT.isInteger() || VT.isFloatingPoint()) && \"Invalid VT!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3447, __PRETTY_FUNCTION__))
;
1
Assuming the condition is true
2
'?' condition is true
3448 unsigned VTBits = VT.getScalarSizeInBits();
3449 unsigned NumElts = DemandedElts.getBitWidth();
3450 unsigned Tmp, Tmp2;
3451 unsigned FirstAnswer = 1;
3452
3453 if (auto *C
2.1
'C' is null
2.1
'C' is null
= dyn_cast<ConstantSDNode>(Op)) {
3
Taking false branch
3454 const APInt &Val = C->getAPIntValue();
3455 return Val.getNumSignBits();
3456 }
3457
3458 if (Depth >= MaxRecursionDepth)
4
Assuming 'Depth' is < 'MaxRecursionDepth'
5
Taking false branch
3459 return 1; // Limit search depth.
3460
3461 if (!DemandedElts)
6
Taking false branch
3462 return 1; // No demanded elts, better to assume we don't know anything.
3463
3464 unsigned Opcode = Op.getOpcode();
3465 switch (Opcode) {
7
Control jumps to 'case ADD:' at line 3711
3466 default: break;
3467 case ISD::AssertSext:
3468 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
3469 return VTBits-Tmp+1;
3470 case ISD::AssertZext:
3471 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
3472 return VTBits-Tmp;
3473
3474 case ISD::BUILD_VECTOR:
3475 Tmp = VTBits;
3476 for (unsigned i = 0, e = Op.getNumOperands(); (i < e) && (Tmp > 1); ++i) {
3477 if (!DemandedElts[i])
3478 continue;
3479
3480 SDValue SrcOp = Op.getOperand(i);
3481 Tmp2 = ComputeNumSignBits(Op.getOperand(i), Depth + 1);
3482
3483 // BUILD_VECTOR can implicitly truncate sources, we must handle this.
3484 if (SrcOp.getValueSizeInBits() != VTBits) {
3485 assert(SrcOp.getValueSizeInBits() > VTBits &&((SrcOp.getValueSizeInBits() > VTBits && "Expected BUILD_VECTOR implicit truncation"
) ? static_cast<void> (0) : __assert_fail ("SrcOp.getValueSizeInBits() > VTBits && \"Expected BUILD_VECTOR implicit truncation\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3486, __PRETTY_FUNCTION__))
3486 "Expected BUILD_VECTOR implicit truncation")((SrcOp.getValueSizeInBits() > VTBits && "Expected BUILD_VECTOR implicit truncation"
) ? static_cast<void> (0) : __assert_fail ("SrcOp.getValueSizeInBits() > VTBits && \"Expected BUILD_VECTOR implicit truncation\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3486, __PRETTY_FUNCTION__))
;
3487 unsigned ExtraBits = SrcOp.getValueSizeInBits() - VTBits;
3488 Tmp2 = (Tmp2 > ExtraBits ? Tmp2 - ExtraBits : 1);
3489 }
3490 Tmp = std::min(Tmp, Tmp2);
3491 }
3492 return Tmp;
3493
3494 case ISD::VECTOR_SHUFFLE: {
3495 // Collect the minimum number of sign bits that are shared by every vector
3496 // element referenced by the shuffle.
3497 APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0);
3498 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op);
3499 assert(NumElts == SVN->getMask().size() && "Unexpected vector size")((NumElts == SVN->getMask().size() && "Unexpected vector size"
) ? static_cast<void> (0) : __assert_fail ("NumElts == SVN->getMask().size() && \"Unexpected vector size\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3499, __PRETTY_FUNCTION__))
;
3500 for (unsigned i = 0; i != NumElts; ++i) {
3501 int M = SVN->getMaskElt(i);
3502 if (!DemandedElts[i])
3503 continue;
3504 // For UNDEF elements, we don't know anything about the common state of
3505 // the shuffle result.
3506 if (M < 0)
3507 return 1;
3508 if ((unsigned)M < NumElts)
3509 DemandedLHS.setBit((unsigned)M % NumElts);
3510 else
3511 DemandedRHS.setBit((unsigned)M % NumElts);
3512 }
3513 Tmp = std::numeric_limits<unsigned>::max();
3514 if (!!DemandedLHS)
3515 Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedLHS, Depth + 1);
3516 if (!!DemandedRHS) {
3517 Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedRHS, Depth + 1);
3518 Tmp = std::min(Tmp, Tmp2);
3519 }
3520 // If we don't know anything, early out and try computeKnownBits fall-back.
3521 if (Tmp == 1)
3522 break;
3523 assert(Tmp <= VTBits && "Failed to determine minimum sign bits")((Tmp <= VTBits && "Failed to determine minimum sign bits"
) ? static_cast<void> (0) : __assert_fail ("Tmp <= VTBits && \"Failed to determine minimum sign bits\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3523, __PRETTY_FUNCTION__))
;
3524 return Tmp;
3525 }
3526
3527 case ISD::BITCAST: {
3528 SDValue N0 = Op.getOperand(0);
3529 EVT SrcVT = N0.getValueType();
3530 unsigned SrcBits = SrcVT.getScalarSizeInBits();
3531
3532 // Ignore bitcasts from unsupported types..
3533 if (!(SrcVT.isInteger() || SrcVT.isFloatingPoint()))
3534 break;
3535
3536 // Fast handling of 'identity' bitcasts.
3537 if (VTBits == SrcBits)
3538 return ComputeNumSignBits(N0, DemandedElts, Depth + 1);
3539
3540 bool IsLE = getDataLayout().isLittleEndian();
3541
3542 // Bitcast 'large element' scalar/vector to 'small element' vector.
3543 if ((SrcBits % VTBits) == 0) {
3544 assert(VT.isVector() && "Expected bitcast to vector")((VT.isVector() && "Expected bitcast to vector") ? static_cast
<void> (0) : __assert_fail ("VT.isVector() && \"Expected bitcast to vector\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3544, __PRETTY_FUNCTION__))
;
3545
3546 unsigned Scale = SrcBits / VTBits;
3547 APInt SrcDemandedElts(NumElts / Scale, 0);
3548 for (unsigned i = 0; i != NumElts; ++i)
3549 if (DemandedElts[i])
3550 SrcDemandedElts.setBit(i / Scale);
3551
3552 // Fast case - sign splat can be simply split across the small elements.
3553 Tmp = ComputeNumSignBits(N0, SrcDemandedElts, Depth + 1);
3554 if (Tmp == SrcBits)
3555 return VTBits;
3556
3557 // Slow case - determine how far the sign extends into each sub-element.
3558 Tmp2 = VTBits;
3559 for (unsigned i = 0; i != NumElts; ++i)
3560 if (DemandedElts[i]) {
3561 unsigned SubOffset = i % Scale;
3562 SubOffset = (IsLE ? ((Scale - 1) - SubOffset) : SubOffset);
3563 SubOffset = SubOffset * VTBits;
3564 if (Tmp <= SubOffset)
3565 return 1;
3566 Tmp2 = std::min(Tmp2, Tmp - SubOffset);
3567 }
3568 return Tmp2;
3569 }
3570 break;
3571 }
3572
3573 case ISD::SIGN_EXTEND:
3574 Tmp = VTBits - Op.getOperand(0).getScalarValueSizeInBits();
3575 return ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1) + Tmp;
3576 case ISD::SIGN_EXTEND_INREG:
3577 // Max of the input and what this extends.
3578 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarSizeInBits();
3579 Tmp = VTBits-Tmp+1;
3580 Tmp2 = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
3581 return std::max(Tmp, Tmp2);
3582 case ISD::SIGN_EXTEND_VECTOR_INREG: {
3583 SDValue Src = Op.getOperand(0);
3584 EVT SrcVT = Src.getValueType();
3585 APInt DemandedSrcElts = DemandedElts.zextOrSelf(SrcVT.getVectorNumElements());
3586 Tmp = VTBits - SrcVT.getScalarSizeInBits();
3587 return ComputeNumSignBits(Src, DemandedSrcElts, Depth+1) + Tmp;
3588 }
3589
3590 case ISD::SRA:
3591 Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
3592 // SRA X, C -> adds C sign bits.
3593 if (ConstantSDNode *C =
3594 isConstOrConstSplat(Op.getOperand(1), DemandedElts)) {
3595 APInt ShiftVal = C->getAPIntValue();
3596 ShiftVal += Tmp;
3597 Tmp = ShiftVal.uge(VTBits) ? VTBits : ShiftVal.getZExtValue();
3598 }
3599 return Tmp;
3600 case ISD::SHL:
3601 if (ConstantSDNode *C =
3602 isConstOrConstSplat(Op.getOperand(1), DemandedElts)) {
3603 // shl destroys sign bits.
3604 Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
3605 if (C->getAPIntValue().uge(VTBits) || // Bad shift.
3606 C->getAPIntValue().uge(Tmp)) break; // Shifted all sign bits out.
3607 return Tmp - C->getZExtValue();
3608 }
3609 break;
3610 case ISD::AND:
3611 case ISD::OR:
3612 case ISD::XOR: // NOT is handled here.
3613 // Logical binary ops preserve the number of sign bits at the worst.
3614 Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
3615 if (Tmp != 1) {
3616 Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth+1);
3617 FirstAnswer = std::min(Tmp, Tmp2);
3618 // We computed what we know about the sign bits as our first
3619 // answer. Now proceed to the generic code that uses
3620 // computeKnownBits, and pick whichever answer is better.
3621 }
3622 break;
3623
3624 case ISD::SELECT:
3625 case ISD::VSELECT:
3626 Tmp = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth+1);
3627 if (Tmp == 1) return 1; // Early out.
3628 Tmp2 = ComputeNumSignBits(Op.getOperand(2), DemandedElts, Depth+1);
3629 return std::min(Tmp, Tmp2);
3630 case ISD::SELECT_CC:
3631 Tmp = ComputeNumSignBits(Op.getOperand(2), DemandedElts, Depth+1);
3632 if (Tmp == 1) return 1; // Early out.
3633 Tmp2 = ComputeNumSignBits(Op.getOperand(3), DemandedElts, Depth+1);
3634 return std::min(Tmp, Tmp2);
3635
3636 case ISD::SMIN:
3637 case ISD::SMAX: {
3638 // If we have a clamp pattern, we know that the number of sign bits will be
3639 // the minimum of the clamp min/max range.
3640 bool IsMax = (Opcode == ISD::SMAX);
3641 ConstantSDNode *CstLow = nullptr, *CstHigh = nullptr;
3642 if ((CstLow = isConstOrConstSplat(Op.getOperand(1), DemandedElts)))
3643 if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
3644 CstHigh =
3645 isConstOrConstSplat(Op.getOperand(0).getOperand(1), DemandedElts);
3646 if (CstLow && CstHigh) {
3647 if (!IsMax)
3648 std::swap(CstLow, CstHigh);
3649 if (CstLow->getAPIntValue().sle(CstHigh->getAPIntValue())) {
3650 Tmp = CstLow->getAPIntValue().getNumSignBits();
3651 Tmp2 = CstHigh->getAPIntValue().getNumSignBits();
3652 return std::min(Tmp, Tmp2);
3653 }
3654 }
3655
3656 // Fallback - just get the minimum number of sign bits of the operands.
3657 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
3658 if (Tmp == 1)
3659 return 1; // Early out.
3660 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
3661 return std::min(Tmp, Tmp2);
3662 }
3663 case ISD::UMIN:
3664 case ISD::UMAX:
3665 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
3666 if (Tmp == 1)
3667 return 1; // Early out.
3668 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
3669 return std::min(Tmp, Tmp2);
3670 case ISD::SADDO:
3671 case ISD::UADDO:
3672 case ISD::SSUBO:
3673 case ISD::USUBO:
3674 case ISD::SMULO:
3675 case ISD::UMULO:
3676 if (Op.getResNo() != 1)
3677 break;
3678 // The boolean result conforms to getBooleanContents. Fall through.
3679 // If setcc returns 0/-1, all bits are sign bits.
3680 // We know that we have an integer-based boolean since these operations
3681 // are only available for integer.
3682 if (TLI->getBooleanContents(VT.isVector(), false) ==
3683 TargetLowering::ZeroOrNegativeOneBooleanContent)
3684 return VTBits;
3685 break;
3686 case ISD::SETCC:
3687 case ISD::STRICT_FSETCC:
3688 case ISD::STRICT_FSETCCS: {
3689 unsigned OpNo = Op->isStrictFPOpcode() ? 1 : 0;
3690 // If setcc returns 0/-1, all bits are sign bits.
3691 if (TLI->getBooleanContents(Op.getOperand(OpNo).getValueType()) ==
3692 TargetLowering::ZeroOrNegativeOneBooleanContent)
3693 return VTBits;
3694 break;
3695 }
3696 case ISD::ROTL:
3697 case ISD::ROTR:
3698 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
3699 unsigned RotAmt = C->getAPIntValue().urem(VTBits);
3700
3701 // Handle rotate right by N like a rotate left by 32-N.
3702 if (Opcode == ISD::ROTR)
3703 RotAmt = (VTBits - RotAmt) % VTBits;
3704
3705 // If we aren't rotating out all of the known-in sign bits, return the
3706 // number that are left. This handles rotl(sext(x), 1) for example.
3707 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
3708 if (Tmp > (RotAmt + 1)) return (Tmp - RotAmt);
3709 }
3710 break;
3711 case ISD::ADD:
3712 case ISD::ADDC:
3713 // Add can have at most one carry bit. Thus we know that the output
3714 // is, at worst, one more bit than the inputs.
3715 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
3716 if (Tmp == 1) return 1; // Early out.
8
Assuming 'Tmp' is not equal to 1
9
Taking false branch
3717
3718 // Special case decrementing a value (ADD X, -1):
3719 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
10
Assuming 'CRHS' is null
11
Taking false branch
3720 if (CRHS->isAllOnesValue()) {
3721 KnownBits Known = computeKnownBits(Op.getOperand(0), Depth+1);
3722
3723 // If the input is known to be 0 or 1, the output is 0/-1, which is all
3724 // sign bits set.
3725 if ((Known.Zero | 1).isAllOnesValue())
3726 return VTBits;
3727
3728 // If we are subtracting one from a positive number, there is no carry
3729 // out of the result.
3730 if (Known.isNonNegative())
3731 return Tmp;
3732 }
3733
3734 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
12
Value assigned to 'Op.Node'
13
Calling 'SelectionDAG::ComputeNumSignBits'
3735 if (Tmp2 == 1) return 1;
3736 return std::min(Tmp, Tmp2)-1;
3737
3738 case ISD::SUB:
3739 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
3740 if (Tmp2 == 1) return 1;
3741
3742 // Handle NEG.
3743 if (ConstantSDNode *CLHS = isConstOrConstSplat(Op.getOperand(0)))
3744 if (CLHS->isNullValue()) {
3745 KnownBits Known = computeKnownBits(Op.getOperand(1), Depth+1);
3746 // If the input is known to be 0 or 1, the output is 0/-1, which is all
3747 // sign bits set.
3748 if ((Known.Zero | 1).isAllOnesValue())
3749 return VTBits;
3750
3751 // If the input is known to be positive (the sign bit is known clear),
3752 // the output of the NEG has the same number of sign bits as the input.
3753 if (Known.isNonNegative())
3754 return Tmp2;
3755
3756 // Otherwise, we treat this like a SUB.
3757 }
3758
3759 // Sub can have at most one carry bit. Thus we know that the output
3760 // is, at worst, one more bit than the inputs.
3761 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
3762 if (Tmp == 1) return 1; // Early out.
3763 return std::min(Tmp, Tmp2)-1;
3764 case ISD::MUL: {
3765 // The output of the Mul can be at most twice the valid bits in the inputs.
3766 unsigned SignBitsOp0 = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
3767 if (SignBitsOp0 == 1)
3768 break;
3769 unsigned SignBitsOp1 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
3770 if (SignBitsOp1 == 1)
3771 break;
3772 unsigned OutValidBits =
3773 (VTBits - SignBitsOp0 + 1) + (VTBits - SignBitsOp1 + 1);
3774 return OutValidBits > VTBits ? 1 : VTBits - OutValidBits + 1;
3775 }
3776 case ISD::TRUNCATE: {
3777 // Check if the sign bits of source go down as far as the truncated value.
3778 unsigned NumSrcBits = Op.getOperand(0).getScalarValueSizeInBits();
3779 unsigned NumSrcSignBits = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
3780 if (NumSrcSignBits > (NumSrcBits - VTBits))
3781 return NumSrcSignBits - (NumSrcBits - VTBits);
3782 break;
3783 }
3784 case ISD::EXTRACT_ELEMENT: {
3785 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
3786 const int BitWidth = Op.getValueSizeInBits();
3787 const int Items = Op.getOperand(0).getValueSizeInBits() / BitWidth;
3788
3789 // Get reverse index (starting from 1), Op1 value indexes elements from
3790 // little end. Sign starts at big end.
3791 const int rIndex = Items - 1 - Op.getConstantOperandVal(1);
3792
3793 // If the sign portion ends in our element the subtraction gives correct
3794 // result. Otherwise it gives either negative or > bitwidth result
3795 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
3796 }
3797 case ISD::INSERT_VECTOR_ELT: {
3798 SDValue InVec = Op.getOperand(0);
3799 SDValue InVal = Op.getOperand(1);
3800 SDValue EltNo = Op.getOperand(2);
3801
3802 ConstantSDNode *CEltNo = dyn_cast<ConstantSDNode>(EltNo);
3803 if (CEltNo && CEltNo->getAPIntValue().ult(NumElts)) {
3804 // If we know the element index, split the demand between the
3805 // source vector and the inserted element.
3806 unsigned EltIdx = CEltNo->getZExtValue();
3807
3808 // If we demand the inserted element then get its sign bits.
3809 Tmp = std::numeric_limits<unsigned>::max();
3810 if (DemandedElts[EltIdx]) {
3811 // TODO - handle implicit truncation of inserted elements.
3812 if (InVal.getScalarValueSizeInBits() != VTBits)
3813 break;
3814 Tmp = ComputeNumSignBits(InVal, Depth + 1);
3815 }
3816
3817 // If we demand the source vector then get its sign bits, and determine
3818 // the minimum.
3819 APInt VectorElts = DemandedElts;
3820 VectorElts.clearBit(EltIdx);
3821 if (!!VectorElts) {
3822 Tmp2 = ComputeNumSignBits(InVec, VectorElts, Depth + 1);
3823 Tmp = std::min(Tmp, Tmp2);
3824 }
3825 } else {
3826 // Unknown element index, so ignore DemandedElts and demand them all.
3827 Tmp = ComputeNumSignBits(InVec, Depth + 1);
3828 Tmp2 = ComputeNumSignBits(InVal, Depth + 1);
3829 Tmp = std::min(Tmp, Tmp2);
3830 }
3831 assert(Tmp <= VTBits && "Failed to determine minimum sign bits")((Tmp <= VTBits && "Failed to determine minimum sign bits"
) ? static_cast<void> (0) : __assert_fail ("Tmp <= VTBits && \"Failed to determine minimum sign bits\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3831, __PRETTY_FUNCTION__))
;
3832 return Tmp;
3833 }
3834 case ISD::EXTRACT_VECTOR_ELT: {
3835 SDValue InVec = Op.getOperand(0);
3836 SDValue EltNo = Op.getOperand(1);
3837 EVT VecVT = InVec.getValueType();
3838 const unsigned BitWidth = Op.getValueSizeInBits();
3839 const unsigned EltBitWidth = Op.getOperand(0).getScalarValueSizeInBits();
3840 const unsigned NumSrcElts = VecVT.getVectorNumElements();
3841
3842 // If BitWidth > EltBitWidth the value is anyext:ed, and we do not know
3843 // anything about sign bits. But if the sizes match we can derive knowledge
3844 // about sign bits from the vector operand.
3845 if (BitWidth != EltBitWidth)
3846 break;
3847
3848 // If we know the element index, just demand that vector element, else for
3849 // an unknown element index, ignore DemandedElts and demand them all.
3850 APInt DemandedSrcElts = APInt::getAllOnesValue(NumSrcElts);
3851 ConstantSDNode *ConstEltNo = dyn_cast<ConstantSDNode>(EltNo);
3852 if (ConstEltNo && ConstEltNo->getAPIntValue().ult(NumSrcElts))
3853 DemandedSrcElts =
3854 APInt::getOneBitSet(NumSrcElts, ConstEltNo->getZExtValue());
3855
3856 return ComputeNumSignBits(InVec, DemandedSrcElts, Depth + 1);
3857 }
3858 case ISD::EXTRACT_SUBVECTOR: {
3859 // If we know the element index, just demand that subvector elements,
3860 // otherwise demand them all.
3861 SDValue Src = Op.getOperand(0);
3862 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
3863 unsigned NumSrcElts = Src.getValueType().getVectorNumElements();
3864 APInt DemandedSrc = APInt::getAllOnesValue(NumSrcElts);
3865 if (SubIdx && SubIdx->getAPIntValue().ule(NumSrcElts - NumElts)) {
3866 // Offset the demanded elts by the subvector index.
3867 uint64_t Idx = SubIdx->getZExtValue();
3868 DemandedSrc = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx);
3869 }
3870 return ComputeNumSignBits(Src, DemandedSrc, Depth + 1);
3871 }
3872 case ISD::CONCAT_VECTORS: {
3873 // Determine the minimum number of sign bits across all demanded
3874 // elts of the input vectors. Early out if the result is already 1.
3875 Tmp = std::numeric_limits<unsigned>::max();
3876 EVT SubVectorVT = Op.getOperand(0).getValueType();
3877 unsigned NumSubVectorElts = SubVectorVT.getVectorNumElements();
3878 unsigned NumSubVectors = Op.getNumOperands();
3879 for (unsigned i = 0; (i < NumSubVectors) && (Tmp > 1); ++i) {
3880 APInt DemandedSub = DemandedElts.lshr(i * NumSubVectorElts);
3881 DemandedSub = DemandedSub.trunc(NumSubVectorElts);
3882 if (!DemandedSub)
3883 continue;
3884 Tmp2 = ComputeNumSignBits(Op.getOperand(i), DemandedSub, Depth + 1);
3885 Tmp = std::min(Tmp, Tmp2);
3886 }
3887 assert(Tmp <= VTBits && "Failed to determine minimum sign bits")((Tmp <= VTBits && "Failed to determine minimum sign bits"
) ? static_cast<void> (0) : __assert_fail ("Tmp <= VTBits && \"Failed to determine minimum sign bits\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3887, __PRETTY_FUNCTION__))
;
3888 return Tmp;
3889 }
3890 case ISD::INSERT_SUBVECTOR: {
3891 // If we know the element index, demand any elements from the subvector and
3892 // the remainder from the src its inserted into, otherwise demand them all.
3893 SDValue Src = Op.getOperand(0);
3894 SDValue Sub = Op.getOperand(1);
3895 auto *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
3896 unsigned NumSubElts = Sub.getValueType().getVectorNumElements();
3897 if (SubIdx && SubIdx->getAPIntValue().ule(NumElts - NumSubElts)) {
3898 Tmp = std::numeric_limits<unsigned>::max();
3899 uint64_t Idx = SubIdx->getZExtValue();
3900 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx);
3901 if (!!DemandedSubElts) {
3902 Tmp = ComputeNumSignBits(Sub, DemandedSubElts, Depth + 1);
3903 if (Tmp == 1) return 1; // early-out
3904 }
3905 APInt SubMask = APInt::getBitsSet(NumElts, Idx, Idx + NumSubElts);
3906 APInt DemandedSrcElts = DemandedElts & ~SubMask;
3907 if (!!DemandedSrcElts) {
3908 Tmp2 = ComputeNumSignBits(Src, DemandedSrcElts, Depth + 1);
3909 Tmp = std::min(Tmp, Tmp2);
3910 }
3911 assert(Tmp <= VTBits && "Failed to determine minimum sign bits")((Tmp <= VTBits && "Failed to determine minimum sign bits"
) ? static_cast<void> (0) : __assert_fail ("Tmp <= VTBits && \"Failed to determine minimum sign bits\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3911, __PRETTY_FUNCTION__))
;
3912 return Tmp;
3913 }
3914
3915 // Not able to determine the index so just assume worst case.
3916 Tmp = ComputeNumSignBits(Sub, Depth + 1);
3917 if (Tmp == 1) return 1; // early-out
3918 Tmp2 = ComputeNumSignBits(Src, Depth + 1);
3919 Tmp = std::min(Tmp, Tmp2);
3920 assert(Tmp <= VTBits && "Failed to determine minimum sign bits")((Tmp <= VTBits && "Failed to determine minimum sign bits"
) ? static_cast<void> (0) : __assert_fail ("Tmp <= VTBits && \"Failed to determine minimum sign bits\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 3920, __PRETTY_FUNCTION__))
;
3921 return Tmp;
3922 }
3923 }
3924
3925 // If we are looking at the loaded value of the SDNode.
3926 if (Op.getResNo() == 0) {
3927 // Handle LOADX separately here. EXTLOAD case will fallthrough.
3928 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
3929 unsigned ExtType = LD->getExtensionType();
3930 switch (ExtType) {
3931 default: break;
3932 case ISD::SEXTLOAD: // e.g. i16->i32 = '17' bits known.
3933 Tmp = LD->getMemoryVT().getScalarSizeInBits();
3934 return VTBits - Tmp + 1;
3935 case ISD::ZEXTLOAD: // e.g. i16->i32 = '16' bits known.
3936 Tmp = LD->getMemoryVT().getScalarSizeInBits();
3937 return VTBits - Tmp;
3938 case ISD::NON_EXTLOAD:
3939 if (const Constant *Cst = TLI->getTargetConstantFromLoad(LD)) {
3940 // We only need to handle vectors - computeKnownBits should handle
3941 // scalar cases.
3942 Type *CstTy = Cst->getType();
3943 if (CstTy->isVectorTy() &&
3944 (NumElts * VTBits) == CstTy->getPrimitiveSizeInBits()) {
3945 Tmp = VTBits;
3946 for (unsigned i = 0; i != NumElts; ++i) {
3947 if (!DemandedElts[i])
3948 continue;
3949 if (Constant *Elt = Cst->getAggregateElement(i)) {
3950 if (auto *CInt = dyn_cast<ConstantInt>(Elt)) {
3951 const APInt &Value = CInt->getValue();
3952 Tmp = std::min(Tmp, Value.getNumSignBits());
3953 continue;
3954 }
3955 if (auto *CFP = dyn_cast<ConstantFP>(Elt)) {
3956 APInt Value = CFP->getValueAPF().bitcastToAPInt();
3957 Tmp = std::min(Tmp, Value.getNumSignBits());
3958 continue;
3959 }
3960 }
3961 // Unknown type. Conservatively assume no bits match sign bit.
3962 return 1;
3963 }
3964 return Tmp;
3965 }
3966 }
3967 break;
3968 }
3969 }
3970 }
3971
3972 // Allow the target to implement this method for its nodes.
3973 if (Opcode >= ISD::BUILTIN_OP_END ||
3974 Opcode == ISD::INTRINSIC_WO_CHAIN ||
3975 Opcode == ISD::INTRINSIC_W_CHAIN ||
3976 Opcode == ISD::INTRINSIC_VOID) {
3977 unsigned NumBits =
3978 TLI->ComputeNumSignBitsForTargetNode(Op, DemandedElts, *this, Depth);
3979 if (NumBits > 1)
3980 FirstAnswer = std::max(FirstAnswer, NumBits);
3981 }
3982
3983 // Finally, if we can prove that the top bits of the result are 0's or 1's,
3984 // use this information.
3985 KnownBits Known = computeKnownBits(Op, DemandedElts, Depth);
3986
3987 APInt Mask;
3988 if (Known.isNonNegative()) { // sign bit is 0
3989 Mask = Known.Zero;
3990 } else if (Known.isNegative()) { // sign bit is 1;
3991 Mask = Known.One;
3992 } else {
3993 // Nothing known.
3994 return FirstAnswer;
3995 }
3996
3997 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
3998 // the number of identical bits in the top of the input value.
3999 Mask = ~Mask;
4000 Mask <<= Mask.getBitWidth()-VTBits;
4001 // Return # leading zeros. We use 'min' here in case Val was zero before
4002 // shifting. We don't want to return '64' as for an i32 "0".
4003 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
4004}
4005
4006bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
4007 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
4008 !isa<ConstantSDNode>(Op.getOperand(1)))
4009 return false;
4010
4011 if (Op.getOpcode() == ISD::OR &&
4012 !MaskedValueIsZero(Op.getOperand(0), Op.getConstantOperandAPInt(1)))
4013 return false;
4014
4015 return true;
4016}
4017
4018bool SelectionDAG::isKnownNeverNaN(SDValue Op, bool SNaN, unsigned Depth) const {
4019 // If we're told that NaNs won't happen, assume they won't.
4020 if (getTarget().Options.NoNaNsFPMath || Op->getFlags().hasNoNaNs())
4021 return true;
4022
4023 if (Depth >= MaxRecursionDepth)
4024 return false; // Limit search depth.
4025
4026 // TODO: Handle vectors.
4027 // If the value is a constant, we can obviously see if it is a NaN or not.
4028 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) {
4029 return !C->getValueAPF().isNaN() ||
4030 (SNaN && !C->getValueAPF().isSignaling());
4031 }
4032
4033 unsigned Opcode = Op.getOpcode();
4034 switch (Opcode) {
4035 case ISD::FADD:
4036 case ISD::FSUB:
4037 case ISD::FMUL:
4038 case ISD::FDIV:
4039 case ISD::FREM:
4040 case ISD::FSIN:
4041 case ISD::FCOS: {
4042 if (SNaN)
4043 return true;
4044 // TODO: Need isKnownNeverInfinity
4045 return false;
4046 }
4047 case ISD::FCANONICALIZE:
4048 case ISD::FEXP:
4049 case ISD::FEXP2:
4050 case ISD::FTRUNC:
4051 case ISD::FFLOOR:
4052 case ISD::FCEIL:
4053 case ISD::FROUND:
4054 case ISD::FRINT:
4055 case ISD::FNEARBYINT: {
4056 if (SNaN)
4057 return true;
4058 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
4059 }
4060 case ISD::FABS:
4061 case ISD::FNEG:
4062 case ISD::FCOPYSIGN: {
4063 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
4064 }
4065 case ISD::SELECT:
4066 return isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
4067 isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
4068 case ISD::FP_EXTEND:
4069 case ISD::FP_ROUND: {
4070 if (SNaN)
4071 return true;
4072 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
4073 }
4074 case ISD::SINT_TO_FP:
4075 case ISD::UINT_TO_FP:
4076 return true;
4077 case ISD::FMA:
4078 case ISD::FMAD: {
4079 if (SNaN)
4080 return true;
4081 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) &&
4082 isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
4083 isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
4084 }
4085 case ISD::FSQRT: // Need is known positive
4086 case ISD::FLOG:
4087 case ISD::FLOG2:
4088 case ISD::FLOG10:
4089 case ISD::FPOWI:
4090 case ISD::FPOW: {
4091 if (SNaN)
4092 return true;
4093 // TODO: Refine on operand
4094 return false;
4095 }
4096 case ISD::FMINNUM:
4097 case ISD::FMAXNUM: {
4098 // Only one needs to be known not-nan, since it will be returned if the
4099 // other ends up being one.
4100 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) ||
4101 isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1);
4102 }
4103 case ISD::FMINNUM_IEEE:
4104 case ISD::FMAXNUM_IEEE: {
4105 if (SNaN)
4106 return true;
4107 // This can return a NaN if either operand is an sNaN, or if both operands
4108 // are NaN.
4109 return (isKnownNeverNaN(Op.getOperand(0), false, Depth + 1) &&
4110 isKnownNeverSNaN(Op.getOperand(1), Depth + 1)) ||
4111 (isKnownNeverNaN(Op.getOperand(1), false, Depth + 1) &&
4112 isKnownNeverSNaN(Op.getOperand(0), Depth + 1));
4113 }
4114 case ISD::FMINIMUM:
4115 case ISD::FMAXIMUM: {
4116 // TODO: Does this quiet or return the origina NaN as-is?
4117 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) &&
4118 isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1);
4119 }
4120 case ISD::EXTRACT_VECTOR_ELT: {
4121 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
4122 }
4123 default:
4124 if (Opcode >= ISD::BUILTIN_OP_END ||
4125 Opcode == ISD::INTRINSIC_WO_CHAIN ||
4126 Opcode == ISD::INTRINSIC_W_CHAIN ||
4127 Opcode == ISD::INTRINSIC_VOID) {
4128 return TLI->isKnownNeverNaNForTargetNode(Op, *this, SNaN, Depth);
4129 }
4130
4131 return false;
4132 }
4133}
4134
4135bool SelectionDAG::isKnownNeverZeroFloat(SDValue Op) const {
4136 assert(Op.getValueType().isFloatingPoint() &&((Op.getValueType().isFloatingPoint() && "Floating point type expected"
) ? static_cast<void> (0) : __assert_fail ("Op.getValueType().isFloatingPoint() && \"Floating point type expected\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4137, __PRETTY_FUNCTION__))
4137 "Floating point type expected")((Op.getValueType().isFloatingPoint() && "Floating point type expected"
) ? static_cast<void> (0) : __assert_fail ("Op.getValueType().isFloatingPoint() && \"Floating point type expected\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4137, __PRETTY_FUNCTION__))
;
4138
4139 // If the value is a constant, we can obviously see if it is a zero or not.
4140 // TODO: Add BuildVector support.
4141 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
4142 return !C->isZero();
4143 return false;
4144}
4145
4146bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
4147 assert(!Op.getValueType().isFloatingPoint() &&((!Op.getValueType().isFloatingPoint() && "Floating point types unsupported - use isKnownNeverZeroFloat"
) ? static_cast<void> (0) : __assert_fail ("!Op.getValueType().isFloatingPoint() && \"Floating point types unsupported - use isKnownNeverZeroFloat\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4148, __PRETTY_FUNCTION__))
4148 "Floating point types unsupported - use isKnownNeverZeroFloat")((!Op.getValueType().isFloatingPoint() && "Floating point types unsupported - use isKnownNeverZeroFloat"
) ? static_cast<void> (0) : __assert_fail ("!Op.getValueType().isFloatingPoint() && \"Floating point types unsupported - use isKnownNeverZeroFloat\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4148, __PRETTY_FUNCTION__))
;
4149
4150 // If the value is a constant, we can obviously see if it is a zero or not.
4151 if (ISD::matchUnaryPredicate(
4152 Op, [](ConstantSDNode *C) { return !C->isNullValue(); }))
4153 return true;
4154
4155 // TODO: Recognize more cases here.
4156 switch (Op.getOpcode()) {
4157 default: break;
4158 case ISD::OR:
4159 if (isKnownNeverZero(Op.getOperand(1)) ||
4160 isKnownNeverZero(Op.getOperand(0)))
4161 return true;
4162 break;
4163 }
4164
4165 return false;
4166}
4167
4168bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
4169 // Check the obvious case.
4170 if (A == B) return true;
4171
4172 // For for negative and positive zero.
4173 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
4174 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
4175 if (CA->isZero() && CB->isZero()) return true;
4176
4177 // Otherwise they may not be equal.
4178 return false;
4179}
4180
4181// FIXME: unify with llvm::haveNoCommonBitsSet.
4182// FIXME: could also handle masked merge pattern (X & ~M) op (Y & M)
4183bool SelectionDAG::haveNoCommonBitsSet(SDValue A, SDValue B) const {
4184 assert(A.getValueType() == B.getValueType() &&((A.getValueType() == B.getValueType() && "Values must have the same type"
) ? static_cast<void> (0) : __assert_fail ("A.getValueType() == B.getValueType() && \"Values must have the same type\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4185, __PRETTY_FUNCTION__))
4185 "Values must have the same type")((A.getValueType() == B.getValueType() && "Values must have the same type"
) ? static_cast<void> (0) : __assert_fail ("A.getValueType() == B.getValueType() && \"Values must have the same type\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4185, __PRETTY_FUNCTION__))
;
4186 return (computeKnownBits(A).Zero | computeKnownBits(B).Zero).isAllOnesValue();
4187}
4188
4189static SDValue FoldBUILD_VECTOR(const SDLoc &DL, EVT VT,
4190 ArrayRef<SDValue> Ops,
4191 SelectionDAG &DAG) {
4192 int NumOps = Ops.size();
4193 assert(NumOps != 0 && "Can't build an empty vector!")((NumOps != 0 && "Can't build an empty vector!") ? static_cast
<void> (0) : __assert_fail ("NumOps != 0 && \"Can't build an empty vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4193, __PRETTY_FUNCTION__))
;
4194 assert(VT.getVectorNumElements() == (unsigned)NumOps &&((VT.getVectorNumElements() == (unsigned)NumOps && "Incorrect element count in BUILD_VECTOR!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == (unsigned)NumOps && \"Incorrect element count in BUILD_VECTOR!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4195, __PRETTY_FUNCTION__))
4195 "Incorrect element count in BUILD_VECTOR!")((VT.getVectorNumElements() == (unsigned)NumOps && "Incorrect element count in BUILD_VECTOR!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == (unsigned)NumOps && \"Incorrect element count in BUILD_VECTOR!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4195, __PRETTY_FUNCTION__))
;
4196
4197 // BUILD_VECTOR of UNDEFs is UNDEF.
4198 if (llvm::all_of(Ops, [](SDValue Op) { return Op.isUndef(); }))
4199 return DAG.getUNDEF(VT);
4200
4201 // BUILD_VECTOR of seq extract/insert from the same vector + type is Identity.
4202 SDValue IdentitySrc;
4203 bool IsIdentity = true;
4204 for (int i = 0; i != NumOps; ++i) {
4205 if (Ops[i].getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
4206 Ops[i].getOperand(0).getValueType() != VT ||
4207 (IdentitySrc && Ops[i].getOperand(0) != IdentitySrc) ||
4208 !isa<ConstantSDNode>(Ops[i].getOperand(1)) ||
4209 cast<ConstantSDNode>(Ops[i].getOperand(1))->getAPIntValue() != i) {
4210 IsIdentity = false;
4211 break;
4212 }
4213 IdentitySrc = Ops[i].getOperand(0);
4214 }
4215 if (IsIdentity)
4216 return IdentitySrc;
4217
4218 return SDValue();
4219}
4220
4221/// Try to simplify vector concatenation to an input value, undef, or build
4222/// vector.
4223static SDValue foldCONCAT_VECTORS(const SDLoc &DL, EVT VT,
4224 ArrayRef<SDValue> Ops,
4225 SelectionDAG &DAG) {
4226 assert(!Ops.empty() && "Can't concatenate an empty list of vectors!")((!Ops.empty() && "Can't concatenate an empty list of vectors!"
) ? static_cast<void> (0) : __assert_fail ("!Ops.empty() && \"Can't concatenate an empty list of vectors!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4226, __PRETTY_FUNCTION__))
;
4227 assert(llvm::all_of(Ops,((llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType
() == Op.getValueType(); }) && "Concatenation of vectors with inconsistent value types!"
) ? static_cast<void> (0) : __assert_fail ("llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType() == Op.getValueType(); }) && \"Concatenation of vectors with inconsistent value types!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4231, __PRETTY_FUNCTION__))
4228 [Ops](SDValue Op) {((llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType
() == Op.getValueType(); }) && "Concatenation of vectors with inconsistent value types!"
) ? static_cast<void> (0) : __assert_fail ("llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType() == Op.getValueType(); }) && \"Concatenation of vectors with inconsistent value types!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4231, __PRETTY_FUNCTION__))
4229 return Ops[0].getValueType() == Op.getValueType();((llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType
() == Op.getValueType(); }) && "Concatenation of vectors with inconsistent value types!"
) ? static_cast<void> (0) : __assert_fail ("llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType() == Op.getValueType(); }) && \"Concatenation of vectors with inconsistent value types!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4231, __PRETTY_FUNCTION__))
4230 }) &&((llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType
() == Op.getValueType(); }) && "Concatenation of vectors with inconsistent value types!"
) ? static_cast<void> (0) : __assert_fail ("llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType() == Op.getValueType(); }) && \"Concatenation of vectors with inconsistent value types!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4231, __PRETTY_FUNCTION__))
4231 "Concatenation of vectors with inconsistent value types!")((llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType
() == Op.getValueType(); }) && "Concatenation of vectors with inconsistent value types!"
) ? static_cast<void> (0) : __assert_fail ("llvm::all_of(Ops, [Ops](SDValue Op) { return Ops[0].getValueType() == Op.getValueType(); }) && \"Concatenation of vectors with inconsistent value types!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4231, __PRETTY_FUNCTION__))
;
4232 assert((Ops.size() * Ops[0].getValueType().getVectorNumElements()) ==(((Ops.size() * Ops[0].getValueType().getVectorNumElements())
== VT.getVectorNumElements() && "Incorrect element count in vector concatenation!"
) ? static_cast<void> (0) : __assert_fail ("(Ops.size() * Ops[0].getValueType().getVectorNumElements()) == VT.getVectorNumElements() && \"Incorrect element count in vector concatenation!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4234, __PRETTY_FUNCTION__))
4233 VT.getVectorNumElements() &&(((Ops.size() * Ops[0].getValueType().getVectorNumElements())
== VT.getVectorNumElements() && "Incorrect element count in vector concatenation!"
) ? static_cast<void> (0) : __assert_fail ("(Ops.size() * Ops[0].getValueType().getVectorNumElements()) == VT.getVectorNumElements() && \"Incorrect element count in vector concatenation!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4234, __PRETTY_FUNCTION__))
4234 "Incorrect element count in vector concatenation!")(((Ops.size() * Ops[0].getValueType().getVectorNumElements())
== VT.getVectorNumElements() && "Incorrect element count in vector concatenation!"
) ? static_cast<void> (0) : __assert_fail ("(Ops.size() * Ops[0].getValueType().getVectorNumElements()) == VT.getVectorNumElements() && \"Incorrect element count in vector concatenation!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4234, __PRETTY_FUNCTION__))
;
4235
4236 if (Ops.size() == 1)
4237 return Ops[0];
4238
4239 // Concat of UNDEFs is UNDEF.
4240 if (llvm::all_of(Ops, [](SDValue Op) { return Op.isUndef(); }))
4241 return DAG.getUNDEF(VT);
4242
4243 // Scan the operands and look for extract operations from a single source
4244 // that correspond to insertion at the same location via this concatenation:
4245 // concat (extract X, 0*subvec_elts), (extract X, 1*subvec_elts), ...
4246 SDValue IdentitySrc;
4247 bool IsIdentity = true;
4248 for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
4249 SDValue Op = Ops[i];
4250 unsigned IdentityIndex = i * Op.getValueType().getVectorNumElements();
4251 if (Op.getOpcode() != ISD::EXTRACT_SUBVECTOR ||
4252 Op.getOperand(0).getValueType() != VT ||
4253 (IdentitySrc && Op.getOperand(0) != IdentitySrc) ||
4254 !isa<ConstantSDNode>(Op.getOperand(1)) ||
4255 Op.getConstantOperandVal(1) != IdentityIndex) {
4256 IsIdentity = false;
4257 break;
4258 }
4259 assert((!IdentitySrc || IdentitySrc == Op.getOperand(0)) &&(((!IdentitySrc || IdentitySrc == Op.getOperand(0)) &&
"Unexpected identity source vector for concat of extracts") ?
static_cast<void> (0) : __assert_fail ("(!IdentitySrc || IdentitySrc == Op.getOperand(0)) && \"Unexpected identity source vector for concat of extracts\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4260, __PRETTY_FUNCTION__))
4260 "Unexpected identity source vector for concat of extracts")(((!IdentitySrc || IdentitySrc == Op.getOperand(0)) &&
"Unexpected identity source vector for concat of extracts") ?
static_cast<void> (0) : __assert_fail ("(!IdentitySrc || IdentitySrc == Op.getOperand(0)) && \"Unexpected identity source vector for concat of extracts\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4260, __PRETTY_FUNCTION__))
;
4261 IdentitySrc = Op.getOperand(0);
4262 }
4263 if (IsIdentity) {
4264 assert(IdentitySrc && "Failed to set source vector of extracts")((IdentitySrc && "Failed to set source vector of extracts"
) ? static_cast<void> (0) : __assert_fail ("IdentitySrc && \"Failed to set source vector of extracts\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4264, __PRETTY_FUNCTION__))
;
4265 return IdentitySrc;
4266 }
4267
4268 // A CONCAT_VECTOR with all UNDEF/BUILD_VECTOR operands can be
4269 // simplified to one big BUILD_VECTOR.
4270 // FIXME: Add support for SCALAR_TO_VECTOR as well.
4271 EVT SVT = VT.getScalarType();
4272 SmallVector<SDValue, 16> Elts;
4273 for (SDValue Op : Ops) {
4274 EVT OpVT = Op.getValueType();
4275 if (Op.isUndef())
4276 Elts.append(OpVT.getVectorNumElements(), DAG.getUNDEF(SVT));
4277 else if (Op.getOpcode() == ISD::BUILD_VECTOR)
4278 Elts.append(Op->op_begin(), Op->op_end());
4279 else
4280 return SDValue();
4281 }
4282
4283 // BUILD_VECTOR requires all inputs to be of the same type, find the
4284 // maximum type and extend them all.
4285 for (SDValue Op : Elts)
4286 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
4287
4288 if (SVT.bitsGT(VT.getScalarType()))
4289 for (SDValue &Op : Elts)
4290 Op = DAG.getTargetLoweringInfo().isZExtFree(Op.getValueType(), SVT)
4291 ? DAG.getZExtOrTrunc(Op, DL, SVT)
4292 : DAG.getSExtOrTrunc(Op, DL, SVT);
4293
4294 SDValue V = DAG.getBuildVector(VT, DL, Elts);
4295 NewSDValueDbgMsg(V, "New node fold concat vectors: ", &DAG);
4296 return V;
4297}
4298
4299/// Gets or creates the specified node.
4300SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT) {
4301 FoldingSetNodeID ID;
4302 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
4303 void *IP = nullptr;
4304 if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
4305 return SDValue(E, 0);
4306
4307 auto *N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4308 getVTList(VT));
4309 CSEMap.InsertNode(N, IP);
4310
4311 InsertNode(N);
4312 SDValue V = SDValue(N, 0);
4313 NewSDValueDbgMsg(V, "Creating new node: ", this);
4314 return V;
4315}
4316
4317SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
4318 SDValue Operand, const SDNodeFlags Flags) {
4319 // Constant fold unary operations with an integer constant operand. Even
4320 // opaque constant will be folded, because the folding of unary operations
4321 // doesn't create new constants with different values. Nevertheless, the
4322 // opaque flag is preserved during folding to prevent future folding with
4323 // other constants.
4324 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand)) {
4325 const APInt &Val = C->getAPIntValue();
4326 switch (Opcode) {
4327 default: break;
4328 case ISD::SIGN_EXTEND:
4329 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), DL, VT,
4330 C->isTargetOpcode(), C->isOpaque());
4331 case ISD::TRUNCATE:
4332 if (C->isOpaque())
4333 break;
4334 LLVM_FALLTHROUGH[[gnu::fallthrough]];
4335 case ISD::ANY_EXTEND:
4336 case ISD::ZERO_EXTEND:
4337 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), DL, VT,
4338 C->isTargetOpcode(), C->isOpaque());
4339 case ISD::UINT_TO_FP:
4340 case ISD::SINT_TO_FP: {
4341 APFloat apf(EVTToAPFloatSemantics(VT),
4342 APInt::getNullValue(VT.getSizeInBits()));
4343 (void)apf.convertFromAPInt(Val,
4344 Opcode==ISD::SINT_TO_FP,
4345 APFloat::rmNearestTiesToEven);
4346 return getConstantFP(apf, DL, VT);
4347 }
4348 case ISD::BITCAST:
4349 if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
4350 return getConstantFP(APFloat(APFloat::IEEEhalf(), Val), DL, VT);
4351 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
4352 return getConstantFP(APFloat(APFloat::IEEEsingle(), Val), DL, VT);
4353 if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
4354 return getConstantFP(APFloat(APFloat::IEEEdouble(), Val), DL, VT);
4355 if (VT == MVT::f128 && C->getValueType(0) == MVT::i128)
4356 return getConstantFP(APFloat(APFloat::IEEEquad(), Val), DL, VT);
4357 break;
4358 case ISD::ABS:
4359 return getConstant(Val.abs(), DL, VT, C->isTargetOpcode(),
4360 C->isOpaque());
4361 case ISD::BITREVERSE:
4362 return getConstant(Val.reverseBits(), DL, VT, C->isTargetOpcode(),
4363 C->isOpaque());
4364 case ISD::BSWAP:
4365 return getConstant(Val.byteSwap(), DL, VT, C->isTargetOpcode(),
4366 C->isOpaque());
4367 case ISD::CTPOP:
4368 return getConstant(Val.countPopulation(), DL, VT, C->isTargetOpcode(),
4369 C->isOpaque());
4370 case ISD::CTLZ:
4371 case ISD::CTLZ_ZERO_UNDEF:
4372 return getConstant(Val.countLeadingZeros(), DL, VT, C->isTargetOpcode(),
4373 C->isOpaque());
4374 case ISD::CTTZ:
4375 case ISD::CTTZ_ZERO_UNDEF:
4376 return getConstant(Val.countTrailingZeros(), DL, VT, C->isTargetOpcode(),
4377 C->isOpaque());
4378 case ISD::FP16_TO_FP: {
4379 bool Ignored;
4380 APFloat FPV(APFloat::IEEEhalf(),
4381 (Val.getBitWidth() == 16) ? Val : Val.trunc(16));
4382
4383 // This can return overflow, underflow, or inexact; we don't care.
4384 // FIXME need to be more flexible about rounding mode.
4385 (void)FPV.convert(EVTToAPFloatSemantics(VT),
4386 APFloat::rmNearestTiesToEven, &Ignored);
4387 return getConstantFP(FPV, DL, VT);
4388 }
4389 }
4390 }
4391
4392 // Constant fold unary operations with a floating point constant operand.
4393 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand)) {
4394 APFloat V = C->getValueAPF(); // make copy
4395 switch (Opcode) {
4396 case ISD::FNEG:
4397 V.changeSign();
4398 return getConstantFP(V, DL, VT);
4399 case ISD::FABS:
4400 V.clearSign();
4401 return getConstantFP(V, DL, VT);
4402 case ISD::FCEIL: {
4403 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
4404 if (fs == APFloat::opOK || fs == APFloat::opInexact)
4405 return getConstantFP(V, DL, VT);
4406 break;
4407 }
4408 case ISD::FTRUNC: {
4409 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
4410 if (fs == APFloat::opOK || fs == APFloat::opInexact)
4411 return getConstantFP(V, DL, VT);
4412 break;
4413 }
4414 case ISD::FFLOOR: {
4415 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
4416 if (fs == APFloat::opOK || fs == APFloat::opInexact)
4417 return getConstantFP(V, DL, VT);
4418 break;
4419 }
4420 case ISD::FP_EXTEND: {
4421 bool ignored;
4422 // This can return overflow, underflow, or inexact; we don't care.
4423 // FIXME need to be more flexible about rounding mode.
4424 (void)V.convert(EVTToAPFloatSemantics(VT),
4425 APFloat::rmNearestTiesToEven, &ignored);
4426 return getConstantFP(V, DL, VT);
4427 }
4428 case ISD::FP_TO_SINT:
4429 case ISD::FP_TO_UINT: {
4430 bool ignored;
4431 APSInt IntVal(VT.getSizeInBits(), Opcode == ISD::FP_TO_UINT);
4432 // FIXME need to be more flexible about rounding mode.
4433 APFloat::opStatus s =
4434 V.convertToInteger(IntVal, APFloat::rmTowardZero, &ignored);
4435 if (s == APFloat::opInvalidOp) // inexact is OK, in fact usual
4436 break;
4437 return getConstant(IntVal, DL, VT);
4438 }
4439 case ISD::BITCAST:
4440 if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
4441 return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
4442 else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
4443 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
4444 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
4445 return getConstant(V.bitcastToAPInt().getZExtValue(), DL, VT);
4446 break;
4447 case ISD::FP_TO_FP16: {
4448 bool Ignored;
4449 // This can return overflow, underflow, or inexact; we don't care.
4450 // FIXME need to be more flexible about rounding mode.
4451 (void)V.convert(APFloat::IEEEhalf(),
4452 APFloat::rmNearestTiesToEven, &Ignored);
4453 return getConstant(V.bitcastToAPInt(), DL, VT);
4454 }
4455 }
4456 }
4457
4458 // Constant fold unary operations with a vector integer or float operand.
4459 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand)) {
4460 if (BV->isConstant()) {
4461 switch (Opcode) {
4462 default:
4463 // FIXME: Entirely reasonable to perform folding of other unary
4464 // operations here as the need arises.
4465 break;
4466 case ISD::FNEG:
4467 case ISD::FABS:
4468 case ISD::FCEIL:
4469 case ISD::FTRUNC:
4470 case ISD::FFLOOR:
4471 case ISD::FP_EXTEND:
4472 case ISD::FP_TO_SINT:
4473 case ISD::FP_TO_UINT:
4474 case ISD::TRUNCATE:
4475 case ISD::ANY_EXTEND:
4476 case ISD::ZERO_EXTEND:
4477 case ISD::SIGN_EXTEND:
4478 case ISD::UINT_TO_FP:
4479 case ISD::SINT_TO_FP:
4480 case ISD::ABS:
4481 case ISD::BITREVERSE:
4482 case ISD::BSWAP:
4483 case ISD::CTLZ:
4484 case ISD::CTLZ_ZERO_UNDEF:
4485 case ISD::CTTZ:
4486 case ISD::CTTZ_ZERO_UNDEF:
4487 case ISD::CTPOP: {
4488 SDValue Ops = { Operand };
4489 if (SDValue Fold = FoldConstantVectorArithmetic(Opcode, DL, VT, Ops))
4490 return Fold;
4491 }
4492 }
4493 }
4494 }
4495
4496 unsigned OpOpcode = Operand.getNode()->getOpcode();
4497 switch (Opcode) {
4498 case ISD::TokenFactor:
4499 case ISD::MERGE_VALUES:
4500 case ISD::CONCAT_VECTORS:
4501 return Operand; // Factor, merge or concat of one node? No need.
4502 case ISD::BUILD_VECTOR: {
4503 // Attempt to simplify BUILD_VECTOR.
4504 SDValue Ops[] = {Operand};
4505 if (SDValue V = FoldBUILD_VECTOR(DL, VT, Ops, *this))
4506 return V;
4507 break;
4508 }
4509 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node")::llvm::llvm_unreachable_internal("Invalid method to make FP_ROUND node"
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4509)
;
4510 case ISD::FP_EXTEND:
4511 assert(VT.isFloatingPoint() &&((VT.isFloatingPoint() && Operand.getValueType().isFloatingPoint
() && "Invalid FP cast!") ? static_cast<void> (
0) : __assert_fail ("VT.isFloatingPoint() && Operand.getValueType().isFloatingPoint() && \"Invalid FP cast!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4512, __PRETTY_FUNCTION__))
4512 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!")((VT.isFloatingPoint() && Operand.getValueType().isFloatingPoint
() && "Invalid FP cast!") ? static_cast<void> (
0) : __assert_fail ("VT.isFloatingPoint() && Operand.getValueType().isFloatingPoint() && \"Invalid FP cast!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4512, __PRETTY_FUNCTION__))
;
4513 if (Operand.getValueType() == VT) return Operand; // noop conversion.
4514 assert((!VT.isVector() ||(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4517, __PRETTY_FUNCTION__))
4515 VT.getVectorNumElements() ==(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4517, __PRETTY_FUNCTION__))
4516 Operand.getValueType().getVectorNumElements()) &&(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4517, __PRETTY_FUNCTION__))
4517 "Vector element count mismatch!")(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4517, __PRETTY_FUNCTION__))
;
4518 assert(Operand.getValueType().bitsLT(VT) &&((Operand.getValueType().bitsLT(VT) && "Invalid fpext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid fpext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4519, __PRETTY_FUNCTION__))
4519 "Invalid fpext node, dst < src!")((Operand.getValueType().bitsLT(VT) && "Invalid fpext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid fpext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4519, __PRETTY_FUNCTION__))
;
4520 if (Operand.isUndef())
4521 return getUNDEF(VT);
4522 break;
4523 case ISD::FP_TO_SINT:
4524 case ISD::FP_TO_UINT:
4525 if (Operand.isUndef())
4526 return getUNDEF(VT);
4527 break;
4528 case ISD::SINT_TO_FP:
4529 case ISD::UINT_TO_FP:
4530 // [us]itofp(undef) = 0, because the result value is bounded.
4531 if (Operand.isUndef())
4532 return getConstantFP(0.0, DL, VT);
4533 break;
4534 case ISD::SIGN_EXTEND:
4535 assert(VT.isInteger() && Operand.getValueType().isInteger() &&((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid SIGN_EXTEND!") ? static_cast<void>
(0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid SIGN_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4536, __PRETTY_FUNCTION__))
4536 "Invalid SIGN_EXTEND!")((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid SIGN_EXTEND!") ? static_cast<void>
(0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid SIGN_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4536, __PRETTY_FUNCTION__))
;
4537 assert(VT.isVector() == Operand.getValueType().isVector() &&((VT.isVector() == Operand.getValueType().isVector() &&
"SIGN_EXTEND result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"SIGN_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4539, __PRETTY_FUNCTION__))
4538 "SIGN_EXTEND result type type should be vector iff the operand "((VT.isVector() == Operand.getValueType().isVector() &&
"SIGN_EXTEND result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"SIGN_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4539, __PRETTY_FUNCTION__))
4539 "type is vector!")((VT.isVector() == Operand.getValueType().isVector() &&
"SIGN_EXTEND result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"SIGN_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4539, __PRETTY_FUNCTION__))
;
4540 if (Operand.getValueType() == VT) return Operand; // noop extension
4541 assert((!VT.isVector() ||(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4544, __PRETTY_FUNCTION__))
4542 VT.getVectorNumElements() ==(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4544, __PRETTY_FUNCTION__))
4543 Operand.getValueType().getVectorNumElements()) &&(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4544, __PRETTY_FUNCTION__))
4544 "Vector element count mismatch!")(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4544, __PRETTY_FUNCTION__))
;
4545 assert(Operand.getValueType().bitsLT(VT) &&((Operand.getValueType().bitsLT(VT) && "Invalid sext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid sext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4546, __PRETTY_FUNCTION__))
4546 "Invalid sext node, dst < src!")((Operand.getValueType().bitsLT(VT) && "Invalid sext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid sext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4546, __PRETTY_FUNCTION__))
;
4547 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
4548 return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
4549 else if (OpOpcode == ISD::UNDEF)
4550 // sext(undef) = 0, because the top bits will all be the same.
4551 return getConstant(0, DL, VT);
4552 break;
4553 case ISD::ZERO_EXTEND:
4554 assert(VT.isInteger() && Operand.getValueType().isInteger() &&((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid ZERO_EXTEND!") ? static_cast<void>
(0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid ZERO_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4555, __PRETTY_FUNCTION__))
4555 "Invalid ZERO_EXTEND!")((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid ZERO_EXTEND!") ? static_cast<void>
(0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid ZERO_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4555, __PRETTY_FUNCTION__))
;
4556 assert(VT.isVector() == Operand.getValueType().isVector() &&((VT.isVector() == Operand.getValueType().isVector() &&
"ZERO_EXTEND result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"ZERO_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4558, __PRETTY_FUNCTION__))
4557 "ZERO_EXTEND result type type should be vector iff the operand "((VT.isVector() == Operand.getValueType().isVector() &&
"ZERO_EXTEND result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"ZERO_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4558, __PRETTY_FUNCTION__))
4558 "type is vector!")((VT.isVector() == Operand.getValueType().isVector() &&
"ZERO_EXTEND result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"ZERO_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4558, __PRETTY_FUNCTION__))
;
4559 if (Operand.getValueType() == VT) return Operand; // noop extension
4560 assert((!VT.isVector() ||(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4563, __PRETTY_FUNCTION__))
4561 VT.getVectorNumElements() ==(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4563, __PRETTY_FUNCTION__))
4562 Operand.getValueType().getVectorNumElements()) &&(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4563, __PRETTY_FUNCTION__))
4563 "Vector element count mismatch!")(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4563, __PRETTY_FUNCTION__))
;
4564 assert(Operand.getValueType().bitsLT(VT) &&((Operand.getValueType().bitsLT(VT) && "Invalid zext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid zext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4565, __PRETTY_FUNCTION__))
4565 "Invalid zext node, dst < src!")((Operand.getValueType().bitsLT(VT) && "Invalid zext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid zext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4565, __PRETTY_FUNCTION__))
;
4566 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
4567 return getNode(ISD::ZERO_EXTEND, DL, VT, Operand.getOperand(0));
4568 else if (OpOpcode == ISD::UNDEF)
4569 // zext(undef) = 0, because the top bits will be zero.
4570 return getConstant(0, DL, VT);
4571 break;
4572 case ISD::ANY_EXTEND:
4573 assert(VT.isInteger() && Operand.getValueType().isInteger() &&((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid ANY_EXTEND!") ? static_cast<void>
(0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid ANY_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4574, __PRETTY_FUNCTION__))
4574 "Invalid ANY_EXTEND!")((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid ANY_EXTEND!") ? static_cast<void>
(0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid ANY_EXTEND!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4574, __PRETTY_FUNCTION__))
;
4575 assert(VT.isVector() == Operand.getValueType().isVector() &&((VT.isVector() == Operand.getValueType().isVector() &&
"ANY_EXTEND result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"ANY_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4577, __PRETTY_FUNCTION__))
4576 "ANY_EXTEND result type type should be vector iff the operand "((VT.isVector() == Operand.getValueType().isVector() &&
"ANY_EXTEND result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"ANY_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4577, __PRETTY_FUNCTION__))
4577 "type is vector!")((VT.isVector() == Operand.getValueType().isVector() &&
"ANY_EXTEND result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"ANY_EXTEND result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4577, __PRETTY_FUNCTION__))
;
4578 if (Operand.getValueType() == VT) return Operand; // noop extension
4579 assert((!VT.isVector() ||(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4582, __PRETTY_FUNCTION__))
4580 VT.getVectorNumElements() ==(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4582, __PRETTY_FUNCTION__))
4581 Operand.getValueType().getVectorNumElements()) &&(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4582, __PRETTY_FUNCTION__))
4582 "Vector element count mismatch!")(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4582, __PRETTY_FUNCTION__))
;
4583 assert(Operand.getValueType().bitsLT(VT) &&((Operand.getValueType().bitsLT(VT) && "Invalid anyext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid anyext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4584, __PRETTY_FUNCTION__))
4584 "Invalid anyext node, dst < src!")((Operand.getValueType().bitsLT(VT) && "Invalid anyext node, dst < src!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLT(VT) && \"Invalid anyext node, dst < src!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4584, __PRETTY_FUNCTION__))
;
4585
4586 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
4587 OpOpcode == ISD::ANY_EXTEND)
4588 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
4589 return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
4590 else if (OpOpcode == ISD::UNDEF)
4591 return getUNDEF(VT);
4592
4593 // (ext (trunc x)) -> x
4594 if (OpOpcode == ISD::TRUNCATE) {
4595 SDValue OpOp = Operand.getOperand(0);
4596 if (OpOp.getValueType() == VT) {
4597 transferDbgValues(Operand, OpOp);
4598 return OpOp;
4599 }
4600 }
4601 break;
4602 case ISD::TRUNCATE:
4603 assert(VT.isInteger() && Operand.getValueType().isInteger() &&((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid TRUNCATE!") ? static_cast<void> (
0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid TRUNCATE!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4604, __PRETTY_FUNCTION__))
4604 "Invalid TRUNCATE!")((VT.isInteger() && Operand.getValueType().isInteger(
) && "Invalid TRUNCATE!") ? static_cast<void> (
0) : __assert_fail ("VT.isInteger() && Operand.getValueType().isInteger() && \"Invalid TRUNCATE!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4604, __PRETTY_FUNCTION__))
;
4605 assert(VT.isVector() == Operand.getValueType().isVector() &&((VT.isVector() == Operand.getValueType().isVector() &&
"TRUNCATE result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"TRUNCATE result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4607, __PRETTY_FUNCTION__))
4606 "TRUNCATE result type type should be vector iff the operand "((VT.isVector() == Operand.getValueType().isVector() &&
"TRUNCATE result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"TRUNCATE result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4607, __PRETTY_FUNCTION__))
4607 "type is vector!")((VT.isVector() == Operand.getValueType().isVector() &&
"TRUNCATE result type type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("VT.isVector() == Operand.getValueType().isVector() && \"TRUNCATE result type type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4607, __PRETTY_FUNCTION__))
;
4608 if (Operand.getValueType() == VT) return Operand; // noop truncate
4609 assert((!VT.isVector() ||(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4612, __PRETTY_FUNCTION__))
4610 VT.getVectorNumElements() ==(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4612, __PRETTY_FUNCTION__))
4611 Operand.getValueType().getVectorNumElements()) &&(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4612, __PRETTY_FUNCTION__))
4612 "Vector element count mismatch!")(((!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType
().getVectorNumElements()) && "Vector element count mismatch!"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT.getVectorNumElements() == Operand.getValueType().getVectorNumElements()) && \"Vector element count mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4612, __PRETTY_FUNCTION__))
;
4613 assert(Operand.getValueType().bitsGT(VT) &&((Operand.getValueType().bitsGT(VT) && "Invalid truncate node, src < dst!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsGT(VT) && \"Invalid truncate node, src < dst!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4614, __PRETTY_FUNCTION__))
4614 "Invalid truncate node, src < dst!")((Operand.getValueType().bitsGT(VT) && "Invalid truncate node, src < dst!"
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsGT(VT) && \"Invalid truncate node, src < dst!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4614, __PRETTY_FUNCTION__))
;
4615 if (OpOpcode == ISD::TRUNCATE)
4616 return getNode(ISD::TRUNCATE, DL, VT, Operand.getOperand(0));
4617 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
4618 OpOpcode == ISD::ANY_EXTEND) {
4619 // If the source is smaller than the dest, we still need an extend.
4620 if (Operand.getOperand(0).getValueType().getScalarType()
4621 .bitsLT(VT.getScalarType()))
4622 return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
4623 if (Operand.getOperand(0).getValueType().bitsGT(VT))
4624 return getNode(ISD::TRUNCATE, DL, VT, Operand.getOperand(0));
4625 return Operand.getOperand(0);
4626 }
4627 if (OpOpcode == ISD::UNDEF)
4628 return getUNDEF(VT);
4629 break;
4630 case ISD::ANY_EXTEND_VECTOR_INREG:
4631 case ISD::ZERO_EXTEND_VECTOR_INREG:
4632 case ISD::SIGN_EXTEND_VECTOR_INREG:
4633 assert(VT.isVector() && "This DAG node is restricted to vector types.")((VT.isVector() && "This DAG node is restricted to vector types."
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && \"This DAG node is restricted to vector types.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4633, __PRETTY_FUNCTION__))
;
4634 assert(Operand.getValueType().bitsLE(VT) &&((Operand.getValueType().bitsLE(VT) && "The input must be the same size or smaller than the result."
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLE(VT) && \"The input must be the same size or smaller than the result.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4635, __PRETTY_FUNCTION__))
4635 "The input must be the same size or smaller than the result.")((Operand.getValueType().bitsLE(VT) && "The input must be the same size or smaller than the result."
) ? static_cast<void> (0) : __assert_fail ("Operand.getValueType().bitsLE(VT) && \"The input must be the same size or smaller than the result.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4635, __PRETTY_FUNCTION__))
;
4636 assert(VT.getVectorNumElements() <((VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements
() && "The destination vector type must have fewer lanes than the input."
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements() && \"The destination vector type must have fewer lanes than the input.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4638, __PRETTY_FUNCTION__))
4637 Operand.getValueType().getVectorNumElements() &&((VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements
() && "The destination vector type must have fewer lanes than the input."
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements() && \"The destination vector type must have fewer lanes than the input.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4638, __PRETTY_FUNCTION__))
4638 "The destination vector type must have fewer lanes than the input.")((VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements
() && "The destination vector type must have fewer lanes than the input."
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() < Operand.getValueType().getVectorNumElements() && \"The destination vector type must have fewer lanes than the input.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4638, __PRETTY_FUNCTION__))
;
4639 break;
4640 case ISD::ABS:
4641 assert(VT.isInteger() && VT == Operand.getValueType() &&((VT.isInteger() && VT == Operand.getValueType() &&
"Invalid ABS!") ? static_cast<void> (0) : __assert_fail
("VT.isInteger() && VT == Operand.getValueType() && \"Invalid ABS!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4642, __PRETTY_FUNCTION__))
4642 "Invalid ABS!")((VT.isInteger() && VT == Operand.getValueType() &&
"Invalid ABS!") ? static_cast<void> (0) : __assert_fail
("VT.isInteger() && VT == Operand.getValueType() && \"Invalid ABS!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4642, __PRETTY_FUNCTION__))
;
4643 if (OpOpcode == ISD::UNDEF)
4644 return getUNDEF(VT);
4645 break;
4646 case ISD::BSWAP:
4647 assert(VT.isInteger() && VT == Operand.getValueType() &&((VT.isInteger() && VT == Operand.getValueType() &&
"Invalid BSWAP!") ? static_cast<void> (0) : __assert_fail
("VT.isInteger() && VT == Operand.getValueType() && \"Invalid BSWAP!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4648, __PRETTY_FUNCTION__))
4648 "Invalid BSWAP!")((VT.isInteger() && VT == Operand.getValueType() &&
"Invalid BSWAP!") ? static_cast<void> (0) : __assert_fail
("VT.isInteger() && VT == Operand.getValueType() && \"Invalid BSWAP!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4648, __PRETTY_FUNCTION__))
;
4649 assert((VT.getScalarSizeInBits() % 16 == 0) &&(((VT.getScalarSizeInBits() % 16 == 0) && "BSWAP types must be a multiple of 16 bits!"
) ? static_cast<void> (0) : __assert_fail ("(VT.getScalarSizeInBits() % 16 == 0) && \"BSWAP types must be a multiple of 16 bits!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4650, __PRETTY_FUNCTION__))
4650 "BSWAP types must be a multiple of 16 bits!")(((VT.getScalarSizeInBits() % 16 == 0) && "BSWAP types must be a multiple of 16 bits!"
) ? static_cast<void> (0) : __assert_fail ("(VT.getScalarSizeInBits() % 16 == 0) && \"BSWAP types must be a multiple of 16 bits!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4650, __PRETTY_FUNCTION__))
;
4651 if (OpOpcode == ISD::UNDEF)
4652 return getUNDEF(VT);
4653 break;
4654 case ISD::BITREVERSE:
4655 assert(VT.isInteger() && VT == Operand.getValueType() &&((VT.isInteger() && VT == Operand.getValueType() &&
"Invalid BITREVERSE!") ? static_cast<void> (0) : __assert_fail
("VT.isInteger() && VT == Operand.getValueType() && \"Invalid BITREVERSE!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4656, __PRETTY_FUNCTION__))
4656 "Invalid BITREVERSE!")((VT.isInteger() && VT == Operand.getValueType() &&
"Invalid BITREVERSE!") ? static_cast<void> (0) : __assert_fail
("VT.isInteger() && VT == Operand.getValueType() && \"Invalid BITREVERSE!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4656, __PRETTY_FUNCTION__))
;
4657 if (OpOpcode == ISD::UNDEF)
4658 return getUNDEF(VT);
4659 break;
4660 case ISD::BITCAST:
4661 // Basic sanity checking.
4662 assert(VT.getSizeInBits() == Operand.getValueSizeInBits() &&((VT.getSizeInBits() == Operand.getValueSizeInBits() &&
"Cannot BITCAST between types of different sizes!") ? static_cast
<void> (0) : __assert_fail ("VT.getSizeInBits() == Operand.getValueSizeInBits() && \"Cannot BITCAST between types of different sizes!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4663, __PRETTY_FUNCTION__))
4663 "Cannot BITCAST between types of different sizes!")((VT.getSizeInBits() == Operand.getValueSizeInBits() &&
"Cannot BITCAST between types of different sizes!") ? static_cast
<void> (0) : __assert_fail ("VT.getSizeInBits() == Operand.getValueSizeInBits() && \"Cannot BITCAST between types of different sizes!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4663, __PRETTY_FUNCTION__))
;
4664 if (VT == Operand.getValueType()) return Operand; // noop conversion.
4665 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
4666 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
4667 if (OpOpcode == ISD::UNDEF)
4668 return getUNDEF(VT);
4669 break;
4670 case ISD::SCALAR_TO_VECTOR:
4671 assert(VT.isVector() && !Operand.getValueType().isVector() &&((VT.isVector() && !Operand.getValueType().isVector()
&& (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4676, __PRETTY_FUNCTION__))
4672 (VT.getVectorElementType() == Operand.getValueType() ||((VT.isVector() && !Operand.getValueType().isVector()
&& (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4676, __PRETTY_FUNCTION__))
4673 (VT.getVectorElementType().isInteger() &&((VT.isVector() && !Operand.getValueType().isVector()
&& (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4676, __PRETTY_FUNCTION__))
4674 Operand.getValueType().isInteger() &&((VT.isVector() && !Operand.getValueType().isVector()
&& (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4676, __PRETTY_FUNCTION__))
4675 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&((VT.isVector() && !Operand.getValueType().isVector()
&& (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4676, __PRETTY_FUNCTION__))
4676 "Illegal SCALAR_TO_VECTOR node!")((VT.isVector() && !Operand.getValueType().isVector()
&& (VT.getVectorElementType() == Operand.getValueType
() || (VT.getVectorElementType().isInteger() && Operand
.getValueType().isInteger() && VT.getVectorElementType
().bitsLE(Operand.getValueType()))) && "Illegal SCALAR_TO_VECTOR node!"
) ? static_cast<void> (0) : __assert_fail ("VT.isVector() && !Operand.getValueType().isVector() && (VT.getVectorElementType() == Operand.getValueType() || (VT.getVectorElementType().isInteger() && Operand.getValueType().isInteger() && VT.getVectorElementType().bitsLE(Operand.getValueType()))) && \"Illegal SCALAR_TO_VECTOR node!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4676, __PRETTY_FUNCTION__))
;
4677 if (OpOpcode == ISD::UNDEF)
4678 return getUNDEF(VT);
4679 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
4680 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
4681 isa<ConstantSDNode>(Operand.getOperand(1)) &&
4682 Operand.getConstantOperandVal(1) == 0 &&
4683 Operand.getOperand(0).getValueType() == VT)
4684 return Operand.getOperand(0);
4685 break;
4686 case ISD::FNEG:
4687 // Negation of an unknown bag of bits is still completely undefined.
4688 if (OpOpcode == ISD::UNDEF)
4689 return getUNDEF(VT);
4690
4691 if (OpOpcode == ISD::FNEG) // --X -> X
4692 return Operand.getOperand(0);
4693 break;
4694 case ISD::FABS:
4695 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
4696 return getNode(ISD::FABS, DL, VT, Operand.getOperand(0));
4697 break;
4698 }
4699
4700 SDNode *N;
4701 SDVTList VTs = getVTList(VT);
4702 SDValue Ops[] = {Operand};
4703 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
4704 FoldingSetNodeID ID;
4705 AddNodeIDNode(ID, Opcode, VTs, Ops);
4706 void *IP = nullptr;
4707 if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
4708 E->intersectFlagsWith(Flags);
4709 return SDValue(E, 0);
4710 }
4711
4712 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
4713 N->setFlags(Flags);
4714 createOperands(N, Ops);
4715 CSEMap.InsertNode(N, IP);
4716 } else {
4717 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
4718 createOperands(N, Ops);
4719 }
4720
4721 InsertNode(N);
4722 SDValue V = SDValue(N, 0);
4723 NewSDValueDbgMsg(V, "Creating new node: ", this);
4724 return V;
4725}
4726
4727static llvm::Optional<APInt> FoldValue(unsigned Opcode, const APInt &C1,
4728 const APInt &C2) {
4729 switch (Opcode) {
4730 case ISD::ADD: return C1 + C2;
4731 case ISD::SUB: return C1 - C2;
4732 case ISD::MUL: return C1 * C2;
4733 case ISD::AND: return C1 & C2;
4734 case ISD::OR: return C1 | C2;
4735 case ISD::XOR: return C1 ^ C2;
4736 case ISD::SHL: return C1 << C2;
4737 case ISD::SRL: return C1.lshr(C2);
4738 case ISD::SRA: return C1.ashr(C2);
4739 case ISD::ROTL: return C1.rotl(C2);
4740 case ISD::ROTR: return C1.rotr(C2);
4741 case ISD::SMIN: return C1.sle(C2) ? C1 : C2;
4742 case ISD::SMAX: return C1.sge(C2) ? C1 : C2;
4743 case ISD::UMIN: return C1.ule(C2) ? C1 : C2;
4744 case ISD::UMAX: return C1.uge(C2) ? C1 : C2;
4745 case ISD::SADDSAT: return C1.sadd_sat(C2);
4746 case ISD::UADDSAT: return C1.uadd_sat(C2);
4747 case ISD::SSUBSAT: return C1.ssub_sat(C2);
4748 case ISD::USUBSAT: return C1.usub_sat(C2);
4749 case ISD::UDIV:
4750 if (!C2.getBoolValue())
4751 break;
4752 return C1.udiv(C2);
4753 case ISD::UREM:
4754 if (!C2.getBoolValue())
4755 break;
4756 return C1.urem(C2);
4757 case ISD::SDIV:
4758 if (!C2.getBoolValue())
4759 break;
4760 return C1.sdiv(C2);
4761 case ISD::SREM:
4762 if (!C2.getBoolValue())
4763 break;
4764 return C1.srem(C2);
4765 }
4766 return llvm::None;
4767}
4768
4769SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL,
4770 EVT VT, const ConstantSDNode *C1,
4771 const ConstantSDNode *C2) {
4772 if (C1->isOpaque() || C2->isOpaque())
4773 return SDValue();
4774 if (Optional<APInt> Folded =
4775 FoldValue(Opcode, C1->getAPIntValue(), C2->getAPIntValue()))
4776 return getConstant(Folded.getValue(), DL, VT);
4777 return SDValue();
4778}
4779
4780SDValue SelectionDAG::FoldSymbolOffset(unsigned Opcode, EVT VT,
4781 const GlobalAddressSDNode *GA,
4782 const SDNode *N2) {
4783 if (GA->getOpcode() != ISD::GlobalAddress)
4784 return SDValue();
4785 if (!TLI->isOffsetFoldingLegal(GA))
4786 return SDValue();
4787 auto *C2 = dyn_cast<ConstantSDNode>(N2);
4788 if (!C2)
4789 return SDValue();
4790 int64_t Offset = C2->getSExtValue();
4791 switch (Opcode) {
4792 case ISD::ADD: break;
4793 case ISD::SUB: Offset = -uint64_t(Offset); break;
4794 default: return SDValue();
4795 }
4796 return getGlobalAddress(GA->getGlobal(), SDLoc(C2), VT,
4797 GA->getOffset() + uint64_t(Offset));
4798}
4799
4800bool SelectionDAG::isUndef(unsigned Opcode, ArrayRef<SDValue> Ops) {
4801 switch (Opcode) {
4802 case ISD::SDIV:
4803 case ISD::UDIV:
4804 case ISD::SREM:
4805 case ISD::UREM: {
4806 // If a divisor is zero/undef or any element of a divisor vector is
4807 // zero/undef, the whole op is undef.
4808 assert(Ops.size() == 2 && "Div/rem should have 2 operands")((Ops.size() == 2 && "Div/rem should have 2 operands"
) ? static_cast<void> (0) : __assert_fail ("Ops.size() == 2 && \"Div/rem should have 2 operands\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4808, __PRETTY_FUNCTION__))
;
4809 SDValue Divisor = Ops[1];
4810 if (Divisor.isUndef() || isNullConstant(Divisor))
4811 return true;
4812
4813 return ISD::isBuildVectorOfConstantSDNodes(Divisor.getNode()) &&
4814 llvm::any_of(Divisor->op_values(),
4815 [](SDValue V) { return V.isUndef() ||
4816 isNullConstant(V); });
4817 // TODO: Handle signed overflow.
4818 }
4819 // TODO: Handle oversized shifts.
4820 default:
4821 return false;
4822 }
4823}
4824
4825SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL,
4826 EVT VT, SDNode *N1, SDNode *N2) {
4827 // If the opcode is a target-specific ISD node, there's nothing we can
4828 // do here and the operand rules may not line up with the below, so
4829 // bail early.
4830 if (Opcode >= ISD::BUILTIN_OP_END)
4831 return SDValue();
4832
4833 if (isUndef(Opcode, {SDValue(N1, 0), SDValue(N2, 0)}))
4834 return getUNDEF(VT);
4835
4836 // Handle the case of two scalars.
4837 if (auto *C1 = dyn_cast<ConstantSDNode>(N1)) {
4838 if (auto *C2 = dyn_cast<ConstantSDNode>(N2)) {
4839 SDValue Folded = FoldConstantArithmetic(Opcode, DL, VT, C1, C2);
4840 assert((!Folded || !VT.isVector()) &&(((!Folded || !VT.isVector()) && "Can't fold vectors ops with scalar operands"
) ? static_cast<void> (0) : __assert_fail ("(!Folded || !VT.isVector()) && \"Can't fold vectors ops with scalar operands\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4841, __PRETTY_FUNCTION__))
4841 "Can't fold vectors ops with scalar operands")(((!Folded || !VT.isVector()) && "Can't fold vectors ops with scalar operands"
) ? static_cast<void> (0) : __assert_fail ("(!Folded || !VT.isVector()) && \"Can't fold vectors ops with scalar operands\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4841, __PRETTY_FUNCTION__))
;
4842 return Folded;
4843 }
4844 }
4845
4846 // fold (add Sym, c) -> Sym+c
4847 if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(N1))
4848 return FoldSymbolOffset(Opcode, VT, GA, N2);
4849 if (TLI->isCommutativeBinOp(Opcode))
4850 if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(N2))
4851 return FoldSymbolOffset(Opcode, VT, GA, N1);
4852
4853 // For vectors, extract each constant element and fold them individually.
4854 // Either input may be an undef value.
4855 auto *BV1 = dyn_cast<BuildVectorSDNode>(N1);
4856 if (!BV1 && !N1->isUndef())
4857 return SDValue();
4858 auto *BV2 = dyn_cast<BuildVectorSDNode>(N2);
4859 if (!BV2 && !N2->isUndef())
4860 return SDValue();
4861 // If both operands are undef, that's handled the same way as scalars.
4862 if (!BV1 && !BV2)
4863 return SDValue();
4864
4865 assert((!BV1 || !BV2 || BV1->getNumOperands() == BV2->getNumOperands()) &&(((!BV1 || !BV2 || BV1->getNumOperands() == BV2->getNumOperands
()) && "Vector binop with different number of elements in operands?"
) ? static_cast<void> (0) : __assert_fail ("(!BV1 || !BV2 || BV1->getNumOperands() == BV2->getNumOperands()) && \"Vector binop with different number of elements in operands?\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4866, __PRETTY_FUNCTION__))
4866 "Vector binop with different number of elements in operands?")(((!BV1 || !BV2 || BV1->getNumOperands() == BV2->getNumOperands
()) && "Vector binop with different number of elements in operands?"
) ? static_cast<void> (0) : __assert_fail ("(!BV1 || !BV2 || BV1->getNumOperands() == BV2->getNumOperands()) && \"Vector binop with different number of elements in operands?\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4866, __PRETTY_FUNCTION__))
;
4867
4868 EVT SVT = VT.getScalarType();
4869 EVT LegalSVT = SVT;
4870 if (NewNodesMustHaveLegalTypes && LegalSVT.isInteger()) {
4871 LegalSVT = TLI->getTypeToTransformTo(*getContext(), LegalSVT);
4872 if (LegalSVT.bitsLT(SVT))
4873 return SDValue();
4874 }
4875 SmallVector<SDValue, 4> Outputs;
4876 unsigned NumOps = BV1 ? BV1->getNumOperands() : BV2->getNumOperands();
4877 for (unsigned I = 0; I != NumOps; ++I) {
4878 SDValue V1 = BV1 ? BV1->getOperand(I) : getUNDEF(SVT);
4879 SDValue V2 = BV2 ? BV2->getOperand(I) : getUNDEF(SVT);
4880 if (SVT.isInteger()) {
4881 if (V1->getValueType(0).bitsGT(SVT))
4882 V1 = getNode(ISD::TRUNCATE, DL, SVT, V1);
4883 if (V2->getValueType(0).bitsGT(SVT))
4884 V2 = getNode(ISD::TRUNCATE, DL, SVT, V2);
4885 }
4886
4887 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
4888 return SDValue();
4889
4890 // Fold one vector element.
4891 SDValue ScalarResult = getNode(Opcode, DL, SVT, V1, V2);
4892 if (LegalSVT != SVT)
4893 ScalarResult = getNode(ISD::SIGN_EXTEND, DL, LegalSVT, ScalarResult);
4894
4895 // Scalar folding only succeeded if the result is a constant or UNDEF.
4896 if (!ScalarResult.isUndef() && ScalarResult.getOpcode() != ISD::Constant &&
4897 ScalarResult.getOpcode() != ISD::ConstantFP)
4898 return SDValue();
4899 Outputs.push_back(ScalarResult);
4900 }
4901
4902 assert(VT.getVectorNumElements() == Outputs.size() &&((VT.getVectorNumElements() == Outputs.size() && "Vector size mismatch!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == Outputs.size() && \"Vector size mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4903, __PRETTY_FUNCTION__))
4903 "Vector size mismatch!")((VT.getVectorNumElements() == Outputs.size() && "Vector size mismatch!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorNumElements() == Outputs.size() && \"Vector size mismatch!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 4903, __PRETTY_FUNCTION__))
;
4904
4905 // We may have a vector type but a scalar result. Create a splat.
4906 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
4907
4908 // Build a big vector out of the scalar elements we generated.
4909 return getBuildVector(VT, SDLoc(), Outputs);
4910}
4911
4912// TODO: Merge with FoldConstantArithmetic
4913SDValue SelectionDAG::FoldConstantVectorArithmetic(unsigned Opcode,
4914 const SDLoc &DL, EVT VT,
4915 ArrayRef<SDValue> Ops,
4916 const SDNodeFlags Flags) {
4917 // If the opcode is a target-specific ISD node, there's nothing we can
4918 // do here and the operand rules may not line up with the below, so
4919 // bail early.
4920 if (Opcode >= ISD::BUILTIN_OP_END)
4921 return SDValue();
4922
4923 if (isUndef(Opcode, Ops))
4924 return getUNDEF(VT);
4925
4926 // We can only fold vectors - maybe merge with FoldConstantArithmetic someday?
4927 if (!VT.isVector())
4928 return SDValue();
4929
4930 unsigned NumElts = VT.getVectorNumElements();
4931
4932 auto IsScalarOrSameVectorSize = [&](const SDValue &Op) {
4933 return !Op.getValueType().isVector() ||
4934 Op.getValueType().getVectorNumElements() == NumElts;
4935 };
4936
4937 auto IsConstantBuildVectorOrUndef = [&](const SDValue &Op) {
4938 BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Op);
4939 return (Op.isUndef()) || (Op.getOpcode() == ISD::CONDCODE) ||
4940 (BV && BV->isConstant());
4941 };
4942
4943 // All operands must be vector types with the same number of elements as
4944 // the result type and must be either UNDEF or a build vector of constant
4945 // or UNDEF scalars.
4946 if (!llvm::all_of(Ops, IsConstantBuildVectorOrUndef) ||
4947 !llvm::all_of(Ops, IsScalarOrSameVectorSize))
4948 return SDValue();
4949
4950 // If we are comparing vectors, then the result needs to be a i1 boolean
4951 // that is then sign-extended back to the legal result type.
4952 EVT SVT = (Opcode == ISD::SETCC ? MVT::i1 : VT.getScalarType());
4953
4954 // Find legal integer scalar type for constant promotion and
4955 // ensure that its scalar size is at least as large as source.
4956 EVT LegalSVT = VT.getScalarType();
4957 if (NewNodesMustHaveLegalTypes && LegalSVT.isInteger()) {
4958 LegalSVT = TLI->getTypeToTransformTo(*getContext(), LegalSVT);
4959 if (LegalSVT.bitsLT(VT.getScalarType()))
4960 return SDValue();
4961 }
4962
4963 // Constant fold each scalar lane separately.
4964 SmallVector<SDValue, 4> ScalarResults;
4965 for (unsigned i = 0; i != NumElts; i++) {
4966 SmallVector<SDValue, 4> ScalarOps;
4967 for (SDValue Op : Ops) {
4968 EVT InSVT = Op.getValueType().getScalarType();
4969 BuildVectorSDNode *InBV = dyn_cast<BuildVectorSDNode>(Op);
4970 if (!InBV) {
4971 // We've checked that this is UNDEF or a constant of some kind.
4972 if (Op.isUndef())
4973 ScalarOps.push_back(getUNDEF(InSVT));
4974 else
4975 ScalarOps.push_back(Op);
4976 continue;
4977 }
4978
4979 SDValue ScalarOp = InBV->getOperand(i);
4980 EVT ScalarVT = ScalarOp.getValueType();
4981
4982 // Build vector (integer) scalar operands may need implicit
4983 // truncation - do this before constant folding.
4984 if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT))
4985 ScalarOp = getNode(ISD::TRUNCATE, DL, InSVT, ScalarOp);
4986
4987 ScalarOps.push_back(ScalarOp);
4988 }
4989
4990 // Constant fold the scalar operands.
4991 SDValue ScalarResult = getNode(Opcode, DL, SVT, ScalarOps, Flags);
4992
4993 // Legalize the (integer) scalar constant if necessary.
4994 if (LegalSVT != SVT)
4995 ScalarResult = getNode(ISD::SIGN_EXTEND, DL, LegalSVT, ScalarResult);
4996
4997 // Scalar folding only succeeded if the result is a constant or UNDEF.
4998 if (!ScalarResult.isUndef() && ScalarResult.getOpcode() != ISD::Constant &&
4999 ScalarResult.getOpcode() != ISD::ConstantFP)
5000 return SDValue();
5001 ScalarResults.push_back(ScalarResult);
5002 }
5003
5004 SDValue V = getBuildVector(VT, DL, ScalarResults);
5005 NewSDValueDbgMsg(V, "New node fold constant vector: ", this);
5006 return V;
5007}
5008
5009SDValue SelectionDAG::foldConstantFPMath(unsigned Opcode, const SDLoc &DL,
5010 EVT VT, SDValue N1, SDValue N2) {
5011 // TODO: We don't do any constant folding for strict FP opcodes here, but we
5012 // should. That will require dealing with a potentially non-default
5013 // rounding mode, checking the "opStatus" return value from the APFloat
5014 // math calculations, and possibly other variations.
5015 auto *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
5016 auto *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
5017 if (N1CFP && N2CFP) {
5018 APFloat C1 = N1CFP->getValueAPF(), C2 = N2CFP->getValueAPF();
5019 switch (Opcode) {
5020 case ISD::FADD:
5021 C1.add(C2, APFloat::rmNearestTiesToEven);
5022 return getConstantFP(C1, DL, VT);
5023 case ISD::FSUB:
5024 C1.subtract(C2, APFloat::rmNearestTiesToEven);
5025 return getConstantFP(C1, DL, VT);
5026 case ISD::FMUL:
5027 C1.multiply(C2, APFloat::rmNearestTiesToEven);
5028 return getConstantFP(C1, DL, VT);
5029 case ISD::FDIV:
5030 C1.divide(C2, APFloat::rmNearestTiesToEven);
5031 return getConstantFP(C1, DL, VT);
5032 case ISD::FREM:
5033 C1.mod(C2);
5034 return getConstantFP(C1, DL, VT);
5035 case ISD::FCOPYSIGN:
5036 C1.copySign(C2);
5037 return getConstantFP(C1, DL, VT);
5038 default: break;
5039 }
5040 }
5041 if (N1CFP && Opcode == ISD::FP_ROUND) {
5042 APFloat C1 = N1CFP->getValueAPF(); // make copy
5043 bool Unused;
5044 // This can return overflow, underflow, or inexact; we don't care.
5045 // FIXME need to be more flexible about rounding mode.
5046 (void) C1.convert(EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
5047 &Unused);
5048 return getConstantFP(C1, DL, VT);
5049 }
5050
5051 switch (Opcode) {
5052 case ISD::FADD:
5053 case ISD::FSUB:
5054 case ISD::FMUL:
5055 case ISD::FDIV:
5056 case ISD::FREM:
5057 // If both operands are undef, the result is undef. If 1 operand is undef,
5058 // the result is NaN. This should match the behavior of the IR optimizer.
5059 if (N1.isUndef() && N2.isUndef())
5060 return getUNDEF(VT);
5061 if (N1.isUndef() || N2.isUndef())
5062 return getConstantFP(APFloat::getNaN(EVTToAPFloatSemantics(VT)), DL, VT);
5063 }
5064 return SDValue();
5065}
5066
5067SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
5068 SDValue N1, SDValue N2, const SDNodeFlags Flags) {
5069 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
5070 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
5071 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
5072 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
5073
5074 // Canonicalize constant to RHS if commutative.
5075 if (TLI->isCommutativeBinOp(Opcode)) {
5076 if (N1C && !N2C) {
5077 std::swap(N1C, N2C);
5078 std::swap(N1, N2);
5079 } else if (N1CFP && !N2CFP) {
5080 std::swap(N1CFP, N2CFP);
5081 std::swap(N1, N2);
5082 }
5083 }
5084
5085 switch (Opcode) {
5086 default: break;
5087 case ISD::TokenFactor:
5088 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&((VT == MVT::Other && N1.getValueType() == MVT::Other
&& N2.getValueType() == MVT::Other && "Invalid token factor!"
) ? static_cast<void> (0) : __assert_fail ("VT == MVT::Other && N1.getValueType() == MVT::Other && N2.getValueType() == MVT::Other && \"Invalid token factor!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5089, __PRETTY_FUNCTION__))
5089 N2.getValueType() == MVT::Other && "Invalid token factor!")((VT == MVT::Other && N1.getValueType() == MVT::Other
&& N2.getValueType() == MVT::Other && "Invalid token factor!"
) ? static_cast<void> (0) : __assert_fail ("VT == MVT::Other && N1.getValueType() == MVT::Other && N2.getValueType() == MVT::Other && \"Invalid token factor!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5089, __PRETTY_FUNCTION__))
;
5090 // Fold trivial token factors.
5091 if (N1.getOpcode() == ISD::EntryToken) return N2;
5092 if (N2.getOpcode() == ISD::EntryToken) return N1;
5093 if (N1 == N2) return N1;
5094 break;
5095 case ISD::BUILD_VECTOR: {
5096 // Attempt to simplify BUILD_VECTOR.
5097 SDValue Ops[] = {N1, N2};
5098 if (SDValue V = FoldBUILD_VECTOR(DL, VT, Ops, *this))
5099 return V;
5100 break;
5101 }
5102 case ISD::CONCAT_VECTORS: {
5103 SDValue Ops[] = {N1, N2};
5104 if (SDValue V = foldCONCAT_VECTORS(DL, VT, Ops, *this))
5105 return V;
5106 break;
5107 }
5108 case ISD::AND:
5109 assert(VT.isInteger() && "This operator does not apply to FP types!")((VT.isInteger() && "This operator does not apply to FP types!"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && \"This operator does not apply to FP types!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5109, __PRETTY_FUNCTION__))
;
5110 assert(N1.getValueType() == N2.getValueType() &&((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5111, __PRETTY_FUNCTION__))
5111 N1.getValueType() == VT && "Binary operator types must match!")((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5111, __PRETTY_FUNCTION__))
;
5112 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
5113 // worth handling here.
5114 if (N2C && N2C->isNullValue())
5115 return N2;
5116 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
5117 return N1;
5118 break;
5119 case ISD::OR:
5120 case ISD::XOR:
5121 case ISD::ADD:
5122 case ISD::SUB:
5123 assert(VT.isInteger() && "This operator does not apply to FP types!")((VT.isInteger() && "This operator does not apply to FP types!"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && \"This operator does not apply to FP types!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5123, __PRETTY_FUNCTION__))
;
5124 assert(N1.getValueType() == N2.getValueType() &&((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5125, __PRETTY_FUNCTION__))
5125 N1.getValueType() == VT && "Binary operator types must match!")((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5125, __PRETTY_FUNCTION__))
;
5126 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
5127 // it's worth handling here.
5128 if (N2C && N2C->isNullValue())
5129 return N1;
5130 break;
5131 case ISD::UDIV:
5132 case ISD::UREM:
5133 case ISD::MULHU:
5134 case ISD::MULHS:
5135 case ISD::MUL:
5136 case ISD::SDIV:
5137 case ISD::SREM:
5138 case ISD::SMIN:
5139 case ISD::SMAX:
5140 case ISD::UMIN:
5141 case ISD::UMAX:
5142 case ISD::SADDSAT:
5143 case ISD::SSUBSAT:
5144 case ISD::UADDSAT:
5145 case ISD::USUBSAT:
5146 assert(VT.isInteger() && "This operator does not apply to FP types!")((VT.isInteger() && "This operator does not apply to FP types!"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && \"This operator does not apply to FP types!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5146, __PRETTY_FUNCTION__))
;
5147 assert(N1.getValueType() == N2.getValueType() &&((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5148, __PRETTY_FUNCTION__))
5148 N1.getValueType() == VT && "Binary operator types must match!")((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5148, __PRETTY_FUNCTION__))
;
5149 break;
5150 case ISD::FADD:
5151 case ISD::FSUB:
5152 case ISD::FMUL:
5153 case ISD::FDIV:
5154 case ISD::FREM:
5155 assert(VT.isFloatingPoint() && "This operator only applies to FP types!")((VT.isFloatingPoint() && "This operator only applies to FP types!"
) ? static_cast<void> (0) : __assert_fail ("VT.isFloatingPoint() && \"This operator only applies to FP types!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5155, __PRETTY_FUNCTION__))
;
5156 assert(N1.getValueType() == N2.getValueType() &&((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5157, __PRETTY_FUNCTION__))
5157 N1.getValueType() == VT && "Binary operator types must match!")((N1.getValueType() == N2.getValueType() && N1.getValueType
() == VT && "Binary operator types must match!") ? static_cast
<void> (0) : __assert_fail ("N1.getValueType() == N2.getValueType() && N1.getValueType() == VT && \"Binary operator types must match!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5157, __PRETTY_FUNCTION__))
;
5158 if (SDValue V = simplifyFPBinop(Opcode, N1, N2))
5159 return V;
5160 break;
5161 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
5162 assert(N1.getValueType() == VT &&((N1.getValueType() == VT && N1.getValueType().isFloatingPoint
() && N2.getValueType().isFloatingPoint() && "Invalid FCOPYSIGN!"
) ? static_cast<void> (0) : __assert_fail ("N1.getValueType() == VT && N1.getValueType().isFloatingPoint() && N2.getValueType().isFloatingPoint() && \"Invalid FCOPYSIGN!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5165, __PRETTY_FUNCTION__))
5163 N1.getValueType().isFloatingPoint() &&((N1.getValueType() == VT && N1.getValueType().isFloatingPoint
() && N2.getValueType().isFloatingPoint() && "Invalid FCOPYSIGN!"
) ? static_cast<void> (0) : __assert_fail ("N1.getValueType() == VT && N1.getValueType().isFloatingPoint() && N2.getValueType().isFloatingPoint() && \"Invalid FCOPYSIGN!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5165, __PRETTY_FUNCTION__))
5164 N2.getValueType().isFloatingPoint() &&((N1.getValueType() == VT && N1.getValueType().isFloatingPoint
() && N2.getValueType().isFloatingPoint() && "Invalid FCOPYSIGN!"
) ? static_cast<void> (0) : __assert_fail ("N1.getValueType() == VT && N1.getValueType().isFloatingPoint() && N2.getValueType().isFloatingPoint() && \"Invalid FCOPYSIGN!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5165, __PRETTY_FUNCTION__))
5165 "Invalid FCOPYSIGN!")((N1.getValueType() == VT && N1.getValueType().isFloatingPoint
() && N2.getValueType().isFloatingPoint() && "Invalid FCOPYSIGN!"
) ? static_cast<void> (0) : __assert_fail ("N1.getValueType() == VT && N1.getValueType().isFloatingPoint() && N2.getValueType().isFloatingPoint() && \"Invalid FCOPYSIGN!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5165, __PRETTY_FUNCTION__))
;
5166 break;
5167 case ISD::SHL:
5168 case ISD::SRA:
5169 case ISD::SRL:
5170 if (SDValue V = simplifyShift(N1, N2))
5171 return V;
5172 LLVM_FALLTHROUGH[[gnu::fallthrough]];
5173 case ISD::ROTL:
5174 case ISD::ROTR:
5175 assert(VT == N1.getValueType() &&((VT == N1.getValueType() && "Shift operators return type must be the same as their first arg"
) ? static_cast<void> (0) : __assert_fail ("VT == N1.getValueType() && \"Shift operators return type must be the same as their first arg\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5176, __PRETTY_FUNCTION__))
5176 "Shift operators return type must be the same as their first arg")((VT == N1.getValueType() && "Shift operators return type must be the same as their first arg"
) ? static_cast<void> (0) : __assert_fail ("VT == N1.getValueType() && \"Shift operators return type must be the same as their first arg\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5176, __PRETTY_FUNCTION__))
;
5177 assert(VT.isInteger() && N2.getValueType().isInteger() &&((VT.isInteger() && N2.getValueType().isInteger() &&
"Shifts only work on integers") ? static_cast<void> (0
) : __assert_fail ("VT.isInteger() && N2.getValueType().isInteger() && \"Shifts only work on integers\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5178, __PRETTY_FUNCTION__))
5178 "Shifts only work on integers")((VT.isInteger() && N2.getValueType().isInteger() &&
"Shifts only work on integers") ? static_cast<void> (0
) : __assert_fail ("VT.isInteger() && N2.getValueType().isInteger() && \"Shifts only work on integers\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5178, __PRETTY_FUNCTION__))
;
5179 assert((!VT.isVector() || VT == N2.getValueType()) &&(((!VT.isVector() || VT == N2.getValueType()) && "Vector shift amounts must be in the same as their first arg"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT == N2.getValueType()) && \"Vector shift amounts must be in the same as their first arg\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5180, __PRETTY_FUNCTION__))
5180 "Vector shift amounts must be in the same as their first arg")(((!VT.isVector() || VT == N2.getValueType()) && "Vector shift amounts must be in the same as their first arg"
) ? static_cast<void> (0) : __assert_fail ("(!VT.isVector() || VT == N2.getValueType()) && \"Vector shift amounts must be in the same as their first arg\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5180, __PRETTY_FUNCTION__))
;
5181 // Verify that the shift amount VT is big enough to hold valid shift
5182 // amounts. This catches things like trying to shift an i1024 value by an
5183 // i8, which is easy to fall into in generic code that uses
5184 // TLI.getShiftAmount().
5185 assert(N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits()) &&((N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits
()) && "Invalid use of small shift amount with oversized value!"
) ? static_cast<void> (0) : __assert_fail ("N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits()) && \"Invalid use of small shift amount with oversized value!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5186, __PRETTY_FUNCTION__))
5186 "Invalid use of small shift amount with oversized value!")((N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits
()) && "Invalid use of small shift amount with oversized value!"
) ? static_cast<void> (0) : __assert_fail ("N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits()) && \"Invalid use of small shift amount with oversized value!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5186, __PRETTY_FUNCTION__))
;
5187
5188 // Always fold shifts of i1 values so the code generator doesn't need to
5189 // handle them. Since we know the size of the shift has to be less than the
5190 // size of the value, the shift/rotate count is guaranteed to be zero.
5191 if (VT == MVT::i1)
5192 return N1;
5193 if (N2C && N2C->isNullValue())
5194 return N1;
5195 break;
5196 case ISD::FP_ROUND:
5197 assert(VT.isFloatingPoint() &&((VT.isFloatingPoint() && N1.getValueType().isFloatingPoint
() && VT.bitsLE(N1.getValueType()) && N2C &&
(N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1)
&& "Invalid FP_ROUND!") ? static_cast<void> (0
) : __assert_fail ("VT.isFloatingPoint() && N1.getValueType().isFloatingPoint() && VT.bitsLE(N1.getValueType()) && N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) && \"Invalid FP_ROUND!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5201, __PRETTY_FUNCTION__))
5198 N1.getValueType().isFloatingPoint() &&((VT.isFloatingPoint() && N1.getValueType().isFloatingPoint
() && VT.bitsLE(N1.getValueType()) && N2C &&
(N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1)
&& "Invalid FP_ROUND!") ? static_cast<void> (0
) : __assert_fail ("VT.isFloatingPoint() && N1.getValueType().isFloatingPoint() && VT.bitsLE(N1.getValueType()) && N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) && \"Invalid FP_ROUND!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5201, __PRETTY_FUNCTION__))
5199 VT.bitsLE(N1.getValueType()) &&((VT.isFloatingPoint() && N1.getValueType().isFloatingPoint
() && VT.bitsLE(N1.getValueType()) && N2C &&
(N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1)
&& "Invalid FP_ROUND!") ? static_cast<void> (0
) : __assert_fail ("VT.isFloatingPoint() && N1.getValueType().isFloatingPoint() && VT.bitsLE(N1.getValueType()) && N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) && \"Invalid FP_ROUND!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5201, __PRETTY_FUNCTION__))
5200 N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) &&((VT.isFloatingPoint() && N1.getValueType().isFloatingPoint
() && VT.bitsLE(N1.getValueType()) && N2C &&
(N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1)
&& "Invalid FP_ROUND!") ? static_cast<void> (0
) : __assert_fail ("VT.isFloatingPoint() && N1.getValueType().isFloatingPoint() && VT.bitsLE(N1.getValueType()) && N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) && \"Invalid FP_ROUND!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5201, __PRETTY_FUNCTION__))
5201 "Invalid FP_ROUND!")((VT.isFloatingPoint() && N1.getValueType().isFloatingPoint
() && VT.bitsLE(N1.getValueType()) && N2C &&
(N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1)
&& "Invalid FP_ROUND!") ? static_cast<void> (0
) : __assert_fail ("VT.isFloatingPoint() && N1.getValueType().isFloatingPoint() && VT.bitsLE(N1.getValueType()) && N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) && \"Invalid FP_ROUND!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5201, __PRETTY_FUNCTION__))
;
5202 if (N1.getValueType() == VT) return N1; // noop conversion.
5203 break;
5204 case ISD::AssertSext:
5205 case ISD::AssertZext: {
5206 EVT EVT = cast<VTSDNode>(N2)->getVT();
5207 assert(VT == N1.getValueType() && "Not an inreg extend!")((VT == N1.getValueType() && "Not an inreg extend!") ?
static_cast<void> (0) : __assert_fail ("VT == N1.getValueType() && \"Not an inreg extend!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5207, __PRETTY_FUNCTION__))
;
5208 assert(VT.isInteger() && EVT.isInteger() &&((VT.isInteger() && EVT.isInteger() && "Cannot *_EXTEND_INREG FP types"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && EVT.isInteger() && \"Cannot *_EXTEND_INREG FP types\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5209, __PRETTY_FUNCTION__))
5209 "Cannot *_EXTEND_INREG FP types")((VT.isInteger() && EVT.isInteger() && "Cannot *_EXTEND_INREG FP types"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && EVT.isInteger() && \"Cannot *_EXTEND_INREG FP types\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5209, __PRETTY_FUNCTION__))
;
5210 assert(!EVT.isVector() &&((!EVT.isVector() && "AssertSExt/AssertZExt type should be the vector element type "
"rather than the vector type!") ? static_cast<void> (0
) : __assert_fail ("!EVT.isVector() && \"AssertSExt/AssertZExt type should be the vector element type \" \"rather than the vector type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5212, __PRETTY_FUNCTION__))
5211 "AssertSExt/AssertZExt type should be the vector element type "((!EVT.isVector() && "AssertSExt/AssertZExt type should be the vector element type "
"rather than the vector type!") ? static_cast<void> (0
) : __assert_fail ("!EVT.isVector() && \"AssertSExt/AssertZExt type should be the vector element type \" \"rather than the vector type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5212, __PRETTY_FUNCTION__))
5212 "rather than the vector type!")((!EVT.isVector() && "AssertSExt/AssertZExt type should be the vector element type "
"rather than the vector type!") ? static_cast<void> (0
) : __assert_fail ("!EVT.isVector() && \"AssertSExt/AssertZExt type should be the vector element type \" \"rather than the vector type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5212, __PRETTY_FUNCTION__))
;
5213 assert(EVT.bitsLE(VT.getScalarType()) && "Not extending!")((EVT.bitsLE(VT.getScalarType()) && "Not extending!")
? static_cast<void> (0) : __assert_fail ("EVT.bitsLE(VT.getScalarType()) && \"Not extending!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5213, __PRETTY_FUNCTION__))
;
5214 if (VT.getScalarType() == EVT) return N1; // noop assertion.
5215 break;
5216 }
5217 case ISD::SIGN_EXTEND_INREG: {
5218 EVT EVT = cast<VTSDNode>(N2)->getVT();
5219 assert(VT == N1.getValueType() && "Not an inreg extend!")((VT == N1.getValueType() && "Not an inreg extend!") ?
static_cast<void> (0) : __assert_fail ("VT == N1.getValueType() && \"Not an inreg extend!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5219, __PRETTY_FUNCTION__))
;
5220 assert(VT.isInteger() && EVT.isInteger() &&((VT.isInteger() && EVT.isInteger() && "Cannot *_EXTEND_INREG FP types"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && EVT.isInteger() && \"Cannot *_EXTEND_INREG FP types\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5221, __PRETTY_FUNCTION__))
5221 "Cannot *_EXTEND_INREG FP types")((VT.isInteger() && EVT.isInteger() && "Cannot *_EXTEND_INREG FP types"
) ? static_cast<void> (0) : __assert_fail ("VT.isInteger() && EVT.isInteger() && \"Cannot *_EXTEND_INREG FP types\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5221, __PRETTY_FUNCTION__))
;
5222 assert(EVT.isVector() == VT.isVector() &&((EVT.isVector() == VT.isVector() && "SIGN_EXTEND_INREG type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("EVT.isVector() == VT.isVector() && \"SIGN_EXTEND_INREG type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5224, __PRETTY_FUNCTION__))
5223 "SIGN_EXTEND_INREG type should be vector iff the operand "((EVT.isVector() == VT.isVector() && "SIGN_EXTEND_INREG type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("EVT.isVector() == VT.isVector() && \"SIGN_EXTEND_INREG type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5224, __PRETTY_FUNCTION__))
5224 "type is vector!")((EVT.isVector() == VT.isVector() && "SIGN_EXTEND_INREG type should be vector iff the operand "
"type is vector!") ? static_cast<void> (0) : __assert_fail
("EVT.isVector() == VT.isVector() && \"SIGN_EXTEND_INREG type should be vector iff the operand \" \"type is vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5224, __PRETTY_FUNCTION__))
;
5225 assert((!EVT.isVector() ||(((!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements
()) && "Vector element counts must match in SIGN_EXTEND_INREG"
) ? static_cast<void> (0) : __assert_fail ("(!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements()) && \"Vector element counts must match in SIGN_EXTEND_INREG\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5227, __PRETTY_FUNCTION__))
5226 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&(((!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements
()) && "Vector element counts must match in SIGN_EXTEND_INREG"
) ? static_cast<void> (0) : __assert_fail ("(!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements()) && \"Vector element counts must match in SIGN_EXTEND_INREG\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5227, __PRETTY_FUNCTION__))
5227 "Vector element counts must match in SIGN_EXTEND_INREG")(((!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements
()) && "Vector element counts must match in SIGN_EXTEND_INREG"
) ? static_cast<void> (0) : __assert_fail ("(!EVT.isVector() || EVT.getVectorNumElements() == VT.getVectorNumElements()) && \"Vector element counts must match in SIGN_EXTEND_INREG\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5227, __PRETTY_FUNCTION__))
;
5228 assert(EVT.bitsLE(VT) && "Not extending!")((EVT.bitsLE(VT) && "Not extending!") ? static_cast<
void> (0) : __assert_fail ("EVT.bitsLE(VT) && \"Not extending!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5228, __PRETTY_FUNCTION__))
;
5229 if (EVT == VT) return N1; // Not actually extending
5230
5231 auto SignExtendInReg = [&](APInt Val, llvm::EVT ConstantVT) {
5232 unsigned FromBits = EVT.getScalarSizeInBits();
5233 Val <<= Val.getBitWidth() - FromBits;
5234 Val.ashrInPlace(Val.getBitWidth() - FromBits);
5235 return getConstant(Val, DL, ConstantVT);
5236 };
5237
5238 if (N1C) {
5239 const APInt &Val = N1C->getAPIntValue();
5240 return SignExtendInReg(Val, VT);
5241 }
5242 if (ISD::isBuildVectorOfConstantSDNodes(N1.getNode())) {
5243 SmallVector<SDValue, 8> Ops;
5244 llvm::EVT OpVT = N1.getOperand(0).getValueType();
5245 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
5246 SDValue Op = N1.getOperand(i);
5247 if (Op.isUndef()) {
5248 Ops.push_back(getUNDEF(OpVT));
5249 continue;
5250 }
5251 ConstantSDNode *C = cast<ConstantSDNode>(Op);
5252 APInt Val = C->getAPIntValue();
5253 Ops.push_back(SignExtendInReg(Val, OpVT));
5254 }
5255 return getBuildVector(VT, DL, Ops);
5256 }
5257 break;
5258 }
5259 case ISD::EXTRACT_VECTOR_ELT:
5260 assert(VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits() &&((VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits
() && "The result of EXTRACT_VECTOR_ELT must be at least as wide as the element type of the vector."
) ? static_cast<void> (0) : __assert_fail ("VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits() && \"The result of EXTRACT_VECTOR_ELT must be at least as wide as the element type of the vector.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5262, __PRETTY_FUNCTION__))
5261 "The result of EXTRACT_VECTOR_ELT must be at least as wide as the \((VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits
() && "The result of EXTRACT_VECTOR_ELT must be at least as wide as the element type of the vector."
) ? static_cast<void> (0) : __assert_fail ("VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits() && \"The result of EXTRACT_VECTOR_ELT must be at least as wide as the element type of the vector.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5262, __PRETTY_FUNCTION__))
5262 element type of the vector.")((VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits
() && "The result of EXTRACT_VECTOR_ELT must be at least as wide as the element type of the vector."
) ? static_cast<void> (0) : __assert_fail ("VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits() && \"The result of EXTRACT_VECTOR_ELT must be at least as wide as the element type of the vector.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5262, __PRETTY_FUNCTION__))
;
5263
5264 // Extract from an undefined value or using an undefined index is undefined.
5265 if (N1.isUndef() || N2.isUndef())
5266 return getUNDEF(VT);
5267
5268 // EXTRACT_VECTOR_ELT of out-of-bounds element is an UNDEF
5269 if (N2C && N2C->getAPIntValue().uge(N1.getValueType().getVectorNumElements()))
5270 return getUNDEF(VT);
5271
5272 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
5273 // expanding copies of large vectors from registers.
5274 if (N2C &&
5275 N1.getOpcode() == ISD::CONCAT_VECTORS &&
5276 N1.getNumOperands() > 0) {
5277 unsigned Factor =
5278 N1.getOperand(0).getValueType().getVectorNumElements();
5279 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
5280 N1.getOperand(N2C->getZExtValue() / Factor),
5281 getConstant(N2C->getZExtValue() % Factor, DL,
5282 N2.getValueType()));
5283 }
5284
5285 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
5286 // expanding large vector constants.
5287 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
5288 SDValue Elt = N1.getOperand(N2C->getZExtValue());
5289
5290 if (VT != Elt.getValueType())
5291 // If the vector element type is not legal, the BUILD_VECTOR operands
5292 // are promoted and implicitly truncated, and the result implicitly
5293 // extended. Make that explicit here.
5294 Elt = getAnyExtOrTrunc(Elt, DL, VT);
5295
5296 return Elt;
5297 }
5298
5299 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
5300 // operations are lowered to scalars.
5301 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
5302 // If the indices are the same, return the inserted element else
5303 // if the indices are known different, extract the element from
5304 // the original vector.
5305 SDValue N1Op2 = N1.getOperand(2);
5306 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2);
5307
5308 if (N1Op2C && N2C) {
5309 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
5310 if (VT == N1.getOperand(1).getValueType())
5311 return N1.getOperand(1);
5312 else
5313 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
5314 }
5315
5316 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
5317 }
5318 }
5319
5320 // EXTRACT_VECTOR_ELT of v1iX EXTRACT_SUBVECTOR could be formed
5321 // when vector types are scalarized and v1iX is legal.
5322 // vextract (v1iX extract_subvector(vNiX, Idx)) -> vextract(vNiX,Idx)
5323 if (N1.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
5324 N1.getValueType().getVectorNumElements() == 1) {
5325 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0),
5326 N1.getOperand(1));
5327 }
5328 break;
5329 case ISD::EXTRACT_ELEMENT:
5330 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!")((N2C && (unsigned)N2C->getZExtValue() < 2 &&
"Bad EXTRACT_ELEMENT!") ? static_cast<void> (0) : __assert_fail
("N2C && (unsigned)N2C->getZExtValue() < 2 && \"Bad EXTRACT_ELEMENT!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5330, __PRETTY_FUNCTION__))
;
5331 assert(!N1.getValueType().isVector() && !VT.isVector() &&((!N1.getValueType().isVector() && !VT.isVector() &&
(N1.getValueType().isInteger() == VT.isInteger()) &&
N1.getValueType() != VT && "Wrong types for EXTRACT_ELEMENT!"
) ? static_cast<void> (0) : __assert_fail ("!N1.getValueType().isVector() && !VT.isVector() && (N1.getValueType().isInteger() == VT.isInteger()) && N1.getValueType() != VT && \"Wrong types for EXTRACT_ELEMENT!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5334, __PRETTY_FUNCTION__))
5332 (N1.getValueType().isInteger() == VT.isInteger()) &&((!N1.getValueType().isVector() && !VT.isVector() &&
(N1.getValueType().isInteger() == VT.isInteger()) &&
N1.getValueType() != VT && "Wrong types for EXTRACT_ELEMENT!"
) ? static_cast<void> (0) : __assert_fail ("!N1.getValueType().isVector() && !VT.isVector() && (N1.getValueType().isInteger() == VT.isInteger()) && N1.getValueType() != VT && \"Wrong types for EXTRACT_ELEMENT!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5334, __PRETTY_FUNCTION__))
5333 N1.getValueType() != VT &&((!N1.getValueType().isVector() && !VT.isVector() &&
(N1.getValueType().isInteger() == VT.isInteger()) &&
N1.getValueType() != VT && "Wrong types for EXTRACT_ELEMENT!"
) ? static_cast<void> (0) : __assert_fail ("!N1.getValueType().isVector() && !VT.isVector() && (N1.getValueType().isInteger() == VT.isInteger()) && N1.getValueType() != VT && \"Wrong types for EXTRACT_ELEMENT!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5334, __PRETTY_FUNCTION__))
5334 "Wrong types for EXTRACT_ELEMENT!")((!N1.getValueType().isVector() && !VT.isVector() &&
(N1.getValueType().isInteger() == VT.isInteger()) &&
N1.getValueType() != VT && "Wrong types for EXTRACT_ELEMENT!"
) ? static_cast<void> (0) : __assert_fail ("!N1.getValueType().isVector() && !VT.isVector() && (N1.getValueType().isInteger() == VT.isInteger()) && N1.getValueType() != VT && \"Wrong types for EXTRACT_ELEMENT!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5334, __PRETTY_FUNCTION__))
;
5335
5336 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
5337 // 64-bit integers into 32-bit parts. Instead of building the extract of
5338 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
5339 if (N1.getOpcode() == ISD::BUILD_PAIR)
5340 return N1.getOperand(N2C->getZExtValue());
5341
5342 // EXTRACT_ELEMENT of a constant int is also very common.
5343 if (N1C) {
5344 unsigned ElementSize = VT.getSizeInBits();
5345 unsigned Shift = ElementSize * N2C->getZExtValue();
5346 APInt ShiftedVal = N1C->getAPIntValue().lshr(Shift);
5347 return getConstant(ShiftedVal.trunc(ElementSize), DL, VT);
5348 }
5349 break;
5350 case ISD::EXTRACT_SUBVECTOR:
5351 if (VT.isSimple() && N1.getValueType().isSimple()) {
5352 assert(VT.isVector() && N1.getValueType().isVector() &&((VT.isVector() && N1.getValueType().isVector() &&
"Extract subvector VTs must be a vectors!") ? static_cast<
void> (0) : __assert_fail ("VT.isVector() && N1.getValueType().isVector() && \"Extract subvector VTs must be a vectors!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5353, __PRETTY_FUNCTION__))
5353 "Extract subvector VTs must be a vectors!")((VT.isVector() && N1.getValueType().isVector() &&
"Extract subvector VTs must be a vectors!") ? static_cast<
void> (0) : __assert_fail ("VT.isVector() && N1.getValueType().isVector() && \"Extract subvector VTs must be a vectors!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5353, __PRETTY_FUNCTION__))
;
5354 assert(VT.getVectorElementType() ==((VT.getVectorElementType() == N1.getValueType().getVectorElementType
() && "Extract subvector VTs must have the same element type!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorElementType() == N1.getValueType().getVectorElementType() && \"Extract subvector VTs must have the same element type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5356, __PRETTY_FUNCTION__))
5355 N1.getValueType().getVectorElementType() &&((VT.getVectorElementType() == N1.getValueType().getVectorElementType
() && "Extract subvector VTs must have the same element type!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorElementType() == N1.getValueType().getVectorElementType() && \"Extract subvector VTs must have the same element type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5356, __PRETTY_FUNCTION__))
5356 "Extract subvector VTs must have the same element type!")((VT.getVectorElementType() == N1.getValueType().getVectorElementType
() && "Extract subvector VTs must have the same element type!"
) ? static_cast<void> (0) : __assert_fail ("VT.getVectorElementType() == N1.getValueType().getVectorElementType() && \"Extract subvector VTs must have the same element type!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5356, __PRETTY_FUNCTION__))
;
5357 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&((VT.getSimpleVT() <= N1.getSimpleValueType() && "Extract subvector must be from larger vector to smaller vector!"
) ? static_cast<void> (0) : __assert_fail ("VT.getSimpleVT() <= N1.getSimpleValueType() && \"Extract subvector must be from larger vector to smaller vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5358, __PRETTY_FUNCTION__))
5358 "Extract subvector must be from larger vector to smaller vector!")((VT.getSimpleVT() <= N1.getSimpleValueType() && "Extract subvector must be from larger vector to smaller vector!"
) ? static_cast<void> (0) : __assert_fail ("VT.getSimpleVT() <= N1.getSimpleValueType() && \"Extract subvector must be from larger vector to smaller vector!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5358, __PRETTY_FUNCTION__))
;
5359
5360 if (N2C) {
5361 assert((VT.getVectorNumElements() + N2C->getZExtValue()(((VT.getVectorNumElements() + N2C->getZExtValue() <= N1
.getValueType().getVectorNumElements()) && "Extract subvector overflow!"
) ? static_cast<void> (0) : __assert_fail ("(VT.getVectorNumElements() + N2C->getZExtValue() <= N1.getValueType().getVectorNumElements()) && \"Extract subvector overflow!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5363, __PRETTY_FUNCTION__))
5362 <= N1.getValueType().getVectorNumElements())(((VT.getVectorNumElements() + N2C->getZExtValue() <= N1
.getValueType().getVectorNumElements()) && "Extract subvector overflow!"
) ? static_cast<void> (0) : __assert_fail ("(VT.getVectorNumElements() + N2C->getZExtValue() <= N1.getValueType().getVectorNumElements()) && \"Extract subvector overflow!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5363, __PRETTY_FUNCTION__))
5363 && "Extract subvector overflow!")(((VT.getVectorNumElements() + N2C->getZExtValue() <= N1
.getValueType().getVectorNumElements()) && "Extract subvector overflow!"
) ? static_cast<void> (0) : __assert_fail ("(VT.getVectorNumElements() + N2C->getZExtValue() <= N1.getValueType().getVectorNumElements()) && \"Extract subvector overflow!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp"
, 5363, __PRETTY_FUNCTION__))
;
5364 }
5365
5366 // Trivial extraction.
5367 if (VT.getSimpleVT() == N1.getSimpleValueType())
5368 return N1;
5369
5370 // EXTRACT_SUBVECTOR of an UNDEF is an UNDEF.
5371 if (N1.isUndef())
5372 return getUNDEF(VT);
5373
5374 // EXTRACT_SUBVECTOR of CONCAT_VECTOR can be simplified if the pieces of
5375 // the concat have the same type as the extract.
5376 if (N2C && N1.getOpcode() == ISD::CONCAT_VECTORS &&
5377 N1.getNumOperands() > 0 &&
5378 VT == N1.getOperand(0).getValueType()) {
5379 unsigned Factor = VT.getVectorNumElements();
5380 return N1.getOperand(N2C->getZExtValue() / Factor);
5381 }
5382
5383 // EXTRACT_SUBVECTOR of INSERT_SUBVECTOR is often created
5384 // during shuffle legalization.
5385 if (N1.getOpcode() == ISD::INSERT_SUBVECTOR && N2 == N1.getOperand(2) &&
5386 VT == N1.getOperand(1).getValueType())
5387 return N1.getOperand(1);
5388 }
5389 break;
5390 }
5391
5392 // Perform trivial constant folding.
5393 if (SDValue SV =
5394 FoldConstantArithmetic(Opcode, DL, VT, N1.getNode(), N2.getNode()))
5395 return SV;
5396
5397 if (SDValue V = foldConstantFPMath(Opcode, DL, VT, N1, N2))
5398 return V;
5399
5400 // Canonicalize an UNDEF to the RHS, even over a constant.
5401 if (N1.isUndef()) {
5402 if (TLI->isCommutativeBinOp(Opcode)) {
5403 std::swap(N1, N2);
5404 } else {
5405 switch (Opcode) {
5406 case ISD::SIGN_EXTEND_INREG:
5407 case ISD::SUB:
5408 return getUNDEF(VT); // fold op(undef, arg2) -> undef
5409