Bug Summary

File:lib/Target/SystemZ/SystemZInstrInfo.cpp
Warning:line 1668, column 24
The result of the right shift is undefined due to shifting by '4294967295', which is greater or equal to the width of type 'uint64_t'

Annotated Source Code

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clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name SystemZInstrInfo.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -mrelocation-model pic -pic-level 2 -mthread-model posix -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu x86-64 -dwarf-column-info -debugger-tuning=gdb -momit-leaf-frame-pointer -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-8/lib/clang/8.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/lib/Target/SystemZ -I /build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ -I /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/include -I /build/llvm-toolchain-snapshot-8~svn345461/include -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/backward -internal-isystem /usr/include/clang/8.0.0/include/ -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-8/lib/clang/8.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++11 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/lib/Target/SystemZ -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -o /tmp/scan-build-2018-10-27-211344-32123-1 -x c++ /build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp -faddrsig

/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp

1//===-- SystemZInstrInfo.cpp - SystemZ instruction information ------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the SystemZ implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "SystemZInstrInfo.h"
15#include "MCTargetDesc/SystemZMCTargetDesc.h"
16#include "SystemZ.h"
17#include "SystemZInstrBuilder.h"
18#include "SystemZSubtarget.h"
19#include "llvm/ADT/Statistic.h"
20#include "llvm/CodeGen/LiveInterval.h"
21#include "llvm/CodeGen/LiveIntervals.h"
22#include "llvm/CodeGen/LiveVariables.h"
23#include "llvm/CodeGen/MachineBasicBlock.h"
24#include "llvm/CodeGen/MachineFrameInfo.h"
25#include "llvm/CodeGen/MachineFunction.h"
26#include "llvm/CodeGen/MachineInstr.h"
27#include "llvm/CodeGen/MachineMemOperand.h"
28#include "llvm/CodeGen/MachineOperand.h"
29#include "llvm/CodeGen/MachineRegisterInfo.h"
30#include "llvm/CodeGen/SlotIndexes.h"
31#include "llvm/CodeGen/TargetInstrInfo.h"
32#include "llvm/CodeGen/TargetSubtargetInfo.h"
33#include "llvm/MC/MCInstrDesc.h"
34#include "llvm/MC/MCRegisterInfo.h"
35#include "llvm/Support/BranchProbability.h"
36#include "llvm/Support/ErrorHandling.h"
37#include "llvm/Support/MathExtras.h"
38#include "llvm/Target/TargetMachine.h"
39#include <cassert>
40#include <cstdint>
41#include <iterator>
42
43using namespace llvm;
44
45#define GET_INSTRINFO_CTOR_DTOR
46#define GET_INSTRMAP_INFO
47#include "SystemZGenInstrInfo.inc"
48
49#define DEBUG_TYPE"systemz-II" "systemz-II"
50STATISTIC(LOCRMuxJumps, "Number of LOCRMux jump-sequences (lower is better)")static llvm::Statistic LOCRMuxJumps = {"systemz-II", "LOCRMuxJumps"
, "Number of LOCRMux jump-sequences (lower is better)", {0}, {
false}}
;
51
52// Return a mask with Count low bits set.
53static uint64_t allOnes(unsigned int Count) {
54 return Count == 0 ? 0 : (uint64_t(1) << (Count - 1) << 1) - 1;
55}
56
57// Reg should be a 32-bit GPR. Return true if it is a high register rather
58// than a low register.
59static bool isHighReg(unsigned int Reg) {
60 if (SystemZ::GRH32BitRegClass.contains(Reg))
61 return true;
62 assert(SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32")((SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32"
) ? static_cast<void> (0) : __assert_fail ("SystemZ::GR32BitRegClass.contains(Reg) && \"Invalid GRX32\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 62, __PRETTY_FUNCTION__))
;
63 return false;
64}
65
66// Pin the vtable to this file.
67void SystemZInstrInfo::anchor() {}
68
69SystemZInstrInfo::SystemZInstrInfo(SystemZSubtarget &sti)
70 : SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP),
71 RI(), STI(sti) {
72}
73
74// MI is a 128-bit load or store. Split it into two 64-bit loads or stores,
75// each having the opcode given by NewOpcode.
76void SystemZInstrInfo::splitMove(MachineBasicBlock::iterator MI,
77 unsigned NewOpcode) const {
78 MachineBasicBlock *MBB = MI->getParent();
79 MachineFunction &MF = *MBB->getParent();
80
81 // Get two load or store instructions. Use the original instruction for one
82 // of them (arbitrarily the second here) and create a clone for the other.
83 MachineInstr *EarlierMI = MF.CloneMachineInstr(&*MI);
84 MBB->insert(MI, EarlierMI);
85
86 // Set up the two 64-bit registers and remember super reg and its flags.
87 MachineOperand &HighRegOp = EarlierMI->getOperand(0);
88 MachineOperand &LowRegOp = MI->getOperand(0);
89 unsigned Reg128 = LowRegOp.getReg();
90 unsigned Reg128Killed = getKillRegState(LowRegOp.isKill());
91 unsigned Reg128Undef = getUndefRegState(LowRegOp.isUndef());
92 HighRegOp.setReg(RI.getSubReg(HighRegOp.getReg(), SystemZ::subreg_h64));
93 LowRegOp.setReg(RI.getSubReg(LowRegOp.getReg(), SystemZ::subreg_l64));
94
95 if (MI->mayStore()) {
96 // Add implicit uses of the super register in case one of the subregs is
97 // undefined. We could track liveness and skip storing an undefined
98 // subreg, but this is hopefully rare (discovered with llvm-stress).
99 // If Reg128 was killed, set kill flag on MI.
100 unsigned Reg128UndefImpl = (Reg128Undef | RegState::Implicit);
101 MachineInstrBuilder(MF, EarlierMI).addReg(Reg128, Reg128UndefImpl);
102 MachineInstrBuilder(MF, MI).addReg(Reg128, (Reg128UndefImpl | Reg128Killed));
103 }
104
105 // The address in the first (high) instruction is already correct.
106 // Adjust the offset in the second (low) instruction.
107 MachineOperand &HighOffsetOp = EarlierMI->getOperand(2);
108 MachineOperand &LowOffsetOp = MI->getOperand(2);
109 LowOffsetOp.setImm(LowOffsetOp.getImm() + 8);
110
111 // Clear the kill flags on the registers in the first instruction.
112 if (EarlierMI->getOperand(0).isReg() && EarlierMI->getOperand(0).isUse())
113 EarlierMI->getOperand(0).setIsKill(false);
114 EarlierMI->getOperand(1).setIsKill(false);
115 EarlierMI->getOperand(3).setIsKill(false);
116
117 // Set the opcodes.
118 unsigned HighOpcode = getOpcodeForOffset(NewOpcode, HighOffsetOp.getImm());
119 unsigned LowOpcode = getOpcodeForOffset(NewOpcode, LowOffsetOp.getImm());
120 assert(HighOpcode && LowOpcode && "Both offsets should be in range")((HighOpcode && LowOpcode && "Both offsets should be in range"
) ? static_cast<void> (0) : __assert_fail ("HighOpcode && LowOpcode && \"Both offsets should be in range\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 120, __PRETTY_FUNCTION__))
;
121
122 EarlierMI->setDesc(get(HighOpcode));
123 MI->setDesc(get(LowOpcode));
124}
125
126// Split ADJDYNALLOC instruction MI.
127void SystemZInstrInfo::splitAdjDynAlloc(MachineBasicBlock::iterator MI) const {
128 MachineBasicBlock *MBB = MI->getParent();
129 MachineFunction &MF = *MBB->getParent();
130 MachineFrameInfo &MFFrame = MF.getFrameInfo();
131 MachineOperand &OffsetMO = MI->getOperand(2);
132
133 uint64_t Offset = (MFFrame.getMaxCallFrameSize() +
134 SystemZMC::CallFrameSize +
135 OffsetMO.getImm());
136 unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset);
137 assert(NewOpcode && "No support for huge argument lists yet")((NewOpcode && "No support for huge argument lists yet"
) ? static_cast<void> (0) : __assert_fail ("NewOpcode && \"No support for huge argument lists yet\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 137, __PRETTY_FUNCTION__))
;
138 MI->setDesc(get(NewOpcode));
139 OffsetMO.setImm(Offset);
140}
141
142// MI is an RI-style pseudo instruction. Replace it with LowOpcode
143// if the first operand is a low GR32 and HighOpcode if the first operand
144// is a high GR32. ConvertHigh is true if LowOpcode takes a signed operand
145// and HighOpcode takes an unsigned 32-bit operand. In those cases,
146// MI has the same kind of operand as LowOpcode, so needs to be converted
147// if HighOpcode is used.
148void SystemZInstrInfo::expandRIPseudo(MachineInstr &MI, unsigned LowOpcode,
149 unsigned HighOpcode,
150 bool ConvertHigh) const {
151 unsigned Reg = MI.getOperand(0).getReg();
152 bool IsHigh = isHighReg(Reg);
153 MI.setDesc(get(IsHigh ? HighOpcode : LowOpcode));
154 if (IsHigh && ConvertHigh)
155 MI.getOperand(1).setImm(uint32_t(MI.getOperand(1).getImm()));
156}
157
158// MI is a three-operand RIE-style pseudo instruction. Replace it with
159// LowOpcodeK if the registers are both low GR32s, otherwise use a move
160// followed by HighOpcode or LowOpcode, depending on whether the target
161// is a high or low GR32.
162void SystemZInstrInfo::expandRIEPseudo(MachineInstr &MI, unsigned LowOpcode,
163 unsigned LowOpcodeK,
164 unsigned HighOpcode) const {
165 unsigned DestReg = MI.getOperand(0).getReg();
166 unsigned SrcReg = MI.getOperand(1).getReg();
167 bool DestIsHigh = isHighReg(DestReg);
168 bool SrcIsHigh = isHighReg(SrcReg);
169 if (!DestIsHigh && !SrcIsHigh)
170 MI.setDesc(get(LowOpcodeK));
171 else {
172 emitGRX32Move(*MI.getParent(), MI, MI.getDebugLoc(), DestReg, SrcReg,
173 SystemZ::LR, 32, MI.getOperand(1).isKill(),
174 MI.getOperand(1).isUndef());
175 MI.setDesc(get(DestIsHigh ? HighOpcode : LowOpcode));
176 MI.getOperand(1).setReg(DestReg);
177 MI.tieOperands(0, 1);
178 }
179}
180
181// MI is an RXY-style pseudo instruction. Replace it with LowOpcode
182// if the first operand is a low GR32 and HighOpcode if the first operand
183// is a high GR32.
184void SystemZInstrInfo::expandRXYPseudo(MachineInstr &MI, unsigned LowOpcode,
185 unsigned HighOpcode) const {
186 unsigned Reg = MI.getOperand(0).getReg();
187 unsigned Opcode = getOpcodeForOffset(isHighReg(Reg) ? HighOpcode : LowOpcode,
188 MI.getOperand(2).getImm());
189 MI.setDesc(get(Opcode));
190}
191
192// MI is a load-on-condition pseudo instruction with a single register
193// (source or destination) operand. Replace it with LowOpcode if the
194// register is a low GR32 and HighOpcode if the register is a high GR32.
195void SystemZInstrInfo::expandLOCPseudo(MachineInstr &MI, unsigned LowOpcode,
196 unsigned HighOpcode) const {
197 unsigned Reg = MI.getOperand(0).getReg();
198 unsigned Opcode = isHighReg(Reg) ? HighOpcode : LowOpcode;
199 MI.setDesc(get(Opcode));
200}
201
202// MI is a load-register-on-condition pseudo instruction. Replace it with
203// LowOpcode if source and destination are both low GR32s and HighOpcode if
204// source and destination are both high GR32s.
205void SystemZInstrInfo::expandLOCRPseudo(MachineInstr &MI, unsigned LowOpcode,
206 unsigned HighOpcode) const {
207 unsigned DestReg = MI.getOperand(0).getReg();
208 unsigned SrcReg = MI.getOperand(2).getReg();
209 bool DestIsHigh = isHighReg(DestReg);
210 bool SrcIsHigh = isHighReg(SrcReg);
211
212 if (!DestIsHigh && !SrcIsHigh)
213 MI.setDesc(get(LowOpcode));
214 else if (DestIsHigh && SrcIsHigh)
215 MI.setDesc(get(HighOpcode));
216 else
217 LOCRMuxJumps++;
218
219 // If we were unable to implement the pseudo with a single instruction, we
220 // need to convert it back into a branch sequence. This cannot be done here
221 // since the caller of expandPostRAPseudo does not handle changes to the CFG
222 // correctly. This change is defered to the SystemZExpandPseudo pass.
223}
224
225// MI is an RR-style pseudo instruction that zero-extends the low Size bits
226// of one GRX32 into another. Replace it with LowOpcode if both operands
227// are low registers, otherwise use RISB[LH]G.
228void SystemZInstrInfo::expandZExtPseudo(MachineInstr &MI, unsigned LowOpcode,
229 unsigned Size) const {
230 MachineInstrBuilder MIB =
231 emitGRX32Move(*MI.getParent(), MI, MI.getDebugLoc(),
232 MI.getOperand(0).getReg(), MI.getOperand(1).getReg(), LowOpcode,
233 Size, MI.getOperand(1).isKill(), MI.getOperand(1).isUndef());
234
235 // Keep the remaining operands as-is.
236 for (unsigned I = 2; I < MI.getNumOperands(); ++I)
237 MIB.add(MI.getOperand(I));
238
239 MI.eraseFromParent();
240}
241
242void SystemZInstrInfo::expandLoadStackGuard(MachineInstr *MI) const {
243 MachineBasicBlock *MBB = MI->getParent();
244 MachineFunction &MF = *MBB->getParent();
245 const unsigned Reg64 = MI->getOperand(0).getReg();
246 const unsigned Reg32 = RI.getSubReg(Reg64, SystemZ::subreg_l32);
247
248 // EAR can only load the low subregister so us a shift for %a0 to produce
249 // the GR containing %a0 and %a1.
250
251 // ear <reg>, %a0
252 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32)
253 .addReg(SystemZ::A0)
254 .addReg(Reg64, RegState::ImplicitDefine);
255
256 // sllg <reg>, <reg>, 32
257 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::SLLG), Reg64)
258 .addReg(Reg64)
259 .addReg(0)
260 .addImm(32);
261
262 // ear <reg>, %a1
263 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32)
264 .addReg(SystemZ::A1);
265
266 // lg <reg>, 40(<reg>)
267 MI->setDesc(get(SystemZ::LG));
268 MachineInstrBuilder(MF, MI).addReg(Reg64).addImm(40).addReg(0);
269}
270
271// Emit a zero-extending move from 32-bit GPR SrcReg to 32-bit GPR
272// DestReg before MBBI in MBB. Use LowLowOpcode when both DestReg and SrcReg
273// are low registers, otherwise use RISB[LH]G. Size is the number of bits
274// taken from the low end of SrcReg (8 for LLCR, 16 for LLHR and 32 for LR).
275// KillSrc is true if this move is the last use of SrcReg.
276MachineInstrBuilder
277SystemZInstrInfo::emitGRX32Move(MachineBasicBlock &MBB,
278 MachineBasicBlock::iterator MBBI,
279 const DebugLoc &DL, unsigned DestReg,
280 unsigned SrcReg, unsigned LowLowOpcode,
281 unsigned Size, bool KillSrc,
282 bool UndefSrc) const {
283 unsigned Opcode;
284 bool DestIsHigh = isHighReg(DestReg);
285 bool SrcIsHigh = isHighReg(SrcReg);
286 if (DestIsHigh && SrcIsHigh)
287 Opcode = SystemZ::RISBHH;
288 else if (DestIsHigh && !SrcIsHigh)
289 Opcode = SystemZ::RISBHL;
290 else if (!DestIsHigh && SrcIsHigh)
291 Opcode = SystemZ::RISBLH;
292 else {
293 return BuildMI(MBB, MBBI, DL, get(LowLowOpcode), DestReg)
294 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc));
295 }
296 unsigned Rotate = (DestIsHigh != SrcIsHigh ? 32 : 0);
297 return BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)
298 .addReg(DestReg, RegState::Undef)
299 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc))
300 .addImm(32 - Size).addImm(128 + 31).addImm(Rotate);
301}
302
303MachineInstr *SystemZInstrInfo::commuteInstructionImpl(MachineInstr &MI,
304 bool NewMI,
305 unsigned OpIdx1,
306 unsigned OpIdx2) const {
307 auto cloneIfNew = [NewMI](MachineInstr &MI) -> MachineInstr & {
308 if (NewMI)
309 return *MI.getParent()->getParent()->CloneMachineInstr(&MI);
310 return MI;
311 };
312
313 switch (MI.getOpcode()) {
314 case SystemZ::LOCRMux:
315 case SystemZ::LOCFHR:
316 case SystemZ::LOCR:
317 case SystemZ::LOCGR: {
318 auto &WorkingMI = cloneIfNew(MI);
319 // Invert condition.
320 unsigned CCValid = WorkingMI.getOperand(3).getImm();
321 unsigned CCMask = WorkingMI.getOperand(4).getImm();
322 WorkingMI.getOperand(4).setImm(CCMask ^ CCValid);
323 return TargetInstrInfo::commuteInstructionImpl(WorkingMI, /*NewMI=*/false,
324 OpIdx1, OpIdx2);
325 }
326 default:
327 return TargetInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2);
328 }
329}
330
331// If MI is a simple load or store for a frame object, return the register
332// it loads or stores and set FrameIndex to the index of the frame object.
333// Return 0 otherwise.
334//
335// Flag is SimpleBDXLoad for loads and SimpleBDXStore for stores.
336static int isSimpleMove(const MachineInstr &MI, int &FrameIndex,
337 unsigned Flag) {
338 const MCInstrDesc &MCID = MI.getDesc();
339 if ((MCID.TSFlags & Flag) && MI.getOperand(1).isFI() &&
340 MI.getOperand(2).getImm() == 0 && MI.getOperand(3).getReg() == 0) {
341 FrameIndex = MI.getOperand(1).getIndex();
342 return MI.getOperand(0).getReg();
343 }
344 return 0;
345}
346
347unsigned SystemZInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
348 int &FrameIndex) const {
349 return isSimpleMove(MI, FrameIndex, SystemZII::SimpleBDXLoad);
350}
351
352unsigned SystemZInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
353 int &FrameIndex) const {
354 return isSimpleMove(MI, FrameIndex, SystemZII::SimpleBDXStore);
355}
356
357bool SystemZInstrInfo::isStackSlotCopy(const MachineInstr &MI,
358 int &DestFrameIndex,
359 int &SrcFrameIndex) const {
360 // Check for MVC 0(Length,FI1),0(FI2)
361 const MachineFrameInfo &MFI = MI.getParent()->getParent()->getFrameInfo();
362 if (MI.getOpcode() != SystemZ::MVC || !MI.getOperand(0).isFI() ||
363 MI.getOperand(1).getImm() != 0 || !MI.getOperand(3).isFI() ||
364 MI.getOperand(4).getImm() != 0)
365 return false;
366
367 // Check that Length covers the full slots.
368 int64_t Length = MI.getOperand(2).getImm();
369 unsigned FI1 = MI.getOperand(0).getIndex();
370 unsigned FI2 = MI.getOperand(3).getIndex();
371 if (MFI.getObjectSize(FI1) != Length ||
372 MFI.getObjectSize(FI2) != Length)
373 return false;
374
375 DestFrameIndex = FI1;
376 SrcFrameIndex = FI2;
377 return true;
378}
379
380bool SystemZInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
381 MachineBasicBlock *&TBB,
382 MachineBasicBlock *&FBB,
383 SmallVectorImpl<MachineOperand> &Cond,
384 bool AllowModify) const {
385 // Most of the code and comments here are boilerplate.
386
387 // Start from the bottom of the block and work up, examining the
388 // terminator instructions.
389 MachineBasicBlock::iterator I = MBB.end();
390 while (I != MBB.begin()) {
391 --I;
392 if (I->isDebugInstr())
393 continue;
394
395 // Working from the bottom, when we see a non-terminator instruction, we're
396 // done.
397 if (!isUnpredicatedTerminator(*I))
398 break;
399
400 // A terminator that isn't a branch can't easily be handled by this
401 // analysis.
402 if (!I->isBranch())
403 return true;
404
405 // Can't handle indirect branches.
406 SystemZII::Branch Branch(getBranchInfo(*I));
407 if (!Branch.Target->isMBB())
408 return true;
409
410 // Punt on compound branches.
411 if (Branch.Type != SystemZII::BranchNormal)
412 return true;
413
414 if (Branch.CCMask == SystemZ::CCMASK_ANY) {
415 // Handle unconditional branches.
416 if (!AllowModify) {
417 TBB = Branch.Target->getMBB();
418 continue;
419 }
420
421 // If the block has any instructions after a JMP, delete them.
422 while (std::next(I) != MBB.end())
423 std::next(I)->eraseFromParent();
424
425 Cond.clear();
426 FBB = nullptr;
427
428 // Delete the JMP if it's equivalent to a fall-through.
429 if (MBB.isLayoutSuccessor(Branch.Target->getMBB())) {
430 TBB = nullptr;
431 I->eraseFromParent();
432 I = MBB.end();
433 continue;
434 }
435
436 // TBB is used to indicate the unconditinal destination.
437 TBB = Branch.Target->getMBB();
438 continue;
439 }
440
441 // Working from the bottom, handle the first conditional branch.
442 if (Cond.empty()) {
443 // FIXME: add X86-style branch swap
444 FBB = TBB;
445 TBB = Branch.Target->getMBB();
446 Cond.push_back(MachineOperand::CreateImm(Branch.CCValid));
447 Cond.push_back(MachineOperand::CreateImm(Branch.CCMask));
448 continue;
449 }
450
451 // Handle subsequent conditional branches.
452 assert(Cond.size() == 2 && TBB && "Should have seen a conditional branch")((Cond.size() == 2 && TBB && "Should have seen a conditional branch"
) ? static_cast<void> (0) : __assert_fail ("Cond.size() == 2 && TBB && \"Should have seen a conditional branch\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 452, __PRETTY_FUNCTION__))
;
453
454 // Only handle the case where all conditional branches branch to the same
455 // destination.
456 if (TBB != Branch.Target->getMBB())
457 return true;
458
459 // If the conditions are the same, we can leave them alone.
460 unsigned OldCCValid = Cond[0].getImm();
461 unsigned OldCCMask = Cond[1].getImm();
462 if (OldCCValid == Branch.CCValid && OldCCMask == Branch.CCMask)
463 continue;
464
465 // FIXME: Try combining conditions like X86 does. Should be easy on Z!
466 return false;
467 }
468
469 return false;
470}
471
472unsigned SystemZInstrInfo::removeBranch(MachineBasicBlock &MBB,
473 int *BytesRemoved) const {
474 assert(!BytesRemoved && "code size not handled")((!BytesRemoved && "code size not handled") ? static_cast
<void> (0) : __assert_fail ("!BytesRemoved && \"code size not handled\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 474, __PRETTY_FUNCTION__))
;
475
476 // Most of the code and comments here are boilerplate.
477 MachineBasicBlock::iterator I = MBB.end();
478 unsigned Count = 0;
479
480 while (I != MBB.begin()) {
481 --I;
482 if (I->isDebugInstr())
483 continue;
484 if (!I->isBranch())
485 break;
486 if (!getBranchInfo(*I).Target->isMBB())
487 break;
488 // Remove the branch.
489 I->eraseFromParent();
490 I = MBB.end();
491 ++Count;
492 }
493
494 return Count;
495}
496
497bool SystemZInstrInfo::
498reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
499 assert(Cond.size() == 2 && "Invalid condition")((Cond.size() == 2 && "Invalid condition") ? static_cast
<void> (0) : __assert_fail ("Cond.size() == 2 && \"Invalid condition\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 499, __PRETTY_FUNCTION__))
;
500 Cond[1].setImm(Cond[1].getImm() ^ Cond[0].getImm());
501 return false;
502}
503
504unsigned SystemZInstrInfo::insertBranch(MachineBasicBlock &MBB,
505 MachineBasicBlock *TBB,
506 MachineBasicBlock *FBB,
507 ArrayRef<MachineOperand> Cond,
508 const DebugLoc &DL,
509 int *BytesAdded) const {
510 // In this function we output 32-bit branches, which should always
511 // have enough range. They can be shortened and relaxed by later code
512 // in the pipeline, if desired.
513
514 // Shouldn't be a fall through.
515 assert(TBB && "insertBranch must not be told to insert a fallthrough")((TBB && "insertBranch must not be told to insert a fallthrough"
) ? static_cast<void> (0) : __assert_fail ("TBB && \"insertBranch must not be told to insert a fallthrough\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 515, __PRETTY_FUNCTION__))
;
516 assert((Cond.size() == 2 || Cond.size() == 0) &&(((Cond.size() == 2 || Cond.size() == 0) && "SystemZ branch conditions have one component!"
) ? static_cast<void> (0) : __assert_fail ("(Cond.size() == 2 || Cond.size() == 0) && \"SystemZ branch conditions have one component!\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 517, __PRETTY_FUNCTION__))
517 "SystemZ branch conditions have one component!")(((Cond.size() == 2 || Cond.size() == 0) && "SystemZ branch conditions have one component!"
) ? static_cast<void> (0) : __assert_fail ("(Cond.size() == 2 || Cond.size() == 0) && \"SystemZ branch conditions have one component!\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 517, __PRETTY_FUNCTION__))
;
518 assert(!BytesAdded && "code size not handled")((!BytesAdded && "code size not handled") ? static_cast
<void> (0) : __assert_fail ("!BytesAdded && \"code size not handled\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 518, __PRETTY_FUNCTION__))
;
519
520 if (Cond.empty()) {
521 // Unconditional branch?
522 assert(!FBB && "Unconditional branch with multiple successors!")((!FBB && "Unconditional branch with multiple successors!"
) ? static_cast<void> (0) : __assert_fail ("!FBB && \"Unconditional branch with multiple successors!\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 522, __PRETTY_FUNCTION__))
;
523 BuildMI(&MBB, DL, get(SystemZ::J)).addMBB(TBB);
524 return 1;
525 }
526
527 // Conditional branch.
528 unsigned Count = 0;
529 unsigned CCValid = Cond[0].getImm();
530 unsigned CCMask = Cond[1].getImm();
531 BuildMI(&MBB, DL, get(SystemZ::BRC))
532 .addImm(CCValid).addImm(CCMask).addMBB(TBB);
533 ++Count;
534
535 if (FBB) {
536 // Two-way Conditional branch. Insert the second branch.
537 BuildMI(&MBB, DL, get(SystemZ::J)).addMBB(FBB);
538 ++Count;
539 }
540 return Count;
541}
542
543bool SystemZInstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
544 unsigned &SrcReg2, int &Mask,
545 int &Value) const {
546 assert(MI.isCompare() && "Caller should have checked for a comparison")((MI.isCompare() && "Caller should have checked for a comparison"
) ? static_cast<void> (0) : __assert_fail ("MI.isCompare() && \"Caller should have checked for a comparison\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 546, __PRETTY_FUNCTION__))
;
547
548 if (MI.getNumExplicitOperands() == 2 && MI.getOperand(0).isReg() &&
549 MI.getOperand(1).isImm()) {
550 SrcReg = MI.getOperand(0).getReg();
551 SrcReg2 = 0;
552 Value = MI.getOperand(1).getImm();
553 Mask = ~0;
554 return true;
555 }
556
557 return false;
558}
559
560// If Reg is a virtual register, return its definition, otherwise return null.
561static MachineInstr *getDef(unsigned Reg,
562 const MachineRegisterInfo *MRI) {
563 if (TargetRegisterInfo::isPhysicalRegister(Reg))
564 return nullptr;
565 return MRI->getUniqueVRegDef(Reg);
566}
567
568// Return true if MI is a shift of type Opcode by Imm bits.
569static bool isShift(MachineInstr *MI, unsigned Opcode, int64_t Imm) {
570 return (MI->getOpcode() == Opcode &&
571 !MI->getOperand(2).getReg() &&
572 MI->getOperand(3).getImm() == Imm);
573}
574
575// If the destination of MI has no uses, delete it as dead.
576static void eraseIfDead(MachineInstr *MI, const MachineRegisterInfo *MRI) {
577 if (MRI->use_nodbg_empty(MI->getOperand(0).getReg()))
578 MI->eraseFromParent();
579}
580
581// Compare compares SrcReg against zero. Check whether SrcReg contains
582// the result of an IPM sequence whose input CC survives until Compare,
583// and whether Compare is therefore redundant. Delete it and return
584// true if so.
585static bool removeIPMBasedCompare(MachineInstr &Compare, unsigned SrcReg,
586 const MachineRegisterInfo *MRI,
587 const TargetRegisterInfo *TRI) {
588 MachineInstr *LGFR = nullptr;
589 MachineInstr *RLL = getDef(SrcReg, MRI);
590 if (RLL && RLL->getOpcode() == SystemZ::LGFR) {
591 LGFR = RLL;
592 RLL = getDef(LGFR->getOperand(1).getReg(), MRI);
593 }
594 if (!RLL || !isShift(RLL, SystemZ::RLL, 31))
595 return false;
596
597 MachineInstr *SRL = getDef(RLL->getOperand(1).getReg(), MRI);
598 if (!SRL || !isShift(SRL, SystemZ::SRL, SystemZ::IPM_CC))
599 return false;
600
601 MachineInstr *IPM = getDef(SRL->getOperand(1).getReg(), MRI);
602 if (!IPM || IPM->getOpcode() != SystemZ::IPM)
603 return false;
604
605 // Check that there are no assignments to CC between the IPM and Compare,
606 if (IPM->getParent() != Compare.getParent())
607 return false;
608 MachineBasicBlock::iterator MBBI = IPM, MBBE = Compare.getIterator();
609 for (++MBBI; MBBI != MBBE; ++MBBI) {
610 MachineInstr &MI = *MBBI;
611 if (MI.modifiesRegister(SystemZ::CC, TRI))
612 return false;
613 }
614
615 Compare.eraseFromParent();
616 if (LGFR)
617 eraseIfDead(LGFR, MRI);
618 eraseIfDead(RLL, MRI);
619 eraseIfDead(SRL, MRI);
620 eraseIfDead(IPM, MRI);
621
622 return true;
623}
624
625bool SystemZInstrInfo::optimizeCompareInstr(
626 MachineInstr &Compare, unsigned SrcReg, unsigned SrcReg2, int Mask,
627 int Value, const MachineRegisterInfo *MRI) const {
628 assert(!SrcReg2 && "Only optimizing constant comparisons so far")((!SrcReg2 && "Only optimizing constant comparisons so far"
) ? static_cast<void> (0) : __assert_fail ("!SrcReg2 && \"Only optimizing constant comparisons so far\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 628, __PRETTY_FUNCTION__))
;
629 bool IsLogical = (Compare.getDesc().TSFlags & SystemZII::IsLogical) != 0;
630 return Value == 0 && !IsLogical &&
631 removeIPMBasedCompare(Compare, SrcReg, MRI, &RI);
632}
633
634bool SystemZInstrInfo::canInsertSelect(const MachineBasicBlock &MBB,
635 ArrayRef<MachineOperand> Pred,
636 unsigned TrueReg, unsigned FalseReg,
637 int &CondCycles, int &TrueCycles,
638 int &FalseCycles) const {
639 // Not all subtargets have LOCR instructions.
640 if (!STI.hasLoadStoreOnCond())
641 return false;
642 if (Pred.size() != 2)
643 return false;
644
645 // Check register classes.
646 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
647 const TargetRegisterClass *RC =
648 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));
649 if (!RC)
650 return false;
651
652 // We have LOCR instructions for 32 and 64 bit general purpose registers.
653 if ((STI.hasLoadStoreOnCond2() &&
654 SystemZ::GRX32BitRegClass.hasSubClassEq(RC)) ||
655 SystemZ::GR32BitRegClass.hasSubClassEq(RC) ||
656 SystemZ::GR64BitRegClass.hasSubClassEq(RC)) {
657 CondCycles = 2;
658 TrueCycles = 2;
659 FalseCycles = 2;
660 return true;
661 }
662
663 // Can't do anything else.
664 return false;
665}
666
667void SystemZInstrInfo::insertSelect(MachineBasicBlock &MBB,
668 MachineBasicBlock::iterator I,
669 const DebugLoc &DL, unsigned DstReg,
670 ArrayRef<MachineOperand> Pred,
671 unsigned TrueReg,
672 unsigned FalseReg) const {
673 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
674 const TargetRegisterClass *RC = MRI.getRegClass(DstReg);
675
676 assert(Pred.size() == 2 && "Invalid condition")((Pred.size() == 2 && "Invalid condition") ? static_cast
<void> (0) : __assert_fail ("Pred.size() == 2 && \"Invalid condition\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 676, __PRETTY_FUNCTION__))
;
677 unsigned CCValid = Pred[0].getImm();
678 unsigned CCMask = Pred[1].getImm();
679
680 unsigned Opc;
681 if (SystemZ::GRX32BitRegClass.hasSubClassEq(RC)) {
682 if (STI.hasLoadStoreOnCond2())
683 Opc = SystemZ::LOCRMux;
684 else {
685 Opc = SystemZ::LOCR;
686 MRI.constrainRegClass(DstReg, &SystemZ::GR32BitRegClass);
687 unsigned TReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass);
688 unsigned FReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass);
689 BuildMI(MBB, I, DL, get(TargetOpcode::COPY), TReg).addReg(TrueReg);
690 BuildMI(MBB, I, DL, get(TargetOpcode::COPY), FReg).addReg(FalseReg);
691 TrueReg = TReg;
692 FalseReg = FReg;
693 }
694 } else if (SystemZ::GR64BitRegClass.hasSubClassEq(RC))
695 Opc = SystemZ::LOCGR;
696 else
697 llvm_unreachable("Invalid register class")::llvm::llvm_unreachable_internal("Invalid register class", "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 697)
;
698
699 BuildMI(MBB, I, DL, get(Opc), DstReg)
700 .addReg(FalseReg).addReg(TrueReg)
701 .addImm(CCValid).addImm(CCMask);
702}
703
704bool SystemZInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
705 unsigned Reg,
706 MachineRegisterInfo *MRI) const {
707 unsigned DefOpc = DefMI.getOpcode();
708 if (DefOpc != SystemZ::LHIMux && DefOpc != SystemZ::LHI &&
709 DefOpc != SystemZ::LGHI)
710 return false;
711 if (DefMI.getOperand(0).getReg() != Reg)
712 return false;
713 int32_t ImmVal = (int32_t)DefMI.getOperand(1).getImm();
714
715 unsigned UseOpc = UseMI.getOpcode();
716 unsigned NewUseOpc;
717 unsigned UseIdx;
718 int CommuteIdx = -1;
719 switch (UseOpc) {
720 case SystemZ::LOCRMux:
721 if (!STI.hasLoadStoreOnCond2())
722 return false;
723 NewUseOpc = SystemZ::LOCHIMux;
724 if (UseMI.getOperand(2).getReg() == Reg)
725 UseIdx = 2;
726 else if (UseMI.getOperand(1).getReg() == Reg)
727 UseIdx = 2, CommuteIdx = 1;
728 else
729 return false;
730 break;
731 case SystemZ::LOCGR:
732 if (!STI.hasLoadStoreOnCond2())
733 return false;
734 NewUseOpc = SystemZ::LOCGHI;
735 if (UseMI.getOperand(2).getReg() == Reg)
736 UseIdx = 2;
737 else if (UseMI.getOperand(1).getReg() == Reg)
738 UseIdx = 2, CommuteIdx = 1;
739 else
740 return false;
741 break;
742 default:
743 return false;
744 }
745
746 if (CommuteIdx != -1)
747 if (!commuteInstruction(UseMI, false, CommuteIdx, UseIdx))
748 return false;
749
750 bool DeleteDef = MRI->hasOneNonDBGUse(Reg);
751 UseMI.setDesc(get(NewUseOpc));
752 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal);
753 if (DeleteDef)
754 DefMI.eraseFromParent();
755
756 return true;
757}
758
759bool SystemZInstrInfo::isPredicable(const MachineInstr &MI) const {
760 unsigned Opcode = MI.getOpcode();
761 if (Opcode == SystemZ::Return ||
762 Opcode == SystemZ::Trap ||
763 Opcode == SystemZ::CallJG ||
764 Opcode == SystemZ::CallBR)
765 return true;
766 return false;
767}
768
769bool SystemZInstrInfo::
770isProfitableToIfCvt(MachineBasicBlock &MBB,
771 unsigned NumCycles, unsigned ExtraPredCycles,
772 BranchProbability Probability) const {
773 // Avoid using conditional returns at the end of a loop (since then
774 // we'd need to emit an unconditional branch to the beginning anyway,
775 // making the loop body longer). This doesn't apply for low-probability
776 // loops (eg. compare-and-swap retry), so just decide based on branch
777 // probability instead of looping structure.
778 // However, since Compare and Trap instructions cost the same as a regular
779 // Compare instruction, we should allow the if conversion to convert this
780 // into a Conditional Compare regardless of the branch probability.
781 if (MBB.getLastNonDebugInstr()->getOpcode() != SystemZ::Trap &&
782 MBB.succ_empty() && Probability < BranchProbability(1, 8))
783 return false;
784 // For now only convert single instructions.
785 return NumCycles == 1;
786}
787
788bool SystemZInstrInfo::
789isProfitableToIfCvt(MachineBasicBlock &TMBB,
790 unsigned NumCyclesT, unsigned ExtraPredCyclesT,
791 MachineBasicBlock &FMBB,
792 unsigned NumCyclesF, unsigned ExtraPredCyclesF,
793 BranchProbability Probability) const {
794 // For now avoid converting mutually-exclusive cases.
795 return false;
796}
797
798bool SystemZInstrInfo::
799isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
800 BranchProbability Probability) const {
801 // For now only duplicate single instructions.
802 return NumCycles == 1;
803}
804
805bool SystemZInstrInfo::PredicateInstruction(
806 MachineInstr &MI, ArrayRef<MachineOperand> Pred) const {
807 assert(Pred.size() == 2 && "Invalid condition")((Pred.size() == 2 && "Invalid condition") ? static_cast
<void> (0) : __assert_fail ("Pred.size() == 2 && \"Invalid condition\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 807, __PRETTY_FUNCTION__))
;
808 unsigned CCValid = Pred[0].getImm();
809 unsigned CCMask = Pred[1].getImm();
810 assert(CCMask > 0 && CCMask < 15 && "Invalid predicate")((CCMask > 0 && CCMask < 15 && "Invalid predicate"
) ? static_cast<void> (0) : __assert_fail ("CCMask > 0 && CCMask < 15 && \"Invalid predicate\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 810, __PRETTY_FUNCTION__))
;
811 unsigned Opcode = MI.getOpcode();
812 if (Opcode == SystemZ::Trap) {
813 MI.setDesc(get(SystemZ::CondTrap));
814 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
815 .addImm(CCValid).addImm(CCMask)
816 .addReg(SystemZ::CC, RegState::Implicit);
817 return true;
818 }
819 if (Opcode == SystemZ::Return) {
820 MI.setDesc(get(SystemZ::CondReturn));
821 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
822 .addImm(CCValid).addImm(CCMask)
823 .addReg(SystemZ::CC, RegState::Implicit);
824 return true;
825 }
826 if (Opcode == SystemZ::CallJG) {
827 MachineOperand FirstOp = MI.getOperand(0);
828 const uint32_t *RegMask = MI.getOperand(1).getRegMask();
829 MI.RemoveOperand(1);
830 MI.RemoveOperand(0);
831 MI.setDesc(get(SystemZ::CallBRCL));
832 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
833 .addImm(CCValid)
834 .addImm(CCMask)
835 .add(FirstOp)
836 .addRegMask(RegMask)
837 .addReg(SystemZ::CC, RegState::Implicit);
838 return true;
839 }
840 if (Opcode == SystemZ::CallBR) {
841 const uint32_t *RegMask = MI.getOperand(0).getRegMask();
842 MI.RemoveOperand(0);
843 MI.setDesc(get(SystemZ::CallBCR));
844 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
845 .addImm(CCValid).addImm(CCMask)
846 .addRegMask(RegMask)
847 .addReg(SystemZ::CC, RegState::Implicit);
848 return true;
849 }
850 return false;
851}
852
853void SystemZInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
854 MachineBasicBlock::iterator MBBI,
855 const DebugLoc &DL, unsigned DestReg,
856 unsigned SrcReg, bool KillSrc) const {
857 // Split 128-bit GPR moves into two 64-bit moves. Add implicit uses of the
858 // super register in case one of the subregs is undefined.
859 // This handles ADDR128 too.
860 if (SystemZ::GR128BitRegClass.contains(DestReg, SrcReg)) {
861 copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_h64),
862 RI.getSubReg(SrcReg, SystemZ::subreg_h64), KillSrc);
863 MachineInstrBuilder(*MBB.getParent(), std::prev(MBBI))
864 .addReg(SrcReg, RegState::Implicit);
865 copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_l64),
866 RI.getSubReg(SrcReg, SystemZ::subreg_l64), KillSrc);
867 MachineInstrBuilder(*MBB.getParent(), std::prev(MBBI))
868 .addReg(SrcReg, (getKillRegState(KillSrc) | RegState::Implicit));
869 return;
870 }
871
872 if (SystemZ::GRX32BitRegClass.contains(DestReg, SrcReg)) {
873 emitGRX32Move(MBB, MBBI, DL, DestReg, SrcReg, SystemZ::LR, 32, KillSrc,
874 false);
875 return;
876 }
877
878 // Move 128-bit floating-point values between VR128 and FP128.
879 if (SystemZ::VR128BitRegClass.contains(DestReg) &&
880 SystemZ::FP128BitRegClass.contains(SrcReg)) {
881 unsigned SrcRegHi =
882 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_h64),
883 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
884 unsigned SrcRegLo =
885 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_l64),
886 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
887
888 BuildMI(MBB, MBBI, DL, get(SystemZ::VMRHG), DestReg)
889 .addReg(SrcRegHi, getKillRegState(KillSrc))
890 .addReg(SrcRegLo, getKillRegState(KillSrc));
891 return;
892 }
893 if (SystemZ::FP128BitRegClass.contains(DestReg) &&
894 SystemZ::VR128BitRegClass.contains(SrcReg)) {
895 unsigned DestRegHi =
896 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_h64),
897 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
898 unsigned DestRegLo =
899 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_l64),
900 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
901
902 if (DestRegHi != SrcReg)
903 copyPhysReg(MBB, MBBI, DL, DestRegHi, SrcReg, false);
904 BuildMI(MBB, MBBI, DL, get(SystemZ::VREPG), DestRegLo)
905 .addReg(SrcReg, getKillRegState(KillSrc)).addImm(1);
906 return;
907 }
908
909 // Move CC value from/to a GR32.
910 if (SrcReg == SystemZ::CC) {
911 auto MIB = BuildMI(MBB, MBBI, DL, get(SystemZ::IPM), DestReg);
912 if (KillSrc) {
913 const MachineFunction *MF = MBB.getParent();
914 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
915 MIB->addRegisterKilled(SrcReg, TRI);
916 }
917 return;
918 }
919 if (DestReg == SystemZ::CC) {
920 BuildMI(MBB, MBBI, DL, get(SystemZ::TMLH))
921 .addReg(SrcReg, getKillRegState(KillSrc))
922 .addImm(3 << (SystemZ::IPM_CC - 16));
923 return;
924 }
925
926 // Everything else needs only one instruction.
927 unsigned Opcode;
928 if (SystemZ::GR64BitRegClass.contains(DestReg, SrcReg))
929 Opcode = SystemZ::LGR;
930 else if (SystemZ::FP32BitRegClass.contains(DestReg, SrcReg))
931 // For z13 we prefer LDR over LER to avoid partial register dependencies.
932 Opcode = STI.hasVector() ? SystemZ::LDR32 : SystemZ::LER;
933 else if (SystemZ::FP64BitRegClass.contains(DestReg, SrcReg))
934 Opcode = SystemZ::LDR;
935 else if (SystemZ::FP128BitRegClass.contains(DestReg, SrcReg))
936 Opcode = SystemZ::LXR;
937 else if (SystemZ::VR32BitRegClass.contains(DestReg, SrcReg))
938 Opcode = SystemZ::VLR32;
939 else if (SystemZ::VR64BitRegClass.contains(DestReg, SrcReg))
940 Opcode = SystemZ::VLR64;
941 else if (SystemZ::VR128BitRegClass.contains(DestReg, SrcReg))
942 Opcode = SystemZ::VLR;
943 else if (SystemZ::AR32BitRegClass.contains(DestReg, SrcReg))
944 Opcode = SystemZ::CPYA;
945 else if (SystemZ::AR32BitRegClass.contains(DestReg) &&
946 SystemZ::GR32BitRegClass.contains(SrcReg))
947 Opcode = SystemZ::SAR;
948 else if (SystemZ::GR32BitRegClass.contains(DestReg) &&
949 SystemZ::AR32BitRegClass.contains(SrcReg))
950 Opcode = SystemZ::EAR;
951 else
952 llvm_unreachable("Impossible reg-to-reg copy")::llvm::llvm_unreachable_internal("Impossible reg-to-reg copy"
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 952)
;
953
954 BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)
955 .addReg(SrcReg, getKillRegState(KillSrc));
956}
957
958void SystemZInstrInfo::storeRegToStackSlot(
959 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg,
960 bool isKill, int FrameIdx, const TargetRegisterClass *RC,
961 const TargetRegisterInfo *TRI) const {
962 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
963
964 // Callers may expect a single instruction, so keep 128-bit moves
965 // together for now and lower them after register allocation.
966 unsigned LoadOpcode, StoreOpcode;
967 getLoadStoreOpcodes(RC, LoadOpcode, StoreOpcode);
968 addFrameReference(BuildMI(MBB, MBBI, DL, get(StoreOpcode))
969 .addReg(SrcReg, getKillRegState(isKill)),
970 FrameIdx);
971}
972
973void SystemZInstrInfo::loadRegFromStackSlot(
974 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg,
975 int FrameIdx, const TargetRegisterClass *RC,
976 const TargetRegisterInfo *TRI) const {
977 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
978
979 // Callers may expect a single instruction, so keep 128-bit moves
980 // together for now and lower them after register allocation.
981 unsigned LoadOpcode, StoreOpcode;
982 getLoadStoreOpcodes(RC, LoadOpcode, StoreOpcode);
983 addFrameReference(BuildMI(MBB, MBBI, DL, get(LoadOpcode), DestReg),
984 FrameIdx);
985}
986
987// Return true if MI is a simple load or store with a 12-bit displacement
988// and no index. Flag is SimpleBDXLoad for loads and SimpleBDXStore for stores.
989static bool isSimpleBD12Move(const MachineInstr *MI, unsigned Flag) {
990 const MCInstrDesc &MCID = MI->getDesc();
991 return ((MCID.TSFlags & Flag) &&
992 isUInt<12>(MI->getOperand(2).getImm()) &&
993 MI->getOperand(3).getReg() == 0);
994}
995
996namespace {
997
998struct LogicOp {
999 LogicOp() = default;
1000 LogicOp(unsigned regSize, unsigned immLSB, unsigned immSize)
1001 : RegSize(regSize), ImmLSB(immLSB), ImmSize(immSize) {}
1002
1003 explicit operator bool() const { return RegSize; }
1004
1005 unsigned RegSize = 0;
1006 unsigned ImmLSB = 0;
1007 unsigned ImmSize = 0;
1008};
1009
1010} // end anonymous namespace
1011
1012static LogicOp interpretAndImmediate(unsigned Opcode) {
1013 switch (Opcode) {
1014 case SystemZ::NILMux: return LogicOp(32, 0, 16);
1015 case SystemZ::NIHMux: return LogicOp(32, 16, 16);
1016 case SystemZ::NILL64: return LogicOp(64, 0, 16);
1017 case SystemZ::NILH64: return LogicOp(64, 16, 16);
1018 case SystemZ::NIHL64: return LogicOp(64, 32, 16);
1019 case SystemZ::NIHH64: return LogicOp(64, 48, 16);
1020 case SystemZ::NIFMux: return LogicOp(32, 0, 32);
1021 case SystemZ::NILF64: return LogicOp(64, 0, 32);
1022 case SystemZ::NIHF64: return LogicOp(64, 32, 32);
1023 default: return LogicOp();
1024 }
1025}
1026
1027static void transferDeadCC(MachineInstr *OldMI, MachineInstr *NewMI) {
1028 if (OldMI->registerDefIsDead(SystemZ::CC)) {
1029 MachineOperand *CCDef = NewMI->findRegisterDefOperand(SystemZ::CC);
1030 if (CCDef != nullptr)
1031 CCDef->setIsDead(true);
1032 }
1033}
1034
1035// Used to return from convertToThreeAddress after replacing two-address
1036// instruction OldMI with three-address instruction NewMI.
1037static MachineInstr *finishConvertToThreeAddress(MachineInstr *OldMI,
1038 MachineInstr *NewMI,
1039 LiveVariables *LV) {
1040 if (LV) {
1041 unsigned NumOps = OldMI->getNumOperands();
1042 for (unsigned I = 1; I < NumOps; ++I) {
1043 MachineOperand &Op = OldMI->getOperand(I);
1044 if (Op.isReg() && Op.isKill())
1045 LV->replaceKillInstruction(Op.getReg(), *OldMI, *NewMI);
1046 }
1047 }
1048 transferDeadCC(OldMI, NewMI);
1049 return NewMI;
1050}
1051
1052MachineInstr *SystemZInstrInfo::convertToThreeAddress(
1053 MachineFunction::iterator &MFI, MachineInstr &MI, LiveVariables *LV) const {
1054 MachineBasicBlock *MBB = MI.getParent();
1055 MachineFunction *MF = MBB->getParent();
1056 MachineRegisterInfo &MRI = MF->getRegInfo();
1057
1058 unsigned Opcode = MI.getOpcode();
1059 unsigned NumOps = MI.getNumOperands();
1060
1061 // Try to convert something like SLL into SLLK, if supported.
1062 // We prefer to keep the two-operand form where possible both
1063 // because it tends to be shorter and because some instructions
1064 // have memory forms that can be used during spilling.
1065 if (STI.hasDistinctOps()) {
1
Assuming the condition is false
2
Taking false branch
1066 MachineOperand &Dest = MI.getOperand(0);
1067 MachineOperand &Src = MI.getOperand(1);
1068 unsigned DestReg = Dest.getReg();
1069 unsigned SrcReg = Src.getReg();
1070 // AHIMux is only really a three-operand instruction when both operands
1071 // are low registers. Try to constrain both operands to be low if
1072 // possible.
1073 if (Opcode == SystemZ::AHIMux &&
1074 TargetRegisterInfo::isVirtualRegister(DestReg) &&
1075 TargetRegisterInfo::isVirtualRegister(SrcReg) &&
1076 MRI.getRegClass(DestReg)->contains(SystemZ::R1L) &&
1077 MRI.getRegClass(SrcReg)->contains(SystemZ::R1L)) {
1078 MRI.constrainRegClass(DestReg, &SystemZ::GR32BitRegClass);
1079 MRI.constrainRegClass(SrcReg, &SystemZ::GR32BitRegClass);
1080 }
1081 int ThreeOperandOpcode = SystemZ::getThreeOperandOpcode(Opcode);
1082 if (ThreeOperandOpcode >= 0) {
1083 // Create three address instruction without adding the implicit
1084 // operands. Those will instead be copied over from the original
1085 // instruction by the loop below.
1086 MachineInstrBuilder MIB(
1087 *MF, MF->CreateMachineInstr(get(ThreeOperandOpcode), MI.getDebugLoc(),
1088 /*NoImplicit=*/true));
1089 MIB.add(Dest);
1090 // Keep the kill state, but drop the tied flag.
1091 MIB.addReg(Src.getReg(), getKillRegState(Src.isKill()), Src.getSubReg());
1092 // Keep the remaining operands as-is.
1093 for (unsigned I = 2; I < NumOps; ++I)
1094 MIB.add(MI.getOperand(I));
1095 MBB->insert(MI, MIB);
1096 return finishConvertToThreeAddress(&MI, MIB, LV);
1097 }
1098 }
1099
1100 // Try to convert an AND into an RISBG-type instruction.
1101 if (LogicOp And = interpretAndImmediate(Opcode)) {
3
Taking true branch
1102 uint64_t Imm = MI.getOperand(2).getImm() << And.ImmLSB;
1103 // AND IMMEDIATE leaves the other bits of the register unchanged.
1104 Imm |= allOnes(And.RegSize) & ~(allOnes(And.ImmSize) << And.ImmLSB);
1105 unsigned Start, End;
1106 if (isRxSBGMask(Imm, And.RegSize, Start, End)) {
4
Calling 'SystemZInstrInfo::isRxSBGMask'
1107 unsigned NewOpcode;
1108 if (And.RegSize == 64) {
1109 NewOpcode = SystemZ::RISBG;
1110 // Prefer RISBGN if available, since it does not clobber CC.
1111 if (STI.hasMiscellaneousExtensions())
1112 NewOpcode = SystemZ::RISBGN;
1113 } else {
1114 NewOpcode = SystemZ::RISBMux;
1115 Start &= 31;
1116 End &= 31;
1117 }
1118 MachineOperand &Dest = MI.getOperand(0);
1119 MachineOperand &Src = MI.getOperand(1);
1120 MachineInstrBuilder MIB =
1121 BuildMI(*MBB, MI, MI.getDebugLoc(), get(NewOpcode))
1122 .add(Dest)
1123 .addReg(0)
1124 .addReg(Src.getReg(), getKillRegState(Src.isKill()),
1125 Src.getSubReg())
1126 .addImm(Start)
1127 .addImm(End + 128)
1128 .addImm(0);
1129 return finishConvertToThreeAddress(&MI, MIB, LV);
1130 }
1131 }
1132 return nullptr;
1133}
1134
1135MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
1136 MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
1137 MachineBasicBlock::iterator InsertPt, int FrameIndex,
1138 LiveIntervals *LIS) const {
1139 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
1140 const MachineFrameInfo &MFI = MF.getFrameInfo();
1141 unsigned Size = MFI.getObjectSize(FrameIndex);
1142 unsigned Opcode = MI.getOpcode();
1143
1144 if (Ops.size() == 2 && Ops[0] == 0 && Ops[1] == 1) {
1145 if (LIS != nullptr && (Opcode == SystemZ::LA || Opcode == SystemZ::LAY) &&
1146 isInt<8>(MI.getOperand(2).getImm()) && !MI.getOperand(3).getReg()) {
1147
1148 // Check CC liveness, since new instruction introduces a dead
1149 // def of CC.
1150 MCRegUnitIterator CCUnit(SystemZ::CC, TRI);
1151 LiveRange &CCLiveRange = LIS->getRegUnit(*CCUnit);
1152 ++CCUnit;
1153 assert(!CCUnit.isValid() && "CC only has one reg unit.")((!CCUnit.isValid() && "CC only has one reg unit.") ?
static_cast<void> (0) : __assert_fail ("!CCUnit.isValid() && \"CC only has one reg unit.\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1153, __PRETTY_FUNCTION__))
;
1154 SlotIndex MISlot =
1155 LIS->getSlotIndexes()->getInstructionIndex(MI).getRegSlot();
1156 if (!CCLiveRange.liveAt(MISlot)) {
1157 // LA(Y) %reg, CONST(%reg) -> AGSI %mem, CONST
1158 MachineInstr *BuiltMI = BuildMI(*InsertPt->getParent(), InsertPt,
1159 MI.getDebugLoc(), get(SystemZ::AGSI))
1160 .addFrameIndex(FrameIndex)
1161 .addImm(0)
1162 .addImm(MI.getOperand(2).getImm());
1163 BuiltMI->findRegisterDefOperand(SystemZ::CC)->setIsDead(true);
1164 CCLiveRange.createDeadDef(MISlot, LIS->getVNInfoAllocator());
1165 return BuiltMI;
1166 }
1167 }
1168 return nullptr;
1169 }
1170
1171 // All other cases require a single operand.
1172 if (Ops.size() != 1)
1173 return nullptr;
1174
1175 unsigned OpNum = Ops[0];
1176 assert(Size * 8 ==((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1179, __PRETTY_FUNCTION__))
1177 TRI->getRegSizeInBits(*MF.getRegInfo()((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1179, __PRETTY_FUNCTION__))
1178 .getRegClass(MI.getOperand(OpNum).getReg())) &&((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1179, __PRETTY_FUNCTION__))
1179 "Invalid size combination")((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1179, __PRETTY_FUNCTION__))
;
1180
1181 if ((Opcode == SystemZ::AHI || Opcode == SystemZ::AGHI) && OpNum == 0 &&
1182 isInt<8>(MI.getOperand(2).getImm())) {
1183 // A(G)HI %reg, CONST -> A(G)SI %mem, CONST
1184 Opcode = (Opcode == SystemZ::AHI ? SystemZ::ASI : SystemZ::AGSI);
1185 MachineInstr *BuiltMI =
1186 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1187 .addFrameIndex(FrameIndex)
1188 .addImm(0)
1189 .addImm(MI.getOperand(2).getImm());
1190 transferDeadCC(&MI, BuiltMI);
1191 return BuiltMI;
1192 }
1193
1194 if ((Opcode == SystemZ::ALFI && OpNum == 0 &&
1195 isInt<8>((int32_t)MI.getOperand(2).getImm())) ||
1196 (Opcode == SystemZ::ALGFI && OpNum == 0 &&
1197 isInt<8>((int64_t)MI.getOperand(2).getImm()))) {
1198 // AL(G)FI %reg, CONST -> AL(G)SI %mem, CONST
1199 Opcode = (Opcode == SystemZ::ALFI ? SystemZ::ALSI : SystemZ::ALGSI);
1200 MachineInstr *BuiltMI =
1201 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1202 .addFrameIndex(FrameIndex)
1203 .addImm(0)
1204 .addImm((int8_t)MI.getOperand(2).getImm());
1205 transferDeadCC(&MI, BuiltMI);
1206 return BuiltMI;
1207 }
1208
1209 if ((Opcode == SystemZ::SLFI && OpNum == 0 &&
1210 isInt<8>((int32_t)-MI.getOperand(2).getImm())) ||
1211 (Opcode == SystemZ::SLGFI && OpNum == 0 &&
1212 isInt<8>((int64_t)-MI.getOperand(2).getImm()))) {
1213 // SL(G)FI %reg, CONST -> AL(G)SI %mem, -CONST
1214 Opcode = (Opcode == SystemZ::SLFI ? SystemZ::ALSI : SystemZ::ALGSI);
1215 MachineInstr *BuiltMI =
1216 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1217 .addFrameIndex(FrameIndex)
1218 .addImm(0)
1219 .addImm((int8_t)-MI.getOperand(2).getImm());
1220 transferDeadCC(&MI, BuiltMI);
1221 return BuiltMI;
1222 }
1223
1224 if (Opcode == SystemZ::LGDR || Opcode == SystemZ::LDGR) {
1225 bool Op0IsGPR = (Opcode == SystemZ::LGDR);
1226 bool Op1IsGPR = (Opcode == SystemZ::LDGR);
1227 // If we're spilling the destination of an LDGR or LGDR, store the
1228 // source register instead.
1229 if (OpNum == 0) {
1230 unsigned StoreOpcode = Op1IsGPR ? SystemZ::STG : SystemZ::STD;
1231 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1232 get(StoreOpcode))
1233 .add(MI.getOperand(1))
1234 .addFrameIndex(FrameIndex)
1235 .addImm(0)
1236 .addReg(0);
1237 }
1238 // If we're spilling the source of an LDGR or LGDR, load the
1239 // destination register instead.
1240 if (OpNum == 1) {
1241 unsigned LoadOpcode = Op0IsGPR ? SystemZ::LG : SystemZ::LD;
1242 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1243 get(LoadOpcode))
1244 .add(MI.getOperand(0))
1245 .addFrameIndex(FrameIndex)
1246 .addImm(0)
1247 .addReg(0);
1248 }
1249 }
1250
1251 // Look for cases where the source of a simple store or the destination
1252 // of a simple load is being spilled. Try to use MVC instead.
1253 //
1254 // Although MVC is in practice a fast choice in these cases, it is still
1255 // logically a bytewise copy. This means that we cannot use it if the
1256 // load or store is volatile. We also wouldn't be able to use MVC if
1257 // the two memories partially overlap, but that case cannot occur here,
1258 // because we know that one of the memories is a full frame index.
1259 //
1260 // For performance reasons, we also want to avoid using MVC if the addresses
1261 // might be equal. We don't worry about that case here, because spill slot
1262 // coloring happens later, and because we have special code to remove
1263 // MVCs that turn out to be redundant.
1264 if (OpNum == 0 && MI.hasOneMemOperand()) {
1265 MachineMemOperand *MMO = *MI.memoperands_begin();
1266 if (MMO->getSize() == Size && !MMO->isVolatile()) {
1267 // Handle conversion of loads.
1268 if (isSimpleBD12Move(&MI, SystemZII::SimpleBDXLoad)) {
1269 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1270 get(SystemZ::MVC))
1271 .addFrameIndex(FrameIndex)
1272 .addImm(0)
1273 .addImm(Size)
1274 .add(MI.getOperand(1))
1275 .addImm(MI.getOperand(2).getImm())
1276 .addMemOperand(MMO);
1277 }
1278 // Handle conversion of stores.
1279 if (isSimpleBD12Move(&MI, SystemZII::SimpleBDXStore)) {
1280 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1281 get(SystemZ::MVC))
1282 .add(MI.getOperand(1))
1283 .addImm(MI.getOperand(2).getImm())
1284 .addImm(Size)
1285 .addFrameIndex(FrameIndex)
1286 .addImm(0)
1287 .addMemOperand(MMO);
1288 }
1289 }
1290 }
1291
1292 // If the spilled operand is the final one, try to change <INSN>R
1293 // into <INSN>.
1294 int MemOpcode = SystemZ::getMemOpcode(Opcode);
1295 if (MemOpcode >= 0) {
1296 unsigned NumOps = MI.getNumExplicitOperands();
1297 if (OpNum == NumOps - 1) {
1298 const MCInstrDesc &MemDesc = get(MemOpcode);
1299 uint64_t AccessBytes = SystemZII::getAccessSize(MemDesc.TSFlags);
1300 assert(AccessBytes != 0 && "Size of access should be known")((AccessBytes != 0 && "Size of access should be known"
) ? static_cast<void> (0) : __assert_fail ("AccessBytes != 0 && \"Size of access should be known\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1300, __PRETTY_FUNCTION__))
;
1301 assert(AccessBytes <= Size && "Access outside the frame index")((AccessBytes <= Size && "Access outside the frame index"
) ? static_cast<void> (0) : __assert_fail ("AccessBytes <= Size && \"Access outside the frame index\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1301, __PRETTY_FUNCTION__))
;
1302 uint64_t Offset = Size - AccessBytes;
1303 MachineInstrBuilder MIB = BuildMI(*InsertPt->getParent(), InsertPt,
1304 MI.getDebugLoc(), get(MemOpcode));
1305 for (unsigned I = 0; I < OpNum; ++I)
1306 MIB.add(MI.getOperand(I));
1307 MIB.addFrameIndex(FrameIndex).addImm(Offset);
1308 if (MemDesc.TSFlags & SystemZII::HasIndex)
1309 MIB.addReg(0);
1310 transferDeadCC(&MI, MIB);
1311 return MIB;
1312 }
1313 }
1314
1315 return nullptr;
1316}
1317
1318MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
1319 MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
1320 MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
1321 LiveIntervals *LIS) const {
1322 return nullptr;
1323}
1324
1325bool SystemZInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
1326 switch (MI.getOpcode()) {
1327 case SystemZ::L128:
1328 splitMove(MI, SystemZ::LG);
1329 return true;
1330
1331 case SystemZ::ST128:
1332 splitMove(MI, SystemZ::STG);
1333 return true;
1334
1335 case SystemZ::LX:
1336 splitMove(MI, SystemZ::LD);
1337 return true;
1338
1339 case SystemZ::STX:
1340 splitMove(MI, SystemZ::STD);
1341 return true;
1342
1343 case SystemZ::LBMux:
1344 expandRXYPseudo(MI, SystemZ::LB, SystemZ::LBH);
1345 return true;
1346
1347 case SystemZ::LHMux:
1348 expandRXYPseudo(MI, SystemZ::LH, SystemZ::LHH);
1349 return true;
1350
1351 case SystemZ::LLCRMux:
1352 expandZExtPseudo(MI, SystemZ::LLCR, 8);
1353 return true;
1354
1355 case SystemZ::LLHRMux:
1356 expandZExtPseudo(MI, SystemZ::LLHR, 16);
1357 return true;
1358
1359 case SystemZ::LLCMux:
1360 expandRXYPseudo(MI, SystemZ::LLC, SystemZ::LLCH);
1361 return true;
1362
1363 case SystemZ::LLHMux:
1364 expandRXYPseudo(MI, SystemZ::LLH, SystemZ::LLHH);
1365 return true;
1366
1367 case SystemZ::LMux:
1368 expandRXYPseudo(MI, SystemZ::L, SystemZ::LFH);
1369 return true;
1370
1371 case SystemZ::LOCMux:
1372 expandLOCPseudo(MI, SystemZ::LOC, SystemZ::LOCFH);
1373 return true;
1374
1375 case SystemZ::LOCHIMux:
1376 expandLOCPseudo(MI, SystemZ::LOCHI, SystemZ::LOCHHI);
1377 return true;
1378
1379 case SystemZ::LOCRMux:
1380 expandLOCRPseudo(MI, SystemZ::LOCR, SystemZ::LOCFHR);
1381 return true;
1382
1383 case SystemZ::STCMux:
1384 expandRXYPseudo(MI, SystemZ::STC, SystemZ::STCH);
1385 return true;
1386
1387 case SystemZ::STHMux:
1388 expandRXYPseudo(MI, SystemZ::STH, SystemZ::STHH);
1389 return true;
1390
1391 case SystemZ::STMux:
1392 expandRXYPseudo(MI, SystemZ::ST, SystemZ::STFH);
1393 return true;
1394
1395 case SystemZ::STOCMux:
1396 expandLOCPseudo(MI, SystemZ::STOC, SystemZ::STOCFH);
1397 return true;
1398
1399 case SystemZ::LHIMux:
1400 expandRIPseudo(MI, SystemZ::LHI, SystemZ::IIHF, true);
1401 return true;
1402
1403 case SystemZ::IIFMux:
1404 expandRIPseudo(MI, SystemZ::IILF, SystemZ::IIHF, false);
1405 return true;
1406
1407 case SystemZ::IILMux:
1408 expandRIPseudo(MI, SystemZ::IILL, SystemZ::IIHL, false);
1409 return true;
1410
1411 case SystemZ::IIHMux:
1412 expandRIPseudo(MI, SystemZ::IILH, SystemZ::IIHH, false);
1413 return true;
1414
1415 case SystemZ::NIFMux:
1416 expandRIPseudo(MI, SystemZ::NILF, SystemZ::NIHF, false);
1417 return true;
1418
1419 case SystemZ::NILMux:
1420 expandRIPseudo(MI, SystemZ::NILL, SystemZ::NIHL, false);
1421 return true;
1422
1423 case SystemZ::NIHMux:
1424 expandRIPseudo(MI, SystemZ::NILH, SystemZ::NIHH, false);
1425 return true;
1426
1427 case SystemZ::OIFMux:
1428 expandRIPseudo(MI, SystemZ::OILF, SystemZ::OIHF, false);
1429 return true;
1430
1431 case SystemZ::OILMux:
1432 expandRIPseudo(MI, SystemZ::OILL, SystemZ::OIHL, false);
1433 return true;
1434
1435 case SystemZ::OIHMux:
1436 expandRIPseudo(MI, SystemZ::OILH, SystemZ::OIHH, false);
1437 return true;
1438
1439 case SystemZ::XIFMux:
1440 expandRIPseudo(MI, SystemZ::XILF, SystemZ::XIHF, false);
1441 return true;
1442
1443 case SystemZ::TMLMux:
1444 expandRIPseudo(MI, SystemZ::TMLL, SystemZ::TMHL, false);
1445 return true;
1446
1447 case SystemZ::TMHMux:
1448 expandRIPseudo(MI, SystemZ::TMLH, SystemZ::TMHH, false);
1449 return true;
1450
1451 case SystemZ::AHIMux:
1452 expandRIPseudo(MI, SystemZ::AHI, SystemZ::AIH, false);
1453 return true;
1454
1455 case SystemZ::AHIMuxK:
1456 expandRIEPseudo(MI, SystemZ::AHI, SystemZ::AHIK, SystemZ::AIH);
1457 return true;
1458
1459 case SystemZ::AFIMux:
1460 expandRIPseudo(MI, SystemZ::AFI, SystemZ::AIH, false);
1461 return true;
1462
1463 case SystemZ::CHIMux:
1464 expandRIPseudo(MI, SystemZ::CHI, SystemZ::CIH, false);
1465 return true;
1466
1467 case SystemZ::CFIMux:
1468 expandRIPseudo(MI, SystemZ::CFI, SystemZ::CIH, false);
1469 return true;
1470
1471 case SystemZ::CLFIMux:
1472 expandRIPseudo(MI, SystemZ::CLFI, SystemZ::CLIH, false);
1473 return true;
1474
1475 case SystemZ::CMux:
1476 expandRXYPseudo(MI, SystemZ::C, SystemZ::CHF);
1477 return true;
1478
1479 case SystemZ::CLMux:
1480 expandRXYPseudo(MI, SystemZ::CL, SystemZ::CLHF);
1481 return true;
1482
1483 case SystemZ::RISBMux: {
1484 bool DestIsHigh = isHighReg(MI.getOperand(0).getReg());
1485 bool SrcIsHigh = isHighReg(MI.getOperand(2).getReg());
1486 if (SrcIsHigh == DestIsHigh)
1487 MI.setDesc(get(DestIsHigh ? SystemZ::RISBHH : SystemZ::RISBLL));
1488 else {
1489 MI.setDesc(get(DestIsHigh ? SystemZ::RISBHL : SystemZ::RISBLH));
1490 MI.getOperand(5).setImm(MI.getOperand(5).getImm() ^ 32);
1491 }
1492 return true;
1493 }
1494
1495 case SystemZ::ADJDYNALLOC:
1496 splitAdjDynAlloc(MI);
1497 return true;
1498
1499 case TargetOpcode::LOAD_STACK_GUARD:
1500 expandLoadStackGuard(&MI);
1501 return true;
1502
1503 default:
1504 return false;
1505 }
1506}
1507
1508unsigned SystemZInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
1509 if (MI.getOpcode() == TargetOpcode::INLINEASM) {
1510 const MachineFunction *MF = MI.getParent()->getParent();
1511 const char *AsmStr = MI.getOperand(0).getSymbolName();
1512 return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());
1513 }
1514 return MI.getDesc().getSize();
1515}
1516
1517SystemZII::Branch
1518SystemZInstrInfo::getBranchInfo(const MachineInstr &MI) const {
1519 switch (MI.getOpcode()) {
1520 case SystemZ::BR:
1521 case SystemZ::BI:
1522 case SystemZ::J:
1523 case SystemZ::JG:
1524 return SystemZII::Branch(SystemZII::BranchNormal, SystemZ::CCMASK_ANY,
1525 SystemZ::CCMASK_ANY, &MI.getOperand(0));
1526
1527 case SystemZ::BRC:
1528 case SystemZ::BRCL:
1529 return SystemZII::Branch(SystemZII::BranchNormal, MI.getOperand(0).getImm(),
1530 MI.getOperand(1).getImm(), &MI.getOperand(2));
1531
1532 case SystemZ::BRCT:
1533 case SystemZ::BRCTH:
1534 return SystemZII::Branch(SystemZII::BranchCT, SystemZ::CCMASK_ICMP,
1535 SystemZ::CCMASK_CMP_NE, &MI.getOperand(2));
1536
1537 case SystemZ::BRCTG:
1538 return SystemZII::Branch(SystemZII::BranchCTG, SystemZ::CCMASK_ICMP,
1539 SystemZ::CCMASK_CMP_NE, &MI.getOperand(2));
1540
1541 case SystemZ::CIJ:
1542 case SystemZ::CRJ:
1543 return SystemZII::Branch(SystemZII::BranchC, SystemZ::CCMASK_ICMP,
1544 MI.getOperand(2).getImm(), &MI.getOperand(3));
1545
1546 case SystemZ::CLIJ:
1547 case SystemZ::CLRJ:
1548 return SystemZII::Branch(SystemZII::BranchCL, SystemZ::CCMASK_ICMP,
1549 MI.getOperand(2).getImm(), &MI.getOperand(3));
1550
1551 case SystemZ::CGIJ:
1552 case SystemZ::CGRJ:
1553 return SystemZII::Branch(SystemZII::BranchCG, SystemZ::CCMASK_ICMP,
1554 MI.getOperand(2).getImm(), &MI.getOperand(3));
1555
1556 case SystemZ::CLGIJ:
1557 case SystemZ::CLGRJ:
1558 return SystemZII::Branch(SystemZII::BranchCLG, SystemZ::CCMASK_ICMP,
1559 MI.getOperand(2).getImm(), &MI.getOperand(3));
1560
1561 default:
1562 llvm_unreachable("Unrecognized branch opcode")::llvm::llvm_unreachable_internal("Unrecognized branch opcode"
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1562)
;
1563 }
1564}
1565
1566void SystemZInstrInfo::getLoadStoreOpcodes(const TargetRegisterClass *RC,
1567 unsigned &LoadOpcode,
1568 unsigned &StoreOpcode) const {
1569 if (RC == &SystemZ::GR32BitRegClass || RC == &SystemZ::ADDR32BitRegClass) {
1570 LoadOpcode = SystemZ::L;
1571 StoreOpcode = SystemZ::ST;
1572 } else if (RC == &SystemZ::GRH32BitRegClass) {
1573 LoadOpcode = SystemZ::LFH;
1574 StoreOpcode = SystemZ::STFH;
1575 } else if (RC == &SystemZ::GRX32BitRegClass) {
1576 LoadOpcode = SystemZ::LMux;
1577 StoreOpcode = SystemZ::STMux;
1578 } else if (RC == &SystemZ::GR64BitRegClass ||
1579 RC == &SystemZ::ADDR64BitRegClass) {
1580 LoadOpcode = SystemZ::LG;
1581 StoreOpcode = SystemZ::STG;
1582 } else if (RC == &SystemZ::GR128BitRegClass ||
1583 RC == &SystemZ::ADDR128BitRegClass) {
1584 LoadOpcode = SystemZ::L128;
1585 StoreOpcode = SystemZ::ST128;
1586 } else if (RC == &SystemZ::FP32BitRegClass) {
1587 LoadOpcode = SystemZ::LE;
1588 StoreOpcode = SystemZ::STE;
1589 } else if (RC == &SystemZ::FP64BitRegClass) {
1590 LoadOpcode = SystemZ::LD;
1591 StoreOpcode = SystemZ::STD;
1592 } else if (RC == &SystemZ::FP128BitRegClass) {
1593 LoadOpcode = SystemZ::LX;
1594 StoreOpcode = SystemZ::STX;
1595 } else if (RC == &SystemZ::VR32BitRegClass) {
1596 LoadOpcode = SystemZ::VL32;
1597 StoreOpcode = SystemZ::VST32;
1598 } else if (RC == &SystemZ::VR64BitRegClass) {
1599 LoadOpcode = SystemZ::VL64;
1600 StoreOpcode = SystemZ::VST64;
1601 } else if (RC == &SystemZ::VF128BitRegClass ||
1602 RC == &SystemZ::VR128BitRegClass) {
1603 LoadOpcode = SystemZ::VL;
1604 StoreOpcode = SystemZ::VST;
1605 } else
1606 llvm_unreachable("Unsupported regclass to load or store")::llvm::llvm_unreachable_internal("Unsupported regclass to load or store"
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1606)
;
1607}
1608
1609unsigned SystemZInstrInfo::getOpcodeForOffset(unsigned Opcode,
1610 int64_t Offset) const {
1611 const MCInstrDesc &MCID = get(Opcode);
1612 int64_t Offset2 = (MCID.TSFlags & SystemZII::Is128Bit ? Offset + 8 : Offset);
1613 if (isUInt<12>(Offset) && isUInt<12>(Offset2)) {
1614 // Get the instruction to use for unsigned 12-bit displacements.
1615 int Disp12Opcode = SystemZ::getDisp12Opcode(Opcode);
1616 if (Disp12Opcode >= 0)
1617 return Disp12Opcode;
1618
1619 // All address-related instructions can use unsigned 12-bit
1620 // displacements.
1621 return Opcode;
1622 }
1623 if (isInt<20>(Offset) && isInt<20>(Offset2)) {
1624 // Get the instruction to use for signed 20-bit displacements.
1625 int Disp20Opcode = SystemZ::getDisp20Opcode(Opcode);
1626 if (Disp20Opcode >= 0)
1627 return Disp20Opcode;
1628
1629 // Check whether Opcode allows signed 20-bit displacements.
1630 if (MCID.TSFlags & SystemZII::Has20BitOffset)
1631 return Opcode;
1632 }
1633 return 0;
1634}
1635
1636unsigned SystemZInstrInfo::getLoadAndTest(unsigned Opcode) const {
1637 switch (Opcode) {
1638 case SystemZ::L: return SystemZ::LT;
1639 case SystemZ::LY: return SystemZ::LT;
1640 case SystemZ::LG: return SystemZ::LTG;
1641 case SystemZ::LGF: return SystemZ::LTGF;
1642 case SystemZ::LR: return SystemZ::LTR;
1643 case SystemZ::LGFR: return SystemZ::LTGFR;
1644 case SystemZ::LGR: return SystemZ::LTGR;
1645 case SystemZ::LER: return SystemZ::LTEBR;
1646 case SystemZ::LDR: return SystemZ::LTDBR;
1647 case SystemZ::LXR: return SystemZ::LTXBR;
1648 case SystemZ::LCDFR: return SystemZ::LCDBR;
1649 case SystemZ::LPDFR: return SystemZ::LPDBR;
1650 case SystemZ::LNDFR: return SystemZ::LNDBR;
1651 case SystemZ::LCDFR_32: return SystemZ::LCEBR;
1652 case SystemZ::LPDFR_32: return SystemZ::LPEBR;
1653 case SystemZ::LNDFR_32: return SystemZ::LNEBR;
1654 // On zEC12 we prefer to use RISBGN. But if there is a chance to
1655 // actually use the condition code, we may turn it back into RISGB.
1656 // Note that RISBG is not really a "load-and-test" instruction,
1657 // but sets the same condition code values, so is OK to use here.
1658 case SystemZ::RISBGN: return SystemZ::RISBG;
1659 default: return 0;
1660 }
1661}
1662
1663// Return true if Mask matches the regexp 0*1+0*, given that zero masks
1664// have already been filtered out. Store the first set bit in LSB and
1665// the number of set bits in Length if so.
1666static bool isStringOfOnes(uint64_t Mask, unsigned &LSB, unsigned &Length) {
1667 unsigned First = findFirstSet(Mask);
8
Calling 'findFirstSet<unsigned long>'
15
Returning from 'findFirstSet<unsigned long>'
16
'First' initialized to 4294967295
1668 uint64_t Top = (Mask >> First) + 1;
17
The result of the right shift is undefined due to shifting by '4294967295', which is greater or equal to the width of type 'uint64_t'
1669 if ((Top & -Top) == Top) {
1670 LSB = First;
1671 Length = findFirstSet(Top);
1672 return true;
1673 }
1674 return false;
1675}
1676
1677bool SystemZInstrInfo::isRxSBGMask(uint64_t Mask, unsigned BitSize,
1678 unsigned &Start, unsigned &End) const {
1679 // Reject trivial all-zero masks.
1680 Mask &= allOnes(BitSize);
1681 if (Mask == 0)
5
Taking false branch
1682 return false;
1683
1684 // Handle the 1+0+ or 0+1+0* cases. Start then specifies the index of
1685 // the msb and End specifies the index of the lsb.
1686 unsigned LSB, Length;
1687 if (isStringOfOnes(Mask, LSB, Length)) {
6
Taking false branch
1688 Start = 63 - (LSB + Length - 1);
1689 End = 63 - LSB;
1690 return true;
1691 }
1692
1693 // Handle the wrap-around 1+0+1+ cases. Start then specifies the msb
1694 // of the low 1s and End specifies the lsb of the high 1s.
1695 if (isStringOfOnes(Mask ^ allOnes(BitSize), LSB, Length)) {
7
Calling 'isStringOfOnes'
1696 assert(LSB > 0 && "Bottom bit must be set")((LSB > 0 && "Bottom bit must be set") ? static_cast
<void> (0) : __assert_fail ("LSB > 0 && \"Bottom bit must be set\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1696, __PRETTY_FUNCTION__))
;
1697 assert(LSB + Length < BitSize && "Top bit must be set")((LSB + Length < BitSize && "Top bit must be set")
? static_cast<void> (0) : __assert_fail ("LSB + Length < BitSize && \"Top bit must be set\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1697, __PRETTY_FUNCTION__))
;
1698 Start = 63 - (LSB - 1);
1699 End = 63 - (LSB + Length);
1700 return true;
1701 }
1702
1703 return false;
1704}
1705
1706unsigned SystemZInstrInfo::getFusedCompare(unsigned Opcode,
1707 SystemZII::FusedCompareType Type,
1708 const MachineInstr *MI) const {
1709 switch (Opcode) {
1710 case SystemZ::CHI:
1711 case SystemZ::CGHI:
1712 if (!(MI && isInt<8>(MI->getOperand(1).getImm())))
1713 return 0;
1714 break;
1715 case SystemZ::CLFI:
1716 case SystemZ::CLGFI:
1717 if (!(MI && isUInt<8>(MI->getOperand(1).getImm())))
1718 return 0;
1719 break;
1720 case SystemZ::CL:
1721 case SystemZ::CLG:
1722 if (!STI.hasMiscellaneousExtensions())
1723 return 0;
1724 if (!(MI && MI->getOperand(3).getReg() == 0))
1725 return 0;
1726 break;
1727 }
1728 switch (Type) {
1729 case SystemZII::CompareAndBranch:
1730 switch (Opcode) {
1731 case SystemZ::CR:
1732 return SystemZ::CRJ;
1733 case SystemZ::CGR:
1734 return SystemZ::CGRJ;
1735 case SystemZ::CHI:
1736 return SystemZ::CIJ;
1737 case SystemZ::CGHI:
1738 return SystemZ::CGIJ;
1739 case SystemZ::CLR:
1740 return SystemZ::CLRJ;
1741 case SystemZ::CLGR:
1742 return SystemZ::CLGRJ;
1743 case SystemZ::CLFI:
1744 return SystemZ::CLIJ;
1745 case SystemZ::CLGFI:
1746 return SystemZ::CLGIJ;
1747 default:
1748 return 0;
1749 }
1750 case SystemZII::CompareAndReturn:
1751 switch (Opcode) {
1752 case SystemZ::CR:
1753 return SystemZ::CRBReturn;
1754 case SystemZ::CGR:
1755 return SystemZ::CGRBReturn;
1756 case SystemZ::CHI:
1757 return SystemZ::CIBReturn;
1758 case SystemZ::CGHI:
1759 return SystemZ::CGIBReturn;
1760 case SystemZ::CLR:
1761 return SystemZ::CLRBReturn;
1762 case SystemZ::CLGR:
1763 return SystemZ::CLGRBReturn;
1764 case SystemZ::CLFI:
1765 return SystemZ::CLIBReturn;
1766 case SystemZ::CLGFI:
1767 return SystemZ::CLGIBReturn;
1768 default:
1769 return 0;
1770 }
1771 case SystemZII::CompareAndSibcall:
1772 switch (Opcode) {
1773 case SystemZ::CR:
1774 return SystemZ::CRBCall;
1775 case SystemZ::CGR:
1776 return SystemZ::CGRBCall;
1777 case SystemZ::CHI:
1778 return SystemZ::CIBCall;
1779 case SystemZ::CGHI:
1780 return SystemZ::CGIBCall;
1781 case SystemZ::CLR:
1782 return SystemZ::CLRBCall;
1783 case SystemZ::CLGR:
1784 return SystemZ::CLGRBCall;
1785 case SystemZ::CLFI:
1786 return SystemZ::CLIBCall;
1787 case SystemZ::CLGFI:
1788 return SystemZ::CLGIBCall;
1789 default:
1790 return 0;
1791 }
1792 case SystemZII::CompareAndTrap:
1793 switch (Opcode) {
1794 case SystemZ::CR:
1795 return SystemZ::CRT;
1796 case SystemZ::CGR:
1797 return SystemZ::CGRT;
1798 case SystemZ::CHI:
1799 return SystemZ::CIT;
1800 case SystemZ::CGHI:
1801 return SystemZ::CGIT;
1802 case SystemZ::CLR:
1803 return SystemZ::CLRT;
1804 case SystemZ::CLGR:
1805 return SystemZ::CLGRT;
1806 case SystemZ::CLFI:
1807 return SystemZ::CLFIT;
1808 case SystemZ::CLGFI:
1809 return SystemZ::CLGIT;
1810 case SystemZ::CL:
1811 return SystemZ::CLT;
1812 case SystemZ::CLG:
1813 return SystemZ::CLGT;
1814 default:
1815 return 0;
1816 }
1817 }
1818 return 0;
1819}
1820
1821unsigned SystemZInstrInfo::getLoadAndTrap(unsigned Opcode) const {
1822 if (!STI.hasLoadAndTrap())
1823 return 0;
1824 switch (Opcode) {
1825 case SystemZ::L:
1826 case SystemZ::LY:
1827 return SystemZ::LAT;
1828 case SystemZ::LG:
1829 return SystemZ::LGAT;
1830 case SystemZ::LFH:
1831 return SystemZ::LFHAT;
1832 case SystemZ::LLGF:
1833 return SystemZ::LLGFAT;
1834 case SystemZ::LLGT:
1835 return SystemZ::LLGTAT;
1836 }
1837 return 0;
1838}
1839
1840void SystemZInstrInfo::loadImmediate(MachineBasicBlock &MBB,
1841 MachineBasicBlock::iterator MBBI,
1842 unsigned Reg, uint64_t Value) const {
1843 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
1844 unsigned Opcode;
1845 if (isInt<16>(Value))
1846 Opcode = SystemZ::LGHI;
1847 else if (SystemZ::isImmLL(Value))
1848 Opcode = SystemZ::LLILL;
1849 else if (SystemZ::isImmLH(Value)) {
1850 Opcode = SystemZ::LLILH;
1851 Value >>= 16;
1852 } else {
1853 assert(isInt<32>(Value) && "Huge values not handled yet")((isInt<32>(Value) && "Huge values not handled yet"
) ? static_cast<void> (0) : __assert_fail ("isInt<32>(Value) && \"Huge values not handled yet\""
, "/build/llvm-toolchain-snapshot-8~svn345461/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1853, __PRETTY_FUNCTION__))
;
1854 Opcode = SystemZ::LGFI;
1855 }
1856 BuildMI(MBB, MBBI, DL, get(Opcode), Reg).addImm(Value);
1857}
1858
1859bool SystemZInstrInfo::
1860areMemAccessesTriviallyDisjoint(MachineInstr &MIa, MachineInstr &MIb,
1861 AliasAnalysis *AA) const {
1862
1863 if (!MIa.hasOneMemOperand() || !MIb.hasOneMemOperand())
1864 return false;
1865
1866 // If mem-operands show that the same address Value is used by both
1867 // instructions, check for non-overlapping offsets and widths. Not
1868 // sure if a register based analysis would be an improvement...
1869
1870 MachineMemOperand *MMOa = *MIa.memoperands_begin();
1871 MachineMemOperand *MMOb = *MIb.memoperands_begin();
1872 const Value *VALa = MMOa->getValue();
1873 const Value *VALb = MMOb->getValue();
1874 bool SameVal = (VALa && VALb && (VALa == VALb));
1875 if (!SameVal) {
1876 const PseudoSourceValue *PSVa = MMOa->getPseudoValue();
1877 const PseudoSourceValue *PSVb = MMOb->getPseudoValue();
1878 if (PSVa && PSVb && (PSVa == PSVb))
1879 SameVal = true;
1880 }
1881 if (SameVal) {
1882 int OffsetA = MMOa->getOffset(), OffsetB = MMOb->getOffset();
1883 int WidthA = MMOa->getSize(), WidthB = MMOb->getSize();
1884 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB;
1885 int HighOffset = OffsetA < OffsetB ? OffsetB : OffsetA;
1886 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB;
1887 if (LowOffset + LowWidth <= HighOffset)
1888 return true;
1889 }
1890
1891 return false;
1892}

/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h

1//===-- llvm/Support/MathExtras.h - Useful math functions -------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains some functions that are useful for math stuff.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_SUPPORT_MATHEXTRAS_H
15#define LLVM_SUPPORT_MATHEXTRAS_H
16
17#include "llvm/Support/Compiler.h"
18#include "llvm/Support/SwapByteOrder.h"
19#include <algorithm>
20#include <cassert>
21#include <climits>
22#include <cstring>
23#include <limits>
24#include <type_traits>
25
26#ifdef __ANDROID_NDK__
27#include <android/api-level.h>
28#endif
29
30#ifdef _MSC_VER
31// Declare these intrinsics manually rather including intrin.h. It's very
32// expensive, and MathExtras.h is popular.
33// #include <intrin.h>
34extern "C" {
35unsigned char _BitScanForward(unsigned long *_Index, unsigned long _Mask);
36unsigned char _BitScanForward64(unsigned long *_Index, unsigned __int64 _Mask);
37unsigned char _BitScanReverse(unsigned long *_Index, unsigned long _Mask);
38unsigned char _BitScanReverse64(unsigned long *_Index, unsigned __int64 _Mask);
39}
40#endif
41
42namespace llvm {
43/// The behavior an operation has on an input of 0.
44enum ZeroBehavior {
45 /// The returned value is undefined.
46 ZB_Undefined,
47 /// The returned value is numeric_limits<T>::max()
48 ZB_Max,
49 /// The returned value is numeric_limits<T>::digits
50 ZB_Width
51};
52
53namespace detail {
54template <typename T, std::size_t SizeOfT> struct TrailingZerosCounter {
55 static std::size_t count(T Val, ZeroBehavior) {
56 if (!Val)
57 return std::numeric_limits<T>::digits;
58 if (Val & 0x1)
59 return 0;
60
61 // Bisection method.
62 std::size_t ZeroBits = 0;
63 T Shift = std::numeric_limits<T>::digits >> 1;
64 T Mask = std::numeric_limits<T>::max() >> Shift;
65 while (Shift) {
66 if ((Val & Mask) == 0) {
67 Val >>= Shift;
68 ZeroBits |= Shift;
69 }
70 Shift >>= 1;
71 Mask >>= Shift;
72 }
73 return ZeroBits;
74 }
75};
76
77#if __GNUC__4 >= 4 || defined(_MSC_VER)
78template <typename T> struct TrailingZerosCounter<T, 4> {
79 static std::size_t count(T Val, ZeroBehavior ZB) {
80 if (ZB != ZB_Undefined && Val == 0)
81 return 32;
82
83#if __has_builtin(__builtin_ctz)1 || LLVM_GNUC_PREREQ(4, 0, 0)((4 << 20) + (2 << 10) + 1 >= ((4) << 20
) + ((0) << 10) + (0))
84 return __builtin_ctz(Val);
85#elif defined(_MSC_VER)
86 unsigned long Index;
87 _BitScanForward(&Index, Val);
88 return Index;
89#endif
90 }
91};
92
93#if !defined(_MSC_VER) || defined(_M_X64)
94template <typename T> struct TrailingZerosCounter<T, 8> {
95 static std::size_t count(T Val, ZeroBehavior ZB) {
96 if (ZB != ZB_Undefined && Val == 0)
97 return 64;
98
99#if __has_builtin(__builtin_ctzll)1 || LLVM_GNUC_PREREQ(4, 0, 0)((4 << 20) + (2 << 10) + 1 >= ((4) << 20
) + ((0) << 10) + (0))
100 return __builtin_ctzll(Val);
101#elif defined(_MSC_VER)
102 unsigned long Index;
103 _BitScanForward64(&Index, Val);
104 return Index;
105#endif
106 }
107};
108#endif
109#endif
110} // namespace detail
111
112/// Count number of 0's from the least significant bit to the most
113/// stopping at the first 1.
114///
115/// Only unsigned integral types are allowed.
116///
117/// \param ZB the behavior on an input of 0. Only ZB_Width and ZB_Undefined are
118/// valid arguments.
119template <typename T>
120std::size_t countTrailingZeros(T Val, ZeroBehavior ZB = ZB_Width) {
121 static_assert(std::numeric_limits<T>::is_integer &&
122 !std::numeric_limits<T>::is_signed,
123 "Only unsigned integral types are allowed.");
124 return llvm::detail::TrailingZerosCounter<T, sizeof(T)>::count(Val, ZB);
125}
126
127namespace detail {
128template <typename T, std::size_t SizeOfT> struct LeadingZerosCounter {
129 static std::size_t count(T Val, ZeroBehavior) {
130 if (!Val)
131 return std::numeric_limits<T>::digits;
132
133 // Bisection method.
134 std::size_t ZeroBits = 0;
135 for (T Shift = std::numeric_limits<T>::digits >> 1; Shift; Shift >>= 1) {
136 T Tmp = Val >> Shift;
137 if (Tmp)
138 Val = Tmp;
139 else
140 ZeroBits |= Shift;
141 }
142 return ZeroBits;
143 }
144};
145
146#if __GNUC__4 >= 4 || defined(_MSC_VER)
147template <typename T> struct LeadingZerosCounter<T, 4> {
148 static std::size_t count(T Val, ZeroBehavior ZB) {
149 if (ZB != ZB_Undefined && Val == 0)
150 return 32;
151
152#if __has_builtin(__builtin_clz)1 || LLVM_GNUC_PREREQ(4, 0, 0)((4 << 20) + (2 << 10) + 1 >= ((4) << 20
) + ((0) << 10) + (0))
153 return __builtin_clz(Val);
154#elif defined(_MSC_VER)
155 unsigned long Index;
156 _BitScanReverse(&Index, Val);
157 return Index ^ 31;
158#endif
159 }
160};
161
162#if !defined(_MSC_VER) || defined(_M_X64)
163template <typename T> struct LeadingZerosCounter<T, 8> {
164 static std::size_t count(T Val, ZeroBehavior ZB) {
165 if (ZB != ZB_Undefined && Val == 0)
166 return 64;
167
168#if __has_builtin(__builtin_clzll)1 || LLVM_GNUC_PREREQ(4, 0, 0)((4 << 20) + (2 << 10) + 1 >= ((4) << 20
) + ((0) << 10) + (0))
169 return __builtin_clzll(Val);
170#elif defined(_MSC_VER)
171 unsigned long Index;
172 _BitScanReverse64(&Index, Val);
173 return Index ^ 63;
174#endif
175 }
176};
177#endif
178#endif
179} // namespace detail
180
181/// Count number of 0's from the most significant bit to the least
182/// stopping at the first 1.
183///
184/// Only unsigned integral types are allowed.
185///
186/// \param ZB the behavior on an input of 0. Only ZB_Width and ZB_Undefined are
187/// valid arguments.
188template <typename T>
189std::size_t countLeadingZeros(T Val, ZeroBehavior ZB = ZB_Width) {
190 static_assert(std::numeric_limits<T>::is_integer &&
191 !std::numeric_limits<T>::is_signed,
192 "Only unsigned integral types are allowed.");
193 return llvm::detail::LeadingZerosCounter<T, sizeof(T)>::count(Val, ZB);
194}
195
196/// Get the index of the first set bit starting from the least
197/// significant bit.
198///
199/// Only unsigned integral types are allowed.
200///
201/// \param ZB the behavior on an input of 0. Only ZB_Max and ZB_Undefined are
202/// valid arguments.
203template <typename T> T findFirstSet(T Val, ZeroBehavior ZB = ZB_Max) {
204 if (ZB == ZB_Max && Val == 0)
9
Assuming 'Val' is equal to 0
10
Taking true branch
205 return std::numeric_limits<T>::max();
11
Calling 'numeric_limits::max'
13
Returning from 'numeric_limits::max'
14
Returning the value 18446744073709551615
206
207 return countTrailingZeros(Val, ZB_Undefined);
208}
209
210/// Create a bitmask with the N right-most bits set to 1, and all other
211/// bits set to 0. Only unsigned types are allowed.
212template <typename T> T maskTrailingOnes(unsigned N) {
213 static_assert(std::is_unsigned<T>::value, "Invalid type!");
214 const unsigned Bits = CHAR_BIT8 * sizeof(T);
215 assert(N <= Bits && "Invalid bit index")((N <= Bits && "Invalid bit index") ? static_cast<
void> (0) : __assert_fail ("N <= Bits && \"Invalid bit index\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 215, __PRETTY_FUNCTION__))
;
216 return N == 0 ? 0 : (T(-1) >> (Bits - N));
217}
218
219/// Create a bitmask with the N left-most bits set to 1, and all other
220/// bits set to 0. Only unsigned types are allowed.
221template <typename T> T maskLeadingOnes(unsigned N) {
222 return ~maskTrailingOnes<T>(CHAR_BIT8 * sizeof(T) - N);
223}
224
225/// Create a bitmask with the N right-most bits set to 0, and all other
226/// bits set to 1. Only unsigned types are allowed.
227template <typename T> T maskTrailingZeros(unsigned N) {
228 return maskLeadingOnes<T>(CHAR_BIT8 * sizeof(T) - N);
229}
230
231/// Create a bitmask with the N left-most bits set to 0, and all other
232/// bits set to 1. Only unsigned types are allowed.
233template <typename T> T maskLeadingZeros(unsigned N) {
234 return maskTrailingOnes<T>(CHAR_BIT8 * sizeof(T) - N);
235}
236
237/// Get the index of the last set bit starting from the least
238/// significant bit.
239///
240/// Only unsigned integral types are allowed.
241///
242/// \param ZB the behavior on an input of 0. Only ZB_Max and ZB_Undefined are
243/// valid arguments.
244template <typename T> T findLastSet(T Val, ZeroBehavior ZB = ZB_Max) {
245 if (ZB == ZB_Max && Val == 0)
246 return std::numeric_limits<T>::max();
247
248 // Use ^ instead of - because both gcc and llvm can remove the associated ^
249 // in the __builtin_clz intrinsic on x86.
250 return countLeadingZeros(Val, ZB_Undefined) ^
251 (std::numeric_limits<T>::digits - 1);
252}
253
254/// Macro compressed bit reversal table for 256 bits.
255///
256/// http://graphics.stanford.edu/~seander/bithacks.html#BitReverseTable
257static const unsigned char BitReverseTable256[256] = {
258#define R2(n) n, n + 2 * 64, n + 1 * 64, n + 3 * 64
259#define R4(n) R2(n), R2(n + 2 * 16), R2(n + 1 * 16), R2(n + 3 * 16)
260#define R6(n) R4(n), R4(n + 2 * 4), R4(n + 1 * 4), R4(n + 3 * 4)
261 R6(0), R6(2), R6(1), R6(3)
262#undef R2
263#undef R4
264#undef R6
265};
266
267/// Reverse the bits in \p Val.
268template <typename T>
269T reverseBits(T Val) {
270 unsigned char in[sizeof(Val)];
271 unsigned char out[sizeof(Val)];
272 std::memcpy(in, &Val, sizeof(Val));
273 for (unsigned i = 0; i < sizeof(Val); ++i)
274 out[(sizeof(Val) - i) - 1] = BitReverseTable256[in[i]];
275 std::memcpy(&Val, out, sizeof(Val));
276 return Val;
277}
278
279// NOTE: The following support functions use the _32/_64 extensions instead of
280// type overloading so that signed and unsigned integers can be used without
281// ambiguity.
282
283/// Return the high 32 bits of a 64 bit value.
284constexpr inline uint32_t Hi_32(uint64_t Value) {
285 return static_cast<uint32_t>(Value >> 32);
286}
287
288/// Return the low 32 bits of a 64 bit value.
289constexpr inline uint32_t Lo_32(uint64_t Value) {
290 return static_cast<uint32_t>(Value);
291}
292
293/// Make a 64-bit integer from a high / low pair of 32-bit integers.
294constexpr inline uint64_t Make_64(uint32_t High, uint32_t Low) {
295 return ((uint64_t)High << 32) | (uint64_t)Low;
296}
297
298/// Checks if an integer fits into the given bit width.
299template <unsigned N> constexpr inline bool isInt(int64_t x) {
300 return N >= 64 || (-(INT64_C(1)1L<<(N-1)) <= x && x < (INT64_C(1)1L<<(N-1)));
301}
302// Template specializations to get better code for common cases.
303template <> constexpr inline bool isInt<8>(int64_t x) {
304 return static_cast<int8_t>(x) == x;
305}
306template <> constexpr inline bool isInt<16>(int64_t x) {
307 return static_cast<int16_t>(x) == x;
308}
309template <> constexpr inline bool isInt<32>(int64_t x) {
310 return static_cast<int32_t>(x) == x;
311}
312
313/// Checks if a signed integer is an N bit number shifted left by S.
314template <unsigned N, unsigned S>
315constexpr inline bool isShiftedInt(int64_t x) {
316 static_assert(
317 N > 0, "isShiftedInt<0> doesn't make sense (refers to a 0-bit number.");
318 static_assert(N + S <= 64, "isShiftedInt<N, S> with N + S > 64 is too wide.");
319 return isInt<N + S>(x) && (x % (UINT64_C(1)1UL << S) == 0);
320}
321
322/// Checks if an unsigned integer fits into the given bit width.
323///
324/// This is written as two functions rather than as simply
325///
326/// return N >= 64 || X < (UINT64_C(1) << N);
327///
328/// to keep MSVC from (incorrectly) warning on isUInt<64> that we're shifting
329/// left too many places.
330template <unsigned N>
331constexpr inline typename std::enable_if<(N < 64), bool>::type
332isUInt(uint64_t X) {
333 static_assert(N > 0, "isUInt<0> doesn't make sense");
334 return X < (UINT64_C(1)1UL << (N));
335}
336template <unsigned N>
337constexpr inline typename std::enable_if<N >= 64, bool>::type
338isUInt(uint64_t X) {
339 return true;
340}
341
342// Template specializations to get better code for common cases.
343template <> constexpr inline bool isUInt<8>(uint64_t x) {
344 return static_cast<uint8_t>(x) == x;
345}
346template <> constexpr inline bool isUInt<16>(uint64_t x) {
347 return static_cast<uint16_t>(x) == x;
348}
349template <> constexpr inline bool isUInt<32>(uint64_t x) {
350 return static_cast<uint32_t>(x) == x;
351}
352
353/// Checks if a unsigned integer is an N bit number shifted left by S.
354template <unsigned N, unsigned S>
355constexpr inline bool isShiftedUInt(uint64_t x) {
356 static_assert(
357 N > 0, "isShiftedUInt<0> doesn't make sense (refers to a 0-bit number)");
358 static_assert(N + S <= 64,
359 "isShiftedUInt<N, S> with N + S > 64 is too wide.");
360 // Per the two static_asserts above, S must be strictly less than 64. So
361 // 1 << S is not undefined behavior.
362 return isUInt<N + S>(x) && (x % (UINT64_C(1)1UL << S) == 0);
363}
364
365/// Gets the maximum value for a N-bit unsigned integer.
366inline uint64_t maxUIntN(uint64_t N) {
367 assert(N > 0 && N <= 64 && "integer width out of range")((N > 0 && N <= 64 && "integer width out of range"
) ? static_cast<void> (0) : __assert_fail ("N > 0 && N <= 64 && \"integer width out of range\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 367, __PRETTY_FUNCTION__))
;
368
369 // uint64_t(1) << 64 is undefined behavior, so we can't do
370 // (uint64_t(1) << N) - 1
371 // without checking first that N != 64. But this works and doesn't have a
372 // branch.
373 return UINT64_MAX(18446744073709551615UL) >> (64 - N);
374}
375
376/// Gets the minimum value for a N-bit signed integer.
377inline int64_t minIntN(int64_t N) {
378 assert(N > 0 && N <= 64 && "integer width out of range")((N > 0 && N <= 64 && "integer width out of range"
) ? static_cast<void> (0) : __assert_fail ("N > 0 && N <= 64 && \"integer width out of range\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 378, __PRETTY_FUNCTION__))
;
379
380 return -(UINT64_C(1)1UL<<(N-1));
381}
382
383/// Gets the maximum value for a N-bit signed integer.
384inline int64_t maxIntN(int64_t N) {
385 assert(N > 0 && N <= 64 && "integer width out of range")((N > 0 && N <= 64 && "integer width out of range"
) ? static_cast<void> (0) : __assert_fail ("N > 0 && N <= 64 && \"integer width out of range\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 385, __PRETTY_FUNCTION__))
;
386
387 // This relies on two's complement wraparound when N == 64, so we convert to
388 // int64_t only at the very end to avoid UB.
389 return (UINT64_C(1)1UL << (N - 1)) - 1;
390}
391
392/// Checks if an unsigned integer fits into the given (dynamic) bit width.
393inline bool isUIntN(unsigned N, uint64_t x) {
394 return N >= 64 || x <= maxUIntN(N);
395}
396
397/// Checks if an signed integer fits into the given (dynamic) bit width.
398inline bool isIntN(unsigned N, int64_t x) {
399 return N >= 64 || (minIntN(N) <= x && x <= maxIntN(N));
400}
401
402/// Return true if the argument is a non-empty sequence of ones starting at the
403/// least significant bit with the remainder zero (32 bit version).
404/// Ex. isMask_32(0x0000FFFFU) == true.
405constexpr inline bool isMask_32(uint32_t Value) {
406 return Value && ((Value + 1) & Value) == 0;
407}
408
409/// Return true if the argument is a non-empty sequence of ones starting at the
410/// least significant bit with the remainder zero (64 bit version).
411constexpr inline bool isMask_64(uint64_t Value) {
412 return Value && ((Value + 1) & Value) == 0;
413}
414
415/// Return true if the argument contains a non-empty sequence of ones with the
416/// remainder zero (32 bit version.) Ex. isShiftedMask_32(0x0000FF00U) == true.
417constexpr inline bool isShiftedMask_32(uint32_t Value) {
418 return Value && isMask_32((Value - 1) | Value);
419}
420
421/// Return true if the argument contains a non-empty sequence of ones with the
422/// remainder zero (64 bit version.)
423constexpr inline bool isShiftedMask_64(uint64_t Value) {
424 return Value && isMask_64((Value - 1) | Value);
425}
426
427/// Return true if the argument is a power of two > 0.
428/// Ex. isPowerOf2_32(0x00100000U) == true (32 bit edition.)
429constexpr inline bool isPowerOf2_32(uint32_t Value) {
430 return Value && !(Value & (Value - 1));
431}
432
433/// Return true if the argument is a power of two > 0 (64 bit edition.)
434constexpr inline bool isPowerOf2_64(uint64_t Value) {
435 return Value && !(Value & (Value - 1));
436}
437
438/// Return a byte-swapped representation of the 16-bit argument.
439inline uint16_t ByteSwap_16(uint16_t Value) {
440 return sys::SwapByteOrder_16(Value);
441}
442
443/// Return a byte-swapped representation of the 32-bit argument.
444inline uint32_t ByteSwap_32(uint32_t Value) {
445 return sys::SwapByteOrder_32(Value);
446}
447
448/// Return a byte-swapped representation of the 64-bit argument.
449inline uint64_t ByteSwap_64(uint64_t Value) {
450 return sys::SwapByteOrder_64(Value);
451}
452
453/// Count the number of ones from the most significant bit to the first
454/// zero bit.
455///
456/// Ex. countLeadingOnes(0xFF0FFF00) == 8.
457/// Only unsigned integral types are allowed.
458///
459/// \param ZB the behavior on an input of all ones. Only ZB_Width and
460/// ZB_Undefined are valid arguments.
461template <typename T>
462std::size_t countLeadingOnes(T Value, ZeroBehavior ZB = ZB_Width) {
463 static_assert(std::numeric_limits<T>::is_integer &&
464 !std::numeric_limits<T>::is_signed,
465 "Only unsigned integral types are allowed.");
466 return countLeadingZeros<T>(~Value, ZB);
467}
468
469/// Count the number of ones from the least significant bit to the first
470/// zero bit.
471///
472/// Ex. countTrailingOnes(0x00FF00FF) == 8.
473/// Only unsigned integral types are allowed.
474///
475/// \param ZB the behavior on an input of all ones. Only ZB_Width and
476/// ZB_Undefined are valid arguments.
477template <typename T>
478std::size_t countTrailingOnes(T Value, ZeroBehavior ZB = ZB_Width) {
479 static_assert(std::numeric_limits<T>::is_integer &&
480 !std::numeric_limits<T>::is_signed,
481 "Only unsigned integral types are allowed.");
482 return countTrailingZeros<T>(~Value, ZB);
483}
484
485namespace detail {
486template <typename T, std::size_t SizeOfT> struct PopulationCounter {
487 static unsigned count(T Value) {
488 // Generic version, forward to 32 bits.
489 static_assert(SizeOfT <= 4, "Not implemented!");
490#if __GNUC__4 >= 4
491 return __builtin_popcount(Value);
492#else
493 uint32_t v = Value;
494 v = v - ((v >> 1) & 0x55555555);
495 v = (v & 0x33333333) + ((v >> 2) & 0x33333333);
496 return ((v + (v >> 4) & 0xF0F0F0F) * 0x1010101) >> 24;
497#endif
498 }
499};
500
501template <typename T> struct PopulationCounter<T, 8> {
502 static unsigned count(T Value) {
503#if __GNUC__4 >= 4
504 return __builtin_popcountll(Value);
505#else
506 uint64_t v = Value;
507 v = v - ((v >> 1) & 0x5555555555555555ULL);
508 v = (v & 0x3333333333333333ULL) + ((v >> 2) & 0x3333333333333333ULL);
509 v = (v + (v >> 4)) & 0x0F0F0F0F0F0F0F0FULL;
510 return unsigned((uint64_t)(v * 0x0101010101010101ULL) >> 56);
511#endif
512 }
513};
514} // namespace detail
515
516/// Count the number of set bits in a value.
517/// Ex. countPopulation(0xF000F000) = 8
518/// Returns 0 if the word is zero.
519template <typename T>
520inline unsigned countPopulation(T Value) {
521 static_assert(std::numeric_limits<T>::is_integer &&
522 !std::numeric_limits<T>::is_signed,
523 "Only unsigned integral types are allowed.");
524 return detail::PopulationCounter<T, sizeof(T)>::count(Value);
525}
526
527/// Return the log base 2 of the specified value.
528inline double Log2(double Value) {
529#if defined(__ANDROID_API__) && __ANDROID_API__ < 18
530 return __builtin_log(Value) / __builtin_log(2.0);
531#else
532 return log2(Value);
533#endif
534}
535
536/// Return the floor log base 2 of the specified value, -1 if the value is zero.
537/// (32 bit edition.)
538/// Ex. Log2_32(32) == 5, Log2_32(1) == 0, Log2_32(0) == -1, Log2_32(6) == 2
539inline unsigned Log2_32(uint32_t Value) {
540 return 31 - countLeadingZeros(Value);
541}
542
543/// Return the floor log base 2 of the specified value, -1 if the value is zero.
544/// (64 bit edition.)
545inline unsigned Log2_64(uint64_t Value) {
546 return 63 - countLeadingZeros(Value);
547}
548
549/// Return the ceil log base 2 of the specified value, 32 if the value is zero.
550/// (32 bit edition).
551/// Ex. Log2_32_Ceil(32) == 5, Log2_32_Ceil(1) == 0, Log2_32_Ceil(6) == 3
552inline unsigned Log2_32_Ceil(uint32_t Value) {
553 return 32 - countLeadingZeros(Value - 1);
554}
555
556/// Return the ceil log base 2 of the specified value, 64 if the value is zero.
557/// (64 bit edition.)
558inline unsigned Log2_64_Ceil(uint64_t Value) {
559 return 64 - countLeadingZeros(Value - 1);
560}
561
562/// Return the greatest common divisor of the values using Euclid's algorithm.
563inline uint64_t GreatestCommonDivisor64(uint64_t A, uint64_t B) {
564 while (B) {
565 uint64_t T = B;
566 B = A % B;
567 A = T;
568 }
569 return A;
570}
571
572/// This function takes a 64-bit integer and returns the bit equivalent double.
573inline double BitsToDouble(uint64_t Bits) {
574 double D;
575 static_assert(sizeof(uint64_t) == sizeof(double), "Unexpected type sizes");
576 memcpy(&D, &Bits, sizeof(Bits));
577 return D;
578}
579
580/// This function takes a 32-bit integer and returns the bit equivalent float.
581inline float BitsToFloat(uint32_t Bits) {
582 float F;
583 static_assert(sizeof(uint32_t) == sizeof(float), "Unexpected type sizes");
584 memcpy(&F, &Bits, sizeof(Bits));
585 return F;
586}
587
588/// This function takes a double and returns the bit equivalent 64-bit integer.
589/// Note that copying doubles around changes the bits of NaNs on some hosts,
590/// notably x86, so this routine cannot be used if these bits are needed.
591inline uint64_t DoubleToBits(double Double) {
592 uint64_t Bits;
593 static_assert(sizeof(uint64_t) == sizeof(double), "Unexpected type sizes");
594 memcpy(&Bits, &Double, sizeof(Double));
595 return Bits;
596}
597
598/// This function takes a float and returns the bit equivalent 32-bit integer.
599/// Note that copying floats around changes the bits of NaNs on some hosts,
600/// notably x86, so this routine cannot be used if these bits are needed.
601inline uint32_t FloatToBits(float Float) {
602 uint32_t Bits;
603 static_assert(sizeof(uint32_t) == sizeof(float), "Unexpected type sizes");
604 memcpy(&Bits, &Float, sizeof(Float));
605 return Bits;
606}
607
608/// A and B are either alignments or offsets. Return the minimum alignment that
609/// may be assumed after adding the two together.
610constexpr inline uint64_t MinAlign(uint64_t A, uint64_t B) {
611 // The largest power of 2 that divides both A and B.
612 //
613 // Replace "-Value" by "1+~Value" in the following commented code to avoid
614 // MSVC warning C4146
615 // return (A | B) & -(A | B);
616 return (A | B) & (1 + ~(A | B));
617}
618
619/// Aligns \c Addr to \c Alignment bytes, rounding up.
620///
621/// Alignment should be a power of two. This method rounds up, so
622/// alignAddr(7, 4) == 8 and alignAddr(8, 4) == 8.
623inline uintptr_t alignAddr(const void *Addr, size_t Alignment) {
624 assert(Alignment && isPowerOf2_64((uint64_t)Alignment) &&((Alignment && isPowerOf2_64((uint64_t)Alignment) &&
"Alignment is not a power of two!") ? static_cast<void>
(0) : __assert_fail ("Alignment && isPowerOf2_64((uint64_t)Alignment) && \"Alignment is not a power of two!\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 625, __PRETTY_FUNCTION__))
625 "Alignment is not a power of two!")((Alignment && isPowerOf2_64((uint64_t)Alignment) &&
"Alignment is not a power of two!") ? static_cast<void>
(0) : __assert_fail ("Alignment && isPowerOf2_64((uint64_t)Alignment) && \"Alignment is not a power of two!\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 625, __PRETTY_FUNCTION__))
;
626
627 assert((uintptr_t)Addr + Alignment - 1 >= (uintptr_t)Addr)(((uintptr_t)Addr + Alignment - 1 >= (uintptr_t)Addr) ? static_cast
<void> (0) : __assert_fail ("(uintptr_t)Addr + Alignment - 1 >= (uintptr_t)Addr"
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 627, __PRETTY_FUNCTION__))
;
628
629 return (((uintptr_t)Addr + Alignment - 1) & ~(uintptr_t)(Alignment - 1));
630}
631
632/// Returns the necessary adjustment for aligning \c Ptr to \c Alignment
633/// bytes, rounding up.
634inline size_t alignmentAdjustment(const void *Ptr, size_t Alignment) {
635 return alignAddr(Ptr, Alignment) - (uintptr_t)Ptr;
636}
637
638/// Returns the next power of two (in 64-bits) that is strictly greater than A.
639/// Returns zero on overflow.
640inline uint64_t NextPowerOf2(uint64_t A) {
641 A |= (A >> 1);
642 A |= (A >> 2);
643 A |= (A >> 4);
644 A |= (A >> 8);
645 A |= (A >> 16);
646 A |= (A >> 32);
647 return A + 1;
648}
649
650/// Returns the power of two which is less than or equal to the given value.
651/// Essentially, it is a floor operation across the domain of powers of two.
652inline uint64_t PowerOf2Floor(uint64_t A) {
653 if (!A) return 0;
654 return 1ull << (63 - countLeadingZeros(A, ZB_Undefined));
655}
656
657/// Returns the power of two which is greater than or equal to the given value.
658/// Essentially, it is a ceil operation across the domain of powers of two.
659inline uint64_t PowerOf2Ceil(uint64_t A) {
660 if (!A)
661 return 0;
662 return NextPowerOf2(A - 1);
663}
664
665/// Returns the next integer (mod 2**64) that is greater than or equal to
666/// \p Value and is a multiple of \p Align. \p Align must be non-zero.
667///
668/// If non-zero \p Skew is specified, the return value will be a minimal
669/// integer that is greater than or equal to \p Value and equal to
670/// \p Align * N + \p Skew for some integer N. If \p Skew is larger than
671/// \p Align, its value is adjusted to '\p Skew mod \p Align'.
672///
673/// Examples:
674/// \code
675/// alignTo(5, 8) = 8
676/// alignTo(17, 8) = 24
677/// alignTo(~0LL, 8) = 0
678/// alignTo(321, 255) = 510
679///
680/// alignTo(5, 8, 7) = 7
681/// alignTo(17, 8, 1) = 17
682/// alignTo(~0LL, 8, 3) = 3
683/// alignTo(321, 255, 42) = 552
684/// \endcode
685inline uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew = 0) {
686 assert(Align != 0u && "Align can't be 0.")((Align != 0u && "Align can't be 0.") ? static_cast<
void> (0) : __assert_fail ("Align != 0u && \"Align can't be 0.\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 686, __PRETTY_FUNCTION__))
;
687 Skew %= Align;
688 return (Value + Align - 1 - Skew) / Align * Align + Skew;
689}
690
691/// Returns the next integer (mod 2**64) that is greater than or equal to
692/// \p Value and is a multiple of \c Align. \c Align must be non-zero.
693template <uint64_t Align> constexpr inline uint64_t alignTo(uint64_t Value) {
694 static_assert(Align != 0u, "Align must be non-zero");
695 return (Value + Align - 1) / Align * Align;
696}
697
698/// Returns the integer ceil(Numerator / Denominator).
699inline uint64_t divideCeil(uint64_t Numerator, uint64_t Denominator) {
700 return alignTo(Numerator, Denominator) / Denominator;
701}
702
703/// \c alignTo for contexts where a constant expression is required.
704/// \sa alignTo
705///
706/// \todo FIXME: remove when \c constexpr becomes really \c constexpr
707template <uint64_t Align>
708struct AlignTo {
709 static_assert(Align != 0u, "Align must be non-zero");
710 template <uint64_t Value>
711 struct from_value {
712 static const uint64_t value = (Value + Align - 1) / Align * Align;
713 };
714};
715
716/// Returns the largest uint64_t less than or equal to \p Value and is
717/// \p Skew mod \p Align. \p Align must be non-zero
718inline uint64_t alignDown(uint64_t Value, uint64_t Align, uint64_t Skew = 0) {
719 assert(Align != 0u && "Align can't be 0.")((Align != 0u && "Align can't be 0.") ? static_cast<
void> (0) : __assert_fail ("Align != 0u && \"Align can't be 0.\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 719, __PRETTY_FUNCTION__))
;
720 Skew %= Align;
721 return (Value - Skew) / Align * Align + Skew;
722}
723
724/// Returns the offset to the next integer (mod 2**64) that is greater than
725/// or equal to \p Value and is a multiple of \p Align. \p Align must be
726/// non-zero.
727inline uint64_t OffsetToAlignment(uint64_t Value, uint64_t Align) {
728 return alignTo(Value, Align) - Value;
729}
730
731/// Sign-extend the number in the bottom B bits of X to a 32-bit integer.
732/// Requires 0 < B <= 32.
733template <unsigned B> constexpr inline int32_t SignExtend32(uint32_t X) {
734 static_assert(B > 0, "Bit width can't be 0.");
735 static_assert(B <= 32, "Bit width out of range.");
736 return int32_t(X << (32 - B)) >> (32 - B);
737}
738
739/// Sign-extend the number in the bottom B bits of X to a 32-bit integer.
740/// Requires 0 < B < 32.
741inline int32_t SignExtend32(uint32_t X, unsigned B) {
742 assert(B > 0 && "Bit width can't be 0.")((B > 0 && "Bit width can't be 0.") ? static_cast<
void> (0) : __assert_fail ("B > 0 && \"Bit width can't be 0.\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 742, __PRETTY_FUNCTION__))
;
743 assert(B <= 32 && "Bit width out of range.")((B <= 32 && "Bit width out of range.") ? static_cast
<void> (0) : __assert_fail ("B <= 32 && \"Bit width out of range.\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 743, __PRETTY_FUNCTION__))
;
744 return int32_t(X << (32 - B)) >> (32 - B);
745}
746
747/// Sign-extend the number in the bottom B bits of X to a 64-bit integer.
748/// Requires 0 < B < 64.
749template <unsigned B> constexpr inline int64_t SignExtend64(uint64_t x) {
750 static_assert(B > 0, "Bit width can't be 0.");
751 static_assert(B <= 64, "Bit width out of range.");
752 return int64_t(x << (64 - B)) >> (64 - B);
753}
754
755/// Sign-extend the number in the bottom B bits of X to a 64-bit integer.
756/// Requires 0 < B < 64.
757inline int64_t SignExtend64(uint64_t X, unsigned B) {
758 assert(B > 0 && "Bit width can't be 0.")((B > 0 && "Bit width can't be 0.") ? static_cast<
void> (0) : __assert_fail ("B > 0 && \"Bit width can't be 0.\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 758, __PRETTY_FUNCTION__))
;
759 assert(B <= 64 && "Bit width out of range.")((B <= 64 && "Bit width out of range.") ? static_cast
<void> (0) : __assert_fail ("B <= 64 && \"Bit width out of range.\""
, "/build/llvm-toolchain-snapshot-8~svn345461/include/llvm/Support/MathExtras.h"
, 759, __PRETTY_FUNCTION__))
;
760 return int64_t(X << (64 - B)) >> (64 - B);
761}
762
763/// Subtract two unsigned integers, X and Y, of type T and return the absolute
764/// value of the result.
765template <typename T>
766typename std::enable_if<std::is_unsigned<T>::value, T>::type
767AbsoluteDifference(T X, T Y) {
768 return std::max(X, Y) - std::min(X, Y);
769}
770
771/// Add two unsigned integers, X and Y, of type T. Clamp the result to the
772/// maximum representable value of T on overflow. ResultOverflowed indicates if
773/// the result is larger than the maximum representable value of type T.
774template <typename T>
775typename std::enable_if<std::is_unsigned<T>::value, T>::type
776SaturatingAdd(T X, T Y, bool *ResultOverflowed = nullptr) {
777 bool Dummy;
778 bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
779 // Hacker's Delight, p. 29
780 T Z = X + Y;
781 Overflowed = (Z < X || Z < Y);
782 if (Overflowed)
783 return std::numeric_limits<T>::max();
784 else
785 return Z;
786}
787
788/// Multiply two unsigned integers, X and Y, of type T. Clamp the result to the
789/// maximum representable value of T on overflow. ResultOverflowed indicates if
790/// the result is larger than the maximum representable value of type T.
791template <typename T>
792typename std::enable_if<std::is_unsigned<T>::value, T>::type
793SaturatingMultiply(T X, T Y, bool *ResultOverflowed = nullptr) {
794 bool Dummy;
795 bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
796
797 // Hacker's Delight, p. 30 has a different algorithm, but we don't use that
798 // because it fails for uint16_t (where multiplication can have undefined
799 // behavior due to promotion to int), and requires a division in addition
800 // to the multiplication.
801
802 Overflowed = false;
803
804 // Log2(Z) would be either Log2Z or Log2Z + 1.
805 // Special case: if X or Y is 0, Log2_64 gives -1, and Log2Z
806 // will necessarily be less than Log2Max as desired.
807 int Log2Z = Log2_64(X) + Log2_64(Y);
808 const T Max = std::numeric_limits<T>::max();
809 int Log2Max = Log2_64(Max);
810 if (Log2Z < Log2Max) {
811 return X * Y;
812 }
813 if (Log2Z > Log2Max) {
814 Overflowed = true;
815 return Max;
816 }
817
818 // We're going to use the top bit, and maybe overflow one
819 // bit past it. Multiply all but the bottom bit then add
820 // that on at the end.
821 T Z = (X >> 1) * Y;
822 if (Z & ~(Max >> 1)) {
823 Overflowed = true;
824 return Max;
825 }
826 Z <<= 1;
827 if (X & 1)
828 return SaturatingAdd(Z, Y, ResultOverflowed);
829
830 return Z;
831}
832
833/// Multiply two unsigned integers, X and Y, and add the unsigned integer, A to
834/// the product. Clamp the result to the maximum representable value of T on
835/// overflow. ResultOverflowed indicates if the result is larger than the
836/// maximum representable value of type T.
837template <typename T>
838typename std::enable_if<std::is_unsigned<T>::value, T>::type
839SaturatingMultiplyAdd(T X, T Y, T A, bool *ResultOverflowed = nullptr) {
840 bool Dummy;
841 bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
842
843 T Product = SaturatingMultiply(X, Y, &Overflowed);
844 if (Overflowed)
845 return Product;
846
847 return SaturatingAdd(A, Product, &Overflowed);
848}
849
850/// Use this rather than HUGE_VALF; the latter causes warnings on MSVC.
851extern const float huge_valf;
852} // End llvm namespace
853
854#endif

/usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/limits

1// The template and inlines for the numeric_limits classes. -*- C++ -*-
2
3// Copyright (C) 1999-2016 Free Software Foundation, Inc.
4//
5// This file is part of the GNU ISO C++ Library. This library is free
6// software; you can redistribute it and/or modify it under the
7// terms of the GNU General Public License as published by the
8// Free Software Foundation; either version 3, or (at your option)
9// any later version.
10
11// This library is distributed in the hope that it will be useful,
12// but WITHOUT ANY WARRANTY; without even the implied warranty of
13// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14// GNU General Public License for more details.
15
16// Under Section 7 of GPL version 3, you are granted additional
17// permissions described in the GCC Runtime Library Exception, version
18// 3.1, as published by the Free Software Foundation.
19
20// You should have received a copy of the GNU General Public License and
21// a copy of the GCC Runtime Library Exception along with this program;
22// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
23// <http://www.gnu.org/licenses/>.
24
25/** @file include/limits
26 * This is a Standard C++ Library header.
27 */
28
29// Note: this is not a conforming implementation.
30// Written by Gabriel Dos Reis <gdr@codesourcery.com>
31
32//
33// ISO 14882:1998
34// 18.2.1
35//
36
37#ifndef _GLIBCXX_NUMERIC_LIMITS1
38#define _GLIBCXX_NUMERIC_LIMITS1 1
39
40#pragma GCC system_header
41
42#include <bits/c++config.h>
43
44//
45// The numeric_limits<> traits document implementation-defined aspects
46// of fundamental arithmetic data types (integers and floating points).
47// From Standard C++ point of view, there are 14 such types:
48// * integers
49// bool (1)
50// char, signed char, unsigned char, wchar_t (4)
51// short, unsigned short (2)
52// int, unsigned (2)
53// long, unsigned long (2)
54//
55// * floating points
56// float (1)
57// double (1)
58// long double (1)
59//
60// GNU C++ understands (where supported by the host C-library)
61// * integer
62// long long, unsigned long long (2)
63//
64// which brings us to 16 fundamental arithmetic data types in GNU C++.
65//
66//
67// Since a numeric_limits<> is a bit tricky to get right, we rely on
68// an interface composed of macros which should be defined in config/os
69// or config/cpu when they differ from the generic (read arbitrary)
70// definitions given here.
71//
72
73// These values can be overridden in the target configuration file.
74// The default values are appropriate for many 32-bit targets.
75
76// GCC only intrinsically supports modulo integral types. The only remaining
77// integral exceptional values is division by zero. Only targets that do not
78// signal division by zero in some "hard to ignore" way should use false.
79#ifndef __glibcxx_integral_trapstrue
80# define __glibcxx_integral_trapstrue true
81#endif
82
83// float
84//
85
86// Default values. Should be overridden in configuration files if necessary.
87
88#ifndef __glibcxx_float_has_denorm_loss
89# define __glibcxx_float_has_denorm_loss false
90#endif
91#ifndef __glibcxx_float_traps
92# define __glibcxx_float_traps false
93#endif
94#ifndef __glibcxx_float_tinyness_before
95# define __glibcxx_float_tinyness_before false
96#endif
97
98// double
99
100// Default values. Should be overridden in configuration files if necessary.
101
102#ifndef __glibcxx_double_has_denorm_loss
103# define __glibcxx_double_has_denorm_loss false
104#endif
105#ifndef __glibcxx_double_traps
106# define __glibcxx_double_traps false
107#endif
108#ifndef __glibcxx_double_tinyness_before
109# define __glibcxx_double_tinyness_before false
110#endif
111
112// long double
113
114// Default values. Should be overridden in configuration files if necessary.
115
116#ifndef __glibcxx_long_double_has_denorm_loss
117# define __glibcxx_long_double_has_denorm_loss false
118#endif
119#ifndef __glibcxx_long_double_traps
120# define __glibcxx_long_double_traps false
121#endif
122#ifndef __glibcxx_long_double_tinyness_before
123# define __glibcxx_long_double_tinyness_before false
124#endif
125
126// You should not need to define any macros below this point.
127
128#define __glibcxx_signed_b(T,B)((T)(-1) < 0) ((T)(-1) < 0)
129
130#define __glibcxx_min_b(T,B)(((T)(-1) < 0) ? -(((T)(-1) < 0) ? (((((T)1 << ((
B - ((T)(-1) < 0)) - 1)) - 1) << 1) + 1) : ~(T)0) - 1
: (T)0)
\
131 (__glibcxx_signed_b (T,B)((T)(-1) < 0) ? -__glibcxx_max_b (T,B)(((T)(-1) < 0) ? (((((T)1 << ((B - ((T)(-1) < 0))
- 1)) - 1) << 1) + 1) : ~(T)0)
- 1 : (T)0)
132
133#define __glibcxx_max_b(T,B)(((T)(-1) < 0) ? (((((T)1 << ((B - ((T)(-1) < 0))
- 1)) - 1) << 1) + 1) : ~(T)0)
\
134 (__glibcxx_signed_b (T,B)((T)(-1) < 0) ? \
135 (((((T)1 << (__glibcxx_digits_b (T,B)(B - ((T)(-1) < 0)) - 1)) - 1) << 1) + 1) : ~(T)0)
136
137#define __glibcxx_digits_b(T,B)(B - ((T)(-1) < 0)) \
138 (B - __glibcxx_signed_b (T,B)((T)(-1) < 0))
139
140// The fraction 643/2136 approximates log10(2) to 7 significant digits.
141#define __glibcxx_digits10_b(T,B)((B - ((T)(-1) < 0)) * 643L / 2136) \
142 (__glibcxx_digits_b (T,B)(B - ((T)(-1) < 0)) * 643L / 2136)
143
144#define __glibcxx_signed(T) \
145 __glibcxx_signed_b (T, sizeof(T) * __CHAR_BIT__)((T)(-1) < 0)
146#define __glibcxx_min(T) \
147 __glibcxx_min_b (T, sizeof(T) * __CHAR_BIT__)(((T)(-1) < 0) ? -(((T)(-1) < 0) ? (((((T)1 << ((
sizeof(T) * 8 - ((T)(-1) < 0)) - 1)) - 1) << 1) + 1)
: ~(T)0) - 1 : (T)0)
148#define __glibcxx_max(T) \
149 __glibcxx_max_b (T, sizeof(T) * __CHAR_BIT__)(((T)(-1) < 0) ? (((((T)1 << ((sizeof(T) * 8 - ((T)(
-1) < 0)) - 1)) - 1) << 1) + 1) : ~(T)0)
150#define __glibcxx_digits(T) \
151 __glibcxx_digits_b (T, sizeof(T) * __CHAR_BIT__)(sizeof(T) * 8 - ((T)(-1) < 0))
152#define __glibcxx_digits10(T) \
153 __glibcxx_digits10_b (T, sizeof(T) * __CHAR_BIT__)((sizeof(T) * 8 - ((T)(-1) < 0)) * 643L / 2136)
154
155#define __glibcxx_max_digits10(T) \
156 (2 + (T) * 643L / 2136)
157
158namespace std _GLIBCXX_VISIBILITY(default)__attribute__ ((__visibility__ ("default")))
159{
160_GLIBCXX_BEGIN_NAMESPACE_VERSION
161
162 /**
163 * @brief Describes the rounding style for floating-point types.
164 *
165 * This is used in the std::numeric_limits class.
166 */
167 enum float_round_style
168 {
169 round_indeterminate = -1, /// Intermediate.
170 round_toward_zero = 0, /// To zero.
171 round_to_nearest = 1, /// To the nearest representable value.
172 round_toward_infinity = 2, /// To infinity.
173 round_toward_neg_infinity = 3 /// To negative infinity.
174 };
175
176 /**
177 * @brief Describes the denormalization for floating-point types.
178 *
179 * These values represent the presence or absence of a variable number
180 * of exponent bits. This type is used in the std::numeric_limits class.
181 */
182 enum float_denorm_style
183 {
184 /// Indeterminate at compile time whether denormalized values are allowed.
185 denorm_indeterminate = -1,
186 /// The type does not allow denormalized values.
187 denorm_absent = 0,
188 /// The type allows denormalized values.
189 denorm_present = 1
190 };
191
192 /**
193 * @brief Part of std::numeric_limits.
194 *
195 * The @c static @c const members are usable as integral constant
196 * expressions.
197 *
198 * @note This is a separate class for purposes of efficiency; you
199 * should only access these members as part of an instantiation
200 * of the std::numeric_limits class.
201 */
202 struct __numeric_limits_base
203 {
204 /** This will be true for all fundamental types (which have
205 specializations), and false for everything else. */
206 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = false;
207
208 /** The number of @c radix digits that be represented without change: for
209 integer types, the number of non-sign bits in the mantissa; for
210 floating types, the number of @c radix digits in the mantissa. */
211 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = 0;
212
213 /** The number of base 10 digits that can be represented without change. */
214 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = 0;
215
216#if __cplusplus201103L >= 201103L
217 /** The number of base 10 digits required to ensure that values which
218 differ are always differentiated. */
219 static constexpr int max_digits10 = 0;
220#endif
221
222 /** True if the type is signed. */
223 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
224
225 /** True if the type is integer. */
226 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
227
228 /** True if the type uses an exact representation. All integer types are
229 exact, but not all exact types are integer. For example, rational and
230 fixed-exponent representations are exact but not integer. */
231 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
232
233 /** For integer types, specifies the base of the representation. For
234 floating types, specifies the base of the exponent representation. */
235 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 0;
236
237 /** The minimum negative integer such that @c radix raised to the power of
238 (one less than that integer) is a normalized floating point number. */
239 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
240
241 /** The minimum negative integer such that 10 raised to that power is in
242 the range of normalized floating point numbers. */
243 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
244
245 /** The maximum positive integer such that @c radix raised to the power of
246 (one less than that integer) is a representable finite floating point
247 number. */
248 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
249
250 /** The maximum positive integer such that 10 raised to that power is in
251 the range of representable finite floating point numbers. */
252 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
253
254 /** True if the type has a representation for positive infinity. */
255 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
256
257 /** True if the type has a representation for a quiet (non-signaling)
258 Not a Number. */
259 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
260
261 /** True if the type has a representation for a signaling
262 Not a Number. */
263 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
264
265 /** See std::float_denorm_style for more information. */
266 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm = denorm_absent;
267
268 /** True if loss of accuracy is detected as a denormalization loss,
269 rather than as an inexact result. */
270 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
271
272 /** True if-and-only-if the type adheres to the IEC 559 standard, also
273 known as IEEE 754. (Only makes sense for floating point types.) */
274 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
275
276 /** True if the set of values representable by the type is
277 finite. All built-in types are bounded, this member would be
278 false for arbitrary precision types. */
279 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = false;
280
281 /** True if the type is @e modulo. A type is modulo if, for any
282 operation involving +, -, or * on values of that type whose
283 result would fall outside the range [min(),max()], the value
284 returned differs from the true value by an integer multiple of
285 max() - min() + 1. On most machines, this is false for floating
286 types, true for unsigned integers, and true for signed integers.
287 See PR22200 about signed integers. */
288 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
289
290 /** True if trapping is implemented for this type. */
291 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = false;
292
293 /** True if tininess is detected before rounding. (see IEC 559) */
294 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
295
296 /** See std::float_round_style for more information. This is only
297 meaningful for floating types; integer types will all be
298 round_toward_zero. */
299 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style =
300 round_toward_zero;
301 };
302
303 /**
304 * @brief Properties of fundamental types.
305 *
306 * This class allows a program to obtain information about the
307 * representation of a fundamental type on a given platform. For
308 * non-fundamental types, the functions will return 0 and the data
309 * members will all be @c false.
310 *
311 * _GLIBCXX_RESOLVE_LIB_DEFECTS: DRs 201 and 184 (hi Gaby!) are
312 * noted, but not incorporated in this documented (yet).
313 */
314 template<typename _Tp>
315 struct numeric_limits : public __numeric_limits_base
316 {
317 /** The minimum finite value, or for floating types with
318 denormalization, the minimum positive normalized value. */
319 static _GLIBCXX_CONSTEXPRconstexpr _Tp
320 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
321
322 /** The maximum finite value. */
323 static _GLIBCXX_CONSTEXPRconstexpr _Tp
324 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
325
326#if __cplusplus201103L >= 201103L
327 /** A finite value x such that there is no other finite value y
328 * where y < x. */
329 static constexpr _Tp
330 lowest() noexcept { return _Tp(); }
331#endif
332
333 /** The @e machine @e epsilon: the difference between 1 and the least
334 value greater than 1 that is representable. */
335 static _GLIBCXX_CONSTEXPRconstexpr _Tp
336 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
337
338 /** The maximum rounding error measurement (see LIA-1). */
339 static _GLIBCXX_CONSTEXPRconstexpr _Tp
340 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
341
342 /** The representation of positive infinity, if @c has_infinity. */
343 static _GLIBCXX_CONSTEXPRconstexpr _Tp
344 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
345
346 /** The representation of a quiet Not a Number,
347 if @c has_quiet_NaN. */
348 static _GLIBCXX_CONSTEXPRconstexpr _Tp
349 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
350
351 /** The representation of a signaling Not a Number, if
352 @c has_signaling_NaN. */
353 static _GLIBCXX_CONSTEXPRconstexpr _Tp
354 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
355
356 /** The minimum positive denormalized value. For types where
357 @c has_denorm is false, this is the minimum positive normalized
358 value. */
359 static _GLIBCXX_CONSTEXPRconstexpr _Tp
360 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
361 };
362
363#if __cplusplus201103L >= 201103L
364 template<typename _Tp>
365 struct numeric_limits<const _Tp>
366 : public numeric_limits<_Tp> { };
367
368 template<typename _Tp>
369 struct numeric_limits<volatile _Tp>
370 : public numeric_limits<_Tp> { };
371
372 template<typename _Tp>
373 struct numeric_limits<const volatile _Tp>
374 : public numeric_limits<_Tp> { };
375#endif
376
377 // Now there follow 16 explicit specializations. Yes, 16. Make sure
378 // you get the count right. (18 in c++0x mode)
379
380 /// numeric_limits<bool> specialization.
381 template<>
382 struct numeric_limits<bool>
383 {
384 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
385
386 static _GLIBCXX_CONSTEXPRconstexpr bool
387 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
388
389 static _GLIBCXX_CONSTEXPRconstexpr bool
390 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return true; }
391
392#if __cplusplus201103L >= 201103L
393 static constexpr bool
394 lowest() noexcept { return min(); }
395#endif
396 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = 1;
397 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = 0;
398#if __cplusplus201103L >= 201103L
399 static constexpr int max_digits10 = 0;
400#endif
401 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
402 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
403 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
404 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
405
406 static _GLIBCXX_CONSTEXPRconstexpr bool
407 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
408
409 static _GLIBCXX_CONSTEXPRconstexpr bool
410 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
411
412 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
413 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
414 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
415 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
416
417 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
418 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
419 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
420 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
421 = denorm_absent;
422 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
423
424 static _GLIBCXX_CONSTEXPRconstexpr bool
425 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
426
427 static _GLIBCXX_CONSTEXPRconstexpr bool
428 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
429
430 static _GLIBCXX_CONSTEXPRconstexpr bool
431 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
432
433 static _GLIBCXX_CONSTEXPRconstexpr bool
434 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
435
436 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
437 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
438 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
439
440 // It is not clear what it means for a boolean type to trap.
441 // This is a DR on the LWG issue list. Here, I use integer
442 // promotion semantics.
443 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
444 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
445 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
446 = round_toward_zero;
447 };
448
449 /// numeric_limits<char> specialization.
450 template<>
451 struct numeric_limits<char>
452 {
453 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
454
455 static _GLIBCXX_CONSTEXPRconstexpr char
456 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_min(char); }
457
458 static _GLIBCXX_CONSTEXPRconstexpr char
459 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_max(char); }
460
461#if __cplusplus201103L >= 201103L
462 static constexpr char
463 lowest() noexcept { return min(); }
464#endif
465
466 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (char);
467 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (char);
468#if __cplusplus201103L >= 201103L
469 static constexpr int max_digits10 = 0;
470#endif
471 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = __glibcxx_signed (char);
472 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
473 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
474 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
475
476 static _GLIBCXX_CONSTEXPRconstexpr char
477 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
478
479 static _GLIBCXX_CONSTEXPRconstexpr char
480 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
481
482 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
483 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
484 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
485 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
486
487 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
488 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
489 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
490 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
491 = denorm_absent;
492 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
493
494 static _GLIBCXX_CONSTEXPRconstexpr
495 char infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return char(); }
496
497 static _GLIBCXX_CONSTEXPRconstexpr char
498 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return char(); }
499
500 static _GLIBCXX_CONSTEXPRconstexpr char
501 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return char(); }
502
503 static _GLIBCXX_CONSTEXPRconstexpr char
504 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<char>(0); }
505
506 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
507 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
508 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = !is_signed;
509
510 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
511 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
512 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
513 = round_toward_zero;
514 };
515
516 /// numeric_limits<signed char> specialization.
517 template<>
518 struct numeric_limits<signed char>
519 {
520 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
521
522 static _GLIBCXX_CONSTEXPRconstexpr signed char
523 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__SCHAR_MAX__127 - 1; }
524
525 static _GLIBCXX_CONSTEXPRconstexpr signed char
526 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SCHAR_MAX__127; }
527
528#if __cplusplus201103L >= 201103L
529 static constexpr signed char
530 lowest() noexcept { return min(); }
531#endif
532
533 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (signed char);
534 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
535 = __glibcxx_digits10 (signed char);
536#if __cplusplus201103L >= 201103L
537 static constexpr int max_digits10 = 0;
538#endif
539 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
540 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
541 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
542 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
543
544 static _GLIBCXX_CONSTEXPRconstexpr signed char
545 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
546
547 static _GLIBCXX_CONSTEXPRconstexpr signed char
548 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
549
550 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
551 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
552 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
553 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
554
555 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
556 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
557 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
558 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
559 = denorm_absent;
560 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
561
562 static _GLIBCXX_CONSTEXPRconstexpr signed char
563 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<signed char>(0); }
564
565 static _GLIBCXX_CONSTEXPRconstexpr signed char
566 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<signed char>(0); }
567
568 static _GLIBCXX_CONSTEXPRconstexpr signed char
569 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
570 { return static_cast<signed char>(0); }
571
572 static _GLIBCXX_CONSTEXPRconstexpr signed char
573 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
574 { return static_cast<signed char>(0); }
575
576 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
577 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
578 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
579
580 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
581 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
582 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
583 = round_toward_zero;
584 };
585
586 /// numeric_limits<unsigned char> specialization.
587 template<>
588 struct numeric_limits<unsigned char>
589 {
590 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
591
592 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
593 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
594
595 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
596 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SCHAR_MAX__127 * 2U + 1; }
597
598#if __cplusplus201103L >= 201103L
599 static constexpr unsigned char
600 lowest() noexcept { return min(); }
601#endif
602
603 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
604 = __glibcxx_digits (unsigned char);
605 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
606 = __glibcxx_digits10 (unsigned char);
607#if __cplusplus201103L >= 201103L
608 static constexpr int max_digits10 = 0;
609#endif
610 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
611 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
612 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
613 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
614
615 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
616 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
617
618 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
619 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
620
621 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
622 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
623 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
624 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
625
626 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
627 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
628 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
629 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
630 = denorm_absent;
631 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
632
633 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
634 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
635 { return static_cast<unsigned char>(0); }
636
637 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
638 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
639 { return static_cast<unsigned char>(0); }
640
641 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
642 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
643 { return static_cast<unsigned char>(0); }
644
645 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
646 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
647 { return static_cast<unsigned char>(0); }
648
649 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
650 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
651 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
652
653 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
654 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
655 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
656 = round_toward_zero;
657 };
658
659 /// numeric_limits<wchar_t> specialization.
660 template<>
661 struct numeric_limits<wchar_t>
662 {
663 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
664
665 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
666 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_min (wchar_t); }
667
668 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
669 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_max (wchar_t); }
670
671#if __cplusplus201103L >= 201103L
672 static constexpr wchar_t
673 lowest() noexcept { return min(); }
674#endif
675
676 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (wchar_t);
677 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
678 = __glibcxx_digits10 (wchar_t);
679#if __cplusplus201103L >= 201103L
680 static constexpr int max_digits10 = 0;
681#endif
682 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = __glibcxx_signed (wchar_t);
683 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
684 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
685 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
686
687 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
688 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
689
690 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
691 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
692
693 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
694 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
695 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
696 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
697
698 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
699 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
700 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
701 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
702 = denorm_absent;
703 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
704
705 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
706 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
707
708 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
709 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
710
711 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
712 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
713
714 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
715 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
716
717 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
718 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
719 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = !is_signed;
720
721 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
722 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
723 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
724 = round_toward_zero;
725 };
726
727#if __cplusplus201103L >= 201103L
728 /// numeric_limits<char16_t> specialization.
729 template<>
730 struct numeric_limits<char16_t>
731 {
732 static constexpr bool is_specialized = true;
733
734 static constexpr char16_t
735 min() noexcept { return __glibcxx_min (char16_t); }
736
737 static constexpr char16_t
738 max() noexcept { return __glibcxx_max (char16_t); }
739
740 static constexpr char16_t
741 lowest() noexcept { return min(); }
742
743 static constexpr int digits = __glibcxx_digits (char16_t);
744 static constexpr int digits10 = __glibcxx_digits10 (char16_t);
745 static constexpr int max_digits10 = 0;
746 static constexpr bool is_signed = __glibcxx_signed (char16_t);
747 static constexpr bool is_integer = true;
748 static constexpr bool is_exact = true;
749 static constexpr int radix = 2;
750
751 static constexpr char16_t
752 epsilon() noexcept { return 0; }
753
754 static constexpr char16_t
755 round_error() noexcept { return 0; }
756
757 static constexpr int min_exponent = 0;
758 static constexpr int min_exponent10 = 0;
759 static constexpr int max_exponent = 0;
760 static constexpr int max_exponent10 = 0;
761
762 static constexpr bool has_infinity = false;
763 static constexpr bool has_quiet_NaN = false;
764 static constexpr bool has_signaling_NaN = false;
765 static constexpr float_denorm_style has_denorm = denorm_absent;
766 static constexpr bool has_denorm_loss = false;
767
768 static constexpr char16_t
769 infinity() noexcept { return char16_t(); }
770
771 static constexpr char16_t
772 quiet_NaN() noexcept { return char16_t(); }
773
774 static constexpr char16_t
775 signaling_NaN() noexcept { return char16_t(); }
776
777 static constexpr char16_t
778 denorm_min() noexcept { return char16_t(); }
779
780 static constexpr bool is_iec559 = false;
781 static constexpr bool is_bounded = true;
782 static constexpr bool is_modulo = !is_signed;
783
784 static constexpr bool traps = __glibcxx_integral_trapstrue;
785 static constexpr bool tinyness_before = false;
786 static constexpr float_round_style round_style = round_toward_zero;
787 };
788
789 /// numeric_limits<char32_t> specialization.
790 template<>
791 struct numeric_limits<char32_t>
792 {
793 static constexpr bool is_specialized = true;
794
795 static constexpr char32_t
796 min() noexcept { return __glibcxx_min (char32_t); }
797
798 static constexpr char32_t
799 max() noexcept { return __glibcxx_max (char32_t); }
800
801 static constexpr char32_t
802 lowest() noexcept { return min(); }
803
804 static constexpr int digits = __glibcxx_digits (char32_t);
805 static constexpr int digits10 = __glibcxx_digits10 (char32_t);
806 static constexpr int max_digits10 = 0;
807 static constexpr bool is_signed = __glibcxx_signed (char32_t);
808 static constexpr bool is_integer = true;
809 static constexpr bool is_exact = true;
810 static constexpr int radix = 2;
811
812 static constexpr char32_t
813 epsilon() noexcept { return 0; }
814
815 static constexpr char32_t
816 round_error() noexcept { return 0; }
817
818 static constexpr int min_exponent = 0;
819 static constexpr int min_exponent10 = 0;
820 static constexpr int max_exponent = 0;
821 static constexpr int max_exponent10 = 0;
822
823 static constexpr bool has_infinity = false;
824 static constexpr bool has_quiet_NaN = false;
825 static constexpr bool has_signaling_NaN = false;
826 static constexpr float_denorm_style has_denorm = denorm_absent;
827 static constexpr bool has_denorm_loss = false;
828
829 static constexpr char32_t
830 infinity() noexcept { return char32_t(); }
831
832 static constexpr char32_t
833 quiet_NaN() noexcept { return char32_t(); }
834
835 static constexpr char32_t
836 signaling_NaN() noexcept { return char32_t(); }
837
838 static constexpr char32_t
839 denorm_min() noexcept { return char32_t(); }
840
841 static constexpr bool is_iec559 = false;
842 static constexpr bool is_bounded = true;
843 static constexpr bool is_modulo = !is_signed;
844
845 static constexpr bool traps = __glibcxx_integral_trapstrue;
846 static constexpr bool tinyness_before = false;
847 static constexpr float_round_style round_style = round_toward_zero;
848 };
849#endif
850
851 /// numeric_limits<short> specialization.
852 template<>
853 struct numeric_limits<short>
854 {
855 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
856
857 static _GLIBCXX_CONSTEXPRconstexpr short
858 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__SHRT_MAX__32767 - 1; }
859
860 static _GLIBCXX_CONSTEXPRconstexpr short
861 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SHRT_MAX__32767; }
862
863#if __cplusplus201103L >= 201103L
864 static constexpr short
865 lowest() noexcept { return min(); }
866#endif
867
868 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (short);
869 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (short);
870#if __cplusplus201103L >= 201103L
871 static constexpr int max_digits10 = 0;
872#endif
873 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
874 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
875 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
876 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
877
878 static _GLIBCXX_CONSTEXPRconstexpr short
879 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
880
881 static _GLIBCXX_CONSTEXPRconstexpr short
882 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
883
884 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
885 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
886 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
887 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
888
889 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
890 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
891 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
892 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
893 = denorm_absent;
894 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
895
896 static _GLIBCXX_CONSTEXPRconstexpr short
897 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
898
899 static _GLIBCXX_CONSTEXPRconstexpr short
900 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
901
902 static _GLIBCXX_CONSTEXPRconstexpr short
903 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
904
905 static _GLIBCXX_CONSTEXPRconstexpr short
906 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
907
908 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
909 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
910 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
911
912 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
913 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
914 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
915 = round_toward_zero;
916 };
917
918 /// numeric_limits<unsigned short> specialization.
919 template<>
920 struct numeric_limits<unsigned short>
921 {
922 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
923
924 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
925 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
926
927 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
928 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SHRT_MAX__32767 * 2U + 1; }
929
930#if __cplusplus201103L >= 201103L
931 static constexpr unsigned short
932 lowest() noexcept { return min(); }
933#endif
934
935 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
936 = __glibcxx_digits (unsigned short);
937 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
938 = __glibcxx_digits10 (unsigned short);
939#if __cplusplus201103L >= 201103L
940 static constexpr int max_digits10 = 0;
941#endif
942 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
943 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
944 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
945 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
946
947 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
948 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
949
950 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
951 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
952
953 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
954 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
955 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
956 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
957
958 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
959 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
960 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
961 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
962 = denorm_absent;
963 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
964
965 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
966 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
967 { return static_cast<unsigned short>(0); }
968
969 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
970 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
971 { return static_cast<unsigned short>(0); }
972
973 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
974 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
975 { return static_cast<unsigned short>(0); }
976
977 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
978 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
979 { return static_cast<unsigned short>(0); }
980
981 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
982 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
983 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
984
985 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
986 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
987 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
988 = round_toward_zero;
989 };
990
991 /// numeric_limits<int> specialization.
992 template<>
993 struct numeric_limits<int>
994 {
995 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
996
997 static _GLIBCXX_CONSTEXPRconstexpr int
998 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__INT_MAX__2147483647 - 1; }
999
1000 static _GLIBCXX_CONSTEXPRconstexpr int
1001 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __INT_MAX__2147483647; }
1002
1003#if __cplusplus201103L >= 201103L
1004 static constexpr int
1005 lowest() noexcept { return min(); }
1006#endif
1007
1008 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (int);
1009 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (int);
1010#if __cplusplus201103L >= 201103L
1011 static constexpr int max_digits10 = 0;
1012#endif
1013 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1014 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1015 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1016 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1017
1018 static _GLIBCXX_CONSTEXPRconstexpr int
1019 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1020
1021 static _GLIBCXX_CONSTEXPRconstexpr int
1022 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1023
1024 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1025 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1026 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1027 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1028
1029 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1030 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1031 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1032 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1033 = denorm_absent;
1034 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1035
1036 static _GLIBCXX_CONSTEXPRconstexpr int
1037 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1038
1039 static _GLIBCXX_CONSTEXPRconstexpr int
1040 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1041
1042 static _GLIBCXX_CONSTEXPRconstexpr int
1043 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1044
1045 static _GLIBCXX_CONSTEXPRconstexpr int
1046 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1047
1048 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1049 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1050 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1051
1052 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1053 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1054 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1055 = round_toward_zero;
1056 };
1057
1058 /// numeric_limits<unsigned int> specialization.
1059 template<>
1060 struct numeric_limits<unsigned int>
1061 {
1062 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1063
1064 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1065 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1066
1067 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1068 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __INT_MAX__2147483647 * 2U + 1; }
1069
1070#if __cplusplus201103L >= 201103L
1071 static constexpr unsigned int
1072 lowest() noexcept { return min(); }
1073#endif
1074
1075 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1076 = __glibcxx_digits (unsigned int);
1077 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1078 = __glibcxx_digits10 (unsigned int);
1079#if __cplusplus201103L >= 201103L
1080 static constexpr int max_digits10 = 0;
1081#endif
1082 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
1083 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1084 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1085 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1086
1087 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1088 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1089
1090 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1091 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1092
1093 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1094 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1095 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1096 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1097
1098 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1099 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1100 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1101 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1102 = denorm_absent;
1103 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1104
1105 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1106 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<unsigned int>(0); }
1107
1108 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1109 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1110 { return static_cast<unsigned int>(0); }
1111
1112 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1113 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1114 { return static_cast<unsigned int>(0); }
1115
1116 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1117 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
1118 { return static_cast<unsigned int>(0); }
1119
1120 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1121 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1122 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
1123
1124 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1125 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1126 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1127 = round_toward_zero;
1128 };
1129
1130 /// numeric_limits<long> specialization.
1131 template<>
1132 struct numeric_limits<long>
1133 {
1134 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1135
1136 static _GLIBCXX_CONSTEXPRconstexpr long
1137 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__LONG_MAX__9223372036854775807L - 1; }
1138
1139 static _GLIBCXX_CONSTEXPRconstexpr long
1140 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_MAX__9223372036854775807L; }
1141
1142#if __cplusplus201103L >= 201103L
1143 static constexpr long
1144 lowest() noexcept { return min(); }
1145#endif
1146
1147 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (long);
1148 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (long);
1149#if __cplusplus201103L >= 201103L
1150 static constexpr int max_digits10 = 0;
1151#endif
1152 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1153 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1154 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1155 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1156
1157 static _GLIBCXX_CONSTEXPRconstexpr long
1158 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1159
1160 static _GLIBCXX_CONSTEXPRconstexpr long
1161 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1162
1163 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1164 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1165 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1166 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1167
1168 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1169 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1170 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1171 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1172 = denorm_absent;
1173 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1174
1175 static _GLIBCXX_CONSTEXPRconstexpr long
1176 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1177
1178 static _GLIBCXX_CONSTEXPRconstexpr long
1179 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1180
1181 static _GLIBCXX_CONSTEXPRconstexpr long
1182 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1183
1184 static _GLIBCXX_CONSTEXPRconstexpr long
1185 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1186
1187 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1188 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1189 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1190
1191 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1192 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1193 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1194 = round_toward_zero;
1195 };
1196
1197 /// numeric_limits<unsigned long> specialization.
1198 template<>
1199 struct numeric_limits<unsigned long>
1200 {
1201 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1202
1203 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1204 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1205
1206 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1207 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_MAX__9223372036854775807L * 2UL + 1; }
12
Returning the value 18446744073709551615
1208
1209#if __cplusplus201103L >= 201103L
1210 static constexpr unsigned long
1211 lowest() noexcept { return min(); }
1212#endif
1213
1214 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1215 = __glibcxx_digits (unsigned long);
1216 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1217 = __glibcxx_digits10 (unsigned long);
1218#if __cplusplus201103L >= 201103L
1219 static constexpr int max_digits10 = 0;
1220#endif
1221 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
1222 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1223 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1224 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1225
1226 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1227 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1228
1229 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1230 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1231
1232 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1233 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1234 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1235 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1236
1237 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1238 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1239 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1240 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1241 = denorm_absent;
1242 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1243
1244 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1245 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
1246 { return static_cast<unsigned long>(0); }
1247
1248 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1249 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1250 { return static_cast<unsigned long>(0); }
1251
1252 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1253 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1254 { return static_cast<unsigned long>(0); }
1255
1256 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1257 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
1258 { return static_cast<unsigned long>(0); }
1259
1260 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1261 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1262 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
1263
1264 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1265 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1266 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1267 = round_toward_zero;
1268 };
1269
1270 /// numeric_limits<long long> specialization.
1271 template<>
1272 struct numeric_limits<long long>
1273 {
1274 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1275
1276 static _GLIBCXX_CONSTEXPRconstexpr long long
1277 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__LONG_LONG_MAX__9223372036854775807LL - 1; }
1278
1279 static _GLIBCXX_CONSTEXPRconstexpr long long
1280 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_LONG_MAX__9223372036854775807LL; }
1281
1282#if __cplusplus201103L >= 201103L
1283 static constexpr long long
1284 lowest() noexcept { return min(); }
1285#endif
1286
1287 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1288 = __glibcxx_digits (long long);
1289 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1290 = __glibcxx_digits10 (long long);
1291#if __cplusplus201103L >= 201103L
1292 static constexpr int max_digits10 = 0;
1293#endif
1294 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1295 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1296 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1297 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1298
1299 static _GLIBCXX_CONSTEXPRconstexpr long long
1300 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1301
1302 static _GLIBCXX_CONSTEXPRconstexpr long long
1303 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1304
1305 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1306 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1307 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1308 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1309
1310 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1311 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1312 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1313 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1314 = denorm_absent;
1315 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1316
1317 static _GLIBCXX_CONSTEXPRconstexpr long long
1318 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long long>(0); }
1319
1320 static _GLIBCXX_CONSTEXPRconstexpr long long
1321 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long long>(0); }
1322
1323 static _GLIBCXX_CONSTEXPRconstexpr long long
1324 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1325 { return static_cast<long long>(0); }
1326
1327 static _GLIBCXX_CONSTEXPRconstexpr long long
1328 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long long>(0); }
1329
1330 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1331 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1332 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1333
1334 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1335 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1336 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1337 = round_toward_zero;
1338 };
1339
1340 /// numeric_limits<unsigned long long> specialization.
1341 template<>
1342 struct numeric_limits<unsigned long long>
1343 {
1344 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1345
1346 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1347 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1348
1349 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1350 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_LONG_MAX__9223372036854775807LL * 2ULL + 1; }
1351
1352#if __cplusplus201103L >= 201103L
1353 static constexpr unsigned long long
1354 lowest() noexcept { return min(); }
1355#endif
1356
1357 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1358 = __glibcxx_digits (unsigned long long);
1359 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1360 = __glibcxx_digits10 (unsigned long long);
1361#if __cplusplus201103L >= 201103L
1362 static constexpr int max_digits10 = 0;
1363#endif
1364 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
1365 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1366 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1367 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1368
1369 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1370 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1371
1372 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1373 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1374
1375 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1376 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1377 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1378 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1379
1380 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1381 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1382 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1383 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1384 = denorm_absent;
1385 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1386
1387 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1388 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
1389 { return static_cast<unsigned long long>(0); }
1390
1391 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1392 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1393 { return static_cast<unsigned long long>(0); }
1394
1395 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1396 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1397 { return static_cast<unsigned long long>(0); }
1398
1399 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1400 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
1401 { return static_cast<unsigned long long>(0); }
1402
1403 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1404 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1405 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
1406
1407 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1408 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1409 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1410 = round_toward_zero;
1411 };
1412
1413#if !defined(__STRICT_ANSI__1)
1414
1415#define __INT_N(TYPE, BITSIZE, EXT, UEXT) \
1416 template<> \
1417 struct numeric_limits<TYPE> \
1418 { \
1419 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true; \
1420 \
1421 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1422 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_min_b (TYPE, BITSIZE)(((TYPE)(-1) < 0) ? -(((TYPE)(-1) < 0) ? (((((TYPE)1 <<
((BITSIZE - ((TYPE)(-1) < 0)) - 1)) - 1) << 1) + 1)
: ~(TYPE)0) - 1 : (TYPE)0)
; } \
1423 \
1424 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1425 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_max_b (TYPE, BITSIZE)(((TYPE)(-1) < 0) ? (((((TYPE)1 << ((BITSIZE - ((TYPE
)(-1) < 0)) - 1)) - 1) << 1) + 1) : ~(TYPE)0)
; } \
1426 \
1427 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits \
1428 = BITSIZE - 1; \
1429 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 \
1430 = (BITSIZE - 1) * 643L / 2136; \
1431 \
1432 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true; \
1433 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true; \
1434 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true; \
1435 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2; \
1436 \
1437 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1438 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1439 \
1440 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1441 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1442 \
1443 EXT \
1444 \
1445 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0; \
1446 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0; \
1447 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0; \
1448 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0; \
1449 \
1450 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false; \
1451 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false; \
1452 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false; \
1453 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm \
1454 = denorm_absent; \
1455 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false; \
1456 \
1457 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1458 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept \
1459 { return static_cast<TYPE>(0); } \
1460 \
1461 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1462 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1463 { return static_cast<TYPE>(0); } \
1464 \
1465 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1466 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1467 { return static_cast<TYPE>(0); } \
1468 \
1469 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1470 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept \
1471 { return static_cast<TYPE>(0); } \
1472 \
1473 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false; \
1474 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true; \
1475 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false; \
1476 \
1477 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps \
1478 = __glibcxx_integral_trapstrue; \
1479 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false; \
1480 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style \
1481 = round_toward_zero; \
1482 }; \
1483 \
1484 template<> \
1485 struct numeric_limits<unsigned TYPE> \
1486 { \
1487 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true; \
1488 \
1489 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1490 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1491 \
1492 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1493 max() _GLIBCXX_USE_NOEXCEPTnoexcept \
1494 { return __glibcxx_max_b (unsigned TYPE, BITSIZE)(((unsigned TYPE)(-1) < 0) ? (((((unsigned TYPE)1 <<
((BITSIZE - ((unsigned TYPE)(-1) < 0)) - 1)) - 1) <<
1) + 1) : ~(unsigned TYPE)0)
; } \
1495 \
1496 UEXT \
1497 \
1498 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits \
1499 = BITSIZE; \
1500 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 \
1501 = BITSIZE * 643L / 2136; \
1502 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false; \
1503 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true; \
1504 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true; \
1505 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2; \
1506 \
1507 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1508 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1509 \
1510 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1511 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1512 \
1513 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0; \
1514 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0; \
1515 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0; \
1516 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0; \
1517 \
1518 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false; \
1519 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false; \
1520 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false; \
1521 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm \
1522 = denorm_absent; \
1523 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false; \
1524 \
1525 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1526 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept \
1527 { return static_cast<unsigned TYPE>(0); } \
1528 \
1529 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1530 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1531 { return static_cast<unsigned TYPE>(0); } \
1532 \
1533 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1534 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1535 { return static_cast<unsigned TYPE>(0); } \
1536 \
1537 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1538 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept \
1539 { return static_cast<unsigned TYPE>(0); } \
1540 \
1541 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false; \
1542 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true; \
1543 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true; \
1544 \
1545 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue; \
1546 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false; \
1547 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style \
1548 = round_toward_zero; \
1549 };
1550
1551#if __cplusplus201103L >= 201103L
1552
1553#define __INT_N_201103(TYPE) \
1554 static constexpr TYPE \
1555 lowest() noexcept { return min(); } \
1556 static constexpr int max_digits10 = 0;
1557
1558#define __INT_N_U201103(TYPE) \
1559 static constexpr unsigned TYPE \
1560 lowest() noexcept { return min(); } \
1561 static constexpr int max_digits10 = 0;
1562
1563#else
1564#define __INT_N_201103(TYPE)
1565#define __INT_N_U201103(TYPE)
1566#endif
1567
1568#ifdef __GLIBCXX_TYPE_INT_N_0
1569 __INT_N(__GLIBCXX_TYPE_INT_N_0, __GLIBCXX_BITSIZE_INT_N_0,
1570 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_0), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_0))
1571#endif
1572#ifdef __GLIBCXX_TYPE_INT_N_1
1573 __INT_N (__GLIBCXX_TYPE_INT_N_1, __GLIBCXX_BITSIZE_INT_N_1,
1574 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_1), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_1))
1575#endif
1576#ifdef __GLIBCXX_TYPE_INT_N_2
1577 __INT_N (__GLIBCXX_TYPE_INT_N_2, __GLIBCXX_BITSIZE_INT_N_2,
1578 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_2), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_2))
1579#endif
1580#ifdef __GLIBCXX_TYPE_INT_N_3
1581 __INT_N (__GLIBCXX_TYPE_INT_N_3, __GLIBCXX_BITSIZE_INT_N_3,
1582 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_3), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_3))
1583#endif
1584
1585#undef __INT_N
1586#undef __INT_N_201103
1587#undef __INT_N_U201103
1588
1589#endif
1590
1591 /// numeric_limits<float> specialization.
1592 template<>
1593 struct numeric_limits<float>
1594 {
1595 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1596
1597 static _GLIBCXX_CONSTEXPRconstexpr float
1598 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_MIN__1.17549435e-38F; }
1599
1600 static _GLIBCXX_CONSTEXPRconstexpr float
1601 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_MAX__3.40282347e+38F; }
1602
1603#if __cplusplus201103L >= 201103L
1604 static constexpr float
1605 lowest() noexcept { return -__FLT_MAX__3.40282347e+38F; }
1606#endif
1607
1608 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __FLT_MANT_DIG__24;
1609 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __FLT_DIG__6;
1610#if __cplusplus201103L >= 201103L
1611 static constexpr int max_digits10
1612 = __glibcxx_max_digits10 (__FLT_MANT_DIG__24);
1613#endif
1614 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1615 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
1616 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
1617 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = __FLT_RADIX__2;
1618
1619 static _GLIBCXX_CONSTEXPRconstexpr float
1620 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_EPSILON__1.19209290e-7F; }
1621
1622 static _GLIBCXX_CONSTEXPRconstexpr float
1623 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0.5F; }
1624
1625 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = __FLT_MIN_EXP__(-125);
1626 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = __FLT_MIN_10_EXP__(-37);
1627 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = __FLT_MAX_EXP__128;
1628 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = __FLT_MAX_10_EXP__38;
1629
1630 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = __FLT_HAS_INFINITY__1;
1631 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = __FLT_HAS_QUIET_NAN__1;
1632 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = has_quiet_NaN;
1633 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1634 = bool(__FLT_HAS_DENORM__1) ? denorm_present : denorm_absent;
1635 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss
1636 = __glibcxx_float_has_denorm_loss;
1637
1638 static _GLIBCXX_CONSTEXPRconstexpr float
1639 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_huge_valf(); }
1640
1641 static _GLIBCXX_CONSTEXPRconstexpr float
1642 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nanf(""); }
1643
1644 static _GLIBCXX_CONSTEXPRconstexpr float
1645 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nansf(""); }
1646
1647 static _GLIBCXX_CONSTEXPRconstexpr float
1648 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_DENORM_MIN__1.40129846e-45F; }
1649
1650 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559
1651 = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
1652 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1653 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1654
1655 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_float_traps;
1656 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before
1657 = __glibcxx_float_tinyness_before;
1658 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1659 = round_to_nearest;
1660 };
1661
1662#undef __glibcxx_float_has_denorm_loss
1663#undef __glibcxx_float_traps
1664#undef __glibcxx_float_tinyness_before
1665
1666 /// numeric_limits<double> specialization.
1667 template<>
1668 struct numeric_limits<double>
1669 {
1670 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1671
1672 static _GLIBCXX_CONSTEXPRconstexpr double
1673 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_MIN__2.2250738585072014e-308; }
1674
1675 static _GLIBCXX_CONSTEXPRconstexpr double
1676 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_MAX__1.7976931348623157e+308; }
1677
1678#if __cplusplus201103L >= 201103L
1679 static constexpr double
1680 lowest() noexcept { return -__DBL_MAX__1.7976931348623157e+308; }
1681#endif
1682
1683 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __DBL_MANT_DIG__53;
1684 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __DBL_DIG__15;
1685#if __cplusplus201103L >= 201103L
1686 static constexpr int max_digits10
1687 = __glibcxx_max_digits10 (__DBL_MANT_DIG__53);
1688#endif
1689 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1690 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
1691 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
1692 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = __FLT_RADIX__2;
1693
1694 static _GLIBCXX_CONSTEXPRconstexpr double
1695 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_EPSILON__2.2204460492503131e-16; }
1696
1697 static _GLIBCXX_CONSTEXPRconstexpr double
1698 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0.5; }
1699
1700 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = __DBL_MIN_EXP__(-1021);
1701 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = __DBL_MIN_10_EXP__(-307);
1702 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = __DBL_MAX_EXP__1024;
1703 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = __DBL_MAX_10_EXP__308;
1704
1705 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = __DBL_HAS_INFINITY__1;
1706 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = __DBL_HAS_QUIET_NAN__1;
1707 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = has_quiet_NaN;
1708 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1709 = bool(__DBL_HAS_DENORM__1) ? denorm_present : denorm_absent;
1710 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss
1711 = __glibcxx_double_has_denorm_loss;
1712
1713 static _GLIBCXX_CONSTEXPRconstexpr double
1714 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_huge_val(); }
1715
1716 static _GLIBCXX_CONSTEXPRconstexpr double
1717 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nan(""); }
1718
1719 static _GLIBCXX_CONSTEXPRconstexpr double
1720 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nans(""); }
1721
1722 static _GLIBCXX_CONSTEXPRconstexpr double
1723 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_DENORM_MIN__4.9406564584124654e-324; }
1724
1725 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559
1726 = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
1727 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1728 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1729
1730 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_double_traps;
1731 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before
1732 = __glibcxx_double_tinyness_before;
1733 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1734 = round_to_nearest;
1735 };
1736
1737#undef __glibcxx_double_has_denorm_loss
1738#undef __glibcxx_double_traps
1739#undef __glibcxx_double_tinyness_before
1740
1741 /// numeric_limits<long double> specialization.
1742 template<>
1743 struct numeric_limits<long double>
1744 {
1745 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1746
1747 static _GLIBCXX_CONSTEXPRconstexpr long double
1748 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_MIN__3.36210314311209350626e-4932L; }
1749
1750 static _GLIBCXX_CONSTEXPRconstexpr long double
1751 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_MAX__1.18973149535723176502e+4932L; }
1752
1753#if __cplusplus201103L >= 201103L
1754 static constexpr long double
1755 lowest() noexcept { return -__LDBL_MAX__1.18973149535723176502e+4932L; }
1756#endif
1757
1758 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __LDBL_MANT_DIG__64;
1759 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __LDBL_DIG__18;
1760#if __cplusplus201103L >= 201103L
1761 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_digits10
1762 = __glibcxx_max_digits10 (__LDBL_MANT_DIG__64);
1763#endif
1764 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1765 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
1766 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
1767 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = __FLT_RADIX__2;
1768
1769 static _GLIBCXX_CONSTEXPRconstexpr long double
1770 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_EPSILON__1.08420217248550443401e-19L; }
1771
1772 static _GLIBCXX_CONSTEXPRconstexpr long double
1773 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0.5L; }
1774
1775 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = __LDBL_MIN_EXP__(-16381);
1776 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = __LDBL_MIN_10_EXP__(-4931);
1777 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = __LDBL_MAX_EXP__16384;
1778 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = __LDBL_MAX_10_EXP__4932;
1779
1780 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = __LDBL_HAS_INFINITY__1;
1781 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = __LDBL_HAS_QUIET_NAN__1;
1782 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = has_quiet_NaN;
1783 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1784 = bool(__LDBL_HAS_DENORM__1) ? denorm_present : denorm_absent;
1785 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss
1786 = __glibcxx_long_double_has_denorm_loss;
1787
1788 static _GLIBCXX_CONSTEXPRconstexpr long double
1789 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_huge_vall(); }
1790
1791 static _GLIBCXX_CONSTEXPRconstexpr long double
1792 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nanl(""); }
1793
1794 static _GLIBCXX_CONSTEXPRconstexpr long double
1795 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nansl(""); }
1796
1797 static _GLIBCXX_CONSTEXPRconstexpr long double
1798 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_DENORM_MIN__3.64519953188247460253e-4951L; }
1799
1800 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559
1801 = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
1802 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1803 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1804
1805 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_long_double_traps;
1806 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before =
1807 __glibcxx_long_double_tinyness_before;
1808 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style =
1809 round_to_nearest;
1810 };
1811
1812#undef __glibcxx_long_double_has_denorm_loss
1813#undef __glibcxx_long_double_traps
1814#undef __glibcxx_long_double_tinyness_before
1815
1816_GLIBCXX_END_NAMESPACE_VERSION
1817} // namespace
1818
1819#undef __glibcxx_signed
1820#undef __glibcxx_min
1821#undef __glibcxx_max
1822#undef __glibcxx_digits
1823#undef __glibcxx_digits10
1824#undef __glibcxx_max_digits10
1825
1826#endif // _GLIBCXX_NUMERIC_LIMITS