Bug Summary

File:lib/Target/SystemZ/SystemZInstrInfo.cpp
Warning:line 1593, column 24
The result of the right shift is undefined due to shifting by '4294967295', which is greater or equal to the width of type 'uint64_t'

Annotated Source Code

Press '?' to see keyboard shortcuts

clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name SystemZInstrInfo.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -analyzer-config-compatibility-mode=true -mrelocation-model pic -pic-level 2 -mthread-model posix -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu x86-64 -dwarf-column-info -debugger-tuning=gdb -momit-leaf-frame-pointer -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-9/lib/clang/9.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-9~svn362543/build-llvm/lib/Target/SystemZ -I /build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ -I /build/llvm-toolchain-snapshot-9~svn362543/build-llvm/include -I /build/llvm-toolchain-snapshot-9~svn362543/include -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/backward -internal-isystem /usr/include/clang/9.0.0/include/ -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-9/lib/clang/9.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++11 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-9~svn362543/build-llvm/lib/Target/SystemZ -fdebug-prefix-map=/build/llvm-toolchain-snapshot-9~svn362543=. -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -stack-protector 2 -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -o /tmp/scan-build-2019-06-05-060531-1271-1 -x c++ /build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp -faddrsig

/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp

1//===-- SystemZInstrInfo.cpp - SystemZ instruction information ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the SystemZ implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SystemZInstrInfo.h"
14#include "MCTargetDesc/SystemZMCTargetDesc.h"
15#include "SystemZ.h"
16#include "SystemZInstrBuilder.h"
17#include "SystemZSubtarget.h"
18#include "llvm/ADT/Statistic.h"
19#include "llvm/CodeGen/LiveInterval.h"
20#include "llvm/CodeGen/LiveIntervals.h"
21#include "llvm/CodeGen/LiveVariables.h"
22#include "llvm/CodeGen/MachineBasicBlock.h"
23#include "llvm/CodeGen/MachineFrameInfo.h"
24#include "llvm/CodeGen/MachineFunction.h"
25#include "llvm/CodeGen/MachineInstr.h"
26#include "llvm/CodeGen/MachineMemOperand.h"
27#include "llvm/CodeGen/MachineOperand.h"
28#include "llvm/CodeGen/MachineRegisterInfo.h"
29#include "llvm/CodeGen/SlotIndexes.h"
30#include "llvm/CodeGen/TargetInstrInfo.h"
31#include "llvm/CodeGen/TargetSubtargetInfo.h"
32#include "llvm/MC/MCInstrDesc.h"
33#include "llvm/MC/MCRegisterInfo.h"
34#include "llvm/Support/BranchProbability.h"
35#include "llvm/Support/ErrorHandling.h"
36#include "llvm/Support/MathExtras.h"
37#include "llvm/Target/TargetMachine.h"
38#include <cassert>
39#include <cstdint>
40#include <iterator>
41
42using namespace llvm;
43
44#define GET_INSTRINFO_CTOR_DTOR
45#define GET_INSTRMAP_INFO
46#include "SystemZGenInstrInfo.inc"
47
48#define DEBUG_TYPE"systemz-II" "systemz-II"
49STATISTIC(LOCRMuxJumps, "Number of LOCRMux jump-sequences (lower is better)")static llvm::Statistic LOCRMuxJumps = {"systemz-II", "LOCRMuxJumps"
, "Number of LOCRMux jump-sequences (lower is better)", {0}, {
false}}
;
50
51// Return a mask with Count low bits set.
52static uint64_t allOnes(unsigned int Count) {
53 return Count == 0 ? 0 : (uint64_t(1) << (Count - 1) << 1) - 1;
54}
55
56// Reg should be a 32-bit GPR. Return true if it is a high register rather
57// than a low register.
58static bool isHighReg(unsigned int Reg) {
59 if (SystemZ::GRH32BitRegClass.contains(Reg))
60 return true;
61 assert(SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32")((SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32"
) ? static_cast<void> (0) : __assert_fail ("SystemZ::GR32BitRegClass.contains(Reg) && \"Invalid GRX32\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 61, __PRETTY_FUNCTION__))
;
62 return false;
63}
64
65// Pin the vtable to this file.
66void SystemZInstrInfo::anchor() {}
67
68SystemZInstrInfo::SystemZInstrInfo(SystemZSubtarget &sti)
69 : SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP),
70 RI(), STI(sti) {
71}
72
73// MI is a 128-bit load or store. Split it into two 64-bit loads or stores,
74// each having the opcode given by NewOpcode.
75void SystemZInstrInfo::splitMove(MachineBasicBlock::iterator MI,
76 unsigned NewOpcode) const {
77 MachineBasicBlock *MBB = MI->getParent();
78 MachineFunction &MF = *MBB->getParent();
79
80 // Get two load or store instructions. Use the original instruction for one
81 // of them (arbitrarily the second here) and create a clone for the other.
82 MachineInstr *EarlierMI = MF.CloneMachineInstr(&*MI);
83 MBB->insert(MI, EarlierMI);
84
85 // Set up the two 64-bit registers and remember super reg and its flags.
86 MachineOperand &HighRegOp = EarlierMI->getOperand(0);
87 MachineOperand &LowRegOp = MI->getOperand(0);
88 unsigned Reg128 = LowRegOp.getReg();
89 unsigned Reg128Killed = getKillRegState(LowRegOp.isKill());
90 unsigned Reg128Undef = getUndefRegState(LowRegOp.isUndef());
91 HighRegOp.setReg(RI.getSubReg(HighRegOp.getReg(), SystemZ::subreg_h64));
92 LowRegOp.setReg(RI.getSubReg(LowRegOp.getReg(), SystemZ::subreg_l64));
93
94 if (MI->mayStore()) {
95 // Add implicit uses of the super register in case one of the subregs is
96 // undefined. We could track liveness and skip storing an undefined
97 // subreg, but this is hopefully rare (discovered with llvm-stress).
98 // If Reg128 was killed, set kill flag on MI.
99 unsigned Reg128UndefImpl = (Reg128Undef | RegState::Implicit);
100 MachineInstrBuilder(MF, EarlierMI).addReg(Reg128, Reg128UndefImpl);
101 MachineInstrBuilder(MF, MI).addReg(Reg128, (Reg128UndefImpl | Reg128Killed));
102 }
103
104 // The address in the first (high) instruction is already correct.
105 // Adjust the offset in the second (low) instruction.
106 MachineOperand &HighOffsetOp = EarlierMI->getOperand(2);
107 MachineOperand &LowOffsetOp = MI->getOperand(2);
108 LowOffsetOp.setImm(LowOffsetOp.getImm() + 8);
109
110 // Clear the kill flags on the registers in the first instruction.
111 if (EarlierMI->getOperand(0).isReg() && EarlierMI->getOperand(0).isUse())
112 EarlierMI->getOperand(0).setIsKill(false);
113 EarlierMI->getOperand(1).setIsKill(false);
114 EarlierMI->getOperand(3).setIsKill(false);
115
116 // Set the opcodes.
117 unsigned HighOpcode = getOpcodeForOffset(NewOpcode, HighOffsetOp.getImm());
118 unsigned LowOpcode = getOpcodeForOffset(NewOpcode, LowOffsetOp.getImm());
119 assert(HighOpcode && LowOpcode && "Both offsets should be in range")((HighOpcode && LowOpcode && "Both offsets should be in range"
) ? static_cast<void> (0) : __assert_fail ("HighOpcode && LowOpcode && \"Both offsets should be in range\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 119, __PRETTY_FUNCTION__))
;
120
121 EarlierMI->setDesc(get(HighOpcode));
122 MI->setDesc(get(LowOpcode));
123}
124
125// Split ADJDYNALLOC instruction MI.
126void SystemZInstrInfo::splitAdjDynAlloc(MachineBasicBlock::iterator MI) const {
127 MachineBasicBlock *MBB = MI->getParent();
128 MachineFunction &MF = *MBB->getParent();
129 MachineFrameInfo &MFFrame = MF.getFrameInfo();
130 MachineOperand &OffsetMO = MI->getOperand(2);
131
132 uint64_t Offset = (MFFrame.getMaxCallFrameSize() +
133 SystemZMC::CallFrameSize +
134 OffsetMO.getImm());
135 unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset);
136 assert(NewOpcode && "No support for huge argument lists yet")((NewOpcode && "No support for huge argument lists yet"
) ? static_cast<void> (0) : __assert_fail ("NewOpcode && \"No support for huge argument lists yet\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 136, __PRETTY_FUNCTION__))
;
137 MI->setDesc(get(NewOpcode));
138 OffsetMO.setImm(Offset);
139}
140
141// MI is an RI-style pseudo instruction. Replace it with LowOpcode
142// if the first operand is a low GR32 and HighOpcode if the first operand
143// is a high GR32. ConvertHigh is true if LowOpcode takes a signed operand
144// and HighOpcode takes an unsigned 32-bit operand. In those cases,
145// MI has the same kind of operand as LowOpcode, so needs to be converted
146// if HighOpcode is used.
147void SystemZInstrInfo::expandRIPseudo(MachineInstr &MI, unsigned LowOpcode,
148 unsigned HighOpcode,
149 bool ConvertHigh) const {
150 unsigned Reg = MI.getOperand(0).getReg();
151 bool IsHigh = isHighReg(Reg);
152 MI.setDesc(get(IsHigh ? HighOpcode : LowOpcode));
153 if (IsHigh && ConvertHigh)
154 MI.getOperand(1).setImm(uint32_t(MI.getOperand(1).getImm()));
155}
156
157// MI is a three-operand RIE-style pseudo instruction. Replace it with
158// LowOpcodeK if the registers are both low GR32s, otherwise use a move
159// followed by HighOpcode or LowOpcode, depending on whether the target
160// is a high or low GR32.
161void SystemZInstrInfo::expandRIEPseudo(MachineInstr &MI, unsigned LowOpcode,
162 unsigned LowOpcodeK,
163 unsigned HighOpcode) const {
164 unsigned DestReg = MI.getOperand(0).getReg();
165 unsigned SrcReg = MI.getOperand(1).getReg();
166 bool DestIsHigh = isHighReg(DestReg);
167 bool SrcIsHigh = isHighReg(SrcReg);
168 if (!DestIsHigh && !SrcIsHigh)
169 MI.setDesc(get(LowOpcodeK));
170 else {
171 emitGRX32Move(*MI.getParent(), MI, MI.getDebugLoc(), DestReg, SrcReg,
172 SystemZ::LR, 32, MI.getOperand(1).isKill(),
173 MI.getOperand(1).isUndef());
174 MI.setDesc(get(DestIsHigh ? HighOpcode : LowOpcode));
175 MI.getOperand(1).setReg(DestReg);
176 MI.tieOperands(0, 1);
177 }
178}
179
180// MI is an RXY-style pseudo instruction. Replace it with LowOpcode
181// if the first operand is a low GR32 and HighOpcode if the first operand
182// is a high GR32.
183void SystemZInstrInfo::expandRXYPseudo(MachineInstr &MI, unsigned LowOpcode,
184 unsigned HighOpcode) const {
185 unsigned Reg = MI.getOperand(0).getReg();
186 unsigned Opcode = getOpcodeForOffset(isHighReg(Reg) ? HighOpcode : LowOpcode,
187 MI.getOperand(2).getImm());
188 MI.setDesc(get(Opcode));
189}
190
191// MI is a load-on-condition pseudo instruction with a single register
192// (source or destination) operand. Replace it with LowOpcode if the
193// register is a low GR32 and HighOpcode if the register is a high GR32.
194void SystemZInstrInfo::expandLOCPseudo(MachineInstr &MI, unsigned LowOpcode,
195 unsigned HighOpcode) const {
196 unsigned Reg = MI.getOperand(0).getReg();
197 unsigned Opcode = isHighReg(Reg) ? HighOpcode : LowOpcode;
198 MI.setDesc(get(Opcode));
199}
200
201// MI is a load-register-on-condition pseudo instruction. Replace it with
202// LowOpcode if source and destination are both low GR32s and HighOpcode if
203// source and destination are both high GR32s.
204void SystemZInstrInfo::expandLOCRPseudo(MachineInstr &MI, unsigned LowOpcode,
205 unsigned HighOpcode) const {
206 unsigned DestReg = MI.getOperand(0).getReg();
207 unsigned SrcReg = MI.getOperand(2).getReg();
208 bool DestIsHigh = isHighReg(DestReg);
209 bool SrcIsHigh = isHighReg(SrcReg);
210
211 if (!DestIsHigh && !SrcIsHigh)
212 MI.setDesc(get(LowOpcode));
213 else if (DestIsHigh && SrcIsHigh)
214 MI.setDesc(get(HighOpcode));
215 else
216 LOCRMuxJumps++;
217
218 // If we were unable to implement the pseudo with a single instruction, we
219 // need to convert it back into a branch sequence. This cannot be done here
220 // since the caller of expandPostRAPseudo does not handle changes to the CFG
221 // correctly. This change is defered to the SystemZExpandPseudo pass.
222}
223
224// MI is an RR-style pseudo instruction that zero-extends the low Size bits
225// of one GRX32 into another. Replace it with LowOpcode if both operands
226// are low registers, otherwise use RISB[LH]G.
227void SystemZInstrInfo::expandZExtPseudo(MachineInstr &MI, unsigned LowOpcode,
228 unsigned Size) const {
229 MachineInstrBuilder MIB =
230 emitGRX32Move(*MI.getParent(), MI, MI.getDebugLoc(),
231 MI.getOperand(0).getReg(), MI.getOperand(1).getReg(), LowOpcode,
232 Size, MI.getOperand(1).isKill(), MI.getOperand(1).isUndef());
233
234 // Keep the remaining operands as-is.
235 for (unsigned I = 2; I < MI.getNumOperands(); ++I)
236 MIB.add(MI.getOperand(I));
237
238 MI.eraseFromParent();
239}
240
241void SystemZInstrInfo::expandLoadStackGuard(MachineInstr *MI) const {
242 MachineBasicBlock *MBB = MI->getParent();
243 MachineFunction &MF = *MBB->getParent();
244 const unsigned Reg64 = MI->getOperand(0).getReg();
245 const unsigned Reg32 = RI.getSubReg(Reg64, SystemZ::subreg_l32);
246
247 // EAR can only load the low subregister so us a shift for %a0 to produce
248 // the GR containing %a0 and %a1.
249
250 // ear <reg>, %a0
251 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32)
252 .addReg(SystemZ::A0)
253 .addReg(Reg64, RegState::ImplicitDefine);
254
255 // sllg <reg>, <reg>, 32
256 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::SLLG), Reg64)
257 .addReg(Reg64)
258 .addReg(0)
259 .addImm(32);
260
261 // ear <reg>, %a1
262 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32)
263 .addReg(SystemZ::A1);
264
265 // lg <reg>, 40(<reg>)
266 MI->setDesc(get(SystemZ::LG));
267 MachineInstrBuilder(MF, MI).addReg(Reg64).addImm(40).addReg(0);
268}
269
270// Emit a zero-extending move from 32-bit GPR SrcReg to 32-bit GPR
271// DestReg before MBBI in MBB. Use LowLowOpcode when both DestReg and SrcReg
272// are low registers, otherwise use RISB[LH]G. Size is the number of bits
273// taken from the low end of SrcReg (8 for LLCR, 16 for LLHR and 32 for LR).
274// KillSrc is true if this move is the last use of SrcReg.
275MachineInstrBuilder
276SystemZInstrInfo::emitGRX32Move(MachineBasicBlock &MBB,
277 MachineBasicBlock::iterator MBBI,
278 const DebugLoc &DL, unsigned DestReg,
279 unsigned SrcReg, unsigned LowLowOpcode,
280 unsigned Size, bool KillSrc,
281 bool UndefSrc) const {
282 unsigned Opcode;
283 bool DestIsHigh = isHighReg(DestReg);
284 bool SrcIsHigh = isHighReg(SrcReg);
285 if (DestIsHigh && SrcIsHigh)
286 Opcode = SystemZ::RISBHH;
287 else if (DestIsHigh && !SrcIsHigh)
288 Opcode = SystemZ::RISBHL;
289 else if (!DestIsHigh && SrcIsHigh)
290 Opcode = SystemZ::RISBLH;
291 else {
292 return BuildMI(MBB, MBBI, DL, get(LowLowOpcode), DestReg)
293 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc));
294 }
295 unsigned Rotate = (DestIsHigh != SrcIsHigh ? 32 : 0);
296 return BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)
297 .addReg(DestReg, RegState::Undef)
298 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc))
299 .addImm(32 - Size).addImm(128 + 31).addImm(Rotate);
300}
301
302MachineInstr *SystemZInstrInfo::commuteInstructionImpl(MachineInstr &MI,
303 bool NewMI,
304 unsigned OpIdx1,
305 unsigned OpIdx2) const {
306 auto cloneIfNew = [NewMI](MachineInstr &MI) -> MachineInstr & {
307 if (NewMI)
308 return *MI.getParent()->getParent()->CloneMachineInstr(&MI);
309 return MI;
310 };
311
312 switch (MI.getOpcode()) {
313 case SystemZ::LOCRMux:
314 case SystemZ::LOCFHR:
315 case SystemZ::LOCR:
316 case SystemZ::LOCGR: {
317 auto &WorkingMI = cloneIfNew(MI);
318 // Invert condition.
319 unsigned CCValid = WorkingMI.getOperand(3).getImm();
320 unsigned CCMask = WorkingMI.getOperand(4).getImm();
321 WorkingMI.getOperand(4).setImm(CCMask ^ CCValid);
322 return TargetInstrInfo::commuteInstructionImpl(WorkingMI, /*NewMI=*/false,
323 OpIdx1, OpIdx2);
324 }
325 default:
326 return TargetInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2);
327 }
328}
329
330// If MI is a simple load or store for a frame object, return the register
331// it loads or stores and set FrameIndex to the index of the frame object.
332// Return 0 otherwise.
333//
334// Flag is SimpleBDXLoad for loads and SimpleBDXStore for stores.
335static int isSimpleMove(const MachineInstr &MI, int &FrameIndex,
336 unsigned Flag) {
337 const MCInstrDesc &MCID = MI.getDesc();
338 if ((MCID.TSFlags & Flag) && MI.getOperand(1).isFI() &&
339 MI.getOperand(2).getImm() == 0 && MI.getOperand(3).getReg() == 0) {
340 FrameIndex = MI.getOperand(1).getIndex();
341 return MI.getOperand(0).getReg();
342 }
343 return 0;
344}
345
346unsigned SystemZInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
347 int &FrameIndex) const {
348 return isSimpleMove(MI, FrameIndex, SystemZII::SimpleBDXLoad);
349}
350
351unsigned SystemZInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
352 int &FrameIndex) const {
353 return isSimpleMove(MI, FrameIndex, SystemZII::SimpleBDXStore);
354}
355
356bool SystemZInstrInfo::isStackSlotCopy(const MachineInstr &MI,
357 int &DestFrameIndex,
358 int &SrcFrameIndex) const {
359 // Check for MVC 0(Length,FI1),0(FI2)
360 const MachineFrameInfo &MFI = MI.getParent()->getParent()->getFrameInfo();
361 if (MI.getOpcode() != SystemZ::MVC || !MI.getOperand(0).isFI() ||
362 MI.getOperand(1).getImm() != 0 || !MI.getOperand(3).isFI() ||
363 MI.getOperand(4).getImm() != 0)
364 return false;
365
366 // Check that Length covers the full slots.
367 int64_t Length = MI.getOperand(2).getImm();
368 unsigned FI1 = MI.getOperand(0).getIndex();
369 unsigned FI2 = MI.getOperand(3).getIndex();
370 if (MFI.getObjectSize(FI1) != Length ||
371 MFI.getObjectSize(FI2) != Length)
372 return false;
373
374 DestFrameIndex = FI1;
375 SrcFrameIndex = FI2;
376 return true;
377}
378
379bool SystemZInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
380 MachineBasicBlock *&TBB,
381 MachineBasicBlock *&FBB,
382 SmallVectorImpl<MachineOperand> &Cond,
383 bool AllowModify) const {
384 // Most of the code and comments here are boilerplate.
385
386 // Start from the bottom of the block and work up, examining the
387 // terminator instructions.
388 MachineBasicBlock::iterator I = MBB.end();
389 while (I != MBB.begin()) {
390 --I;
391 if (I->isDebugInstr())
392 continue;
393
394 // Working from the bottom, when we see a non-terminator instruction, we're
395 // done.
396 if (!isUnpredicatedTerminator(*I))
397 break;
398
399 // A terminator that isn't a branch can't easily be handled by this
400 // analysis.
401 if (!I->isBranch())
402 return true;
403
404 // Can't handle indirect branches.
405 SystemZII::Branch Branch(getBranchInfo(*I));
406 if (!Branch.Target->isMBB())
407 return true;
408
409 // Punt on compound branches.
410 if (Branch.Type != SystemZII::BranchNormal)
411 return true;
412
413 if (Branch.CCMask == SystemZ::CCMASK_ANY) {
414 // Handle unconditional branches.
415 if (!AllowModify) {
416 TBB = Branch.Target->getMBB();
417 continue;
418 }
419
420 // If the block has any instructions after a JMP, delete them.
421 while (std::next(I) != MBB.end())
422 std::next(I)->eraseFromParent();
423
424 Cond.clear();
425 FBB = nullptr;
426
427 // Delete the JMP if it's equivalent to a fall-through.
428 if (MBB.isLayoutSuccessor(Branch.Target->getMBB())) {
429 TBB = nullptr;
430 I->eraseFromParent();
431 I = MBB.end();
432 continue;
433 }
434
435 // TBB is used to indicate the unconditinal destination.
436 TBB = Branch.Target->getMBB();
437 continue;
438 }
439
440 // Working from the bottom, handle the first conditional branch.
441 if (Cond.empty()) {
442 // FIXME: add X86-style branch swap
443 FBB = TBB;
444 TBB = Branch.Target->getMBB();
445 Cond.push_back(MachineOperand::CreateImm(Branch.CCValid));
446 Cond.push_back(MachineOperand::CreateImm(Branch.CCMask));
447 continue;
448 }
449
450 // Handle subsequent conditional branches.
451 assert(Cond.size() == 2 && TBB && "Should have seen a conditional branch")((Cond.size() == 2 && TBB && "Should have seen a conditional branch"
) ? static_cast<void> (0) : __assert_fail ("Cond.size() == 2 && TBB && \"Should have seen a conditional branch\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 451, __PRETTY_FUNCTION__))
;
452
453 // Only handle the case where all conditional branches branch to the same
454 // destination.
455 if (TBB != Branch.Target->getMBB())
456 return true;
457
458 // If the conditions are the same, we can leave them alone.
459 unsigned OldCCValid = Cond[0].getImm();
460 unsigned OldCCMask = Cond[1].getImm();
461 if (OldCCValid == Branch.CCValid && OldCCMask == Branch.CCMask)
462 continue;
463
464 // FIXME: Try combining conditions like X86 does. Should be easy on Z!
465 return false;
466 }
467
468 return false;
469}
470
471unsigned SystemZInstrInfo::removeBranch(MachineBasicBlock &MBB,
472 int *BytesRemoved) const {
473 assert(!BytesRemoved && "code size not handled")((!BytesRemoved && "code size not handled") ? static_cast
<void> (0) : __assert_fail ("!BytesRemoved && \"code size not handled\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 473, __PRETTY_FUNCTION__))
;
474
475 // Most of the code and comments here are boilerplate.
476 MachineBasicBlock::iterator I = MBB.end();
477 unsigned Count = 0;
478
479 while (I != MBB.begin()) {
480 --I;
481 if (I->isDebugInstr())
482 continue;
483 if (!I->isBranch())
484 break;
485 if (!getBranchInfo(*I).Target->isMBB())
486 break;
487 // Remove the branch.
488 I->eraseFromParent();
489 I = MBB.end();
490 ++Count;
491 }
492
493 return Count;
494}
495
496bool SystemZInstrInfo::
497reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
498 assert(Cond.size() == 2 && "Invalid condition")((Cond.size() == 2 && "Invalid condition") ? static_cast
<void> (0) : __assert_fail ("Cond.size() == 2 && \"Invalid condition\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 498, __PRETTY_FUNCTION__))
;
499 Cond[1].setImm(Cond[1].getImm() ^ Cond[0].getImm());
500 return false;
501}
502
503unsigned SystemZInstrInfo::insertBranch(MachineBasicBlock &MBB,
504 MachineBasicBlock *TBB,
505 MachineBasicBlock *FBB,
506 ArrayRef<MachineOperand> Cond,
507 const DebugLoc &DL,
508 int *BytesAdded) const {
509 // In this function we output 32-bit branches, which should always
510 // have enough range. They can be shortened and relaxed by later code
511 // in the pipeline, if desired.
512
513 // Shouldn't be a fall through.
514 assert(TBB && "insertBranch must not be told to insert a fallthrough")((TBB && "insertBranch must not be told to insert a fallthrough"
) ? static_cast<void> (0) : __assert_fail ("TBB && \"insertBranch must not be told to insert a fallthrough\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 514, __PRETTY_FUNCTION__))
;
515 assert((Cond.size() == 2 || Cond.size() == 0) &&(((Cond.size() == 2 || Cond.size() == 0) && "SystemZ branch conditions have one component!"
) ? static_cast<void> (0) : __assert_fail ("(Cond.size() == 2 || Cond.size() == 0) && \"SystemZ branch conditions have one component!\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 516, __PRETTY_FUNCTION__))
516 "SystemZ branch conditions have one component!")(((Cond.size() == 2 || Cond.size() == 0) && "SystemZ branch conditions have one component!"
) ? static_cast<void> (0) : __assert_fail ("(Cond.size() == 2 || Cond.size() == 0) && \"SystemZ branch conditions have one component!\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 516, __PRETTY_FUNCTION__))
;
517 assert(!BytesAdded && "code size not handled")((!BytesAdded && "code size not handled") ? static_cast
<void> (0) : __assert_fail ("!BytesAdded && \"code size not handled\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 517, __PRETTY_FUNCTION__))
;
518
519 if (Cond.empty()) {
520 // Unconditional branch?
521 assert(!FBB && "Unconditional branch with multiple successors!")((!FBB && "Unconditional branch with multiple successors!"
) ? static_cast<void> (0) : __assert_fail ("!FBB && \"Unconditional branch with multiple successors!\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 521, __PRETTY_FUNCTION__))
;
522 BuildMI(&MBB, DL, get(SystemZ::J)).addMBB(TBB);
523 return 1;
524 }
525
526 // Conditional branch.
527 unsigned Count = 0;
528 unsigned CCValid = Cond[0].getImm();
529 unsigned CCMask = Cond[1].getImm();
530 BuildMI(&MBB, DL, get(SystemZ::BRC))
531 .addImm(CCValid).addImm(CCMask).addMBB(TBB);
532 ++Count;
533
534 if (FBB) {
535 // Two-way Conditional branch. Insert the second branch.
536 BuildMI(&MBB, DL, get(SystemZ::J)).addMBB(FBB);
537 ++Count;
538 }
539 return Count;
540}
541
542bool SystemZInstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
543 unsigned &SrcReg2, int &Mask,
544 int &Value) const {
545 assert(MI.isCompare() && "Caller should have checked for a comparison")((MI.isCompare() && "Caller should have checked for a comparison"
) ? static_cast<void> (0) : __assert_fail ("MI.isCompare() && \"Caller should have checked for a comparison\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 545, __PRETTY_FUNCTION__))
;
546
547 if (MI.getNumExplicitOperands() == 2 && MI.getOperand(0).isReg() &&
548 MI.getOperand(1).isImm()) {
549 SrcReg = MI.getOperand(0).getReg();
550 SrcReg2 = 0;
551 Value = MI.getOperand(1).getImm();
552 Mask = ~0;
553 return true;
554 }
555
556 return false;
557}
558
559bool SystemZInstrInfo::canInsertSelect(const MachineBasicBlock &MBB,
560 ArrayRef<MachineOperand> Pred,
561 unsigned TrueReg, unsigned FalseReg,
562 int &CondCycles, int &TrueCycles,
563 int &FalseCycles) const {
564 // Not all subtargets have LOCR instructions.
565 if (!STI.hasLoadStoreOnCond())
566 return false;
567 if (Pred.size() != 2)
568 return false;
569
570 // Check register classes.
571 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
572 const TargetRegisterClass *RC =
573 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));
574 if (!RC)
575 return false;
576
577 // We have LOCR instructions for 32 and 64 bit general purpose registers.
578 if ((STI.hasLoadStoreOnCond2() &&
579 SystemZ::GRX32BitRegClass.hasSubClassEq(RC)) ||
580 SystemZ::GR32BitRegClass.hasSubClassEq(RC) ||
581 SystemZ::GR64BitRegClass.hasSubClassEq(RC)) {
582 CondCycles = 2;
583 TrueCycles = 2;
584 FalseCycles = 2;
585 return true;
586 }
587
588 // Can't do anything else.
589 return false;
590}
591
592void SystemZInstrInfo::insertSelect(MachineBasicBlock &MBB,
593 MachineBasicBlock::iterator I,
594 const DebugLoc &DL, unsigned DstReg,
595 ArrayRef<MachineOperand> Pred,
596 unsigned TrueReg,
597 unsigned FalseReg) const {
598 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
599 const TargetRegisterClass *RC = MRI.getRegClass(DstReg);
600
601 assert(Pred.size() == 2 && "Invalid condition")((Pred.size() == 2 && "Invalid condition") ? static_cast
<void> (0) : __assert_fail ("Pred.size() == 2 && \"Invalid condition\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 601, __PRETTY_FUNCTION__))
;
602 unsigned CCValid = Pred[0].getImm();
603 unsigned CCMask = Pred[1].getImm();
604
605 unsigned Opc;
606 if (SystemZ::GRX32BitRegClass.hasSubClassEq(RC)) {
607 if (STI.hasLoadStoreOnCond2())
608 Opc = SystemZ::LOCRMux;
609 else {
610 Opc = SystemZ::LOCR;
611 MRI.constrainRegClass(DstReg, &SystemZ::GR32BitRegClass);
612 unsigned TReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass);
613 unsigned FReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass);
614 BuildMI(MBB, I, DL, get(TargetOpcode::COPY), TReg).addReg(TrueReg);
615 BuildMI(MBB, I, DL, get(TargetOpcode::COPY), FReg).addReg(FalseReg);
616 TrueReg = TReg;
617 FalseReg = FReg;
618 }
619 } else if (SystemZ::GR64BitRegClass.hasSubClassEq(RC))
620 Opc = SystemZ::LOCGR;
621 else
622 llvm_unreachable("Invalid register class")::llvm::llvm_unreachable_internal("Invalid register class", "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 622)
;
623
624 BuildMI(MBB, I, DL, get(Opc), DstReg)
625 .addReg(FalseReg).addReg(TrueReg)
626 .addImm(CCValid).addImm(CCMask);
627}
628
629bool SystemZInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
630 unsigned Reg,
631 MachineRegisterInfo *MRI) const {
632 unsigned DefOpc = DefMI.getOpcode();
633 if (DefOpc != SystemZ::LHIMux && DefOpc != SystemZ::LHI &&
634 DefOpc != SystemZ::LGHI)
635 return false;
636 if (DefMI.getOperand(0).getReg() != Reg)
637 return false;
638 int32_t ImmVal = (int32_t)DefMI.getOperand(1).getImm();
639
640 unsigned UseOpc = UseMI.getOpcode();
641 unsigned NewUseOpc;
642 unsigned UseIdx;
643 int CommuteIdx = -1;
644 switch (UseOpc) {
645 case SystemZ::LOCRMux:
646 if (!STI.hasLoadStoreOnCond2())
647 return false;
648 NewUseOpc = SystemZ::LOCHIMux;
649 if (UseMI.getOperand(2).getReg() == Reg)
650 UseIdx = 2;
651 else if (UseMI.getOperand(1).getReg() == Reg)
652 UseIdx = 2, CommuteIdx = 1;
653 else
654 return false;
655 break;
656 case SystemZ::LOCGR:
657 if (!STI.hasLoadStoreOnCond2())
658 return false;
659 NewUseOpc = SystemZ::LOCGHI;
660 if (UseMI.getOperand(2).getReg() == Reg)
661 UseIdx = 2;
662 else if (UseMI.getOperand(1).getReg() == Reg)
663 UseIdx = 2, CommuteIdx = 1;
664 else
665 return false;
666 break;
667 default:
668 return false;
669 }
670
671 if (CommuteIdx != -1)
672 if (!commuteInstruction(UseMI, false, CommuteIdx, UseIdx))
673 return false;
674
675 bool DeleteDef = MRI->hasOneNonDBGUse(Reg);
676 UseMI.setDesc(get(NewUseOpc));
677 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal);
678 if (DeleteDef)
679 DefMI.eraseFromParent();
680
681 return true;
682}
683
684bool SystemZInstrInfo::isPredicable(const MachineInstr &MI) const {
685 unsigned Opcode = MI.getOpcode();
686 if (Opcode == SystemZ::Return ||
687 Opcode == SystemZ::Trap ||
688 Opcode == SystemZ::CallJG ||
689 Opcode == SystemZ::CallBR)
690 return true;
691 return false;
692}
693
694bool SystemZInstrInfo::
695isProfitableToIfCvt(MachineBasicBlock &MBB,
696 unsigned NumCycles, unsigned ExtraPredCycles,
697 BranchProbability Probability) const {
698 // Avoid using conditional returns at the end of a loop (since then
699 // we'd need to emit an unconditional branch to the beginning anyway,
700 // making the loop body longer). This doesn't apply for low-probability
701 // loops (eg. compare-and-swap retry), so just decide based on branch
702 // probability instead of looping structure.
703 // However, since Compare and Trap instructions cost the same as a regular
704 // Compare instruction, we should allow the if conversion to convert this
705 // into a Conditional Compare regardless of the branch probability.
706 if (MBB.getLastNonDebugInstr()->getOpcode() != SystemZ::Trap &&
707 MBB.succ_empty() && Probability < BranchProbability(1, 8))
708 return false;
709 // For now only convert single instructions.
710 return NumCycles == 1;
711}
712
713bool SystemZInstrInfo::
714isProfitableToIfCvt(MachineBasicBlock &TMBB,
715 unsigned NumCyclesT, unsigned ExtraPredCyclesT,
716 MachineBasicBlock &FMBB,
717 unsigned NumCyclesF, unsigned ExtraPredCyclesF,
718 BranchProbability Probability) const {
719 // For now avoid converting mutually-exclusive cases.
720 return false;
721}
722
723bool SystemZInstrInfo::
724isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
725 BranchProbability Probability) const {
726 // For now only duplicate single instructions.
727 return NumCycles == 1;
728}
729
730bool SystemZInstrInfo::PredicateInstruction(
731 MachineInstr &MI, ArrayRef<MachineOperand> Pred) const {
732 assert(Pred.size() == 2 && "Invalid condition")((Pred.size() == 2 && "Invalid condition") ? static_cast
<void> (0) : __assert_fail ("Pred.size() == 2 && \"Invalid condition\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 732, __PRETTY_FUNCTION__))
;
733 unsigned CCValid = Pred[0].getImm();
734 unsigned CCMask = Pred[1].getImm();
735 assert(CCMask > 0 && CCMask < 15 && "Invalid predicate")((CCMask > 0 && CCMask < 15 && "Invalid predicate"
) ? static_cast<void> (0) : __assert_fail ("CCMask > 0 && CCMask < 15 && \"Invalid predicate\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 735, __PRETTY_FUNCTION__))
;
736 unsigned Opcode = MI.getOpcode();
737 if (Opcode == SystemZ::Trap) {
738 MI.setDesc(get(SystemZ::CondTrap));
739 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
740 .addImm(CCValid).addImm(CCMask)
741 .addReg(SystemZ::CC, RegState::Implicit);
742 return true;
743 }
744 if (Opcode == SystemZ::Return) {
745 MI.setDesc(get(SystemZ::CondReturn));
746 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
747 .addImm(CCValid).addImm(CCMask)
748 .addReg(SystemZ::CC, RegState::Implicit);
749 return true;
750 }
751 if (Opcode == SystemZ::CallJG) {
752 MachineOperand FirstOp = MI.getOperand(0);
753 const uint32_t *RegMask = MI.getOperand(1).getRegMask();
754 MI.RemoveOperand(1);
755 MI.RemoveOperand(0);
756 MI.setDesc(get(SystemZ::CallBRCL));
757 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
758 .addImm(CCValid)
759 .addImm(CCMask)
760 .add(FirstOp)
761 .addRegMask(RegMask)
762 .addReg(SystemZ::CC, RegState::Implicit);
763 return true;
764 }
765 if (Opcode == SystemZ::CallBR) {
766 const uint32_t *RegMask = MI.getOperand(0).getRegMask();
767 MI.RemoveOperand(0);
768 MI.setDesc(get(SystemZ::CallBCR));
769 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
770 .addImm(CCValid).addImm(CCMask)
771 .addRegMask(RegMask)
772 .addReg(SystemZ::CC, RegState::Implicit);
773 return true;
774 }
775 return false;
776}
777
778void SystemZInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
779 MachineBasicBlock::iterator MBBI,
780 const DebugLoc &DL, unsigned DestReg,
781 unsigned SrcReg, bool KillSrc) const {
782 // Split 128-bit GPR moves into two 64-bit moves. Add implicit uses of the
783 // super register in case one of the subregs is undefined.
784 // This handles ADDR128 too.
785 if (SystemZ::GR128BitRegClass.contains(DestReg, SrcReg)) {
786 copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_h64),
787 RI.getSubReg(SrcReg, SystemZ::subreg_h64), KillSrc);
788 MachineInstrBuilder(*MBB.getParent(), std::prev(MBBI))
789 .addReg(SrcReg, RegState::Implicit);
790 copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_l64),
791 RI.getSubReg(SrcReg, SystemZ::subreg_l64), KillSrc);
792 MachineInstrBuilder(*MBB.getParent(), std::prev(MBBI))
793 .addReg(SrcReg, (getKillRegState(KillSrc) | RegState::Implicit));
794 return;
795 }
796
797 if (SystemZ::GRX32BitRegClass.contains(DestReg, SrcReg)) {
798 emitGRX32Move(MBB, MBBI, DL, DestReg, SrcReg, SystemZ::LR, 32, KillSrc,
799 false);
800 return;
801 }
802
803 // Move 128-bit floating-point values between VR128 and FP128.
804 if (SystemZ::VR128BitRegClass.contains(DestReg) &&
805 SystemZ::FP128BitRegClass.contains(SrcReg)) {
806 unsigned SrcRegHi =
807 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_h64),
808 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
809 unsigned SrcRegLo =
810 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_l64),
811 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
812
813 BuildMI(MBB, MBBI, DL, get(SystemZ::VMRHG), DestReg)
814 .addReg(SrcRegHi, getKillRegState(KillSrc))
815 .addReg(SrcRegLo, getKillRegState(KillSrc));
816 return;
817 }
818 if (SystemZ::FP128BitRegClass.contains(DestReg) &&
819 SystemZ::VR128BitRegClass.contains(SrcReg)) {
820 unsigned DestRegHi =
821 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_h64),
822 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
823 unsigned DestRegLo =
824 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_l64),
825 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
826
827 if (DestRegHi != SrcReg)
828 copyPhysReg(MBB, MBBI, DL, DestRegHi, SrcReg, false);
829 BuildMI(MBB, MBBI, DL, get(SystemZ::VREPG), DestRegLo)
830 .addReg(SrcReg, getKillRegState(KillSrc)).addImm(1);
831 return;
832 }
833
834 // Move CC value from/to a GR32.
835 if (SrcReg == SystemZ::CC) {
836 auto MIB = BuildMI(MBB, MBBI, DL, get(SystemZ::IPM), DestReg);
837 if (KillSrc) {
838 const MachineFunction *MF = MBB.getParent();
839 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
840 MIB->addRegisterKilled(SrcReg, TRI);
841 }
842 return;
843 }
844 if (DestReg == SystemZ::CC) {
845 BuildMI(MBB, MBBI, DL, get(SystemZ::TMLH))
846 .addReg(SrcReg, getKillRegState(KillSrc))
847 .addImm(3 << (SystemZ::IPM_CC - 16));
848 return;
849 }
850
851 // Everything else needs only one instruction.
852 unsigned Opcode;
853 if (SystemZ::GR64BitRegClass.contains(DestReg, SrcReg))
854 Opcode = SystemZ::LGR;
855 else if (SystemZ::FP32BitRegClass.contains(DestReg, SrcReg))
856 // For z13 we prefer LDR over LER to avoid partial register dependencies.
857 Opcode = STI.hasVector() ? SystemZ::LDR32 : SystemZ::LER;
858 else if (SystemZ::FP64BitRegClass.contains(DestReg, SrcReg))
859 Opcode = SystemZ::LDR;
860 else if (SystemZ::FP128BitRegClass.contains(DestReg, SrcReg))
861 Opcode = SystemZ::LXR;
862 else if (SystemZ::VR32BitRegClass.contains(DestReg, SrcReg))
863 Opcode = SystemZ::VLR32;
864 else if (SystemZ::VR64BitRegClass.contains(DestReg, SrcReg))
865 Opcode = SystemZ::VLR64;
866 else if (SystemZ::VR128BitRegClass.contains(DestReg, SrcReg))
867 Opcode = SystemZ::VLR;
868 else if (SystemZ::AR32BitRegClass.contains(DestReg, SrcReg))
869 Opcode = SystemZ::CPYA;
870 else if (SystemZ::AR32BitRegClass.contains(DestReg) &&
871 SystemZ::GR32BitRegClass.contains(SrcReg))
872 Opcode = SystemZ::SAR;
873 else if (SystemZ::GR32BitRegClass.contains(DestReg) &&
874 SystemZ::AR32BitRegClass.contains(SrcReg))
875 Opcode = SystemZ::EAR;
876 else
877 llvm_unreachable("Impossible reg-to-reg copy")::llvm::llvm_unreachable_internal("Impossible reg-to-reg copy"
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 877)
;
878
879 BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)
880 .addReg(SrcReg, getKillRegState(KillSrc));
881}
882
883void SystemZInstrInfo::storeRegToStackSlot(
884 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg,
885 bool isKill, int FrameIdx, const TargetRegisterClass *RC,
886 const TargetRegisterInfo *TRI) const {
887 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
888
889 // Callers may expect a single instruction, so keep 128-bit moves
890 // together for now and lower them after register allocation.
891 unsigned LoadOpcode, StoreOpcode;
892 getLoadStoreOpcodes(RC, LoadOpcode, StoreOpcode);
893 addFrameReference(BuildMI(MBB, MBBI, DL, get(StoreOpcode))
894 .addReg(SrcReg, getKillRegState(isKill)),
895 FrameIdx);
896}
897
898void SystemZInstrInfo::loadRegFromStackSlot(
899 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg,
900 int FrameIdx, const TargetRegisterClass *RC,
901 const TargetRegisterInfo *TRI) const {
902 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
903
904 // Callers may expect a single instruction, so keep 128-bit moves
905 // together for now and lower them after register allocation.
906 unsigned LoadOpcode, StoreOpcode;
907 getLoadStoreOpcodes(RC, LoadOpcode, StoreOpcode);
908 addFrameReference(BuildMI(MBB, MBBI, DL, get(LoadOpcode), DestReg),
909 FrameIdx);
910}
911
912// Return true if MI is a simple load or store with a 12-bit displacement
913// and no index. Flag is SimpleBDXLoad for loads and SimpleBDXStore for stores.
914static bool isSimpleBD12Move(const MachineInstr *MI, unsigned Flag) {
915 const MCInstrDesc &MCID = MI->getDesc();
916 return ((MCID.TSFlags & Flag) &&
917 isUInt<12>(MI->getOperand(2).getImm()) &&
918 MI->getOperand(3).getReg() == 0);
919}
920
921namespace {
922
923struct LogicOp {
924 LogicOp() = default;
925 LogicOp(unsigned regSize, unsigned immLSB, unsigned immSize)
926 : RegSize(regSize), ImmLSB(immLSB), ImmSize(immSize) {}
927
928 explicit operator bool() const { return RegSize; }
929
930 unsigned RegSize = 0;
931 unsigned ImmLSB = 0;
932 unsigned ImmSize = 0;
933};
934
935} // end anonymous namespace
936
937static LogicOp interpretAndImmediate(unsigned Opcode) {
938 switch (Opcode) {
939 case SystemZ::NILMux: return LogicOp(32, 0, 16);
940 case SystemZ::NIHMux: return LogicOp(32, 16, 16);
941 case SystemZ::NILL64: return LogicOp(64, 0, 16);
942 case SystemZ::NILH64: return LogicOp(64, 16, 16);
943 case SystemZ::NIHL64: return LogicOp(64, 32, 16);
944 case SystemZ::NIHH64: return LogicOp(64, 48, 16);
945 case SystemZ::NIFMux: return LogicOp(32, 0, 32);
946 case SystemZ::NILF64: return LogicOp(64, 0, 32);
947 case SystemZ::NIHF64: return LogicOp(64, 32, 32);
948 default: return LogicOp();
949 }
950}
951
952static void transferDeadCC(MachineInstr *OldMI, MachineInstr *NewMI) {
953 if (OldMI->registerDefIsDead(SystemZ::CC)) {
954 MachineOperand *CCDef = NewMI->findRegisterDefOperand(SystemZ::CC);
955 if (CCDef != nullptr)
956 CCDef->setIsDead(true);
957 }
958}
959
960// Used to return from convertToThreeAddress after replacing two-address
961// instruction OldMI with three-address instruction NewMI.
962static MachineInstr *finishConvertToThreeAddress(MachineInstr *OldMI,
963 MachineInstr *NewMI,
964 LiveVariables *LV) {
965 if (LV) {
966 unsigned NumOps = OldMI->getNumOperands();
967 for (unsigned I = 1; I < NumOps; ++I) {
968 MachineOperand &Op = OldMI->getOperand(I);
969 if (Op.isReg() && Op.isKill())
970 LV->replaceKillInstruction(Op.getReg(), *OldMI, *NewMI);
971 }
972 }
973 transferDeadCC(OldMI, NewMI);
974 return NewMI;
975}
976
977MachineInstr *SystemZInstrInfo::convertToThreeAddress(
978 MachineFunction::iterator &MFI, MachineInstr &MI, LiveVariables *LV) const {
979 MachineBasicBlock *MBB = MI.getParent();
980 MachineFunction *MF = MBB->getParent();
981 MachineRegisterInfo &MRI = MF->getRegInfo();
982
983 unsigned Opcode = MI.getOpcode();
984 unsigned NumOps = MI.getNumOperands();
985
986 // Try to convert something like SLL into SLLK, if supported.
987 // We prefer to keep the two-operand form where possible both
988 // because it tends to be shorter and because some instructions
989 // have memory forms that can be used during spilling.
990 if (STI.hasDistinctOps()) {
1
Assuming the condition is false
2
Taking false branch
991 MachineOperand &Dest = MI.getOperand(0);
992 MachineOperand &Src = MI.getOperand(1);
993 unsigned DestReg = Dest.getReg();
994 unsigned SrcReg = Src.getReg();
995 // AHIMux is only really a three-operand instruction when both operands
996 // are low registers. Try to constrain both operands to be low if
997 // possible.
998 if (Opcode == SystemZ::AHIMux &&
999 TargetRegisterInfo::isVirtualRegister(DestReg) &&
1000 TargetRegisterInfo::isVirtualRegister(SrcReg) &&
1001 MRI.getRegClass(DestReg)->contains(SystemZ::R1L) &&
1002 MRI.getRegClass(SrcReg)->contains(SystemZ::R1L)) {
1003 MRI.constrainRegClass(DestReg, &SystemZ::GR32BitRegClass);
1004 MRI.constrainRegClass(SrcReg, &SystemZ::GR32BitRegClass);
1005 }
1006 int ThreeOperandOpcode = SystemZ::getThreeOperandOpcode(Opcode);
1007 if (ThreeOperandOpcode >= 0) {
1008 // Create three address instruction without adding the implicit
1009 // operands. Those will instead be copied over from the original
1010 // instruction by the loop below.
1011 MachineInstrBuilder MIB(
1012 *MF, MF->CreateMachineInstr(get(ThreeOperandOpcode), MI.getDebugLoc(),
1013 /*NoImplicit=*/true));
1014 MIB.add(Dest);
1015 // Keep the kill state, but drop the tied flag.
1016 MIB.addReg(Src.getReg(), getKillRegState(Src.isKill()), Src.getSubReg());
1017 // Keep the remaining operands as-is.
1018 for (unsigned I = 2; I < NumOps; ++I)
1019 MIB.add(MI.getOperand(I));
1020 MBB->insert(MI, MIB);
1021 return finishConvertToThreeAddress(&MI, MIB, LV);
1022 }
1023 }
1024
1025 // Try to convert an AND into an RISBG-type instruction.
1026 if (LogicOp And = interpretAndImmediate(Opcode)) {
3
Taking true branch
1027 uint64_t Imm = MI.getOperand(2).getImm() << And.ImmLSB;
1028 // AND IMMEDIATE leaves the other bits of the register unchanged.
1029 Imm |= allOnes(And.RegSize) & ~(allOnes(And.ImmSize) << And.ImmLSB);
1030 unsigned Start, End;
1031 if (isRxSBGMask(Imm, And.RegSize, Start, End)) {
4
Calling 'SystemZInstrInfo::isRxSBGMask'
1032 unsigned NewOpcode;
1033 if (And.RegSize == 64) {
1034 NewOpcode = SystemZ::RISBG;
1035 // Prefer RISBGN if available, since it does not clobber CC.
1036 if (STI.hasMiscellaneousExtensions())
1037 NewOpcode = SystemZ::RISBGN;
1038 } else {
1039 NewOpcode = SystemZ::RISBMux;
1040 Start &= 31;
1041 End &= 31;
1042 }
1043 MachineOperand &Dest = MI.getOperand(0);
1044 MachineOperand &Src = MI.getOperand(1);
1045 MachineInstrBuilder MIB =
1046 BuildMI(*MBB, MI, MI.getDebugLoc(), get(NewOpcode))
1047 .add(Dest)
1048 .addReg(0)
1049 .addReg(Src.getReg(), getKillRegState(Src.isKill()),
1050 Src.getSubReg())
1051 .addImm(Start)
1052 .addImm(End + 128)
1053 .addImm(0);
1054 return finishConvertToThreeAddress(&MI, MIB, LV);
1055 }
1056 }
1057 return nullptr;
1058}
1059
1060MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
1061 MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
1062 MachineBasicBlock::iterator InsertPt, int FrameIndex,
1063 LiveIntervals *LIS) const {
1064 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
1065 const MachineFrameInfo &MFI = MF.getFrameInfo();
1066 unsigned Size = MFI.getObjectSize(FrameIndex);
1067 unsigned Opcode = MI.getOpcode();
1068
1069 if (Ops.size() == 2 && Ops[0] == 0 && Ops[1] == 1) {
1070 if (LIS != nullptr && (Opcode == SystemZ::LA || Opcode == SystemZ::LAY) &&
1071 isInt<8>(MI.getOperand(2).getImm()) && !MI.getOperand(3).getReg()) {
1072
1073 // Check CC liveness, since new instruction introduces a dead
1074 // def of CC.
1075 MCRegUnitIterator CCUnit(SystemZ::CC, TRI);
1076 LiveRange &CCLiveRange = LIS->getRegUnit(*CCUnit);
1077 ++CCUnit;
1078 assert(!CCUnit.isValid() && "CC only has one reg unit.")((!CCUnit.isValid() && "CC only has one reg unit.") ?
static_cast<void> (0) : __assert_fail ("!CCUnit.isValid() && \"CC only has one reg unit.\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1078, __PRETTY_FUNCTION__))
;
1079 SlotIndex MISlot =
1080 LIS->getSlotIndexes()->getInstructionIndex(MI).getRegSlot();
1081 if (!CCLiveRange.liveAt(MISlot)) {
1082 // LA(Y) %reg, CONST(%reg) -> AGSI %mem, CONST
1083 MachineInstr *BuiltMI = BuildMI(*InsertPt->getParent(), InsertPt,
1084 MI.getDebugLoc(), get(SystemZ::AGSI))
1085 .addFrameIndex(FrameIndex)
1086 .addImm(0)
1087 .addImm(MI.getOperand(2).getImm());
1088 BuiltMI->findRegisterDefOperand(SystemZ::CC)->setIsDead(true);
1089 CCLiveRange.createDeadDef(MISlot, LIS->getVNInfoAllocator());
1090 return BuiltMI;
1091 }
1092 }
1093 return nullptr;
1094 }
1095
1096 // All other cases require a single operand.
1097 if (Ops.size() != 1)
1098 return nullptr;
1099
1100 unsigned OpNum = Ops[0];
1101 assert(Size * 8 ==((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1104, __PRETTY_FUNCTION__))
1102 TRI->getRegSizeInBits(*MF.getRegInfo()((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1104, __PRETTY_FUNCTION__))
1103 .getRegClass(MI.getOperand(OpNum).getReg())) &&((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1104, __PRETTY_FUNCTION__))
1104 "Invalid size combination")((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1104, __PRETTY_FUNCTION__))
;
1105
1106 if ((Opcode == SystemZ::AHI || Opcode == SystemZ::AGHI) && OpNum == 0 &&
1107 isInt<8>(MI.getOperand(2).getImm())) {
1108 // A(G)HI %reg, CONST -> A(G)SI %mem, CONST
1109 Opcode = (Opcode == SystemZ::AHI ? SystemZ::ASI : SystemZ::AGSI);
1110 MachineInstr *BuiltMI =
1111 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1112 .addFrameIndex(FrameIndex)
1113 .addImm(0)
1114 .addImm(MI.getOperand(2).getImm());
1115 transferDeadCC(&MI, BuiltMI);
1116 return BuiltMI;
1117 }
1118
1119 if ((Opcode == SystemZ::ALFI && OpNum == 0 &&
1120 isInt<8>((int32_t)MI.getOperand(2).getImm())) ||
1121 (Opcode == SystemZ::ALGFI && OpNum == 0 &&
1122 isInt<8>((int64_t)MI.getOperand(2).getImm()))) {
1123 // AL(G)FI %reg, CONST -> AL(G)SI %mem, CONST
1124 Opcode = (Opcode == SystemZ::ALFI ? SystemZ::ALSI : SystemZ::ALGSI);
1125 MachineInstr *BuiltMI =
1126 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1127 .addFrameIndex(FrameIndex)
1128 .addImm(0)
1129 .addImm((int8_t)MI.getOperand(2).getImm());
1130 transferDeadCC(&MI, BuiltMI);
1131 return BuiltMI;
1132 }
1133
1134 if ((Opcode == SystemZ::SLFI && OpNum == 0 &&
1135 isInt<8>((int32_t)-MI.getOperand(2).getImm())) ||
1136 (Opcode == SystemZ::SLGFI && OpNum == 0 &&
1137 isInt<8>((int64_t)-MI.getOperand(2).getImm()))) {
1138 // SL(G)FI %reg, CONST -> AL(G)SI %mem, -CONST
1139 Opcode = (Opcode == SystemZ::SLFI ? SystemZ::ALSI : SystemZ::ALGSI);
1140 MachineInstr *BuiltMI =
1141 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1142 .addFrameIndex(FrameIndex)
1143 .addImm(0)
1144 .addImm((int8_t)-MI.getOperand(2).getImm());
1145 transferDeadCC(&MI, BuiltMI);
1146 return BuiltMI;
1147 }
1148
1149 if (Opcode == SystemZ::LGDR || Opcode == SystemZ::LDGR) {
1150 bool Op0IsGPR = (Opcode == SystemZ::LGDR);
1151 bool Op1IsGPR = (Opcode == SystemZ::LDGR);
1152 // If we're spilling the destination of an LDGR or LGDR, store the
1153 // source register instead.
1154 if (OpNum == 0) {
1155 unsigned StoreOpcode = Op1IsGPR ? SystemZ::STG : SystemZ::STD;
1156 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1157 get(StoreOpcode))
1158 .add(MI.getOperand(1))
1159 .addFrameIndex(FrameIndex)
1160 .addImm(0)
1161 .addReg(0);
1162 }
1163 // If we're spilling the source of an LDGR or LGDR, load the
1164 // destination register instead.
1165 if (OpNum == 1) {
1166 unsigned LoadOpcode = Op0IsGPR ? SystemZ::LG : SystemZ::LD;
1167 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1168 get(LoadOpcode))
1169 .add(MI.getOperand(0))
1170 .addFrameIndex(FrameIndex)
1171 .addImm(0)
1172 .addReg(0);
1173 }
1174 }
1175
1176 // Look for cases where the source of a simple store or the destination
1177 // of a simple load is being spilled. Try to use MVC instead.
1178 //
1179 // Although MVC is in practice a fast choice in these cases, it is still
1180 // logically a bytewise copy. This means that we cannot use it if the
1181 // load or store is volatile. We also wouldn't be able to use MVC if
1182 // the two memories partially overlap, but that case cannot occur here,
1183 // because we know that one of the memories is a full frame index.
1184 //
1185 // For performance reasons, we also want to avoid using MVC if the addresses
1186 // might be equal. We don't worry about that case here, because spill slot
1187 // coloring happens later, and because we have special code to remove
1188 // MVCs that turn out to be redundant.
1189 if (OpNum == 0 && MI.hasOneMemOperand()) {
1190 MachineMemOperand *MMO = *MI.memoperands_begin();
1191 if (MMO->getSize() == Size && !MMO->isVolatile() && !MMO->isAtomic()) {
1192 // Handle conversion of loads.
1193 if (isSimpleBD12Move(&MI, SystemZII::SimpleBDXLoad)) {
1194 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1195 get(SystemZ::MVC))
1196 .addFrameIndex(FrameIndex)
1197 .addImm(0)
1198 .addImm(Size)
1199 .add(MI.getOperand(1))
1200 .addImm(MI.getOperand(2).getImm())
1201 .addMemOperand(MMO);
1202 }
1203 // Handle conversion of stores.
1204 if (isSimpleBD12Move(&MI, SystemZII::SimpleBDXStore)) {
1205 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1206 get(SystemZ::MVC))
1207 .add(MI.getOperand(1))
1208 .addImm(MI.getOperand(2).getImm())
1209 .addImm(Size)
1210 .addFrameIndex(FrameIndex)
1211 .addImm(0)
1212 .addMemOperand(MMO);
1213 }
1214 }
1215 }
1216
1217 // If the spilled operand is the final one, try to change <INSN>R
1218 // into <INSN>.
1219 int MemOpcode = SystemZ::getMemOpcode(Opcode);
1220 if (MemOpcode >= 0) {
1221 unsigned NumOps = MI.getNumExplicitOperands();
1222 if (OpNum == NumOps - 1) {
1223 const MCInstrDesc &MemDesc = get(MemOpcode);
1224 uint64_t AccessBytes = SystemZII::getAccessSize(MemDesc.TSFlags);
1225 assert(AccessBytes != 0 && "Size of access should be known")((AccessBytes != 0 && "Size of access should be known"
) ? static_cast<void> (0) : __assert_fail ("AccessBytes != 0 && \"Size of access should be known\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1225, __PRETTY_FUNCTION__))
;
1226 assert(AccessBytes <= Size && "Access outside the frame index")((AccessBytes <= Size && "Access outside the frame index"
) ? static_cast<void> (0) : __assert_fail ("AccessBytes <= Size && \"Access outside the frame index\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1226, __PRETTY_FUNCTION__))
;
1227 uint64_t Offset = Size - AccessBytes;
1228 MachineInstrBuilder MIB = BuildMI(*InsertPt->getParent(), InsertPt,
1229 MI.getDebugLoc(), get(MemOpcode));
1230 for (unsigned I = 0; I < OpNum; ++I)
1231 MIB.add(MI.getOperand(I));
1232 MIB.addFrameIndex(FrameIndex).addImm(Offset);
1233 if (MemDesc.TSFlags & SystemZII::HasIndex)
1234 MIB.addReg(0);
1235 transferDeadCC(&MI, MIB);
1236 return MIB;
1237 }
1238 }
1239
1240 return nullptr;
1241}
1242
1243MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
1244 MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
1245 MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
1246 LiveIntervals *LIS) const {
1247 return nullptr;
1248}
1249
1250bool SystemZInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
1251 switch (MI.getOpcode()) {
1252 case SystemZ::L128:
1253 splitMove(MI, SystemZ::LG);
1254 return true;
1255
1256 case SystemZ::ST128:
1257 splitMove(MI, SystemZ::STG);
1258 return true;
1259
1260 case SystemZ::LX:
1261 splitMove(MI, SystemZ::LD);
1262 return true;
1263
1264 case SystemZ::STX:
1265 splitMove(MI, SystemZ::STD);
1266 return true;
1267
1268 case SystemZ::LBMux:
1269 expandRXYPseudo(MI, SystemZ::LB, SystemZ::LBH);
1270 return true;
1271
1272 case SystemZ::LHMux:
1273 expandRXYPseudo(MI, SystemZ::LH, SystemZ::LHH);
1274 return true;
1275
1276 case SystemZ::LLCRMux:
1277 expandZExtPseudo(MI, SystemZ::LLCR, 8);
1278 return true;
1279
1280 case SystemZ::LLHRMux:
1281 expandZExtPseudo(MI, SystemZ::LLHR, 16);
1282 return true;
1283
1284 case SystemZ::LLCMux:
1285 expandRXYPseudo(MI, SystemZ::LLC, SystemZ::LLCH);
1286 return true;
1287
1288 case SystemZ::LLHMux:
1289 expandRXYPseudo(MI, SystemZ::LLH, SystemZ::LLHH);
1290 return true;
1291
1292 case SystemZ::LMux:
1293 expandRXYPseudo(MI, SystemZ::L, SystemZ::LFH);
1294 return true;
1295
1296 case SystemZ::LOCMux:
1297 expandLOCPseudo(MI, SystemZ::LOC, SystemZ::LOCFH);
1298 return true;
1299
1300 case SystemZ::LOCHIMux:
1301 expandLOCPseudo(MI, SystemZ::LOCHI, SystemZ::LOCHHI);
1302 return true;
1303
1304 case SystemZ::LOCRMux:
1305 expandLOCRPseudo(MI, SystemZ::LOCR, SystemZ::LOCFHR);
1306 return true;
1307
1308 case SystemZ::STCMux:
1309 expandRXYPseudo(MI, SystemZ::STC, SystemZ::STCH);
1310 return true;
1311
1312 case SystemZ::STHMux:
1313 expandRXYPseudo(MI, SystemZ::STH, SystemZ::STHH);
1314 return true;
1315
1316 case SystemZ::STMux:
1317 expandRXYPseudo(MI, SystemZ::ST, SystemZ::STFH);
1318 return true;
1319
1320 case SystemZ::STOCMux:
1321 expandLOCPseudo(MI, SystemZ::STOC, SystemZ::STOCFH);
1322 return true;
1323
1324 case SystemZ::LHIMux:
1325 expandRIPseudo(MI, SystemZ::LHI, SystemZ::IIHF, true);
1326 return true;
1327
1328 case SystemZ::IIFMux:
1329 expandRIPseudo(MI, SystemZ::IILF, SystemZ::IIHF, false);
1330 return true;
1331
1332 case SystemZ::IILMux:
1333 expandRIPseudo(MI, SystemZ::IILL, SystemZ::IIHL, false);
1334 return true;
1335
1336 case SystemZ::IIHMux:
1337 expandRIPseudo(MI, SystemZ::IILH, SystemZ::IIHH, false);
1338 return true;
1339
1340 case SystemZ::NIFMux:
1341 expandRIPseudo(MI, SystemZ::NILF, SystemZ::NIHF, false);
1342 return true;
1343
1344 case SystemZ::NILMux:
1345 expandRIPseudo(MI, SystemZ::NILL, SystemZ::NIHL, false);
1346 return true;
1347
1348 case SystemZ::NIHMux:
1349 expandRIPseudo(MI, SystemZ::NILH, SystemZ::NIHH, false);
1350 return true;
1351
1352 case SystemZ::OIFMux:
1353 expandRIPseudo(MI, SystemZ::OILF, SystemZ::OIHF, false);
1354 return true;
1355
1356 case SystemZ::OILMux:
1357 expandRIPseudo(MI, SystemZ::OILL, SystemZ::OIHL, false);
1358 return true;
1359
1360 case SystemZ::OIHMux:
1361 expandRIPseudo(MI, SystemZ::OILH, SystemZ::OIHH, false);
1362 return true;
1363
1364 case SystemZ::XIFMux:
1365 expandRIPseudo(MI, SystemZ::XILF, SystemZ::XIHF, false);
1366 return true;
1367
1368 case SystemZ::TMLMux:
1369 expandRIPseudo(MI, SystemZ::TMLL, SystemZ::TMHL, false);
1370 return true;
1371
1372 case SystemZ::TMHMux:
1373 expandRIPseudo(MI, SystemZ::TMLH, SystemZ::TMHH, false);
1374 return true;
1375
1376 case SystemZ::AHIMux:
1377 expandRIPseudo(MI, SystemZ::AHI, SystemZ::AIH, false);
1378 return true;
1379
1380 case SystemZ::AHIMuxK:
1381 expandRIEPseudo(MI, SystemZ::AHI, SystemZ::AHIK, SystemZ::AIH);
1382 return true;
1383
1384 case SystemZ::AFIMux:
1385 expandRIPseudo(MI, SystemZ::AFI, SystemZ::AIH, false);
1386 return true;
1387
1388 case SystemZ::CHIMux:
1389 expandRIPseudo(MI, SystemZ::CHI, SystemZ::CIH, false);
1390 return true;
1391
1392 case SystemZ::CFIMux:
1393 expandRIPseudo(MI, SystemZ::CFI, SystemZ::CIH, false);
1394 return true;
1395
1396 case SystemZ::CLFIMux:
1397 expandRIPseudo(MI, SystemZ::CLFI, SystemZ::CLIH, false);
1398 return true;
1399
1400 case SystemZ::CMux:
1401 expandRXYPseudo(MI, SystemZ::C, SystemZ::CHF);
1402 return true;
1403
1404 case SystemZ::CLMux:
1405 expandRXYPseudo(MI, SystemZ::CL, SystemZ::CLHF);
1406 return true;
1407
1408 case SystemZ::RISBMux: {
1409 bool DestIsHigh = isHighReg(MI.getOperand(0).getReg());
1410 bool SrcIsHigh = isHighReg(MI.getOperand(2).getReg());
1411 if (SrcIsHigh == DestIsHigh)
1412 MI.setDesc(get(DestIsHigh ? SystemZ::RISBHH : SystemZ::RISBLL));
1413 else {
1414 MI.setDesc(get(DestIsHigh ? SystemZ::RISBHL : SystemZ::RISBLH));
1415 MI.getOperand(5).setImm(MI.getOperand(5).getImm() ^ 32);
1416 }
1417 return true;
1418 }
1419
1420 case SystemZ::ADJDYNALLOC:
1421 splitAdjDynAlloc(MI);
1422 return true;
1423
1424 case TargetOpcode::LOAD_STACK_GUARD:
1425 expandLoadStackGuard(&MI);
1426 return true;
1427
1428 default:
1429 return false;
1430 }
1431}
1432
1433unsigned SystemZInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
1434 if (MI.isInlineAsm()) {
1435 const MachineFunction *MF = MI.getParent()->getParent();
1436 const char *AsmStr = MI.getOperand(0).getSymbolName();
1437 return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());
1438 }
1439 return MI.getDesc().getSize();
1440}
1441
1442SystemZII::Branch
1443SystemZInstrInfo::getBranchInfo(const MachineInstr &MI) const {
1444 switch (MI.getOpcode()) {
1445 case SystemZ::BR:
1446 case SystemZ::BI:
1447 case SystemZ::J:
1448 case SystemZ::JG:
1449 return SystemZII::Branch(SystemZII::BranchNormal, SystemZ::CCMASK_ANY,
1450 SystemZ::CCMASK_ANY, &MI.getOperand(0));
1451
1452 case SystemZ::BRC:
1453 case SystemZ::BRCL:
1454 return SystemZII::Branch(SystemZII::BranchNormal, MI.getOperand(0).getImm(),
1455 MI.getOperand(1).getImm(), &MI.getOperand(2));
1456
1457 case SystemZ::BRCT:
1458 case SystemZ::BRCTH:
1459 return SystemZII::Branch(SystemZII::BranchCT, SystemZ::CCMASK_ICMP,
1460 SystemZ::CCMASK_CMP_NE, &MI.getOperand(2));
1461
1462 case SystemZ::BRCTG:
1463 return SystemZII::Branch(SystemZII::BranchCTG, SystemZ::CCMASK_ICMP,
1464 SystemZ::CCMASK_CMP_NE, &MI.getOperand(2));
1465
1466 case SystemZ::CIJ:
1467 case SystemZ::CRJ:
1468 return SystemZII::Branch(SystemZII::BranchC, SystemZ::CCMASK_ICMP,
1469 MI.getOperand(2).getImm(), &MI.getOperand(3));
1470
1471 case SystemZ::CLIJ:
1472 case SystemZ::CLRJ:
1473 return SystemZII::Branch(SystemZII::BranchCL, SystemZ::CCMASK_ICMP,
1474 MI.getOperand(2).getImm(), &MI.getOperand(3));
1475
1476 case SystemZ::CGIJ:
1477 case SystemZ::CGRJ:
1478 return SystemZII::Branch(SystemZII::BranchCG, SystemZ::CCMASK_ICMP,
1479 MI.getOperand(2).getImm(), &MI.getOperand(3));
1480
1481 case SystemZ::CLGIJ:
1482 case SystemZ::CLGRJ:
1483 return SystemZII::Branch(SystemZII::BranchCLG, SystemZ::CCMASK_ICMP,
1484 MI.getOperand(2).getImm(), &MI.getOperand(3));
1485
1486 default:
1487 llvm_unreachable("Unrecognized branch opcode")::llvm::llvm_unreachable_internal("Unrecognized branch opcode"
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1487)
;
1488 }
1489}
1490
1491void SystemZInstrInfo::getLoadStoreOpcodes(const TargetRegisterClass *RC,
1492 unsigned &LoadOpcode,
1493 unsigned &StoreOpcode) const {
1494 if (RC == &SystemZ::GR32BitRegClass || RC == &SystemZ::ADDR32BitRegClass) {
1495 LoadOpcode = SystemZ::L;
1496 StoreOpcode = SystemZ::ST;
1497 } else if (RC == &SystemZ::GRH32BitRegClass) {
1498 LoadOpcode = SystemZ::LFH;
1499 StoreOpcode = SystemZ::STFH;
1500 } else if (RC == &SystemZ::GRX32BitRegClass) {
1501 LoadOpcode = SystemZ::LMux;
1502 StoreOpcode = SystemZ::STMux;
1503 } else if (RC == &SystemZ::GR64BitRegClass ||
1504 RC == &SystemZ::ADDR64BitRegClass) {
1505 LoadOpcode = SystemZ::LG;
1506 StoreOpcode = SystemZ::STG;
1507 } else if (RC == &SystemZ::GR128BitRegClass ||
1508 RC == &SystemZ::ADDR128BitRegClass) {
1509 LoadOpcode = SystemZ::L128;
1510 StoreOpcode = SystemZ::ST128;
1511 } else if (RC == &SystemZ::FP32BitRegClass) {
1512 LoadOpcode = SystemZ::LE;
1513 StoreOpcode = SystemZ::STE;
1514 } else if (RC == &SystemZ::FP64BitRegClass) {
1515 LoadOpcode = SystemZ::LD;
1516 StoreOpcode = SystemZ::STD;
1517 } else if (RC == &SystemZ::FP128BitRegClass) {
1518 LoadOpcode = SystemZ::LX;
1519 StoreOpcode = SystemZ::STX;
1520 } else if (RC == &SystemZ::VR32BitRegClass) {
1521 LoadOpcode = SystemZ::VL32;
1522 StoreOpcode = SystemZ::VST32;
1523 } else if (RC == &SystemZ::VR64BitRegClass) {
1524 LoadOpcode = SystemZ::VL64;
1525 StoreOpcode = SystemZ::VST64;
1526 } else if (RC == &SystemZ::VF128BitRegClass ||
1527 RC == &SystemZ::VR128BitRegClass) {
1528 LoadOpcode = SystemZ::VL;
1529 StoreOpcode = SystemZ::VST;
1530 } else
1531 llvm_unreachable("Unsupported regclass to load or store")::llvm::llvm_unreachable_internal("Unsupported regclass to load or store"
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1531)
;
1532}
1533
1534unsigned SystemZInstrInfo::getOpcodeForOffset(unsigned Opcode,
1535 int64_t Offset) const {
1536 const MCInstrDesc &MCID = get(Opcode);
1537 int64_t Offset2 = (MCID.TSFlags & SystemZII::Is128Bit ? Offset + 8 : Offset);
1538 if (isUInt<12>(Offset) && isUInt<12>(Offset2)) {
1539 // Get the instruction to use for unsigned 12-bit displacements.
1540 int Disp12Opcode = SystemZ::getDisp12Opcode(Opcode);
1541 if (Disp12Opcode >= 0)
1542 return Disp12Opcode;
1543
1544 // All address-related instructions can use unsigned 12-bit
1545 // displacements.
1546 return Opcode;
1547 }
1548 if (isInt<20>(Offset) && isInt<20>(Offset2)) {
1549 // Get the instruction to use for signed 20-bit displacements.
1550 int Disp20Opcode = SystemZ::getDisp20Opcode(Opcode);
1551 if (Disp20Opcode >= 0)
1552 return Disp20Opcode;
1553
1554 // Check whether Opcode allows signed 20-bit displacements.
1555 if (MCID.TSFlags & SystemZII::Has20BitOffset)
1556 return Opcode;
1557 }
1558 return 0;
1559}
1560
1561unsigned SystemZInstrInfo::getLoadAndTest(unsigned Opcode) const {
1562 switch (Opcode) {
1563 case SystemZ::L: return SystemZ::LT;
1564 case SystemZ::LY: return SystemZ::LT;
1565 case SystemZ::LG: return SystemZ::LTG;
1566 case SystemZ::LGF: return SystemZ::LTGF;
1567 case SystemZ::LR: return SystemZ::LTR;
1568 case SystemZ::LGFR: return SystemZ::LTGFR;
1569 case SystemZ::LGR: return SystemZ::LTGR;
1570 case SystemZ::LER: return SystemZ::LTEBR;
1571 case SystemZ::LDR: return SystemZ::LTDBR;
1572 case SystemZ::LXR: return SystemZ::LTXBR;
1573 case SystemZ::LCDFR: return SystemZ::LCDBR;
1574 case SystemZ::LPDFR: return SystemZ::LPDBR;
1575 case SystemZ::LNDFR: return SystemZ::LNDBR;
1576 case SystemZ::LCDFR_32: return SystemZ::LCEBR;
1577 case SystemZ::LPDFR_32: return SystemZ::LPEBR;
1578 case SystemZ::LNDFR_32: return SystemZ::LNEBR;
1579 // On zEC12 we prefer to use RISBGN. But if there is a chance to
1580 // actually use the condition code, we may turn it back into RISGB.
1581 // Note that RISBG is not really a "load-and-test" instruction,
1582 // but sets the same condition code values, so is OK to use here.
1583 case SystemZ::RISBGN: return SystemZ::RISBG;
1584 default: return 0;
1585 }
1586}
1587
1588// Return true if Mask matches the regexp 0*1+0*, given that zero masks
1589// have already been filtered out. Store the first set bit in LSB and
1590// the number of set bits in Length if so.
1591static bool isStringOfOnes(uint64_t Mask, unsigned &LSB, unsigned &Length) {
1592 unsigned First = findFirstSet(Mask);
8
Calling 'findFirstSet<unsigned long>'
15
Returning from 'findFirstSet<unsigned long>'
16
'First' initialized to 4294967295
1593 uint64_t Top = (Mask >> First) + 1;
17
The result of the right shift is undefined due to shifting by '4294967295', which is greater or equal to the width of type 'uint64_t'
1594 if ((Top & -Top) == Top) {
1595 LSB = First;
1596 Length = findFirstSet(Top);
1597 return true;
1598 }
1599 return false;
1600}
1601
1602bool SystemZInstrInfo::isRxSBGMask(uint64_t Mask, unsigned BitSize,
1603 unsigned &Start, unsigned &End) const {
1604 // Reject trivial all-zero masks.
1605 Mask &= allOnes(BitSize);
1606 if (Mask == 0)
5
Taking false branch
1607 return false;
1608
1609 // Handle the 1+0+ or 0+1+0* cases. Start then specifies the index of
1610 // the msb and End specifies the index of the lsb.
1611 unsigned LSB, Length;
1612 if (isStringOfOnes(Mask, LSB, Length)) {
6
Taking false branch
1613 Start = 63 - (LSB + Length - 1);
1614 End = 63 - LSB;
1615 return true;
1616 }
1617
1618 // Handle the wrap-around 1+0+1+ cases. Start then specifies the msb
1619 // of the low 1s and End specifies the lsb of the high 1s.
1620 if (isStringOfOnes(Mask ^ allOnes(BitSize), LSB, Length)) {
7
Calling 'isStringOfOnes'
1621 assert(LSB > 0 && "Bottom bit must be set")((LSB > 0 && "Bottom bit must be set") ? static_cast
<void> (0) : __assert_fail ("LSB > 0 && \"Bottom bit must be set\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1621, __PRETTY_FUNCTION__))
;
1622 assert(LSB + Length < BitSize && "Top bit must be set")((LSB + Length < BitSize && "Top bit must be set")
? static_cast<void> (0) : __assert_fail ("LSB + Length < BitSize && \"Top bit must be set\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1622, __PRETTY_FUNCTION__))
;
1623 Start = 63 - (LSB - 1);
1624 End = 63 - (LSB + Length);
1625 return true;
1626 }
1627
1628 return false;
1629}
1630
1631unsigned SystemZInstrInfo::getFusedCompare(unsigned Opcode,
1632 SystemZII::FusedCompareType Type,
1633 const MachineInstr *MI) const {
1634 switch (Opcode) {
1635 case SystemZ::CHI:
1636 case SystemZ::CGHI:
1637 if (!(MI && isInt<8>(MI->getOperand(1).getImm())))
1638 return 0;
1639 break;
1640 case SystemZ::CLFI:
1641 case SystemZ::CLGFI:
1642 if (!(MI && isUInt<8>(MI->getOperand(1).getImm())))
1643 return 0;
1644 break;
1645 case SystemZ::CL:
1646 case SystemZ::CLG:
1647 if (!STI.hasMiscellaneousExtensions())
1648 return 0;
1649 if (!(MI && MI->getOperand(3).getReg() == 0))
1650 return 0;
1651 break;
1652 }
1653 switch (Type) {
1654 case SystemZII::CompareAndBranch:
1655 switch (Opcode) {
1656 case SystemZ::CR:
1657 return SystemZ::CRJ;
1658 case SystemZ::CGR:
1659 return SystemZ::CGRJ;
1660 case SystemZ::CHI:
1661 return SystemZ::CIJ;
1662 case SystemZ::CGHI:
1663 return SystemZ::CGIJ;
1664 case SystemZ::CLR:
1665 return SystemZ::CLRJ;
1666 case SystemZ::CLGR:
1667 return SystemZ::CLGRJ;
1668 case SystemZ::CLFI:
1669 return SystemZ::CLIJ;
1670 case SystemZ::CLGFI:
1671 return SystemZ::CLGIJ;
1672 default:
1673 return 0;
1674 }
1675 case SystemZII::CompareAndReturn:
1676 switch (Opcode) {
1677 case SystemZ::CR:
1678 return SystemZ::CRBReturn;
1679 case SystemZ::CGR:
1680 return SystemZ::CGRBReturn;
1681 case SystemZ::CHI:
1682 return SystemZ::CIBReturn;
1683 case SystemZ::CGHI:
1684 return SystemZ::CGIBReturn;
1685 case SystemZ::CLR:
1686 return SystemZ::CLRBReturn;
1687 case SystemZ::CLGR:
1688 return SystemZ::CLGRBReturn;
1689 case SystemZ::CLFI:
1690 return SystemZ::CLIBReturn;
1691 case SystemZ::CLGFI:
1692 return SystemZ::CLGIBReturn;
1693 default:
1694 return 0;
1695 }
1696 case SystemZII::CompareAndSibcall:
1697 switch (Opcode) {
1698 case SystemZ::CR:
1699 return SystemZ::CRBCall;
1700 case SystemZ::CGR:
1701 return SystemZ::CGRBCall;
1702 case SystemZ::CHI:
1703 return SystemZ::CIBCall;
1704 case SystemZ::CGHI:
1705 return SystemZ::CGIBCall;
1706 case SystemZ::CLR:
1707 return SystemZ::CLRBCall;
1708 case SystemZ::CLGR:
1709 return SystemZ::CLGRBCall;
1710 case SystemZ::CLFI:
1711 return SystemZ::CLIBCall;
1712 case SystemZ::CLGFI:
1713 return SystemZ::CLGIBCall;
1714 default:
1715 return 0;
1716 }
1717 case SystemZII::CompareAndTrap:
1718 switch (Opcode) {
1719 case SystemZ::CR:
1720 return SystemZ::CRT;
1721 case SystemZ::CGR:
1722 return SystemZ::CGRT;
1723 case SystemZ::CHI:
1724 return SystemZ::CIT;
1725 case SystemZ::CGHI:
1726 return SystemZ::CGIT;
1727 case SystemZ::CLR:
1728 return SystemZ::CLRT;
1729 case SystemZ::CLGR:
1730 return SystemZ::CLGRT;
1731 case SystemZ::CLFI:
1732 return SystemZ::CLFIT;
1733 case SystemZ::CLGFI:
1734 return SystemZ::CLGIT;
1735 case SystemZ::CL:
1736 return SystemZ::CLT;
1737 case SystemZ::CLG:
1738 return SystemZ::CLGT;
1739 default:
1740 return 0;
1741 }
1742 }
1743 return 0;
1744}
1745
1746unsigned SystemZInstrInfo::getLoadAndTrap(unsigned Opcode) const {
1747 if (!STI.hasLoadAndTrap())
1748 return 0;
1749 switch (Opcode) {
1750 case SystemZ::L:
1751 case SystemZ::LY:
1752 return SystemZ::LAT;
1753 case SystemZ::LG:
1754 return SystemZ::LGAT;
1755 case SystemZ::LFH:
1756 return SystemZ::LFHAT;
1757 case SystemZ::LLGF:
1758 return SystemZ::LLGFAT;
1759 case SystemZ::LLGT:
1760 return SystemZ::LLGTAT;
1761 }
1762 return 0;
1763}
1764
1765void SystemZInstrInfo::loadImmediate(MachineBasicBlock &MBB,
1766 MachineBasicBlock::iterator MBBI,
1767 unsigned Reg, uint64_t Value) const {
1768 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
1769 unsigned Opcode;
1770 if (isInt<16>(Value))
1771 Opcode = SystemZ::LGHI;
1772 else if (SystemZ::isImmLL(Value))
1773 Opcode = SystemZ::LLILL;
1774 else if (SystemZ::isImmLH(Value)) {
1775 Opcode = SystemZ::LLILH;
1776 Value >>= 16;
1777 } else {
1778 assert(isInt<32>(Value) && "Huge values not handled yet")((isInt<32>(Value) && "Huge values not handled yet"
) ? static_cast<void> (0) : __assert_fail ("isInt<32>(Value) && \"Huge values not handled yet\""
, "/build/llvm-toolchain-snapshot-9~svn362543/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1778, __PRETTY_FUNCTION__))
;
1779 Opcode = SystemZ::LGFI;
1780 }
1781 BuildMI(MBB, MBBI, DL, get(Opcode), Reg).addImm(Value);
1782}
1783
1784bool SystemZInstrInfo::
1785areMemAccessesTriviallyDisjoint(const MachineInstr &MIa,
1786 const MachineInstr &MIb,
1787 AliasAnalysis *AA) const {
1788
1789 if (!MIa.hasOneMemOperand() || !MIb.hasOneMemOperand())
1790 return false;
1791
1792 // If mem-operands show that the same address Value is used by both
1793 // instructions, check for non-overlapping offsets and widths. Not
1794 // sure if a register based analysis would be an improvement...
1795
1796 MachineMemOperand *MMOa = *MIa.memoperands_begin();
1797 MachineMemOperand *MMOb = *MIb.memoperands_begin();
1798 const Value *VALa = MMOa->getValue();
1799 const Value *VALb = MMOb->getValue();
1800 bool SameVal = (VALa && VALb && (VALa == VALb));
1801 if (!SameVal) {
1802 const PseudoSourceValue *PSVa = MMOa->getPseudoValue();
1803 const PseudoSourceValue *PSVb = MMOb->getPseudoValue();
1804 if (PSVa && PSVb && (PSVa == PSVb))
1805 SameVal = true;
1806 }
1807 if (SameVal) {
1808 int OffsetA = MMOa->getOffset(), OffsetB = MMOb->getOffset();
1809 int WidthA = MMOa->getSize(), WidthB = MMOb->getSize();
1810 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB;
1811 int HighOffset = OffsetA < OffsetB ? OffsetB : OffsetA;
1812 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB;
1813 if (LowOffset + LowWidth <= HighOffset)
1814 return true;
1815 }
1816
1817 return false;
1818}

/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h

1//===-- llvm/Support/MathExtras.h - Useful math functions -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains some functions that are useful for math stuff.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_SUPPORT_MATHEXTRAS_H
14#define LLVM_SUPPORT_MATHEXTRAS_H
15
16#include "llvm/Support/Compiler.h"
17#include "llvm/Support/SwapByteOrder.h"
18#include <algorithm>
19#include <cassert>
20#include <climits>
21#include <cstring>
22#include <limits>
23#include <type_traits>
24
25#ifdef __ANDROID_NDK__
26#include <android/api-level.h>
27#endif
28
29#ifdef _MSC_VER
30// Declare these intrinsics manually rather including intrin.h. It's very
31// expensive, and MathExtras.h is popular.
32// #include <intrin.h>
33extern "C" {
34unsigned char _BitScanForward(unsigned long *_Index, unsigned long _Mask);
35unsigned char _BitScanForward64(unsigned long *_Index, unsigned __int64 _Mask);
36unsigned char _BitScanReverse(unsigned long *_Index, unsigned long _Mask);
37unsigned char _BitScanReverse64(unsigned long *_Index, unsigned __int64 _Mask);
38}
39#endif
40
41namespace llvm {
42/// The behavior an operation has on an input of 0.
43enum ZeroBehavior {
44 /// The returned value is undefined.
45 ZB_Undefined,
46 /// The returned value is numeric_limits<T>::max()
47 ZB_Max,
48 /// The returned value is numeric_limits<T>::digits
49 ZB_Width
50};
51
52namespace detail {
53template <typename T, std::size_t SizeOfT> struct TrailingZerosCounter {
54 static unsigned count(T Val, ZeroBehavior) {
55 if (!Val)
56 return std::numeric_limits<T>::digits;
57 if (Val & 0x1)
58 return 0;
59
60 // Bisection method.
61 unsigned ZeroBits = 0;
62 T Shift = std::numeric_limits<T>::digits >> 1;
63 T Mask = std::numeric_limits<T>::max() >> Shift;
64 while (Shift) {
65 if ((Val & Mask) == 0) {
66 Val >>= Shift;
67 ZeroBits |= Shift;
68 }
69 Shift >>= 1;
70 Mask >>= Shift;
71 }
72 return ZeroBits;
73 }
74};
75
76#if __GNUC__4 >= 4 || defined(_MSC_VER)
77template <typename T> struct TrailingZerosCounter<T, 4> {
78 static unsigned count(T Val, ZeroBehavior ZB) {
79 if (ZB != ZB_Undefined && Val == 0)
80 return 32;
81
82#if __has_builtin(__builtin_ctz)1 || LLVM_GNUC_PREREQ(4, 0, 0)((4 << 20) + (2 << 10) + 1 >= ((4) << 20
) + ((0) << 10) + (0))
83 return __builtin_ctz(Val);
84#elif defined(_MSC_VER)
85 unsigned long Index;
86 _BitScanForward(&Index, Val);
87 return Index;
88#endif
89 }
90};
91
92#if !defined(_MSC_VER) || defined(_M_X64)
93template <typename T> struct TrailingZerosCounter<T, 8> {
94 static unsigned count(T Val, ZeroBehavior ZB) {
95 if (ZB != ZB_Undefined && Val == 0)
96 return 64;
97
98#if __has_builtin(__builtin_ctzll)1 || LLVM_GNUC_PREREQ(4, 0, 0)((4 << 20) + (2 << 10) + 1 >= ((4) << 20
) + ((0) << 10) + (0))
99 return __builtin_ctzll(Val);
100#elif defined(_MSC_VER)
101 unsigned long Index;
102 _BitScanForward64(&Index, Val);
103 return Index;
104#endif
105 }
106};
107#endif
108#endif
109} // namespace detail
110
111/// Count number of 0's from the least significant bit to the most
112/// stopping at the first 1.
113///
114/// Only unsigned integral types are allowed.
115///
116/// \param ZB the behavior on an input of 0. Only ZB_Width and ZB_Undefined are
117/// valid arguments.
118template <typename T>
119unsigned countTrailingZeros(T Val, ZeroBehavior ZB = ZB_Width) {
120 static_assert(std::numeric_limits<T>::is_integer &&
121 !std::numeric_limits<T>::is_signed,
122 "Only unsigned integral types are allowed.");
123 return llvm::detail::TrailingZerosCounter<T, sizeof(T)>::count(Val, ZB);
124}
125
126namespace detail {
127template <typename T, std::size_t SizeOfT> struct LeadingZerosCounter {
128 static unsigned count(T Val, ZeroBehavior) {
129 if (!Val)
130 return std::numeric_limits<T>::digits;
131
132 // Bisection method.
133 unsigned ZeroBits = 0;
134 for (T Shift = std::numeric_limits<T>::digits >> 1; Shift; Shift >>= 1) {
135 T Tmp = Val >> Shift;
136 if (Tmp)
137 Val = Tmp;
138 else
139 ZeroBits |= Shift;
140 }
141 return ZeroBits;
142 }
143};
144
145#if __GNUC__4 >= 4 || defined(_MSC_VER)
146template <typename T> struct LeadingZerosCounter<T, 4> {
147 static unsigned count(T Val, ZeroBehavior ZB) {
148 if (ZB != ZB_Undefined && Val == 0)
149 return 32;
150
151#if __has_builtin(__builtin_clz)1 || LLVM_GNUC_PREREQ(4, 0, 0)((4 << 20) + (2 << 10) + 1 >= ((4) << 20
) + ((0) << 10) + (0))
152 return __builtin_clz(Val);
153#elif defined(_MSC_VER)
154 unsigned long Index;
155 _BitScanReverse(&Index, Val);
156 return Index ^ 31;
157#endif
158 }
159};
160
161#if !defined(_MSC_VER) || defined(_M_X64)
162template <typename T> struct LeadingZerosCounter<T, 8> {
163 static unsigned count(T Val, ZeroBehavior ZB) {
164 if (ZB != ZB_Undefined && Val == 0)
165 return 64;
166
167#if __has_builtin(__builtin_clzll)1 || LLVM_GNUC_PREREQ(4, 0, 0)((4 << 20) + (2 << 10) + 1 >= ((4) << 20
) + ((0) << 10) + (0))
168 return __builtin_clzll(Val);
169#elif defined(_MSC_VER)
170 unsigned long Index;
171 _BitScanReverse64(&Index, Val);
172 return Index ^ 63;
173#endif
174 }
175};
176#endif
177#endif
178} // namespace detail
179
180/// Count number of 0's from the most significant bit to the least
181/// stopping at the first 1.
182///
183/// Only unsigned integral types are allowed.
184///
185/// \param ZB the behavior on an input of 0. Only ZB_Width and ZB_Undefined are
186/// valid arguments.
187template <typename T>
188unsigned countLeadingZeros(T Val, ZeroBehavior ZB = ZB_Width) {
189 static_assert(std::numeric_limits<T>::is_integer &&
190 !std::numeric_limits<T>::is_signed,
191 "Only unsigned integral types are allowed.");
192 return llvm::detail::LeadingZerosCounter<T, sizeof(T)>::count(Val, ZB);
193}
194
195/// Get the index of the first set bit starting from the least
196/// significant bit.
197///
198/// Only unsigned integral types are allowed.
199///
200/// \param ZB the behavior on an input of 0. Only ZB_Max and ZB_Undefined are
201/// valid arguments.
202template <typename T> T findFirstSet(T Val, ZeroBehavior ZB = ZB_Max) {
203 if (ZB == ZB_Max && Val == 0)
9
Assuming 'Val' is equal to 0
10
Taking true branch
204 return std::numeric_limits<T>::max();
11
Calling 'numeric_limits::max'
13
Returning from 'numeric_limits::max'
14
Returning the value 18446744073709551615
205
206 return countTrailingZeros(Val, ZB_Undefined);
207}
208
209/// Create a bitmask with the N right-most bits set to 1, and all other
210/// bits set to 0. Only unsigned types are allowed.
211template <typename T> T maskTrailingOnes(unsigned N) {
212 static_assert(std::is_unsigned<T>::value, "Invalid type!");
213 const unsigned Bits = CHAR_BIT8 * sizeof(T);
214 assert(N <= Bits && "Invalid bit index")((N <= Bits && "Invalid bit index") ? static_cast<
void> (0) : __assert_fail ("N <= Bits && \"Invalid bit index\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 214, __PRETTY_FUNCTION__))
;
215 return N == 0 ? 0 : (T(-1) >> (Bits - N));
216}
217
218/// Create a bitmask with the N left-most bits set to 1, and all other
219/// bits set to 0. Only unsigned types are allowed.
220template <typename T> T maskLeadingOnes(unsigned N) {
221 return ~maskTrailingOnes<T>(CHAR_BIT8 * sizeof(T) - N);
222}
223
224/// Create a bitmask with the N right-most bits set to 0, and all other
225/// bits set to 1. Only unsigned types are allowed.
226template <typename T> T maskTrailingZeros(unsigned N) {
227 return maskLeadingOnes<T>(CHAR_BIT8 * sizeof(T) - N);
228}
229
230/// Create a bitmask with the N left-most bits set to 0, and all other
231/// bits set to 1. Only unsigned types are allowed.
232template <typename T> T maskLeadingZeros(unsigned N) {
233 return maskTrailingOnes<T>(CHAR_BIT8 * sizeof(T) - N);
234}
235
236/// Get the index of the last set bit starting from the least
237/// significant bit.
238///
239/// Only unsigned integral types are allowed.
240///
241/// \param ZB the behavior on an input of 0. Only ZB_Max and ZB_Undefined are
242/// valid arguments.
243template <typename T> T findLastSet(T Val, ZeroBehavior ZB = ZB_Max) {
244 if (ZB == ZB_Max && Val == 0)
245 return std::numeric_limits<T>::max();
246
247 // Use ^ instead of - because both gcc and llvm can remove the associated ^
248 // in the __builtin_clz intrinsic on x86.
249 return countLeadingZeros(Val, ZB_Undefined) ^
250 (std::numeric_limits<T>::digits - 1);
251}
252
253/// Macro compressed bit reversal table for 256 bits.
254///
255/// http://graphics.stanford.edu/~seander/bithacks.html#BitReverseTable
256static const unsigned char BitReverseTable256[256] = {
257#define R2(n) n, n + 2 * 64, n + 1 * 64, n + 3 * 64
258#define R4(n) R2(n), R2(n + 2 * 16), R2(n + 1 * 16), R2(n + 3 * 16)
259#define R6(n) R4(n), R4(n + 2 * 4), R4(n + 1 * 4), R4(n + 3 * 4)
260 R6(0), R6(2), R6(1), R6(3)
261#undef R2
262#undef R4
263#undef R6
264};
265
266/// Reverse the bits in \p Val.
267template <typename T>
268T reverseBits(T Val) {
269 unsigned char in[sizeof(Val)];
270 unsigned char out[sizeof(Val)];
271 std::memcpy(in, &Val, sizeof(Val));
272 for (unsigned i = 0; i < sizeof(Val); ++i)
273 out[(sizeof(Val) - i) - 1] = BitReverseTable256[in[i]];
274 std::memcpy(&Val, out, sizeof(Val));
275 return Val;
276}
277
278// NOTE: The following support functions use the _32/_64 extensions instead of
279// type overloading so that signed and unsigned integers can be used without
280// ambiguity.
281
282/// Return the high 32 bits of a 64 bit value.
283constexpr inline uint32_t Hi_32(uint64_t Value) {
284 return static_cast<uint32_t>(Value >> 32);
285}
286
287/// Return the low 32 bits of a 64 bit value.
288constexpr inline uint32_t Lo_32(uint64_t Value) {
289 return static_cast<uint32_t>(Value);
290}
291
292/// Make a 64-bit integer from a high / low pair of 32-bit integers.
293constexpr inline uint64_t Make_64(uint32_t High, uint32_t Low) {
294 return ((uint64_t)High << 32) | (uint64_t)Low;
295}
296
297/// Checks if an integer fits into the given bit width.
298template <unsigned N> constexpr inline bool isInt(int64_t x) {
299 return N >= 64 || (-(INT64_C(1)1L<<(N-1)) <= x && x < (INT64_C(1)1L<<(N-1)));
300}
301// Template specializations to get better code for common cases.
302template <> constexpr inline bool isInt<8>(int64_t x) {
303 return static_cast<int8_t>(x) == x;
304}
305template <> constexpr inline bool isInt<16>(int64_t x) {
306 return static_cast<int16_t>(x) == x;
307}
308template <> constexpr inline bool isInt<32>(int64_t x) {
309 return static_cast<int32_t>(x) == x;
310}
311
312/// Checks if a signed integer is an N bit number shifted left by S.
313template <unsigned N, unsigned S>
314constexpr inline bool isShiftedInt(int64_t x) {
315 static_assert(
316 N > 0, "isShiftedInt<0> doesn't make sense (refers to a 0-bit number.");
317 static_assert(N + S <= 64, "isShiftedInt<N, S> with N + S > 64 is too wide.");
318 return isInt<N + S>(x) && (x % (UINT64_C(1)1UL << S) == 0);
319}
320
321/// Checks if an unsigned integer fits into the given bit width.
322///
323/// This is written as two functions rather than as simply
324///
325/// return N >= 64 || X < (UINT64_C(1) << N);
326///
327/// to keep MSVC from (incorrectly) warning on isUInt<64> that we're shifting
328/// left too many places.
329template <unsigned N>
330constexpr inline typename std::enable_if<(N < 64), bool>::type
331isUInt(uint64_t X) {
332 static_assert(N > 0, "isUInt<0> doesn't make sense");
333 return X < (UINT64_C(1)1UL << (N));
334}
335template <unsigned N>
336constexpr inline typename std::enable_if<N >= 64, bool>::type
337isUInt(uint64_t X) {
338 return true;
339}
340
341// Template specializations to get better code for common cases.
342template <> constexpr inline bool isUInt<8>(uint64_t x) {
343 return static_cast<uint8_t>(x) == x;
344}
345template <> constexpr inline bool isUInt<16>(uint64_t x) {
346 return static_cast<uint16_t>(x) == x;
347}
348template <> constexpr inline bool isUInt<32>(uint64_t x) {
349 return static_cast<uint32_t>(x) == x;
350}
351
352/// Checks if a unsigned integer is an N bit number shifted left by S.
353template <unsigned N, unsigned S>
354constexpr inline bool isShiftedUInt(uint64_t x) {
355 static_assert(
356 N > 0, "isShiftedUInt<0> doesn't make sense (refers to a 0-bit number)");
357 static_assert(N + S <= 64,
358 "isShiftedUInt<N, S> with N + S > 64 is too wide.");
359 // Per the two static_asserts above, S must be strictly less than 64. So
360 // 1 << S is not undefined behavior.
361 return isUInt<N + S>(x) && (x % (UINT64_C(1)1UL << S) == 0);
362}
363
364/// Gets the maximum value for a N-bit unsigned integer.
365inline uint64_t maxUIntN(uint64_t N) {
366 assert(N > 0 && N <= 64 && "integer width out of range")((N > 0 && N <= 64 && "integer width out of range"
) ? static_cast<void> (0) : __assert_fail ("N > 0 && N <= 64 && \"integer width out of range\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 366, __PRETTY_FUNCTION__))
;
367
368 // uint64_t(1) << 64 is undefined behavior, so we can't do
369 // (uint64_t(1) << N) - 1
370 // without checking first that N != 64. But this works and doesn't have a
371 // branch.
372 return UINT64_MAX(18446744073709551615UL) >> (64 - N);
373}
374
375/// Gets the minimum value for a N-bit signed integer.
376inline int64_t minIntN(int64_t N) {
377 assert(N > 0 && N <= 64 && "integer width out of range")((N > 0 && N <= 64 && "integer width out of range"
) ? static_cast<void> (0) : __assert_fail ("N > 0 && N <= 64 && \"integer width out of range\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 377, __PRETTY_FUNCTION__))
;
378
379 return -(UINT64_C(1)1UL<<(N-1));
380}
381
382/// Gets the maximum value for a N-bit signed integer.
383inline int64_t maxIntN(int64_t N) {
384 assert(N > 0 && N <= 64 && "integer width out of range")((N > 0 && N <= 64 && "integer width out of range"
) ? static_cast<void> (0) : __assert_fail ("N > 0 && N <= 64 && \"integer width out of range\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 384, __PRETTY_FUNCTION__))
;
385
386 // This relies on two's complement wraparound when N == 64, so we convert to
387 // int64_t only at the very end to avoid UB.
388 return (UINT64_C(1)1UL << (N - 1)) - 1;
389}
390
391/// Checks if an unsigned integer fits into the given (dynamic) bit width.
392inline bool isUIntN(unsigned N, uint64_t x) {
393 return N >= 64 || x <= maxUIntN(N);
394}
395
396/// Checks if an signed integer fits into the given (dynamic) bit width.
397inline bool isIntN(unsigned N, int64_t x) {
398 return N >= 64 || (minIntN(N) <= x && x <= maxIntN(N));
399}
400
401/// Return true if the argument is a non-empty sequence of ones starting at the
402/// least significant bit with the remainder zero (32 bit version).
403/// Ex. isMask_32(0x0000FFFFU) == true.
404constexpr inline bool isMask_32(uint32_t Value) {
405 return Value && ((Value + 1) & Value) == 0;
406}
407
408/// Return true if the argument is a non-empty sequence of ones starting at the
409/// least significant bit with the remainder zero (64 bit version).
410constexpr inline bool isMask_64(uint64_t Value) {
411 return Value && ((Value + 1) & Value) == 0;
412}
413
414/// Return true if the argument contains a non-empty sequence of ones with the
415/// remainder zero (32 bit version.) Ex. isShiftedMask_32(0x0000FF00U) == true.
416constexpr inline bool isShiftedMask_32(uint32_t Value) {
417 return Value && isMask_32((Value - 1) | Value);
418}
419
420/// Return true if the argument contains a non-empty sequence of ones with the
421/// remainder zero (64 bit version.)
422constexpr inline bool isShiftedMask_64(uint64_t Value) {
423 return Value && isMask_64((Value - 1) | Value);
424}
425
426/// Return true if the argument is a power of two > 0.
427/// Ex. isPowerOf2_32(0x00100000U) == true (32 bit edition.)
428constexpr inline bool isPowerOf2_32(uint32_t Value) {
429 return Value && !(Value & (Value - 1));
430}
431
432/// Return true if the argument is a power of two > 0 (64 bit edition.)
433constexpr inline bool isPowerOf2_64(uint64_t Value) {
434 return Value && !(Value & (Value - 1));
435}
436
437/// Return a byte-swapped representation of the 16-bit argument.
438inline uint16_t ByteSwap_16(uint16_t Value) {
439 return sys::SwapByteOrder_16(Value);
440}
441
442/// Return a byte-swapped representation of the 32-bit argument.
443inline uint32_t ByteSwap_32(uint32_t Value) {
444 return sys::SwapByteOrder_32(Value);
445}
446
447/// Return a byte-swapped representation of the 64-bit argument.
448inline uint64_t ByteSwap_64(uint64_t Value) {
449 return sys::SwapByteOrder_64(Value);
450}
451
452/// Count the number of ones from the most significant bit to the first
453/// zero bit.
454///
455/// Ex. countLeadingOnes(0xFF0FFF00) == 8.
456/// Only unsigned integral types are allowed.
457///
458/// \param ZB the behavior on an input of all ones. Only ZB_Width and
459/// ZB_Undefined are valid arguments.
460template <typename T>
461unsigned countLeadingOnes(T Value, ZeroBehavior ZB = ZB_Width) {
462 static_assert(std::numeric_limits<T>::is_integer &&
463 !std::numeric_limits<T>::is_signed,
464 "Only unsigned integral types are allowed.");
465 return countLeadingZeros<T>(~Value, ZB);
466}
467
468/// Count the number of ones from the least significant bit to the first
469/// zero bit.
470///
471/// Ex. countTrailingOnes(0x00FF00FF) == 8.
472/// Only unsigned integral types are allowed.
473///
474/// \param ZB the behavior on an input of all ones. Only ZB_Width and
475/// ZB_Undefined are valid arguments.
476template <typename T>
477unsigned countTrailingOnes(T Value, ZeroBehavior ZB = ZB_Width) {
478 static_assert(std::numeric_limits<T>::is_integer &&
479 !std::numeric_limits<T>::is_signed,
480 "Only unsigned integral types are allowed.");
481 return countTrailingZeros<T>(~Value, ZB);
482}
483
484namespace detail {
485template <typename T, std::size_t SizeOfT> struct PopulationCounter {
486 static unsigned count(T Value) {
487 // Generic version, forward to 32 bits.
488 static_assert(SizeOfT <= 4, "Not implemented!");
489#if __GNUC__4 >= 4
490 return __builtin_popcount(Value);
491#else
492 uint32_t v = Value;
493 v = v - ((v >> 1) & 0x55555555);
494 v = (v & 0x33333333) + ((v >> 2) & 0x33333333);
495 return ((v + (v >> 4) & 0xF0F0F0F) * 0x1010101) >> 24;
496#endif
497 }
498};
499
500template <typename T> struct PopulationCounter<T, 8> {
501 static unsigned count(T Value) {
502#if __GNUC__4 >= 4
503 return __builtin_popcountll(Value);
504#else
505 uint64_t v = Value;
506 v = v - ((v >> 1) & 0x5555555555555555ULL);
507 v = (v & 0x3333333333333333ULL) + ((v >> 2) & 0x3333333333333333ULL);
508 v = (v + (v >> 4)) & 0x0F0F0F0F0F0F0F0FULL;
509 return unsigned((uint64_t)(v * 0x0101010101010101ULL) >> 56);
510#endif
511 }
512};
513} // namespace detail
514
515/// Count the number of set bits in a value.
516/// Ex. countPopulation(0xF000F000) = 8
517/// Returns 0 if the word is zero.
518template <typename T>
519inline unsigned countPopulation(T Value) {
520 static_assert(std::numeric_limits<T>::is_integer &&
521 !std::numeric_limits<T>::is_signed,
522 "Only unsigned integral types are allowed.");
523 return detail::PopulationCounter<T, sizeof(T)>::count(Value);
524}
525
526/// Return the log base 2 of the specified value.
527inline double Log2(double Value) {
528#if defined(__ANDROID_API__) && __ANDROID_API__ < 18
529 return __builtin_log(Value) / __builtin_log(2.0);
530#else
531 return log2(Value);
532#endif
533}
534
535/// Return the floor log base 2 of the specified value, -1 if the value is zero.
536/// (32 bit edition.)
537/// Ex. Log2_32(32) == 5, Log2_32(1) == 0, Log2_32(0) == -1, Log2_32(6) == 2
538inline unsigned Log2_32(uint32_t Value) {
539 return 31 - countLeadingZeros(Value);
540}
541
542/// Return the floor log base 2 of the specified value, -1 if the value is zero.
543/// (64 bit edition.)
544inline unsigned Log2_64(uint64_t Value) {
545 return 63 - countLeadingZeros(Value);
546}
547
548/// Return the ceil log base 2 of the specified value, 32 if the value is zero.
549/// (32 bit edition).
550/// Ex. Log2_32_Ceil(32) == 5, Log2_32_Ceil(1) == 0, Log2_32_Ceil(6) == 3
551inline unsigned Log2_32_Ceil(uint32_t Value) {
552 return 32 - countLeadingZeros(Value - 1);
553}
554
555/// Return the ceil log base 2 of the specified value, 64 if the value is zero.
556/// (64 bit edition.)
557inline unsigned Log2_64_Ceil(uint64_t Value) {
558 return 64 - countLeadingZeros(Value - 1);
559}
560
561/// Return the greatest common divisor of the values using Euclid's algorithm.
562inline uint64_t GreatestCommonDivisor64(uint64_t A, uint64_t B) {
563 while (B) {
564 uint64_t T = B;
565 B = A % B;
566 A = T;
567 }
568 return A;
569}
570
571/// This function takes a 64-bit integer and returns the bit equivalent double.
572inline double BitsToDouble(uint64_t Bits) {
573 double D;
574 static_assert(sizeof(uint64_t) == sizeof(double), "Unexpected type sizes");
575 memcpy(&D, &Bits, sizeof(Bits));
576 return D;
577}
578
579/// This function takes a 32-bit integer and returns the bit equivalent float.
580inline float BitsToFloat(uint32_t Bits) {
581 float F;
582 static_assert(sizeof(uint32_t) == sizeof(float), "Unexpected type sizes");
583 memcpy(&F, &Bits, sizeof(Bits));
584 return F;
585}
586
587/// This function takes a double and returns the bit equivalent 64-bit integer.
588/// Note that copying doubles around changes the bits of NaNs on some hosts,
589/// notably x86, so this routine cannot be used if these bits are needed.
590inline uint64_t DoubleToBits(double Double) {
591 uint64_t Bits;
592 static_assert(sizeof(uint64_t) == sizeof(double), "Unexpected type sizes");
593 memcpy(&Bits, &Double, sizeof(Double));
594 return Bits;
595}
596
597/// This function takes a float and returns the bit equivalent 32-bit integer.
598/// Note that copying floats around changes the bits of NaNs on some hosts,
599/// notably x86, so this routine cannot be used if these bits are needed.
600inline uint32_t FloatToBits(float Float) {
601 uint32_t Bits;
602 static_assert(sizeof(uint32_t) == sizeof(float), "Unexpected type sizes");
603 memcpy(&Bits, &Float, sizeof(Float));
604 return Bits;
605}
606
607/// A and B are either alignments or offsets. Return the minimum alignment that
608/// may be assumed after adding the two together.
609constexpr inline uint64_t MinAlign(uint64_t A, uint64_t B) {
610 // The largest power of 2 that divides both A and B.
611 //
612 // Replace "-Value" by "1+~Value" in the following commented code to avoid
613 // MSVC warning C4146
614 // return (A | B) & -(A | B);
615 return (A | B) & (1 + ~(A | B));
616}
617
618/// Aligns \c Addr to \c Alignment bytes, rounding up.
619///
620/// Alignment should be a power of two. This method rounds up, so
621/// alignAddr(7, 4) == 8 and alignAddr(8, 4) == 8.
622inline uintptr_t alignAddr(const void *Addr, size_t Alignment) {
623 assert(Alignment && isPowerOf2_64((uint64_t)Alignment) &&((Alignment && isPowerOf2_64((uint64_t)Alignment) &&
"Alignment is not a power of two!") ? static_cast<void>
(0) : __assert_fail ("Alignment && isPowerOf2_64((uint64_t)Alignment) && \"Alignment is not a power of two!\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 624, __PRETTY_FUNCTION__))
624 "Alignment is not a power of two!")((Alignment && isPowerOf2_64((uint64_t)Alignment) &&
"Alignment is not a power of two!") ? static_cast<void>
(0) : __assert_fail ("Alignment && isPowerOf2_64((uint64_t)Alignment) && \"Alignment is not a power of two!\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 624, __PRETTY_FUNCTION__))
;
625
626 assert((uintptr_t)Addr + Alignment - 1 >= (uintptr_t)Addr)(((uintptr_t)Addr + Alignment - 1 >= (uintptr_t)Addr) ? static_cast
<void> (0) : __assert_fail ("(uintptr_t)Addr + Alignment - 1 >= (uintptr_t)Addr"
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 626, __PRETTY_FUNCTION__))
;
627
628 return (((uintptr_t)Addr + Alignment - 1) & ~(uintptr_t)(Alignment - 1));
629}
630
631/// Returns the necessary adjustment for aligning \c Ptr to \c Alignment
632/// bytes, rounding up.
633inline size_t alignmentAdjustment(const void *Ptr, size_t Alignment) {
634 return alignAddr(Ptr, Alignment) - (uintptr_t)Ptr;
635}
636
637/// Returns the next power of two (in 64-bits) that is strictly greater than A.
638/// Returns zero on overflow.
639inline uint64_t NextPowerOf2(uint64_t A) {
640 A |= (A >> 1);
641 A |= (A >> 2);
642 A |= (A >> 4);
643 A |= (A >> 8);
644 A |= (A >> 16);
645 A |= (A >> 32);
646 return A + 1;
647}
648
649/// Returns the power of two which is less than or equal to the given value.
650/// Essentially, it is a floor operation across the domain of powers of two.
651inline uint64_t PowerOf2Floor(uint64_t A) {
652 if (!A) return 0;
653 return 1ull << (63 - countLeadingZeros(A, ZB_Undefined));
654}
655
656/// Returns the power of two which is greater than or equal to the given value.
657/// Essentially, it is a ceil operation across the domain of powers of two.
658inline uint64_t PowerOf2Ceil(uint64_t A) {
659 if (!A)
660 return 0;
661 return NextPowerOf2(A - 1);
662}
663
664/// Returns the next integer (mod 2**64) that is greater than or equal to
665/// \p Value and is a multiple of \p Align. \p Align must be non-zero.
666///
667/// If non-zero \p Skew is specified, the return value will be a minimal
668/// integer that is greater than or equal to \p Value and equal to
669/// \p Align * N + \p Skew for some integer N. If \p Skew is larger than
670/// \p Align, its value is adjusted to '\p Skew mod \p Align'.
671///
672/// Examples:
673/// \code
674/// alignTo(5, 8) = 8
675/// alignTo(17, 8) = 24
676/// alignTo(~0LL, 8) = 0
677/// alignTo(321, 255) = 510
678///
679/// alignTo(5, 8, 7) = 7
680/// alignTo(17, 8, 1) = 17
681/// alignTo(~0LL, 8, 3) = 3
682/// alignTo(321, 255, 42) = 552
683/// \endcode
684inline uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew = 0) {
685 assert(Align != 0u && "Align can't be 0.")((Align != 0u && "Align can't be 0.") ? static_cast<
void> (0) : __assert_fail ("Align != 0u && \"Align can't be 0.\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 685, __PRETTY_FUNCTION__))
;
686 Skew %= Align;
687 return (Value + Align - 1 - Skew) / Align * Align + Skew;
688}
689
690/// Returns the next integer (mod 2**64) that is greater than or equal to
691/// \p Value and is a multiple of \c Align. \c Align must be non-zero.
692template <uint64_t Align> constexpr inline uint64_t alignTo(uint64_t Value) {
693 static_assert(Align != 0u, "Align must be non-zero");
694 return (Value + Align - 1) / Align * Align;
695}
696
697/// Returns the integer ceil(Numerator / Denominator).
698inline uint64_t divideCeil(uint64_t Numerator, uint64_t Denominator) {
699 return alignTo(Numerator, Denominator) / Denominator;
700}
701
702/// \c alignTo for contexts where a constant expression is required.
703/// \sa alignTo
704///
705/// \todo FIXME: remove when \c constexpr becomes really \c constexpr
706template <uint64_t Align>
707struct AlignTo {
708 static_assert(Align != 0u, "Align must be non-zero");
709 template <uint64_t Value>
710 struct from_value {
711 static const uint64_t value = (Value + Align - 1) / Align * Align;
712 };
713};
714
715/// Returns the largest uint64_t less than or equal to \p Value and is
716/// \p Skew mod \p Align. \p Align must be non-zero
717inline uint64_t alignDown(uint64_t Value, uint64_t Align, uint64_t Skew = 0) {
718 assert(Align != 0u && "Align can't be 0.")((Align != 0u && "Align can't be 0.") ? static_cast<
void> (0) : __assert_fail ("Align != 0u && \"Align can't be 0.\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 718, __PRETTY_FUNCTION__))
;
719 Skew %= Align;
720 return (Value - Skew) / Align * Align + Skew;
721}
722
723/// Returns the offset to the next integer (mod 2**64) that is greater than
724/// or equal to \p Value and is a multiple of \p Align. \p Align must be
725/// non-zero.
726inline uint64_t OffsetToAlignment(uint64_t Value, uint64_t Align) {
727 return alignTo(Value, Align) - Value;
728}
729
730/// Sign-extend the number in the bottom B bits of X to a 32-bit integer.
731/// Requires 0 < B <= 32.
732template <unsigned B> constexpr inline int32_t SignExtend32(uint32_t X) {
733 static_assert(B > 0, "Bit width can't be 0.");
734 static_assert(B <= 32, "Bit width out of range.");
735 return int32_t(X << (32 - B)) >> (32 - B);
736}
737
738/// Sign-extend the number in the bottom B bits of X to a 32-bit integer.
739/// Requires 0 < B < 32.
740inline int32_t SignExtend32(uint32_t X, unsigned B) {
741 assert(B > 0 && "Bit width can't be 0.")((B > 0 && "Bit width can't be 0.") ? static_cast<
void> (0) : __assert_fail ("B > 0 && \"Bit width can't be 0.\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 741, __PRETTY_FUNCTION__))
;
742 assert(B <= 32 && "Bit width out of range.")((B <= 32 && "Bit width out of range.") ? static_cast
<void> (0) : __assert_fail ("B <= 32 && \"Bit width out of range.\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 742, __PRETTY_FUNCTION__))
;
743 return int32_t(X << (32 - B)) >> (32 - B);
744}
745
746/// Sign-extend the number in the bottom B bits of X to a 64-bit integer.
747/// Requires 0 < B < 64.
748template <unsigned B> constexpr inline int64_t SignExtend64(uint64_t x) {
749 static_assert(B > 0, "Bit width can't be 0.");
750 static_assert(B <= 64, "Bit width out of range.");
751 return int64_t(x << (64 - B)) >> (64 - B);
752}
753
754/// Sign-extend the number in the bottom B bits of X to a 64-bit integer.
755/// Requires 0 < B < 64.
756inline int64_t SignExtend64(uint64_t X, unsigned B) {
757 assert(B > 0 && "Bit width can't be 0.")((B > 0 && "Bit width can't be 0.") ? static_cast<
void> (0) : __assert_fail ("B > 0 && \"Bit width can't be 0.\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 757, __PRETTY_FUNCTION__))
;
758 assert(B <= 64 && "Bit width out of range.")((B <= 64 && "Bit width out of range.") ? static_cast
<void> (0) : __assert_fail ("B <= 64 && \"Bit width out of range.\""
, "/build/llvm-toolchain-snapshot-9~svn362543/include/llvm/Support/MathExtras.h"
, 758, __PRETTY_FUNCTION__))
;
759 return int64_t(X << (64 - B)) >> (64 - B);
760}
761
762/// Subtract two unsigned integers, X and Y, of type T and return the absolute
763/// value of the result.
764template <typename T>
765typename std::enable_if<std::is_unsigned<T>::value, T>::type
766AbsoluteDifference(T X, T Y) {
767 return std::max(X, Y) - std::min(X, Y);
768}
769
770/// Add two unsigned integers, X and Y, of type T. Clamp the result to the
771/// maximum representable value of T on overflow. ResultOverflowed indicates if
772/// the result is larger than the maximum representable value of type T.
773template <typename T>
774typename std::enable_if<std::is_unsigned<T>::value, T>::type
775SaturatingAdd(T X, T Y, bool *ResultOverflowed = nullptr) {
776 bool Dummy;
777 bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
778 // Hacker's Delight, p. 29
779 T Z = X + Y;
780 Overflowed = (Z < X || Z < Y);
781 if (Overflowed)
782 return std::numeric_limits<T>::max();
783 else
784 return Z;
785}
786
787/// Multiply two unsigned integers, X and Y, of type T. Clamp the result to the
788/// maximum representable value of T on overflow. ResultOverflowed indicates if
789/// the result is larger than the maximum representable value of type T.
790template <typename T>
791typename std::enable_if<std::is_unsigned<T>::value, T>::type
792SaturatingMultiply(T X, T Y, bool *ResultOverflowed = nullptr) {
793 bool Dummy;
794 bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
795
796 // Hacker's Delight, p. 30 has a different algorithm, but we don't use that
797 // because it fails for uint16_t (where multiplication can have undefined
798 // behavior due to promotion to int), and requires a division in addition
799 // to the multiplication.
800
801 Overflowed = false;
802
803 // Log2(Z) would be either Log2Z or Log2Z + 1.
804 // Special case: if X or Y is 0, Log2_64 gives -1, and Log2Z
805 // will necessarily be less than Log2Max as desired.
806 int Log2Z = Log2_64(X) + Log2_64(Y);
807 const T Max = std::numeric_limits<T>::max();
808 int Log2Max = Log2_64(Max);
809 if (Log2Z < Log2Max) {
810 return X * Y;
811 }
812 if (Log2Z > Log2Max) {
813 Overflowed = true;
814 return Max;
815 }
816
817 // We're going to use the top bit, and maybe overflow one
818 // bit past it. Multiply all but the bottom bit then add
819 // that on at the end.
820 T Z = (X >> 1) * Y;
821 if (Z & ~(Max >> 1)) {
822 Overflowed = true;
823 return Max;
824 }
825 Z <<= 1;
826 if (X & 1)
827 return SaturatingAdd(Z, Y, ResultOverflowed);
828
829 return Z;
830}
831
832/// Multiply two unsigned integers, X and Y, and add the unsigned integer, A to
833/// the product. Clamp the result to the maximum representable value of T on
834/// overflow. ResultOverflowed indicates if the result is larger than the
835/// maximum representable value of type T.
836template <typename T>
837typename std::enable_if<std::is_unsigned<T>::value, T>::type
838SaturatingMultiplyAdd(T X, T Y, T A, bool *ResultOverflowed = nullptr) {
839 bool Dummy;
840 bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
841
842 T Product = SaturatingMultiply(X, Y, &Overflowed);
843 if (Overflowed)
844 return Product;
845
846 return SaturatingAdd(A, Product, &Overflowed);
847}
848
849/// Use this rather than HUGE_VALF; the latter causes warnings on MSVC.
850extern const float huge_valf;
851} // End llvm namespace
852
853#endif

/usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/limits

1// The template and inlines for the numeric_limits classes. -*- C++ -*-
2
3// Copyright (C) 1999-2016 Free Software Foundation, Inc.
4//
5// This file is part of the GNU ISO C++ Library. This library is free
6// software; you can redistribute it and/or modify it under the
7// terms of the GNU General Public License as published by the
8// Free Software Foundation; either version 3, or (at your option)
9// any later version.
10
11// This library is distributed in the hope that it will be useful,
12// but WITHOUT ANY WARRANTY; without even the implied warranty of
13// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14// GNU General Public License for more details.
15
16// Under Section 7 of GPL version 3, you are granted additional
17// permissions described in the GCC Runtime Library Exception, version
18// 3.1, as published by the Free Software Foundation.
19
20// You should have received a copy of the GNU General Public License and
21// a copy of the GCC Runtime Library Exception along with this program;
22// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
23// <http://www.gnu.org/licenses/>.
24
25/** @file include/limits
26 * This is a Standard C++ Library header.
27 */
28
29// Note: this is not a conforming implementation.
30// Written by Gabriel Dos Reis <gdr@codesourcery.com>
31
32//
33// ISO 14882:1998
34// 18.2.1
35//
36
37#ifndef _GLIBCXX_NUMERIC_LIMITS1
38#define _GLIBCXX_NUMERIC_LIMITS1 1
39
40#pragma GCC system_header
41
42#include <bits/c++config.h>
43
44//
45// The numeric_limits<> traits document implementation-defined aspects
46// of fundamental arithmetic data types (integers and floating points).
47// From Standard C++ point of view, there are 14 such types:
48// * integers
49// bool (1)
50// char, signed char, unsigned char, wchar_t (4)
51// short, unsigned short (2)
52// int, unsigned (2)
53// long, unsigned long (2)
54//
55// * floating points
56// float (1)
57// double (1)
58// long double (1)
59//
60// GNU C++ understands (where supported by the host C-library)
61// * integer
62// long long, unsigned long long (2)
63//
64// which brings us to 16 fundamental arithmetic data types in GNU C++.
65//
66//
67// Since a numeric_limits<> is a bit tricky to get right, we rely on
68// an interface composed of macros which should be defined in config/os
69// or config/cpu when they differ from the generic (read arbitrary)
70// definitions given here.
71//
72
73// These values can be overridden in the target configuration file.
74// The default values are appropriate for many 32-bit targets.
75
76// GCC only intrinsically supports modulo integral types. The only remaining
77// integral exceptional values is division by zero. Only targets that do not
78// signal division by zero in some "hard to ignore" way should use false.
79#ifndef __glibcxx_integral_trapstrue
80# define __glibcxx_integral_trapstrue true
81#endif
82
83// float
84//
85
86// Default values. Should be overridden in configuration files if necessary.
87
88#ifndef __glibcxx_float_has_denorm_loss
89# define __glibcxx_float_has_denorm_loss false
90#endif
91#ifndef __glibcxx_float_traps
92# define __glibcxx_float_traps false
93#endif
94#ifndef __glibcxx_float_tinyness_before
95# define __glibcxx_float_tinyness_before false
96#endif
97
98// double
99
100// Default values. Should be overridden in configuration files if necessary.
101
102#ifndef __glibcxx_double_has_denorm_loss
103# define __glibcxx_double_has_denorm_loss false
104#endif
105#ifndef __glibcxx_double_traps
106# define __glibcxx_double_traps false
107#endif
108#ifndef __glibcxx_double_tinyness_before
109# define __glibcxx_double_tinyness_before false
110#endif
111
112// long double
113
114// Default values. Should be overridden in configuration files if necessary.
115
116#ifndef __glibcxx_long_double_has_denorm_loss
117# define __glibcxx_long_double_has_denorm_loss false
118#endif
119#ifndef __glibcxx_long_double_traps
120# define __glibcxx_long_double_traps false
121#endif
122#ifndef __glibcxx_long_double_tinyness_before
123# define __glibcxx_long_double_tinyness_before false
124#endif
125
126// You should not need to define any macros below this point.
127
128#define __glibcxx_signed_b(T,B)((T)(-1) < 0) ((T)(-1) < 0)
129
130#define __glibcxx_min_b(T,B)(((T)(-1) < 0) ? -(((T)(-1) < 0) ? (((((T)1 << ((
B - ((T)(-1) < 0)) - 1)) - 1) << 1) + 1) : ~(T)0) - 1
: (T)0)
\
131 (__glibcxx_signed_b (T,B)((T)(-1) < 0) ? -__glibcxx_max_b (T,B)(((T)(-1) < 0) ? (((((T)1 << ((B - ((T)(-1) < 0))
- 1)) - 1) << 1) + 1) : ~(T)0)
- 1 : (T)0)
132
133#define __glibcxx_max_b(T,B)(((T)(-1) < 0) ? (((((T)1 << ((B - ((T)(-1) < 0))
- 1)) - 1) << 1) + 1) : ~(T)0)
\
134 (__glibcxx_signed_b (T,B)((T)(-1) < 0) ? \
135 (((((T)1 << (__glibcxx_digits_b (T,B)(B - ((T)(-1) < 0)) - 1)) - 1) << 1) + 1) : ~(T)0)
136
137#define __glibcxx_digits_b(T,B)(B - ((T)(-1) < 0)) \
138 (B - __glibcxx_signed_b (T,B)((T)(-1) < 0))
139
140// The fraction 643/2136 approximates log10(2) to 7 significant digits.
141#define __glibcxx_digits10_b(T,B)((B - ((T)(-1) < 0)) * 643L / 2136) \
142 (__glibcxx_digits_b (T,B)(B - ((T)(-1) < 0)) * 643L / 2136)
143
144#define __glibcxx_signed(T) \
145 __glibcxx_signed_b (T, sizeof(T) * __CHAR_BIT__)((T)(-1) < 0)
146#define __glibcxx_min(T) \
147 __glibcxx_min_b (T, sizeof(T) * __CHAR_BIT__)(((T)(-1) < 0) ? -(((T)(-1) < 0) ? (((((T)1 << ((
sizeof(T) * 8 - ((T)(-1) < 0)) - 1)) - 1) << 1) + 1)
: ~(T)0) - 1 : (T)0)
148#define __glibcxx_max(T) \
149 __glibcxx_max_b (T, sizeof(T) * __CHAR_BIT__)(((T)(-1) < 0) ? (((((T)1 << ((sizeof(T) * 8 - ((T)(
-1) < 0)) - 1)) - 1) << 1) + 1) : ~(T)0)
150#define __glibcxx_digits(T) \
151 __glibcxx_digits_b (T, sizeof(T) * __CHAR_BIT__)(sizeof(T) * 8 - ((T)(-1) < 0))
152#define __glibcxx_digits10(T) \
153 __glibcxx_digits10_b (T, sizeof(T) * __CHAR_BIT__)((sizeof(T) * 8 - ((T)(-1) < 0)) * 643L / 2136)
154
155#define __glibcxx_max_digits10(T) \
156 (2 + (T) * 643L / 2136)
157
158namespace std _GLIBCXX_VISIBILITY(default)__attribute__ ((__visibility__ ("default")))
159{
160_GLIBCXX_BEGIN_NAMESPACE_VERSION
161
162 /**
163 * @brief Describes the rounding style for floating-point types.
164 *
165 * This is used in the std::numeric_limits class.
166 */
167 enum float_round_style
168 {
169 round_indeterminate = -1, /// Intermediate.
170 round_toward_zero = 0, /// To zero.
171 round_to_nearest = 1, /// To the nearest representable value.
172 round_toward_infinity = 2, /// To infinity.
173 round_toward_neg_infinity = 3 /// To negative infinity.
174 };
175
176 /**
177 * @brief Describes the denormalization for floating-point types.
178 *
179 * These values represent the presence or absence of a variable number
180 * of exponent bits. This type is used in the std::numeric_limits class.
181 */
182 enum float_denorm_style
183 {
184 /// Indeterminate at compile time whether denormalized values are allowed.
185 denorm_indeterminate = -1,
186 /// The type does not allow denormalized values.
187 denorm_absent = 0,
188 /// The type allows denormalized values.
189 denorm_present = 1
190 };
191
192 /**
193 * @brief Part of std::numeric_limits.
194 *
195 * The @c static @c const members are usable as integral constant
196 * expressions.
197 *
198 * @note This is a separate class for purposes of efficiency; you
199 * should only access these members as part of an instantiation
200 * of the std::numeric_limits class.
201 */
202 struct __numeric_limits_base
203 {
204 /** This will be true for all fundamental types (which have
205 specializations), and false for everything else. */
206 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = false;
207
208 /** The number of @c radix digits that be represented without change: for
209 integer types, the number of non-sign bits in the mantissa; for
210 floating types, the number of @c radix digits in the mantissa. */
211 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = 0;
212
213 /** The number of base 10 digits that can be represented without change. */
214 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = 0;
215
216#if __cplusplus201103L >= 201103L
217 /** The number of base 10 digits required to ensure that values which
218 differ are always differentiated. */
219 static constexpr int max_digits10 = 0;
220#endif
221
222 /** True if the type is signed. */
223 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
224
225 /** True if the type is integer. */
226 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
227
228 /** True if the type uses an exact representation. All integer types are
229 exact, but not all exact types are integer. For example, rational and
230 fixed-exponent representations are exact but not integer. */
231 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
232
233 /** For integer types, specifies the base of the representation. For
234 floating types, specifies the base of the exponent representation. */
235 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 0;
236
237 /** The minimum negative integer such that @c radix raised to the power of
238 (one less than that integer) is a normalized floating point number. */
239 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
240
241 /** The minimum negative integer such that 10 raised to that power is in
242 the range of normalized floating point numbers. */
243 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
244
245 /** The maximum positive integer such that @c radix raised to the power of
246 (one less than that integer) is a representable finite floating point
247 number. */
248 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
249
250 /** The maximum positive integer such that 10 raised to that power is in
251 the range of representable finite floating point numbers. */
252 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
253
254 /** True if the type has a representation for positive infinity. */
255 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
256
257 /** True if the type has a representation for a quiet (non-signaling)
258 Not a Number. */
259 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
260
261 /** True if the type has a representation for a signaling
262 Not a Number. */
263 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
264
265 /** See std::float_denorm_style for more information. */
266 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm = denorm_absent;
267
268 /** True if loss of accuracy is detected as a denormalization loss,
269 rather than as an inexact result. */
270 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
271
272 /** True if-and-only-if the type adheres to the IEC 559 standard, also
273 known as IEEE 754. (Only makes sense for floating point types.) */
274 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
275
276 /** True if the set of values representable by the type is
277 finite. All built-in types are bounded, this member would be
278 false for arbitrary precision types. */
279 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = false;
280
281 /** True if the type is @e modulo. A type is modulo if, for any
282 operation involving +, -, or * on values of that type whose
283 result would fall outside the range [min(),max()], the value
284 returned differs from the true value by an integer multiple of
285 max() - min() + 1. On most machines, this is false for floating
286 types, true for unsigned integers, and true for signed integers.
287 See PR22200 about signed integers. */
288 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
289
290 /** True if trapping is implemented for this type. */
291 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = false;
292
293 /** True if tininess is detected before rounding. (see IEC 559) */
294 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
295
296 /** See std::float_round_style for more information. This is only
297 meaningful for floating types; integer types will all be
298 round_toward_zero. */
299 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style =
300 round_toward_zero;
301 };
302
303 /**
304 * @brief Properties of fundamental types.
305 *
306 * This class allows a program to obtain information about the
307 * representation of a fundamental type on a given platform. For
308 * non-fundamental types, the functions will return 0 and the data
309 * members will all be @c false.
310 *
311 * _GLIBCXX_RESOLVE_LIB_DEFECTS: DRs 201 and 184 (hi Gaby!) are
312 * noted, but not incorporated in this documented (yet).
313 */
314 template<typename _Tp>
315 struct numeric_limits : public __numeric_limits_base
316 {
317 /** The minimum finite value, or for floating types with
318 denormalization, the minimum positive normalized value. */
319 static _GLIBCXX_CONSTEXPRconstexpr _Tp
320 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
321
322 /** The maximum finite value. */
323 static _GLIBCXX_CONSTEXPRconstexpr _Tp
324 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
325
326#if __cplusplus201103L >= 201103L
327 /** A finite value x such that there is no other finite value y
328 * where y < x. */
329 static constexpr _Tp
330 lowest() noexcept { return _Tp(); }
331#endif
332
333 /** The @e machine @e epsilon: the difference between 1 and the least
334 value greater than 1 that is representable. */
335 static _GLIBCXX_CONSTEXPRconstexpr _Tp
336 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
337
338 /** The maximum rounding error measurement (see LIA-1). */
339 static _GLIBCXX_CONSTEXPRconstexpr _Tp
340 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
341
342 /** The representation of positive infinity, if @c has_infinity. */
343 static _GLIBCXX_CONSTEXPRconstexpr _Tp
344 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
345
346 /** The representation of a quiet Not a Number,
347 if @c has_quiet_NaN. */
348 static _GLIBCXX_CONSTEXPRconstexpr _Tp
349 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
350
351 /** The representation of a signaling Not a Number, if
352 @c has_signaling_NaN. */
353 static _GLIBCXX_CONSTEXPRconstexpr _Tp
354 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
355
356 /** The minimum positive denormalized value. For types where
357 @c has_denorm is false, this is the minimum positive normalized
358 value. */
359 static _GLIBCXX_CONSTEXPRconstexpr _Tp
360 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
361 };
362
363#if __cplusplus201103L >= 201103L
364 template<typename _Tp>
365 struct numeric_limits<const _Tp>
366 : public numeric_limits<_Tp> { };
367
368 template<typename _Tp>
369 struct numeric_limits<volatile _Tp>
370 : public numeric_limits<_Tp> { };
371
372 template<typename _Tp>
373 struct numeric_limits<const volatile _Tp>
374 : public numeric_limits<_Tp> { };
375#endif
376
377 // Now there follow 16 explicit specializations. Yes, 16. Make sure
378 // you get the count right. (18 in c++0x mode)
379
380 /// numeric_limits<bool> specialization.
381 template<>
382 struct numeric_limits<bool>
383 {
384 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
385
386 static _GLIBCXX_CONSTEXPRconstexpr bool
387 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
388
389 static _GLIBCXX_CONSTEXPRconstexpr bool
390 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return true; }
391
392#if __cplusplus201103L >= 201103L
393 static constexpr bool
394 lowest() noexcept { return min(); }
395#endif
396 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = 1;
397 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = 0;
398#if __cplusplus201103L >= 201103L
399 static constexpr int max_digits10 = 0;
400#endif
401 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
402 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
403 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
404 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
405
406 static _GLIBCXX_CONSTEXPRconstexpr bool
407 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
408
409 static _GLIBCXX_CONSTEXPRconstexpr bool
410 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
411
412 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
413 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
414 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
415 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
416
417 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
418 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
419 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
420 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
421 = denorm_absent;
422 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
423
424 static _GLIBCXX_CONSTEXPRconstexpr bool
425 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
426
427 static _GLIBCXX_CONSTEXPRconstexpr bool
428 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
429
430 static _GLIBCXX_CONSTEXPRconstexpr bool
431 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
432
433 static _GLIBCXX_CONSTEXPRconstexpr bool
434 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
435
436 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
437 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
438 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
439
440 // It is not clear what it means for a boolean type to trap.
441 // This is a DR on the LWG issue list. Here, I use integer
442 // promotion semantics.
443 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
444 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
445 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
446 = round_toward_zero;
447 };
448
449 /// numeric_limits<char> specialization.
450 template<>
451 struct numeric_limits<char>
452 {
453 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
454
455 static _GLIBCXX_CONSTEXPRconstexpr char
456 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_min(char); }
457
458 static _GLIBCXX_CONSTEXPRconstexpr char
459 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_max(char); }
460
461#if __cplusplus201103L >= 201103L
462 static constexpr char
463 lowest() noexcept { return min(); }
464#endif
465
466 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (char);
467 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (char);
468#if __cplusplus201103L >= 201103L
469 static constexpr int max_digits10 = 0;
470#endif
471 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = __glibcxx_signed (char);
472 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
473 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
474 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
475
476 static _GLIBCXX_CONSTEXPRconstexpr char
477 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
478
479 static _GLIBCXX_CONSTEXPRconstexpr char
480 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
481
482 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
483 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
484 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
485 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
486
487 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
488 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
489 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
490 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
491 = denorm_absent;
492 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
493
494 static _GLIBCXX_CONSTEXPRconstexpr
495 char infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return char(); }
496
497 static _GLIBCXX_CONSTEXPRconstexpr char
498 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return char(); }
499
500 static _GLIBCXX_CONSTEXPRconstexpr char
501 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return char(); }
502
503 static _GLIBCXX_CONSTEXPRconstexpr char
504 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<char>(0); }
505
506 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
507 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
508 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = !is_signed;
509
510 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
511 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
512 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
513 = round_toward_zero;
514 };
515
516 /// numeric_limits<signed char> specialization.
517 template<>
518 struct numeric_limits<signed char>
519 {
520 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
521
522 static _GLIBCXX_CONSTEXPRconstexpr signed char
523 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__SCHAR_MAX__127 - 1; }
524
525 static _GLIBCXX_CONSTEXPRconstexpr signed char
526 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SCHAR_MAX__127; }
527
528#if __cplusplus201103L >= 201103L
529 static constexpr signed char
530 lowest() noexcept { return min(); }
531#endif
532
533 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (signed char);
534 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
535 = __glibcxx_digits10 (signed char);
536#if __cplusplus201103L >= 201103L
537 static constexpr int max_digits10 = 0;
538#endif
539 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
540 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
541 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
542 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
543
544 static _GLIBCXX_CONSTEXPRconstexpr signed char
545 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
546
547 static _GLIBCXX_CONSTEXPRconstexpr signed char
548 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
549
550 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
551 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
552 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
553 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
554
555 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
556 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
557 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
558 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
559 = denorm_absent;
560 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
561
562 static _GLIBCXX_CONSTEXPRconstexpr signed char
563 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<signed char>(0); }
564
565 static _GLIBCXX_CONSTEXPRconstexpr signed char
566 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<signed char>(0); }
567
568 static _GLIBCXX_CONSTEXPRconstexpr signed char
569 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
570 { return static_cast<signed char>(0); }
571
572 static _GLIBCXX_CONSTEXPRconstexpr signed char
573 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
574 { return static_cast<signed char>(0); }
575
576 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
577 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
578 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
579
580 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
581 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
582 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
583 = round_toward_zero;
584 };
585
586 /// numeric_limits<unsigned char> specialization.
587 template<>
588 struct numeric_limits<unsigned char>
589 {
590 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
591
592 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
593 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
594
595 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
596 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SCHAR_MAX__127 * 2U + 1; }
597
598#if __cplusplus201103L >= 201103L
599 static constexpr unsigned char
600 lowest() noexcept { return min(); }
601#endif
602
603 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
604 = __glibcxx_digits (unsigned char);
605 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
606 = __glibcxx_digits10 (unsigned char);
607#if __cplusplus201103L >= 201103L
608 static constexpr int max_digits10 = 0;
609#endif
610 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
611 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
612 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
613 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
614
615 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
616 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
617
618 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
619 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
620
621 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
622 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
623 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
624 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
625
626 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
627 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
628 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
629 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
630 = denorm_absent;
631 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
632
633 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
634 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
635 { return static_cast<unsigned char>(0); }
636
637 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
638 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
639 { return static_cast<unsigned char>(0); }
640
641 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
642 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
643 { return static_cast<unsigned char>(0); }
644
645 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
646 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
647 { return static_cast<unsigned char>(0); }
648
649 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
650 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
651 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
652
653 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
654 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
655 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
656 = round_toward_zero;
657 };
658
659 /// numeric_limits<wchar_t> specialization.
660 template<>
661 struct numeric_limits<wchar_t>
662 {
663 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
664
665 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
666 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_min (wchar_t); }
667
668 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
669 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_max (wchar_t); }
670
671#if __cplusplus201103L >= 201103L
672 static constexpr wchar_t
673 lowest() noexcept { return min(); }
674#endif
675
676 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (wchar_t);
677 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
678 = __glibcxx_digits10 (wchar_t);
679#if __cplusplus201103L >= 201103L
680 static constexpr int max_digits10 = 0;
681#endif
682 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = __glibcxx_signed (wchar_t);
683 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
684 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
685 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
686
687 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
688 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
689
690 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
691 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
692
693 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
694 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
695 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
696 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
697
698 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
699 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
700 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
701 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
702 = denorm_absent;
703 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
704
705 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
706 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
707
708 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
709 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
710
711 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
712 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
713
714 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
715 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
716
717 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
718 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
719 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = !is_signed;
720
721 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
722 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
723 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
724 = round_toward_zero;
725 };
726
727#if __cplusplus201103L >= 201103L
728 /// numeric_limits<char16_t> specialization.
729 template<>
730 struct numeric_limits<char16_t>
731 {
732 static constexpr bool is_specialized = true;
733
734 static constexpr char16_t
735 min() noexcept { return __glibcxx_min (char16_t); }
736
737 static constexpr char16_t
738 max() noexcept { return __glibcxx_max (char16_t); }
739
740 static constexpr char16_t
741 lowest() noexcept { return min(); }
742
743 static constexpr int digits = __glibcxx_digits (char16_t);
744 static constexpr int digits10 = __glibcxx_digits10 (char16_t);
745 static constexpr int max_digits10 = 0;
746 static constexpr bool is_signed = __glibcxx_signed (char16_t);
747 static constexpr bool is_integer = true;
748 static constexpr bool is_exact = true;
749 static constexpr int radix = 2;
750
751 static constexpr char16_t
752 epsilon() noexcept { return 0; }
753
754 static constexpr char16_t
755 round_error() noexcept { return 0; }
756
757 static constexpr int min_exponent = 0;
758 static constexpr int min_exponent10 = 0;
759 static constexpr int max_exponent = 0;
760 static constexpr int max_exponent10 = 0;
761
762 static constexpr bool has_infinity = false;
763 static constexpr bool has_quiet_NaN = false;
764 static constexpr bool has_signaling_NaN = false;
765 static constexpr float_denorm_style has_denorm = denorm_absent;
766 static constexpr bool has_denorm_loss = false;
767
768 static constexpr char16_t
769 infinity() noexcept { return char16_t(); }
770
771 static constexpr char16_t
772 quiet_NaN() noexcept { return char16_t(); }
773
774 static constexpr char16_t
775 signaling_NaN() noexcept { return char16_t(); }
776
777 static constexpr char16_t
778 denorm_min() noexcept { return char16_t(); }
779
780 static constexpr bool is_iec559 = false;
781 static constexpr bool is_bounded = true;
782 static constexpr bool is_modulo = !is_signed;
783
784 static constexpr bool traps = __glibcxx_integral_trapstrue;
785 static constexpr bool tinyness_before = false;
786 static constexpr float_round_style round_style = round_toward_zero;
787 };
788
789 /// numeric_limits<char32_t> specialization.
790 template<>
791 struct numeric_limits<char32_t>
792 {
793 static constexpr bool is_specialized = true;
794
795 static constexpr char32_t
796 min() noexcept { return __glibcxx_min (char32_t); }
797
798 static constexpr char32_t
799 max() noexcept { return __glibcxx_max (char32_t); }
800
801 static constexpr char32_t
802 lowest() noexcept { return min(); }
803
804 static constexpr int digits = __glibcxx_digits (char32_t);
805 static constexpr int digits10 = __glibcxx_digits10 (char32_t);
806 static constexpr int max_digits10 = 0;
807 static constexpr bool is_signed = __glibcxx_signed (char32_t);
808 static constexpr bool is_integer = true;
809 static constexpr bool is_exact = true;
810 static constexpr int radix = 2;
811
812 static constexpr char32_t
813 epsilon() noexcept { return 0; }
814
815 static constexpr char32_t
816 round_error() noexcept { return 0; }
817
818 static constexpr int min_exponent = 0;
819 static constexpr int min_exponent10 = 0;
820 static constexpr int max_exponent = 0;
821 static constexpr int max_exponent10 = 0;
822
823 static constexpr bool has_infinity = false;
824 static constexpr bool has_quiet_NaN = false;
825 static constexpr bool has_signaling_NaN = false;
826 static constexpr float_denorm_style has_denorm = denorm_absent;
827 static constexpr bool has_denorm_loss = false;
828
829 static constexpr char32_t
830 infinity() noexcept { return char32_t(); }
831
832 static constexpr char32_t
833 quiet_NaN() noexcept { return char32_t(); }
834
835 static constexpr char32_t
836 signaling_NaN() noexcept { return char32_t(); }
837
838 static constexpr char32_t
839 denorm_min() noexcept { return char32_t(); }
840
841 static constexpr bool is_iec559 = false;
842 static constexpr bool is_bounded = true;
843 static constexpr bool is_modulo = !is_signed;
844
845 static constexpr bool traps = __glibcxx_integral_trapstrue;
846 static constexpr bool tinyness_before = false;
847 static constexpr float_round_style round_style = round_toward_zero;
848 };
849#endif
850
851 /// numeric_limits<short> specialization.
852 template<>
853 struct numeric_limits<short>
854 {
855 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
856
857 static _GLIBCXX_CONSTEXPRconstexpr short
858 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__SHRT_MAX__32767 - 1; }
859
860 static _GLIBCXX_CONSTEXPRconstexpr short
861 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SHRT_MAX__32767; }
862
863#if __cplusplus201103L >= 201103L
864 static constexpr short
865 lowest() noexcept { return min(); }
866#endif
867
868 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (short);
869 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (short);
870#if __cplusplus201103L >= 201103L
871 static constexpr int max_digits10 = 0;
872#endif
873 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
874 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
875 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
876 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
877
878 static _GLIBCXX_CONSTEXPRconstexpr short
879 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
880
881 static _GLIBCXX_CONSTEXPRconstexpr short
882 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
883
884 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
885 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
886 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
887 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
888
889 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
890 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
891 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
892 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
893 = denorm_absent;
894 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
895
896 static _GLIBCXX_CONSTEXPRconstexpr short
897 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
898
899 static _GLIBCXX_CONSTEXPRconstexpr short
900 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
901
902 static _GLIBCXX_CONSTEXPRconstexpr short
903 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
904
905 static _GLIBCXX_CONSTEXPRconstexpr short
906 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
907
908 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
909 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
910 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
911
912 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
913 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
914 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
915 = round_toward_zero;
916 };
917
918 /// numeric_limits<unsigned short> specialization.
919 template<>
920 struct numeric_limits<unsigned short>
921 {
922 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
923
924 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
925 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
926
927 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
928 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SHRT_MAX__32767 * 2U + 1; }
929
930#if __cplusplus201103L >= 201103L
931 static constexpr unsigned short
932 lowest() noexcept { return min(); }
933#endif
934
935 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
936 = __glibcxx_digits (unsigned short);
937 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
938 = __glibcxx_digits10 (unsigned short);
939#if __cplusplus201103L >= 201103L
940 static constexpr int max_digits10 = 0;
941#endif
942 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
943 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
944 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
945 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
946
947 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
948 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
949
950 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
951 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
952
953 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
954 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
955 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
956 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
957
958 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
959 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
960 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
961 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
962 = denorm_absent;
963 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
964
965 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
966 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
967 { return static_cast<unsigned short>(0); }
968
969 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
970 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
971 { return static_cast<unsigned short>(0); }
972
973 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
974 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
975 { return static_cast<unsigned short>(0); }
976
977 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
978 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
979 { return static_cast<unsigned short>(0); }
980
981 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
982 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
983 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
984
985 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
986 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
987 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
988 = round_toward_zero;
989 };
990
991 /// numeric_limits<int> specialization.
992 template<>
993 struct numeric_limits<int>
994 {
995 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
996
997 static _GLIBCXX_CONSTEXPRconstexpr int
998 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__INT_MAX__2147483647 - 1; }
999
1000 static _GLIBCXX_CONSTEXPRconstexpr int
1001 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __INT_MAX__2147483647; }
1002
1003#if __cplusplus201103L >= 201103L
1004 static constexpr int
1005 lowest() noexcept { return min(); }
1006#endif
1007
1008 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (int);
1009 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (int);
1010#if __cplusplus201103L >= 201103L
1011 static constexpr int max_digits10 = 0;
1012#endif
1013 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1014 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1015 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1016 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1017
1018 static _GLIBCXX_CONSTEXPRconstexpr int
1019 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1020
1021 static _GLIBCXX_CONSTEXPRconstexpr int
1022 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1023
1024 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1025 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1026 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1027 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1028
1029 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1030 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1031 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1032 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1033 = denorm_absent;
1034 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1035
1036 static _GLIBCXX_CONSTEXPRconstexpr int
1037 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1038
1039 static _GLIBCXX_CONSTEXPRconstexpr int
1040 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1041
1042 static _GLIBCXX_CONSTEXPRconstexpr int
1043 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1044
1045 static _GLIBCXX_CONSTEXPRconstexpr int
1046 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1047
1048 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1049 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1050 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1051
1052 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1053 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1054 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1055 = round_toward_zero;
1056 };
1057
1058 /// numeric_limits<unsigned int> specialization.
1059 template<>
1060 struct numeric_limits<unsigned int>
1061 {
1062 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1063
1064 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1065 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1066
1067 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1068 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __INT_MAX__2147483647 * 2U + 1; }
1069
1070#if __cplusplus201103L >= 201103L
1071 static constexpr unsigned int
1072 lowest() noexcept { return min(); }
1073#endif
1074
1075 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1076 = __glibcxx_digits (unsigned int);
1077 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1078 = __glibcxx_digits10 (unsigned int);
1079#if __cplusplus201103L >= 201103L
1080 static constexpr int max_digits10 = 0;
1081#endif
1082 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
1083 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1084 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1085 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1086
1087 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1088 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1089
1090 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1091 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1092
1093 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1094 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1095 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1096 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1097
1098 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1099 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1100 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1101 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1102 = denorm_absent;
1103 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1104
1105 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1106 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<unsigned int>(0); }
1107
1108 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1109 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1110 { return static_cast<unsigned int>(0); }
1111
1112 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1113 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1114 { return static_cast<unsigned int>(0); }
1115
1116 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1117 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
1118 { return static_cast<unsigned int>(0); }
1119
1120 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1121 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1122 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
1123
1124 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1125 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1126 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1127 = round_toward_zero;
1128 };
1129
1130 /// numeric_limits<long> specialization.
1131 template<>
1132 struct numeric_limits<long>
1133 {
1134 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1135
1136 static _GLIBCXX_CONSTEXPRconstexpr long
1137 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__LONG_MAX__9223372036854775807L - 1; }
1138
1139 static _GLIBCXX_CONSTEXPRconstexpr long
1140 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_MAX__9223372036854775807L; }
1141
1142#if __cplusplus201103L >= 201103L
1143 static constexpr long
1144 lowest() noexcept { return min(); }
1145#endif
1146
1147 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (long);
1148 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (long);
1149#if __cplusplus201103L >= 201103L
1150 static constexpr int max_digits10 = 0;
1151#endif
1152 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1153 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1154 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1155 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1156
1157 static _GLIBCXX_CONSTEXPRconstexpr long
1158 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1159
1160 static _GLIBCXX_CONSTEXPRconstexpr long
1161 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1162
1163 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1164 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1165 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1166 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1167
1168 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1169 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1170 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1171 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1172 = denorm_absent;
1173 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1174
1175 static _GLIBCXX_CONSTEXPRconstexpr long
1176 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1177
1178 static _GLIBCXX_CONSTEXPRconstexpr long
1179 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1180
1181 static _GLIBCXX_CONSTEXPRconstexpr long
1182 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1183
1184 static _GLIBCXX_CONSTEXPRconstexpr long
1185 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1186
1187 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1188 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1189 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1190
1191 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1192 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1193 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1194 = round_toward_zero;
1195 };
1196
1197 /// numeric_limits<unsigned long> specialization.
1198 template<>
1199 struct numeric_limits<unsigned long>
1200 {
1201 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1202
1203 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1204 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1205
1206 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1207 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_MAX__9223372036854775807L * 2UL + 1; }
12
Returning the value 18446744073709551615
1208
1209#if __cplusplus201103L >= 201103L
1210 static constexpr unsigned long
1211 lowest() noexcept { return min(); }
1212#endif
1213
1214 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1215 = __glibcxx_digits (unsigned long);
1216 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1217 = __glibcxx_digits10 (unsigned long);
1218#if __cplusplus201103L >= 201103L
1219 static constexpr int max_digits10 = 0;
1220#endif
1221 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
1222 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1223 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1224 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1225
1226 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1227 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1228
1229 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1230 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1231
1232 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1233 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1234 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1235 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1236
1237 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1238 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1239 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1240 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1241 = denorm_absent;
1242 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1243
1244 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1245 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
1246 { return static_cast<unsigned long>(0); }
1247
1248 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1249 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1250 { return static_cast<unsigned long>(0); }
1251
1252 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1253 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1254 { return static_cast<unsigned long>(0); }
1255
1256 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1257 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
1258 { return static_cast<unsigned long>(0); }
1259
1260 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1261 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1262 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
1263
1264 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1265 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1266 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1267 = round_toward_zero;
1268 };
1269
1270 /// numeric_limits<long long> specialization.
1271 template<>
1272 struct numeric_limits<long long>
1273 {
1274 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1275
1276 static _GLIBCXX_CONSTEXPRconstexpr long long
1277 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__LONG_LONG_MAX__9223372036854775807LL - 1; }
1278
1279 static _GLIBCXX_CONSTEXPRconstexpr long long
1280 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_LONG_MAX__9223372036854775807LL; }
1281
1282#if __cplusplus201103L >= 201103L
1283 static constexpr long long
1284 lowest() noexcept { return min(); }
1285#endif
1286
1287 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1288 = __glibcxx_digits (long long);
1289 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1290 = __glibcxx_digits10 (long long);
1291#if __cplusplus201103L >= 201103L
1292 static constexpr int max_digits10 = 0;
1293#endif
1294 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1295 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1296 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1297 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1298
1299 static _GLIBCXX_CONSTEXPRconstexpr long long
1300 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1301
1302 static _GLIBCXX_CONSTEXPRconstexpr long long
1303 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1304
1305 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1306 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1307 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1308 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1309
1310 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1311 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1312 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1313 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1314 = denorm_absent;
1315 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1316
1317 static _GLIBCXX_CONSTEXPRconstexpr long long
1318 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long long>(0); }
1319
1320 static _GLIBCXX_CONSTEXPRconstexpr long long
1321 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long long>(0); }
1322
1323 static _GLIBCXX_CONSTEXPRconstexpr long long
1324 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1325 { return static_cast<long long>(0); }
1326
1327 static _GLIBCXX_CONSTEXPRconstexpr long long
1328 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long long>(0); }
1329
1330 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1331 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1332 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1333
1334 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1335 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1336 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1337 = round_toward_zero;
1338 };
1339
1340 /// numeric_limits<unsigned long long> specialization.
1341 template<>
1342 struct numeric_limits<unsigned long long>
1343 {
1344 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1345
1346 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1347 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1348
1349 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1350 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_LONG_MAX__9223372036854775807LL * 2ULL + 1; }
1351
1352#if __cplusplus201103L >= 201103L
1353 static constexpr unsigned long long
1354 lowest() noexcept { return min(); }
1355#endif
1356
1357 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1358 = __glibcxx_digits (unsigned long long);
1359 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1360 = __glibcxx_digits10 (unsigned long long);
1361#if __cplusplus201103L >= 201103L
1362 static constexpr int max_digits10 = 0;
1363#endif
1364 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
1365 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1366 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1367 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1368
1369 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1370 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1371
1372 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1373 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1374
1375 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1376 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1377 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1378 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1379
1380 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1381 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1382 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1383 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1384 = denorm_absent;
1385 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1386
1387 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1388 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
1389 { return static_cast<unsigned long long>(0); }
1390
1391 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1392 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1393 { return static_cast<unsigned long long>(0); }
1394
1395 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1396 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1397 { return static_cast<unsigned long long>(0); }
1398
1399 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1400 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
1401 { return static_cast<unsigned long long>(0); }
1402
1403 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1404 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1405 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
1406
1407 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1408 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1409 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1410 = round_toward_zero;
1411 };
1412
1413#if !defined(__STRICT_ANSI__1)
1414
1415#define __INT_N(TYPE, BITSIZE, EXT, UEXT) \
1416 template<> \
1417 struct numeric_limits<TYPE> \
1418 { \
1419 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true; \
1420 \
1421 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1422 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_min_b (TYPE, BITSIZE)(((TYPE)(-1) < 0) ? -(((TYPE)(-1) < 0) ? (((((TYPE)1 <<
((BITSIZE - ((TYPE)(-1) < 0)) - 1)) - 1) << 1) + 1)
: ~(TYPE)0) - 1 : (TYPE)0)
; } \
1423 \
1424 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1425 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_max_b (TYPE, BITSIZE)(((TYPE)(-1) < 0) ? (((((TYPE)1 << ((BITSIZE - ((TYPE
)(-1) < 0)) - 1)) - 1) << 1) + 1) : ~(TYPE)0)
; } \
1426 \
1427 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits \
1428 = BITSIZE - 1; \
1429 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 \
1430 = (BITSIZE - 1) * 643L / 2136; \
1431 \
1432 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true; \
1433 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true; \
1434 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true; \
1435 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2; \
1436 \
1437 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1438 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1439 \
1440 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1441 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1442 \
1443 EXT \
1444 \
1445 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0; \
1446 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0; \
1447 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0; \
1448 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0; \
1449 \
1450 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false; \
1451 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false; \
1452 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false; \
1453 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm \
1454 = denorm_absent; \
1455 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false; \
1456 \
1457 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1458 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept \
1459 { return static_cast<TYPE>(0); } \
1460 \
1461 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1462 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1463 { return static_cast<TYPE>(0); } \
1464 \
1465 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1466 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1467 { return static_cast<TYPE>(0); } \
1468 \
1469 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1470 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept \
1471 { return static_cast<TYPE>(0); } \
1472 \
1473 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false; \
1474 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true; \
1475 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false; \
1476 \
1477 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps \
1478 = __glibcxx_integral_trapstrue; \
1479 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false; \
1480 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style \
1481 = round_toward_zero; \
1482 }; \
1483 \
1484 template<> \
1485 struct numeric_limits<unsigned TYPE> \
1486 { \
1487 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true; \
1488 \
1489 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1490 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1491 \
1492 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1493 max() _GLIBCXX_USE_NOEXCEPTnoexcept \
1494 { return __glibcxx_max_b (unsigned TYPE, BITSIZE)(((unsigned TYPE)(-1) < 0) ? (((((unsigned TYPE)1 <<
((BITSIZE - ((unsigned TYPE)(-1) < 0)) - 1)) - 1) <<
1) + 1) : ~(unsigned TYPE)0)
; } \
1495 \
1496 UEXT \
1497 \
1498 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits \
1499 = BITSIZE; \
1500 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 \
1501 = BITSIZE * 643L / 2136; \
1502 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false; \
1503 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true; \
1504 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true; \
1505 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2; \
1506 \
1507 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1508 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1509 \
1510 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1511 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1512 \
1513 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0; \
1514 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0; \
1515 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0; \
1516 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0; \
1517 \
1518 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false; \
1519 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false; \
1520 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false; \
1521 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm \
1522 = denorm_absent; \
1523 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false; \
1524 \
1525 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1526 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept \
1527 { return static_cast<unsigned TYPE>(0); } \
1528 \
1529 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1530 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1531 { return static_cast<unsigned TYPE>(0); } \
1532 \
1533 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1534 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1535 { return static_cast<unsigned TYPE>(0); } \
1536 \
1537 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1538 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept \
1539 { return static_cast<unsigned TYPE>(0); } \
1540 \
1541 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false; \
1542 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true; \
1543 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true; \
1544 \
1545 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue; \
1546 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false; \
1547 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style \
1548 = round_toward_zero; \
1549 };
1550
1551#if __cplusplus201103L >= 201103L
1552
1553#define __INT_N_201103(TYPE) \
1554 static constexpr TYPE \
1555 lowest() noexcept { return min(); } \
1556 static constexpr int max_digits10 = 0;
1557
1558#define __INT_N_U201103(TYPE) \
1559 static constexpr unsigned TYPE \
1560 lowest() noexcept { return min(); } \
1561 static constexpr int max_digits10 = 0;
1562
1563#else
1564#define __INT_N_201103(TYPE)
1565#define __INT_N_U201103(TYPE)
1566#endif
1567
1568#ifdef __GLIBCXX_TYPE_INT_N_0
1569 __INT_N(__GLIBCXX_TYPE_INT_N_0, __GLIBCXX_BITSIZE_INT_N_0,
1570 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_0), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_0))
1571#endif
1572#ifdef __GLIBCXX_TYPE_INT_N_1
1573 __INT_N (__GLIBCXX_TYPE_INT_N_1, __GLIBCXX_BITSIZE_INT_N_1,
1574 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_1), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_1))
1575#endif
1576#ifdef __GLIBCXX_TYPE_INT_N_2
1577 __INT_N (__GLIBCXX_TYPE_INT_N_2, __GLIBCXX_BITSIZE_INT_N_2,
1578 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_2), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_2))
1579#endif
1580#ifdef __GLIBCXX_TYPE_INT_N_3
1581 __INT_N (__GLIBCXX_TYPE_INT_N_3, __GLIBCXX_BITSIZE_INT_N_3,
1582 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_3), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_3))
1583#endif
1584
1585#undef __INT_N
1586#undef __INT_N_201103
1587#undef __INT_N_U201103
1588
1589#endif
1590
1591 /// numeric_limits<float> specialization.
1592 template<>
1593 struct numeric_limits<float>
1594 {
1595 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1596
1597 static _GLIBCXX_CONSTEXPRconstexpr float
1598 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_MIN__1.17549435e-38F; }
1599
1600 static _GLIBCXX_CONSTEXPRconstexpr float
1601 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_MAX__3.40282347e+38F; }
1602
1603#if __cplusplus201103L >= 201103L
1604 static constexpr float
1605 lowest() noexcept { return -__FLT_MAX__3.40282347e+38F; }
1606#endif
1607
1608 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __FLT_MANT_DIG__24;
1609 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __FLT_DIG__6;
1610#if __cplusplus201103L >= 201103L
1611 static constexpr int max_digits10
1612 = __glibcxx_max_digits10 (__FLT_MANT_DIG__24);
1613#endif
1614 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1615 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
1616 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
1617 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = __FLT_RADIX__2;
1618
1619 static _GLIBCXX_CONSTEXPRconstexpr float
1620 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_EPSILON__1.19209290e-7F; }
1621
1622 static _GLIBCXX_CONSTEXPRconstexpr float
1623 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0.5F; }
1624
1625 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = __FLT_MIN_EXP__(-125);
1626 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = __FLT_MIN_10_EXP__(-37);
1627 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = __FLT_MAX_EXP__128;
1628 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = __FLT_MAX_10_EXP__38;
1629
1630 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = __FLT_HAS_INFINITY__1;
1631 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = __FLT_HAS_QUIET_NAN__1;
1632 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = has_quiet_NaN;
1633 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1634 = bool(__FLT_HAS_DENORM__1) ? denorm_present : denorm_absent;
1635 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss
1636 = __glibcxx_float_has_denorm_loss;
1637
1638 static _GLIBCXX_CONSTEXPRconstexpr float
1639 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_huge_valf(); }
1640
1641 static _GLIBCXX_CONSTEXPRconstexpr float
1642 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nanf(""); }
1643
1644 static _GLIBCXX_CONSTEXPRconstexpr float
1645 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nansf(""); }
1646
1647 static _GLIBCXX_CONSTEXPRconstexpr float
1648 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_DENORM_MIN__1.40129846e-45F; }
1649
1650 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559
1651 = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
1652 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1653 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1654
1655 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_float_traps;
1656 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before
1657 = __glibcxx_float_tinyness_before;
1658 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1659 = round_to_nearest;
1660 };
1661
1662#undef __glibcxx_float_has_denorm_loss
1663#undef __glibcxx_float_traps
1664#undef __glibcxx_float_tinyness_before
1665
1666 /// numeric_limits<double> specialization.
1667 template<>
1668 struct numeric_limits<double>
1669 {
1670 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1671
1672 static _GLIBCXX_CONSTEXPRconstexpr double
1673 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_MIN__2.2250738585072014e-308; }
1674
1675 static _GLIBCXX_CONSTEXPRconstexpr double
1676 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_MAX__1.7976931348623157e+308; }
1677
1678#if __cplusplus201103L >= 201103L
1679 static constexpr double
1680 lowest() noexcept { return -__DBL_MAX__1.7976931348623157e+308; }
1681#endif
1682
1683 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __DBL_MANT_DIG__53;
1684 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __DBL_DIG__15;
1685#if __cplusplus201103L >= 201103L
1686 static constexpr int max_digits10
1687 = __glibcxx_max_digits10 (__DBL_MANT_DIG__53);
1688#endif
1689 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1690 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
1691 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
1692 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = __FLT_RADIX__2;
1693
1694 static _GLIBCXX_CONSTEXPRconstexpr double
1695 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_EPSILON__2.2204460492503131e-16; }
1696
1697 static _GLIBCXX_CONSTEXPRconstexpr double
1698 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0.5; }
1699
1700 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = __DBL_MIN_EXP__(-1021);
1701 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = __DBL_MIN_10_EXP__(-307);
1702 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = __DBL_MAX_EXP__1024;
1703 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = __DBL_MAX_10_EXP__308;
1704
1705 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = __DBL_HAS_INFINITY__1;
1706 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = __DBL_HAS_QUIET_NAN__1;
1707 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = has_quiet_NaN;
1708 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1709 = bool(__DBL_HAS_DENORM__1) ? denorm_present : denorm_absent;
1710 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss
1711 = __glibcxx_double_has_denorm_loss;
1712
1713 static _GLIBCXX_CONSTEXPRconstexpr double
1714 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_huge_val(); }
1715
1716 static _GLIBCXX_CONSTEXPRconstexpr double
1717 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nan(""); }
1718
1719 static _GLIBCXX_CONSTEXPRconstexpr double
1720 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nans(""); }
1721
1722 static _GLIBCXX_CONSTEXPRconstexpr double
1723 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_DENORM_MIN__4.9406564584124654e-324; }
1724
1725 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559
1726 = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
1727 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1728 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1729
1730 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_double_traps;
1731 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before
1732 = __glibcxx_double_tinyness_before;
1733 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1734 = round_to_nearest;
1735 };
1736
1737#undef __glibcxx_double_has_denorm_loss
1738#undef __glibcxx_double_traps
1739#undef __glibcxx_double_tinyness_before
1740
1741 /// numeric_limits<long double> specialization.
1742 template<>
1743 struct numeric_limits<long double>
1744 {
1745 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1746
1747 static _GLIBCXX_CONSTEXPRconstexpr long double
1748 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_MIN__3.36210314311209350626e-4932L; }
1749
1750 static _GLIBCXX_CONSTEXPRconstexpr long double
1751 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_MAX__1.18973149535723176502e+4932L; }
1752
1753#if __cplusplus201103L >= 201103L
1754 static constexpr long double
1755 lowest() noexcept { return -__LDBL_MAX__1.18973149535723176502e+4932L; }
1756#endif
1757
1758 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __LDBL_MANT_DIG__64;
1759 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __LDBL_DIG__18;
1760#if __cplusplus201103L >= 201103L
1761 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_digits10
1762 = __glibcxx_max_digits10 (__LDBL_MANT_DIG__64);
1763#endif
1764 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1765 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
1766 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
1767 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = __FLT_RADIX__2;
1768
1769 static _GLIBCXX_CONSTEXPRconstexpr long double
1770 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_EPSILON__1.08420217248550443401e-19L; }
1771
1772 static _GLIBCXX_CONSTEXPRconstexpr long double
1773 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0.5L; }
1774
1775 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = __LDBL_MIN_EXP__(-16381);
1776 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = __LDBL_MIN_10_EXP__(-4931);
1777 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = __LDBL_MAX_EXP__16384;
1778 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = __LDBL_MAX_10_EXP__4932;
1779
1780 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = __LDBL_HAS_INFINITY__1;
1781 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = __LDBL_HAS_QUIET_NAN__1;
1782 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = has_quiet_NaN;
1783 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1784 = bool(__LDBL_HAS_DENORM__1) ? denorm_present : denorm_absent;
1785 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss
1786 = __glibcxx_long_double_has_denorm_loss;
1787
1788 static _GLIBCXX_CONSTEXPRconstexpr long double
1789 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_huge_vall(); }
1790
1791 static _GLIBCXX_CONSTEXPRconstexpr long double
1792 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nanl(""); }
1793
1794 static _GLIBCXX_CONSTEXPRconstexpr long double
1795 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nansl(""); }
1796
1797 static _GLIBCXX_CONSTEXPRconstexpr long double
1798 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_DENORM_MIN__3.64519953188247460253e-4951L; }
1799
1800 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559
1801 = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
1802 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1803 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1804
1805 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_long_double_traps;
1806 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before =
1807 __glibcxx_long_double_tinyness_before;
1808 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style =
1809 round_to_nearest;
1810 };
1811
1812#undef __glibcxx_long_double_has_denorm_loss
1813#undef __glibcxx_long_double_traps
1814#undef __glibcxx_long_double_tinyness_before
1815
1816_GLIBCXX_END_NAMESPACE_VERSION
1817} // namespace
1818
1819#undef __glibcxx_signed
1820#undef __glibcxx_min
1821#undef __glibcxx_max
1822#undef __glibcxx_digits
1823#undef __glibcxx_digits10
1824#undef __glibcxx_max_digits10
1825
1826#endif // _GLIBCXX_NUMERIC_LIMITS