Bug Summary

File:llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
Warning:line 1568, column 24
The result of the right shift is undefined due to shifting by '4294967295', which is greater or equal to the width of type 'uint64_t'

Annotated Source Code

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clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name SystemZInstrInfo.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -analyzer-config-compatibility-mode=true -mrelocation-model pic -pic-level 2 -mthread-model posix -mframe-pointer=none -fmath-errno -fno-rounding-math -masm-verbose -mconstructor-aliases -munwind-tables -target-cpu x86-64 -dwarf-column-info -fno-split-dwarf-inlining -debugger-tuning=gdb -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-10/lib/clang/10.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/build-llvm/lib/Target/SystemZ -I /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ -I /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/build-llvm/include -I /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/backward -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-10/lib/clang/10.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++14 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/build-llvm/lib/Target/SystemZ -fdebug-prefix-map=/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd=. -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -stack-protector 2 -fgnuc-version=4.2.1 -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -faddrsig -o /tmp/scan-build-2020-01-13-084841-49055-1 -x c++ /build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp

/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp

1//===-- SystemZInstrInfo.cpp - SystemZ instruction information ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the SystemZ implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SystemZInstrInfo.h"
14#include "MCTargetDesc/SystemZMCTargetDesc.h"
15#include "SystemZ.h"
16#include "SystemZInstrBuilder.h"
17#include "SystemZSubtarget.h"
18#include "llvm/ADT/Statistic.h"
19#include "llvm/CodeGen/LiveInterval.h"
20#include "llvm/CodeGen/LiveIntervals.h"
21#include "llvm/CodeGen/LiveVariables.h"
22#include "llvm/CodeGen/MachineBasicBlock.h"
23#include "llvm/CodeGen/MachineFrameInfo.h"
24#include "llvm/CodeGen/MachineFunction.h"
25#include "llvm/CodeGen/MachineInstr.h"
26#include "llvm/CodeGen/MachineMemOperand.h"
27#include "llvm/CodeGen/MachineOperand.h"
28#include "llvm/CodeGen/MachineRegisterInfo.h"
29#include "llvm/CodeGen/SlotIndexes.h"
30#include "llvm/CodeGen/TargetInstrInfo.h"
31#include "llvm/CodeGen/TargetSubtargetInfo.h"
32#include "llvm/MC/MCInstrDesc.h"
33#include "llvm/MC/MCRegisterInfo.h"
34#include "llvm/Support/BranchProbability.h"
35#include "llvm/Support/ErrorHandling.h"
36#include "llvm/Support/MathExtras.h"
37#include "llvm/Target/TargetMachine.h"
38#include <cassert>
39#include <cstdint>
40#include <iterator>
41
42using namespace llvm;
43
44#define GET_INSTRINFO_CTOR_DTOR
45#define GET_INSTRMAP_INFO
46#include "SystemZGenInstrInfo.inc"
47
48#define DEBUG_TYPE"systemz-II" "systemz-II"
49
50// Return a mask with Count low bits set.
51static uint64_t allOnes(unsigned int Count) {
52 return Count == 0 ? 0 : (uint64_t(1) << (Count - 1) << 1) - 1;
53}
54
55// Pin the vtable to this file.
56void SystemZInstrInfo::anchor() {}
57
58SystemZInstrInfo::SystemZInstrInfo(SystemZSubtarget &sti)
59 : SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP),
60 RI(), STI(sti) {
61}
62
63// MI is a 128-bit load or store. Split it into two 64-bit loads or stores,
64// each having the opcode given by NewOpcode.
65void SystemZInstrInfo::splitMove(MachineBasicBlock::iterator MI,
66 unsigned NewOpcode) const {
67 MachineBasicBlock *MBB = MI->getParent();
68 MachineFunction &MF = *MBB->getParent();
69
70 // Get two load or store instructions. Use the original instruction for one
71 // of them (arbitrarily the second here) and create a clone for the other.
72 MachineInstr *EarlierMI = MF.CloneMachineInstr(&*MI);
73 MBB->insert(MI, EarlierMI);
74
75 // Set up the two 64-bit registers and remember super reg and its flags.
76 MachineOperand &HighRegOp = EarlierMI->getOperand(0);
77 MachineOperand &LowRegOp = MI->getOperand(0);
78 Register Reg128 = LowRegOp.getReg();
79 unsigned Reg128Killed = getKillRegState(LowRegOp.isKill());
80 unsigned Reg128Undef = getUndefRegState(LowRegOp.isUndef());
81 HighRegOp.setReg(RI.getSubReg(HighRegOp.getReg(), SystemZ::subreg_h64));
82 LowRegOp.setReg(RI.getSubReg(LowRegOp.getReg(), SystemZ::subreg_l64));
83
84 if (MI->mayStore()) {
85 // Add implicit uses of the super register in case one of the subregs is
86 // undefined. We could track liveness and skip storing an undefined
87 // subreg, but this is hopefully rare (discovered with llvm-stress).
88 // If Reg128 was killed, set kill flag on MI.
89 unsigned Reg128UndefImpl = (Reg128Undef | RegState::Implicit);
90 MachineInstrBuilder(MF, EarlierMI).addReg(Reg128, Reg128UndefImpl);
91 MachineInstrBuilder(MF, MI).addReg(Reg128, (Reg128UndefImpl | Reg128Killed));
92 }
93
94 // The address in the first (high) instruction is already correct.
95 // Adjust the offset in the second (low) instruction.
96 MachineOperand &HighOffsetOp = EarlierMI->getOperand(2);
97 MachineOperand &LowOffsetOp = MI->getOperand(2);
98 LowOffsetOp.setImm(LowOffsetOp.getImm() + 8);
99
100 // Clear the kill flags on the registers in the first instruction.
101 if (EarlierMI->getOperand(0).isReg() && EarlierMI->getOperand(0).isUse())
102 EarlierMI->getOperand(0).setIsKill(false);
103 EarlierMI->getOperand(1).setIsKill(false);
104 EarlierMI->getOperand(3).setIsKill(false);
105
106 // Set the opcodes.
107 unsigned HighOpcode = getOpcodeForOffset(NewOpcode, HighOffsetOp.getImm());
108 unsigned LowOpcode = getOpcodeForOffset(NewOpcode, LowOffsetOp.getImm());
109 assert(HighOpcode && LowOpcode && "Both offsets should be in range")((HighOpcode && LowOpcode && "Both offsets should be in range"
) ? static_cast<void> (0) : __assert_fail ("HighOpcode && LowOpcode && \"Both offsets should be in range\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 109, __PRETTY_FUNCTION__))
;
110
111 EarlierMI->setDesc(get(HighOpcode));
112 MI->setDesc(get(LowOpcode));
113}
114
115// Split ADJDYNALLOC instruction MI.
116void SystemZInstrInfo::splitAdjDynAlloc(MachineBasicBlock::iterator MI) const {
117 MachineBasicBlock *MBB = MI->getParent();
118 MachineFunction &MF = *MBB->getParent();
119 MachineFrameInfo &MFFrame = MF.getFrameInfo();
120 MachineOperand &OffsetMO = MI->getOperand(2);
121
122 uint64_t Offset = (MFFrame.getMaxCallFrameSize() +
123 SystemZMC::CallFrameSize +
124 OffsetMO.getImm());
125 unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset);
126 assert(NewOpcode && "No support for huge argument lists yet")((NewOpcode && "No support for huge argument lists yet"
) ? static_cast<void> (0) : __assert_fail ("NewOpcode && \"No support for huge argument lists yet\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 126, __PRETTY_FUNCTION__))
;
127 MI->setDesc(get(NewOpcode));
128 OffsetMO.setImm(Offset);
129}
130
131// MI is an RI-style pseudo instruction. Replace it with LowOpcode
132// if the first operand is a low GR32 and HighOpcode if the first operand
133// is a high GR32. ConvertHigh is true if LowOpcode takes a signed operand
134// and HighOpcode takes an unsigned 32-bit operand. In those cases,
135// MI has the same kind of operand as LowOpcode, so needs to be converted
136// if HighOpcode is used.
137void SystemZInstrInfo::expandRIPseudo(MachineInstr &MI, unsigned LowOpcode,
138 unsigned HighOpcode,
139 bool ConvertHigh) const {
140 Register Reg = MI.getOperand(0).getReg();
141 bool IsHigh = SystemZ::isHighReg(Reg);
142 MI.setDesc(get(IsHigh ? HighOpcode : LowOpcode));
143 if (IsHigh && ConvertHigh)
144 MI.getOperand(1).setImm(uint32_t(MI.getOperand(1).getImm()));
145}
146
147// MI is a three-operand RIE-style pseudo instruction. Replace it with
148// LowOpcodeK if the registers are both low GR32s, otherwise use a move
149// followed by HighOpcode or LowOpcode, depending on whether the target
150// is a high or low GR32.
151void SystemZInstrInfo::expandRIEPseudo(MachineInstr &MI, unsigned LowOpcode,
152 unsigned LowOpcodeK,
153 unsigned HighOpcode) const {
154 Register DestReg = MI.getOperand(0).getReg();
155 Register SrcReg = MI.getOperand(1).getReg();
156 bool DestIsHigh = SystemZ::isHighReg(DestReg);
157 bool SrcIsHigh = SystemZ::isHighReg(SrcReg);
158 if (!DestIsHigh && !SrcIsHigh)
159 MI.setDesc(get(LowOpcodeK));
160 else {
161 if (DestReg != SrcReg) {
162 emitGRX32Move(*MI.getParent(), MI, MI.getDebugLoc(), DestReg, SrcReg,
163 SystemZ::LR, 32, MI.getOperand(1).isKill(),
164 MI.getOperand(1).isUndef());
165 MI.getOperand(1).setReg(DestReg);
166 }
167 MI.setDesc(get(DestIsHigh ? HighOpcode : LowOpcode));
168 MI.tieOperands(0, 1);
169 }
170}
171
172// MI is an RXY-style pseudo instruction. Replace it with LowOpcode
173// if the first operand is a low GR32 and HighOpcode if the first operand
174// is a high GR32.
175void SystemZInstrInfo::expandRXYPseudo(MachineInstr &MI, unsigned LowOpcode,
176 unsigned HighOpcode) const {
177 Register Reg = MI.getOperand(0).getReg();
178 unsigned Opcode = getOpcodeForOffset(
179 SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode,
180 MI.getOperand(2).getImm());
181 MI.setDesc(get(Opcode));
182}
183
184// MI is a load-on-condition pseudo instruction with a single register
185// (source or destination) operand. Replace it with LowOpcode if the
186// register is a low GR32 and HighOpcode if the register is a high GR32.
187void SystemZInstrInfo::expandLOCPseudo(MachineInstr &MI, unsigned LowOpcode,
188 unsigned HighOpcode) const {
189 Register Reg = MI.getOperand(0).getReg();
190 unsigned Opcode = SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode;
191 MI.setDesc(get(Opcode));
192}
193
194// MI is an RR-style pseudo instruction that zero-extends the low Size bits
195// of one GRX32 into another. Replace it with LowOpcode if both operands
196// are low registers, otherwise use RISB[LH]G.
197void SystemZInstrInfo::expandZExtPseudo(MachineInstr &MI, unsigned LowOpcode,
198 unsigned Size) const {
199 MachineInstrBuilder MIB =
200 emitGRX32Move(*MI.getParent(), MI, MI.getDebugLoc(),
201 MI.getOperand(0).getReg(), MI.getOperand(1).getReg(), LowOpcode,
202 Size, MI.getOperand(1).isKill(), MI.getOperand(1).isUndef());
203
204 // Keep the remaining operands as-is.
205 for (unsigned I = 2; I < MI.getNumOperands(); ++I)
206 MIB.add(MI.getOperand(I));
207
208 MI.eraseFromParent();
209}
210
211void SystemZInstrInfo::expandLoadStackGuard(MachineInstr *MI) const {
212 MachineBasicBlock *MBB = MI->getParent();
213 MachineFunction &MF = *MBB->getParent();
214 const Register Reg64 = MI->getOperand(0).getReg();
215 const Register Reg32 = RI.getSubReg(Reg64, SystemZ::subreg_l32);
216
217 // EAR can only load the low subregister so us a shift for %a0 to produce
218 // the GR containing %a0 and %a1.
219
220 // ear <reg>, %a0
221 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32)
222 .addReg(SystemZ::A0)
223 .addReg(Reg64, RegState::ImplicitDefine);
224
225 // sllg <reg>, <reg>, 32
226 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::SLLG), Reg64)
227 .addReg(Reg64)
228 .addReg(0)
229 .addImm(32);
230
231 // ear <reg>, %a1
232 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32)
233 .addReg(SystemZ::A1);
234
235 // lg <reg>, 40(<reg>)
236 MI->setDesc(get(SystemZ::LG));
237 MachineInstrBuilder(MF, MI).addReg(Reg64).addImm(40).addReg(0);
238}
239
240// Emit a zero-extending move from 32-bit GPR SrcReg to 32-bit GPR
241// DestReg before MBBI in MBB. Use LowLowOpcode when both DestReg and SrcReg
242// are low registers, otherwise use RISB[LH]G. Size is the number of bits
243// taken from the low end of SrcReg (8 for LLCR, 16 for LLHR and 32 for LR).
244// KillSrc is true if this move is the last use of SrcReg.
245MachineInstrBuilder
246SystemZInstrInfo::emitGRX32Move(MachineBasicBlock &MBB,
247 MachineBasicBlock::iterator MBBI,
248 const DebugLoc &DL, unsigned DestReg,
249 unsigned SrcReg, unsigned LowLowOpcode,
250 unsigned Size, bool KillSrc,
251 bool UndefSrc) const {
252 unsigned Opcode;
253 bool DestIsHigh = SystemZ::isHighReg(DestReg);
254 bool SrcIsHigh = SystemZ::isHighReg(SrcReg);
255 if (DestIsHigh && SrcIsHigh)
256 Opcode = SystemZ::RISBHH;
257 else if (DestIsHigh && !SrcIsHigh)
258 Opcode = SystemZ::RISBHL;
259 else if (!DestIsHigh && SrcIsHigh)
260 Opcode = SystemZ::RISBLH;
261 else {
262 return BuildMI(MBB, MBBI, DL, get(LowLowOpcode), DestReg)
263 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc));
264 }
265 unsigned Rotate = (DestIsHigh != SrcIsHigh ? 32 : 0);
266 return BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)
267 .addReg(DestReg, RegState::Undef)
268 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc))
269 .addImm(32 - Size).addImm(128 + 31).addImm(Rotate);
270}
271
272MachineInstr *SystemZInstrInfo::commuteInstructionImpl(MachineInstr &MI,
273 bool NewMI,
274 unsigned OpIdx1,
275 unsigned OpIdx2) const {
276 auto cloneIfNew = [NewMI](MachineInstr &MI) -> MachineInstr & {
277 if (NewMI)
278 return *MI.getParent()->getParent()->CloneMachineInstr(&MI);
279 return MI;
280 };
281
282 switch (MI.getOpcode()) {
283 case SystemZ::SELRMux:
284 case SystemZ::SELFHR:
285 case SystemZ::SELR:
286 case SystemZ::SELGR:
287 case SystemZ::LOCRMux:
288 case SystemZ::LOCFHR:
289 case SystemZ::LOCR:
290 case SystemZ::LOCGR: {
291 auto &WorkingMI = cloneIfNew(MI);
292 // Invert condition.
293 unsigned CCValid = WorkingMI.getOperand(3).getImm();
294 unsigned CCMask = WorkingMI.getOperand(4).getImm();
295 WorkingMI.getOperand(4).setImm(CCMask ^ CCValid);
296 return TargetInstrInfo::commuteInstructionImpl(WorkingMI, /*NewMI=*/false,
297 OpIdx1, OpIdx2);
298 }
299 default:
300 return TargetInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2);
301 }
302}
303
304// If MI is a simple load or store for a frame object, return the register
305// it loads or stores and set FrameIndex to the index of the frame object.
306// Return 0 otherwise.
307//
308// Flag is SimpleBDXLoad for loads and SimpleBDXStore for stores.
309static int isSimpleMove(const MachineInstr &MI, int &FrameIndex,
310 unsigned Flag) {
311 const MCInstrDesc &MCID = MI.getDesc();
312 if ((MCID.TSFlags & Flag) && MI.getOperand(1).isFI() &&
313 MI.getOperand(2).getImm() == 0 && MI.getOperand(3).getReg() == 0) {
314 FrameIndex = MI.getOperand(1).getIndex();
315 return MI.getOperand(0).getReg();
316 }
317 return 0;
318}
319
320unsigned SystemZInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
321 int &FrameIndex) const {
322 return isSimpleMove(MI, FrameIndex, SystemZII::SimpleBDXLoad);
323}
324
325unsigned SystemZInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
326 int &FrameIndex) const {
327 return isSimpleMove(MI, FrameIndex, SystemZII::SimpleBDXStore);
328}
329
330bool SystemZInstrInfo::isStackSlotCopy(const MachineInstr &MI,
331 int &DestFrameIndex,
332 int &SrcFrameIndex) const {
333 // Check for MVC 0(Length,FI1),0(FI2)
334 const MachineFrameInfo &MFI = MI.getParent()->getParent()->getFrameInfo();
335 if (MI.getOpcode() != SystemZ::MVC || !MI.getOperand(0).isFI() ||
336 MI.getOperand(1).getImm() != 0 || !MI.getOperand(3).isFI() ||
337 MI.getOperand(4).getImm() != 0)
338 return false;
339
340 // Check that Length covers the full slots.
341 int64_t Length = MI.getOperand(2).getImm();
342 unsigned FI1 = MI.getOperand(0).getIndex();
343 unsigned FI2 = MI.getOperand(3).getIndex();
344 if (MFI.getObjectSize(FI1) != Length ||
345 MFI.getObjectSize(FI2) != Length)
346 return false;
347
348 DestFrameIndex = FI1;
349 SrcFrameIndex = FI2;
350 return true;
351}
352
353bool SystemZInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
354 MachineBasicBlock *&TBB,
355 MachineBasicBlock *&FBB,
356 SmallVectorImpl<MachineOperand> &Cond,
357 bool AllowModify) const {
358 // Most of the code and comments here are boilerplate.
359
360 // Start from the bottom of the block and work up, examining the
361 // terminator instructions.
362 MachineBasicBlock::iterator I = MBB.end();
363 while (I != MBB.begin()) {
364 --I;
365 if (I->isDebugInstr())
366 continue;
367
368 // Working from the bottom, when we see a non-terminator instruction, we're
369 // done.
370 if (!isUnpredicatedTerminator(*I))
371 break;
372
373 // A terminator that isn't a branch can't easily be handled by this
374 // analysis.
375 if (!I->isBranch())
376 return true;
377
378 // Can't handle indirect branches.
379 SystemZII::Branch Branch(getBranchInfo(*I));
380 if (!Branch.hasMBBTarget())
381 return true;
382
383 // Punt on compound branches.
384 if (Branch.Type != SystemZII::BranchNormal)
385 return true;
386
387 if (Branch.CCMask == SystemZ::CCMASK_ANY) {
388 // Handle unconditional branches.
389 if (!AllowModify) {
390 TBB = Branch.getMBBTarget();
391 continue;
392 }
393
394 // If the block has any instructions after a JMP, delete them.
395 while (std::next(I) != MBB.end())
396 std::next(I)->eraseFromParent();
397
398 Cond.clear();
399 FBB = nullptr;
400
401 // Delete the JMP if it's equivalent to a fall-through.
402 if (MBB.isLayoutSuccessor(Branch.getMBBTarget())) {
403 TBB = nullptr;
404 I->eraseFromParent();
405 I = MBB.end();
406 continue;
407 }
408
409 // TBB is used to indicate the unconditinal destination.
410 TBB = Branch.getMBBTarget();
411 continue;
412 }
413
414 // Working from the bottom, handle the first conditional branch.
415 if (Cond.empty()) {
416 // FIXME: add X86-style branch swap
417 FBB = TBB;
418 TBB = Branch.getMBBTarget();
419 Cond.push_back(MachineOperand::CreateImm(Branch.CCValid));
420 Cond.push_back(MachineOperand::CreateImm(Branch.CCMask));
421 continue;
422 }
423
424 // Handle subsequent conditional branches.
425 assert(Cond.size() == 2 && TBB && "Should have seen a conditional branch")((Cond.size() == 2 && TBB && "Should have seen a conditional branch"
) ? static_cast<void> (0) : __assert_fail ("Cond.size() == 2 && TBB && \"Should have seen a conditional branch\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 425, __PRETTY_FUNCTION__))
;
426
427 // Only handle the case where all conditional branches branch to the same
428 // destination.
429 if (TBB != Branch.getMBBTarget())
430 return true;
431
432 // If the conditions are the same, we can leave them alone.
433 unsigned OldCCValid = Cond[0].getImm();
434 unsigned OldCCMask = Cond[1].getImm();
435 if (OldCCValid == Branch.CCValid && OldCCMask == Branch.CCMask)
436 continue;
437
438 // FIXME: Try combining conditions like X86 does. Should be easy on Z!
439 return false;
440 }
441
442 return false;
443}
444
445unsigned SystemZInstrInfo::removeBranch(MachineBasicBlock &MBB,
446 int *BytesRemoved) const {
447 assert(!BytesRemoved && "code size not handled")((!BytesRemoved && "code size not handled") ? static_cast
<void> (0) : __assert_fail ("!BytesRemoved && \"code size not handled\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 447, __PRETTY_FUNCTION__))
;
448
449 // Most of the code and comments here are boilerplate.
450 MachineBasicBlock::iterator I = MBB.end();
451 unsigned Count = 0;
452
453 while (I != MBB.begin()) {
454 --I;
455 if (I->isDebugInstr())
456 continue;
457 if (!I->isBranch())
458 break;
459 if (!getBranchInfo(*I).hasMBBTarget())
460 break;
461 // Remove the branch.
462 I->eraseFromParent();
463 I = MBB.end();
464 ++Count;
465 }
466
467 return Count;
468}
469
470bool SystemZInstrInfo::
471reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
472 assert(Cond.size() == 2 && "Invalid condition")((Cond.size() == 2 && "Invalid condition") ? static_cast
<void> (0) : __assert_fail ("Cond.size() == 2 && \"Invalid condition\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 472, __PRETTY_FUNCTION__))
;
473 Cond[1].setImm(Cond[1].getImm() ^ Cond[0].getImm());
474 return false;
475}
476
477unsigned SystemZInstrInfo::insertBranch(MachineBasicBlock &MBB,
478 MachineBasicBlock *TBB,
479 MachineBasicBlock *FBB,
480 ArrayRef<MachineOperand> Cond,
481 const DebugLoc &DL,
482 int *BytesAdded) const {
483 // In this function we output 32-bit branches, which should always
484 // have enough range. They can be shortened and relaxed by later code
485 // in the pipeline, if desired.
486
487 // Shouldn't be a fall through.
488 assert(TBB && "insertBranch must not be told to insert a fallthrough")((TBB && "insertBranch must not be told to insert a fallthrough"
) ? static_cast<void> (0) : __assert_fail ("TBB && \"insertBranch must not be told to insert a fallthrough\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 488, __PRETTY_FUNCTION__))
;
489 assert((Cond.size() == 2 || Cond.size() == 0) &&(((Cond.size() == 2 || Cond.size() == 0) && "SystemZ branch conditions have one component!"
) ? static_cast<void> (0) : __assert_fail ("(Cond.size() == 2 || Cond.size() == 0) && \"SystemZ branch conditions have one component!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 490, __PRETTY_FUNCTION__))
490 "SystemZ branch conditions have one component!")(((Cond.size() == 2 || Cond.size() == 0) && "SystemZ branch conditions have one component!"
) ? static_cast<void> (0) : __assert_fail ("(Cond.size() == 2 || Cond.size() == 0) && \"SystemZ branch conditions have one component!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 490, __PRETTY_FUNCTION__))
;
491 assert(!BytesAdded && "code size not handled")((!BytesAdded && "code size not handled") ? static_cast
<void> (0) : __assert_fail ("!BytesAdded && \"code size not handled\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 491, __PRETTY_FUNCTION__))
;
492
493 if (Cond.empty()) {
494 // Unconditional branch?
495 assert(!FBB && "Unconditional branch with multiple successors!")((!FBB && "Unconditional branch with multiple successors!"
) ? static_cast<void> (0) : __assert_fail ("!FBB && \"Unconditional branch with multiple successors!\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 495, __PRETTY_FUNCTION__))
;
496 BuildMI(&MBB, DL, get(SystemZ::J)).addMBB(TBB);
497 return 1;
498 }
499
500 // Conditional branch.
501 unsigned Count = 0;
502 unsigned CCValid = Cond[0].getImm();
503 unsigned CCMask = Cond[1].getImm();
504 BuildMI(&MBB, DL, get(SystemZ::BRC))
505 .addImm(CCValid).addImm(CCMask).addMBB(TBB);
506 ++Count;
507
508 if (FBB) {
509 // Two-way Conditional branch. Insert the second branch.
510 BuildMI(&MBB, DL, get(SystemZ::J)).addMBB(FBB);
511 ++Count;
512 }
513 return Count;
514}
515
516bool SystemZInstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
517 unsigned &SrcReg2, int &Mask,
518 int &Value) const {
519 assert(MI.isCompare() && "Caller should have checked for a comparison")((MI.isCompare() && "Caller should have checked for a comparison"
) ? static_cast<void> (0) : __assert_fail ("MI.isCompare() && \"Caller should have checked for a comparison\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 519, __PRETTY_FUNCTION__))
;
520
521 if (MI.getNumExplicitOperands() == 2 && MI.getOperand(0).isReg() &&
522 MI.getOperand(1).isImm()) {
523 SrcReg = MI.getOperand(0).getReg();
524 SrcReg2 = 0;
525 Value = MI.getOperand(1).getImm();
526 Mask = ~0;
527 return true;
528 }
529
530 return false;
531}
532
533bool SystemZInstrInfo::canInsertSelect(const MachineBasicBlock &MBB,
534 ArrayRef<MachineOperand> Pred,
535 unsigned TrueReg, unsigned FalseReg,
536 int &CondCycles, int &TrueCycles,
537 int &FalseCycles) const {
538 // Not all subtargets have LOCR instructions.
539 if (!STI.hasLoadStoreOnCond())
540 return false;
541 if (Pred.size() != 2)
542 return false;
543
544 // Check register classes.
545 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
546 const TargetRegisterClass *RC =
547 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));
548 if (!RC)
549 return false;
550
551 // We have LOCR instructions for 32 and 64 bit general purpose registers.
552 if ((STI.hasLoadStoreOnCond2() &&
553 SystemZ::GRX32BitRegClass.hasSubClassEq(RC)) ||
554 SystemZ::GR32BitRegClass.hasSubClassEq(RC) ||
555 SystemZ::GR64BitRegClass.hasSubClassEq(RC)) {
556 CondCycles = 2;
557 TrueCycles = 2;
558 FalseCycles = 2;
559 return true;
560 }
561
562 // Can't do anything else.
563 return false;
564}
565
566void SystemZInstrInfo::insertSelect(MachineBasicBlock &MBB,
567 MachineBasicBlock::iterator I,
568 const DebugLoc &DL, unsigned DstReg,
569 ArrayRef<MachineOperand> Pred,
570 unsigned TrueReg,
571 unsigned FalseReg) const {
572 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
573 const TargetRegisterClass *RC = MRI.getRegClass(DstReg);
574
575 assert(Pred.size() == 2 && "Invalid condition")((Pred.size() == 2 && "Invalid condition") ? static_cast
<void> (0) : __assert_fail ("Pred.size() == 2 && \"Invalid condition\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 575, __PRETTY_FUNCTION__))
;
576 unsigned CCValid = Pred[0].getImm();
577 unsigned CCMask = Pred[1].getImm();
578
579 unsigned Opc;
580 if (SystemZ::GRX32BitRegClass.hasSubClassEq(RC)) {
581 if (STI.hasMiscellaneousExtensions3())
582 Opc = SystemZ::SELRMux;
583 else if (STI.hasLoadStoreOnCond2())
584 Opc = SystemZ::LOCRMux;
585 else {
586 Opc = SystemZ::LOCR;
587 MRI.constrainRegClass(DstReg, &SystemZ::GR32BitRegClass);
588 Register TReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass);
589 Register FReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass);
590 BuildMI(MBB, I, DL, get(TargetOpcode::COPY), TReg).addReg(TrueReg);
591 BuildMI(MBB, I, DL, get(TargetOpcode::COPY), FReg).addReg(FalseReg);
592 TrueReg = TReg;
593 FalseReg = FReg;
594 }
595 } else if (SystemZ::GR64BitRegClass.hasSubClassEq(RC)) {
596 if (STI.hasMiscellaneousExtensions3())
597 Opc = SystemZ::SELGR;
598 else
599 Opc = SystemZ::LOCGR;
600 } else
601 llvm_unreachable("Invalid register class")::llvm::llvm_unreachable_internal("Invalid register class", "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 601)
;
602
603 BuildMI(MBB, I, DL, get(Opc), DstReg)
604 .addReg(FalseReg).addReg(TrueReg)
605 .addImm(CCValid).addImm(CCMask);
606}
607
608bool SystemZInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
609 unsigned Reg,
610 MachineRegisterInfo *MRI) const {
611 unsigned DefOpc = DefMI.getOpcode();
612 if (DefOpc != SystemZ::LHIMux && DefOpc != SystemZ::LHI &&
613 DefOpc != SystemZ::LGHI)
614 return false;
615 if (DefMI.getOperand(0).getReg() != Reg)
616 return false;
617 int32_t ImmVal = (int32_t)DefMI.getOperand(1).getImm();
618
619 unsigned UseOpc = UseMI.getOpcode();
620 unsigned NewUseOpc;
621 unsigned UseIdx;
622 int CommuteIdx = -1;
623 bool TieOps = false;
624 switch (UseOpc) {
625 case SystemZ::SELRMux:
626 TieOps = true;
627 LLVM_FALLTHROUGH[[gnu::fallthrough]];
628 case SystemZ::LOCRMux:
629 if (!STI.hasLoadStoreOnCond2())
630 return false;
631 NewUseOpc = SystemZ::LOCHIMux;
632 if (UseMI.getOperand(2).getReg() == Reg)
633 UseIdx = 2;
634 else if (UseMI.getOperand(1).getReg() == Reg)
635 UseIdx = 2, CommuteIdx = 1;
636 else
637 return false;
638 break;
639 case SystemZ::SELGR:
640 TieOps = true;
641 LLVM_FALLTHROUGH[[gnu::fallthrough]];
642 case SystemZ::LOCGR:
643 if (!STI.hasLoadStoreOnCond2())
644 return false;
645 NewUseOpc = SystemZ::LOCGHI;
646 if (UseMI.getOperand(2).getReg() == Reg)
647 UseIdx = 2;
648 else if (UseMI.getOperand(1).getReg() == Reg)
649 UseIdx = 2, CommuteIdx = 1;
650 else
651 return false;
652 break;
653 default:
654 return false;
655 }
656
657 if (CommuteIdx != -1)
658 if (!commuteInstruction(UseMI, false, CommuteIdx, UseIdx))
659 return false;
660
661 bool DeleteDef = MRI->hasOneNonDBGUse(Reg);
662 UseMI.setDesc(get(NewUseOpc));
663 if (TieOps)
664 UseMI.tieOperands(0, 1);
665 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal);
666 if (DeleteDef)
667 DefMI.eraseFromParent();
668
669 return true;
670}
671
672bool SystemZInstrInfo::isPredicable(const MachineInstr &MI) const {
673 unsigned Opcode = MI.getOpcode();
674 if (Opcode == SystemZ::Return ||
675 Opcode == SystemZ::Trap ||
676 Opcode == SystemZ::CallJG ||
677 Opcode == SystemZ::CallBR)
678 return true;
679 return false;
680}
681
682bool SystemZInstrInfo::
683isProfitableToIfCvt(MachineBasicBlock &MBB,
684 unsigned NumCycles, unsigned ExtraPredCycles,
685 BranchProbability Probability) const {
686 // Avoid using conditional returns at the end of a loop (since then
687 // we'd need to emit an unconditional branch to the beginning anyway,
688 // making the loop body longer). This doesn't apply for low-probability
689 // loops (eg. compare-and-swap retry), so just decide based on branch
690 // probability instead of looping structure.
691 // However, since Compare and Trap instructions cost the same as a regular
692 // Compare instruction, we should allow the if conversion to convert this
693 // into a Conditional Compare regardless of the branch probability.
694 if (MBB.getLastNonDebugInstr()->getOpcode() != SystemZ::Trap &&
695 MBB.succ_empty() && Probability < BranchProbability(1, 8))
696 return false;
697 // For now only convert single instructions.
698 return NumCycles == 1;
699}
700
701bool SystemZInstrInfo::
702isProfitableToIfCvt(MachineBasicBlock &TMBB,
703 unsigned NumCyclesT, unsigned ExtraPredCyclesT,
704 MachineBasicBlock &FMBB,
705 unsigned NumCyclesF, unsigned ExtraPredCyclesF,
706 BranchProbability Probability) const {
707 // For now avoid converting mutually-exclusive cases.
708 return false;
709}
710
711bool SystemZInstrInfo::
712isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
713 BranchProbability Probability) const {
714 // For now only duplicate single instructions.
715 return NumCycles == 1;
716}
717
718bool SystemZInstrInfo::PredicateInstruction(
719 MachineInstr &MI, ArrayRef<MachineOperand> Pred) const {
720 assert(Pred.size() == 2 && "Invalid condition")((Pred.size() == 2 && "Invalid condition") ? static_cast
<void> (0) : __assert_fail ("Pred.size() == 2 && \"Invalid condition\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 720, __PRETTY_FUNCTION__))
;
721 unsigned CCValid = Pred[0].getImm();
722 unsigned CCMask = Pred[1].getImm();
723 assert(CCMask > 0 && CCMask < 15 && "Invalid predicate")((CCMask > 0 && CCMask < 15 && "Invalid predicate"
) ? static_cast<void> (0) : __assert_fail ("CCMask > 0 && CCMask < 15 && \"Invalid predicate\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 723, __PRETTY_FUNCTION__))
;
724 unsigned Opcode = MI.getOpcode();
725 if (Opcode == SystemZ::Trap) {
726 MI.setDesc(get(SystemZ::CondTrap));
727 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
728 .addImm(CCValid).addImm(CCMask)
729 .addReg(SystemZ::CC, RegState::Implicit);
730 return true;
731 }
732 if (Opcode == SystemZ::Return) {
733 MI.setDesc(get(SystemZ::CondReturn));
734 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
735 .addImm(CCValid).addImm(CCMask)
736 .addReg(SystemZ::CC, RegState::Implicit);
737 return true;
738 }
739 if (Opcode == SystemZ::CallJG) {
740 MachineOperand FirstOp = MI.getOperand(0);
741 const uint32_t *RegMask = MI.getOperand(1).getRegMask();
742 MI.RemoveOperand(1);
743 MI.RemoveOperand(0);
744 MI.setDesc(get(SystemZ::CallBRCL));
745 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
746 .addImm(CCValid)
747 .addImm(CCMask)
748 .add(FirstOp)
749 .addRegMask(RegMask)
750 .addReg(SystemZ::CC, RegState::Implicit);
751 return true;
752 }
753 if (Opcode == SystemZ::CallBR) {
754 const uint32_t *RegMask = MI.getOperand(0).getRegMask();
755 MI.RemoveOperand(0);
756 MI.setDesc(get(SystemZ::CallBCR));
757 MachineInstrBuilder(*MI.getParent()->getParent(), MI)
758 .addImm(CCValid).addImm(CCMask)
759 .addRegMask(RegMask)
760 .addReg(SystemZ::CC, RegState::Implicit);
761 return true;
762 }
763 return false;
764}
765
766void SystemZInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
767 MachineBasicBlock::iterator MBBI,
768 const DebugLoc &DL, MCRegister DestReg,
769 MCRegister SrcReg, bool KillSrc) const {
770 // Split 128-bit GPR moves into two 64-bit moves. Add implicit uses of the
771 // super register in case one of the subregs is undefined.
772 // This handles ADDR128 too.
773 if (SystemZ::GR128BitRegClass.contains(DestReg, SrcReg)) {
774 copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_h64),
775 RI.getSubReg(SrcReg, SystemZ::subreg_h64), KillSrc);
776 MachineInstrBuilder(*MBB.getParent(), std::prev(MBBI))
777 .addReg(SrcReg, RegState::Implicit);
778 copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_l64),
779 RI.getSubReg(SrcReg, SystemZ::subreg_l64), KillSrc);
780 MachineInstrBuilder(*MBB.getParent(), std::prev(MBBI))
781 .addReg(SrcReg, (getKillRegState(KillSrc) | RegState::Implicit));
782 return;
783 }
784
785 if (SystemZ::GRX32BitRegClass.contains(DestReg, SrcReg)) {
786 emitGRX32Move(MBB, MBBI, DL, DestReg, SrcReg, SystemZ::LR, 32, KillSrc,
787 false);
788 return;
789 }
790
791 // Move 128-bit floating-point values between VR128 and FP128.
792 if (SystemZ::VR128BitRegClass.contains(DestReg) &&
793 SystemZ::FP128BitRegClass.contains(SrcReg)) {
794 MCRegister SrcRegHi =
795 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_h64),
796 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
797 MCRegister SrcRegLo =
798 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_l64),
799 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
800
801 BuildMI(MBB, MBBI, DL, get(SystemZ::VMRHG), DestReg)
802 .addReg(SrcRegHi, getKillRegState(KillSrc))
803 .addReg(SrcRegLo, getKillRegState(KillSrc));
804 return;
805 }
806 if (SystemZ::FP128BitRegClass.contains(DestReg) &&
807 SystemZ::VR128BitRegClass.contains(SrcReg)) {
808 MCRegister DestRegHi =
809 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_h64),
810 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
811 MCRegister DestRegLo =
812 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_l64),
813 SystemZ::subreg_h64, &SystemZ::VR128BitRegClass);
814
815 if (DestRegHi != SrcReg)
816 copyPhysReg(MBB, MBBI, DL, DestRegHi, SrcReg, false);
817 BuildMI(MBB, MBBI, DL, get(SystemZ::VREPG), DestRegLo)
818 .addReg(SrcReg, getKillRegState(KillSrc)).addImm(1);
819 return;
820 }
821
822 // Move CC value from/to a GR32.
823 if (SrcReg == SystemZ::CC) {
824 auto MIB = BuildMI(MBB, MBBI, DL, get(SystemZ::IPM), DestReg);
825 if (KillSrc) {
826 const MachineFunction *MF = MBB.getParent();
827 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
828 MIB->addRegisterKilled(SrcReg, TRI);
829 }
830 return;
831 }
832 if (DestReg == SystemZ::CC) {
833 BuildMI(MBB, MBBI, DL, get(SystemZ::TMLH))
834 .addReg(SrcReg, getKillRegState(KillSrc))
835 .addImm(3 << (SystemZ::IPM_CC - 16));
836 return;
837 }
838
839 // Everything else needs only one instruction.
840 unsigned Opcode;
841 if (SystemZ::GR64BitRegClass.contains(DestReg, SrcReg))
842 Opcode = SystemZ::LGR;
843 else if (SystemZ::FP32BitRegClass.contains(DestReg, SrcReg))
844 // For z13 we prefer LDR over LER to avoid partial register dependencies.
845 Opcode = STI.hasVector() ? SystemZ::LDR32 : SystemZ::LER;
846 else if (SystemZ::FP64BitRegClass.contains(DestReg, SrcReg))
847 Opcode = SystemZ::LDR;
848 else if (SystemZ::FP128BitRegClass.contains(DestReg, SrcReg))
849 Opcode = SystemZ::LXR;
850 else if (SystemZ::VR32BitRegClass.contains(DestReg, SrcReg))
851 Opcode = SystemZ::VLR32;
852 else if (SystemZ::VR64BitRegClass.contains(DestReg, SrcReg))
853 Opcode = SystemZ::VLR64;
854 else if (SystemZ::VR128BitRegClass.contains(DestReg, SrcReg))
855 Opcode = SystemZ::VLR;
856 else if (SystemZ::AR32BitRegClass.contains(DestReg, SrcReg))
857 Opcode = SystemZ::CPYA;
858 else if (SystemZ::AR32BitRegClass.contains(DestReg) &&
859 SystemZ::GR32BitRegClass.contains(SrcReg))
860 Opcode = SystemZ::SAR;
861 else if (SystemZ::GR32BitRegClass.contains(DestReg) &&
862 SystemZ::AR32BitRegClass.contains(SrcReg))
863 Opcode = SystemZ::EAR;
864 else
865 llvm_unreachable("Impossible reg-to-reg copy")::llvm::llvm_unreachable_internal("Impossible reg-to-reg copy"
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 865)
;
866
867 BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)
868 .addReg(SrcReg, getKillRegState(KillSrc));
869}
870
871void SystemZInstrInfo::storeRegToStackSlot(
872 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg,
873 bool isKill, int FrameIdx, const TargetRegisterClass *RC,
874 const TargetRegisterInfo *TRI) const {
875 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
876
877 // Callers may expect a single instruction, so keep 128-bit moves
878 // together for now and lower them after register allocation.
879 unsigned LoadOpcode, StoreOpcode;
880 getLoadStoreOpcodes(RC, LoadOpcode, StoreOpcode);
881 addFrameReference(BuildMI(MBB, MBBI, DL, get(StoreOpcode))
882 .addReg(SrcReg, getKillRegState(isKill)),
883 FrameIdx);
884}
885
886void SystemZInstrInfo::loadRegFromStackSlot(
887 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg,
888 int FrameIdx, const TargetRegisterClass *RC,
889 const TargetRegisterInfo *TRI) const {
890 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
891
892 // Callers may expect a single instruction, so keep 128-bit moves
893 // together for now and lower them after register allocation.
894 unsigned LoadOpcode, StoreOpcode;
895 getLoadStoreOpcodes(RC, LoadOpcode, StoreOpcode);
896 addFrameReference(BuildMI(MBB, MBBI, DL, get(LoadOpcode), DestReg),
897 FrameIdx);
898}
899
900// Return true if MI is a simple load or store with a 12-bit displacement
901// and no index. Flag is SimpleBDXLoad for loads and SimpleBDXStore for stores.
902static bool isSimpleBD12Move(const MachineInstr *MI, unsigned Flag) {
903 const MCInstrDesc &MCID = MI->getDesc();
904 return ((MCID.TSFlags & Flag) &&
905 isUInt<12>(MI->getOperand(2).getImm()) &&
906 MI->getOperand(3).getReg() == 0);
907}
908
909namespace {
910
911struct LogicOp {
912 LogicOp() = default;
913 LogicOp(unsigned regSize, unsigned immLSB, unsigned immSize)
914 : RegSize(regSize), ImmLSB(immLSB), ImmSize(immSize) {}
915
916 explicit operator bool() const { return RegSize; }
917
918 unsigned RegSize = 0;
919 unsigned ImmLSB = 0;
920 unsigned ImmSize = 0;
921};
922
923} // end anonymous namespace
924
925static LogicOp interpretAndImmediate(unsigned Opcode) {
926 switch (Opcode) {
927 case SystemZ::NILMux: return LogicOp(32, 0, 16);
928 case SystemZ::NIHMux: return LogicOp(32, 16, 16);
929 case SystemZ::NILL64: return LogicOp(64, 0, 16);
930 case SystemZ::NILH64: return LogicOp(64, 16, 16);
931 case SystemZ::NIHL64: return LogicOp(64, 32, 16);
932 case SystemZ::NIHH64: return LogicOp(64, 48, 16);
933 case SystemZ::NIFMux: return LogicOp(32, 0, 32);
934 case SystemZ::NILF64: return LogicOp(64, 0, 32);
935 case SystemZ::NIHF64: return LogicOp(64, 32, 32);
936 default: return LogicOp();
937 }
938}
939
940static void transferDeadCC(MachineInstr *OldMI, MachineInstr *NewMI) {
941 if (OldMI->registerDefIsDead(SystemZ::CC)) {
942 MachineOperand *CCDef = NewMI->findRegisterDefOperand(SystemZ::CC);
943 if (CCDef != nullptr)
944 CCDef->setIsDead(true);
945 }
946}
947
948static void transferMIFlag(MachineInstr *OldMI, MachineInstr *NewMI,
949 MachineInstr::MIFlag Flag) {
950 if (OldMI->getFlag(Flag))
951 NewMI->setFlag(Flag);
952}
953
954MachineInstr *SystemZInstrInfo::convertToThreeAddress(
955 MachineFunction::iterator &MFI, MachineInstr &MI, LiveVariables *LV) const {
956 MachineBasicBlock *MBB = MI.getParent();
957
958 // Try to convert an AND into an RISBG-type instruction.
959 // TODO: It might be beneficial to select RISBG and shorten to AND instead.
960 if (LogicOp And = interpretAndImmediate(MI.getOpcode())) {
1
Taking true branch
961 uint64_t Imm = MI.getOperand(2).getImm() << And.ImmLSB;
962 // AND IMMEDIATE leaves the other bits of the register unchanged.
963 Imm |= allOnes(And.RegSize) & ~(allOnes(And.ImmSize) << And.ImmLSB);
964 unsigned Start, End;
965 if (isRxSBGMask(Imm, And.RegSize, Start, End)) {
2
Calling 'SystemZInstrInfo::isRxSBGMask'
966 unsigned NewOpcode;
967 if (And.RegSize == 64) {
968 NewOpcode = SystemZ::RISBG;
969 // Prefer RISBGN if available, since it does not clobber CC.
970 if (STI.hasMiscellaneousExtensions())
971 NewOpcode = SystemZ::RISBGN;
972 } else {
973 NewOpcode = SystemZ::RISBMux;
974 Start &= 31;
975 End &= 31;
976 }
977 MachineOperand &Dest = MI.getOperand(0);
978 MachineOperand &Src = MI.getOperand(1);
979 MachineInstrBuilder MIB =
980 BuildMI(*MBB, MI, MI.getDebugLoc(), get(NewOpcode))
981 .add(Dest)
982 .addReg(0)
983 .addReg(Src.getReg(), getKillRegState(Src.isKill()),
984 Src.getSubReg())
985 .addImm(Start)
986 .addImm(End + 128)
987 .addImm(0);
988 if (LV) {
989 unsigned NumOps = MI.getNumOperands();
990 for (unsigned I = 1; I < NumOps; ++I) {
991 MachineOperand &Op = MI.getOperand(I);
992 if (Op.isReg() && Op.isKill())
993 LV->replaceKillInstruction(Op.getReg(), MI, *MIB);
994 }
995 }
996 transferDeadCC(&MI, MIB);
997 return MIB;
998 }
999 }
1000 return nullptr;
1001}
1002
1003MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
1004 MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
1005 MachineBasicBlock::iterator InsertPt, int FrameIndex,
1006 LiveIntervals *LIS, VirtRegMap *VRM) const {
1007 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
1008 const MachineFrameInfo &MFI = MF.getFrameInfo();
1009 unsigned Size = MFI.getObjectSize(FrameIndex);
1010 unsigned Opcode = MI.getOpcode();
1011
1012 if (Ops.size() == 2 && Ops[0] == 0 && Ops[1] == 1) {
1013 if (LIS != nullptr && (Opcode == SystemZ::LA || Opcode == SystemZ::LAY) &&
1014 isInt<8>(MI.getOperand(2).getImm()) && !MI.getOperand(3).getReg()) {
1015
1016 // Check CC liveness, since new instruction introduces a dead
1017 // def of CC.
1018 MCRegUnitIterator CCUnit(SystemZ::CC, TRI);
1019 LiveRange &CCLiveRange = LIS->getRegUnit(*CCUnit);
1020 ++CCUnit;
1021 assert(!CCUnit.isValid() && "CC only has one reg unit.")((!CCUnit.isValid() && "CC only has one reg unit.") ?
static_cast<void> (0) : __assert_fail ("!CCUnit.isValid() && \"CC only has one reg unit.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1021, __PRETTY_FUNCTION__))
;
1022 SlotIndex MISlot =
1023 LIS->getSlotIndexes()->getInstructionIndex(MI).getRegSlot();
1024 if (!CCLiveRange.liveAt(MISlot)) {
1025 // LA(Y) %reg, CONST(%reg) -> AGSI %mem, CONST
1026 MachineInstr *BuiltMI = BuildMI(*InsertPt->getParent(), InsertPt,
1027 MI.getDebugLoc(), get(SystemZ::AGSI))
1028 .addFrameIndex(FrameIndex)
1029 .addImm(0)
1030 .addImm(MI.getOperand(2).getImm());
1031 BuiltMI->findRegisterDefOperand(SystemZ::CC)->setIsDead(true);
1032 CCLiveRange.createDeadDef(MISlot, LIS->getVNInfoAllocator());
1033 return BuiltMI;
1034 }
1035 }
1036 return nullptr;
1037 }
1038
1039 // All other cases require a single operand.
1040 if (Ops.size() != 1)
1041 return nullptr;
1042
1043 unsigned OpNum = Ops[0];
1044 assert(Size * 8 ==((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1047, __PRETTY_FUNCTION__))
1045 TRI->getRegSizeInBits(*MF.getRegInfo()((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1047, __PRETTY_FUNCTION__))
1046 .getRegClass(MI.getOperand(OpNum).getReg())) &&((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1047, __PRETTY_FUNCTION__))
1047 "Invalid size combination")((Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass
(MI.getOperand(OpNum).getReg())) && "Invalid size combination"
) ? static_cast<void> (0) : __assert_fail ("Size * 8 == TRI->getRegSizeInBits(*MF.getRegInfo() .getRegClass(MI.getOperand(OpNum).getReg())) && \"Invalid size combination\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1047, __PRETTY_FUNCTION__))
;
1048
1049 if ((Opcode == SystemZ::AHI || Opcode == SystemZ::AGHI) && OpNum == 0 &&
1050 isInt<8>(MI.getOperand(2).getImm())) {
1051 // A(G)HI %reg, CONST -> A(G)SI %mem, CONST
1052 Opcode = (Opcode == SystemZ::AHI ? SystemZ::ASI : SystemZ::AGSI);
1053 MachineInstr *BuiltMI =
1054 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1055 .addFrameIndex(FrameIndex)
1056 .addImm(0)
1057 .addImm(MI.getOperand(2).getImm());
1058 transferDeadCC(&MI, BuiltMI);
1059 transferMIFlag(&MI, BuiltMI, MachineInstr::NoSWrap);
1060 return BuiltMI;
1061 }
1062
1063 if ((Opcode == SystemZ::ALFI && OpNum == 0 &&
1064 isInt<8>((int32_t)MI.getOperand(2).getImm())) ||
1065 (Opcode == SystemZ::ALGFI && OpNum == 0 &&
1066 isInt<8>((int64_t)MI.getOperand(2).getImm()))) {
1067 // AL(G)FI %reg, CONST -> AL(G)SI %mem, CONST
1068 Opcode = (Opcode == SystemZ::ALFI ? SystemZ::ALSI : SystemZ::ALGSI);
1069 MachineInstr *BuiltMI =
1070 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1071 .addFrameIndex(FrameIndex)
1072 .addImm(0)
1073 .addImm((int8_t)MI.getOperand(2).getImm());
1074 transferDeadCC(&MI, BuiltMI);
1075 return BuiltMI;
1076 }
1077
1078 if ((Opcode == SystemZ::SLFI && OpNum == 0 &&
1079 isInt<8>((int32_t)-MI.getOperand(2).getImm())) ||
1080 (Opcode == SystemZ::SLGFI && OpNum == 0 &&
1081 isInt<8>((int64_t)-MI.getOperand(2).getImm()))) {
1082 // SL(G)FI %reg, CONST -> AL(G)SI %mem, -CONST
1083 Opcode = (Opcode == SystemZ::SLFI ? SystemZ::ALSI : SystemZ::ALGSI);
1084 MachineInstr *BuiltMI =
1085 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1086 .addFrameIndex(FrameIndex)
1087 .addImm(0)
1088 .addImm((int8_t)-MI.getOperand(2).getImm());
1089 transferDeadCC(&MI, BuiltMI);
1090 return BuiltMI;
1091 }
1092
1093 if (Opcode == SystemZ::LGDR || Opcode == SystemZ::LDGR) {
1094 bool Op0IsGPR = (Opcode == SystemZ::LGDR);
1095 bool Op1IsGPR = (Opcode == SystemZ::LDGR);
1096 // If we're spilling the destination of an LDGR or LGDR, store the
1097 // source register instead.
1098 if (OpNum == 0) {
1099 unsigned StoreOpcode = Op1IsGPR ? SystemZ::STG : SystemZ::STD;
1100 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1101 get(StoreOpcode))
1102 .add(MI.getOperand(1))
1103 .addFrameIndex(FrameIndex)
1104 .addImm(0)
1105 .addReg(0);
1106 }
1107 // If we're spilling the source of an LDGR or LGDR, load the
1108 // destination register instead.
1109 if (OpNum == 1) {
1110 unsigned LoadOpcode = Op0IsGPR ? SystemZ::LG : SystemZ::LD;
1111 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1112 get(LoadOpcode))
1113 .add(MI.getOperand(0))
1114 .addFrameIndex(FrameIndex)
1115 .addImm(0)
1116 .addReg(0);
1117 }
1118 }
1119
1120 // Look for cases where the source of a simple store or the destination
1121 // of a simple load is being spilled. Try to use MVC instead.
1122 //
1123 // Although MVC is in practice a fast choice in these cases, it is still
1124 // logically a bytewise copy. This means that we cannot use it if the
1125 // load or store is volatile. We also wouldn't be able to use MVC if
1126 // the two memories partially overlap, but that case cannot occur here,
1127 // because we know that one of the memories is a full frame index.
1128 //
1129 // For performance reasons, we also want to avoid using MVC if the addresses
1130 // might be equal. We don't worry about that case here, because spill slot
1131 // coloring happens later, and because we have special code to remove
1132 // MVCs that turn out to be redundant.
1133 if (OpNum == 0 && MI.hasOneMemOperand()) {
1134 MachineMemOperand *MMO = *MI.memoperands_begin();
1135 if (MMO->getSize() == Size && !MMO->isVolatile() && !MMO->isAtomic()) {
1136 // Handle conversion of loads.
1137 if (isSimpleBD12Move(&MI, SystemZII::SimpleBDXLoad)) {
1138 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1139 get(SystemZ::MVC))
1140 .addFrameIndex(FrameIndex)
1141 .addImm(0)
1142 .addImm(Size)
1143 .add(MI.getOperand(1))
1144 .addImm(MI.getOperand(2).getImm())
1145 .addMemOperand(MMO);
1146 }
1147 // Handle conversion of stores.
1148 if (isSimpleBD12Move(&MI, SystemZII::SimpleBDXStore)) {
1149 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1150 get(SystemZ::MVC))
1151 .add(MI.getOperand(1))
1152 .addImm(MI.getOperand(2).getImm())
1153 .addImm(Size)
1154 .addFrameIndex(FrameIndex)
1155 .addImm(0)
1156 .addMemOperand(MMO);
1157 }
1158 }
1159 }
1160
1161 // If the spilled operand is the final one or the instruction is
1162 // commutable, try to change <INSN>R into <INSN>.
1163 unsigned NumOps = MI.getNumExplicitOperands();
1164 int MemOpcode = SystemZ::getMemOpcode(Opcode);
1165
1166 // See if this is a 3-address instruction that is convertible to 2-address
1167 // and suitable for folding below. Only try this with virtual registers
1168 // and a provided VRM (during regalloc).
1169 bool NeedsCommute = false;
1170 if (SystemZ::getTwoOperandOpcode(Opcode) != -1 && MemOpcode != -1) {
1171 if (VRM == nullptr)
1172 MemOpcode = -1;
1173 else {
1174 assert(NumOps == 3 && "Expected two source registers.")((NumOps == 3 && "Expected two source registers.") ? static_cast
<void> (0) : __assert_fail ("NumOps == 3 && \"Expected two source registers.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1174, __PRETTY_FUNCTION__))
;
1175 Register DstReg = MI.getOperand(0).getReg();
1176 Register DstPhys =
1177 (Register::isVirtualRegister(DstReg) ? VRM->getPhys(DstReg) : DstReg);
1178 Register SrcReg = (OpNum == 2 ? MI.getOperand(1).getReg()
1179 : ((OpNum == 1 && MI.isCommutable())
1180 ? MI.getOperand(2).getReg()
1181 : Register()));
1182 if (DstPhys && !SystemZ::GRH32BitRegClass.contains(DstPhys) && SrcReg &&
1183 Register::isVirtualRegister(SrcReg) &&
1184 DstPhys == VRM->getPhys(SrcReg))
1185 NeedsCommute = (OpNum == 1);
1186 else
1187 MemOpcode = -1;
1188 }
1189 }
1190
1191 if (MemOpcode >= 0) {
1192 if ((OpNum == NumOps - 1) || NeedsCommute) {
1193 const MCInstrDesc &MemDesc = get(MemOpcode);
1194 uint64_t AccessBytes = SystemZII::getAccessSize(MemDesc.TSFlags);
1195 assert(AccessBytes != 0 && "Size of access should be known")((AccessBytes != 0 && "Size of access should be known"
) ? static_cast<void> (0) : __assert_fail ("AccessBytes != 0 && \"Size of access should be known\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1195, __PRETTY_FUNCTION__))
;
1196 assert(AccessBytes <= Size && "Access outside the frame index")((AccessBytes <= Size && "Access outside the frame index"
) ? static_cast<void> (0) : __assert_fail ("AccessBytes <= Size && \"Access outside the frame index\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1196, __PRETTY_FUNCTION__))
;
1197 uint64_t Offset = Size - AccessBytes;
1198 MachineInstrBuilder MIB = BuildMI(*InsertPt->getParent(), InsertPt,
1199 MI.getDebugLoc(), get(MemOpcode));
1200 MIB.add(MI.getOperand(0));
1201 if (NeedsCommute)
1202 MIB.add(MI.getOperand(2));
1203 else
1204 for (unsigned I = 1; I < OpNum; ++I)
1205 MIB.add(MI.getOperand(I));
1206 MIB.addFrameIndex(FrameIndex).addImm(Offset);
1207 if (MemDesc.TSFlags & SystemZII::HasIndex)
1208 MIB.addReg(0);
1209 transferDeadCC(&MI, MIB);
1210 transferMIFlag(&MI, MIB, MachineInstr::NoSWrap);
1211 return MIB;
1212 }
1213 }
1214
1215 return nullptr;
1216}
1217
1218MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
1219 MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
1220 MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
1221 LiveIntervals *LIS) const {
1222 return nullptr;
1223}
1224
1225bool SystemZInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
1226 switch (MI.getOpcode()) {
1227 case SystemZ::L128:
1228 splitMove(MI, SystemZ::LG);
1229 return true;
1230
1231 case SystemZ::ST128:
1232 splitMove(MI, SystemZ::STG);
1233 return true;
1234
1235 case SystemZ::LX:
1236 splitMove(MI, SystemZ::LD);
1237 return true;
1238
1239 case SystemZ::STX:
1240 splitMove(MI, SystemZ::STD);
1241 return true;
1242
1243 case SystemZ::LBMux:
1244 expandRXYPseudo(MI, SystemZ::LB, SystemZ::LBH);
1245 return true;
1246
1247 case SystemZ::LHMux:
1248 expandRXYPseudo(MI, SystemZ::LH, SystemZ::LHH);
1249 return true;
1250
1251 case SystemZ::LLCRMux:
1252 expandZExtPseudo(MI, SystemZ::LLCR, 8);
1253 return true;
1254
1255 case SystemZ::LLHRMux:
1256 expandZExtPseudo(MI, SystemZ::LLHR, 16);
1257 return true;
1258
1259 case SystemZ::LLCMux:
1260 expandRXYPseudo(MI, SystemZ::LLC, SystemZ::LLCH);
1261 return true;
1262
1263 case SystemZ::LLHMux:
1264 expandRXYPseudo(MI, SystemZ::LLH, SystemZ::LLHH);
1265 return true;
1266
1267 case SystemZ::LMux:
1268 expandRXYPseudo(MI, SystemZ::L, SystemZ::LFH);
1269 return true;
1270
1271 case SystemZ::LOCMux:
1272 expandLOCPseudo(MI, SystemZ::LOC, SystemZ::LOCFH);
1273 return true;
1274
1275 case SystemZ::LOCHIMux:
1276 expandLOCPseudo(MI, SystemZ::LOCHI, SystemZ::LOCHHI);
1277 return true;
1278
1279 case SystemZ::STCMux:
1280 expandRXYPseudo(MI, SystemZ::STC, SystemZ::STCH);
1281 return true;
1282
1283 case SystemZ::STHMux:
1284 expandRXYPseudo(MI, SystemZ::STH, SystemZ::STHH);
1285 return true;
1286
1287 case SystemZ::STMux:
1288 expandRXYPseudo(MI, SystemZ::ST, SystemZ::STFH);
1289 return true;
1290
1291 case SystemZ::STOCMux:
1292 expandLOCPseudo(MI, SystemZ::STOC, SystemZ::STOCFH);
1293 return true;
1294
1295 case SystemZ::LHIMux:
1296 expandRIPseudo(MI, SystemZ::LHI, SystemZ::IIHF, true);
1297 return true;
1298
1299 case SystemZ::IIFMux:
1300 expandRIPseudo(MI, SystemZ::IILF, SystemZ::IIHF, false);
1301 return true;
1302
1303 case SystemZ::IILMux:
1304 expandRIPseudo(MI, SystemZ::IILL, SystemZ::IIHL, false);
1305 return true;
1306
1307 case SystemZ::IIHMux:
1308 expandRIPseudo(MI, SystemZ::IILH, SystemZ::IIHH, false);
1309 return true;
1310
1311 case SystemZ::NIFMux:
1312 expandRIPseudo(MI, SystemZ::NILF, SystemZ::NIHF, false);
1313 return true;
1314
1315 case SystemZ::NILMux:
1316 expandRIPseudo(MI, SystemZ::NILL, SystemZ::NIHL, false);
1317 return true;
1318
1319 case SystemZ::NIHMux:
1320 expandRIPseudo(MI, SystemZ::NILH, SystemZ::NIHH, false);
1321 return true;
1322
1323 case SystemZ::OIFMux:
1324 expandRIPseudo(MI, SystemZ::OILF, SystemZ::OIHF, false);
1325 return true;
1326
1327 case SystemZ::OILMux:
1328 expandRIPseudo(MI, SystemZ::OILL, SystemZ::OIHL, false);
1329 return true;
1330
1331 case SystemZ::OIHMux:
1332 expandRIPseudo(MI, SystemZ::OILH, SystemZ::OIHH, false);
1333 return true;
1334
1335 case SystemZ::XIFMux:
1336 expandRIPseudo(MI, SystemZ::XILF, SystemZ::XIHF, false);
1337 return true;
1338
1339 case SystemZ::TMLMux:
1340 expandRIPseudo(MI, SystemZ::TMLL, SystemZ::TMHL, false);
1341 return true;
1342
1343 case SystemZ::TMHMux:
1344 expandRIPseudo(MI, SystemZ::TMLH, SystemZ::TMHH, false);
1345 return true;
1346
1347 case SystemZ::AHIMux:
1348 expandRIPseudo(MI, SystemZ::AHI, SystemZ::AIH, false);
1349 return true;
1350
1351 case SystemZ::AHIMuxK:
1352 expandRIEPseudo(MI, SystemZ::AHI, SystemZ::AHIK, SystemZ::AIH);
1353 return true;
1354
1355 case SystemZ::AFIMux:
1356 expandRIPseudo(MI, SystemZ::AFI, SystemZ::AIH, false);
1357 return true;
1358
1359 case SystemZ::CHIMux:
1360 expandRIPseudo(MI, SystemZ::CHI, SystemZ::CIH, false);
1361 return true;
1362
1363 case SystemZ::CFIMux:
1364 expandRIPseudo(MI, SystemZ::CFI, SystemZ::CIH, false);
1365 return true;
1366
1367 case SystemZ::CLFIMux:
1368 expandRIPseudo(MI, SystemZ::CLFI, SystemZ::CLIH, false);
1369 return true;
1370
1371 case SystemZ::CMux:
1372 expandRXYPseudo(MI, SystemZ::C, SystemZ::CHF);
1373 return true;
1374
1375 case SystemZ::CLMux:
1376 expandRXYPseudo(MI, SystemZ::CL, SystemZ::CLHF);
1377 return true;
1378
1379 case SystemZ::RISBMux: {
1380 bool DestIsHigh = SystemZ::isHighReg(MI.getOperand(0).getReg());
1381 bool SrcIsHigh = SystemZ::isHighReg(MI.getOperand(2).getReg());
1382 if (SrcIsHigh == DestIsHigh)
1383 MI.setDesc(get(DestIsHigh ? SystemZ::RISBHH : SystemZ::RISBLL));
1384 else {
1385 MI.setDesc(get(DestIsHigh ? SystemZ::RISBHL : SystemZ::RISBLH));
1386 MI.getOperand(5).setImm(MI.getOperand(5).getImm() ^ 32);
1387 }
1388 return true;
1389 }
1390
1391 case SystemZ::ADJDYNALLOC:
1392 splitAdjDynAlloc(MI);
1393 return true;
1394
1395 case TargetOpcode::LOAD_STACK_GUARD:
1396 expandLoadStackGuard(&MI);
1397 return true;
1398
1399 default:
1400 return false;
1401 }
1402}
1403
1404unsigned SystemZInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
1405 if (MI.isInlineAsm()) {
1406 const MachineFunction *MF = MI.getParent()->getParent();
1407 const char *AsmStr = MI.getOperand(0).getSymbolName();
1408 return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());
1409 }
1410 return MI.getDesc().getSize();
1411}
1412
1413SystemZII::Branch
1414SystemZInstrInfo::getBranchInfo(const MachineInstr &MI) const {
1415 switch (MI.getOpcode()) {
1416 case SystemZ::BR:
1417 case SystemZ::BI:
1418 case SystemZ::J:
1419 case SystemZ::JG:
1420 return SystemZII::Branch(SystemZII::BranchNormal, SystemZ::CCMASK_ANY,
1421 SystemZ::CCMASK_ANY, &MI.getOperand(0));
1422
1423 case SystemZ::BRC:
1424 case SystemZ::BRCL:
1425 return SystemZII::Branch(SystemZII::BranchNormal, MI.getOperand(0).getImm(),
1426 MI.getOperand(1).getImm(), &MI.getOperand(2));
1427
1428 case SystemZ::BRCT:
1429 case SystemZ::BRCTH:
1430 return SystemZII::Branch(SystemZII::BranchCT, SystemZ::CCMASK_ICMP,
1431 SystemZ::CCMASK_CMP_NE, &MI.getOperand(2));
1432
1433 case SystemZ::BRCTG:
1434 return SystemZII::Branch(SystemZII::BranchCTG, SystemZ::CCMASK_ICMP,
1435 SystemZ::CCMASK_CMP_NE, &MI.getOperand(2));
1436
1437 case SystemZ::CIJ:
1438 case SystemZ::CRJ:
1439 return SystemZII::Branch(SystemZII::BranchC, SystemZ::CCMASK_ICMP,
1440 MI.getOperand(2).getImm(), &MI.getOperand(3));
1441
1442 case SystemZ::CLIJ:
1443 case SystemZ::CLRJ:
1444 return SystemZII::Branch(SystemZII::BranchCL, SystemZ::CCMASK_ICMP,
1445 MI.getOperand(2).getImm(), &MI.getOperand(3));
1446
1447 case SystemZ::CGIJ:
1448 case SystemZ::CGRJ:
1449 return SystemZII::Branch(SystemZII::BranchCG, SystemZ::CCMASK_ICMP,
1450 MI.getOperand(2).getImm(), &MI.getOperand(3));
1451
1452 case SystemZ::CLGIJ:
1453 case SystemZ::CLGRJ:
1454 return SystemZII::Branch(SystemZII::BranchCLG, SystemZ::CCMASK_ICMP,
1455 MI.getOperand(2).getImm(), &MI.getOperand(3));
1456
1457 case SystemZ::INLINEASM_BR:
1458 // Don't try to analyze asm goto, so pass nullptr as branch target argument.
1459 return SystemZII::Branch(SystemZII::AsmGoto, 0, 0, nullptr);
1460
1461 default:
1462 llvm_unreachable("Unrecognized branch opcode")::llvm::llvm_unreachable_internal("Unrecognized branch opcode"
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1462)
;
1463 }
1464}
1465
1466void SystemZInstrInfo::getLoadStoreOpcodes(const TargetRegisterClass *RC,
1467 unsigned &LoadOpcode,
1468 unsigned &StoreOpcode) const {
1469 if (RC == &SystemZ::GR32BitRegClass || RC == &SystemZ::ADDR32BitRegClass) {
1470 LoadOpcode = SystemZ::L;
1471 StoreOpcode = SystemZ::ST;
1472 } else if (RC == &SystemZ::GRH32BitRegClass) {
1473 LoadOpcode = SystemZ::LFH;
1474 StoreOpcode = SystemZ::STFH;
1475 } else if (RC == &SystemZ::GRX32BitRegClass) {
1476 LoadOpcode = SystemZ::LMux;
1477 StoreOpcode = SystemZ::STMux;
1478 } else if (RC == &SystemZ::GR64BitRegClass ||
1479 RC == &SystemZ::ADDR64BitRegClass) {
1480 LoadOpcode = SystemZ::LG;
1481 StoreOpcode = SystemZ::STG;
1482 } else if (RC == &SystemZ::GR128BitRegClass ||
1483 RC == &SystemZ::ADDR128BitRegClass) {
1484 LoadOpcode = SystemZ::L128;
1485 StoreOpcode = SystemZ::ST128;
1486 } else if (RC == &SystemZ::FP32BitRegClass) {
1487 LoadOpcode = SystemZ::LE;
1488 StoreOpcode = SystemZ::STE;
1489 } else if (RC == &SystemZ::FP64BitRegClass) {
1490 LoadOpcode = SystemZ::LD;
1491 StoreOpcode = SystemZ::STD;
1492 } else if (RC == &SystemZ::FP128BitRegClass) {
1493 LoadOpcode = SystemZ::LX;
1494 StoreOpcode = SystemZ::STX;
1495 } else if (RC == &SystemZ::VR32BitRegClass) {
1496 LoadOpcode = SystemZ::VL32;
1497 StoreOpcode = SystemZ::VST32;
1498 } else if (RC == &SystemZ::VR64BitRegClass) {
1499 LoadOpcode = SystemZ::VL64;
1500 StoreOpcode = SystemZ::VST64;
1501 } else if (RC == &SystemZ::VF128BitRegClass ||
1502 RC == &SystemZ::VR128BitRegClass) {
1503 LoadOpcode = SystemZ::VL;
1504 StoreOpcode = SystemZ::VST;
1505 } else
1506 llvm_unreachable("Unsupported regclass to load or store")::llvm::llvm_unreachable_internal("Unsupported regclass to load or store"
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1506)
;
1507}
1508
1509unsigned SystemZInstrInfo::getOpcodeForOffset(unsigned Opcode,
1510 int64_t Offset) const {
1511 const MCInstrDesc &MCID = get(Opcode);
1512 int64_t Offset2 = (MCID.TSFlags & SystemZII::Is128Bit ? Offset + 8 : Offset);
1513 if (isUInt<12>(Offset) && isUInt<12>(Offset2)) {
1514 // Get the instruction to use for unsigned 12-bit displacements.
1515 int Disp12Opcode = SystemZ::getDisp12Opcode(Opcode);
1516 if (Disp12Opcode >= 0)
1517 return Disp12Opcode;
1518
1519 // All address-related instructions can use unsigned 12-bit
1520 // displacements.
1521 return Opcode;
1522 }
1523 if (isInt<20>(Offset) && isInt<20>(Offset2)) {
1524 // Get the instruction to use for signed 20-bit displacements.
1525 int Disp20Opcode = SystemZ::getDisp20Opcode(Opcode);
1526 if (Disp20Opcode >= 0)
1527 return Disp20Opcode;
1528
1529 // Check whether Opcode allows signed 20-bit displacements.
1530 if (MCID.TSFlags & SystemZII::Has20BitOffset)
1531 return Opcode;
1532 }
1533 return 0;
1534}
1535
1536unsigned SystemZInstrInfo::getLoadAndTest(unsigned Opcode) const {
1537 switch (Opcode) {
1538 case SystemZ::L: return SystemZ::LT;
1539 case SystemZ::LY: return SystemZ::LT;
1540 case SystemZ::LG: return SystemZ::LTG;
1541 case SystemZ::LGF: return SystemZ::LTGF;
1542 case SystemZ::LR: return SystemZ::LTR;
1543 case SystemZ::LGFR: return SystemZ::LTGFR;
1544 case SystemZ::LGR: return SystemZ::LTGR;
1545 case SystemZ::LER: return SystemZ::LTEBR;
1546 case SystemZ::LDR: return SystemZ::LTDBR;
1547 case SystemZ::LXR: return SystemZ::LTXBR;
1548 case SystemZ::LCDFR: return SystemZ::LCDBR;
1549 case SystemZ::LPDFR: return SystemZ::LPDBR;
1550 case SystemZ::LNDFR: return SystemZ::LNDBR;
1551 case SystemZ::LCDFR_32: return SystemZ::LCEBR;
1552 case SystemZ::LPDFR_32: return SystemZ::LPEBR;
1553 case SystemZ::LNDFR_32: return SystemZ::LNEBR;
1554 // On zEC12 we prefer to use RISBGN. But if there is a chance to
1555 // actually use the condition code, we may turn it back into RISGB.
1556 // Note that RISBG is not really a "load-and-test" instruction,
1557 // but sets the same condition code values, so is OK to use here.
1558 case SystemZ::RISBGN: return SystemZ::RISBG;
1559 default: return 0;
1560 }
1561}
1562
1563// Return true if Mask matches the regexp 0*1+0*, given that zero masks
1564// have already been filtered out. Store the first set bit in LSB and
1565// the number of set bits in Length if so.
1566static bool isStringOfOnes(uint64_t Mask, unsigned &LSB, unsigned &Length) {
1567 unsigned First = findFirstSet(Mask);
6
Calling 'findFirstSet<unsigned long>'
13
Returning from 'findFirstSet<unsigned long>'
14
'First' initialized to 4294967295
1568 uint64_t Top = (Mask >> First) + 1;
15
The result of the right shift is undefined due to shifting by '4294967295', which is greater or equal to the width of type 'uint64_t'
1569 if ((Top & -Top) == Top) {
1570 LSB = First;
1571 Length = findFirstSet(Top);
1572 return true;
1573 }
1574 return false;
1575}
1576
1577bool SystemZInstrInfo::isRxSBGMask(uint64_t Mask, unsigned BitSize,
1578 unsigned &Start, unsigned &End) const {
1579 // Reject trivial all-zero masks.
1580 Mask &= allOnes(BitSize);
1581 if (Mask
2.1
'Mask' is not equal to 0
2.1
'Mask' is not equal to 0
2.1
'Mask' is not equal to 0
== 0)
3
Taking false branch
1582 return false;
1583
1584 // Handle the 1+0+ or 0+1+0* cases. Start then specifies the index of
1585 // the msb and End specifies the index of the lsb.
1586 unsigned LSB, Length;
1587 if (isStringOfOnes(Mask, LSB, Length)) {
4
Taking false branch
1588 Start = 63 - (LSB + Length - 1);
1589 End = 63 - LSB;
1590 return true;
1591 }
1592
1593 // Handle the wrap-around 1+0+1+ cases. Start then specifies the msb
1594 // of the low 1s and End specifies the lsb of the high 1s.
1595 if (isStringOfOnes(Mask ^ allOnes(BitSize), LSB, Length)) {
5
Calling 'isStringOfOnes'
1596 assert(LSB > 0 && "Bottom bit must be set")((LSB > 0 && "Bottom bit must be set") ? static_cast
<void> (0) : __assert_fail ("LSB > 0 && \"Bottom bit must be set\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1596, __PRETTY_FUNCTION__))
;
1597 assert(LSB + Length < BitSize && "Top bit must be set")((LSB + Length < BitSize && "Top bit must be set")
? static_cast<void> (0) : __assert_fail ("LSB + Length < BitSize && \"Top bit must be set\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1597, __PRETTY_FUNCTION__))
;
1598 Start = 63 - (LSB - 1);
1599 End = 63 - (LSB + Length);
1600 return true;
1601 }
1602
1603 return false;
1604}
1605
1606unsigned SystemZInstrInfo::getFusedCompare(unsigned Opcode,
1607 SystemZII::FusedCompareType Type,
1608 const MachineInstr *MI) const {
1609 switch (Opcode) {
1610 case SystemZ::CHI:
1611 case SystemZ::CGHI:
1612 if (!(MI && isInt<8>(MI->getOperand(1).getImm())))
1613 return 0;
1614 break;
1615 case SystemZ::CLFI:
1616 case SystemZ::CLGFI:
1617 if (!(MI && isUInt<8>(MI->getOperand(1).getImm())))
1618 return 0;
1619 break;
1620 case SystemZ::CL:
1621 case SystemZ::CLG:
1622 if (!STI.hasMiscellaneousExtensions())
1623 return 0;
1624 if (!(MI && MI->getOperand(3).getReg() == 0))
1625 return 0;
1626 break;
1627 }
1628 switch (Type) {
1629 case SystemZII::CompareAndBranch:
1630 switch (Opcode) {
1631 case SystemZ::CR:
1632 return SystemZ::CRJ;
1633 case SystemZ::CGR:
1634 return SystemZ::CGRJ;
1635 case SystemZ::CHI:
1636 return SystemZ::CIJ;
1637 case SystemZ::CGHI:
1638 return SystemZ::CGIJ;
1639 case SystemZ::CLR:
1640 return SystemZ::CLRJ;
1641 case SystemZ::CLGR:
1642 return SystemZ::CLGRJ;
1643 case SystemZ::CLFI:
1644 return SystemZ::CLIJ;
1645 case SystemZ::CLGFI:
1646 return SystemZ::CLGIJ;
1647 default:
1648 return 0;
1649 }
1650 case SystemZII::CompareAndReturn:
1651 switch (Opcode) {
1652 case SystemZ::CR:
1653 return SystemZ::CRBReturn;
1654 case SystemZ::CGR:
1655 return SystemZ::CGRBReturn;
1656 case SystemZ::CHI:
1657 return SystemZ::CIBReturn;
1658 case SystemZ::CGHI:
1659 return SystemZ::CGIBReturn;
1660 case SystemZ::CLR:
1661 return SystemZ::CLRBReturn;
1662 case SystemZ::CLGR:
1663 return SystemZ::CLGRBReturn;
1664 case SystemZ::CLFI:
1665 return SystemZ::CLIBReturn;
1666 case SystemZ::CLGFI:
1667 return SystemZ::CLGIBReturn;
1668 default:
1669 return 0;
1670 }
1671 case SystemZII::CompareAndSibcall:
1672 switch (Opcode) {
1673 case SystemZ::CR:
1674 return SystemZ::CRBCall;
1675 case SystemZ::CGR:
1676 return SystemZ::CGRBCall;
1677 case SystemZ::CHI:
1678 return SystemZ::CIBCall;
1679 case SystemZ::CGHI:
1680 return SystemZ::CGIBCall;
1681 case SystemZ::CLR:
1682 return SystemZ::CLRBCall;
1683 case SystemZ::CLGR:
1684 return SystemZ::CLGRBCall;
1685 case SystemZ::CLFI:
1686 return SystemZ::CLIBCall;
1687 case SystemZ::CLGFI:
1688 return SystemZ::CLGIBCall;
1689 default:
1690 return 0;
1691 }
1692 case SystemZII::CompareAndTrap:
1693 switch (Opcode) {
1694 case SystemZ::CR:
1695 return SystemZ::CRT;
1696 case SystemZ::CGR:
1697 return SystemZ::CGRT;
1698 case SystemZ::CHI:
1699 return SystemZ::CIT;
1700 case SystemZ::CGHI:
1701 return SystemZ::CGIT;
1702 case SystemZ::CLR:
1703 return SystemZ::CLRT;
1704 case SystemZ::CLGR:
1705 return SystemZ::CLGRT;
1706 case SystemZ::CLFI:
1707 return SystemZ::CLFIT;
1708 case SystemZ::CLGFI:
1709 return SystemZ::CLGIT;
1710 case SystemZ::CL:
1711 return SystemZ::CLT;
1712 case SystemZ::CLG:
1713 return SystemZ::CLGT;
1714 default:
1715 return 0;
1716 }
1717 }
1718 return 0;
1719}
1720
1721unsigned SystemZInstrInfo::getLoadAndTrap(unsigned Opcode) const {
1722 if (!STI.hasLoadAndTrap())
1723 return 0;
1724 switch (Opcode) {
1725 case SystemZ::L:
1726 case SystemZ::LY:
1727 return SystemZ::LAT;
1728 case SystemZ::LG:
1729 return SystemZ::LGAT;
1730 case SystemZ::LFH:
1731 return SystemZ::LFHAT;
1732 case SystemZ::LLGF:
1733 return SystemZ::LLGFAT;
1734 case SystemZ::LLGT:
1735 return SystemZ::LLGTAT;
1736 }
1737 return 0;
1738}
1739
1740void SystemZInstrInfo::loadImmediate(MachineBasicBlock &MBB,
1741 MachineBasicBlock::iterator MBBI,
1742 unsigned Reg, uint64_t Value) const {
1743 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
1744 unsigned Opcode;
1745 if (isInt<16>(Value))
1746 Opcode = SystemZ::LGHI;
1747 else if (SystemZ::isImmLL(Value))
1748 Opcode = SystemZ::LLILL;
1749 else if (SystemZ::isImmLH(Value)) {
1750 Opcode = SystemZ::LLILH;
1751 Value >>= 16;
1752 } else {
1753 assert(isInt<32>(Value) && "Huge values not handled yet")((isInt<32>(Value) && "Huge values not handled yet"
) ? static_cast<void> (0) : __assert_fail ("isInt<32>(Value) && \"Huge values not handled yet\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp"
, 1753, __PRETTY_FUNCTION__))
;
1754 Opcode = SystemZ::LGFI;
1755 }
1756 BuildMI(MBB, MBBI, DL, get(Opcode), Reg).addImm(Value);
1757}
1758
1759bool SystemZInstrInfo::verifyInstruction(const MachineInstr &MI,
1760 StringRef &ErrInfo) const {
1761 const MCInstrDesc &MCID = MI.getDesc();
1762 for (unsigned I = 0, E = MI.getNumOperands(); I != E; ++I) {
1763 if (I >= MCID.getNumOperands())
1764 break;
1765 const MachineOperand &Op = MI.getOperand(I);
1766 const MCOperandInfo &MCOI = MCID.OpInfo[I];
1767 // Addressing modes have register and immediate operands. Op should be a
1768 // register (or frame index) operand if MCOI.RegClass contains a valid
1769 // register class, or an immediate otherwise.
1770 if (MCOI.OperandType == MCOI::OPERAND_MEMORY &&
1771 ((MCOI.RegClass != -1 && !Op.isReg() && !Op.isFI()) ||
1772 (MCOI.RegClass == -1 && !Op.isImm()))) {
1773 ErrInfo = "Addressing mode operands corrupt!";
1774 return false;
1775 }
1776 }
1777
1778 return true;
1779}
1780
1781bool SystemZInstrInfo::
1782areMemAccessesTriviallyDisjoint(const MachineInstr &MIa,
1783 const MachineInstr &MIb) const {
1784
1785 if (!MIa.hasOneMemOperand() || !MIb.hasOneMemOperand())
1786 return false;
1787
1788 // If mem-operands show that the same address Value is used by both
1789 // instructions, check for non-overlapping offsets and widths. Not
1790 // sure if a register based analysis would be an improvement...
1791
1792 MachineMemOperand *MMOa = *MIa.memoperands_begin();
1793 MachineMemOperand *MMOb = *MIb.memoperands_begin();
1794 const Value *VALa = MMOa->getValue();
1795 const Value *VALb = MMOb->getValue();
1796 bool SameVal = (VALa && VALb && (VALa == VALb));
1797 if (!SameVal) {
1798 const PseudoSourceValue *PSVa = MMOa->getPseudoValue();
1799 const PseudoSourceValue *PSVb = MMOb->getPseudoValue();
1800 if (PSVa && PSVb && (PSVa == PSVb))
1801 SameVal = true;
1802 }
1803 if (SameVal) {
1804 int OffsetA = MMOa->getOffset(), OffsetB = MMOb->getOffset();
1805 int WidthA = MMOa->getSize(), WidthB = MMOb->getSize();
1806 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB;
1807 int HighOffset = OffsetA < OffsetB ? OffsetB : OffsetA;
1808 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB;
1809 if (LowOffset + LowWidth <= HighOffset)
1810 return true;
1811 }
1812
1813 return false;
1814}

/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include/llvm/Support/MathExtras.h

1//===-- llvm/Support/MathExtras.h - Useful math functions -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains some functions that are useful for math stuff.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_SUPPORT_MATHEXTRAS_H
14#define LLVM_SUPPORT_MATHEXTRAS_H
15
16#include "llvm/Support/Compiler.h"
17#include "llvm/Support/SwapByteOrder.h"
18#include <algorithm>
19#include <cassert>
20#include <climits>
21#include <cstring>
22#include <limits>
23#include <type_traits>
24
25#ifdef __ANDROID_NDK__
26#include <android/api-level.h>
27#endif
28
29#ifdef _MSC_VER
30// Declare these intrinsics manually rather including intrin.h. It's very
31// expensive, and MathExtras.h is popular.
32// #include <intrin.h>
33extern "C" {
34unsigned char _BitScanForward(unsigned long *_Index, unsigned long _Mask);
35unsigned char _BitScanForward64(unsigned long *_Index, unsigned __int64 _Mask);
36unsigned char _BitScanReverse(unsigned long *_Index, unsigned long _Mask);
37unsigned char _BitScanReverse64(unsigned long *_Index, unsigned __int64 _Mask);
38}
39#endif
40
41namespace llvm {
42
43/// The behavior an operation has on an input of 0.
44enum ZeroBehavior {
45 /// The returned value is undefined.
46 ZB_Undefined,
47 /// The returned value is numeric_limits<T>::max()
48 ZB_Max,
49 /// The returned value is numeric_limits<T>::digits
50 ZB_Width
51};
52
53/// Mathematical constants.
54namespace numbers {
55// TODO: Track C++20 std::numbers.
56// TODO: Favor using the hexadecimal FP constants (requires C++17).
57constexpr double e = 2.7182818284590452354, // (0x1.5bf0a8b145749P+1) https://oeis.org/A001113
58 egamma = .57721566490153286061, // (0x1.2788cfc6fb619P-1) https://oeis.org/A001620
59 ln2 = .69314718055994530942, // (0x1.62e42fefa39efP-1) https://oeis.org/A002162
60 ln10 = 2.3025850929940456840, // (0x1.24bb1bbb55516P+1) https://oeis.org/A002392
61 log2e = 1.4426950408889634074, // (0x1.71547652b82feP+0)
62 log10e = .43429448190325182765, // (0x1.bcb7b1526e50eP-2)
63 pi = 3.1415926535897932385, // (0x1.921fb54442d18P+1) https://oeis.org/A000796
64 inv_pi = .31830988618379067154, // (0x1.45f306bc9c883P-2) https://oeis.org/A049541
65 sqrtpi = 1.7724538509055160273, // (0x1.c5bf891b4ef6bP+0) https://oeis.org/A002161
66 inv_sqrtpi = .56418958354775628695, // (0x1.20dd750429b6dP-1) https://oeis.org/A087197
67 sqrt2 = 1.4142135623730950488, // (0x1.6a09e667f3bcdP+0) https://oeis.org/A00219
68 inv_sqrt2 = .70710678118654752440, // (0x1.6a09e667f3bcdP-1)
69 sqrt3 = 1.7320508075688772935, // (0x1.bb67ae8584caaP+0) https://oeis.org/A002194
70 inv_sqrt3 = .57735026918962576451, // (0x1.279a74590331cP-1)
71 phi = 1.6180339887498948482; // (0x1.9e3779b97f4a8P+0) https://oeis.org/A001622
72constexpr float ef = 2.71828183F, // (0x1.5bf0a8P+1) https://oeis.org/A001113
73 egammaf = .577215665F, // (0x1.2788d0P-1) https://oeis.org/A001620
74 ln2f = .693147181F, // (0x1.62e430P-1) https://oeis.org/A002162
75 ln10f = 2.30258509F, // (0x1.26bb1cP+1) https://oeis.org/A002392
76 log2ef = 1.44269504F, // (0x1.715476P+0)
77 log10ef = .434294482F, // (0x1.bcb7b2P-2)
78 pif = 3.14159265F, // (0x1.921fb6P+1) https://oeis.org/A000796
79 inv_pif = .318309886F, // (0x1.45f306P-2) https://oeis.org/A049541
80 sqrtpif = 1.77245385F, // (0x1.c5bf8aP+0) https://oeis.org/A002161
81 inv_sqrtpif = .564189584F, // (0x1.20dd76P-1) https://oeis.org/A087197
82 sqrt2f = 1.41421356F, // (0x1.6a09e6P+0) https://oeis.org/A002193
83 inv_sqrt2f = .707106781F, // (0x1.6a09e6P-1)
84 sqrt3f = 1.73205081F, // (0x1.bb67aeP+0) https://oeis.org/A002194
85 inv_sqrt3f = .577350269F, // (0x1.279a74P-1)
86 phif = 1.61803399F; // (0x1.9e377aP+0) https://oeis.org/A001622
87} // namespace numbers
88
89namespace detail {
90template <typename T, std::size_t SizeOfT> struct TrailingZerosCounter {
91 static unsigned count(T Val, ZeroBehavior) {
92 if (!Val)
93 return std::numeric_limits<T>::digits;
94 if (Val & 0x1)
95 return 0;
96
97 // Bisection method.
98 unsigned ZeroBits = 0;
99 T Shift = std::numeric_limits<T>::digits >> 1;
100 T Mask = std::numeric_limits<T>::max() >> Shift;
101 while (Shift) {
102 if ((Val & Mask) == 0) {
103 Val >>= Shift;
104 ZeroBits |= Shift;
105 }
106 Shift >>= 1;
107 Mask >>= Shift;
108 }
109 return ZeroBits;
110 }
111};
112
113#if defined(__GNUC__4) || defined(_MSC_VER)
114template <typename T> struct TrailingZerosCounter<T, 4> {
115 static unsigned count(T Val, ZeroBehavior ZB) {
116 if (ZB != ZB_Undefined && Val == 0)
117 return 32;
118
119#if __has_builtin(__builtin_ctz)1 || defined(__GNUC__4)
120 return __builtin_ctz(Val);
121#elif defined(_MSC_VER)
122 unsigned long Index;
123 _BitScanForward(&Index, Val);
124 return Index;
125#endif
126 }
127};
128
129#if !defined(_MSC_VER) || defined(_M_X64)
130template <typename T> struct TrailingZerosCounter<T, 8> {
131 static unsigned count(T Val, ZeroBehavior ZB) {
132 if (ZB != ZB_Undefined && Val == 0)
133 return 64;
134
135#if __has_builtin(__builtin_ctzll)1 || defined(__GNUC__4)
136 return __builtin_ctzll(Val);
137#elif defined(_MSC_VER)
138 unsigned long Index;
139 _BitScanForward64(&Index, Val);
140 return Index;
141#endif
142 }
143};
144#endif
145#endif
146} // namespace detail
147
148/// Count number of 0's from the least significant bit to the most
149/// stopping at the first 1.
150///
151/// Only unsigned integral types are allowed.
152///
153/// \param ZB the behavior on an input of 0. Only ZB_Width and ZB_Undefined are
154/// valid arguments.
155template <typename T>
156unsigned countTrailingZeros(T Val, ZeroBehavior ZB = ZB_Width) {
157 static_assert(std::numeric_limits<T>::is_integer &&
158 !std::numeric_limits<T>::is_signed,
159 "Only unsigned integral types are allowed.");
160 return llvm::detail::TrailingZerosCounter<T, sizeof(T)>::count(Val, ZB);
161}
162
163namespace detail {
164template <typename T, std::size_t SizeOfT> struct LeadingZerosCounter {
165 static unsigned count(T Val, ZeroBehavior) {
166 if (!Val)
167 return std::numeric_limits<T>::digits;
168
169 // Bisection method.
170 unsigned ZeroBits = 0;
171 for (T Shift = std::numeric_limits<T>::digits >> 1; Shift; Shift >>= 1) {
172 T Tmp = Val >> Shift;
173 if (Tmp)
174 Val = Tmp;
175 else
176 ZeroBits |= Shift;
177 }
178 return ZeroBits;
179 }
180};
181
182#if defined(__GNUC__4) || defined(_MSC_VER)
183template <typename T> struct LeadingZerosCounter<T, 4> {
184 static unsigned count(T Val, ZeroBehavior ZB) {
185 if (ZB != ZB_Undefined && Val == 0)
186 return 32;
187
188#if __has_builtin(__builtin_clz)1 || defined(__GNUC__4)
189 return __builtin_clz(Val);
190#elif defined(_MSC_VER)
191 unsigned long Index;
192 _BitScanReverse(&Index, Val);
193 return Index ^ 31;
194#endif
195 }
196};
197
198#if !defined(_MSC_VER) || defined(_M_X64)
199template <typename T> struct LeadingZerosCounter<T, 8> {
200 static unsigned count(T Val, ZeroBehavior ZB) {
201 if (ZB != ZB_Undefined && Val == 0)
202 return 64;
203
204#if __has_builtin(__builtin_clzll)1 || defined(__GNUC__4)
205 return __builtin_clzll(Val);
206#elif defined(_MSC_VER)
207 unsigned long Index;
208 _BitScanReverse64(&Index, Val);
209 return Index ^ 63;
210#endif
211 }
212};
213#endif
214#endif
215} // namespace detail
216
217/// Count number of 0's from the most significant bit to the least
218/// stopping at the first 1.
219///
220/// Only unsigned integral types are allowed.
221///
222/// \param ZB the behavior on an input of 0. Only ZB_Width and ZB_Undefined are
223/// valid arguments.
224template <typename T>
225unsigned countLeadingZeros(T Val, ZeroBehavior ZB = ZB_Width) {
226 static_assert(std::numeric_limits<T>::is_integer &&
227 !std::numeric_limits<T>::is_signed,
228 "Only unsigned integral types are allowed.");
229 return llvm::detail::LeadingZerosCounter<T, sizeof(T)>::count(Val, ZB);
230}
231
232/// Get the index of the first set bit starting from the least
233/// significant bit.
234///
235/// Only unsigned integral types are allowed.
236///
237/// \param ZB the behavior on an input of 0. Only ZB_Max and ZB_Undefined are
238/// valid arguments.
239template <typename T> T findFirstSet(T Val, ZeroBehavior ZB = ZB_Max) {
240 if (ZB
6.1
'ZB' is equal to ZB_Max
6.1
'ZB' is equal to ZB_Max
6.1
'ZB' is equal to ZB_Max
== ZB_Max && Val == 0)
7
Assuming 'Val' is equal to 0
8
Taking true branch
241 return std::numeric_limits<T>::max();
9
Calling 'numeric_limits::max'
11
Returning from 'numeric_limits::max'
12
Returning the value 18446744073709551615
242
243 return countTrailingZeros(Val, ZB_Undefined);
244}
245
246/// Create a bitmask with the N right-most bits set to 1, and all other
247/// bits set to 0. Only unsigned types are allowed.
248template <typename T> T maskTrailingOnes(unsigned N) {
249 static_assert(std::is_unsigned<T>::value, "Invalid type!");
250 const unsigned Bits = CHAR_BIT8 * sizeof(T);
251 assert(N <= Bits && "Invalid bit index")((N <= Bits && "Invalid bit index") ? static_cast<
void> (0) : __assert_fail ("N <= Bits && \"Invalid bit index\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include/llvm/Support/MathExtras.h"
, 251, __PRETTY_FUNCTION__))
;
252 return N == 0 ? 0 : (T(-1) >> (Bits - N));
253}
254
255/// Create a bitmask with the N left-most bits set to 1, and all other
256/// bits set to 0. Only unsigned types are allowed.
257template <typename T> T maskLeadingOnes(unsigned N) {
258 return ~maskTrailingOnes<T>(CHAR_BIT8 * sizeof(T) - N);
259}
260
261/// Create a bitmask with the N right-most bits set to 0, and all other
262/// bits set to 1. Only unsigned types are allowed.
263template <typename T> T maskTrailingZeros(unsigned N) {
264 return maskLeadingOnes<T>(CHAR_BIT8 * sizeof(T) - N);
265}
266
267/// Create a bitmask with the N left-most bits set to 0, and all other
268/// bits set to 1. Only unsigned types are allowed.
269template <typename T> T maskLeadingZeros(unsigned N) {
270 return maskTrailingOnes<T>(CHAR_BIT8 * sizeof(T) - N);
271}
272
273/// Get the index of the last set bit starting from the least
274/// significant bit.
275///
276/// Only unsigned integral types are allowed.
277///
278/// \param ZB the behavior on an input of 0. Only ZB_Max and ZB_Undefined are
279/// valid arguments.
280template <typename T> T findLastSet(T Val, ZeroBehavior ZB = ZB_Max) {
281 if (ZB == ZB_Max && Val == 0)
282 return std::numeric_limits<T>::max();
283
284 // Use ^ instead of - because both gcc and llvm can remove the associated ^
285 // in the __builtin_clz intrinsic on x86.
286 return countLeadingZeros(Val, ZB_Undefined) ^
287 (std::numeric_limits<T>::digits - 1);
288}
289
290/// Macro compressed bit reversal table for 256 bits.
291///
292/// http://graphics.stanford.edu/~seander/bithacks.html#BitReverseTable
293static const unsigned char BitReverseTable256[256] = {
294#define R2(n) n, n + 2 * 64, n + 1 * 64, n + 3 * 64
295#define R4(n) R2(n), R2(n + 2 * 16), R2(n + 1 * 16), R2(n + 3 * 16)
296#define R6(n) R4(n), R4(n + 2 * 4), R4(n + 1 * 4), R4(n + 3 * 4)
297 R6(0), R6(2), R6(1), R6(3)
298#undef R2
299#undef R4
300#undef R6
301};
302
303/// Reverse the bits in \p Val.
304template <typename T>
305T reverseBits(T Val) {
306 unsigned char in[sizeof(Val)];
307 unsigned char out[sizeof(Val)];
308 std::memcpy(in, &Val, sizeof(Val));
309 for (unsigned i = 0; i < sizeof(Val); ++i)
310 out[(sizeof(Val) - i) - 1] = BitReverseTable256[in[i]];
311 std::memcpy(&Val, out, sizeof(Val));
312 return Val;
313}
314
315// NOTE: The following support functions use the _32/_64 extensions instead of
316// type overloading so that signed and unsigned integers can be used without
317// ambiguity.
318
319/// Return the high 32 bits of a 64 bit value.
320constexpr inline uint32_t Hi_32(uint64_t Value) {
321 return static_cast<uint32_t>(Value >> 32);
322}
323
324/// Return the low 32 bits of a 64 bit value.
325constexpr inline uint32_t Lo_32(uint64_t Value) {
326 return static_cast<uint32_t>(Value);
327}
328
329/// Make a 64-bit integer from a high / low pair of 32-bit integers.
330constexpr inline uint64_t Make_64(uint32_t High, uint32_t Low) {
331 return ((uint64_t)High << 32) | (uint64_t)Low;
332}
333
334/// Checks if an integer fits into the given bit width.
335template <unsigned N> constexpr inline bool isInt(int64_t x) {
336 return N >= 64 || (-(INT64_C(1)1L<<(N-1)) <= x && x < (INT64_C(1)1L<<(N-1)));
337}
338// Template specializations to get better code for common cases.
339template <> constexpr inline bool isInt<8>(int64_t x) {
340 return static_cast<int8_t>(x) == x;
341}
342template <> constexpr inline bool isInt<16>(int64_t x) {
343 return static_cast<int16_t>(x) == x;
344}
345template <> constexpr inline bool isInt<32>(int64_t x) {
346 return static_cast<int32_t>(x) == x;
347}
348
349/// Checks if a signed integer is an N bit number shifted left by S.
350template <unsigned N, unsigned S>
351constexpr inline bool isShiftedInt(int64_t x) {
352 static_assert(
353 N > 0, "isShiftedInt<0> doesn't make sense (refers to a 0-bit number.");
354 static_assert(N + S <= 64, "isShiftedInt<N, S> with N + S > 64 is too wide.");
355 return isInt<N + S>(x) && (x % (UINT64_C(1)1UL << S) == 0);
356}
357
358/// Checks if an unsigned integer fits into the given bit width.
359///
360/// This is written as two functions rather than as simply
361///
362/// return N >= 64 || X < (UINT64_C(1) << N);
363///
364/// to keep MSVC from (incorrectly) warning on isUInt<64> that we're shifting
365/// left too many places.
366template <unsigned N>
367constexpr inline typename std::enable_if<(N < 64), bool>::type
368isUInt(uint64_t X) {
369 static_assert(N > 0, "isUInt<0> doesn't make sense");
370 return X < (UINT64_C(1)1UL << (N));
371}
372template <unsigned N>
373constexpr inline typename std::enable_if<N >= 64, bool>::type
374isUInt(uint64_t X) {
375 return true;
376}
377
378// Template specializations to get better code for common cases.
379template <> constexpr inline bool isUInt<8>(uint64_t x) {
380 return static_cast<uint8_t>(x) == x;
381}
382template <> constexpr inline bool isUInt<16>(uint64_t x) {
383 return static_cast<uint16_t>(x) == x;
384}
385template <> constexpr inline bool isUInt<32>(uint64_t x) {
386 return static_cast<uint32_t>(x) == x;
387}
388
389/// Checks if a unsigned integer is an N bit number shifted left by S.
390template <unsigned N, unsigned S>
391constexpr inline bool isShiftedUInt(uint64_t x) {
392 static_assert(
393 N > 0, "isShiftedUInt<0> doesn't make sense (refers to a 0-bit number)");
394 static_assert(N + S <= 64,
395 "isShiftedUInt<N, S> with N + S > 64 is too wide.");
396 // Per the two static_asserts above, S must be strictly less than 64. So
397 // 1 << S is not undefined behavior.
398 return isUInt<N + S>(x) && (x % (UINT64_C(1)1UL << S) == 0);
399}
400
401/// Gets the maximum value for a N-bit unsigned integer.
402inline uint64_t maxUIntN(uint64_t N) {
403 assert(N > 0 && N <= 64 && "integer width out of range")((N > 0 && N <= 64 && "integer width out of range"
) ? static_cast<void> (0) : __assert_fail ("N > 0 && N <= 64 && \"integer width out of range\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include/llvm/Support/MathExtras.h"
, 403, __PRETTY_FUNCTION__))
;
404
405 // uint64_t(1) << 64 is undefined behavior, so we can't do
406 // (uint64_t(1) << N) - 1
407 // without checking first that N != 64. But this works and doesn't have a
408 // branch.
409 return UINT64_MAX(18446744073709551615UL) >> (64 - N);
410}
411
412/// Gets the minimum value for a N-bit signed integer.
413inline int64_t minIntN(int64_t N) {
414 assert(N > 0 && N <= 64 && "integer width out of range")((N > 0 && N <= 64 && "integer width out of range"
) ? static_cast<void> (0) : __assert_fail ("N > 0 && N <= 64 && \"integer width out of range\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include/llvm/Support/MathExtras.h"
, 414, __PRETTY_FUNCTION__))
;
415
416 return -(UINT64_C(1)1UL<<(N-1));
417}
418
419/// Gets the maximum value for a N-bit signed integer.
420inline int64_t maxIntN(int64_t N) {
421 assert(N > 0 && N <= 64 && "integer width out of range")((N > 0 && N <= 64 && "integer width out of range"
) ? static_cast<void> (0) : __assert_fail ("N > 0 && N <= 64 && \"integer width out of range\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include/llvm/Support/MathExtras.h"
, 421, __PRETTY_FUNCTION__))
;
422
423 // This relies on two's complement wraparound when N == 64, so we convert to
424 // int64_t only at the very end to avoid UB.
425 return (UINT64_C(1)1UL << (N - 1)) - 1;
426}
427
428/// Checks if an unsigned integer fits into the given (dynamic) bit width.
429inline bool isUIntN(unsigned N, uint64_t x) {
430 return N >= 64 || x <= maxUIntN(N);
431}
432
433/// Checks if an signed integer fits into the given (dynamic) bit width.
434inline bool isIntN(unsigned N, int64_t x) {
435 return N >= 64 || (minIntN(N) <= x && x <= maxIntN(N));
436}
437
438/// Return true if the argument is a non-empty sequence of ones starting at the
439/// least significant bit with the remainder zero (32 bit version).
440/// Ex. isMask_32(0x0000FFFFU) == true.
441constexpr inline bool isMask_32(uint32_t Value) {
442 return Value && ((Value + 1) & Value) == 0;
443}
444
445/// Return true if the argument is a non-empty sequence of ones starting at the
446/// least significant bit with the remainder zero (64 bit version).
447constexpr inline bool isMask_64(uint64_t Value) {
448 return Value && ((Value + 1) & Value) == 0;
449}
450
451/// Return true if the argument contains a non-empty sequence of ones with the
452/// remainder zero (32 bit version.) Ex. isShiftedMask_32(0x0000FF00U) == true.
453constexpr inline bool isShiftedMask_32(uint32_t Value) {
454 return Value && isMask_32((Value - 1) | Value);
455}
456
457/// Return true if the argument contains a non-empty sequence of ones with the
458/// remainder zero (64 bit version.)
459constexpr inline bool isShiftedMask_64(uint64_t Value) {
460 return Value && isMask_64((Value - 1) | Value);
461}
462
463/// Return true if the argument is a power of two > 0.
464/// Ex. isPowerOf2_32(0x00100000U) == true (32 bit edition.)
465constexpr inline bool isPowerOf2_32(uint32_t Value) {
466 return Value && !(Value & (Value - 1));
467}
468
469/// Return true if the argument is a power of two > 0 (64 bit edition.)
470constexpr inline bool isPowerOf2_64(uint64_t Value) {
471 return Value && !(Value & (Value - 1));
472}
473
474/// Return a byte-swapped representation of the 16-bit argument.
475inline uint16_t ByteSwap_16(uint16_t Value) {
476 return sys::SwapByteOrder_16(Value);
477}
478
479/// Return a byte-swapped representation of the 32-bit argument.
480inline uint32_t ByteSwap_32(uint32_t Value) {
481 return sys::SwapByteOrder_32(Value);
482}
483
484/// Return a byte-swapped representation of the 64-bit argument.
485inline uint64_t ByteSwap_64(uint64_t Value) {
486 return sys::SwapByteOrder_64(Value);
487}
488
489/// Count the number of ones from the most significant bit to the first
490/// zero bit.
491///
492/// Ex. countLeadingOnes(0xFF0FFF00) == 8.
493/// Only unsigned integral types are allowed.
494///
495/// \param ZB the behavior on an input of all ones. Only ZB_Width and
496/// ZB_Undefined are valid arguments.
497template <typename T>
498unsigned countLeadingOnes(T Value, ZeroBehavior ZB = ZB_Width) {
499 static_assert(std::numeric_limits<T>::is_integer &&
500 !std::numeric_limits<T>::is_signed,
501 "Only unsigned integral types are allowed.");
502 return countLeadingZeros<T>(~Value, ZB);
503}
504
505/// Count the number of ones from the least significant bit to the first
506/// zero bit.
507///
508/// Ex. countTrailingOnes(0x00FF00FF) == 8.
509/// Only unsigned integral types are allowed.
510///
511/// \param ZB the behavior on an input of all ones. Only ZB_Width and
512/// ZB_Undefined are valid arguments.
513template <typename T>
514unsigned countTrailingOnes(T Value, ZeroBehavior ZB = ZB_Width) {
515 static_assert(std::numeric_limits<T>::is_integer &&
516 !std::numeric_limits<T>::is_signed,
517 "Only unsigned integral types are allowed.");
518 return countTrailingZeros<T>(~Value, ZB);
519}
520
521namespace detail {
522template <typename T, std::size_t SizeOfT> struct PopulationCounter {
523 static unsigned count(T Value) {
524 // Generic version, forward to 32 bits.
525 static_assert(SizeOfT <= 4, "Not implemented!");
526#if defined(__GNUC__4)
527 return __builtin_popcount(Value);
528#else
529 uint32_t v = Value;
530 v = v - ((v >> 1) & 0x55555555);
531 v = (v & 0x33333333) + ((v >> 2) & 0x33333333);
532 return ((v + (v >> 4) & 0xF0F0F0F) * 0x1010101) >> 24;
533#endif
534 }
535};
536
537template <typename T> struct PopulationCounter<T, 8> {
538 static unsigned count(T Value) {
539#if defined(__GNUC__4)
540 return __builtin_popcountll(Value);
541#else
542 uint64_t v = Value;
543 v = v - ((v >> 1) & 0x5555555555555555ULL);
544 v = (v & 0x3333333333333333ULL) + ((v >> 2) & 0x3333333333333333ULL);
545 v = (v + (v >> 4)) & 0x0F0F0F0F0F0F0F0FULL;
546 return unsigned((uint64_t)(v * 0x0101010101010101ULL) >> 56);
547#endif
548 }
549};
550} // namespace detail
551
552/// Count the number of set bits in a value.
553/// Ex. countPopulation(0xF000F000) = 8
554/// Returns 0 if the word is zero.
555template <typename T>
556inline unsigned countPopulation(T Value) {
557 static_assert(std::numeric_limits<T>::is_integer &&
558 !std::numeric_limits<T>::is_signed,
559 "Only unsigned integral types are allowed.");
560 return detail::PopulationCounter<T, sizeof(T)>::count(Value);
561}
562
563/// Compile time Log2.
564/// Valid only for positive powers of two.
565template <size_t kValue> constexpr inline size_t CTLog2() {
566 static_assert(kValue > 0 && llvm::isPowerOf2_64(kValue),
567 "Value is not a valid power of 2");
568 return 1 + CTLog2<kValue / 2>();
569}
570
571template <> constexpr inline size_t CTLog2<1>() { return 0; }
572
573/// Return the log base 2 of the specified value.
574inline double Log2(double Value) {
575#if defined(__ANDROID_API__) && __ANDROID_API__ < 18
576 return __builtin_log(Value) / __builtin_log(2.0);
577#else
578 return log2(Value);
579#endif
580}
581
582/// Return the floor log base 2 of the specified value, -1 if the value is zero.
583/// (32 bit edition.)
584/// Ex. Log2_32(32) == 5, Log2_32(1) == 0, Log2_32(0) == -1, Log2_32(6) == 2
585inline unsigned Log2_32(uint32_t Value) {
586 return 31 - countLeadingZeros(Value);
587}
588
589/// Return the floor log base 2 of the specified value, -1 if the value is zero.
590/// (64 bit edition.)
591inline unsigned Log2_64(uint64_t Value) {
592 return 63 - countLeadingZeros(Value);
593}
594
595/// Return the ceil log base 2 of the specified value, 32 if the value is zero.
596/// (32 bit edition).
597/// Ex. Log2_32_Ceil(32) == 5, Log2_32_Ceil(1) == 0, Log2_32_Ceil(6) == 3
598inline unsigned Log2_32_Ceil(uint32_t Value) {
599 return 32 - countLeadingZeros(Value - 1);
600}
601
602/// Return the ceil log base 2 of the specified value, 64 if the value is zero.
603/// (64 bit edition.)
604inline unsigned Log2_64_Ceil(uint64_t Value) {
605 return 64 - countLeadingZeros(Value - 1);
606}
607
608/// Return the greatest common divisor of the values using Euclid's algorithm.
609template <typename T>
610inline T greatestCommonDivisor(T A, T B) {
611 while (B) {
612 T Tmp = B;
613 B = A % B;
614 A = Tmp;
615 }
616 return A;
617}
618
619inline uint64_t GreatestCommonDivisor64(uint64_t A, uint64_t B) {
620 return greatestCommonDivisor<uint64_t>(A, B);
621}
622
623/// This function takes a 64-bit integer and returns the bit equivalent double.
624inline double BitsToDouble(uint64_t Bits) {
625 double D;
626 static_assert(sizeof(uint64_t) == sizeof(double), "Unexpected type sizes");
627 memcpy(&D, &Bits, sizeof(Bits));
628 return D;
629}
630
631/// This function takes a 32-bit integer and returns the bit equivalent float.
632inline float BitsToFloat(uint32_t Bits) {
633 float F;
634 static_assert(sizeof(uint32_t) == sizeof(float), "Unexpected type sizes");
635 memcpy(&F, &Bits, sizeof(Bits));
636 return F;
637}
638
639/// This function takes a double and returns the bit equivalent 64-bit integer.
640/// Note that copying doubles around changes the bits of NaNs on some hosts,
641/// notably x86, so this routine cannot be used if these bits are needed.
642inline uint64_t DoubleToBits(double Double) {
643 uint64_t Bits;
644 static_assert(sizeof(uint64_t) == sizeof(double), "Unexpected type sizes");
645 memcpy(&Bits, &Double, sizeof(Double));
646 return Bits;
647}
648
649/// This function takes a float and returns the bit equivalent 32-bit integer.
650/// Note that copying floats around changes the bits of NaNs on some hosts,
651/// notably x86, so this routine cannot be used if these bits are needed.
652inline uint32_t FloatToBits(float Float) {
653 uint32_t Bits;
654 static_assert(sizeof(uint32_t) == sizeof(float), "Unexpected type sizes");
655 memcpy(&Bits, &Float, sizeof(Float));
656 return Bits;
657}
658
659/// A and B are either alignments or offsets. Return the minimum alignment that
660/// may be assumed after adding the two together.
661constexpr inline uint64_t MinAlign(uint64_t A, uint64_t B) {
662 // The largest power of 2 that divides both A and B.
663 //
664 // Replace "-Value" by "1+~Value" in the following commented code to avoid
665 // MSVC warning C4146
666 // return (A | B) & -(A | B);
667 return (A | B) & (1 + ~(A | B));
668}
669
670/// Returns the next power of two (in 64-bits) that is strictly greater than A.
671/// Returns zero on overflow.
672inline uint64_t NextPowerOf2(uint64_t A) {
673 A |= (A >> 1);
674 A |= (A >> 2);
675 A |= (A >> 4);
676 A |= (A >> 8);
677 A |= (A >> 16);
678 A |= (A >> 32);
679 return A + 1;
680}
681
682/// Returns the power of two which is less than or equal to the given value.
683/// Essentially, it is a floor operation across the domain of powers of two.
684inline uint64_t PowerOf2Floor(uint64_t A) {
685 if (!A) return 0;
686 return 1ull << (63 - countLeadingZeros(A, ZB_Undefined));
687}
688
689/// Returns the power of two which is greater than or equal to the given value.
690/// Essentially, it is a ceil operation across the domain of powers of two.
691inline uint64_t PowerOf2Ceil(uint64_t A) {
692 if (!A)
693 return 0;
694 return NextPowerOf2(A - 1);
695}
696
697/// Returns the next integer (mod 2**64) that is greater than or equal to
698/// \p Value and is a multiple of \p Align. \p Align must be non-zero.
699///
700/// If non-zero \p Skew is specified, the return value will be a minimal
701/// integer that is greater than or equal to \p Value and equal to
702/// \p Align * N + \p Skew for some integer N. If \p Skew is larger than
703/// \p Align, its value is adjusted to '\p Skew mod \p Align'.
704///
705/// Examples:
706/// \code
707/// alignTo(5, 8) = 8
708/// alignTo(17, 8) = 24
709/// alignTo(~0LL, 8) = 0
710/// alignTo(321, 255) = 510
711///
712/// alignTo(5, 8, 7) = 7
713/// alignTo(17, 8, 1) = 17
714/// alignTo(~0LL, 8, 3) = 3
715/// alignTo(321, 255, 42) = 552
716/// \endcode
717inline uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew = 0) {
718 assert(Align != 0u && "Align can't be 0.")((Align != 0u && "Align can't be 0.") ? static_cast<
void> (0) : __assert_fail ("Align != 0u && \"Align can't be 0.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include/llvm/Support/MathExtras.h"
, 718, __PRETTY_FUNCTION__))
;
719 Skew %= Align;
720 return (Value + Align - 1 - Skew) / Align * Align + Skew;
721}
722
723/// Returns the next integer (mod 2**64) that is greater than or equal to
724/// \p Value and is a multiple of \c Align. \c Align must be non-zero.
725template <uint64_t Align> constexpr inline uint64_t alignTo(uint64_t Value) {
726 static_assert(Align != 0u, "Align must be non-zero");
727 return (Value + Align - 1) / Align * Align;
728}
729
730/// Returns the integer ceil(Numerator / Denominator).
731inline uint64_t divideCeil(uint64_t Numerator, uint64_t Denominator) {
732 return alignTo(Numerator, Denominator) / Denominator;
733}
734
735/// Returns the integer nearest(Numerator / Denominator).
736inline uint64_t divideNearest(uint64_t Numerator, uint64_t Denominator) {
737 return (Numerator + (Denominator / 2)) / Denominator;
738}
739
740/// Returns the largest uint64_t less than or equal to \p Value and is
741/// \p Skew mod \p Align. \p Align must be non-zero
742inline uint64_t alignDown(uint64_t Value, uint64_t Align, uint64_t Skew = 0) {
743 assert(Align != 0u && "Align can't be 0.")((Align != 0u && "Align can't be 0.") ? static_cast<
void> (0) : __assert_fail ("Align != 0u && \"Align can't be 0.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include/llvm/Support/MathExtras.h"
, 743, __PRETTY_FUNCTION__))
;
744 Skew %= Align;
745 return (Value - Skew) / Align * Align + Skew;
746}
747
748/// Sign-extend the number in the bottom B bits of X to a 32-bit integer.
749/// Requires 0 < B <= 32.
750template <unsigned B> constexpr inline int32_t SignExtend32(uint32_t X) {
751 static_assert(B > 0, "Bit width can't be 0.");
752 static_assert(B <= 32, "Bit width out of range.");
753 return int32_t(X << (32 - B)) >> (32 - B);
754}
755
756/// Sign-extend the number in the bottom B bits of X to a 32-bit integer.
757/// Requires 0 < B < 32.
758inline int32_t SignExtend32(uint32_t X, unsigned B) {
759 assert(B > 0 && "Bit width can't be 0.")((B > 0 && "Bit width can't be 0.") ? static_cast<
void> (0) : __assert_fail ("B > 0 && \"Bit width can't be 0.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include/llvm/Support/MathExtras.h"
, 759, __PRETTY_FUNCTION__))
;
760 assert(B <= 32 && "Bit width out of range.")((B <= 32 && "Bit width out of range.") ? static_cast
<void> (0) : __assert_fail ("B <= 32 && \"Bit width out of range.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include/llvm/Support/MathExtras.h"
, 760, __PRETTY_FUNCTION__))
;
761 return int32_t(X << (32 - B)) >> (32 - B);
762}
763
764/// Sign-extend the number in the bottom B bits of X to a 64-bit integer.
765/// Requires 0 < B < 64.
766template <unsigned B> constexpr inline int64_t SignExtend64(uint64_t x) {
767 static_assert(B > 0, "Bit width can't be 0.");
768 static_assert(B <= 64, "Bit width out of range.");
769 return int64_t(x << (64 - B)) >> (64 - B);
770}
771
772/// Sign-extend the number in the bottom B bits of X to a 64-bit integer.
773/// Requires 0 < B < 64.
774inline int64_t SignExtend64(uint64_t X, unsigned B) {
775 assert(B > 0 && "Bit width can't be 0.")((B > 0 && "Bit width can't be 0.") ? static_cast<
void> (0) : __assert_fail ("B > 0 && \"Bit width can't be 0.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include/llvm/Support/MathExtras.h"
, 775, __PRETTY_FUNCTION__))
;
776 assert(B <= 64 && "Bit width out of range.")((B <= 64 && "Bit width out of range.") ? static_cast
<void> (0) : __assert_fail ("B <= 64 && \"Bit width out of range.\""
, "/build/llvm-toolchain-snapshot-10~++20200112100611+7fa5290d5bd/llvm/include/llvm/Support/MathExtras.h"
, 776, __PRETTY_FUNCTION__))
;
777 return int64_t(X << (64 - B)) >> (64 - B);
778}
779
780/// Subtract two unsigned integers, X and Y, of type T and return the absolute
781/// value of the result.
782template <typename T>
783typename std::enable_if<std::is_unsigned<T>::value, T>::type
784AbsoluteDifference(T X, T Y) {
785 return std::max(X, Y) - std::min(X, Y);
786}
787
788/// Add two unsigned integers, X and Y, of type T. Clamp the result to the
789/// maximum representable value of T on overflow. ResultOverflowed indicates if
790/// the result is larger than the maximum representable value of type T.
791template <typename T>
792typename std::enable_if<std::is_unsigned<T>::value, T>::type
793SaturatingAdd(T X, T Y, bool *ResultOverflowed = nullptr) {
794 bool Dummy;
795 bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
796 // Hacker's Delight, p. 29
797 T Z = X + Y;
798 Overflowed = (Z < X || Z < Y);
799 if (Overflowed)
800 return std::numeric_limits<T>::max();
801 else
802 return Z;
803}
804
805/// Multiply two unsigned integers, X and Y, of type T. Clamp the result to the
806/// maximum representable value of T on overflow. ResultOverflowed indicates if
807/// the result is larger than the maximum representable value of type T.
808template <typename T>
809typename std::enable_if<std::is_unsigned<T>::value, T>::type
810SaturatingMultiply(T X, T Y, bool *ResultOverflowed = nullptr) {
811 bool Dummy;
812 bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
813
814 // Hacker's Delight, p. 30 has a different algorithm, but we don't use that
815 // because it fails for uint16_t (where multiplication can have undefined
816 // behavior due to promotion to int), and requires a division in addition
817 // to the multiplication.
818
819 Overflowed = false;
820
821 // Log2(Z) would be either Log2Z or Log2Z + 1.
822 // Special case: if X or Y is 0, Log2_64 gives -1, and Log2Z
823 // will necessarily be less than Log2Max as desired.
824 int Log2Z = Log2_64(X) + Log2_64(Y);
825 const T Max = std::numeric_limits<T>::max();
826 int Log2Max = Log2_64(Max);
827 if (Log2Z < Log2Max) {
828 return X * Y;
829 }
830 if (Log2Z > Log2Max) {
831 Overflowed = true;
832 return Max;
833 }
834
835 // We're going to use the top bit, and maybe overflow one
836 // bit past it. Multiply all but the bottom bit then add
837 // that on at the end.
838 T Z = (X >> 1) * Y;
839 if (Z & ~(Max >> 1)) {
840 Overflowed = true;
841 return Max;
842 }
843 Z <<= 1;
844 if (X & 1)
845 return SaturatingAdd(Z, Y, ResultOverflowed);
846
847 return Z;
848}
849
850/// Multiply two unsigned integers, X and Y, and add the unsigned integer, A to
851/// the product. Clamp the result to the maximum representable value of T on
852/// overflow. ResultOverflowed indicates if the result is larger than the
853/// maximum representable value of type T.
854template <typename T>
855typename std::enable_if<std::is_unsigned<T>::value, T>::type
856SaturatingMultiplyAdd(T X, T Y, T A, bool *ResultOverflowed = nullptr) {
857 bool Dummy;
858 bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
859
860 T Product = SaturatingMultiply(X, Y, &Overflowed);
861 if (Overflowed)
862 return Product;
863
864 return SaturatingAdd(A, Product, &Overflowed);
865}
866
867/// Use this rather than HUGE_VALF; the latter causes warnings on MSVC.
868extern const float huge_valf;
869
870
871/// Add two signed integers, computing the two's complement truncated result,
872/// returning true if overflow occured.
873template <typename T>
874typename std::enable_if<std::is_signed<T>::value, T>::type
875AddOverflow(T X, T Y, T &Result) {
876#if __has_builtin(__builtin_add_overflow)1
877 return __builtin_add_overflow(X, Y, &Result);
878#else
879 // Perform the unsigned addition.
880 using U = typename std::make_unsigned<T>::type;
881 const U UX = static_cast<U>(X);
882 const U UY = static_cast<U>(Y);
883 const U UResult = UX + UY;
884
885 // Convert to signed.
886 Result = static_cast<T>(UResult);
887
888 // Adding two positive numbers should result in a positive number.
889 if (X > 0 && Y > 0)
890 return Result <= 0;
891 // Adding two negatives should result in a negative number.
892 if (X < 0 && Y < 0)
893 return Result >= 0;
894 return false;
895#endif
896}
897
898/// Subtract two signed integers, computing the two's complement truncated
899/// result, returning true if an overflow ocurred.
900template <typename T>
901typename std::enable_if<std::is_signed<T>::value, T>::type
902SubOverflow(T X, T Y, T &Result) {
903#if __has_builtin(__builtin_sub_overflow)1
904 return __builtin_sub_overflow(X, Y, &Result);
905#else
906 // Perform the unsigned addition.
907 using U = typename std::make_unsigned<T>::type;
908 const U UX = static_cast<U>(X);
909 const U UY = static_cast<U>(Y);
910 const U UResult = UX - UY;
911
912 // Convert to signed.
913 Result = static_cast<T>(UResult);
914
915 // Subtracting a positive number from a negative results in a negative number.
916 if (X <= 0 && Y > 0)
917 return Result >= 0;
918 // Subtracting a negative number from a positive results in a positive number.
919 if (X >= 0 && Y < 0)
920 return Result <= 0;
921 return false;
922#endif
923}
924
925
926/// Multiply two signed integers, computing the two's complement truncated
927/// result, returning true if an overflow ocurred.
928template <typename T>
929typename std::enable_if<std::is_signed<T>::value, T>::type
930MulOverflow(T X, T Y, T &Result) {
931 // Perform the unsigned multiplication on absolute values.
932 using U = typename std::make_unsigned<T>::type;
933 const U UX = X < 0 ? (0 - static_cast<U>(X)) : static_cast<U>(X);
934 const U UY = Y < 0 ? (0 - static_cast<U>(Y)) : static_cast<U>(Y);
935 const U UResult = UX * UY;
936
937 // Convert to signed.
938 const bool IsNegative = (X < 0) ^ (Y < 0);
939 Result = IsNegative ? (0 - UResult) : UResult;
940
941 // If any of the args was 0, result is 0 and no overflow occurs.
942 if (UX == 0 || UY == 0)
943 return false;
944
945 // UX and UY are in [1, 2^n], where n is the number of digits.
946 // Check how the max allowed absolute value (2^n for negative, 2^(n-1) for
947 // positive) divided by an argument compares to the other.
948 if (IsNegative)
949 return UX > (static_cast<U>(std::numeric_limits<T>::max()) + U(1)) / UY;
950 else
951 return UX > (static_cast<U>(std::numeric_limits<T>::max())) / UY;
952}
953
954} // End llvm namespace
955
956#endif

/usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/limits

1// The template and inlines for the numeric_limits classes. -*- C++ -*-
2
3// Copyright (C) 1999-2016 Free Software Foundation, Inc.
4//
5// This file is part of the GNU ISO C++ Library. This library is free
6// software; you can redistribute it and/or modify it under the
7// terms of the GNU General Public License as published by the
8// Free Software Foundation; either version 3, or (at your option)
9// any later version.
10
11// This library is distributed in the hope that it will be useful,
12// but WITHOUT ANY WARRANTY; without even the implied warranty of
13// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14// GNU General Public License for more details.
15
16// Under Section 7 of GPL version 3, you are granted additional
17// permissions described in the GCC Runtime Library Exception, version
18// 3.1, as published by the Free Software Foundation.
19
20// You should have received a copy of the GNU General Public License and
21// a copy of the GCC Runtime Library Exception along with this program;
22// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
23// <http://www.gnu.org/licenses/>.
24
25/** @file include/limits
26 * This is a Standard C++ Library header.
27 */
28
29// Note: this is not a conforming implementation.
30// Written by Gabriel Dos Reis <gdr@codesourcery.com>
31
32//
33// ISO 14882:1998
34// 18.2.1
35//
36
37#ifndef _GLIBCXX_NUMERIC_LIMITS1
38#define _GLIBCXX_NUMERIC_LIMITS1 1
39
40#pragma GCC system_header
41
42#include <bits/c++config.h>
43
44//
45// The numeric_limits<> traits document implementation-defined aspects
46// of fundamental arithmetic data types (integers and floating points).
47// From Standard C++ point of view, there are 14 such types:
48// * integers
49// bool (1)
50// char, signed char, unsigned char, wchar_t (4)
51// short, unsigned short (2)
52// int, unsigned (2)
53// long, unsigned long (2)
54//
55// * floating points
56// float (1)
57// double (1)
58// long double (1)
59//
60// GNU C++ understands (where supported by the host C-library)
61// * integer
62// long long, unsigned long long (2)
63//
64// which brings us to 16 fundamental arithmetic data types in GNU C++.
65//
66//
67// Since a numeric_limits<> is a bit tricky to get right, we rely on
68// an interface composed of macros which should be defined in config/os
69// or config/cpu when they differ from the generic (read arbitrary)
70// definitions given here.
71//
72
73// These values can be overridden in the target configuration file.
74// The default values are appropriate for many 32-bit targets.
75
76// GCC only intrinsically supports modulo integral types. The only remaining
77// integral exceptional values is division by zero. Only targets that do not
78// signal division by zero in some "hard to ignore" way should use false.
79#ifndef __glibcxx_integral_trapstrue
80# define __glibcxx_integral_trapstrue true
81#endif
82
83// float
84//
85
86// Default values. Should be overridden in configuration files if necessary.
87
88#ifndef __glibcxx_float_has_denorm_loss
89# define __glibcxx_float_has_denorm_loss false
90#endif
91#ifndef __glibcxx_float_traps
92# define __glibcxx_float_traps false
93#endif
94#ifndef __glibcxx_float_tinyness_before
95# define __glibcxx_float_tinyness_before false
96#endif
97
98// double
99
100// Default values. Should be overridden in configuration files if necessary.
101
102#ifndef __glibcxx_double_has_denorm_loss
103# define __glibcxx_double_has_denorm_loss false
104#endif
105#ifndef __glibcxx_double_traps
106# define __glibcxx_double_traps false
107#endif
108#ifndef __glibcxx_double_tinyness_before
109# define __glibcxx_double_tinyness_before false
110#endif
111
112// long double
113
114// Default values. Should be overridden in configuration files if necessary.
115
116#ifndef __glibcxx_long_double_has_denorm_loss
117# define __glibcxx_long_double_has_denorm_loss false
118#endif
119#ifndef __glibcxx_long_double_traps
120# define __glibcxx_long_double_traps false
121#endif
122#ifndef __glibcxx_long_double_tinyness_before
123# define __glibcxx_long_double_tinyness_before false
124#endif
125
126// You should not need to define any macros below this point.
127
128#define __glibcxx_signed_b(T,B)((T)(-1) < 0) ((T)(-1) < 0)
129
130#define __glibcxx_min_b(T,B)(((T)(-1) < 0) ? -(((T)(-1) < 0) ? (((((T)1 << ((
B - ((T)(-1) < 0)) - 1)) - 1) << 1) + 1) : ~(T)0) - 1
: (T)0)
\
131 (__glibcxx_signed_b (T,B)((T)(-1) < 0) ? -__glibcxx_max_b (T,B)(((T)(-1) < 0) ? (((((T)1 << ((B - ((T)(-1) < 0))
- 1)) - 1) << 1) + 1) : ~(T)0)
- 1 : (T)0)
132
133#define __glibcxx_max_b(T,B)(((T)(-1) < 0) ? (((((T)1 << ((B - ((T)(-1) < 0))
- 1)) - 1) << 1) + 1) : ~(T)0)
\
134 (__glibcxx_signed_b (T,B)((T)(-1) < 0) ? \
135 (((((T)1 << (__glibcxx_digits_b (T,B)(B - ((T)(-1) < 0)) - 1)) - 1) << 1) + 1) : ~(T)0)
136
137#define __glibcxx_digits_b(T,B)(B - ((T)(-1) < 0)) \
138 (B - __glibcxx_signed_b (T,B)((T)(-1) < 0))
139
140// The fraction 643/2136 approximates log10(2) to 7 significant digits.
141#define __glibcxx_digits10_b(T,B)((B - ((T)(-1) < 0)) * 643L / 2136) \
142 (__glibcxx_digits_b (T,B)(B - ((T)(-1) < 0)) * 643L / 2136)
143
144#define __glibcxx_signed(T) \
145 __glibcxx_signed_b (T, sizeof(T) * __CHAR_BIT__)((T)(-1) < 0)
146#define __glibcxx_min(T) \
147 __glibcxx_min_b (T, sizeof(T) * __CHAR_BIT__)(((T)(-1) < 0) ? -(((T)(-1) < 0) ? (((((T)1 << ((
sizeof(T) * 8 - ((T)(-1) < 0)) - 1)) - 1) << 1) + 1)
: ~(T)0) - 1 : (T)0)
148#define __glibcxx_max(T) \
149 __glibcxx_max_b (T, sizeof(T) * __CHAR_BIT__)(((T)(-1) < 0) ? (((((T)1 << ((sizeof(T) * 8 - ((T)(
-1) < 0)) - 1)) - 1) << 1) + 1) : ~(T)0)
150#define __glibcxx_digits(T) \
151 __glibcxx_digits_b (T, sizeof(T) * __CHAR_BIT__)(sizeof(T) * 8 - ((T)(-1) < 0))
152#define __glibcxx_digits10(T) \
153 __glibcxx_digits10_b (T, sizeof(T) * __CHAR_BIT__)((sizeof(T) * 8 - ((T)(-1) < 0)) * 643L / 2136)
154
155#define __glibcxx_max_digits10(T) \
156 (2 + (T) * 643L / 2136)
157
158namespace std _GLIBCXX_VISIBILITY(default)__attribute__ ((__visibility__ ("default")))
159{
160_GLIBCXX_BEGIN_NAMESPACE_VERSION
161
162 /**
163 * @brief Describes the rounding style for floating-point types.
164 *
165 * This is used in the std::numeric_limits class.
166 */
167 enum float_round_style
168 {
169 round_indeterminate = -1, /// Intermediate.
170 round_toward_zero = 0, /// To zero.
171 round_to_nearest = 1, /// To the nearest representable value.
172 round_toward_infinity = 2, /// To infinity.
173 round_toward_neg_infinity = 3 /// To negative infinity.
174 };
175
176 /**
177 * @brief Describes the denormalization for floating-point types.
178 *
179 * These values represent the presence or absence of a variable number
180 * of exponent bits. This type is used in the std::numeric_limits class.
181 */
182 enum float_denorm_style
183 {
184 /// Indeterminate at compile time whether denormalized values are allowed.
185 denorm_indeterminate = -1,
186 /// The type does not allow denormalized values.
187 denorm_absent = 0,
188 /// The type allows denormalized values.
189 denorm_present = 1
190 };
191
192 /**
193 * @brief Part of std::numeric_limits.
194 *
195 * The @c static @c const members are usable as integral constant
196 * expressions.
197 *
198 * @note This is a separate class for purposes of efficiency; you
199 * should only access these members as part of an instantiation
200 * of the std::numeric_limits class.
201 */
202 struct __numeric_limits_base
203 {
204 /** This will be true for all fundamental types (which have
205 specializations), and false for everything else. */
206 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = false;
207
208 /** The number of @c radix digits that be represented without change: for
209 integer types, the number of non-sign bits in the mantissa; for
210 floating types, the number of @c radix digits in the mantissa. */
211 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = 0;
212
213 /** The number of base 10 digits that can be represented without change. */
214 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = 0;
215
216#if __cplusplus201402L >= 201103L
217 /** The number of base 10 digits required to ensure that values which
218 differ are always differentiated. */
219 static constexpr int max_digits10 = 0;
220#endif
221
222 /** True if the type is signed. */
223 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
224
225 /** True if the type is integer. */
226 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
227
228 /** True if the type uses an exact representation. All integer types are
229 exact, but not all exact types are integer. For example, rational and
230 fixed-exponent representations are exact but not integer. */
231 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
232
233 /** For integer types, specifies the base of the representation. For
234 floating types, specifies the base of the exponent representation. */
235 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 0;
236
237 /** The minimum negative integer such that @c radix raised to the power of
238 (one less than that integer) is a normalized floating point number. */
239 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
240
241 /** The minimum negative integer such that 10 raised to that power is in
242 the range of normalized floating point numbers. */
243 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
244
245 /** The maximum positive integer such that @c radix raised to the power of
246 (one less than that integer) is a representable finite floating point
247 number. */
248 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
249
250 /** The maximum positive integer such that 10 raised to that power is in
251 the range of representable finite floating point numbers. */
252 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
253
254 /** True if the type has a representation for positive infinity. */
255 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
256
257 /** True if the type has a representation for a quiet (non-signaling)
258 Not a Number. */
259 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
260
261 /** True if the type has a representation for a signaling
262 Not a Number. */
263 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
264
265 /** See std::float_denorm_style for more information. */
266 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm = denorm_absent;
267
268 /** True if loss of accuracy is detected as a denormalization loss,
269 rather than as an inexact result. */
270 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
271
272 /** True if-and-only-if the type adheres to the IEC 559 standard, also
273 known as IEEE 754. (Only makes sense for floating point types.) */
274 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
275
276 /** True if the set of values representable by the type is
277 finite. All built-in types are bounded, this member would be
278 false for arbitrary precision types. */
279 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = false;
280
281 /** True if the type is @e modulo. A type is modulo if, for any
282 operation involving +, -, or * on values of that type whose
283 result would fall outside the range [min(),max()], the value
284 returned differs from the true value by an integer multiple of
285 max() - min() + 1. On most machines, this is false for floating
286 types, true for unsigned integers, and true for signed integers.
287 See PR22200 about signed integers. */
288 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
289
290 /** True if trapping is implemented for this type. */
291 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = false;
292
293 /** True if tininess is detected before rounding. (see IEC 559) */
294 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
295
296 /** See std::float_round_style for more information. This is only
297 meaningful for floating types; integer types will all be
298 round_toward_zero. */
299 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style =
300 round_toward_zero;
301 };
302
303 /**
304 * @brief Properties of fundamental types.
305 *
306 * This class allows a program to obtain information about the
307 * representation of a fundamental type on a given platform. For
308 * non-fundamental types, the functions will return 0 and the data
309 * members will all be @c false.
310 *
311 * _GLIBCXX_RESOLVE_LIB_DEFECTS: DRs 201 and 184 (hi Gaby!) are
312 * noted, but not incorporated in this documented (yet).
313 */
314 template<typename _Tp>
315 struct numeric_limits : public __numeric_limits_base
316 {
317 /** The minimum finite value, or for floating types with
318 denormalization, the minimum positive normalized value. */
319 static _GLIBCXX_CONSTEXPRconstexpr _Tp
320 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
321
322 /** The maximum finite value. */
323 static _GLIBCXX_CONSTEXPRconstexpr _Tp
324 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
325
326#if __cplusplus201402L >= 201103L
327 /** A finite value x such that there is no other finite value y
328 * where y < x. */
329 static constexpr _Tp
330 lowest() noexcept { return _Tp(); }
331#endif
332
333 /** The @e machine @e epsilon: the difference between 1 and the least
334 value greater than 1 that is representable. */
335 static _GLIBCXX_CONSTEXPRconstexpr _Tp
336 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
337
338 /** The maximum rounding error measurement (see LIA-1). */
339 static _GLIBCXX_CONSTEXPRconstexpr _Tp
340 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
341
342 /** The representation of positive infinity, if @c has_infinity. */
343 static _GLIBCXX_CONSTEXPRconstexpr _Tp
344 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
345
346 /** The representation of a quiet Not a Number,
347 if @c has_quiet_NaN. */
348 static _GLIBCXX_CONSTEXPRconstexpr _Tp
349 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
350
351 /** The representation of a signaling Not a Number, if
352 @c has_signaling_NaN. */
353 static _GLIBCXX_CONSTEXPRconstexpr _Tp
354 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
355
356 /** The minimum positive denormalized value. For types where
357 @c has_denorm is false, this is the minimum positive normalized
358 value. */
359 static _GLIBCXX_CONSTEXPRconstexpr _Tp
360 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return _Tp(); }
361 };
362
363#if __cplusplus201402L >= 201103L
364 template<typename _Tp>
365 struct numeric_limits<const _Tp>
366 : public numeric_limits<_Tp> { };
367
368 template<typename _Tp>
369 struct numeric_limits<volatile _Tp>
370 : public numeric_limits<_Tp> { };
371
372 template<typename _Tp>
373 struct numeric_limits<const volatile _Tp>
374 : public numeric_limits<_Tp> { };
375#endif
376
377 // Now there follow 16 explicit specializations. Yes, 16. Make sure
378 // you get the count right. (18 in c++0x mode)
379
380 /// numeric_limits<bool> specialization.
381 template<>
382 struct numeric_limits<bool>
383 {
384 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
385
386 static _GLIBCXX_CONSTEXPRconstexpr bool
387 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
388
389 static _GLIBCXX_CONSTEXPRconstexpr bool
390 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return true; }
391
392#if __cplusplus201402L >= 201103L
393 static constexpr bool
394 lowest() noexcept { return min(); }
395#endif
396 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = 1;
397 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = 0;
398#if __cplusplus201402L >= 201103L
399 static constexpr int max_digits10 = 0;
400#endif
401 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
402 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
403 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
404 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
405
406 static _GLIBCXX_CONSTEXPRconstexpr bool
407 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
408
409 static _GLIBCXX_CONSTEXPRconstexpr bool
410 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
411
412 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
413 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
414 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
415 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
416
417 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
418 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
419 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
420 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
421 = denorm_absent;
422 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
423
424 static _GLIBCXX_CONSTEXPRconstexpr bool
425 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
426
427 static _GLIBCXX_CONSTEXPRconstexpr bool
428 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
429
430 static _GLIBCXX_CONSTEXPRconstexpr bool
431 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
432
433 static _GLIBCXX_CONSTEXPRconstexpr bool
434 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return false; }
435
436 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
437 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
438 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
439
440 // It is not clear what it means for a boolean type to trap.
441 // This is a DR on the LWG issue list. Here, I use integer
442 // promotion semantics.
443 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
444 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
445 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
446 = round_toward_zero;
447 };
448
449 /// numeric_limits<char> specialization.
450 template<>
451 struct numeric_limits<char>
452 {
453 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
454
455 static _GLIBCXX_CONSTEXPRconstexpr char
456 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_min(char); }
457
458 static _GLIBCXX_CONSTEXPRconstexpr char
459 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_max(char); }
460
461#if __cplusplus201402L >= 201103L
462 static constexpr char
463 lowest() noexcept { return min(); }
464#endif
465
466 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (char);
467 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (char);
468#if __cplusplus201402L >= 201103L
469 static constexpr int max_digits10 = 0;
470#endif
471 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = __glibcxx_signed (char);
472 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
473 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
474 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
475
476 static _GLIBCXX_CONSTEXPRconstexpr char
477 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
478
479 static _GLIBCXX_CONSTEXPRconstexpr char
480 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
481
482 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
483 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
484 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
485 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
486
487 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
488 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
489 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
490 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
491 = denorm_absent;
492 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
493
494 static _GLIBCXX_CONSTEXPRconstexpr
495 char infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return char(); }
496
497 static _GLIBCXX_CONSTEXPRconstexpr char
498 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return char(); }
499
500 static _GLIBCXX_CONSTEXPRconstexpr char
501 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return char(); }
502
503 static _GLIBCXX_CONSTEXPRconstexpr char
504 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<char>(0); }
505
506 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
507 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
508 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = !is_signed;
509
510 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
511 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
512 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
513 = round_toward_zero;
514 };
515
516 /// numeric_limits<signed char> specialization.
517 template<>
518 struct numeric_limits<signed char>
519 {
520 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
521
522 static _GLIBCXX_CONSTEXPRconstexpr signed char
523 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__SCHAR_MAX__127 - 1; }
524
525 static _GLIBCXX_CONSTEXPRconstexpr signed char
526 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SCHAR_MAX__127; }
527
528#if __cplusplus201402L >= 201103L
529 static constexpr signed char
530 lowest() noexcept { return min(); }
531#endif
532
533 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (signed char);
534 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
535 = __glibcxx_digits10 (signed char);
536#if __cplusplus201402L >= 201103L
537 static constexpr int max_digits10 = 0;
538#endif
539 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
540 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
541 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
542 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
543
544 static _GLIBCXX_CONSTEXPRconstexpr signed char
545 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
546
547 static _GLIBCXX_CONSTEXPRconstexpr signed char
548 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
549
550 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
551 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
552 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
553 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
554
555 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
556 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
557 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
558 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
559 = denorm_absent;
560 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
561
562 static _GLIBCXX_CONSTEXPRconstexpr signed char
563 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<signed char>(0); }
564
565 static _GLIBCXX_CONSTEXPRconstexpr signed char
566 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<signed char>(0); }
567
568 static _GLIBCXX_CONSTEXPRconstexpr signed char
569 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
570 { return static_cast<signed char>(0); }
571
572 static _GLIBCXX_CONSTEXPRconstexpr signed char
573 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
574 { return static_cast<signed char>(0); }
575
576 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
577 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
578 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
579
580 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
581 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
582 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
583 = round_toward_zero;
584 };
585
586 /// numeric_limits<unsigned char> specialization.
587 template<>
588 struct numeric_limits<unsigned char>
589 {
590 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
591
592 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
593 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
594
595 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
596 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SCHAR_MAX__127 * 2U + 1; }
597
598#if __cplusplus201402L >= 201103L
599 static constexpr unsigned char
600 lowest() noexcept { return min(); }
601#endif
602
603 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
604 = __glibcxx_digits (unsigned char);
605 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
606 = __glibcxx_digits10 (unsigned char);
607#if __cplusplus201402L >= 201103L
608 static constexpr int max_digits10 = 0;
609#endif
610 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
611 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
612 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
613 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
614
615 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
616 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
617
618 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
619 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
620
621 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
622 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
623 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
624 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
625
626 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
627 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
628 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
629 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
630 = denorm_absent;
631 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
632
633 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
634 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
635 { return static_cast<unsigned char>(0); }
636
637 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
638 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
639 { return static_cast<unsigned char>(0); }
640
641 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
642 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
643 { return static_cast<unsigned char>(0); }
644
645 static _GLIBCXX_CONSTEXPRconstexpr unsigned char
646 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
647 { return static_cast<unsigned char>(0); }
648
649 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
650 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
651 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
652
653 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
654 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
655 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
656 = round_toward_zero;
657 };
658
659 /// numeric_limits<wchar_t> specialization.
660 template<>
661 struct numeric_limits<wchar_t>
662 {
663 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
664
665 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
666 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_min (wchar_t); }
667
668 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
669 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_max (wchar_t); }
670
671#if __cplusplus201402L >= 201103L
672 static constexpr wchar_t
673 lowest() noexcept { return min(); }
674#endif
675
676 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (wchar_t);
677 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
678 = __glibcxx_digits10 (wchar_t);
679#if __cplusplus201402L >= 201103L
680 static constexpr int max_digits10 = 0;
681#endif
682 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = __glibcxx_signed (wchar_t);
683 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
684 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
685 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
686
687 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
688 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
689
690 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
691 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
692
693 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
694 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
695 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
696 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
697
698 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
699 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
700 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
701 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
702 = denorm_absent;
703 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
704
705 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
706 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
707
708 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
709 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
710
711 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
712 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
713
714 static _GLIBCXX_CONSTEXPRconstexpr wchar_t
715 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return wchar_t(); }
716
717 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
718 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
719 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = !is_signed;
720
721 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
722 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
723 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
724 = round_toward_zero;
725 };
726
727#if __cplusplus201402L >= 201103L
728 /// numeric_limits<char16_t> specialization.
729 template<>
730 struct numeric_limits<char16_t>
731 {
732 static constexpr bool is_specialized = true;
733
734 static constexpr char16_t
735 min() noexcept { return __glibcxx_min (char16_t); }
736
737 static constexpr char16_t
738 max() noexcept { return __glibcxx_max (char16_t); }
739
740 static constexpr char16_t
741 lowest() noexcept { return min(); }
742
743 static constexpr int digits = __glibcxx_digits (char16_t);
744 static constexpr int digits10 = __glibcxx_digits10 (char16_t);
745 static constexpr int max_digits10 = 0;
746 static constexpr bool is_signed = __glibcxx_signed (char16_t);
747 static constexpr bool is_integer = true;
748 static constexpr bool is_exact = true;
749 static constexpr int radix = 2;
750
751 static constexpr char16_t
752 epsilon() noexcept { return 0; }
753
754 static constexpr char16_t
755 round_error() noexcept { return 0; }
756
757 static constexpr int min_exponent = 0;
758 static constexpr int min_exponent10 = 0;
759 static constexpr int max_exponent = 0;
760 static constexpr int max_exponent10 = 0;
761
762 static constexpr bool has_infinity = false;
763 static constexpr bool has_quiet_NaN = false;
764 static constexpr bool has_signaling_NaN = false;
765 static constexpr float_denorm_style has_denorm = denorm_absent;
766 static constexpr bool has_denorm_loss = false;
767
768 static constexpr char16_t
769 infinity() noexcept { return char16_t(); }
770
771 static constexpr char16_t
772 quiet_NaN() noexcept { return char16_t(); }
773
774 static constexpr char16_t
775 signaling_NaN() noexcept { return char16_t(); }
776
777 static constexpr char16_t
778 denorm_min() noexcept { return char16_t(); }
779
780 static constexpr bool is_iec559 = false;
781 static constexpr bool is_bounded = true;
782 static constexpr bool is_modulo = !is_signed;
783
784 static constexpr bool traps = __glibcxx_integral_trapstrue;
785 static constexpr bool tinyness_before = false;
786 static constexpr float_round_style round_style = round_toward_zero;
787 };
788
789 /// numeric_limits<char32_t> specialization.
790 template<>
791 struct numeric_limits<char32_t>
792 {
793 static constexpr bool is_specialized = true;
794
795 static constexpr char32_t
796 min() noexcept { return __glibcxx_min (char32_t); }
797
798 static constexpr char32_t
799 max() noexcept { return __glibcxx_max (char32_t); }
800
801 static constexpr char32_t
802 lowest() noexcept { return min(); }
803
804 static constexpr int digits = __glibcxx_digits (char32_t);
805 static constexpr int digits10 = __glibcxx_digits10 (char32_t);
806 static constexpr int max_digits10 = 0;
807 static constexpr bool is_signed = __glibcxx_signed (char32_t);
808 static constexpr bool is_integer = true;
809 static constexpr bool is_exact = true;
810 static constexpr int radix = 2;
811
812 static constexpr char32_t
813 epsilon() noexcept { return 0; }
814
815 static constexpr char32_t
816 round_error() noexcept { return 0; }
817
818 static constexpr int min_exponent = 0;
819 static constexpr int min_exponent10 = 0;
820 static constexpr int max_exponent = 0;
821 static constexpr int max_exponent10 = 0;
822
823 static constexpr bool has_infinity = false;
824 static constexpr bool has_quiet_NaN = false;
825 static constexpr bool has_signaling_NaN = false;
826 static constexpr float_denorm_style has_denorm = denorm_absent;
827 static constexpr bool has_denorm_loss = false;
828
829 static constexpr char32_t
830 infinity() noexcept { return char32_t(); }
831
832 static constexpr char32_t
833 quiet_NaN() noexcept { return char32_t(); }
834
835 static constexpr char32_t
836 signaling_NaN() noexcept { return char32_t(); }
837
838 static constexpr char32_t
839 denorm_min() noexcept { return char32_t(); }
840
841 static constexpr bool is_iec559 = false;
842 static constexpr bool is_bounded = true;
843 static constexpr bool is_modulo = !is_signed;
844
845 static constexpr bool traps = __glibcxx_integral_trapstrue;
846 static constexpr bool tinyness_before = false;
847 static constexpr float_round_style round_style = round_toward_zero;
848 };
849#endif
850
851 /// numeric_limits<short> specialization.
852 template<>
853 struct numeric_limits<short>
854 {
855 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
856
857 static _GLIBCXX_CONSTEXPRconstexpr short
858 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__SHRT_MAX__32767 - 1; }
859
860 static _GLIBCXX_CONSTEXPRconstexpr short
861 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SHRT_MAX__32767; }
862
863#if __cplusplus201402L >= 201103L
864 static constexpr short
865 lowest() noexcept { return min(); }
866#endif
867
868 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (short);
869 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (short);
870#if __cplusplus201402L >= 201103L
871 static constexpr int max_digits10 = 0;
872#endif
873 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
874 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
875 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
876 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
877
878 static _GLIBCXX_CONSTEXPRconstexpr short
879 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
880
881 static _GLIBCXX_CONSTEXPRconstexpr short
882 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
883
884 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
885 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
886 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
887 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
888
889 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
890 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
891 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
892 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
893 = denorm_absent;
894 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
895
896 static _GLIBCXX_CONSTEXPRconstexpr short
897 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
898
899 static _GLIBCXX_CONSTEXPRconstexpr short
900 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
901
902 static _GLIBCXX_CONSTEXPRconstexpr short
903 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
904
905 static _GLIBCXX_CONSTEXPRconstexpr short
906 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return short(); }
907
908 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
909 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
910 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
911
912 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
913 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
914 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
915 = round_toward_zero;
916 };
917
918 /// numeric_limits<unsigned short> specialization.
919 template<>
920 struct numeric_limits<unsigned short>
921 {
922 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
923
924 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
925 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
926
927 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
928 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __SHRT_MAX__32767 * 2U + 1; }
929
930#if __cplusplus201402L >= 201103L
931 static constexpr unsigned short
932 lowest() noexcept { return min(); }
933#endif
934
935 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
936 = __glibcxx_digits (unsigned short);
937 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
938 = __glibcxx_digits10 (unsigned short);
939#if __cplusplus201402L >= 201103L
940 static constexpr int max_digits10 = 0;
941#endif
942 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
943 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
944 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
945 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
946
947 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
948 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
949
950 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
951 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
952
953 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
954 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
955 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
956 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
957
958 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
959 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
960 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
961 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
962 = denorm_absent;
963 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
964
965 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
966 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
967 { return static_cast<unsigned short>(0); }
968
969 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
970 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
971 { return static_cast<unsigned short>(0); }
972
973 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
974 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
975 { return static_cast<unsigned short>(0); }
976
977 static _GLIBCXX_CONSTEXPRconstexpr unsigned short
978 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
979 { return static_cast<unsigned short>(0); }
980
981 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
982 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
983 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
984
985 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
986 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
987 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
988 = round_toward_zero;
989 };
990
991 /// numeric_limits<int> specialization.
992 template<>
993 struct numeric_limits<int>
994 {
995 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
996
997 static _GLIBCXX_CONSTEXPRconstexpr int
998 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__INT_MAX__2147483647 - 1; }
999
1000 static _GLIBCXX_CONSTEXPRconstexpr int
1001 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __INT_MAX__2147483647; }
1002
1003#if __cplusplus201402L >= 201103L
1004 static constexpr int
1005 lowest() noexcept { return min(); }
1006#endif
1007
1008 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (int);
1009 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (int);
1010#if __cplusplus201402L >= 201103L
1011 static constexpr int max_digits10 = 0;
1012#endif
1013 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1014 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1015 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1016 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1017
1018 static _GLIBCXX_CONSTEXPRconstexpr int
1019 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1020
1021 static _GLIBCXX_CONSTEXPRconstexpr int
1022 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1023
1024 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1025 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1026 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1027 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1028
1029 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1030 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1031 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1032 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1033 = denorm_absent;
1034 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1035
1036 static _GLIBCXX_CONSTEXPRconstexpr int
1037 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1038
1039 static _GLIBCXX_CONSTEXPRconstexpr int
1040 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1041
1042 static _GLIBCXX_CONSTEXPRconstexpr int
1043 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1044
1045 static _GLIBCXX_CONSTEXPRconstexpr int
1046 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<int>(0); }
1047
1048 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1049 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1050 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1051
1052 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1053 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1054 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1055 = round_toward_zero;
1056 };
1057
1058 /// numeric_limits<unsigned int> specialization.
1059 template<>
1060 struct numeric_limits<unsigned int>
1061 {
1062 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1063
1064 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1065 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1066
1067 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1068 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __INT_MAX__2147483647 * 2U + 1; }
1069
1070#if __cplusplus201402L >= 201103L
1071 static constexpr unsigned int
1072 lowest() noexcept { return min(); }
1073#endif
1074
1075 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1076 = __glibcxx_digits (unsigned int);
1077 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1078 = __glibcxx_digits10 (unsigned int);
1079#if __cplusplus201402L >= 201103L
1080 static constexpr int max_digits10 = 0;
1081#endif
1082 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
1083 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1084 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1085 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1086
1087 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1088 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1089
1090 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1091 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1092
1093 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1094 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1095 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1096 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1097
1098 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1099 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1100 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1101 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1102 = denorm_absent;
1103 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1104
1105 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1106 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<unsigned int>(0); }
1107
1108 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1109 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1110 { return static_cast<unsigned int>(0); }
1111
1112 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1113 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1114 { return static_cast<unsigned int>(0); }
1115
1116 static _GLIBCXX_CONSTEXPRconstexpr unsigned int
1117 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
1118 { return static_cast<unsigned int>(0); }
1119
1120 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1121 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1122 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
1123
1124 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1125 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1126 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1127 = round_toward_zero;
1128 };
1129
1130 /// numeric_limits<long> specialization.
1131 template<>
1132 struct numeric_limits<long>
1133 {
1134 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1135
1136 static _GLIBCXX_CONSTEXPRconstexpr long
1137 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__LONG_MAX__9223372036854775807L - 1; }
1138
1139 static _GLIBCXX_CONSTEXPRconstexpr long
1140 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_MAX__9223372036854775807L; }
1141
1142#if __cplusplus201402L >= 201103L
1143 static constexpr long
1144 lowest() noexcept { return min(); }
1145#endif
1146
1147 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __glibcxx_digits (long);
1148 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __glibcxx_digits10 (long);
1149#if __cplusplus201402L >= 201103L
1150 static constexpr int max_digits10 = 0;
1151#endif
1152 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1153 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1154 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1155 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1156
1157 static _GLIBCXX_CONSTEXPRconstexpr long
1158 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1159
1160 static _GLIBCXX_CONSTEXPRconstexpr long
1161 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1162
1163 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1164 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1165 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1166 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1167
1168 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1169 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1170 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1171 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1172 = denorm_absent;
1173 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1174
1175 static _GLIBCXX_CONSTEXPRconstexpr long
1176 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1177
1178 static _GLIBCXX_CONSTEXPRconstexpr long
1179 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1180
1181 static _GLIBCXX_CONSTEXPRconstexpr long
1182 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1183
1184 static _GLIBCXX_CONSTEXPRconstexpr long
1185 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long>(0); }
1186
1187 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1188 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1189 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1190
1191 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1192 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1193 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1194 = round_toward_zero;
1195 };
1196
1197 /// numeric_limits<unsigned long> specialization.
1198 template<>
1199 struct numeric_limits<unsigned long>
1200 {
1201 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1202
1203 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1204 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1205
1206 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1207 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_MAX__9223372036854775807L * 2UL + 1; }
10
Returning the value 18446744073709551615
1208
1209#if __cplusplus201402L >= 201103L
1210 static constexpr unsigned long
1211 lowest() noexcept { return min(); }
1212#endif
1213
1214 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1215 = __glibcxx_digits (unsigned long);
1216 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1217 = __glibcxx_digits10 (unsigned long);
1218#if __cplusplus201402L >= 201103L
1219 static constexpr int max_digits10 = 0;
1220#endif
1221 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
1222 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1223 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1224 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1225
1226 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1227 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1228
1229 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1230 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1231
1232 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1233 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1234 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1235 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1236
1237 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1238 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1239 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1240 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1241 = denorm_absent;
1242 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1243
1244 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1245 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
1246 { return static_cast<unsigned long>(0); }
1247
1248 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1249 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1250 { return static_cast<unsigned long>(0); }
1251
1252 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1253 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1254 { return static_cast<unsigned long>(0); }
1255
1256 static _GLIBCXX_CONSTEXPRconstexpr unsigned long
1257 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
1258 { return static_cast<unsigned long>(0); }
1259
1260 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1261 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1262 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
1263
1264 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1265 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1266 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1267 = round_toward_zero;
1268 };
1269
1270 /// numeric_limits<long long> specialization.
1271 template<>
1272 struct numeric_limits<long long>
1273 {
1274 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1275
1276 static _GLIBCXX_CONSTEXPRconstexpr long long
1277 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return -__LONG_LONG_MAX__9223372036854775807LL - 1; }
1278
1279 static _GLIBCXX_CONSTEXPRconstexpr long long
1280 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_LONG_MAX__9223372036854775807LL; }
1281
1282#if __cplusplus201402L >= 201103L
1283 static constexpr long long
1284 lowest() noexcept { return min(); }
1285#endif
1286
1287 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1288 = __glibcxx_digits (long long);
1289 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1290 = __glibcxx_digits10 (long long);
1291#if __cplusplus201402L >= 201103L
1292 static constexpr int max_digits10 = 0;
1293#endif
1294 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1295 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1296 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1297 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1298
1299 static _GLIBCXX_CONSTEXPRconstexpr long long
1300 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1301
1302 static _GLIBCXX_CONSTEXPRconstexpr long long
1303 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1304
1305 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1306 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1307 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1308 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1309
1310 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1311 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1312 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1313 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1314 = denorm_absent;
1315 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1316
1317 static _GLIBCXX_CONSTEXPRconstexpr long long
1318 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long long>(0); }
1319
1320 static _GLIBCXX_CONSTEXPRconstexpr long long
1321 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long long>(0); }
1322
1323 static _GLIBCXX_CONSTEXPRconstexpr long long
1324 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1325 { return static_cast<long long>(0); }
1326
1327 static _GLIBCXX_CONSTEXPRconstexpr long long
1328 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return static_cast<long long>(0); }
1329
1330 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1331 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1332 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1333
1334 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1335 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1336 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1337 = round_toward_zero;
1338 };
1339
1340 /// numeric_limits<unsigned long long> specialization.
1341 template<>
1342 struct numeric_limits<unsigned long long>
1343 {
1344 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1345
1346 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1347 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1348
1349 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1350 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LONG_LONG_MAX__9223372036854775807LL * 2ULL + 1; }
1351
1352#if __cplusplus201402L >= 201103L
1353 static constexpr unsigned long long
1354 lowest() noexcept { return min(); }
1355#endif
1356
1357 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits
1358 = __glibcxx_digits (unsigned long long);
1359 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10
1360 = __glibcxx_digits10 (unsigned long long);
1361#if __cplusplus201402L >= 201103L
1362 static constexpr int max_digits10 = 0;
1363#endif
1364 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false;
1365 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true;
1366 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true;
1367 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2;
1368
1369 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1370 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1371
1372 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1373 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; }
1374
1375 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0;
1376 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0;
1377 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0;
1378 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0;
1379
1380 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false;
1381 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false;
1382 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false;
1383 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1384 = denorm_absent;
1385 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false;
1386
1387 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1388 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept
1389 { return static_cast<unsigned long long>(0); }
1390
1391 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1392 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1393 { return static_cast<unsigned long long>(0); }
1394
1395 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1396 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept
1397 { return static_cast<unsigned long long>(0); }
1398
1399 static _GLIBCXX_CONSTEXPRconstexpr unsigned long long
1400 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept
1401 { return static_cast<unsigned long long>(0); }
1402
1403 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false;
1404 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1405 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true;
1406
1407 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue;
1408 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false;
1409 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1410 = round_toward_zero;
1411 };
1412
1413#if !defined(__STRICT_ANSI__1)
1414
1415#define __INT_N(TYPE, BITSIZE, EXT, UEXT) \
1416 template<> \
1417 struct numeric_limits<TYPE> \
1418 { \
1419 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true; \
1420 \
1421 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1422 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_min_b (TYPE, BITSIZE)(((TYPE)(-1) < 0) ? -(((TYPE)(-1) < 0) ? (((((TYPE)1 <<
((BITSIZE - ((TYPE)(-1) < 0)) - 1)) - 1) << 1) + 1)
: ~(TYPE)0) - 1 : (TYPE)0)
; } \
1423 \
1424 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1425 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __glibcxx_max_b (TYPE, BITSIZE)(((TYPE)(-1) < 0) ? (((((TYPE)1 << ((BITSIZE - ((TYPE
)(-1) < 0)) - 1)) - 1) << 1) + 1) : ~(TYPE)0)
; } \
1426 \
1427 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits \
1428 = BITSIZE - 1; \
1429 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 \
1430 = (BITSIZE - 1) * 643L / 2136; \
1431 \
1432 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true; \
1433 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true; \
1434 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true; \
1435 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2; \
1436 \
1437 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1438 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1439 \
1440 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1441 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1442 \
1443 EXT \
1444 \
1445 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0; \
1446 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0; \
1447 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0; \
1448 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0; \
1449 \
1450 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false; \
1451 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false; \
1452 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false; \
1453 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm \
1454 = denorm_absent; \
1455 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false; \
1456 \
1457 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1458 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept \
1459 { return static_cast<TYPE>(0); } \
1460 \
1461 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1462 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1463 { return static_cast<TYPE>(0); } \
1464 \
1465 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1466 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1467 { return static_cast<TYPE>(0); } \
1468 \
1469 static _GLIBCXX_CONSTEXPRconstexpr TYPE \
1470 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept \
1471 { return static_cast<TYPE>(0); } \
1472 \
1473 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false; \
1474 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true; \
1475 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false; \
1476 \
1477 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps \
1478 = __glibcxx_integral_trapstrue; \
1479 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false; \
1480 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style \
1481 = round_toward_zero; \
1482 }; \
1483 \
1484 template<> \
1485 struct numeric_limits<unsigned TYPE> \
1486 { \
1487 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true; \
1488 \
1489 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1490 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1491 \
1492 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1493 max() _GLIBCXX_USE_NOEXCEPTnoexcept \
1494 { return __glibcxx_max_b (unsigned TYPE, BITSIZE)(((unsigned TYPE)(-1) < 0) ? (((((unsigned TYPE)1 <<
((BITSIZE - ((unsigned TYPE)(-1) < 0)) - 1)) - 1) <<
1) + 1) : ~(unsigned TYPE)0)
; } \
1495 \
1496 UEXT \
1497 \
1498 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits \
1499 = BITSIZE; \
1500 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 \
1501 = BITSIZE * 643L / 2136; \
1502 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = false; \
1503 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = true; \
1504 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = true; \
1505 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = 2; \
1506 \
1507 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1508 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1509 \
1510 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1511 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0; } \
1512 \
1513 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = 0; \
1514 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = 0; \
1515 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = 0; \
1516 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = 0; \
1517 \
1518 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = false; \
1519 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = false; \
1520 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = false; \
1521 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm \
1522 = denorm_absent; \
1523 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss = false; \
1524 \
1525 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1526 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept \
1527 { return static_cast<unsigned TYPE>(0); } \
1528 \
1529 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1530 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1531 { return static_cast<unsigned TYPE>(0); } \
1532 \
1533 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1534 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept \
1535 { return static_cast<unsigned TYPE>(0); } \
1536 \
1537 static _GLIBCXX_CONSTEXPRconstexpr unsigned TYPE \
1538 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept \
1539 { return static_cast<unsigned TYPE>(0); } \
1540 \
1541 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559 = false; \
1542 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true; \
1543 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = true; \
1544 \
1545 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_integral_trapstrue; \
1546 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before = false; \
1547 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style \
1548 = round_toward_zero; \
1549 };
1550
1551#if __cplusplus201402L >= 201103L
1552
1553#define __INT_N_201103(TYPE) \
1554 static constexpr TYPE \
1555 lowest() noexcept { return min(); } \
1556 static constexpr int max_digits10 = 0;
1557
1558#define __INT_N_U201103(TYPE) \
1559 static constexpr unsigned TYPE \
1560 lowest() noexcept { return min(); } \
1561 static constexpr int max_digits10 = 0;
1562
1563#else
1564#define __INT_N_201103(TYPE)
1565#define __INT_N_U201103(TYPE)
1566#endif
1567
1568#ifdef __GLIBCXX_TYPE_INT_N_0
1569 __INT_N(__GLIBCXX_TYPE_INT_N_0, __GLIBCXX_BITSIZE_INT_N_0,
1570 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_0), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_0))
1571#endif
1572#ifdef __GLIBCXX_TYPE_INT_N_1
1573 __INT_N (__GLIBCXX_TYPE_INT_N_1, __GLIBCXX_BITSIZE_INT_N_1,
1574 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_1), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_1))
1575#endif
1576#ifdef __GLIBCXX_TYPE_INT_N_2
1577 __INT_N (__GLIBCXX_TYPE_INT_N_2, __GLIBCXX_BITSIZE_INT_N_2,
1578 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_2), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_2))
1579#endif
1580#ifdef __GLIBCXX_TYPE_INT_N_3
1581 __INT_N (__GLIBCXX_TYPE_INT_N_3, __GLIBCXX_BITSIZE_INT_N_3,
1582 __INT_N_201103 (__GLIBCXX_TYPE_INT_N_3), __INT_N_U201103 (__GLIBCXX_TYPE_INT_N_3))
1583#endif
1584
1585#undef __INT_N
1586#undef __INT_N_201103
1587#undef __INT_N_U201103
1588
1589#endif
1590
1591 /// numeric_limits<float> specialization.
1592 template<>
1593 struct numeric_limits<float>
1594 {
1595 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1596
1597 static _GLIBCXX_CONSTEXPRconstexpr float
1598 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_MIN__1.17549435e-38F; }
1599
1600 static _GLIBCXX_CONSTEXPRconstexpr float
1601 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_MAX__3.40282347e+38F; }
1602
1603#if __cplusplus201402L >= 201103L
1604 static constexpr float
1605 lowest() noexcept { return -__FLT_MAX__3.40282347e+38F; }
1606#endif
1607
1608 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __FLT_MANT_DIG__24;
1609 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __FLT_DIG__6;
1610#if __cplusplus201402L >= 201103L
1611 static constexpr int max_digits10
1612 = __glibcxx_max_digits10 (__FLT_MANT_DIG__24);
1613#endif
1614 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1615 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
1616 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
1617 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = __FLT_RADIX__2;
1618
1619 static _GLIBCXX_CONSTEXPRconstexpr float
1620 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_EPSILON__1.19209290e-7F; }
1621
1622 static _GLIBCXX_CONSTEXPRconstexpr float
1623 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0.5F; }
1624
1625 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = __FLT_MIN_EXP__(-125);
1626 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = __FLT_MIN_10_EXP__(-37);
1627 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = __FLT_MAX_EXP__128;
1628 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = __FLT_MAX_10_EXP__38;
1629
1630 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = __FLT_HAS_INFINITY__1;
1631 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = __FLT_HAS_QUIET_NAN__1;
1632 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = has_quiet_NaN;
1633 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1634 = bool(__FLT_HAS_DENORM__1) ? denorm_present : denorm_absent;
1635 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss
1636 = __glibcxx_float_has_denorm_loss;
1637
1638 static _GLIBCXX_CONSTEXPRconstexpr float
1639 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_huge_valf(); }
1640
1641 static _GLIBCXX_CONSTEXPRconstexpr float
1642 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nanf(""); }
1643
1644 static _GLIBCXX_CONSTEXPRconstexpr float
1645 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nansf(""); }
1646
1647 static _GLIBCXX_CONSTEXPRconstexpr float
1648 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __FLT_DENORM_MIN__1.40129846e-45F; }
1649
1650 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559
1651 = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
1652 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1653 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1654
1655 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_float_traps;
1656 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before
1657 = __glibcxx_float_tinyness_before;
1658 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1659 = round_to_nearest;
1660 };
1661
1662#undef __glibcxx_float_has_denorm_loss
1663#undef __glibcxx_float_traps
1664#undef __glibcxx_float_tinyness_before
1665
1666 /// numeric_limits<double> specialization.
1667 template<>
1668 struct numeric_limits<double>
1669 {
1670 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1671
1672 static _GLIBCXX_CONSTEXPRconstexpr double
1673 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_MIN__2.2250738585072014e-308; }
1674
1675 static _GLIBCXX_CONSTEXPRconstexpr double
1676 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_MAX__1.7976931348623157e+308; }
1677
1678#if __cplusplus201402L >= 201103L
1679 static constexpr double
1680 lowest() noexcept { return -__DBL_MAX__1.7976931348623157e+308; }
1681#endif
1682
1683 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __DBL_MANT_DIG__53;
1684 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __DBL_DIG__15;
1685#if __cplusplus201402L >= 201103L
1686 static constexpr int max_digits10
1687 = __glibcxx_max_digits10 (__DBL_MANT_DIG__53);
1688#endif
1689 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1690 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
1691 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
1692 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = __FLT_RADIX__2;
1693
1694 static _GLIBCXX_CONSTEXPRconstexpr double
1695 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_EPSILON__2.2204460492503131e-16; }
1696
1697 static _GLIBCXX_CONSTEXPRconstexpr double
1698 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0.5; }
1699
1700 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = __DBL_MIN_EXP__(-1021);
1701 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = __DBL_MIN_10_EXP__(-307);
1702 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = __DBL_MAX_EXP__1024;
1703 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = __DBL_MAX_10_EXP__308;
1704
1705 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = __DBL_HAS_INFINITY__1;
1706 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = __DBL_HAS_QUIET_NAN__1;
1707 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = has_quiet_NaN;
1708 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1709 = bool(__DBL_HAS_DENORM__1) ? denorm_present : denorm_absent;
1710 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss
1711 = __glibcxx_double_has_denorm_loss;
1712
1713 static _GLIBCXX_CONSTEXPRconstexpr double
1714 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_huge_val(); }
1715
1716 static _GLIBCXX_CONSTEXPRconstexpr double
1717 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nan(""); }
1718
1719 static _GLIBCXX_CONSTEXPRconstexpr double
1720 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nans(""); }
1721
1722 static _GLIBCXX_CONSTEXPRconstexpr double
1723 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __DBL_DENORM_MIN__4.9406564584124654e-324; }
1724
1725 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559
1726 = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
1727 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1728 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1729
1730 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_double_traps;
1731 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before
1732 = __glibcxx_double_tinyness_before;
1733 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style
1734 = round_to_nearest;
1735 };
1736
1737#undef __glibcxx_double_has_denorm_loss
1738#undef __glibcxx_double_traps
1739#undef __glibcxx_double_tinyness_before
1740
1741 /// numeric_limits<long double> specialization.
1742 template<>
1743 struct numeric_limits<long double>
1744 {
1745 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_specialized = true;
1746
1747 static _GLIBCXX_CONSTEXPRconstexpr long double
1748 min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_MIN__3.36210314311209350626e-4932L; }
1749
1750 static _GLIBCXX_CONSTEXPRconstexpr long double
1751 max() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_MAX__1.18973149535723176502e+4932L; }
1752
1753#if __cplusplus201402L >= 201103L
1754 static constexpr long double
1755 lowest() noexcept { return -__LDBL_MAX__1.18973149535723176502e+4932L; }
1756#endif
1757
1758 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits = __LDBL_MANT_DIG__64;
1759 static _GLIBCXX_USE_CONSTEXPRconstexpr int digits10 = __LDBL_DIG__18;
1760#if __cplusplus201402L >= 201103L
1761 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_digits10
1762 = __glibcxx_max_digits10 (__LDBL_MANT_DIG__64);
1763#endif
1764 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_signed = true;
1765 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_integer = false;
1766 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_exact = false;
1767 static _GLIBCXX_USE_CONSTEXPRconstexpr int radix = __FLT_RADIX__2;
1768
1769 static _GLIBCXX_CONSTEXPRconstexpr long double
1770 epsilon() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_EPSILON__1.08420217248550443401e-19L; }
1771
1772 static _GLIBCXX_CONSTEXPRconstexpr long double
1773 round_error() _GLIBCXX_USE_NOEXCEPTnoexcept { return 0.5L; }
1774
1775 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent = __LDBL_MIN_EXP__(-16381);
1776 static _GLIBCXX_USE_CONSTEXPRconstexpr int min_exponent10 = __LDBL_MIN_10_EXP__(-4931);
1777 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent = __LDBL_MAX_EXP__16384;
1778 static _GLIBCXX_USE_CONSTEXPRconstexpr int max_exponent10 = __LDBL_MAX_10_EXP__4932;
1779
1780 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_infinity = __LDBL_HAS_INFINITY__1;
1781 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_quiet_NaN = __LDBL_HAS_QUIET_NAN__1;
1782 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_signaling_NaN = has_quiet_NaN;
1783 static _GLIBCXX_USE_CONSTEXPRconstexpr float_denorm_style has_denorm
1784 = bool(__LDBL_HAS_DENORM__1) ? denorm_present : denorm_absent;
1785 static _GLIBCXX_USE_CONSTEXPRconstexpr bool has_denorm_loss
1786 = __glibcxx_long_double_has_denorm_loss;
1787
1788 static _GLIBCXX_CONSTEXPRconstexpr long double
1789 infinity() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_huge_vall(); }
1790
1791 static _GLIBCXX_CONSTEXPRconstexpr long double
1792 quiet_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nanl(""); }
1793
1794 static _GLIBCXX_CONSTEXPRconstexpr long double
1795 signaling_NaN() _GLIBCXX_USE_NOEXCEPTnoexcept { return __builtin_nansl(""); }
1796
1797 static _GLIBCXX_CONSTEXPRconstexpr long double
1798 denorm_min() _GLIBCXX_USE_NOEXCEPTnoexcept { return __LDBL_DENORM_MIN__3.64519953188247460253e-4951L; }
1799
1800 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_iec559
1801 = has_infinity && has_quiet_NaN && has_denorm == denorm_present;
1802 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_bounded = true;
1803 static _GLIBCXX_USE_CONSTEXPRconstexpr bool is_modulo = false;
1804
1805 static _GLIBCXX_USE_CONSTEXPRconstexpr bool traps = __glibcxx_long_double_traps;
1806 static _GLIBCXX_USE_CONSTEXPRconstexpr bool tinyness_before =
1807 __glibcxx_long_double_tinyness_before;
1808 static _GLIBCXX_USE_CONSTEXPRconstexpr float_round_style round_style =
1809 round_to_nearest;
1810 };
1811
1812#undef __glibcxx_long_double_has_denorm_loss
1813#undef __glibcxx_long_double_traps
1814#undef __glibcxx_long_double_tinyness_before
1815
1816_GLIBCXX_END_NAMESPACE_VERSION
1817} // namespace
1818
1819#undef __glibcxx_signed
1820#undef __glibcxx_min
1821#undef __glibcxx_max
1822#undef __glibcxx_digits
1823#undef __glibcxx_digits10
1824#undef __glibcxx_max_digits10
1825
1826#endif // _GLIBCXX_NUMERIC_LIMITS