15#ifndef LLVM_MC_MCREGISTERINFO_H
16#define LLVM_MC_MCREGISTERINFO_H
30class MCRegUnitIterator;
31class MCSubRegIterator;
32class MCSuperRegIterator;
75 unsigned InByte = RegNo % 8;
76 unsigned Byte = RegNo / 8;
79 return (
RegSet[Byte] & (1 << InByte)) != 0;
163 unsigned NumRegUnits;
165 const int16_t *DiffLists;
168 const char *RegStrings;
169 const char *RegClassStrings;
172 unsigned NumSubRegIndices;
176 unsigned L2DwarfRegsSize;
177 unsigned EHL2DwarfRegsSize;
178 unsigned Dwarf2LRegsSize;
179 unsigned EHDwarf2LRegsSize;
180 const DwarfLLVMRegPair *L2DwarfRegs;
181 const DwarfLLVMRegPair *EHL2DwarfRegs;
182 const DwarfLLVMRegPair *Dwarf2LRegs;
183 const DwarfLLVMRegPair *EHDwarf2LRegs;
189 class DiffListIterator
193 const int16_t *
List =
nullptr;
198 DiffListIterator() =
default;
201 void init(
unsigned InitVal,
const int16_t *DiffList) {
207 bool isValid()
const {
return List; }
210 const unsigned &
operator*()
const {
return Val; }
212 using DiffListIterator::iterator_facade_base::operator++;
215 assert(isValid() &&
"Cannot move off the end of the list.");
232 iterator_range<MCSubRegIterator>
subregs(MCRegister
Reg)
const;
240 iterator_range<MCSuperRegIterator>
superregs(MCRegister
Reg)
const;
248 detail::concat_range<const MCPhysReg, iterator_range<MCSubRegIterator>,
249 iterator_range<MCSuperRegIterator>>
253 iterator_range<MCRegUnitIterator>
regunits(MCRegister
Reg)
const;
268 const MCPhysReg (*RURoots)[2],
unsigned NRU,
270 const char *Strings,
const char *ClassStrings,
271 const uint16_t *SubIndices,
unsigned NumIndices,
279 RegUnitMaskSequences = RUMS;
280 RegStrings = Strings;
281 RegClassStrings = ClassStrings;
283 RegUnitRoots = RURoots;
285 SubRegIndices = SubIndices;
286 NumSubRegIndices = NumIndices;
287 RegEncodingTable = RET;
290 EHL2DwarfRegs =
nullptr;
291 EHL2DwarfRegsSize = 0;
292 L2DwarfRegs =
nullptr;
294 EHDwarf2LRegs =
nullptr;
295 EHDwarf2LRegsSize = 0;
296 Dwarf2LRegs =
nullptr;
307 EHL2DwarfRegsSize =
Size;
310 L2DwarfRegsSize =
Size;
321 EHDwarf2LRegsSize =
Size;
324 Dwarf2LRegsSize =
Size;
334 L2SEHRegs[LLVMReg] = SEHReg;
338 L2CVRegs[LLVMReg] = CVReg;
354 "Attempting to access record for invalid register number!");
382 return RegStrings +
get(RegNo).
Name;
395 return NumSubRegIndices;
413 std::optional<unsigned>
getLLVMRegNum(
unsigned RegNum,
bool isEH)
const;
445 return RegClassStrings + Class->NameIdx;
451 "Attempting to get encoding for invalid register number!");
452 return RegEncodingTable[RegNo];
495 MCRegisterInfo::DiffListIterator,
496 std::forward_iterator_tag, const MCPhysReg> {
505 bool IncludeSelf =
false) {
516 using iterator_adaptor_base::operator++;
536 : SRIter(
Reg, MCRI) {
565 MCRegisterInfo::DiffListIterator,
566 std::forward_iterator_tag, const MCPhysReg> {
575 bool IncludeSelf =
false) {
586 using iterator_adaptor_base::operator++;
610 MCRegisterInfo::DiffListIterator,
611 std::forward_iterator_tag, const MCRegUnit> {
613 static constexpr unsigned RegUnitBits = 12;
622 assert(
Reg &&
"Null register has no regunits");
626 unsigned FirstRU = RU & ((1u << RegUnitBits) - 1);
627 unsigned Offset = RU >> RegUnitBits;
628 I.init(FirstRU, MCRI->DiffLists +
Offset);
634 using iterator_adaptor_base::operator++;
657 : RUIter(
Reg, MCRI) {
659 MaskListIter = &MCRI->RegUnitMaskSequences[
Idx];
664 return std::make_pair(*RUIter, *MaskListIter);
696 assert(RegUnit < MCRI->getNumRegUnits() &&
"Invalid register unit");
697 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
698 Reg1 = MCRI->RegUnitRoots[RegUnit][1];
736 : Reg(Reg), MCRI(MCRI), IncludeSelf(IncludeSelf) {
741 if (!(!IncludeSelf && Reg == *SI))
751 assert(SI.isValid() &&
"Cannot dereference an invalid iterator.");
758 if (SI.isValid())
return;
776 while (!IncludeSelf &&
isValid() && *SI == Reg);
781inline iterator_range<MCSubRegIterator>
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
This file defines the DenseMap class.
A common definition of LaneBitmask for use in TableGen and CodeGen.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
SI optimize exec mask operations pre RA
MCRegAliasIterator enumerates all registers aliasing Reg.
MCRegAliasIterator(MCRegister Reg, const MCRegisterInfo *MCRI, bool IncludeSelf)
MCRegister operator*() const
MCRegAliasIterator & operator++()
const MCRegUnit & operator*() const
MCRegUnitIterator()=default
Constructs an end iterator.
bool isValid() const
Returns true if this iterator is not yet at the end.
MCRegUnitIterator & operator++()
MCRegUnitIterator(MCRegister Reg, const MCRegisterInfo *MCRI)
MCRegUnitMaskIterator enumerates a list of register units and their associated lane masks for Reg.
MCRegUnitMaskIterator()=default
MCRegUnitMaskIterator(MCRegister Reg, const MCRegisterInfo *MCRI)
Constructs an iterator that traverses the register units and their associated LaneMasks in Reg.
MCRegUnitMaskIterator & operator++()
Moves to the next position.
bool isValid() const
Returns true if this iterator is not yet at the end.
std::pair< unsigned, LaneBitmask > operator*() const
Returns a (RegUnit, LaneMask) pair.
MCRegUnitRootIterator enumerates the root registers of a register unit.
MCRegUnitRootIterator()=default
MCRegUnitRootIterator & operator++()
Preincrement to move to the next root register.
unsigned operator*() const
Dereference to get the current root register.
MCRegUnitRootIterator(unsigned RegUnit, const MCRegisterInfo *MCRI)
bool isValid() const
Check if the iterator is at the end of the list.
MCRegisterClass - Base class of TargetRegisterClass.
unsigned getID() const
getID() - Return the register class ID number.
bool isAllocatable() const
isAllocatable - Return true if this register class may be used to create virtual registers.
const uint16_t RegSizeInBits
unsigned getSizeInBits() const
Return the size of the physical register in bits if we are able to determine it.
const uint16_t RegSetSize
bool contains(MCRegister Reg1, MCRegister Reg2) const
contains - Return true if both registers are in this class.
unsigned getNumRegs() const
getNumRegs - Return the number of registers in this class.
unsigned getRegister(unsigned i) const
getRegister - Return the specified register in the class.
iterator begin() const
begin/end - Return all of the registers in this class.
bool contains(MCRegister Reg) const
contains - Return true if the specified register is included in this register class.
const uint8_t *const RegSet
bool isBaseClass() const
Return true if this register class has a defined BaseClassOrder.
int getCopyCost() const
getCopyCost - Return the cost of copying a value between two registers in this class.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
int getDwarfRegNum(MCRegister RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
bool regsOverlap(MCRegister RegA, MCRegister RegB) const
Returns true if the two registers are equal or alias each other.
bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a super-register of RegA or if RegB == RegA.
unsigned getNumRegClasses() const
MCRegister getRARegister() const
This method should return the register where the return address can be found.
MCRegister getProgramCounter() const
Return the register which is the program counter.
regclass_iterator regclass_end() const
void mapDwarfRegsToLLVMRegs(const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
Used to initialize Dwarf register to LLVM register number mapping.
unsigned getNumRegUnits() const
Return the number of (native) register units in the target.
MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, const MCRegisterClass *RC) const
Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.
int getCodeViewRegNum(MCRegister RegNum) const
Map a target register to an equivalent CodeView register number.
std::optional< unsigned > getLLVMRegNum(unsigned RegNum, bool isEH) const
Map a dwarf register back to a target register.
iterator_range< regclass_iterator > regclasses() const
regclass_iterator regclass_begin() const
const MCRegisterDesc & get(MCRegister RegNo) const
Provide a get method, equivalent to [], but more useful with a pointer to this object.
int getSEHRegNum(MCRegister RegNum) const
Map a target register to an equivalent SEH register number.
void mapLLVMRegToCVReg(MCRegister LLVMReg, int CVReg)
iterator_range< MCSuperRegIterator > superregs(MCRegister Reg) const
Return an iterator range over all super-registers of Reg, excluding Reg.
const char * getName(MCRegister RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register.
void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA, unsigned PC, const MCRegisterClass *C, unsigned NC, const MCPhysReg(*RURoots)[2], unsigned NRU, const int16_t *DL, const LaneBitmask *RUMS, const char *Strings, const char *ClassStrings, const uint16_t *SubIndices, unsigned NumIndices, const uint16_t *RET)
Initialize MCRegisterInfo, called by TableGen auto-generated routines.
const char * getRegClassName(const MCRegisterClass *Class) const
friend class MCSubRegIterator
int getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const
Map a target EH register number to an equivalent DWARF register number.
uint16_t getEncodingValue(MCRegister RegNo) const
Returns the encoding for RegNo.
iterator_range< MCSubRegIterator > subregs_inclusive(MCRegister Reg) const
Return an iterator range over all sub-registers of Reg, including Reg.
bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a super-register or sub-register of RegA or if RegB == RegA.
bool isSubRegister(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA.
friend class MCSuperRegIterator
iterator_range< MCSubRegIterator > subregs(MCRegister Reg) const
Return an iterator range over all sub-registers of Reg, excluding Reg.
unsigned getSubRegIndex(MCRegister RegNo, MCRegister SubRegNo) const
For a given register pair, return the sub-register index if the second register is a sub-register of ...
void mapLLVMRegsToDwarfRegs(const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
Used to initialize LLVM register to Dwarf register number mapping.
bool isSuperRegister(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a super-register of RegA.
iterator_range< MCRegUnitIterator > regunits(MCRegister Reg) const
Returns an iterator range over all regunits for Reg.
bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA or if RegB == RegA.
friend class MCRegUnitIterator
void mapLLVMRegToSEHReg(MCRegister LLVMReg, int SEHReg)
mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register number mapping.
iterator_range< MCSuperRegIterator > superregs_inclusive(MCRegister Reg) const
Return an iterator range over all super-registers of Reg, including Reg.
detail::concat_range< const MCPhysReg, iterator_range< MCSubRegIterator >, iterator_range< MCSuperRegIterator > > sub_and_superregs_inclusive(MCRegister Reg) const
Return an iterator range over all sub- and super-registers of Reg, including Reg.
const MCRegisterClass & getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
const MCRegisterDesc & operator[](MCRegister RegNo) const
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Wrapper class representing physical registers. Should be passed by value.
static constexpr bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Iterator that enumerates the sub-registers of a Reg and the associated sub-register indices.
MCSubRegIndexIterator(MCRegister Reg, const MCRegisterInfo *MCRI)
Constructs an iterator that traverses subregisters and their associated subregister indices.
MCSubRegIndexIterator & operator++()
Moves to the next position.
bool isValid() const
Returns true if this iterator is not yet at the end.
unsigned getSubRegIndex() const
Returns sub-register index of the current sub-register.
MCRegister getSubReg() const
Returns current sub-register.
MCSubRegIterator enumerates all sub-registers of Reg.
const MCPhysReg & operator*() const
MCSubRegIterator & operator++()
bool isValid() const
Returns true if this iterator is not yet at the end.
MCSubRegIterator()=default
Constructs an end iterator.
MCSubRegIterator(MCRegister Reg, const MCRegisterInfo *MCRI, bool IncludeSelf=false)
MCSuperRegIterator enumerates all super-registers of Reg.
MCSuperRegIterator(MCRegister Reg, const MCRegisterInfo *MCRI, bool IncludeSelf=false)
MCSuperRegIterator & operator++()
const MCPhysReg & operator*() const
MCSuperRegIterator()=default
Constructs an end iterator.
bool isValid() const
Returns true if this iterator is not yet at the end.
Helper to store a sequence of ranges being concatenated and access them.
CRTP base class for adapting an iterator to a different type.
MCRegisterInfo::DiffListIterator I
CRTP base class which implements the entire standard iterator facade in terms of a minimal subset of ...
DiffListIterator operator++(int)
A range adaptor for a pair of iterators.
This provides a very simple, boring adaptor for a begin and end iterator into a range type.
@ C
The default llvm calling convention, compatible with C.
This is an optimization pass for GlobalISel generic memory operations.
APInt operator*(APInt a, uint64_t RHS)
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
bool operator==(const AddressRangeValuePair &LHS, const AddressRangeValuePair &RHS)
unsigned MCRegUnit
Register units are used to compute register aliasing.
bool is_contained(R &&Range, const E &Element)
Returns true if Element is found in Range.
Description of the encoding of one expression Op.
MCRegisterDesc - This record contains information about a particular register.
uint16_t RegUnitLaneMasks
Index into list with lane mask sequences.
DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be performed with a binary se...
bool operator<(DwarfLLVMRegPair RHS) const