34#define DEBUG_TYPE "ppc-subtarget"
36#define GET_SUBTARGETINFO_TARGET_DESC
37#define GET_SUBTARGETINFO_CTOR
38#include "PPCGenSubtargetInfo.inc"
42 cl::desc(
"Enable subregister liveness tracking for PPC"),
47 cl::desc(
"Enable Machine Pipeliner for PPC"),
53 initializeEnvironment();
54 initSubtargetFeatures(CPU, TuneCPU, FS);
59 const std::string &TuneCPU,
const std::string &FS,
62 IsPPC64(TargetTriple.getArch() ==
Triple::ppc64 ||
63 TargetTriple.getArch() ==
Triple::ppc64le),
64 TM(
TM), FrameLowering(initializeSubtargetDependencies(CPU, TuneCPU, FS)),
65 InstrInfo(*this), TLInfo(
TM, *this) {
75void PPCSubtarget::initializeEnvironment() {
84 std::string CPUName = std::string(CPU);
85 if (CPUName.empty() || CPU ==
"generic") {
96 if (TuneCPU.
empty()) TuneCPU = CPUName;
106 if (
IsPPC64 && has64BitSupport())
114 if (HasSPE && (HasAltivec || HasVSX || HasFPU))
116 "SPE and traditional floating point cannot both be enabled.\n",
false);
127 if (HasAIXSmallLocalExecTLS || HasAIXSmallLocalDynamicTLS) {
130 "only supported on AIX in "
140 "only be specified with "
158 return TargetSubtargetInfo::ANTIDEP_ALL;
162 CriticalPathRCs.clear();
163 CriticalPathRCs.push_back(
isPPC64() ?
164 &PPC::G8RCRegClass : &PPC::GPRCRegClass);
168 unsigned NumRegionInstrs)
const {
192 return !GVar->hasAttribute(
"toc-data");
218 assert(GV &&
"Unexpected NULL GlobalValue");
225 const GlobalAlias *Alias = dyn_cast<GlobalAlias>(GV);
235 std::optional<CodeModel::Model> MaybeCodeModel = GlobalVar->getCodeModel();
236 if (MaybeCodeModel) {
239 "invalid code model for AIX");
static cl::opt< bool > EnableMachinePipeliner("aarch64-enable-pipeliner", cl::desc("Enable Machine Pipeliner for AArch64"), cl::init(false), cl::Hidden)
This file contains the simple types necessary to represent the attributes associated with functions a...
This file describes how to lower LLVM calls to machine code calls.
This file declares the targeting of the Machinelegalizer class for PowerPC.
This file declares the targeting of the RegisterBankInfo class for PowerPC.
static cl::opt< bool > UseSubRegLiveness("ppc-track-subreg-liveness", cl::desc("Enable subregister liveness tracking for PPC"), cl::init(true), cl::Hidden)
static cl::opt< bool > EnableMachinePipeliner("ppc-enable-pipeliner", cl::desc("Enable Machine Pipeliner for PPC"), cl::init(false), cl::Hidden)
const char LLVMTargetMachineRef TM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
const GlobalObject * getAliaseeObject() const
This class provides the information for the PowerPC target legalizer for GlobalISel.
std::unique_ptr< InstructionSelector > InstSelector
bool enableMachinePipeliner() const override
Pipeliner customization.
bool useDFAforSMS() const override
Machine Pipeliner customization.
const CallLowering * getCallLowering() const override
Triple TargetTriple
TargetTriple - What processor and OS we're targeting.
const LegalizerInfo * getLegalizerInfo() const override
std::unique_ptr< RegisterBankInfo > RegBankInfo
InstrItineraryData InstrItins
Selected instruction itineraries (one entry per itinerary class.)
Align StackAlignment
stackAlignment - The minimum alignment known to hold of the stack frame on entry to the function and ...
void overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override
bool isUsingPCRelativeCalls() const
bool enableSubRegLiveness() const override
const PPCTargetLowering * getTargetLowering() const override
InstructionSelector * getInstructionSelector() const override
unsigned CPUDirective
Which cpu directive was used.
AntiDepBreakMode getAntiDepBreakMode() const override
bool useAA() const override
PPCSubtarget & initializeSubtargetDependencies(StringRef CPU, StringRef TuneCPU, StringRef FS)
initializeSubtargetDependencies - Initializes using a CPU, a TuneCPU, and feature string so that we c...
CodeModel::Model getCodeModel(const TargetMachine &TM, const GlobalValue *GV) const
Calculates the effective code model for argument GV.
Align getPlatformStackAlignment() const
const PPCTargetMachine & getTargetMachine() const
PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &TuneCPU, const std::string &FS, const PPCTargetMachine &TM)
This constructor initializes the data members to match that of the specified triple.
const PPCTargetMachine & TM
bool enableMachineScheduler() const override
Scheduling customization.
const RegisterBankInfo * getRegBankInfo() const override
const PPCRegisterInfo * getRegisterInfo() const override
bool isGVIndirectSymbol(const GlobalValue *GV) const
True if the GV will be accessed via an indirect symbol.
std::unique_ptr< CallLowering > CallLoweringInfo
GlobalISel related APIs.
bool enablePostRAScheduler() const override
This overrides the PostRAScheduler bit in the SchedModel for each CPU.
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
Common code between 32-bit and 64-bit PowerPC targets.
bool isLittleEndian() const
Holds all the information related to register banks.
StringRef - Represent a constant reference to a string, i.e.
constexpr bool empty() const
empty - Check if the string is empty.
Primary interface to the complete machine description for the target machine.
bool shouldAssumeDSOLocal(const GlobalValue *GV) const
bool getDataSections() const
Return true if data objects should be emitted into their own section, corresponds to -fdata-sections.
CodeModel::Model getCodeModel() const
Returns the code model.
Triple - Helper class for working with autoconf configuration names.
SubArchType getSubArch() const
get the parsed subarchitecture type for this triple.
ArchType getArch() const
Get the parsed architecture type of this triple.
bool isOSAIX() const
Tests whether the OS is AIX.
bool isPPC32SecurePlt() const
Tests whether the target 32-bit PowerPC uses Secure PLT.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
InstructionSelector * createPPCInstructionSelector(const PPCTargetMachine &TM, const PPCSubtarget &Subtarget, const PPCRegisterBankInfo &RBI)
This struct is a compact representation of a valid (non-zero power of two) alignment.
Define a generic scheduling policy for targets that don't provide their own MachineSchedStrategy.