LLVM  10.0.0svn
llvm::SIMachineFunctionInfo Member List

This is the complete list of members for llvm::SIMachineFunctionInfo, including all inherited members.

addDispatchID(const SIRegisterInfo &TRI)llvm::SIMachineFunctionInfo
addDispatchPtr(const SIRegisterInfo &TRI)llvm::SIMachineFunctionInfo
addFlatScratchInit(const SIRegisterInfo &TRI)llvm::SIMachineFunctionInfo
addImplicitBufferPtr(const SIRegisterInfo &TRI)llvm::SIMachineFunctionInfo
addKernargSegmentPtr(const SIRegisterInfo &TRI)llvm::SIMachineFunctionInfo
addPrivateSegmentBuffer(const SIRegisterInfo &TRI)llvm::SIMachineFunctionInfo
addPrivateSegmentWaveByteOffset()llvm::SIMachineFunctionInfoinline
addQueuePtr(const SIRegisterInfo &TRI)llvm::SIMachineFunctionInfo
addToSpilledSGPRs(unsigned num)llvm::SIMachineFunctionInfoinline
addToSpilledVGPRs(unsigned num)llvm::SIMachineFunctionInfoinline
addWorkGroupIDX()llvm::SIMachineFunctionInfoinline
addWorkGroupIDY()llvm::SIMachineFunctionInfoinline
addWorkGroupIDZ()llvm::SIMachineFunctionInfoinline
addWorkGroupInfo()llvm::SIMachineFunctionInfoinline
allocateLDSGlobal(const DataLayout &DL, const GlobalValue &GV)llvm::AMDGPUMachineFunction
allocateSGPRSpillToVGPR(MachineFunction &MF, int FI)llvm::SIMachineFunctionInfo
allocateVGPRSpillToAGPR(MachineFunction &MF, int FI, bool isAGPRtoVGPR)llvm::SIMachineFunctionInfo
AMDGPUMachineFunction(const MachineFunction &MF)llvm::AMDGPUMachineFunction
create(BumpPtrAllocator &Allocator, MachineFunction &MF)llvm::MachineFunctionInfoinlinestatic
ExplicitKernArgSizellvm::AMDGPUMachineFunctionprotected
FramePointerSaveIndexllvm::SIMachineFunctionInfo
GCNTargetMachine classllvm::SIMachineFunctionInfofriend
get32BitAddressHighBits() constllvm::SIMachineFunctionInfoinline
getAGPRSpillVGPRs() constllvm::SIMachineFunctionInfoinline
getArgInfo()llvm::SIMachineFunctionInfoinline
getArgInfo() constllvm::SIMachineFunctionInfoinline
getBufferPSV(const SIInstrInfo &TII, const Value *BufferRsrc)llvm::SIMachineFunctionInfoinline
getBytesInStackArgArea() constllvm::SIMachineFunctionInfoinline
getExplicitKernArgSize() constllvm::AMDGPUMachineFunctioninline
getFlatWorkGroupSizes() constllvm::SIMachineFunctionInfoinline
getFrameOffsetReg() constllvm::SIMachineFunctionInfoinline
getGDSSize() constllvm::SIMachineFunctionInfoinline
getGITPtrHigh() constllvm::SIMachineFunctionInfoinline
getGWSPSV(const SIInstrInfo &TII)llvm::SIMachineFunctionInfoinline
getImagePSV(const SIInstrInfo &TII, const Value *ImgRsrc)llvm::SIMachineFunctionInfoinline
getImplicitBufferPtrUserSGPR() constllvm::SIMachineFunctionInfoinline
getLDSSize() constllvm::AMDGPUMachineFunctioninline
getLDSWaveSpillSize() constllvm::SIMachineFunctionInfoinline
getMaxFlatWorkGroupSize() constllvm::SIMachineFunctionInfoinline
getMaxKernArgAlign() constllvm::AMDGPUMachineFunctioninline
getMaxWavesPerEU() constllvm::SIMachineFunctionInfoinline
getMinAllowedOccupancy() constllvm::SIMachineFunctionInfoinline
getMinFlatWorkGroupSize() constllvm::SIMachineFunctionInfoinline
getMinWavesPerEU() constllvm::SIMachineFunctionInfoinline
getMode() constllvm::SIMachineFunctionInfoinline
getNumPreloadedSGPRs() constllvm::SIMachineFunctionInfoinline
getNumSpilledSGPRs() constllvm::SIMachineFunctionInfoinline
getNumSpilledVGPRs() constllvm::SIMachineFunctionInfoinline
getNumUserSGPRs() constllvm::SIMachineFunctionInfoinline
getOccupancy() constllvm::SIMachineFunctionInfoinline
getPreloadedReg(AMDGPUFunctionArgInfo::PreloadedValue Value) constllvm::SIMachineFunctionInfoinline
getPreloadedValue(AMDGPUFunctionArgInfo::PreloadedValue Value) constllvm::SIMachineFunctionInfoinline
getPrivateSegmentWaveByteOffsetSystemSGPR() constllvm::SIMachineFunctionInfoinline
getPSInputAddr() constllvm::SIMachineFunctionInfoinline
getPSInputEnable() constllvm::SIMachineFunctionInfoinline
getQueuePtrUserSGPR() constllvm::SIMachineFunctionInfoinline
getScratchRSrcReg() constllvm::SIMachineFunctionInfoinline
getScratchWaveOffsetReg() constllvm::SIMachineFunctionInfoinline
getSGPRSpillVGPRs() constllvm::SIMachineFunctionInfoinline
getSGPRToVGPRSpills(int FrameIndex) constllvm::SIMachineFunctionInfoinline
getStackPtrOffsetReg() constllvm::SIMachineFunctionInfoinline
getTIDReg() constllvm::SIMachineFunctionInfoinline
getVGPRSpillAGPRs() constllvm::SIMachineFunctionInfoinline
getVGPRToAGPRSpill(int FrameIndex, unsigned Lane) constllvm::SIMachineFunctionInfoinline
getWavesPerEU() constllvm::SIMachineFunctionInfoinline
getWorkGroupIDSGPR(unsigned Dim) constllvm::SIMachineFunctionInfoinline
hasCalculatedTID() constllvm::SIMachineFunctionInfoinline
hasDispatchID() constllvm::SIMachineFunctionInfoinline
hasDispatchPtr() constllvm::SIMachineFunctionInfoinline
hasFlatScratchInit() constllvm::SIMachineFunctionInfoinline
hasImplicitArgPtr() constllvm::SIMachineFunctionInfoinline
hasImplicitBufferPtr() constllvm::SIMachineFunctionInfoinline
hasKernargSegmentPtr() constllvm::SIMachineFunctionInfoinline
hasNonSpillStackObjects() constllvm::SIMachineFunctionInfoinline
hasNoSignedZerosFPMath() constllvm::AMDGPUMachineFunctioninline
hasPrivateSegmentBuffer() constllvm::SIMachineFunctionInfoinline
hasPrivateSegmentWaveByteOffset() constllvm::SIMachineFunctionInfoinline
hasQueuePtr() constllvm::SIMachineFunctionInfoinline
hasSpilledSGPRs() constllvm::SIMachineFunctionInfoinline
hasSpilledVGPRs() constllvm::SIMachineFunctionInfoinline
hasWorkGroupIDX() constllvm::SIMachineFunctionInfoinline
hasWorkGroupIDY() constllvm::SIMachineFunctionInfoinline
hasWorkGroupIDZ() constllvm::SIMachineFunctionInfoinline
hasWorkGroupInfo() constllvm::SIMachineFunctionInfoinline
hasWorkItemIDX() constllvm::SIMachineFunctionInfoinline
hasWorkItemIDY() constllvm::SIMachineFunctionInfoinline
hasWorkItemIDZ() constllvm::SIMachineFunctionInfoinline
haveFreeLanesForSGPRSpill(const MachineFunction &MF, unsigned NumLane) constllvm::SIMachineFunctionInfo
increaseOccupancy(const MachineFunction &MF, unsigned Limit)llvm::SIMachineFunctionInfoinline
initializeBaseYamlFields(const yaml::SIMachineFunctionInfo &YamlMFI)llvm::SIMachineFunctionInfo
isEntryFunction() constllvm::AMDGPUMachineFunctioninline
IsEntryFunctionllvm::AMDGPUMachineFunctionprotected
isMemoryBound() constllvm::AMDGPUMachineFunctioninline
isPSInputAllocated(unsigned Index) constllvm::SIMachineFunctionInfoinline
isStackRealigned() constllvm::SIMachineFunctionInfoinline
LDSSizellvm::AMDGPUMachineFunctionprotected
limitOccupancy(const MachineFunction &MF)llvm::SIMachineFunctionInfo
limitOccupancy(unsigned Limit)llvm::SIMachineFunctionInfoinline
markPSInputAllocated(unsigned Index)llvm::SIMachineFunctionInfoinline
markPSInputEnabled(unsigned Index)llvm::SIMachineFunctionInfoinline
MaxKernArgAlignllvm::AMDGPUMachineFunctionprotected
MemoryBoundllvm::AMDGPUMachineFunctionprotected
needsWaveLimiter() constllvm::AMDGPUMachineFunctioninline
NoSignedZerosFPMathllvm::AMDGPUMachineFunctionprotected
removeDeadFrameIndices(MachineFrameInfo &MFI)llvm::SIMachineFunctionInfo
ReserveWWMRegister(unsigned reg)llvm::SIMachineFunctionInfoinline
returnsVoid() constllvm::SIMachineFunctionInfoinline
setBytesInStackArgArea(unsigned Bytes)llvm::SIMachineFunctionInfoinline
setFrameOffsetReg(unsigned Reg)llvm::SIMachineFunctionInfoinline
setHasNonSpillStackObjects(bool StackObject=true)llvm::SIMachineFunctionInfoinline
setHasSpilledSGPRs(bool Spill=true)llvm::SIMachineFunctionInfoinline
setHasSpilledVGPRs(bool Spill=true)llvm::SIMachineFunctionInfoinline
setIfReturnsVoid(bool Value)llvm::SIMachineFunctionInfoinline
setIsStackRealigned(bool Realigned=true)llvm::SIMachineFunctionInfoinline
setPrivateSegmentWaveByteOffset(unsigned Reg)llvm::SIMachineFunctionInfoinline
setScratchRSrcReg(unsigned Reg)llvm::SIMachineFunctionInfoinline
setScratchWaveOffsetReg(unsigned Reg)llvm::SIMachineFunctionInfoinline
setStackPtrOffsetReg(unsigned Reg)llvm::SIMachineFunctionInfoinline
setTIDReg(unsigned Reg)llvm::SIMachineFunctionInfoinline
setWorkItemIDX(ArgDescriptor Arg)llvm::SIMachineFunctionInfoinline
setWorkItemIDY(ArgDescriptor Arg)llvm::SIMachineFunctionInfoinline
setWorkItemIDZ(ArgDescriptor Arg)llvm::SIMachineFunctionInfoinline
SGPRForFPSaveRestoreCopyllvm::SIMachineFunctionInfo
SIMachineFunctionInfo(const MachineFunction &MF)llvm::SIMachineFunctionInfo
WaveLimiterllvm::AMDGPUMachineFunctionprotected
WWMReservedRegsllvm::SIMachineFunctionInfo
~MachineFunctionInfo()llvm::MachineFunctionInfovirtual