LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/Mips - MipsGenFastISel.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 162 1782 9.1 %
Date: 2017-09-14 15:23:50 Functions: 31 287 10.8 %
Legend: Lines: hit not hit

Function Name Sort by function name Hit count Sort by hit count
_ZN12_GLOBAL__N_112MipsFastISel10fastEmit_iEN4llvm3MVTES2_jm 7
_ZN12_GLOBAL__N_112MipsFastISel10fastEmit_rEN4llvm3MVTES2_jjb 4
_ZN12_GLOBAL__N_112MipsFastISel11fastEmit_riEN4llvm3MVTES2_jjbm 7
_ZN12_GLOBAL__N_112MipsFastISel11fastEmit_rrEN4llvm3MVTES2_jjbjb 37
_ZN12_GLOBAL__N_112MipsFastISel18fastEmit_ISD_OR_rrEN4llvm3MVTES2_jbjb 4
_ZN12_GLOBAL__N_112MipsFastISel19fastEmit_ISD_ADD_rrEN4llvm3MVTES2_jbjb 6
_ZN12_GLOBAL__N_112MipsFastISel19fastEmit_ISD_AND_rrEN4llvm3MVTES2_jbjb 5
_ZN12_GLOBAL__N_112MipsFastISel19fastEmit_ISD_CTLZ_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel19fastEmit_ISD_FABS_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel19fastEmit_ISD_FNEG_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel19fastEmit_ISD_MUL_rrEN4llvm3MVTES2_jbjb 2
_ZN12_GLOBAL__N_112MipsFastISel19fastEmit_ISD_SHL_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel19fastEmit_ISD_SRA_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel19fastEmit_ISD_SRL_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel19fastEmit_ISD_SUB_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel19fastEmit_ISD_XOR_rrEN4llvm3MVTES2_jbjb 4
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_ADDC_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_ADDE_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_BRIND_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_CTPOP_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_FADD_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_FDIV_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_FEXP2_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_FLOG2_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_FMUL_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_FRINT_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_FSQRT_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_FSUB_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_SDIV_rrEN4llvm3MVTES2_jbjb 4
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_SREM_rrEN4llvm3MVTES2_jbjb 4
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_SUBC_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_UDIV_rrEN4llvm3MVTES2_jbjb 4
_ZN12_GLOBAL__N_112MipsFastISel20fastEmit_ISD_UREM_rrEN4llvm3MVTES2_jbjb 4
_ZN12_GLOBAL__N_112MipsFastISel21fastEmit_ISD_MULHS_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel21fastEmit_ISD_MULHU_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel22fastEmit_ISD_BITCAST_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel23Predicate_immZExtAndi16El 7
_ZN12_GLOBAL__N_112MipsFastISel23fastEmit_ISD_Constant_iEN4llvm3MVTES2_m 7
_ZN12_GLOBAL__N_112MipsFastISel23fastEmit_ISD_FP_ROUND_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel24fastEmit_ISD_FP_EXTEND_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel24fastEmit_MipsISD_ILVL_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel24fastEmit_MipsISD_ILVR_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel24fastEmit_MipsISD_Mult_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel24fastEmit_MipsISD_VNOR_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_ISD_FP_TO_SINT_rEN4llvm3MVTES2_jb 4
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_ISD_FP_TO_UINT_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_ISD_SINT_TO_FP_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_ISD_UINT_TO_FP_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_MipsISD_ILVEV_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_MipsISD_ILVOD_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_MipsISD_Multu_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_MipsISD_PCKEV_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_MipsISD_PCKOD_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_MipsISD_VSMAX_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_MipsISD_VSMIN_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_MipsISD_VUMAX_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel25fastEmit_MipsISD_VUMIN_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel26fastEmit_ISD_OR_MVT_i32_rrEN4llvm3MVTEjbjb 4
_ZN12_GLOBAL__N_112MipsFastISel26fastEmit_ISD_SIGN_EXTEND_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel26fastEmit_MipsISD_DivRem_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel26fastEmit_MipsISD_JmpLink_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel26fastEmit_MipsISD_MTLOHI_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_ADD_MVT_i32_rrEN4llvm3MVTEjbjb 6
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_ADD_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_AND_MVT_i32_rrEN4llvm3MVTEjbjb 5
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_CTLZ_MVT_i32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_CTLZ_MVT_i64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_FABS_MVT_f32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_FABS_MVT_f64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_FNEG_MVT_f32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_FNEG_MVT_f64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_MUL_MVT_i32_rrEN4llvm3MVTEjbjb 2
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_MUL_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_SHL_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_SRA_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_SRL_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_SUB_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_SUB_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_ISD_XOR_MVT_i32_rrEN4llvm3MVTEjbjb 4
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_MipsISD_DivRemU_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel27fastEmit_MipsISD_TailCall_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_ADDC_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_ADDC_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_BRIND_MVT_i32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_FADD_MVT_f32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_FADD_MVT_f64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_FDIV_MVT_f32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_FDIV_MVT_f64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_FMUL_MVT_f32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_FMUL_MVT_f64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_FSQRT_MVT_f32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_FSQRT_MVT_f64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_FSUB_MVT_f32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_FSUB_MVT_f64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_OR_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_ROTR_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_SDIV_MVT_i32_rrEN4llvm3MVTEjbjb 4
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_SDIV_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_SREM_MVT_i32_rrEN4llvm3MVTEjbjb 4
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_SREM_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_SUBC_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_SUBC_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_UDIV_MVT_i32_rrEN4llvm3MVTEjbjb 4
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_UDIV_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_UREM_MVT_i32_rrEN4llvm3MVTEjbjb 4
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_ISD_UREM_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_MipsISD_DivRem16_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_MipsISD_SHLL_DSP_riEN4llvm3MVTES2_jbm 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_MipsISD_SHRA_DSP_riEN4llvm3MVTES2_jbm 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_MipsISD_SHRL_DSP_riEN4llvm3MVTES2_jbm 0
_ZN12_GLOBAL__N_112MipsFastISel28fastEmit_MipsISD_VALL_ZERO_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_ADD_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_ADD_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_ADD_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_ADD_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_AND_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_CTLZ_MVT_v16i8_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_CTLZ_MVT_v2i64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_CTLZ_MVT_v4i32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_CTLZ_MVT_v8i16_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_MULHS_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_MULHS_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_MULHU_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_MULHU_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_MUL_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_MUL_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_MUL_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_MUL_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SHL_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SHL_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SHL_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SHL_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SRA_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SRA_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SRA_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SRA_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SRL_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SRL_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SRL_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SRL_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SUB_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SUB_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SUB_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_SUB_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_ISD_XOR_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_MipsISD_DivRemU16_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_MipsISD_EH_RETURN_rrEN4llvm3MVTES2_jbjb 0
_ZN12_GLOBAL__N_112MipsFastISel29fastEmit_MipsISD_TruncIntFP_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_BITCAST_MVT_f32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_BITCAST_MVT_f64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_BITCAST_MVT_i32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_BITCAST_MVT_i64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_CTPOP_MVT_v16i8_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_CTPOP_MVT_v2i64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_CTPOP_MVT_v4i32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_CTPOP_MVT_v8i16_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FADD_MVT_v2f64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FADD_MVT_v4f32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FDIV_MVT_v2f64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FDIV_MVT_v4f32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FLOG2_MVT_v2f64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FLOG2_MVT_v4f32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FMUL_MVT_v2f64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FMUL_MVT_v4f32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FRINT_MVT_v2f64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FRINT_MVT_v4f32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FSQRT_MVT_v2f64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FSQRT_MVT_v4f32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FSUB_MVT_v2f64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_FSUB_MVT_v4f32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_SDIV_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_SDIV_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_SDIV_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_SDIV_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_SREM_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_SREM_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_SREM_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_SREM_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_UDIV_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_UDIV_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_UDIV_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_UDIV_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_UREM_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_UREM_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_UREM_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ISD_UREM_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ri_Predicate_immZExt5EN4llvm3MVTES2_jjbm 7
_ZN12_GLOBAL__N_112MipsFastISel30fastEmit_ri_Predicate_immZExt6EN4llvm3MVTES2_jjbm 7
_ZN12_GLOBAL__N_112MipsFastISel31fastEmit_ISD_FP_ROUND_MVT_f64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel31fastEmit_MipsISD_VALL_NONZERO_rEN4llvm3MVTES2_jb 0
_ZN12_GLOBAL__N_112MipsFastISel32fastEmit_ISD_FP_EXTEND_MVT_f16_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel32fastEmit_ISD_FP_EXTEND_MVT_f32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel32fastEmit_MipsISD_Mult_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel32fastEmit_MipsISD_Mult_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel33fastEmit_ISD_SINT_TO_FP_MVT_i32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel33fastEmit_ISD_SINT_TO_FP_MVT_i64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel33fastEmit_MipsISD_Multu_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel33fastEmit_MipsISD_Multu_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_DivRem_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_DivRem_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_ILVL_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_ILVL_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_ILVL_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_ILVL_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_ILVR_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_ILVR_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_ILVR_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_ILVR_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_JmpLink_MVT_i32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_MTLOHI_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel34fastEmit_MipsISD_VNOR_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_ISD_FP_TO_SINT_MVT_v2f64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_ISD_FP_TO_SINT_MVT_v4f32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_ISD_FP_TO_UINT_MVT_v2f64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_ISD_FP_TO_UINT_MVT_v4f32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_ISD_SINT_TO_FP_MVT_v2i64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_ISD_SINT_TO_FP_MVT_v4i32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_ISD_UINT_TO_FP_MVT_v2i64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_ISD_UINT_TO_FP_MVT_v4i32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_DivRemU_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_DivRemU_MVT_i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_ILVEV_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_ILVEV_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_ILVEV_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_ILVEV_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_ILVOD_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_ILVOD_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_ILVOD_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_ILVOD_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_MFHI_MVT_Untyped_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_MFLO_MVT_Untyped_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_MTC1_D64_MVT_i32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_PCKEV_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_PCKEV_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_PCKEV_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_PCKEV_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_PCKOD_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_PCKOD_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_PCKOD_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_PCKOD_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VSMAX_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VSMAX_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VSMAX_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VSMAX_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VSMIN_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VSMIN_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VSMIN_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VSMIN_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VUMAX_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VUMAX_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VUMAX_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VUMAX_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VUMIN_MVT_v16i8_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VUMIN_MVT_v2i64_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VUMIN_MVT_v4i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_MipsISD_VUMIN_MVT_v8i16_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_ri_Predicate_immZExt2ShiftEN4llvm3MVTES2_jjbm 1
_ZN12_GLOBAL__N_112MipsFastISel35fastEmit_ri_Predicate_immZExtAndi16EN4llvm3MVTES2_jjbm 1
_ZN12_GLOBAL__N_112MipsFastISel37fastEmit_MipsISD_TruncIntFP_MVT_f32_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel37fastEmit_MipsISD_TruncIntFP_MVT_f64_rEN4llvm3MVTEjb 0
_ZN12_GLOBAL__N_112MipsFastISel39fastEmit_ISD_FP_ROUND_MVT_f64_MVT_f32_rEjb 0
_ZN12_GLOBAL__N_112MipsFastISel40fastEmit_MipsISD_BuildPairF64_MVT_i32_rrEN4llvm3MVTEjbjb 0
_ZN12_GLOBAL__N_112MipsFastISel41fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f64_rEjb 0
_ZN12_GLOBAL__N_112MipsFastISel43fastEmit_ISD_SHL_ri_Predicate_immZExt2ShiftEN4llvm3MVTES2_jbm 0
_ZN12_GLOBAL__N_112MipsFastISel43fastEmit_ISD_SRL_ri_Predicate_immZExt2ShiftEN4llvm3MVTES2_jbm 0
_ZN12_GLOBAL__N_112MipsFastISel43fastEmit_MipsISD_MFHI_MVT_Untyped_MVT_i32_rEjb 0
_ZN12_GLOBAL__N_112MipsFastISel43fastEmit_MipsISD_MFHI_MVT_Untyped_MVT_i64_rEjb 0
_ZN12_GLOBAL__N_112MipsFastISel43fastEmit_MipsISD_MFLO_MVT_Untyped_MVT_i32_rEjb 0
_ZN12_GLOBAL__N_112MipsFastISel43fastEmit_MipsISD_MFLO_MVT_Untyped_MVT_i64_rEjb 0
_ZN12_GLOBAL__N_112MipsFastISel44fastEmit_ISD_ADD_ri_Predicate_immSExtAddiur2EN4llvm3MVTES2_jbm 1
_ZN12_GLOBAL__N_112MipsFastISel44fastEmit_ISD_ADD_ri_Predicate_immSExtAddius5EN4llvm3MVTES2_jbm 1
_ZN12_GLOBAL__N_112MipsFastISel45fastEmit_MipsISD_ExtractElementF64_MVT_f64_riEN4llvm3MVTEjbm 0
_ZN12_GLOBAL__N_112MipsFastISel45fastEmit_MipsISD_TruncIntFP_MVT_f32_MVT_f64_rEjb 0
_ZN12_GLOBAL__N_112MipsFastISel45fastEmit_MipsISD_TruncIntFP_MVT_f64_MVT_f32_rEjb 0
_ZN12_GLOBAL__N_112MipsFastISel45fastEmit_MipsISD_TruncIntFP_MVT_f64_MVT_f64_rEjb 0
_ZN12_GLOBAL__N_112MipsFastISel46fastEmit_ISD_SHL_MVT_i32_ri_Predicate_immZExt5EN4llvm3MVTEjbm 0
_ZN12_GLOBAL__N_112MipsFastISel46fastEmit_ISD_SHL_MVT_i64_ri_Predicate_immZExt6EN4llvm3MVTEjbm 0
_ZN12_GLOBAL__N_112MipsFastISel46fastEmit_ISD_SRA_MVT_i32_ri_Predicate_immZExt5EN4llvm3MVTEjbm 0
_ZN12_GLOBAL__N_112MipsFastISel46fastEmit_ISD_SRA_MVT_i64_ri_Predicate_immZExt6EN4llvm3MVTEjbm 0
_ZN12_GLOBAL__N_112MipsFastISel46fastEmit_ISD_SRL_MVT_i32_ri_Predicate_immZExt5EN4llvm3MVTEjbm 0
_ZN12_GLOBAL__N_112MipsFastISel46fastEmit_ISD_SRL_MVT_i64_ri_Predicate_immZExt6EN4llvm3MVTEjbm 0
_ZN12_GLOBAL__N_112MipsFastISel47fastEmit_ISD_ROTR_MVT_i32_ri_Predicate_immZExt5EN4llvm3MVTEjbm 0
_ZN12_GLOBAL__N_112MipsFastISel47fastEmit_ISD_ROTR_MVT_i64_ri_Predicate_immZExt6EN4llvm3MVTEjbm 0
_ZN12_GLOBAL__N_112MipsFastISel51fastEmit_ISD_AND_MVT_i32_ri_Predicate_immZExtAndi16EN4llvm3MVTEjbm 0
_ZN12_GLOBAL__N_112MipsFastISel53fastEmit_ISD_EXTRACT_VECTOR_ELT_ri_Predicate_immZExt4EN4llvm3MVTES2_jbm 0
_ZN12_GLOBAL__N_112MipsFastISel56fastEmit_ISD_EXTRACT_VECTOR_ELT_ri_Predicate_immZExt1PtrEN4llvm3MVTES2_jbm 0
_ZN12_GLOBAL__N_112MipsFastISel56fastEmit_ISD_EXTRACT_VECTOR_ELT_ri_Predicate_immZExt2PtrEN4llvm3MVTES2_jbm 0

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