LCOV - code coverage report
Current view: top level - lib/Target/ARM - ARMISelDAGToDAG.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 1875 2086 89.9 %
Date: 2017-09-14 15:23:50 Functions: 68 70 97.1 %
Legend: Lines: hit not hit

Function Name Sort by function name Hit count Sort by hit count
_ZN12_GLOBAL__N_115ARMDAGToDAGISelD2Ev 0
_ZNK12_GLOBAL__N_115ARMDAGToDAGISel11getPassNameEv 0
_ZN12_GLOBAL__N_115ARMDAGToDAGISel21SelectAddrMode2WorkerEN4llvm7SDValueERS2_S3_S3_ 2
_ZN12_GLOBAL__N_115ARMDAGToDAGISel21SelectAddrMode6OffsetEPN4llvm6SDNodeENS1_7SDValueERS4_.isra.271 4
_ZN12_GLOBAL__N_115ARMDAGToDAGISel14SelectCMP_SWAPEPN4llvm6SDNodeE 6
_ZL18getMClassFlagsMaskN4llvm9StringRefE 12
_ZN12_GLOBAL__N_115ARMDAGToDAGISel21SelectAddrMode3OffsetEPN4llvm6SDNodeENS1_7SDValueERS4_S5_.isra.266 14
_ZN12_GLOBAL__N_115ARMDAGToDAGISel27SelectAddrMode2OffsetImmPreEPN4llvm6SDNodeENS1_7SDValueERS4_S5_.isra.269 18
_ZN12_GLOBAL__N_115ARMDAGToDAGISel28SelectInlineAsmMemoryOperandERKN4llvm7SDValueEjRSt6vectorIS2_SaIS2_EE 18
_ZN12_GLOBAL__N_115ARMDAGToDAGISel24SelectAddrMode2OffsetRegEPN4llvm6SDNodeENS1_7SDValueERS4_S5_ 23
_ZL22getARClassRegisterMaskN4llvm9StringRefES0_ 24
_ZN12_GLOBAL__N_115ARMDAGToDAGISel18createQRegPairNodeEN4llvm3EVTENS1_7SDValueES3_.isra.239 26
_ZN12_GLOBAL__N_115ARMDAGToDAGISel24SelectAddrMode2OffsetImmEPN4llvm6SDNodeENS1_7SDValueERS4_S5_.isra.265 32
_ZN12_GLOBAL__N_115ARMDAGToDAGISel15replaceDAGValueERKN4llvm7SDValueES2_.isra.250 33
_ZN12_GLOBAL__N_115ARMDAGToDAGISel18createSRegPairNodeEN4llvm3EVTENS1_7SDValueES3_.isra.235 38
_ZN12_GLOBAL__N_115ARMDAGToDAGISel19createQuadQRegsNodeEN4llvm3EVTENS1_7SDValueES3_S3_S3_.isra.240 42
_ZN12_GLOBAL__N_115ARMDAGToDAGISel12SelectVLDDupEPN4llvm6SDNodeEbjPKtS5_ 46
_ZN12_GLOBAL__N_115ARMDAGToDAGISel26SelectT2AddrModeImm8OffsetEPN4llvm6SDNodeENS1_7SDValueERS4_.isra.267 48
_ZN12_GLOBAL__N_115ARMDAGToDAGISel19createQuadDRegsNodeEN4llvm3EVTENS1_7SDValueES3_S3_S3_.isra.238 57
_ZZN12_GLOBAL__N_115ARMDAGToDAGISel10SelectCMPZEPN4llvm6SDNodeERbENKUljNS1_7SDValueEjE_clEjS5_j 60
_ZL27getContiguousRangeOfSetBitsRKN4llvm5APIntE 68
_ZN12_GLOBAL__N_115ARMDAGToDAGISel19createQuadSRegsNodeEN4llvm3EVTENS1_7SDValueES3_S3_S3_.isra.236 68
_ZN12_GLOBAL__N_115ARMDAGToDAGISel25SelectT2AddrModeExclusiveEN4llvm7SDValueERS2_S3_.isra.261 79
_ZL28getVLDSTRegisterUpdateOpcodej 81
_ZN12_GLOBAL__N_115ARMDAGToDAGISel15SelectVLDSTLaneEPN4llvm6SDNodeEbbjPKtS5_ 87
_ZN12_GLOBAL__N_115ARMDAGToDAGISel15tryReadRegisterEPN4llvm6SDNodeE 95
_ZN12_GLOBAL__N_115ARMDAGToDAGISel17createGPRPairNodeEN4llvm3EVTENS1_7SDValueES3_.isra.237 109
_ZN12_GLOBAL__N_115ARMDAGToDAGISel21isShifterOpProfitableERKN4llvm7SDValueENS1_6ARM_AM8ShiftOpcEj.isra.101 131
_ZN12_GLOBAL__N_115ARMDAGToDAGISel16tryWriteRegisterEPN4llvm6SDNodeE 135
_ZL21getMClassRegisterMaskN4llvm9StringRefEPKNS_12ARMSubtargetE 182
_ZNK12_GLOBAL__N_115ARMDAGToDAGISel22canExtractShiftFromMulERKN4llvm7SDValueEjRjRS2_ 182
_ZN12_GLOBAL__N_115ARMDAGToDAGISel9SelectVSTEPN4llvm6SDNodeEbjPKtS5_S5_ 196
_ZL21getBankedRegisterMaskN4llvm9StringRefE 222
_ZL32getIntOperandsFromRegisterStringN4llvm9StringRefEPNS_12SelectionDAGERKNS_5SDLocERSt6vectorINS_7SDValueESaIS7_EE 230
_ZL18isPerfectIncrementN4llvm7SDValueENS_3EVTEj.isra.273 235
_ZN12_GLOBAL__N_115ARMDAGToDAGISel9SelectVLDEPN4llvm6SDNodeEbjPKtS5_S5_ 249
_ZN12_GLOBAL__N_115ARMDAGToDAGISel21SelectThumbAddrModeRREN4llvm7SDValueERS2_S3_.isra.270 259
_ZN12_GLOBAL__N_115ARMDAGToDAGISel18createDRegPairNodeEN4llvm3EVTENS1_7SDValueES3_.isra.234 332
_ZN12_GLOBAL__N_115ARMDAGToDAGISel8tryABSOpEPN4llvm6SDNodeE.isra.272 344
_ZNK12_GLOBAL__N_115ARMDAGToDAGISel18hasNoVMLxHazardUseEPN4llvm6SDNodeE 348
_ZN12_GLOBAL__N_115ARMDAGToDAGISel13GetVLDSTAlignEN4llvm7SDValueERKNS1_5SDLocEjb 445
_ZN12_GLOBAL__N_115ARMDAGToDAGISel15SelectAddrMode3EN4llvm7SDValueERS2_S3_S3_.isra.263 531
_ZN12_GLOBAL__N_115ARMDAGToDAGISel24SelectThumbAddrModeImm5SEN4llvm7SDValueEjRS2_S3_.isra.264 960
_ZN12_GLOBAL__N_115ARMDAGToDAGISel14SelectCMOVPredEN4llvm7SDValueERS2_S3_.isra.233 1111
_ZN12_GLOBAL__N_115ARMDAGToDAGISel16tryT1IndexedLoadEPN4llvm6SDNodeE 1518
_ZN12_GLOBAL__N_115ARMDAGToDAGISel24tryV6T2BitfieldExtractOpEPN4llvm6SDNodeEb 1640
_ZN12_GLOBAL__N_115ARMDAGToDAGISel21SelectThumbAddrModeSPEN4llvm7SDValueERS2_S3_.isra.287 1665
_ZN12_GLOBAL__N_115ARMDAGToDAGISel20SelectT2AddrModeImm8EN4llvm7SDValueERS2_S3_.isra.260 1767
_ZN12_GLOBAL__N_115ARMDAGToDAGISel10SelectCMPZEPN4llvm6SDNodeERb 1950
_ZN12_GLOBAL__N_115ARMDAGToDAGISelD0Ev 2524
_ZN4llvm16createARMISelDagERNS_20ARMBaseTargetMachineENS_10CodeGenOpt5LevelE 2551
_ZN12_GLOBAL__N_115ARMDAGToDAGISel15SelectAddrMode5EN4llvm7SDValueERS2_S3_.isra.268 3013
_ZL5getALPN4llvm12SelectionDAGERKNS_5SDLocE 3457
_ZN12_GLOBAL__N_115ARMDAGToDAGISel12tryInlineAsmEPN4llvm6SDNodeE 3477
_ZN12_GLOBAL__N_115ARMDAGToDAGISel16tryT2IndexedLoadEPN4llvm6SDNodeE 3527
_ZN12_GLOBAL__N_115ARMDAGToDAGISel15SelectAddrMode6EPN4llvm6SDNodeENS1_7SDValueERS4_S5_.isra.254 3727
_ZN12_GLOBAL__N_115ARMDAGToDAGISel21SelectT2AddrModeImm12EN4llvm7SDValueERS2_S3_ 3830
_ZN12_GLOBAL__N_115ARMDAGToDAGISel21SelectT2AddrModeSoRegEN4llvm7SDValueERS2_S3_S3_ 3982
_ZNK12_GLOBAL__N_115ARMDAGToDAGISel27ConstantMaterializationCostEj.isra.153 5160
_ZN12_GLOBAL__N_115ARMDAGToDAGISel19SelectAddrModeImm12EN4llvm7SDValueERS2_S3_.isra.259 6003
_ZN12_GLOBAL__N_115ARMDAGToDAGISel15SelectLdStSORegEN4llvm7SDValueERS2_S3_S3_ 6137
_ZN12_GLOBAL__N_115ARMDAGToDAGISel16SelectAddrModePCEN4llvm7SDValueERS2_S3_.isra.232 6785
_ZN12_GLOBAL__N_115ARMDAGToDAGISel17tryARMIndexedLoadEPN4llvm6SDNodeE 6899
_ZN12_GLOBAL__N_115ARMDAGToDAGISel23SelectRegShifterOperandEN4llvm7SDValueERS2_S3_S3_b 8099
_ZN12_GLOBAL__N_115ARMDAGToDAGISel20runOnMachineFunctionERN4llvm15MachineFunctionE 11835
_ZN12_GLOBAL__N_115ARMDAGToDAGISel23SelectImmShifterOperandEN4llvm7SDValueERS2_S3_b 12808
_ZN12_GLOBAL__N_115ARMDAGToDAGISel17PreprocessISelDAGEv 15703
_GLOBAL__sub_I_ARMISelDAGToDAG.cpp 72306
_Z41__static_initialization_and_destruction_0ii 72306
_ZN12_GLOBAL__N_115ARMDAGToDAGISel6SelectEPN4llvm6SDNodeE 257802

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