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[Meta] Enable -verify-machineinstrs with EXPENSIVE_CHECKS #31494

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fhahn opened this issue Mar 5, 2017 · 30 comments
Open

[Meta] Enable -verify-machineinstrs with EXPENSIVE_CHECKS #31494

fhahn opened this issue Mar 5, 2017 · 30 comments
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bugzilla Issues migrated from bugzilla llvm:codegen

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@fhahn
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fhahn commented Mar 5, 2017

Bugzilla Link 32146
Version trunk
OS All
Depends On #27832 #27834 #27857 #28669 #32384 #32392 #32396 #32458 #12788 #27830 #27835 #27853 #27854 #27855 #30347 #32393 #32394 #32395 #32397
CC @rovka,@filcab,@francisvm,@RKSimon,@MatzeB,@rnk,@xgupta

Extended Description

Adding -verify-machineinstr for EXPENSIVE_CHECKS was suggested in #30347 .

At the moment, the following tests fail:

Testing Time: 475.89s

Failing Tests (241):
LLVM :: Bindings/Go/go.test
LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
LLVM :: CodeGen/AMDGPU/big_alu.ll
LLVM :: CodeGen/AMDGPU/combine_vloads.ll
LLVM :: CodeGen/AMDGPU/kernel-args.ll
LLVM :: CodeGen/AMDGPU/literals.ll
LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
LLVM :: CodeGen/AMDGPU/load-constant-i16.ll
LLVM :: CodeGen/AMDGPU/load-constant-i8.ll
LLVM :: CodeGen/AMDGPU/load-global-i16.ll
LLVM :: CodeGen/AMDGPU/load-global-i8.ll
LLVM :: CodeGen/AMDGPU/load-input-fold.ll
LLVM :: CodeGen/AMDGPU/load-local-i16.ll
LLVM :: CodeGen/AMDGPU/load-local-i8.ll
LLVM :: CodeGen/AMDGPU/min.ll
LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
LLVM :: CodeGen/AMDGPU/parallelandifcollapse.ll
LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
LLVM :: CodeGen/AMDGPU/pv-packing.ll
LLVM :: CodeGen/AMDGPU/pv.ll
LLVM :: CodeGen/AMDGPU/r600.bitcast.ll
LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
LLVM :: CodeGen/AMDGPU/setcc.ll
LLVM :: CodeGen/AMDGPU/sext-in-reg.ll
LLVM :: CodeGen/AMDGPU/shl.ll
LLVM :: CodeGen/AMDGPU/sra.ll
LLVM :: CodeGen/AMDGPU/store-global.ll
LLVM :: CodeGen/AMDGPU/store-local.ll
LLVM :: CodeGen/AMDGPU/store-private.ll
LLVM :: CodeGen/AMDGPU/sub.ll
LLVM :: CodeGen/AMDGPU/swizzle-export.ll
LLVM :: CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll
LLVM :: CodeGen/AMDGPU/unknown-processor.ll
LLVM :: CodeGen/AMDGPU/vector-alloca.ll
LLVM :: CodeGen/ARM/2011-04-11-MachineLICMBug.ll
LLVM :: CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
LLVM :: CodeGen/ARM/GlobalISel/arm-irtranslator.ll
LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
LLVM :: CodeGen/ARM/execute-only.ll
LLVM :: CodeGen/ARM/jump-table-tbh.ll
LLVM :: CodeGen/Generic/llc-start-stop.ll
LLVM :: CodeGen/Generic/print-machineinstrs.ll
LLVM :: CodeGen/Hexagon/eliminate-pred-spill.ll
LLVM :: CodeGen/Hexagon/expand-vstorerw-undef2.ll
LLVM :: CodeGen/Hexagon/reg-scavengebug-3.ll
LLVM :: CodeGen/Hexagon/reg-scavenger-valid-slot.ll
LLVM :: CodeGen/Hexagon/vec-pred-spill1.ll
LLVM :: CodeGen/Lanai/codemodel.ll
LLVM :: CodeGen/Lanai/comparisons_i32.ll
LLVM :: CodeGen/Lanai/comparisons_i64.ll
LLVM :: CodeGen/Lanai/constant_multiply.ll
LLVM :: CodeGen/Lanai/delay_filler.ll
LLVM :: CodeGen/Lanai/i32.ll
LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
LLVM :: CodeGen/Lanai/lshift64.ll
LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
LLVM :: CodeGen/Lanai/multiply.ll
LLVM :: CodeGen/Lanai/rshift64.ll
LLVM :: CodeGen/Lanai/select.ll
LLVM :: CodeGen/Lanai/set_and_hi.ll
LLVM :: CodeGen/Lanai/shift.ll
LLVM :: CodeGen/Lanai/stack-frame.ll
LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
LLVM :: CodeGen/Lanai/subword.ll
LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
LLVM :: CodeGen/MSP430/vararg.ll
LLVM :: CodeGen/Mips/largeimmprinting.ll
LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
LLVM :: CodeGen/Mips/longbranch.ll
LLVM :: CodeGen/Mips/mips64fpldst.ll
LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
LLVM :: CodeGen/Mips/return_address.ll
LLVM :: CodeGen/Mips/select.ll
LLVM :: CodeGen/Mips/tnaked.ll
LLVM :: CodeGen/NVPTX/LoadStoreVectorizer.ll
LLVM :: CodeGen/NVPTX/MachineSink-call.ll
LLVM :: CodeGen/NVPTX/MachineSink-convergent.ll
LLVM :: CodeGen/NVPTX/access-non-generic.ll
LLVM :: CodeGen/NVPTX/addrspacecast.ll
LLVM :: CodeGen/NVPTX/aggregate-return.ll
LLVM :: CodeGen/NVPTX/arg-lowering.ll
LLVM :: CodeGen/NVPTX/arithmetic-fp-sm20.ll
LLVM :: CodeGen/NVPTX/arithmetic-int.ll
LLVM :: CodeGen/NVPTX/atomics.ll
LLVM :: CodeGen/NVPTX/bfe.ll
LLVM :: CodeGen/NVPTX/branch-fold.ll
LLVM :: CodeGen/NVPTX/bug17709.ll
LLVM :: CodeGen/NVPTX/bug26185-2.ll
LLVM :: CodeGen/NVPTX/bug26185.ll
LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
LLVM :: CodeGen/NVPTX/combine-min-max.ll
LLVM :: CodeGen/NVPTX/compare-int.ll
LLVM :: CodeGen/NVPTX/convert-fp.ll
LLVM :: CodeGen/NVPTX/convert-int-sm20.ll
LLVM :: CodeGen/NVPTX/ctlz.ll
LLVM :: CodeGen/NVPTX/ctpop.ll
LLVM :: CodeGen/NVPTX/cttz.ll
LLVM :: CodeGen/NVPTX/disable-opt.ll
LLVM :: CodeGen/NVPTX/div-ri.ll
LLVM :: CodeGen/NVPTX/envreg.ll
LLVM :: CodeGen/NVPTX/f16-instructions.ll
LLVM :: CodeGen/NVPTX/f16x2-instructions.ll
LLVM :: CodeGen/NVPTX/fast-math.ll
LLVM :: CodeGen/NVPTX/fma-assoc.ll
LLVM :: CodeGen/NVPTX/fma-disable.ll
LLVM :: CodeGen/NVPTX/fma.ll
LLVM :: CodeGen/NVPTX/fp-contract.ll
LLVM :: CodeGen/NVPTX/fp-literals.ll
LLVM :: CodeGen/NVPTX/i1-int-to-fp.ll
LLVM :: CodeGen/NVPTX/i8-param.ll
LLVM :: CodeGen/NVPTX/idioms.ll
LLVM :: CodeGen/NVPTX/imad.ll
LLVM :: CodeGen/NVPTX/implicit-def.ll
LLVM :: CodeGen/NVPTX/inline-asm.ll
LLVM :: CodeGen/NVPTX/intrinsic-old.ll
LLVM :: CodeGen/NVPTX/intrinsics.ll
LLVM :: CodeGen/NVPTX/isspacep.ll
LLVM :: CodeGen/NVPTX/ld-addrspace.ll
LLVM :: CodeGen/NVPTX/ld-generic.ll
LLVM :: CodeGen/NVPTX/ldg-invariant.ll
LLVM :: CodeGen/NVPTX/ldu-i8.ll
LLVM :: CodeGen/NVPTX/ldu-ldg.ll
LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
LLVM :: CodeGen/NVPTX/local-stack-frame.ll
LLVM :: CodeGen/NVPTX/lower-aggr-copies.ll
LLVM :: CodeGen/NVPTX/lower-alloca.ll
LLVM :: CodeGen/NVPTX/machine-sink.ll
LLVM :: CodeGen/NVPTX/math-intrins.ll
LLVM :: CodeGen/NVPTX/misaligned-vector-ldst.ll
LLVM :: CodeGen/NVPTX/mulwide.ll
LLVM :: CodeGen/NVPTX/param-align.ll
LLVM :: CodeGen/NVPTX/param-load-store.ll
LLVM :: CodeGen/NVPTX/pr16278.ll
LLVM :: CodeGen/NVPTX/refl1.ll
LLVM :: CodeGen/NVPTX/reg-copy.ll
LLVM :: CodeGen/NVPTX/reg-types.ll
LLVM :: CodeGen/NVPTX/rotate.ll
LLVM :: CodeGen/NVPTX/sext-params.ll
LLVM :: CodeGen/NVPTX/shfl.ll
LLVM :: CodeGen/NVPTX/simple-call.ll
LLVM :: CodeGen/NVPTX/sqrt-approx.ll
LLVM :: CodeGen/NVPTX/symbol-naming.ll
LLVM :: CodeGen/NVPTX/texsurf-queries.ll
LLVM :: CodeGen/NVPTX/tid-range.ll
LLVM :: CodeGen/NVPTX/vec-param-load.ll
LLVM :: CodeGen/NVPTX/vector-args.ll
LLVM :: CodeGen/NVPTX/vector-call.ll
LLVM :: CodeGen/NVPTX/weak-global.ll
LLVM :: CodeGen/NVPTX/zeroext-32bit.ll
LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
LLVM :: CodeGen/PowerPC/Frames-alloca.ll
LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
LLVM :: CodeGen/PowerPC/atomic-2.ll
LLVM :: CodeGen/PowerPC/atomic-minmax.ll
LLVM :: CodeGen/PowerPC/atomics.ll
LLVM :: CodeGen/PowerPC/cr-spills.ll
LLVM :: CodeGen/PowerPC/cr_spilling.ll
LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
LLVM :: CodeGen/PowerPC/early-ret2.ll
LLVM :: CodeGen/PowerPC/emutls_generic.ll
LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
LLVM :: CodeGen/PowerPC/negctr.ll
LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
LLVM :: CodeGen/PowerPC/ppc32-pic-large.ll
LLVM :: CodeGen/PowerPC/ppc32-pic.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
LLVM :: CodeGen/PowerPC/pr16556.ll
LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
LLVM :: CodeGen/PowerPC/pr25157.ll
LLVM :: CodeGen/PowerPC/pr26180.ll
LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
LLVM :: CodeGen/PowerPC/sjlj.ll
LLVM :: CodeGen/PowerPC/stack-realign.ll
LLVM :: CodeGen/PowerPC/stwux.ll
LLVM :: CodeGen/PowerPC/vsel-prom.ll
LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
LLVM :: CodeGen/SPARC/reserved-regs.ll
LLVM :: CodeGen/SPARC/sjlj.ll
LLVM :: CodeGen/SystemZ/cond-load-01.ll
LLVM :: CodeGen/SystemZ/stack-guard.ll
LLVM :: CodeGen/SystemZ/trap-01.ll
LLVM :: CodeGen/SystemZ/trap-02.ll
LLVM :: CodeGen/SystemZ/trap-03.ll
LLVM :: CodeGen/SystemZ/trap-04.ll
LLVM :: CodeGen/SystemZ/trap-05.ll
LLVM :: CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll
LLVM :: CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll
LLVM :: CodeGen/Thumb2/thumb2-ifcvt1.ll
LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
LLVM :: CodeGen/X86/branchfolding-undef.mir
LLVM :: CodeGen/X86/cleanuppad-inalloca.ll
LLVM :: CodeGen/X86/fast-isel-select-sse.ll
LLVM :: CodeGen/X86/inalloca-ctor.ll
LLVM :: CodeGen/X86/inalloca-invoke.ll
LLVM :: CodeGen/X86/inalloca-regparm.ll
LLVM :: CodeGen/X86/inalloca-stdcall.ll
LLVM :: CodeGen/X86/inalloca.ll
LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
LLVM :: CodeGen/X86/musttail-indirect.ll
LLVM :: CodeGen/X86/musttail-thiscall.ll
LLVM :: CodeGen/X86/rtm.ll
LLVM :: CodeGen/X86/scheduler-backtracking.ll
LLVM :: CodeGen/X86/shrink-wrap-chkstk.ll
LLVM :: CodeGen/X86/sibcall-2.ll
LLVM :: CodeGen/X86/sibcall.ll
LLVM :: CodeGen/X86/sjlj-eh.ll
LLVM :: CodeGen/X86/sse-intrinsics-fast-isel.ll
LLVM :: CodeGen/X86/sse-intrinsics-x86.ll
LLVM :: CodeGen/X86/sse-regcall.ll
LLVM :: CodeGen/X86/system-intrinsics-64.ll
LLVM :: CodeGen/X86/system-intrinsics.ll
LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
LLVM :: Transforms/NaryReassociate/NVPTX/nary-slsr.ll
LLVM :: Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/speculative-slsr.ll

Expected Passes : 19171
Expected Failures : 144
Unsupported Tests : 401
Unexpected Failures: 241
@fhahn
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fhahn commented Mar 5, 2017

I've put up a simple patch to enable -verify-machineinstr for EXPENSIVE_CHECKS: https://reviews.llvm.org/D30625

@llvmbot
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llvmbot commented Mar 5, 2017

Adding previously mentioned bug: #27832 which notes failing tests for MIPS with the machine verifier enabled.

@MatzeB
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MatzeB commented Mar 17, 2017

Yep this is the very sad state of affairs. A while ago we did the exercise to cleanup AArch64 and have put a bot running on greendragon which makes sure it stays that way. I would love people pushing to get more targets clean.

Maybe we can add some whitelisting or blacklisting mechanism so we can at least enable it for targets that are clean today?

@RKSimon
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RKSimon commented Mar 22, 2017

Updated list:

Failing Tests (230):
LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
LLVM :: CodeGen/AMDGPU/big_alu.ll
LLVM :: CodeGen/AMDGPU/kernel-args.ll
LLVM :: CodeGen/AMDGPU/literals.ll
LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
LLVM :: CodeGen/AMDGPU/load-constant-i16.ll
LLVM :: CodeGen/AMDGPU/load-constant-i8.ll
LLVM :: CodeGen/AMDGPU/load-global-i16.ll
LLVM :: CodeGen/AMDGPU/load-global-i8.ll
LLVM :: CodeGen/AMDGPU/load-input-fold.ll
LLVM :: CodeGen/AMDGPU/load-local-i16.ll
LLVM :: CodeGen/AMDGPU/load-local-i8.ll
LLVM :: CodeGen/AMDGPU/min.ll
LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
LLVM :: CodeGen/AMDGPU/parallelandifcollapse.ll
LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
LLVM :: CodeGen/AMDGPU/pv-packing.ll
LLVM :: CodeGen/AMDGPU/pv.ll
LLVM :: CodeGen/AMDGPU/r600.bitcast.ll
LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
LLVM :: CodeGen/AMDGPU/setcc.ll
LLVM :: CodeGen/AMDGPU/shl.ll
LLVM :: CodeGen/AMDGPU/sra.ll
LLVM :: CodeGen/AMDGPU/store-global.ll
LLVM :: CodeGen/AMDGPU/store-private.ll
LLVM :: CodeGen/AMDGPU/sub.ll
LLVM :: CodeGen/AMDGPU/swizzle-export.ll
LLVM :: CodeGen/AMDGPU/unknown-processor.ll
LLVM :: CodeGen/AMDGPU/vector-alloca.ll
LLVM :: CodeGen/ARM/2011-04-11-MachineLICMBug.ll
LLVM :: CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
LLVM :: CodeGen/ARM/execute-only.ll
LLVM :: CodeGen/ARM/jump-table-tbh.ll
LLVM :: CodeGen/ARM/v6-jumptable-clobber.mir
LLVM :: CodeGen/Generic/llc-start-stop.ll
LLVM :: CodeGen/Generic/print-machineinstrs.ll
LLVM :: CodeGen/Hexagon/eliminate-pred-spill.ll
LLVM :: CodeGen/Hexagon/expand-vstorerw-undef2.ll
LLVM :: CodeGen/Hexagon/reg-scavengebug-3.ll
LLVM :: CodeGen/Hexagon/reg-scavenger-valid-slot.ll
LLVM :: CodeGen/Hexagon/vec-pred-spill1.ll
LLVM :: CodeGen/Lanai/codemodel.ll
LLVM :: CodeGen/Lanai/comparisons_i32.ll
LLVM :: CodeGen/Lanai/comparisons_i64.ll
LLVM :: CodeGen/Lanai/constant_multiply.ll
LLVM :: CodeGen/Lanai/delay_filler.ll
LLVM :: CodeGen/Lanai/i32.ll
LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
LLVM :: CodeGen/Lanai/lshift64.ll
LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
LLVM :: CodeGen/Lanai/multiply.ll
LLVM :: CodeGen/Lanai/rshift64.ll
LLVM :: CodeGen/Lanai/select.ll
LLVM :: CodeGen/Lanai/set_and_hi.ll
LLVM :: CodeGen/Lanai/shift.ll
LLVM :: CodeGen/Lanai/stack-frame.ll
LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
LLVM :: CodeGen/Lanai/subword.ll
LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
LLVM :: CodeGen/MSP430/vararg.ll
LLVM :: CodeGen/Mips/largeimmprinting.ll
LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
LLVM :: CodeGen/Mips/longbranch.ll
LLVM :: CodeGen/Mips/mips64fpldst.ll
LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
LLVM :: CodeGen/Mips/select.ll
LLVM :: CodeGen/Mips/tailcall/tailcall.ll
LLVM :: CodeGen/NVPTX/LoadStoreVectorizer.ll
LLVM :: CodeGen/NVPTX/MachineSink-call.ll
LLVM :: CodeGen/NVPTX/MachineSink-convergent.ll
LLVM :: CodeGen/NVPTX/access-non-generic.ll
LLVM :: CodeGen/NVPTX/addrspacecast.ll
LLVM :: CodeGen/NVPTX/aggregate-return.ll
LLVM :: CodeGen/NVPTX/arg-lowering.ll
LLVM :: CodeGen/NVPTX/arithmetic-fp-sm20.ll
LLVM :: CodeGen/NVPTX/arithmetic-int.ll
LLVM :: CodeGen/NVPTX/atomics.ll
LLVM :: CodeGen/NVPTX/bfe.ll
LLVM :: CodeGen/NVPTX/branch-fold.ll
LLVM :: CodeGen/NVPTX/bug17709.ll
LLVM :: CodeGen/NVPTX/bug26185-2.ll
LLVM :: CodeGen/NVPTX/bug26185.ll
LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
LLVM :: CodeGen/NVPTX/combine-min-max.ll
LLVM :: CodeGen/NVPTX/compare-int.ll
LLVM :: CodeGen/NVPTX/convert-fp.ll
LLVM :: CodeGen/NVPTX/convert-int-sm20.ll
LLVM :: CodeGen/NVPTX/ctlz.ll
LLVM :: CodeGen/NVPTX/ctpop.ll
LLVM :: CodeGen/NVPTX/cttz.ll
LLVM :: CodeGen/NVPTX/disable-opt.ll
LLVM :: CodeGen/NVPTX/div-ri.ll
LLVM :: CodeGen/NVPTX/envreg.ll
LLVM :: CodeGen/NVPTX/f16-instructions.ll
LLVM :: CodeGen/NVPTX/f16x2-instructions.ll
LLVM :: CodeGen/NVPTX/fast-math.ll
LLVM :: CodeGen/NVPTX/fma-assoc.ll
LLVM :: CodeGen/NVPTX/fma-disable.ll
LLVM :: CodeGen/NVPTX/fma.ll
LLVM :: CodeGen/NVPTX/fp-contract.ll
LLVM :: CodeGen/NVPTX/fp-literals.ll
LLVM :: CodeGen/NVPTX/i1-int-to-fp.ll
LLVM :: CodeGen/NVPTX/i8-param.ll
LLVM :: CodeGen/NVPTX/idioms.ll
LLVM :: CodeGen/NVPTX/imad.ll
LLVM :: CodeGen/NVPTX/implicit-def.ll
LLVM :: CodeGen/NVPTX/inline-asm.ll
LLVM :: CodeGen/NVPTX/intrinsic-old.ll
LLVM :: CodeGen/NVPTX/intrinsics.ll
LLVM :: CodeGen/NVPTX/isspacep.ll
LLVM :: CodeGen/NVPTX/ld-addrspace.ll
LLVM :: CodeGen/NVPTX/ld-generic.ll
LLVM :: CodeGen/NVPTX/ldg-invariant.ll
LLVM :: CodeGen/NVPTX/ldu-i8.ll
LLVM :: CodeGen/NVPTX/ldu-ldg.ll
LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
LLVM :: CodeGen/NVPTX/local-stack-frame.ll
LLVM :: CodeGen/NVPTX/lower-aggr-copies.ll
LLVM :: CodeGen/NVPTX/lower-alloca.ll
LLVM :: CodeGen/NVPTX/machine-sink.ll
LLVM :: CodeGen/NVPTX/math-intrins.ll
LLVM :: CodeGen/NVPTX/misaligned-vector-ldst.ll
LLVM :: CodeGen/NVPTX/mulwide.ll
LLVM :: CodeGen/NVPTX/param-align.ll
LLVM :: CodeGen/NVPTX/param-load-store.ll
LLVM :: CodeGen/NVPTX/pr16278.ll
LLVM :: CodeGen/NVPTX/refl1.ll
LLVM :: CodeGen/NVPTX/reg-copy.ll
LLVM :: CodeGen/NVPTX/reg-types.ll
LLVM :: CodeGen/NVPTX/rotate.ll
LLVM :: CodeGen/NVPTX/sext-params.ll
LLVM :: CodeGen/NVPTX/shfl.ll
LLVM :: CodeGen/NVPTX/simple-call.ll
LLVM :: CodeGen/NVPTX/sqrt-approx.ll
LLVM :: CodeGen/NVPTX/symbol-naming.ll
LLVM :: CodeGen/NVPTX/texsurf-queries.ll
LLVM :: CodeGen/NVPTX/tid-range.ll
LLVM :: CodeGen/NVPTX/vec-param-load.ll
LLVM :: CodeGen/NVPTX/vector-args.ll
LLVM :: CodeGen/NVPTX/vector-call.ll
LLVM :: CodeGen/NVPTX/weak-global.ll
LLVM :: CodeGen/NVPTX/zeroext-32bit.ll
LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
LLVM :: CodeGen/PowerPC/Frames-alloca.ll
LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
LLVM :: CodeGen/PowerPC/atomic-2.ll
LLVM :: CodeGen/PowerPC/atomic-minmax.ll
LLVM :: CodeGen/PowerPC/atomics.ll
LLVM :: CodeGen/PowerPC/cr-spills.ll
LLVM :: CodeGen/PowerPC/cr_spilling.ll
LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
LLVM :: CodeGen/PowerPC/early-ret2.ll
LLVM :: CodeGen/PowerPC/emutls_generic.ll
LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
LLVM :: CodeGen/PowerPC/negctr.ll
LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
LLVM :: CodeGen/PowerPC/ppc32-pic-large.ll
LLVM :: CodeGen/PowerPC/ppc32-pic.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
LLVM :: CodeGen/PowerPC/pr16556.ll
LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
LLVM :: CodeGen/PowerPC/pr25157.ll
LLVM :: CodeGen/PowerPC/pr26180.ll
LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
LLVM :: CodeGen/PowerPC/sjlj.ll
LLVM :: CodeGen/PowerPC/stack-realign.ll
LLVM :: CodeGen/PowerPC/stwux.ll
LLVM :: CodeGen/PowerPC/vsel-prom.ll
LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
LLVM :: CodeGen/SPARC/sjlj.ll
LLVM :: CodeGen/SystemZ/cond-load-01.ll
LLVM :: CodeGen/SystemZ/stack-guard.ll
LLVM :: CodeGen/SystemZ/trap-01.ll
LLVM :: CodeGen/SystemZ/trap-02.ll
LLVM :: CodeGen/SystemZ/trap-03.ll
LLVM :: CodeGen/SystemZ/trap-04.ll
LLVM :: CodeGen/SystemZ/trap-05.ll
LLVM :: CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll
LLVM :: CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll
LLVM :: CodeGen/Thumb2/thumb2-ifcvt1.ll
LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
LLVM :: CodeGen/X86/branchfolding-undef.mir
LLVM :: CodeGen/X86/cleanuppad-inalloca.ll
LLVM :: CodeGen/X86/fast-isel-select-sse.ll
LLVM :: CodeGen/X86/inalloca-ctor.ll
LLVM :: CodeGen/X86/inalloca-invoke.ll
LLVM :: CodeGen/X86/inalloca-regparm.ll
LLVM :: CodeGen/X86/inalloca-stdcall.ll
LLVM :: CodeGen/X86/inalloca.ll
LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
LLVM :: CodeGen/X86/musttail-indirect.ll
LLVM :: CodeGen/X86/musttail-thiscall.ll
LLVM :: CodeGen/X86/rtm.ll
LLVM :: CodeGen/X86/scheduler-backtracking.ll
LLVM :: CodeGen/X86/shrink-wrap-chkstk.ll
LLVM :: CodeGen/X86/sibcall-2.ll
LLVM :: CodeGen/X86/sibcall.ll
LLVM :: CodeGen/X86/sjlj-eh.ll
LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg-complex.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
LLVM :: Transforms/NaryReassociate/NVPTX/nary-slsr.ll
LLVM :: Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/speculative-slsr.ll

Expected Passes : 19172
Expected Failures : 182
Unsupported Tests : 531
Unexpected Failures: 230

@RKSimon
Copy link
Collaborator

RKSimon commented May 9, 2017

Failing Tests (212):
LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
LLVM :: CodeGen/AMDGPU/big_alu.ll
LLVM :: CodeGen/AMDGPU/kernel-args.ll
LLVM :: CodeGen/AMDGPU/literals.ll
LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
LLVM :: CodeGen/AMDGPU/load-constant-i16.ll
LLVM :: CodeGen/AMDGPU/load-constant-i8.ll
LLVM :: CodeGen/AMDGPU/load-global-i16.ll
LLVM :: CodeGen/AMDGPU/load-global-i8.ll
LLVM :: CodeGen/AMDGPU/load-input-fold.ll
LLVM :: CodeGen/AMDGPU/load-local-i16.ll
LLVM :: CodeGen/AMDGPU/load-local-i8.ll
LLVM :: CodeGen/AMDGPU/min.ll
LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
LLVM :: CodeGen/AMDGPU/parallelandifcollapse.ll
LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
LLVM :: CodeGen/AMDGPU/pv-packing.ll
LLVM :: CodeGen/AMDGPU/pv.ll
LLVM :: CodeGen/AMDGPU/r600.bitcast.ll
LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
LLVM :: CodeGen/AMDGPU/setcc.ll
LLVM :: CodeGen/AMDGPU/shl.ll
LLVM :: CodeGen/AMDGPU/sra.ll
LLVM :: CodeGen/AMDGPU/store-global.ll
LLVM :: CodeGen/AMDGPU/store-private.ll
LLVM :: CodeGen/AMDGPU/sub.ll
LLVM :: CodeGen/AMDGPU/swizzle-export.ll
LLVM :: CodeGen/AMDGPU/unknown-processor.ll
LLVM :: CodeGen/AMDGPU/vector-alloca.ll
LLVM :: CodeGen/ARM/2011-04-11-MachineLICMBug.ll
LLVM :: CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
LLVM :: CodeGen/ARM/execute-only.ll
LLVM :: CodeGen/ARM/jump-table-tbh.ll
LLVM :: CodeGen/ARM/unschedule-first-call.ll
LLVM :: CodeGen/ARM/v6-jumptable-clobber.mir
LLVM :: CodeGen/Generic/llc-start-stop.ll
LLVM :: CodeGen/Generic/print-machineinstrs.ll
LLVM :: CodeGen/Hexagon/eliminate-pred-spill.ll
LLVM :: CodeGen/Hexagon/reg-scavengebug-3.ll
LLVM :: CodeGen/Hexagon/reg-scavenger-valid-slot.ll
LLVM :: CodeGen/Hexagon/vec-pred-spill1.ll
LLVM :: CodeGen/Lanai/codemodel.ll
LLVM :: CodeGen/Lanai/comparisons_i32.ll
LLVM :: CodeGen/Lanai/comparisons_i64.ll
LLVM :: CodeGen/Lanai/constant_multiply.ll
LLVM :: CodeGen/Lanai/delay_filler.ll
LLVM :: CodeGen/Lanai/i32.ll
LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
LLVM :: CodeGen/Lanai/lshift64.ll
LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
LLVM :: CodeGen/Lanai/multiply.ll
LLVM :: CodeGen/Lanai/rshift64.ll
LLVM :: CodeGen/Lanai/select.ll
LLVM :: CodeGen/Lanai/set_and_hi.ll
LLVM :: CodeGen/Lanai/shift.ll
LLVM :: CodeGen/Lanai/stack-frame.ll
LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
LLVM :: CodeGen/Lanai/subword.ll
LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
LLVM :: CodeGen/MSP430/vararg.ll
LLVM :: CodeGen/Mips/largeimmprinting.ll
LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
LLVM :: CodeGen/Mips/longbranch.ll
LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
LLVM :: CodeGen/Mips/select.ll
LLVM :: CodeGen/Mips/tailcall/tailcall.ll
LLVM :: CodeGen/NVPTX/LoadStoreVectorizer.ll
LLVM :: CodeGen/NVPTX/MachineSink-call.ll
LLVM :: CodeGen/NVPTX/MachineSink-convergent.ll
LLVM :: CodeGen/NVPTX/access-non-generic.ll
LLVM :: CodeGen/NVPTX/addrspacecast.ll
LLVM :: CodeGen/NVPTX/aggregate-return.ll
LLVM :: CodeGen/NVPTX/arg-lowering.ll
LLVM :: CodeGen/NVPTX/arithmetic-fp-sm20.ll
LLVM :: CodeGen/NVPTX/arithmetic-int.ll
LLVM :: CodeGen/NVPTX/atomics.ll
LLVM :: CodeGen/NVPTX/bfe.ll
LLVM :: CodeGen/NVPTX/branch-fold.ll
LLVM :: CodeGen/NVPTX/bug17709.ll
LLVM :: CodeGen/NVPTX/bug26185-2.ll
LLVM :: CodeGen/NVPTX/bug26185.ll
LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
LLVM :: CodeGen/NVPTX/combine-min-max.ll
LLVM :: CodeGen/NVPTX/compare-int.ll
LLVM :: CodeGen/NVPTX/convert-fp.ll
LLVM :: CodeGen/NVPTX/convert-int-sm20.ll
LLVM :: CodeGen/NVPTX/ctlz.ll
LLVM :: CodeGen/NVPTX/ctpop.ll
LLVM :: CodeGen/NVPTX/cttz.ll
LLVM :: CodeGen/NVPTX/disable-opt.ll
LLVM :: CodeGen/NVPTX/div-ri.ll
LLVM :: CodeGen/NVPTX/envreg.ll
LLVM :: CodeGen/NVPTX/f16-instructions.ll
LLVM :: CodeGen/NVPTX/f16x2-instructions.ll
LLVM :: CodeGen/NVPTX/fast-math.ll
LLVM :: CodeGen/NVPTX/fma-assoc.ll
LLVM :: CodeGen/NVPTX/fma-disable.ll
LLVM :: CodeGen/NVPTX/fma.ll
LLVM :: CodeGen/NVPTX/fp-contract.ll
LLVM :: CodeGen/NVPTX/fp-literals.ll
LLVM :: CodeGen/NVPTX/i1-int-to-fp.ll
LLVM :: CodeGen/NVPTX/i8-param.ll
LLVM :: CodeGen/NVPTX/idioms.ll
LLVM :: CodeGen/NVPTX/imad.ll
LLVM :: CodeGen/NVPTX/implicit-def.ll
LLVM :: CodeGen/NVPTX/inline-asm.ll
LLVM :: CodeGen/NVPTX/intrinsic-old.ll
LLVM :: CodeGen/NVPTX/intrinsics.ll
LLVM :: CodeGen/NVPTX/isspacep.ll
LLVM :: CodeGen/NVPTX/ld-addrspace.ll
LLVM :: CodeGen/NVPTX/ld-generic.ll
LLVM :: CodeGen/NVPTX/ldg-invariant.ll
LLVM :: CodeGen/NVPTX/ldu-i8.ll
LLVM :: CodeGen/NVPTX/ldu-ldg.ll
LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
LLVM :: CodeGen/NVPTX/local-stack-frame.ll
LLVM :: CodeGen/NVPTX/lower-aggr-copies.ll
LLVM :: CodeGen/NVPTX/lower-alloca.ll
LLVM :: CodeGen/NVPTX/machine-sink.ll
LLVM :: CodeGen/NVPTX/math-intrins.ll
LLVM :: CodeGen/NVPTX/misaligned-vector-ldst.ll
LLVM :: CodeGen/NVPTX/mulwide.ll
LLVM :: CodeGen/NVPTX/param-align.ll
LLVM :: CodeGen/NVPTX/param-load-store.ll
LLVM :: CodeGen/NVPTX/pr16278.ll
LLVM :: CodeGen/NVPTX/refl1.ll
LLVM :: CodeGen/NVPTX/reg-copy.ll
LLVM :: CodeGen/NVPTX/reg-types.ll
LLVM :: CodeGen/NVPTX/rotate.ll
LLVM :: CodeGen/NVPTX/sext-params.ll
LLVM :: CodeGen/NVPTX/shfl.ll
LLVM :: CodeGen/NVPTX/simple-call.ll
LLVM :: CodeGen/NVPTX/sqrt-approx.ll
LLVM :: CodeGen/NVPTX/symbol-naming.ll
LLVM :: CodeGen/NVPTX/texsurf-queries.ll
LLVM :: CodeGen/NVPTX/tid-range.ll
LLVM :: CodeGen/NVPTX/vec-param-load.ll
LLVM :: CodeGen/NVPTX/vector-args.ll
LLVM :: CodeGen/NVPTX/vector-call.ll
LLVM :: CodeGen/NVPTX/weak-global.ll
LLVM :: CodeGen/NVPTX/zeroext-32bit.ll
LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
LLVM :: CodeGen/PowerPC/Frames-alloca.ll
LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
LLVM :: CodeGen/PowerPC/atomic-2.ll
LLVM :: CodeGen/PowerPC/atomic-minmax.ll
LLVM :: CodeGen/PowerPC/atomics.ll
LLVM :: CodeGen/PowerPC/cr-spills.ll
LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
LLVM :: CodeGen/PowerPC/early-ret2.ll
LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
LLVM :: CodeGen/PowerPC/negctr.ll
LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
LLVM :: CodeGen/PowerPC/pr16556.ll
LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
LLVM :: CodeGen/PowerPC/pr25157.ll
LLVM :: CodeGen/PowerPC/pr26180.ll
LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
LLVM :: CodeGen/PowerPC/sjlj.ll
LLVM :: CodeGen/PowerPC/stwux.ll
LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
LLVM :: CodeGen/SPARC/sjlj.ll
LLVM :: CodeGen/SystemZ/stack-guard.ll
LLVM :: CodeGen/SystemZ/trap-01.ll
LLVM :: CodeGen/SystemZ/trap-02.ll
LLVM :: CodeGen/SystemZ/trap-03.ll
LLVM :: CodeGen/SystemZ/trap-04.ll
LLVM :: CodeGen/SystemZ/trap-05.ll
LLVM :: CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll
LLVM :: CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll
LLVM :: CodeGen/Thumb2/thumb2-ifcvt1.ll
LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
LLVM :: CodeGen/X86/branchfolding-undef.mir
LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
LLVM :: CodeGen/X86/rtm.ll
LLVM :: CodeGen/X86/scheduler-backtracking.ll
LLVM :: CodeGen/X86/sibcall-2.ll
LLVM :: CodeGen/X86/sibcall.ll
LLVM :: CodeGen/X86/sjlj-eh.ll
LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg-complex.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
LLVM :: Transforms/NaryReassociate/NVPTX/nary-slsr.ll
LLVM :: Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/speculative-slsr.ll

@RKSimon
Copy link
Collaborator

RKSimon commented May 12, 2017

Failing Tests (166):
LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
LLVM :: CodeGen/AMDGPU/big_alu.ll
LLVM :: CodeGen/AMDGPU/kernel-args.ll
LLVM :: CodeGen/AMDGPU/literals.ll
LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
LLVM :: CodeGen/AMDGPU/load-constant-i16.ll
LLVM :: CodeGen/AMDGPU/load-constant-i8.ll
LLVM :: CodeGen/AMDGPU/load-global-i16.ll
LLVM :: CodeGen/AMDGPU/load-global-i8.ll
LLVM :: CodeGen/AMDGPU/load-input-fold.ll
LLVM :: CodeGen/AMDGPU/load-local-i16.ll
LLVM :: CodeGen/AMDGPU/load-local-i8.ll
LLVM :: CodeGen/AMDGPU/min.ll
LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
LLVM :: CodeGen/AMDGPU/parallelandifcollapse.ll
LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
LLVM :: CodeGen/AMDGPU/pv-packing.ll
LLVM :: CodeGen/AMDGPU/pv.ll
LLVM :: CodeGen/AMDGPU/r600.bitcast.ll
LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
LLVM :: CodeGen/AMDGPU/setcc.ll
LLVM :: CodeGen/AMDGPU/shl.ll
LLVM :: CodeGen/AMDGPU/sra.ll
LLVM :: CodeGen/AMDGPU/store-global.ll
LLVM :: CodeGen/AMDGPU/store-private.ll
LLVM :: CodeGen/AMDGPU/sub.ll
LLVM :: CodeGen/AMDGPU/swizzle-export.ll
LLVM :: CodeGen/AMDGPU/unknown-processor.ll
LLVM :: CodeGen/AMDGPU/vector-alloca.ll
LLVM :: CodeGen/ARM/2011-04-11-MachineLICMBug.ll
LLVM :: CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
LLVM :: CodeGen/ARM/execute-only.ll
LLVM :: CodeGen/ARM/jump-table-tbh.ll
LLVM :: CodeGen/ARM/unschedule-first-call.ll
LLVM :: CodeGen/ARM/v6-jumptable-clobber.mir
LLVM :: CodeGen/Generic/llc-start-stop.ll
LLVM :: CodeGen/Generic/print-machineinstrs.ll
LLVM :: CodeGen/Hexagon/eliminate-pred-spill.ll
LLVM :: CodeGen/Hexagon/reg-scavengebug-3.ll
LLVM :: CodeGen/Hexagon/reg-scavenger-valid-slot.ll
LLVM :: CodeGen/Hexagon/vec-pred-spill1.ll
LLVM :: CodeGen/Lanai/codemodel.ll
LLVM :: CodeGen/Lanai/comparisons_i32.ll
LLVM :: CodeGen/Lanai/comparisons_i64.ll
LLVM :: CodeGen/Lanai/constant_multiply.ll
LLVM :: CodeGen/Lanai/delay_filler.ll
LLVM :: CodeGen/Lanai/i32.ll
LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
LLVM :: CodeGen/Lanai/lshift64.ll
LLVM :: CodeGen/Lanai/masking_setccs.ll
LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
LLVM :: CodeGen/Lanai/multiply.ll
LLVM :: CodeGen/Lanai/rshift64.ll
LLVM :: CodeGen/Lanai/select.ll
LLVM :: CodeGen/Lanai/set_and_hi.ll
LLVM :: CodeGen/Lanai/shift.ll
LLVM :: CodeGen/Lanai/stack-frame.ll
LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
LLVM :: CodeGen/Lanai/subword.ll
LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
LLVM :: CodeGen/MSP430/vararg.ll
LLVM :: CodeGen/Mips/largeimmprinting.ll
LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
LLVM :: CodeGen/Mips/longbranch.ll
LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
LLVM :: CodeGen/Mips/select.ll
LLVM :: CodeGen/Mips/tailcall/tailcall.ll
LLVM :: CodeGen/NVPTX/access-non-generic.ll
LLVM :: CodeGen/NVPTX/aggregate-return.ll
LLVM :: CodeGen/NVPTX/branch-fold.ll
LLVM :: CodeGen/NVPTX/bug17709.ll
LLVM :: CodeGen/NVPTX/bug26185-2.ll
LLVM :: CodeGen/NVPTX/bug26185.ll
LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
LLVM :: CodeGen/NVPTX/disable-opt.ll
LLVM :: CodeGen/NVPTX/envreg.ll
LLVM :: CodeGen/NVPTX/f16-instructions.ll
LLVM :: CodeGen/NVPTX/f16x2-instructions.ll
LLVM :: CodeGen/NVPTX/fma.ll
LLVM :: CodeGen/NVPTX/i8-param.ll
LLVM :: CodeGen/NVPTX/ldg-invariant.ll
LLVM :: CodeGen/NVPTX/ldu-i8.ll
LLVM :: CodeGen/NVPTX/ldu-ldg.ll
LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
LLVM :: CodeGen/NVPTX/local-stack-frame.ll
LLVM :: CodeGen/NVPTX/lower-alloca.ll
LLVM :: CodeGen/NVPTX/param-align.ll
LLVM :: CodeGen/NVPTX/param-load-store.ll
LLVM :: CodeGen/NVPTX/refl1.ll
LLVM :: CodeGen/NVPTX/reg-copy.ll
LLVM :: CodeGen/NVPTX/reg-types.ll
LLVM :: CodeGen/NVPTX/simple-call.ll
LLVM :: CodeGen/NVPTX/symbol-naming.ll
LLVM :: CodeGen/NVPTX/vector-call.ll
LLVM :: CodeGen/NVPTX/zeroext-32bit.ll
LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
LLVM :: CodeGen/PowerPC/Frames-alloca.ll
LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
LLVM :: CodeGen/PowerPC/atomic-2.ll
LLVM :: CodeGen/PowerPC/atomic-minmax.ll
LLVM :: CodeGen/PowerPC/atomics.ll
LLVM :: CodeGen/PowerPC/cr-spills.ll
LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
LLVM :: CodeGen/PowerPC/early-ret2.ll
LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
LLVM :: CodeGen/PowerPC/negctr.ll
LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
LLVM :: CodeGen/PowerPC/pr16556.ll
LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
LLVM :: CodeGen/PowerPC/pr25157.ll
LLVM :: CodeGen/PowerPC/pr26180.ll
LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
LLVM :: CodeGen/PowerPC/sjlj.ll
LLVM :: CodeGen/PowerPC/stwux.ll
LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
LLVM :: CodeGen/SPARC/sjlj.ll
LLVM :: CodeGen/SystemZ/stack-guard.ll
LLVM :: CodeGen/SystemZ/trap-01.ll
LLVM :: CodeGen/SystemZ/trap-02.ll
LLVM :: CodeGen/SystemZ/trap-03.ll
LLVM :: CodeGen/SystemZ/trap-04.ll
LLVM :: CodeGen/SystemZ/trap-05.ll
LLVM :: CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll
LLVM :: CodeGen/Thumb2/thumb2-ifcvt1.ll
LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
LLVM :: CodeGen/X86/O0-pipeline.ll
LLVM :: CodeGen/X86/branchfolding-undef.mir
LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
LLVM :: CodeGen/X86/rtm.ll
LLVM :: CodeGen/X86/scheduler-backtracking.ll
LLVM :: CodeGen/X86/sibcall-2.ll
LLVM :: CodeGen/X86/sibcall.ll
LLVM :: CodeGen/X86/sjlj-eh.ll
LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg-complex.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
LLVM :: Transforms/NaryReassociate/NVPTX/nary-slsr.ll
LLVM :: Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/speculative-slsr.ll

@RKSimon
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RKSimon commented May 22, 2017

Failing Tests (148):
LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
LLVM :: CodeGen/AMDGPU/big_alu.ll
LLVM :: CodeGen/AMDGPU/kernel-args.ll
LLVM :: CodeGen/AMDGPU/literals.ll
LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
LLVM :: CodeGen/AMDGPU/load-constant-i16.ll
LLVM :: CodeGen/AMDGPU/load-constant-i8.ll
LLVM :: CodeGen/AMDGPU/load-global-i16.ll
LLVM :: CodeGen/AMDGPU/load-global-i8.ll
LLVM :: CodeGen/AMDGPU/load-input-fold.ll
LLVM :: CodeGen/AMDGPU/load-local-i16.ll
LLVM :: CodeGen/AMDGPU/load-local-i8.ll
LLVM :: CodeGen/AMDGPU/min.ll
LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
LLVM :: CodeGen/AMDGPU/parallelandifcollapse.ll
LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
LLVM :: CodeGen/AMDGPU/pv-packing.ll
LLVM :: CodeGen/AMDGPU/pv.ll
LLVM :: CodeGen/AMDGPU/r600.bitcast.ll
LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
LLVM :: CodeGen/AMDGPU/setcc.ll
LLVM :: CodeGen/AMDGPU/shl.ll
LLVM :: CodeGen/AMDGPU/sra.ll
LLVM :: CodeGen/AMDGPU/store-global.ll
LLVM :: CodeGen/AMDGPU/store-private.ll
LLVM :: CodeGen/AMDGPU/sub.ll
LLVM :: CodeGen/AMDGPU/swizzle-export.ll
LLVM :: CodeGen/AMDGPU/unknown-processor.ll
LLVM :: CodeGen/AMDGPU/vector-alloca.ll
LLVM :: CodeGen/ARM/2011-04-11-MachineLICMBug.ll
LLVM :: CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
LLVM :: CodeGen/ARM/GlobalISel/arm-irtranslator.ll
LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
LLVM :: CodeGen/ARM/execute-only.ll
LLVM :: CodeGen/ARM/jump-table-tbh.ll
LLVM :: CodeGen/ARM/unschedule-first-call.ll
LLVM :: CodeGen/ARM/v6-jumptable-clobber.mir
LLVM :: CodeGen/Generic/llc-start-stop.ll
LLVM :: CodeGen/Generic/print-machineinstrs.ll
LLVM :: CodeGen/Lanai/codemodel.ll
LLVM :: CodeGen/Lanai/comparisons_i32.ll
LLVM :: CodeGen/Lanai/comparisons_i64.ll
LLVM :: CodeGen/Lanai/constant_multiply.ll
LLVM :: CodeGen/Lanai/delay_filler.ll
LLVM :: CodeGen/Lanai/i32.ll
LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
LLVM :: CodeGen/Lanai/lshift64.ll
LLVM :: CodeGen/Lanai/masking_setccs.ll
LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
LLVM :: CodeGen/Lanai/multiply.ll
LLVM :: CodeGen/Lanai/rshift64.ll
LLVM :: CodeGen/Lanai/select.ll
LLVM :: CodeGen/Lanai/set_and_hi.ll
LLVM :: CodeGen/Lanai/shift.ll
LLVM :: CodeGen/Lanai/stack-frame.ll
LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
LLVM :: CodeGen/Lanai/subword.ll
LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
LLVM :: CodeGen/MSP430/vararg.ll
LLVM :: CodeGen/Mips/largeimmprinting.ll
LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
LLVM :: CodeGen/Mips/longbranch.ll
LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
LLVM :: CodeGen/Mips/select.ll
LLVM :: CodeGen/Mips/tailcall/tailcall.ll
LLVM :: CodeGen/NVPTX/branch-fold.ll
LLVM :: CodeGen/NVPTX/bug26185-2.ll
LLVM :: CodeGen/NVPTX/bug26185.ll
LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
LLVM :: CodeGen/NVPTX/disable-opt.ll
LLVM :: CodeGen/NVPTX/envreg.ll
LLVM :: CodeGen/NVPTX/ldg-invariant.ll
LLVM :: CodeGen/NVPTX/ldu-i8.ll
LLVM :: CodeGen/NVPTX/ldu-ldg.ll
LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
LLVM :: CodeGen/NVPTX/local-stack-frame.ll
LLVM :: CodeGen/NVPTX/lower-alloca.ll
LLVM :: CodeGen/NVPTX/param-align.ll
LLVM :: CodeGen/NVPTX/reg-copy.ll
LLVM :: CodeGen/NVPTX/reg-types.ll
LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
LLVM :: CodeGen/PowerPC/Frames-alloca.ll
LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
LLVM :: CodeGen/PowerPC/atomic-2.ll
LLVM :: CodeGen/PowerPC/atomic-minmax.ll
LLVM :: CodeGen/PowerPC/atomics-indexed.ll
LLVM :: CodeGen/PowerPC/atomics-regression.ll
LLVM :: CodeGen/PowerPC/atomics.ll
LLVM :: CodeGen/PowerPC/cr-spills.ll
LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
LLVM :: CodeGen/PowerPC/early-ret2.ll
LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
LLVM :: CodeGen/PowerPC/negctr.ll
LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
LLVM :: CodeGen/PowerPC/pr16556.ll
LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
LLVM :: CodeGen/PowerPC/pr25157.ll
LLVM :: CodeGen/PowerPC/pr26180.ll
LLVM :: CodeGen/PowerPC/pr30451.ll
LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
LLVM :: CodeGen/PowerPC/sjlj.ll
LLVM :: CodeGen/PowerPC/stwux.ll
LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
LLVM :: CodeGen/SPARC/sjlj.ll
LLVM :: CodeGen/SystemZ/stack-guard.ll
LLVM :: CodeGen/SystemZ/trap-01.ll
LLVM :: CodeGen/SystemZ/trap-02.ll
LLVM :: CodeGen/SystemZ/trap-03.ll
LLVM :: CodeGen/SystemZ/trap-04.ll
LLVM :: CodeGen/SystemZ/trap-05.ll
LLVM :: CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll
LLVM :: CodeGen/Thumb2/thumb2-ifcvt1.ll
LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
LLVM :: CodeGen/X86/O0-pipeline.ll
LLVM :: CodeGen/X86/branchfolding-undef.mir
LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
LLVM :: CodeGen/X86/scheduler-backtracking.ll
LLVM :: CodeGen/X86/sibcall-2.ll
LLVM :: CodeGen/X86/sibcall.ll
LLVM :: CodeGen/X86/sjlj-eh.ll
LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg-complex.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir

@RKSimon
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RKSimon commented May 30, 2017

Failing Tests (127):
LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
LLVM :: CodeGen/AMDGPU/big_alu.ll
LLVM :: CodeGen/AMDGPU/literals.ll
LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
LLVM :: CodeGen/AMDGPU/load-input-fold.ll
LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
LLVM :: CodeGen/AMDGPU/pv-packing.ll
LLVM :: CodeGen/AMDGPU/pv.ll
LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
LLVM :: CodeGen/AMDGPU/swizzle-export.ll
LLVM :: CodeGen/AMDGPU/vector-alloca.ll
LLVM :: CodeGen/ARM/GlobalISel/arm-irtranslator.ll
LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
LLVM :: CodeGen/ARM/constant-island-crash.ll
LLVM :: CodeGen/ARM/jump-table-tbh.ll
LLVM :: CodeGen/ARM/unschedule-first-call.ll
LLVM :: CodeGen/ARM/v6-jumptable-clobber.mir
LLVM :: CodeGen/Generic/llc-start-stop.ll
LLVM :: CodeGen/Generic/print-machineinstrs.ll
LLVM :: CodeGen/Lanai/codemodel.ll
LLVM :: CodeGen/Lanai/comparisons_i32.ll
LLVM :: CodeGen/Lanai/comparisons_i64.ll
LLVM :: CodeGen/Lanai/constant_multiply.ll
LLVM :: CodeGen/Lanai/delay_filler.ll
LLVM :: CodeGen/Lanai/i32.ll
LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
LLVM :: CodeGen/Lanai/lshift64.ll
LLVM :: CodeGen/Lanai/masking_setccs.ll
LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
LLVM :: CodeGen/Lanai/multiply.ll
LLVM :: CodeGen/Lanai/rshift64.ll
LLVM :: CodeGen/Lanai/select.ll
LLVM :: CodeGen/Lanai/set_and_hi.ll
LLVM :: CodeGen/Lanai/shift.ll
LLVM :: CodeGen/Lanai/stack-frame.ll
LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
LLVM :: CodeGen/Lanai/subword.ll
LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
LLVM :: CodeGen/Mips/largeimmprinting.ll
LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
LLVM :: CodeGen/Mips/longbranch.ll
LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
LLVM :: CodeGen/Mips/select.ll
LLVM :: CodeGen/Mips/tailcall/tailcall.ll
LLVM :: CodeGen/NVPTX/branch-fold.ll
LLVM :: CodeGen/NVPTX/bug26185-2.ll
LLVM :: CodeGen/NVPTX/bug26185.ll
LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
LLVM :: CodeGen/NVPTX/disable-opt.ll
LLVM :: CodeGen/NVPTX/envreg.ll
LLVM :: CodeGen/NVPTX/ldg-invariant.ll
LLVM :: CodeGen/NVPTX/ldu-i8.ll
LLVM :: CodeGen/NVPTX/ldu-ldg.ll
LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
LLVM :: CodeGen/NVPTX/local-stack-frame.ll
LLVM :: CodeGen/NVPTX/lower-alloca.ll
LLVM :: CodeGen/NVPTX/param-align.ll
LLVM :: CodeGen/NVPTX/reg-copy.ll
LLVM :: CodeGen/NVPTX/reg-types.ll
LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
LLVM :: CodeGen/PowerPC/Frames-alloca.ll
LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
LLVM :: CodeGen/PowerPC/atomic-2.ll
LLVM :: CodeGen/PowerPC/atomic-minmax.ll
LLVM :: CodeGen/PowerPC/atomics-constant.ll
LLVM :: CodeGen/PowerPC/atomics-indexed.ll
LLVM :: CodeGen/PowerPC/atomics-regression.ll
LLVM :: CodeGen/PowerPC/atomics.ll
LLVM :: CodeGen/PowerPC/cr-spills.ll
LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
LLVM :: CodeGen/PowerPC/early-ret2.ll
LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
LLVM :: CodeGen/PowerPC/negctr.ll
LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
LLVM :: CodeGen/PowerPC/pr16556.ll
LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
LLVM :: CodeGen/PowerPC/pr25157.ll
LLVM :: CodeGen/PowerPC/pr26180.ll
LLVM :: CodeGen/PowerPC/pr30451.ll
LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
LLVM :: CodeGen/PowerPC/sjlj.ll
LLVM :: CodeGen/PowerPC/stwux.ll
LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
LLVM :: CodeGen/SPARC/sjlj.ll
LLVM :: CodeGen/SystemZ/trap-01.ll
LLVM :: CodeGen/SystemZ/trap-02.ll
LLVM :: CodeGen/SystemZ/trap-03.ll
LLVM :: CodeGen/SystemZ/trap-04.ll
LLVM :: CodeGen/SystemZ/trap-05.ll
LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
LLVM :: CodeGen/X86/O0-pipeline.ll
LLVM :: CodeGen/X86/branchfolding-undef.mir
LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
LLVM :: CodeGen/X86/scheduler-backtracking.ll
LLVM :: CodeGen/X86/sibcall-2.ll
LLVM :: CodeGen/X86/sibcall.ll
LLVM :: CodeGen/X86/sjlj-eh.ll
LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg-complex.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
LLVM :: DebugInfo/MIR/X86/empty-inline.mir

@MatzeB
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MatzeB commented May 30, 2017

I just proposed a "pragmatic" way forward where we would fix targets one by one and indicate clean/broken by a targetmachine callback: https://reviews.llvm.org/D33696

@rovka
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rovka commented Jun 5, 2017

Fixed CodeGen/ARM/GlobalISel/arm-irtranslator.ll in r304712. Sorry I didn't notice this sooner!

@fhahn
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fhahn commented Jun 26, 2017

I just put https://reviews.llvm.org/D34610 up for review, which should fix all remaining failures on ARM except
CodeGen/ARM/unschedule-first-call.ll

@francisvm
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Update:

Failing Tests (114):
LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
LLVM :: CodeGen/AMDGPU/big_alu.ll
LLVM :: CodeGen/AMDGPU/literals.ll
LLVM :: CodeGen/AMDGPU/load-input-fold.ll
LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
LLVM :: CodeGen/AMDGPU/pv-packing.ll
LLVM :: CodeGen/AMDGPU/pv.ll
LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
LLVM :: CodeGen/AMDGPU/swizzle-export.ll
LLVM :: CodeGen/AMDGPU/vector-alloca.ll
LLVM :: CodeGen/Generic/zero-probability.mir
LLVM :: CodeGen/Lanai/codemodel.ll
LLVM :: CodeGen/Lanai/comparisons_i32.ll
LLVM :: CodeGen/Lanai/comparisons_i64.ll
LLVM :: CodeGen/Lanai/constant_multiply.ll
LLVM :: CodeGen/Lanai/delay_filler.ll
LLVM :: CodeGen/Lanai/i32.ll
LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
LLVM :: CodeGen/Lanai/lshift64.ll
LLVM :: CodeGen/Lanai/masking_setccs.ll
LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
LLVM :: CodeGen/Lanai/multiply.ll
LLVM :: CodeGen/Lanai/rshift64.ll
LLVM :: CodeGen/Lanai/select.ll
LLVM :: CodeGen/Lanai/set_and_hi.ll
LLVM :: CodeGen/Lanai/shift.ll
LLVM :: CodeGen/Lanai/stack-frame.ll
LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
LLVM :: CodeGen/Lanai/subword.ll
LLVM :: CodeGen/MIR/X86/diexpr-win32.mir
LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
LLVM :: CodeGen/NVPTX/bug26185-2.ll
LLVM :: CodeGen/NVPTX/bug26185.ll
LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
LLVM :: CodeGen/NVPTX/disable-opt.ll
LLVM :: CodeGen/NVPTX/envreg.ll
LLVM :: CodeGen/NVPTX/ldg-invariant.ll
LLVM :: CodeGen/NVPTX/ldu-i8.ll
LLVM :: CodeGen/NVPTX/ldu-ldg.ll
LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
LLVM :: CodeGen/NVPTX/local-stack-frame.ll
LLVM :: CodeGen/NVPTX/lower-alloca.ll
LLVM :: CodeGen/NVPTX/param-align.ll
LLVM :: CodeGen/NVPTX/read-global-variable-constant.ll
LLVM :: CodeGen/NVPTX/reg-copy.ll
LLVM :: CodeGen/NVPTX/reg-types.ll
LLVM :: CodeGen/PowerPC/#35812 -neg-cmpxchg.ll
LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
LLVM :: CodeGen/PowerPC/atomic-2.ll
LLVM :: CodeGen/PowerPC/atomic-minmax.ll
LLVM :: CodeGen/PowerPC/atomics.ll
LLVM :: CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
LLVM :: CodeGen/PowerPC/cr-spills.ll
LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
LLVM :: CodeGen/PowerPC/early-ret2.ll
LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
LLVM :: CodeGen/PowerPC/negctr.ll
LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
LLVM :: CodeGen/PowerPC/pr16556.ll
LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
LLVM :: CodeGen/PowerPC/pr25157.ll
LLVM :: CodeGen/PowerPC/pr26180.ll
LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
LLVM :: CodeGen/PowerPC/stwux.ll
LLVM :: CodeGen/PowerPC/vsel-prom.ll
LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
LLVM :: CodeGen/PowerPC/xray-ret-is-terminator.ll
LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
LLVM :: CodeGen/SPARC/sjlj.ll
LLVM :: CodeGen/X86/O0-pipeline.ll
LLVM :: CodeGen/X86/O3-pipeline.ll
LLVM :: CodeGen/X86/#37310 .mir
LLVM :: CodeGen/X86/avx512-regcall-NoMask.ll
LLVM :: CodeGen/X86/branch_instruction_and_target_split_perf_nops.mir
LLVM :: CodeGen/X86/branchfolding-undef.mir
LLVM :: CodeGen/X86/fentry-insertion.ll
LLVM :: CodeGen/X86/icall-branch-funnel.ll
LLVM :: CodeGen/X86/indirect-branch-tracking.ll
LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
LLVM :: CodeGen/X86/machine-outliner-disubprogram.ll
LLVM :: CodeGen/X86/machine-outliner-tailcalls.ll
LLVM :: CodeGen/X86/patchable-prologue.ll
LLVM :: CodeGen/X86/retpoline-regparm.ll
LLVM :: CodeGen/X86/retpoline.ll
LLVM :: CodeGen/X86/scheduler-backtracking.ll
LLVM :: CodeGen/X86/shadow-stack.ll
LLVM :: CodeGen/X86/sibcall-2.ll
LLVM :: CodeGen/X86/sibcall.ll
LLVM :: CodeGen/X86/sjlj-eh.ll
LLVM :: CodeGen/X86/sse-intrinsics-fast-isel-x86_64.ll
LLVM :: CodeGen/X86/sse-intrinsics-fast-isel.ll
LLVM :: CodeGen/X86/sse2-intrinsics-fast-isel-x86_64.ll
LLVM :: CodeGen/X86/sse2-intrinsics-fast-isel.ll
LLVM :: CodeGen/X86/sse42-intrinsics-fast-isel.ll
LLVM :: CodeGen/X86/sse42-intrinsics-x86.ll
LLVM :: CodeGen/X86/sttni.ll
LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
LLVM :: CodeGen/X86/xray-attribute-instrumentation.ll
LLVM :: CodeGen/X86/xray-custom-log.ll
LLVM :: CodeGen/X86/xray-log-args.ll
LLVM :: CodeGen/X86/xray-loop-detection.ll
LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
LLVM :: CodeGen/X86/xray-section-group.ll
LLVM :: CodeGen/X86/xray-selective-instrumentation.ll
LLVM :: CodeGen/X86/xray-tail-call-sled.ll
LLVM :: CodeGen/X86/xray-typed-event-log.ll
LLVM :: DebugInfo/Generic/linear-dbg-value.ll
LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
LLVM :: DebugInfo/MIR/X86/empty-inline.mir
LLVM :: DebugInfo/NVPTX/dbg-declare-alloca.ll
LLVM :: DebugInfo/X86/live-debug-vars-discard-invalid.mir

@rnk
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rnk commented Oct 24, 2018

Given that tons of tests already enable the machine verifier, why don't we flip the default, at least for llc, our testing tool of choice?

Consider:
$ git grep -l '[-]verify-machine' ../llvm/test/ | wc -l
2862

If we flip the default, we can explicitly mark the remaining llc tests as verifier unclean, and target maintainers have additional incentive to make standard codegen patterns verifier-clean.

Is the verifier really so slow that it has to be behind EXPENSIVE_CHECKS?

@MatzeB
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MatzeB commented Oct 24, 2018

I would be fine with enabling verify machineinstrs in debug builds for llc by default.
I think there are some projects out there that use llc as a code generator which may feed large inputs to it, but to my knowledge that was never the intended use case for llc and we don't/shouldn't think about it and it will only affect release versions anyway.

@RKSimon
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RKSimon commented Oct 24, 2018

I would be fine with enabling verify machineinstrs in debug builds for llc
by default.

Do we have debug build bot coverage or would we be relying on developer's local debug builds to recognise/fix test failures?

@MatzeB
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MatzeB commented Oct 24, 2018

I would be fine with enabling verify machineinstrs in debug builds for llc
by default.

Do we have debug build bot coverage or would we be relying on developer's
local debug builds to recognise/fix test failures?

We do have bots like http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-expensive/ that build with expensive checks enabled and run ninja check. However that is a pretty late signal after someone committed something. It would be better not to require people to be actively aware that verify-machineinstrs is a thing they should use for their personal testing...

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rnk commented Oct 24, 2018

We have plenty of bots that build with assertions enabled (-DLLVM_ENABLE_ASSERTIONS=ON) that would catch these issues. This approach has mostly worked well for clang. In !NDEBUG builds, we run the IR verifier after IR gen and after each pass, and that usually catches invalid IR generated by clang.

@RKSimon
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RKSimon commented Nov 2, 2018

Failing Tests (81):
LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
LLVM :: CodeGen/AMDGPU/big_alu.ll
LLVM :: CodeGen/AMDGPU/literals.ll
LLVM :: CodeGen/AMDGPU/load-input-fold.ll
LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
LLVM :: CodeGen/AMDGPU/pv-packing.ll
LLVM :: CodeGen/AMDGPU/pv.ll
LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
LLVM :: CodeGen/AMDGPU/swizzle-export.ll
LLVM :: CodeGen/AMDGPU/vector-alloca.ll
LLVM :: CodeGen/Lanai/codemodel.ll
LLVM :: CodeGen/Lanai/comparisons_i32.ll
LLVM :: CodeGen/Lanai/comparisons_i64.ll
LLVM :: CodeGen/Lanai/constant_multiply.ll
LLVM :: CodeGen/Lanai/delay_filler.ll
LLVM :: CodeGen/Lanai/i32.ll
LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
LLVM :: CodeGen/Lanai/lshift64.ll
LLVM :: CodeGen/Lanai/masking_setccs.ll
LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
LLVM :: CodeGen/Lanai/multiply.ll
LLVM :: CodeGen/Lanai/rshift64.ll
LLVM :: CodeGen/Lanai/select.ll
LLVM :: CodeGen/Lanai/set_and_hi.ll
LLVM :: CodeGen/Lanai/shift.ll
LLVM :: CodeGen/Lanai/stack-frame.ll
LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
LLVM :: CodeGen/Lanai/subword.ll
LLVM :: CodeGen/Mips/longbranch/long-branch-expansion-3.ll
LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
LLVM :: CodeGen/NVPTX/bug26185-2.ll
LLVM :: CodeGen/NVPTX/bug26185.ll
LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
LLVM :: CodeGen/NVPTX/disable-opt.ll
LLVM :: CodeGen/NVPTX/envreg.ll
LLVM :: CodeGen/NVPTX/ldg-invariant.ll
LLVM :: CodeGen/NVPTX/ldu-i8.ll
LLVM :: CodeGen/NVPTX/ldu-ldg.ll
LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
LLVM :: CodeGen/NVPTX/local-stack-frame.ll
LLVM :: CodeGen/NVPTX/lower-alloca.ll
LLVM :: CodeGen/NVPTX/param-align.ll
LLVM :: CodeGen/NVPTX/read-global-variable-constant.ll
LLVM :: CodeGen/NVPTX/reg-copy.ll
LLVM :: CodeGen/NVPTX/reg-types.ll
LLVM :: CodeGen/PowerPC/#35812 -neg-cmpxchg.ll
LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
LLVM :: CodeGen/PowerPC/atomic-2.ll
LLVM :: CodeGen/PowerPC/atomic-minmax.ll
LLVM :: CodeGen/PowerPC/atomics.ll
LLVM :: CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
LLVM :: CodeGen/PowerPC/cr-spills.ll
LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
LLVM :: CodeGen/PowerPC/early-ret2.ll
LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
LLVM :: CodeGen/PowerPC/negctr.ll
LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
LLVM :: CodeGen/PowerPC/pr16556.ll
LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
LLVM :: CodeGen/PowerPC/pr25157.ll
LLVM :: CodeGen/PowerPC/pr26180.ll
LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
LLVM :: CodeGen/PowerPC/stwux.ll
LLVM :: CodeGen/PowerPC/vsel-prom.ll
LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
LLVM :: CodeGen/PowerPC/xray-ret-is-terminator.ll
LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
LLVM :: DebugInfo/NVPTX/dbg-declare-alloca.ll
LLVM :: DebugInfo/NVPTX/dbg-value-const-byref.ll

@xgupta
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xgupta commented Aug 10, 2021

Seems this issue is fixed?. I run make check-llvm after building LLVM with -DLLVM_ENABLE_EXPENSIVE_CHECKS=ON and didn't get any Unexpected Failures.

Testing Time: 1163.15s
Unsupported : 768
Passed : 44072
Expectedly Failed: 160
[100%] Built target check-llvm

@MatzeB
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MatzeB commented Aug 10, 2021

Seems this issue is fixed?. I run make check-llvm after building LLVM with -DLLVM_ENABLE_EXPENSIVE_CHECKS=ON and didn't get any Unexpected Failures.

  • We also have buildbots that run -DLLVM_ENABLE_EXPENSIVE_CHECKS=ON regularily.
  • This bug is about enabling additional checks when LLVM_ENABLE_EXPENSIVE_CHECKS is enabled. Which wasn't possible because not all targets pass those checks cleanly.
  • Anyway this has been kinda solved with https://reviews.llvm.org/D33696 which allows targets to opt-in to the extra checks. This bug has become an umbrella for all the targets that did not managed to enable isMachineVerifierClean().

@MatzeB
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MatzeB commented Aug 10, 2021

For the record, targets that currently opt-out of the verify-machineinstrs checks:

[matthiasb@devvm2948] ~/dev/llvm/lib/Target > grep "isMachineVerifierClean" * -r
AMDGPU/AMDGPUTargetMachine.h:  bool isMachineVerifierClean() const override {
AVR/AVRTargetMachine.h:  bool isMachineVerifierClean() const override {
Lanai/LanaiTargetMachine.h:  bool isMachineVerifierClean() const override {
NVPTX/NVPTXTargetMachine.h:  bool isMachineVerifierClean() const override {
VE/VETargetMachine.h:  bool isMachineVerifierClean() const override { return false; }

@RKSimon
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RKSimon commented Aug 11, 2021

I've renamed this to make it clear that this is the meta ticket for the various verifier issues that we've been trying to ignore.

This ticket has a long way to go IMO, its not just removing the isMachineVerifierClean() overrides (and then isMachineVerifierClean() itself).

We have a load of tests that were hacked with "-verify-machineinstrs=0" to let us ignore the verifier errors in conjunction with isMachineVerifierClean, all of which need fixing once and for all.

On top of that, it you look inside this bug's dependencies (even the resolved ones....) you'll find a huge number of unresolved verifier issues on most targets.

@JonPsson
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mentioned in issue #32384

@RKSimon
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RKSimon commented Nov 26, 2021

mentioned in issue #32393

@RKSimon
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RKSimon commented Nov 26, 2021

mentioned in issue #32392

@RKSimon
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RKSimon commented Nov 26, 2021

mentioned in issue #32394

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RKSimon commented Nov 26, 2021

mentioned in issue #32395

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RKSimon commented Nov 26, 2021

mentioned in issue #32397

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RKSimon commented Nov 26, 2021

mentioned in issue #32396

@JonPsson
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mentioned in issue #32458

This was referenced Apr 21, 2016
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@llvmbot llvmbot mentioned this issue Apr 22, 2016
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@pcc pcc mentioned this issue Jun 24, 2016
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@llvmbot llvmbot mentioned this issue Nov 13, 2016
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@JonPsson JonPsson mentioned this issue May 15, 2017
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@JonPsson JonPsson mentioned this issue May 20, 2017
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@llvmbot llvmbot transferred this issue from llvm/llvm-bugzilla-archive Dec 10, 2021
@dkegel-fastly dkegel-fastly mentioned this issue Jan 6, 2022
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@rnk @MatzeB @fhahn @francisvm @RKSimon @rovka @JonPsson @llvmbot @xgupta