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Examples
lib
Target
AMDGPU
AMDGPUIGroupLP.h
Go to the documentation of this file.
1
//===- AMDGPUMFMAIGroupLP.h - AMDGPU MFMA IGroupLP --------*- C++ -*-===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H
11
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#include "
llvm/CodeGen/ScheduleDAGMutation.h
"
13
#include <memory>
14
#include <vector>
15
16
namespace
llvm
{
17
18
namespace
AMDGPU {
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// The current phase of instruction scheduling
20
enum class
SchedulingPhase
{
Initial
,
PreRAReentry
,
PostRA
};
21
}
// namespace AMDGPU
22
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std::unique_ptr<ScheduleDAGMutation>
24
createIGroupLPDAGMutation
(
AMDGPU::SchedulingPhase
Phase
);
25
26
}
// namespace llvm
27
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#endif
// LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H
Phase
aarch64 falkor hwpf fix Falkor HW Prefetch Fix Late Phase
Definition:
AArch64FalkorHWPFFix.cpp:228
ScheduleDAGMutation.h
llvm::AMDGPU::SchedulingPhase
SchedulingPhase
Definition:
AMDGPUIGroupLP.h:20
llvm::AMDGPU::SchedulingPhase::PostRA
@ PostRA
llvm::AMDGPU::SchedulingPhase::PreRAReentry
@ PreRAReentry
llvm::AMDGPU::SchedulingPhase::Initial
@ Initial
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition:
AddressRanges.h:18
llvm::createIGroupLPDAGMutation
std::unique_ptr< ScheduleDAGMutation > createIGroupLPDAGMutation(AMDGPU::SchedulingPhase Phase)
Phase specifes whether or not this is a reentry into the IGroupLPDAGMutation.
Definition:
AMDGPUIGroupLP.cpp:2707
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