13#ifndef LLVM_LIB_TARGET_ARC_ARCREGISTERINFO_H
14#define LLVM_LIB_TARGET_ARC_ARCREGISTERINFO_H
18#define GET_REGINFO_HEADER
19#include "ARCGenRegisterInfo.inc"
43 unsigned FIOperandNum,
uint64_t IntrinsicInst * II
Wrapper class representing virtual and physical registers.
This is an optimization pass for GlobalISel generic memory operations.
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
Code Generation virtual methods...
BitVector getReservedRegs(const MachineFunction &MF) const override
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const override
bool useFPForScavengingIndex(const MachineFunction &MF) const override
Register getFrameRegister(const MachineFunction &MF) const override
bool eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
static bool needsFrameMoves(const MachineFunction &MF)
Return whether to emit frame moves.
bool requiresRegisterScavenging(const MachineFunction &MF) const override