14#ifndef LLVM_LIB_TARGET_MIPS_MIPSSEREGISTERINFO_H
15#define LLVM_LIB_TARGET_MIPS_MIPSSEREGISTERINFO_H
34 int64_t SPOffset)
const override;
uint64_t IntrinsicInst * II
const TargetRegisterClass * intRegClass(unsigned Size) const override
Return GPR register class.
bool requiresRegisterScavenging(const MachineFunction &MF) const override
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override
This is an optimization pass for GlobalISel generic memory operations.