| AArch64RegisterInfo(const Triple &TT) | llvm::AArch64RegisterInfo | |
| cannotEliminateFrame(const MachineFunction &MF) const | llvm::AArch64RegisterInfo | |
| eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override | llvm::AArch64RegisterInfo | |
| emitReservedArgRegCallError(const MachineFunction &MF) const | llvm::AArch64RegisterInfo | |
| explainReservedReg(const MachineFunction &MF, MCRegister PhysReg) const override | llvm::AArch64RegisterInfo | |
| getBaseRegister() const | llvm::AArch64RegisterInfo | |
| getCalleeSavedRegs(const MachineFunction *MF) const override | llvm::AArch64RegisterInfo | |
| getCalleeSavedRegsViaCopy(const MachineFunction *MF) const | llvm::AArch64RegisterInfo | |
| getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override | llvm::AArch64RegisterInfo | |
| getCrossCopyRegClass(const TargetRegisterClass *RC) const override | llvm::AArch64RegisterInfo | |
| getCSRFirstUseCost() const override | llvm::AArch64RegisterInfo | inline |
| getCustomEHPadPreservedMask(const MachineFunction &MF) const override | llvm::AArch64RegisterInfo | |
| getDarwinCalleeSavedRegs(const MachineFunction *MF) const | llvm::AArch64RegisterInfo | |
| getDarwinCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const | llvm::AArch64RegisterInfo | |
| getFrameRegister(const MachineFunction &MF) const override | llvm::AArch64RegisterInfo | |
| getLocalAddressRegister(const MachineFunction &MF) const | llvm::AArch64RegisterInfo | |
| getNoPreservedMask() const override | llvm::AArch64RegisterInfo | |
| getOffsetOpcodes(const StackOffset &Offset, SmallVectorImpl< uint64_t > &Ops) const override | llvm::AArch64RegisterInfo | |
| getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override | llvm::AArch64RegisterInfo | |
| getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const override | llvm::AArch64RegisterInfo | |
| getReservedRegs(const MachineFunction &MF) const override | llvm::AArch64RegisterInfo | |
| getSEHRegNum(unsigned i) const | llvm::AArch64RegisterInfo | inline |
| getSMStartStopCallPreservedMask() const | llvm::AArch64RegisterInfo | |
| getStrictlyReservedRegs(const MachineFunction &MF) const | llvm::AArch64RegisterInfo | |
| getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const override | llvm::AArch64RegisterInfo | |
| getThisReturnPreservedMask(const MachineFunction &MF, CallingConv::ID) const | llvm::AArch64RegisterInfo | |
| getTLSCallPreservedMask() const | llvm::AArch64RegisterInfo | |
| getWindowsStackProbePreservedMask() const | llvm::AArch64RegisterInfo | |
| hasBasePointer(const MachineFunction &MF) const | llvm::AArch64RegisterInfo | |
| isAnyArgRegReserved(const MachineFunction &MF) const | llvm::AArch64RegisterInfo | |
| isArgumentRegister(const MachineFunction &MF, MCRegister Reg) const override | llvm::AArch64RegisterInfo | |
| isAsmClobberable(const MachineFunction &MF, MCRegister PhysReg) const override | llvm::AArch64RegisterInfo | |
| isFrameOffsetLegal(const MachineInstr *MI, Register BaseReg, int64_t Offset) const override | llvm::AArch64RegisterInfo | |
| isReservedReg(const MachineFunction &MF, MCRegister Reg) const | llvm::AArch64RegisterInfo | |
| isStrictlyReservedReg(const MachineFunction &MF, MCRegister Reg) const | llvm::AArch64RegisterInfo | |
| materializeFrameBaseRegister(MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override | llvm::AArch64RegisterInfo | |
| needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override | llvm::AArch64RegisterInfo | |
| regNeedsCFI(unsigned Reg, unsigned &RegToUseForCFI) const | llvm::AArch64RegisterInfo | |
| requiresFrameIndexScavenging(const MachineFunction &MF) const override | llvm::AArch64RegisterInfo | |
| requiresRegisterScavenging(const MachineFunction &MF) const override | llvm::AArch64RegisterInfo | |
| requiresVirtualBaseRegisters(const MachineFunction &MF) const override | llvm::AArch64RegisterInfo | |
| resolveFrameIndex(MachineInstr &MI, Register BaseReg, int64_t Offset) const override | llvm::AArch64RegisterInfo | |
| shouldAnalyzePhysregInMachineLoopInfo(MCRegister R) const override | llvm::AArch64RegisterInfo | |
| shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override | llvm::AArch64RegisterInfo | |
| SMEABISupportRoutinesCallPreservedMaskFromX0() const | llvm::AArch64RegisterInfo | |
| UpdateCustomCalleeSavedRegs(MachineFunction &MF) const | llvm::AArch64RegisterInfo | |
| UpdateCustomCallPreservedMask(MachineFunction &MF, const uint32_t **Mask) const | llvm::AArch64RegisterInfo | |
| useFPForScavengingIndex(const MachineFunction &MF) const override | llvm::AArch64RegisterInfo | |
