LLVM 20.0.0git
Public Member Functions | List of all members
llvm::AArch64RegisterInfo Class Referencefinal

#include "Target/AArch64/AArch64RegisterInfo.h"

Inheritance diagram for llvm::AArch64RegisterInfo:
Inheritance graph
[legend]

Public Member Functions

 AArch64RegisterInfo (const Triple &TT)
 
int getSEHRegNum (unsigned i) const
 
bool isReservedReg (const MachineFunction &MF, MCRegister Reg) const
 
bool isStrictlyReservedReg (const MachineFunction &MF, MCRegister Reg) const
 
bool isAnyArgRegReserved (const MachineFunction &MF) const
 
void emitReservedArgRegCallError (const MachineFunction &MF) const
 
void UpdateCustomCalleeSavedRegs (MachineFunction &MF) const
 
void UpdateCustomCallPreservedMask (MachineFunction &MF, const uint32_t **Mask) const
 
const MCPhysReggetCalleeSavedRegs (const MachineFunction *MF) const override
 Code Generation virtual methods...
 
const MCPhysReggetDarwinCalleeSavedRegs (const MachineFunction *MF) const
 
const MCPhysReggetCalleeSavedRegsViaCopy (const MachineFunction *MF) const
 
const uint32_tgetCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
 
const uint32_tgetDarwinCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const
 
unsigned getCSRFirstUseCost () const override
 
const TargetRegisterClassgetSubClassWithSubReg (const TargetRegisterClass *RC, unsigned Idx) const override
 
const uint32_tgetTLSCallPreservedMask () const
 
const uint32_tgetSMStartStopCallPreservedMask () const
 
const uint32_tSMEABISupportRoutinesCallPreservedMaskFromX0 () const
 
const uint32_tgetNoPreservedMask () const override
 
const uint32_tgetCustomEHPadPreservedMask (const MachineFunction &MF) const override
 
const uint32_tgetThisReturnPreservedMask (const MachineFunction &MF, CallingConv::ID) const
 getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i64 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e.
 
const uint32_tgetWindowsStackProbePreservedMask () const
 Stack probing calls preserve different CSRs to the normal CC.
 
BitVector getStrictlyReservedRegs (const MachineFunction &MF) const
 
BitVector getReservedRegs (const MachineFunction &MF) const override
 
std::optional< std::string > explainReservedReg (const MachineFunction &MF, MCRegister PhysReg) const override
 
bool isAsmClobberable (const MachineFunction &MF, MCRegister PhysReg) const override
 
const TargetRegisterClassgetPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
 
const TargetRegisterClassgetCrossCopyRegClass (const TargetRegisterClass *RC) const override
 
bool requiresRegisterScavenging (const MachineFunction &MF) const override
 
bool useFPForScavengingIndex (const MachineFunction &MF) const override
 
bool requiresFrameIndexScavenging (const MachineFunction &MF) const override
 
bool needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
 needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP.
 
bool isFrameOffsetLegal (const MachineInstr *MI, Register BaseReg, int64_t Offset) const override
 
Register materializeFrameBaseRegister (MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override
 Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.
 
void resolveFrameIndex (MachineInstr &MI, Register BaseReg, int64_t Offset) const override
 
bool eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
 
bool cannotEliminateFrame (const MachineFunction &MF) const
 
bool requiresVirtualBaseRegisters (const MachineFunction &MF) const override
 
bool hasBasePointer (const MachineFunction &MF) const
 
unsigned getBaseRegister () const
 
bool isArgumentRegister (const MachineFunction &MF, MCRegister Reg) const override
 
Register getFrameRegister (const MachineFunction &MF) const override
 
unsigned getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override
 
unsigned getLocalAddressRegister (const MachineFunction &MF) const
 
bool regNeedsCFI (unsigned Reg, unsigned &RegToUseForCFI) const
 Return whether the register needs a CFI entry.
 
bool shouldCoalesce (MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override
 SrcRC and DstRC will be morphed into NewRC if this returns true.
 
void getOffsetOpcodes (const StackOffset &Offset, SmallVectorImpl< uint64_t > &Ops) const override
 
bool shouldAnalyzePhysregInMachineLoopInfo (MCRegister R) const override
 

Detailed Description

Definition at line 26 of file AArch64RegisterInfo.h.

Constructor & Destructor Documentation

◆ AArch64RegisterInfo()

AArch64RegisterInfo::AArch64RegisterInfo ( const Triple TT)

Member Function Documentation

◆ cannotEliminateFrame()

bool AArch64RegisterInfo::cannotEliminateFrame ( const MachineFunction MF) const

◆ eliminateFrameIndex()

bool AArch64RegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  II,
int  SPAdj,
unsigned  FIOperandNum,
RegScavenger RS = nullptr 
) const
override

◆ emitReservedArgRegCallError()

void AArch64RegisterInfo::emitReservedArgRegCallError ( const MachineFunction MF) const

Definition at line 537 of file AArch64RegisterInfo.cpp.

References F, and llvm::MachineFunction::getFunction().

◆ explainReservedReg()

std::optional< std::string > AArch64RegisterInfo::explainReservedReg ( const MachineFunction MF,
MCRegister  PhysReg 
) const
override

◆ getBaseRegister()

unsigned AArch64RegisterInfo::getBaseRegister ( ) const

◆ getCalleeSavedRegs()

const MCPhysReg * AArch64RegisterInfo::getCalleeSavedRegs ( const MachineFunction MF) const
override

◆ getCalleeSavedRegsViaCopy()

const MCPhysReg * AArch64RegisterInfo::getCalleeSavedRegsViaCopy ( const MachineFunction MF) const

◆ getCallPreservedMask()

const uint32_t * AArch64RegisterInfo::getCallPreservedMask ( const MachineFunction MF,
CallingConv::ID  CC 
) const
override

◆ getCrossCopyRegClass()

const TargetRegisterClass * AArch64RegisterInfo::getCrossCopyRegClass ( const TargetRegisterClass RC) const
override

Definition at line 567 of file AArch64RegisterInfo.cpp.

◆ getCSRFirstUseCost()

unsigned llvm::AArch64RegisterInfo::getCSRFirstUseCost ( ) const
inlineoverride

Definition at line 56 of file AArch64RegisterInfo.h.

◆ getCustomEHPadPreservedMask()

const uint32_t * AArch64RegisterInfo::getCustomEHPadPreservedMask ( const MachineFunction MF) const
override

◆ getDarwinCalleeSavedRegs()

const MCPhysReg * AArch64RegisterInfo::getDarwinCalleeSavedRegs ( const MachineFunction MF) const

◆ getDarwinCallPreservedMask()

const uint32_t * AArch64RegisterInfo::getDarwinCallPreservedMask ( const MachineFunction MF,
CallingConv::ID  CC 
) const

◆ getFrameRegister()

Register AArch64RegisterInfo::getFrameRegister ( const MachineFunction MF) const
override

Definition at line 693 of file AArch64RegisterInfo.cpp.

References llvm::AArch64FrameLowering::hasFP().

Referenced by getLocalAddressRegister().

◆ getLocalAddressRegister()

unsigned AArch64RegisterInfo::getLocalAddressRegister ( const MachineFunction MF) const

◆ getNoPreservedMask()

const uint32_t * AArch64RegisterInfo::getNoPreservedMask ( ) const
override

Definition at line 376 of file AArch64RegisterInfo.cpp.

◆ getOffsetOpcodes()

void AArch64RegisterInfo::getOffsetOpcodes ( const StackOffset Offset,
SmallVectorImpl< uint64_t > &  Ops 
) const
override

◆ getPointerRegClass()

const TargetRegisterClass * AArch64RegisterInfo::getPointerRegClass ( const MachineFunction MF,
unsigned  Kind = 0 
) const
override

Definition at line 561 of file AArch64RegisterInfo.cpp.

◆ getRegPressureLimit()

unsigned AArch64RegisterInfo::getRegPressureLimit ( const TargetRegisterClass RC,
MachineFunction MF 
) const
override

◆ getReservedRegs()

BitVector AArch64RegisterInfo::getReservedRegs ( const MachineFunction MF) const
override

◆ getSEHRegNum()

int llvm::AArch64RegisterInfo::getSEHRegNum ( unsigned  i) const
inline

Definition at line 33 of file AArch64RegisterInfo.h.

◆ getSMStartStopCallPreservedMask()

const uint32_t * AArch64RegisterInfo::getSMStartStopCallPreservedMask ( ) const

Definition at line 367 of file AArch64RegisterInfo.cpp.

◆ getStrictlyReservedRegs()

BitVector AArch64RegisterInfo::getStrictlyReservedRegs ( const MachineFunction MF) const

◆ getSubClassWithSubReg()

const TargetRegisterClass * AArch64RegisterInfo::getSubClassWithSubReg ( const TargetRegisterClass RC,
unsigned  Idx 
) const
override

Definition at line 232 of file AArch64RegisterInfo.cpp.

References Idx.

◆ getThisReturnPreservedMask()

const uint32_t * AArch64RegisterInfo::getThisReturnPreservedMask ( const MachineFunction MF,
CallingConv::ID  CC 
) const

getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i64 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e.

it is a calling convention that uses the same register for the first i64 argument and an i64 return value)

Should return NULL in the case that the calling convention does not have this property

Definition at line 381 of file AArch64RegisterInfo.cpp.

References assert(), CC, llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GHC, and llvm::AArch64Subtarget::isTargetDarwin().

◆ getTLSCallPreservedMask()

const uint32_t * AArch64RegisterInfo::getTLSCallPreservedMask ( ) const

◆ getWindowsStackProbePreservedMask()

const uint32_t * AArch64RegisterInfo::getWindowsStackProbePreservedMask ( ) const

Stack probing calls preserve different CSRs to the normal CC.

Definition at line 396 of file AArch64RegisterInfo.cpp.

◆ hasBasePointer()

bool AArch64RegisterInfo::hasBasePointer ( const MachineFunction MF) const

◆ isAnyArgRegReserved()

bool AArch64RegisterInfo::isAnyArgRegReserved ( const MachineFunction MF) const

Definition at line 531 of file AArch64RegisterInfo.cpp.

References llvm::any_of(), and isStrictlyReservedReg().

◆ isArgumentRegister()

bool AArch64RegisterInfo::isArgumentRegister ( const MachineFunction MF,
MCRegister  Reg 
) const
override

◆ isAsmClobberable()

bool AArch64RegisterInfo::isAsmClobberable ( const MachineFunction MF,
MCRegister  PhysReg 
) const
override

◆ isFrameOffsetLegal()

bool AArch64RegisterInfo::isFrameOffsetLegal ( const MachineInstr MI,
Register  BaseReg,
int64_t  Offset 
) const
override

◆ isReservedReg()

bool AArch64RegisterInfo::isReservedReg ( const MachineFunction MF,
MCRegister  Reg 
) const

◆ isStrictlyReservedReg()

bool AArch64RegisterInfo::isStrictlyReservedReg ( const MachineFunction MF,
MCRegister  Reg 
) const

Definition at line 526 of file AArch64RegisterInfo.cpp.

References getStrictlyReservedRegs().

Referenced by isAnyArgRegReserved().

◆ materializeFrameBaseRegister()

Register AArch64RegisterInfo::materializeFrameBaseRegister ( MachineBasicBlock MBB,
int  FrameIdx,
int64_t  Offset 
) const
override

◆ needsFrameBaseReg()

bool AArch64RegisterInfo::needsFrameBaseReg ( MachineInstr MI,
int64_t  Offset 
) const
override

needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP.

Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.

Definition at line 743 of file AArch64RegisterInfo.cpp.

References assert(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFrameInfo::getLocalFrameSize(), llvm::AArch64FrameLowering::hasFP(), isFrameOffsetLegal(), MI, and llvm::Offset.

◆ regNeedsCFI()

bool AArch64RegisterInfo::regNeedsCFI ( unsigned  Reg,
unsigned RegToUseForCFI 
) const

Return whether the register needs a CFI entry.

Not all unwinders may know about SVE registers, so we assume the lowest common denominator, i.e. the callee-saves required by the base ABI. For the SVE registers z8-z15 only the lower 64-bits (d8-d15) need to be saved. The lower 64-bits subreg is returned in RegToUseForCFI.

Definition at line 52 of file AArch64RegisterInfo.cpp.

References contains(), and I.

◆ requiresFrameIndexScavenging()

bool AArch64RegisterInfo::requiresFrameIndexScavenging ( const MachineFunction MF) const
override

Definition at line 726 of file AArch64RegisterInfo.cpp.

◆ requiresRegisterScavenging()

bool AArch64RegisterInfo::requiresRegisterScavenging ( const MachineFunction MF) const
override

Definition at line 698 of file AArch64RegisterInfo.cpp.

◆ requiresVirtualBaseRegisters()

bool AArch64RegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction MF) const
override

Definition at line 703 of file AArch64RegisterInfo.cpp.

◆ resolveFrameIndex()

void AArch64RegisterInfo::resolveFrameIndex ( MachineInstr MI,
Register  BaseReg,
int64_t  Offset 
) const
override

◆ shouldAnalyzePhysregInMachineLoopInfo()

bool AArch64RegisterInfo::shouldAnalyzePhysregInMachineLoopInfo ( MCRegister  R) const
override

Definition at line 1118 of file AArch64RegisterInfo.cpp.

◆ shouldCoalesce()

bool AArch64RegisterInfo::shouldCoalesce ( MachineInstr MI,
const TargetRegisterClass SrcRC,
unsigned  SubReg,
const TargetRegisterClass DstRC,
unsigned  DstSubReg,
const TargetRegisterClass NewRC,
LiveIntervals LIS 
) const
override

SrcRC and DstRC will be morphed into NewRC if this returns true.

Definition at line 1068 of file AArch64RegisterInfo.cpp.

References llvm::any_of(), llvm::TargetRegisterClass::getID(), MI, MRI, and SubReg.

◆ SMEABISupportRoutinesCallPreservedMaskFromX0()

const uint32_t * AArch64RegisterInfo::SMEABISupportRoutinesCallPreservedMaskFromX0 ( ) const

Definition at line 372 of file AArch64RegisterInfo.cpp.

◆ UpdateCustomCalleeSavedRegs()

void AArch64RegisterInfo::UpdateCustomCalleeSavedRegs ( MachineFunction MF) const

◆ UpdateCustomCallPreservedMask()

void AArch64RegisterInfo::UpdateCustomCallPreservedMask ( MachineFunction MF,
const uint32_t **  Mask 
) const

◆ useFPForScavengingIndex()

bool AArch64RegisterInfo::useFPForScavengingIndex ( const MachineFunction MF) const
override

The documentation for this class was generated from the following files: