LLVM 20.0.0git
llvm::GenericSchedulerBase Member List

This is the complete list of members for llvm::GenericSchedulerBase, including all inherited members.

BotHeightReduce enum valuellvm::GenericSchedulerBase
BotPathReduce enum valuellvm::GenericSchedulerBase
CandReason enum namellvm::GenericSchedulerBase
Cluster enum valuellvm::GenericSchedulerBase
Contextllvm::GenericSchedulerBaseprotected
doMBBSchedRegionsTopDown() constllvm::MachineSchedStrategyinlinevirtual
dumpPolicy() constllvm::MachineSchedStrategyinlinevirtual
enterMBB(MachineBasicBlock *MBB)llvm::MachineSchedStrategyinlinevirtual
GenericSchedulerBase(const MachineSchedContext *C)llvm::GenericSchedulerBaseinlineprotected
getPolicy() const overridellvm::GenericSchedulerBaseinlineprotectedvirtual
getReasonStr(GenericSchedulerBase::CandReason Reason)llvm::GenericSchedulerBasestatic
initialize(ScheduleDAGMI *DAG)=0llvm::MachineSchedStrategypure virtual
initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs)llvm::MachineSchedStrategyinlinevirtual
leaveMBB()llvm::MachineSchedStrategyinlinevirtual
NextDefUse enum valuellvm::GenericSchedulerBase
NoCand enum valuellvm::GenericSchedulerBase
NodeOrder enum valuellvm::GenericSchedulerBase
Only1 enum valuellvm::GenericSchedulerBase
PhysReg enum valuellvm::GenericSchedulerBase
pickNode(bool &IsTopNode)=0llvm::MachineSchedStrategypure virtual
RegCritical enum valuellvm::GenericSchedulerBase
RegExcess enum valuellvm::GenericSchedulerBase
RegionPolicyllvm::GenericSchedulerBaseprotected
registerRoots()llvm::MachineSchedStrategyinlinevirtual
RegMax enum valuellvm::GenericSchedulerBase
releaseBottomNode(SUnit *SU)=0llvm::MachineSchedStrategypure virtual
releaseTopNode(SUnit *SU)=0llvm::MachineSchedStrategypure virtual
Remllvm::GenericSchedulerBaseprotected
ResourceDemand enum valuellvm::GenericSchedulerBase
ResourceReduce enum valuellvm::GenericSchedulerBase
SchedModelllvm::GenericSchedulerBaseprotected
schedNode(SUnit *SU, bool IsTopNode)=0llvm::MachineSchedStrategypure virtual
scheduleTree(unsigned SubtreeID)llvm::MachineSchedStrategyinlinevirtual
setPolicy(CandPolicy &Policy, bool IsPostRA, SchedBoundary &CurrZone, SchedBoundary *OtherZone)llvm::GenericSchedulerBaseprotected
shouldTrackLaneMasks() constllvm::MachineSchedStrategyinlinevirtual
shouldTrackPressure() constllvm::MachineSchedStrategyinlinevirtual
Stall enum valuellvm::GenericSchedulerBase
TopDepthReduce enum valuellvm::GenericSchedulerBase
TopPathReduce enum valuellvm::GenericSchedulerBase
traceCandidate(const SchedCandidate &Cand)llvm::GenericSchedulerBaseprotected
TRIllvm::GenericSchedulerBaseprotected
Weak enum valuellvm::GenericSchedulerBase
~MachineSchedStrategy()=defaultllvm::MachineSchedStrategyvirtual