LLVM 20.0.0git
llvm::PPCCCState Member List

This is the complete list of members for llvm::PPCCCState, including all inherited members.

addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd)llvm::CCStateinline
addLoc(const CCValAssign &V)llvm::CCStateinline
AllocateReg(MCPhysReg Reg)llvm::CCStateinline
AllocateReg(MCPhysReg Reg, MCPhysReg ShadowReg)llvm::CCStateinline
AllocateReg(ArrayRef< MCPhysReg > Regs)llvm::CCStateinline
AllocateReg(ArrayRef< MCPhysReg > Regs, const MCPhysReg *ShadowRegs)llvm::CCStateinline
AllocateRegBlock(ArrayRef< MCPhysReg > Regs, unsigned RegsRequired)llvm::CCStateinline
AllocateStack(unsigned Size, Align Alignment)llvm::CCStateinline
AllocateStack(unsigned Size, Align Alignment, ArrayRef< MCPhysReg > ShadowRegs)llvm::CCStateinline
AnalyzeArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)llvm::CCStateinline
AnalyzeArguments(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)llvm::CCStateinline
AnalyzeArgumentsSecondPass(const SmallVectorImpl< T > &Args, CCAssignFn Fn)llvm::CCStateinline
AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)llvm::CCState
AnalyzeCallOperands(SmallVectorImpl< MVT > &ArgVTs, SmallVectorImpl< ISD::ArgFlagsTy > &Flags, CCAssignFn Fn)llvm::CCState
AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)llvm::CCState
AnalyzeCallResult(MVT VT, CCAssignFn Fn)llvm::CCState
AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)llvm::CCState
analyzeMustTailForwardedRegisters(SmallVectorImpl< ForwardedRegister > &Forwards, ArrayRef< MVT > RegParmTypes, CCAssignFn Fn)llvm::CCState
AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)llvm::CCState
CCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF, SmallVectorImpl< CCValAssign > &Locs, LLVMContext &Context, bool NegativeOffsets=false)llvm::CCState
CheckReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)llvm::CCState
clearByValRegsInfo()llvm::CCStateinline
clearWasPPCF128()llvm::PPCCCStateinline
DeallocateReg(MCPhysReg Reg)llvm::CCStateinline
ensureMaxAlignment(Align Alignment)llvm::CCState
getAlignedCallFrameSize() constllvm::CCStateinline
getCallingConv() constllvm::CCStateinline
getContext() constllvm::CCStateinline
getFirstUnallocated(ArrayRef< MCPhysReg > Regs) constllvm::CCStateinline
getInRegsParamInfo(unsigned InRegsParamRecordIndex, unsigned &BeginReg, unsigned &EndReg) constllvm::CCStateinline
getInRegsParamsCount() constllvm::CCStateinline
getInRegsParamsProcessed() constllvm::CCStateinline
getMachineFunction() constllvm::CCStateinline
getPendingArgFlags()llvm::CCStateinline
getPendingLocs()llvm::CCStateinline
getRemainingRegParmsForType(SmallVectorImpl< MCPhysReg > &Regs, MVT VT, CCAssignFn Fn)llvm::CCState
getStackSize() constllvm::CCStateinline
HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, Align MinAlign, ISD::ArgFlagsTy ArgFlags)llvm::CCState
isAllocated(MCRegister Reg) constllvm::CCStateinline
IsShadowAllocatedReg(MCRegister Reg) constllvm::CCState
isVarArg() constllvm::CCStateinline
nextInRegsParam()llvm::CCStateinline
PPCCCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, SmallVectorImpl< CCValAssign > &locs, LLVMContext &C)llvm::PPCCCStateinline
PreAnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs)llvm::PPCCCState
PreAnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins)llvm::PPCCCState
resultsCompatible(CallingConv::ID CalleeCC, CallingConv::ID CallerCC, MachineFunction &MF, LLVMContext &C, const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn CalleeFn, CCAssignFn CallerFn)llvm::CCStatestatic
rewindByValRegsInfo()llvm::CCStateinline
WasOriginalArgPPCF128(unsigned ValNo)llvm::PPCCCStateinline