Bot | llvm::GenericScheduler | protected |
BotCand | llvm::GenericScheduler | protected |
BotHeightReduce enum value | llvm::GenericSchedulerBase | |
BotPathReduce enum value | llvm::GenericSchedulerBase | |
CandReason enum name | llvm::GenericSchedulerBase | |
checkAcyclicLatency() | llvm::GenericScheduler | protected |
Cluster enum value | llvm::GenericSchedulerBase | |
Context | llvm::GenericSchedulerBase | protected |
DAG | llvm::GenericScheduler | protected |
doMBBSchedRegionsTopDown() const | llvm::MachineSchedStrategy | inlinevirtual |
dumpPolicy() const override | llvm::GenericScheduler | virtual |
enterMBB(MachineBasicBlock *MBB) | llvm::MachineSchedStrategy | inlinevirtual |
GenericScheduler(const MachineSchedContext *C) | llvm::GenericScheduler | inline |
GenericSchedulerBase(const MachineSchedContext *C) | llvm::GenericSchedulerBase | inlineprotected |
getPolicy() const override | llvm::GenericSchedulerBase | inlineprotectedvirtual |
getReasonStr(GenericSchedulerBase::CandReason Reason) | llvm::GenericSchedulerBase | static |
initCandidate(SchedCandidate &Cand, SUnit *SU, bool AtTop, const RegPressureTracker &RPTracker, RegPressureTracker &TempTracker) | llvm::GenericScheduler | protected |
initialize(ScheduleDAGMI *dag) override | llvm::GenericScheduler | virtual |
initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs) override | llvm::GenericScheduler | virtual |
leaveMBB() | llvm::MachineSchedStrategy | inlinevirtual |
NextDefUse enum value | llvm::GenericSchedulerBase | |
NoCand enum value | llvm::GenericSchedulerBase | |
NodeOrder enum value | llvm::GenericSchedulerBase | |
Only1 enum value | llvm::GenericSchedulerBase | |
PhysReg enum value | llvm::GenericSchedulerBase | |
pickNode(bool &IsTopNode) override | llvm::GenericScheduler | virtual |
pickNodeBidirectional(bool &IsTopNode) | llvm::GenericScheduler | protected |
pickNodeFromQueue(SchedBoundary &Zone, const CandPolicy &ZonePolicy, const RegPressureTracker &RPTracker, SchedCandidate &Candidate) | llvm::GenericScheduler | protected |
PPCPreRASchedStrategy(const MachineSchedContext *C) | llvm::PPCPreRASchedStrategy | inline |
RegCritical enum value | llvm::GenericSchedulerBase | |
RegExcess enum value | llvm::GenericSchedulerBase | |
RegionPolicy | llvm::GenericSchedulerBase | protected |
registerRoots() override | llvm::GenericScheduler | virtual |
RegMax enum value | llvm::GenericSchedulerBase | |
releaseBottomNode(SUnit *SU) override | llvm::GenericScheduler | inlinevirtual |
releaseTopNode(SUnit *SU) override | llvm::GenericScheduler | inlinevirtual |
Rem | llvm::GenericSchedulerBase | protected |
reschedulePhysReg(SUnit *SU, bool isTop) | llvm::GenericScheduler | protected |
ResourceDemand enum value | llvm::GenericSchedulerBase | |
ResourceReduce enum value | llvm::GenericSchedulerBase | |
SchedModel | llvm::GenericSchedulerBase | protected |
schedNode(SUnit *SU, bool IsTopNode) override | llvm::GenericScheduler | virtual |
scheduleTree(unsigned SubtreeID) | llvm::MachineSchedStrategy | inlinevirtual |
setPolicy(CandPolicy &Policy, bool IsPostRA, SchedBoundary &CurrZone, SchedBoundary *OtherZone) | llvm::GenericSchedulerBase | protected |
shouldTrackLaneMasks() const override | llvm::GenericScheduler | inlinevirtual |
shouldTrackPressure() const override | llvm::GenericScheduler | inlinevirtual |
Stall enum value | llvm::GenericSchedulerBase | |
Top | llvm::GenericScheduler | protected |
TopCand | llvm::GenericScheduler | protected |
TopDepthReduce enum value | llvm::GenericSchedulerBase | |
TopPathReduce enum value | llvm::GenericSchedulerBase | |
traceCandidate(const SchedCandidate &Cand) | llvm::GenericSchedulerBase | protected |
TRI | llvm::GenericSchedulerBase | protected |
tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand, SchedBoundary *Zone) const override | llvm::PPCPreRASchedStrategy | protectedvirtual |
Weak enum value | llvm::GenericSchedulerBase | |
~MachineSchedStrategy()=default | llvm::MachineSchedStrategy | virtual |