LLVM 20.0.0git
LiveStacks.cpp
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1//===-- LiveStacks.cpp - Live Stack Slot Analysis -------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the live stack slot analysis pass. It is analogous to
10// live interval analysis except it's analyzing liveness of stack slots rather
11// than registers.
12//
13//===----------------------------------------------------------------------===//
14
19using namespace llvm;
20
21#define DEBUG_TYPE "livestacks"
22
23char LiveStacks::ID = 0;
25 "Live Stack Slot Analysis", false, false)
28 "Live Stack Slot Analysis", false, false)
29
31
32void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
33 AU.setPreservesAll();
34 AU.addPreserved<SlotIndexesWrapperPass>();
35 AU.addRequiredTransitive<SlotIndexesWrapperPass>();
37}
38
40 // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
41 VNInfoAllocator.Reset();
42 S2IMap.clear();
43 S2RCMap.clear();
44}
45
47 TRI = MF.getSubtarget().getRegisterInfo();
48 // FIXME: No analysis is being done right now. We are relying on the
49 // register allocators to provide the information.
50 return false;
51}
52
55 assert(Slot >= 0 && "Spill slot indice must be >= 0");
56 SS2IntervalMap::iterator I = S2IMap.find(Slot);
57 if (I == S2IMap.end()) {
58 I = S2IMap
59 .emplace(
60 std::piecewise_construct, std::forward_as_tuple(Slot),
61 std::forward_as_tuple(Register::index2StackSlot(Slot), 0.0F))
62 .first;
63 S2RCMap.insert(std::make_pair(Slot, RC));
64 } else {
65 // Use the largest common subclass register class.
66 const TargetRegisterClass *OldRC = S2RCMap[Slot];
67 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC);
68 }
69 return I->second;
70}
71
72/// print - Implement the dump method.
73void LiveStacks::print(raw_ostream &OS, const Module*) const {
74
75 OS << "********** INTERVALS **********\n";
76 for (const_iterator I = begin(), E = end(); I != E; ++I) {
77 I->second.print(OS);
78 int Slot = I->first;
80 if (RC)
81 OS << " [" << TRI->getRegClassName(RC) << "]\n";
82 else
83 OS << " [Unknown]\n";
84 }
85}
Looks at all the uses of the given value Returns the Liveness deduced from the uses of this value Adds all uses that cause the result to be MaybeLive to MaybeLiveRetUses If the result is Live
Live Stack Slot Analysis
Definition: LiveStacks.cpp:28
#define DEBUG_TYPE
Definition: LiveStacks.cpp:21
#define I(x, y, z)
Definition: MD5.cpp:58
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:55
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:57
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:52
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
raw_pwrite_stream & OS
Represent the analysis usage information of a pass.
void Reset()
Deallocate all but the current slab and reset the current pointer to the beginning of it,...
Definition: Allocator.h:123
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:687
SS2IntervalMap::const_iterator const_iterator
Definition: LiveStacks.h:57
LiveInterval & getOrCreateInterval(int Slot, const TargetRegisterClass *RC)
Definition: LiveStacks.cpp:54
const TargetRegisterClass * getIntervalRegClass(int Slot) const
Definition: LiveStacks.h:84
const_iterator end() const
Definition: LiveStacks.h:60
bool runOnMachineFunction(MachineFunction &) override
runOnMachineFunction - pass entry point
Definition: LiveStacks.cpp:46
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
Definition: LiveStacks.cpp:39
const_iterator begin() const
Definition: LiveStacks.h:59
void print(raw_ostream &O, const Module *=nullptr) const override
print - Implement the dump method.
Definition: LiveStacks.cpp:73
static char ID
Definition: LiveStacks.h:50
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
static Register index2StackSlot(int FI)
Convert a non-negative frame index to a stack slot register value.
Definition: Register.h:58
const TargetRegisterClass * getCommonSubClass(const TargetRegisterClass *A, const TargetRegisterClass *B) const
Find the largest common subclass of A and B.
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
char & LiveStacksID
LiveStacks pass. An analysis keeping track of the liveness of stack slots.
Definition: LiveStacks.cpp:30