24#define RISCV_POST_RA_EXPAND_PSEUDO_NAME \
25 "RISC-V post-regalloc pseudo instruction expansion pass"
51char RISCVPostRAExpandPseudo::ID = 0;
53bool RISCVPostRAExpandPseudo::runOnMachineFunction(
MachineFunction &MF) {
77 switch (
MBBI->getOpcode()) {
78 case RISCV::PseudoMovImm:
89 int64_t Val =
MBBI->getOperand(1).getImm();
96 bool DstIsDead =
MBBI->getOperand(0).isDead();
97 bool Renamable =
MBBI->getOperand(0).isRenamable();
113 return new RISCVPostRAExpandPseudo();
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
const HexagonInstrInfo * TII
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
#define RISCV_POST_RA_EXPAND_PSEUDO_NAME
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
FunctionPass class - This class is used to implement most global optimizations.
void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Wrapper class representing virtual and physical registers.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringRef - Represent a constant reference to a string, i.e.
virtual const TargetInstrInfo * getInstrInfo() const
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
InstSeq generateInstSeq(int64_t Val, const MCSubtargetInfo &STI)
This is an optimization pass for GlobalISel generic memory operations.
FunctionPass * createRISCVPostRAExpandPseudoPass()
void initializeRISCVPostRAExpandPseudoPass(PassRegistry &)