LLVM 20.0.0git
Enumerations
llvm::AMDGPUISD Namespace Reference

Enumerations

enum  NodeType : unsigned {
  FIRST_NUMBER = ISD::BUILTIN_OP_END , BRANCH_COND , CALL , TC_RETURN ,
  TC_RETURN_GFX , TC_RETURN_CHAIN , TRAP , IF ,
  ELSE , LOOP , ENDPGM , ENDPGM_TRAP ,
  SIMULATED_TRAP , RETURN_TO_EPILOG , RET_GLUE , WAVE_ADDRESS ,
  DWORDADDR , FRACT , CLAMP , SETCC ,
  DENORM_MODE , FMA_W_CHAIN , FMUL_W_CHAIN , COS_HW ,
  SIN_HW , FMAX_LEGACY , FMIN_LEGACY , FMAX3 ,
  SMAX3 , UMAX3 , FMIN3 , SMIN3 ,
  UMIN3 , FMED3 , SMED3 , UMED3 ,
  FMAXIMUM3 , FMINIMUM3 , FDOT2 , URECIP ,
  DIV_SCALE , DIV_FMAS , DIV_FIXUP , FMAD_FTZ ,
  RCP , RSQ , RCP_LEGACY , RCP_IFLAG ,
  LOG , EXP , FMUL_LEGACY , RSQ_CLAMP ,
  FP_CLASS , DOT4 , CARRY , BORROW ,
  BFE_U32 , BFE_I32 , BFI , BFM ,
  FFBH_U32 , FFBH_I32 , FFBL_B32 , MUL_U24 ,
  MUL_I24 , MULHI_U24 , MULHI_I24 , MAD_U24 ,
  MAD_I24 , MAD_U64_U32 , MAD_I64_I32 , PERM ,
  TEXTURE_FETCH , R600_EXPORT , CONST_ADDRESS , REGISTER_LOAD ,
  REGISTER_STORE , CVT_F32_UBYTE0 , CVT_F32_UBYTE1 , CVT_F32_UBYTE2 ,
  CVT_F32_UBYTE3 , CVT_PKRTZ_F16_F32 , CVT_PKNORM_I16_F32 , CVT_PKNORM_U16_F32 ,
  CVT_PK_I16_I32 , CVT_PK_U16_U32 , FP_TO_FP16 , BUILD_VERTICAL_VECTOR ,
  CONST_DATA_PTR , PC_ADD_REL_OFFSET , LDS , DUMMY_CHAIN ,
  FIRST_MEM_OPCODE_NUMBER = ISD::FIRST_TARGET_MEMORY_OPCODE , LOAD_D16_HI , LOAD_D16_LO , LOAD_D16_HI_I8 ,
  LOAD_D16_HI_U8 , LOAD_D16_LO_I8 , LOAD_D16_LO_U8 , STORE_MSKOR ,
  TBUFFER_STORE_FORMAT , TBUFFER_STORE_FORMAT_D16 , TBUFFER_LOAD_FORMAT , TBUFFER_LOAD_FORMAT_D16 ,
  DS_ORDERED_COUNT , ATOMIC_CMP_SWAP , BUFFER_LOAD , BUFFER_LOAD_UBYTE ,
  BUFFER_LOAD_USHORT , BUFFER_LOAD_BYTE , BUFFER_LOAD_SHORT , BUFFER_LOAD_TFE ,
  BUFFER_LOAD_UBYTE_TFE , BUFFER_LOAD_USHORT_TFE , BUFFER_LOAD_BYTE_TFE , BUFFER_LOAD_SHORT_TFE ,
  BUFFER_LOAD_FORMAT , BUFFER_LOAD_FORMAT_TFE , BUFFER_LOAD_FORMAT_D16 , SBUFFER_LOAD ,
  SBUFFER_LOAD_BYTE , SBUFFER_LOAD_UBYTE , SBUFFER_LOAD_SHORT , SBUFFER_LOAD_USHORT ,
  SBUFFER_PREFETCH_DATA , BUFFER_STORE , BUFFER_STORE_BYTE , BUFFER_STORE_SHORT ,
  BUFFER_STORE_FORMAT , BUFFER_STORE_FORMAT_D16 , BUFFER_ATOMIC_SWAP , BUFFER_ATOMIC_ADD ,
  BUFFER_ATOMIC_SUB , BUFFER_ATOMIC_SMIN , BUFFER_ATOMIC_UMIN , BUFFER_ATOMIC_SMAX ,
  BUFFER_ATOMIC_UMAX , BUFFER_ATOMIC_AND , BUFFER_ATOMIC_OR , BUFFER_ATOMIC_XOR ,
  BUFFER_ATOMIC_INC , BUFFER_ATOMIC_DEC , BUFFER_ATOMIC_CMPSWAP , BUFFER_ATOMIC_CSUB ,
  BUFFER_ATOMIC_FADD , BUFFER_ATOMIC_FMIN , BUFFER_ATOMIC_FMAX , BUFFER_ATOMIC_COND_SUB_U32
}
 

Enumeration Type Documentation

◆ NodeType

enum llvm::AMDGPUISD::NodeType : unsigned
Enumerator
FIRST_NUMBER 
BRANCH_COND 
CALL 
TC_RETURN 
TC_RETURN_GFX 
TC_RETURN_CHAIN 
TRAP 
IF 
ELSE 
LOOP 
ENDPGM 
ENDPGM_TRAP 
SIMULATED_TRAP 
RETURN_TO_EPILOG 
RET_GLUE 
WAVE_ADDRESS 
DWORDADDR 
FRACT 
CLAMP 

CLAMP value between 0.0 and 1.0.

NaN clamped to 0, following clamp output modifier behavior with dx10_enable.

SETCC 
DENORM_MODE 
FMA_W_CHAIN 
FMUL_W_CHAIN 
COS_HW 
SIN_HW 
FMAX_LEGACY 
FMIN_LEGACY 
FMAX3 
SMAX3 
UMAX3 
FMIN3 
SMIN3 
UMIN3 
FMED3 
SMED3 
UMED3 
FMAXIMUM3 
FMINIMUM3 
FDOT2 
URECIP 
DIV_SCALE 
DIV_FMAS 
DIV_FIXUP 
FMAD_FTZ 
RCP 
RSQ 
RCP_LEGACY 
RCP_IFLAG 
LOG 
EXP 
FMUL_LEGACY 
RSQ_CLAMP 
FP_CLASS 
DOT4 
CARRY 
BORROW 
BFE_U32 
BFE_I32 
BFI 
BFM 
FFBH_U32 
FFBH_I32 
FFBL_B32 
MUL_U24 
MUL_I24 
MULHI_U24 
MULHI_I24 
MAD_U24 
MAD_I24 
MAD_U64_U32 
MAD_I64_I32 
PERM 
TEXTURE_FETCH 
R600_EXPORT 
CONST_ADDRESS 
REGISTER_LOAD 
REGISTER_STORE 
CVT_F32_UBYTE0 
CVT_F32_UBYTE1 
CVT_F32_UBYTE2 
CVT_F32_UBYTE3 
CVT_PKRTZ_F16_F32 
CVT_PKNORM_I16_F32 
CVT_PKNORM_U16_F32 
CVT_PK_I16_I32 
CVT_PK_U16_U32 
FP_TO_FP16 
BUILD_VERTICAL_VECTOR 

This node is for VLIW targets and it is used to represent a vector that is stored in consecutive registers with the same channel.

For example: |X |Y|Z|W| T0|v.x| | | | T1|v.y| | | | T2|v.z| | | | T3|v.w| | | |

CONST_DATA_PTR 

Pointer to the start of the shader's constant data.

PC_ADD_REL_OFFSET 
LDS 
DUMMY_CHAIN 
FIRST_MEM_OPCODE_NUMBER 
LOAD_D16_HI 
LOAD_D16_LO 
LOAD_D16_HI_I8 
LOAD_D16_HI_U8 
LOAD_D16_LO_I8 
LOAD_D16_LO_U8 
STORE_MSKOR 
TBUFFER_STORE_FORMAT 
TBUFFER_STORE_FORMAT_D16 
TBUFFER_LOAD_FORMAT 
TBUFFER_LOAD_FORMAT_D16 
DS_ORDERED_COUNT 
ATOMIC_CMP_SWAP 
BUFFER_LOAD 
BUFFER_LOAD_UBYTE 
BUFFER_LOAD_USHORT 
BUFFER_LOAD_BYTE 
BUFFER_LOAD_SHORT 
BUFFER_LOAD_TFE 
BUFFER_LOAD_UBYTE_TFE 
BUFFER_LOAD_USHORT_TFE 
BUFFER_LOAD_BYTE_TFE 
BUFFER_LOAD_SHORT_TFE 
BUFFER_LOAD_FORMAT 
BUFFER_LOAD_FORMAT_TFE 
BUFFER_LOAD_FORMAT_D16 
SBUFFER_LOAD 
SBUFFER_LOAD_BYTE 
SBUFFER_LOAD_UBYTE 
SBUFFER_LOAD_SHORT 
SBUFFER_LOAD_USHORT 
SBUFFER_PREFETCH_DATA 
BUFFER_STORE 
BUFFER_STORE_BYTE 
BUFFER_STORE_SHORT 
BUFFER_STORE_FORMAT 
BUFFER_STORE_FORMAT_D16 
BUFFER_ATOMIC_SWAP 
BUFFER_ATOMIC_ADD 
BUFFER_ATOMIC_SUB 
BUFFER_ATOMIC_SMIN 
BUFFER_ATOMIC_UMIN 
BUFFER_ATOMIC_SMAX 
BUFFER_ATOMIC_UMAX 
BUFFER_ATOMIC_AND 
BUFFER_ATOMIC_OR 
BUFFER_ATOMIC_XOR 
BUFFER_ATOMIC_INC 
BUFFER_ATOMIC_DEC 
BUFFER_ATOMIC_CMPSWAP 
BUFFER_ATOMIC_CSUB 
BUFFER_ATOMIC_FADD 
BUFFER_ATOMIC_FMIN 
BUFFER_ATOMIC_FMAX 
BUFFER_ATOMIC_COND_SUB_U32 

Definition at line 394 of file AMDGPUISelLowering.h.

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