LLVM 24.0.0git
llvm::VOPDLiteralFixup Struct Reference

A 32-bit immediate which the VOPD encoding cannot hold. More...

#include "Target/AMDGPU/GCNVOPDUtils.h"

Public Attributes

unsigned CompIdx
 Component holding the immediate, AMDGPU::VOPD::X or AMDGPU::VOPD::Y.
unsigned OpIdx
 Index of the immediate operand within that component.
int32_t Imm
 Value which has to be placed in a register.
const MCRegisterClassSlotRC
 Scalar registers the VOPD source slot can read.

Detailed Description

A 32-bit immediate which the VOPD encoding cannot hold.

The pair only becomes legal after the operand is replaced by a scalar register holding Imm.

Definition at line 31 of file GCNVOPDUtils.h.

Member Data Documentation

◆ CompIdx

unsigned llvm::VOPDLiteralFixup::CompIdx

Component holding the immediate, AMDGPU::VOPD::X or AMDGPU::VOPD::Y.

Definition at line 33 of file GCNVOPDUtils.h.

◆ Imm

int32_t llvm::VOPDLiteralFixup::Imm

Value which has to be placed in a register.

Definition at line 37 of file GCNVOPDUtils.h.

◆ OpIdx

unsigned llvm::VOPDLiteralFixup::OpIdx

Index of the immediate operand within that component.

Definition at line 35 of file GCNVOPDUtils.h.

◆ SlotRC

const MCRegisterClass* llvm::VOPDLiteralFixup::SlotRC

Scalar registers the VOPD source slot can read.

This is the slot class narrowed to SGPR_32, so every register in it can be used.

Definition at line 40 of file GCNVOPDUtils.h.


The documentation for this struct was generated from the following file: