LLVM 17.0.0git
M68kBaseInfo.h
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1//===-- M68kBaseInfo.h - Top level definitions for M68k MC ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file contains small standalone helper functions and enum definitions
11/// for the M68k target useful for the compiler back-end and the MC
12/// libraries. As such, it deliberately does not include references to LLVM
13/// core code gen types, passes, etc..
14///
15//===----------------------------------------------------------------------===//
16
17#ifndef LLVM_LIB_TARGET_M68K_MCTARGETDESC_M68KBASEINFO_H
18#define LLVM_LIB_TARGET_M68K_MCTARGETDESC_M68KBASEINFO_H
19
20#include "M68kMCTargetDesc.h"
21
22#include "llvm/MC/MCExpr.h"
24#include "llvm/Support/Endian.h"
26
27#define GET_INSTRINFO_MI_OPS_INFO
28#define GET_INSTRINFO_OPERAND_TYPES_ENUM
29#define GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
30#include "M68kGenInstrInfo.inc"
31
32namespace llvm {
33
34namespace M68k {
35
36/// Enums for memory operand decoding. Supports these forms:
37/// (d,An)
38/// (d,An,Xn)
39/// ([bd,An],Xn,od)
40/// ([bd,An,Xn],od)
41/// TODO Implement scaling other than 1
42enum { MemDisp = 0, MemBase = 1, MemIndex = 2, MemOuter = 3 };
43
44/// Enums for pc-relative memory operand decoding. Supports these forms:
45/// (d,PC)
46/// (d,PC,Xn)
47/// ([bd,PC],Xn,od)
48/// ([bd,PC,Xn],od)
49enum { PCRelDisp = 0, PCRelIndex = 1, PCRelOuter = 2 };
50
51enum class MemAddrModeKind : unsigned {
52 j = 1, // (An)
53 o, // (An)+
54 e, // -(An)
55 p, // (d,An)
56 f, // (d,An,Xn.L)
57 F, // (d,An,Xn.W)
58 g, // (d,An,Xn.L,SCALE)
59 G, // (d,An,Xn.W,SCALE)
60 u, // ([bd,An],Xn.L,SCALE,od)
61 U, // ([bd,An],Xn.W,SCALE,od)
62 v, // ([bd,An,Xn.L,SCALE],od)
63 V, // ([bd,An,Xn.W,SCALE],od)
64 b, // abs.L
65 B, // abs.W
66 q, // (d,PC)
67 k, // (d,PC,Xn.L)
68 K, // (d,PC,Xn.W)
69 l, // (d,PC,Xn.L,SCALE)
70 L, // (d,PC,Xn.W,SCALE)
71 x, // ([bd,PC],Xn.L,SCALE,od)
72 X, // ([bd,PC],Xn.W,SCALE,od)
73 y, // ([bd,PC,Xn.L,SCALE],od)
74 Y // ([bd,PC,Xn.W,SCALE],od)
75};
76
77// On a LE host:
78// MSB LSB MSB LSB
79// | 0x12 0x34 | 0xAB 0xCD | -> | 0xAB 0xCD | 0x12 0x34 |
80// (On a BE host nothing changes)
81template <typename value_t> value_t swapWord(value_t Val) {
82 const unsigned NumWords = sizeof(Val) / 2;
83 if (NumWords <= 1)
84 return Val;
86 value_t NewVal = 0;
87 for (unsigned i = 0U; i != NumWords; ++i) {
88 uint16_t Part = (Val >> (i * 16)) & 0xFFFF;
90 NewVal |= (Part << (i * 16));
91 }
92 return NewVal;
93}
94} // namespace M68k
95
96namespace M68kBeads {
97enum {
98 Ctrl = 0x0,
99 Bits1 = 0x1,
100 Bits2 = 0x2,
101 Bits3 = 0x3,
102 Bits4 = 0x4,
103 DAReg = 0x5,
104 DA = 0x6,
105 Reg = 0x7,
106 DReg = 0x8,
107 Disp8 = 0x9,
108 Imm8 = 0xA,
109 Imm16 = 0xB,
110 Imm32 = 0xC,
111 Imm3 = 0xD,
112};
113
114// Ctrl payload
115enum {
116 Term = 0x0,
117 Ignore = 0x1,
118};
119} // namespace M68kBeads
120
121/// This namespace holds all of the target specific flags that instruction info
122/// tracks.
123namespace M68kII {
124/// Target Operand Flag enum.
125enum TOF {
126
128
129 /// On a symbol operand this indicates that the immediate is the absolute
130 /// address of the symbol.
132
133 /// On a symbol operand this indicates that the immediate is the pc-relative
134 /// address of the symbol.
136
137 /// On a symbol operand this indicates that the immediate is the offset to
138 /// the GOT entry for the symbol name from the base of the GOT.
139 ///
140 /// name@GOT
142
143 /// On a symbol operand this indicates that the immediate is the offset to
144 /// the location of the symbol name from the base of the GOT.
145 ///
146 /// name@GOTOFF
148
149 /// On a symbol operand this indicates that the immediate is offset to the
150 /// GOT entry for the symbol name from the current code location.
151 ///
152 /// name@GOTPCREL
154
155 /// On a symbol operand this indicates that the immediate is offset to the
156 /// PLT entry of symbol name from the current code location.
157 ///
158 /// name@PLT
160}; // enum TOF
161
162/// Return true if the specified TargetFlag operand is a reference to a stub
163/// for a global, not the global itself.
164inline static bool isGlobalStubReference(unsigned char TargetFlag) {
165 switch (TargetFlag) {
166 default:
167 return false;
168 case M68kII::MO_GOTPCREL: // pc-relative GOT reference.
169 case M68kII::MO_GOT: // normal GOT reference.
170 return true;
171 }
172}
173
174/// Return True if the specified GlobalValue is a direct reference for a
175/// symbol.
176inline static bool isDirectGlobalReference(unsigned char Flag) {
177 switch (Flag) {
178 default:
179 return false;
183 return true;
184 }
185}
186
187/// Return true if the specified global value reference is relative to a 32-bit
188/// PIC base (M68kISD::GLOBAL_BASE_REG). If this is true, the addressing mode
189/// has the PIC base register added in.
190inline static bool isGlobalRelativeToPICBase(unsigned char TargetFlag) {
191 switch (TargetFlag) {
192 default:
193 return false;
194 case M68kII::MO_GOTOFF: // isPICStyleGOT: local global.
195 case M68kII::MO_GOT: // isPICStyleGOT: other global.
196 return true;
197 }
198}
199
200/// Return True if the specified GlobalValue requires PC addressing mode.
201inline static bool isPCRelGlobalReference(unsigned char Flag) {
202 switch (Flag) {
203 default:
204 return false;
207 return true;
208 }
209}
210
211/// Return True if the Block is referenced using PC
212inline static bool isPCRelBlockReference(unsigned char Flag) {
213 switch (Flag) {
214 default:
215 return false;
217 return true;
218 }
219}
220
221static inline bool isAddressRegister(unsigned RegNo) {
222 switch (RegNo) {
223 case M68k::WA0:
224 case M68k::WA1:
225 case M68k::WA2:
226 case M68k::WA3:
227 case M68k::WA4:
228 case M68k::WA5:
229 case M68k::WA6:
230 case M68k::WSP:
231 case M68k::A0:
232 case M68k::A1:
233 case M68k::A2:
234 case M68k::A3:
235 case M68k::A4:
236 case M68k::A5:
237 case M68k::A6:
238 case M68k::SP:
239 return true;
240 default:
241 return false;
242 }
243}
244
245static inline bool hasMultiMIOperands(unsigned Op, unsigned LogicalOpIdx) {
246 return M68k::getLogicalOperandSize(Op, LogicalOpIdx) > 1;
247}
248
249static inline unsigned getMaskedSpillRegister(unsigned order) {
250 switch (order) {
251 default:
252 return 0;
253 case 0:
254 return M68k::D0;
255 case 1:
256 return M68k::D1;
257 case 2:
258 return M68k::D2;
259 case 3:
260 return M68k::D3;
261 case 4:
262 return M68k::D4;
263 case 5:
264 return M68k::D5;
265 case 6:
266 return M68k::D6;
267 case 7:
268 return M68k::D7;
269 case 8:
270 return M68k::A0;
271 case 9:
272 return M68k::A1;
273 case 10:
274 return M68k::A2;
275 case 11:
276 return M68k::A3;
277 case 12:
278 return M68k::A4;
279 case 13:
280 return M68k::A5;
281 case 14:
282 return M68k::A6;
283 case 15:
284 return M68k::SP;
285 }
286}
287
288} // namespace M68kII
289
290} // namespace llvm
291
292#endif // LLVM_LIB_TARGET_M68K_MCTARGETDESC_M68KBASEINFO_H
This file provides M68k specific target descriptions.
static bool isAddressRegister(unsigned RegNo)
Definition: M68kBaseInfo.h:221
static bool isPCRelBlockReference(unsigned char Flag)
Return True if the Block is referenced using PC.
Definition: M68kBaseInfo.h:212
static bool isGlobalRelativeToPICBase(unsigned char TargetFlag)
Return true if the specified global value reference is relative to a 32-bit PIC base (M68kISD::GLOBAL...
Definition: M68kBaseInfo.h:190
static bool isGlobalStubReference(unsigned char TargetFlag)
Return true if the specified TargetFlag operand is a reference to a stub for a global,...
Definition: M68kBaseInfo.h:164
static bool isPCRelGlobalReference(unsigned char Flag)
Return True if the specified GlobalValue requires PC addressing mode.
Definition: M68kBaseInfo.h:201
static bool hasMultiMIOperands(unsigned Op, unsigned LogicalOpIdx)
Definition: M68kBaseInfo.h:245
static unsigned getMaskedSpillRegister(unsigned order)
Definition: M68kBaseInfo.h:249
TOF
Target Operand Flag enum.
Definition: M68kBaseInfo.h:125
@ MO_GOTOFF
On a symbol operand this indicates that the immediate is the offset to the location of the symbol nam...
Definition: M68kBaseInfo.h:147
@ MO_PLT
On a symbol operand this indicates that the immediate is offset to the PLT entry of symbol name from ...
Definition: M68kBaseInfo.h:159
@ MO_GOT
On a symbol operand this indicates that the immediate is the offset to the GOT entry for the symbol n...
Definition: M68kBaseInfo.h:141
@ MO_ABSOLUTE_ADDRESS
On a symbol operand this indicates that the immediate is the absolute address of the symbol.
Definition: M68kBaseInfo.h:131
@ MO_GOTPCREL
On a symbol operand this indicates that the immediate is offset to the GOT entry for the symbol name ...
Definition: M68kBaseInfo.h:153
@ MO_PC_RELATIVE_ADDRESS
On a symbol operand this indicates that the immediate is the pc-relative address of the symbol.
Definition: M68kBaseInfo.h:135
static bool isDirectGlobalReference(unsigned char Flag)
Return True if the specified GlobalValue is a direct reference for a symbol.
Definition: M68kBaseInfo.h:176
value_t swapWord(value_t Val)
Definition: M68kBaseInfo.h:81
value_type byte_swap(value_type value, endianness endian)
Definition: Endian.h:49
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18