LLVM
17.0.0git
lib
Target
Mips
MipsOptionRecord.h
Go to the documentation of this file.
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//===- MipsOptionRecord.h - Abstraction for storing information -*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// MipsOptionRecord - Abstraction for storing arbitrary information in
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// ELF files. Arbitrary information (e.g. register usage) can be stored in Mips
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// specific ELF sections like .Mips.options. Specific records should subclass
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// MipsOptionRecord and provide an implementation to EmitMipsOptionRecord which
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// basically just dumps the information into an ELF section. More information
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// about .Mips.option can be found in the SysV ABI and the 64-bit ELF Object
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// specification.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSOPTIONRECORD_H
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#define LLVM_LIB_TARGET_MIPS_MIPSOPTIONRECORD_H
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#include "
MCTargetDesc/MipsMCTargetDesc.h
"
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#include "
llvm/MC/MCContext.h
"
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#include "
llvm/MC/MCRegisterInfo.h
"
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#include <cstdint>
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namespace
llvm
{
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class
MipsELFStreamer;
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class
MipsOptionRecord
{
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public
:
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virtual
~MipsOptionRecord
() =
default
;
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virtual
void
EmitMipsOptionRecord
() = 0;
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};
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class
MipsRegInfoRecord
:
public
MipsOptionRecord
{
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public
:
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MipsRegInfoRecord
(
MipsELFStreamer
*
S
,
MCContext
&Context)
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: Streamer(
S
),
Context
(
Context
) {
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ri_gprmask = 0;
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ri_cprmask[0] = ri_cprmask[1] = ri_cprmask[2] = ri_cprmask[3] = 0;
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ri_gp_value = 0;
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const
MCRegisterInfo
*
TRI
=
Context
.getRegisterInfo();
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GPR32RegClass = &(
TRI
->getRegClass(Mips::GPR32RegClassID));
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GPR64RegClass = &(
TRI
->getRegClass(Mips::GPR64RegClassID));
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FGR32RegClass = &(
TRI
->getRegClass(Mips::FGR32RegClassID));
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FGR64RegClass = &(
TRI
->getRegClass(Mips::FGR64RegClassID));
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AFGR64RegClass = &(
TRI
->getRegClass(Mips::AFGR64RegClassID));
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MSA128BRegClass = &(
TRI
->getRegClass(Mips::MSA128BRegClassID));
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COP0RegClass = &(
TRI
->getRegClass(Mips::COP0RegClassID));
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COP2RegClass = &(
TRI
->getRegClass(Mips::COP2RegClassID));
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COP3RegClass = &(
TRI
->getRegClass(Mips::COP3RegClassID));
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}
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~MipsRegInfoRecord
()
override
=
default
;
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void
EmitMipsOptionRecord
()
override
;
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void
SetPhysRegUsed
(
unsigned
Reg
,
const
MCRegisterInfo
*MCRegInfo);
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private
:
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MipsELFStreamer
*Streamer;
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MCContext
&Context;
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const
MCRegisterClass
*GPR32RegClass;
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const
MCRegisterClass
*GPR64RegClass;
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const
MCRegisterClass
*FGR32RegClass;
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const
MCRegisterClass
*FGR64RegClass;
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const
MCRegisterClass
*AFGR64RegClass;
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const
MCRegisterClass
*MSA128BRegClass;
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const
MCRegisterClass
*COP0RegClass;
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const
MCRegisterClass
*COP2RegClass;
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const
MCRegisterClass
*COP3RegClass;
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uint32_t
ri_gprmask;
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uint32_t
ri_cprmask[4];
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int64_t ri_gp_value;
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};
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}
// end namespace llvm
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#endif // LLVM_LIB_TARGET_MIPS_MIPSOPTIONRECORD_H
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition:
AddressRanges.h:18
llvm::MCContext
Context object for machine code objects.
Definition:
MCContext.h:76
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition:
X86DisassemblerDecoder.h:462
llvm::MipsOptionRecord::EmitMipsOptionRecord
virtual void EmitMipsOptionRecord()=0
llvm::MipsRegInfoRecord::MipsRegInfoRecord
MipsRegInfoRecord(MipsELFStreamer *S, MCContext &Context)
Definition:
MipsOptionRecord.h:40
llvm::MipsRegInfoRecord
Definition:
MipsOptionRecord.h:38
TRI
unsigned const TargetRegisterInfo * TRI
Definition:
MachineSink.cpp:1628
llvm::MCRegisterClass
MCRegisterClass - Base class of TargetRegisterClass.
Definition:
MCRegisterInfo.h:31
Context
LLVMContext & Context
Definition:
NVVMIntrRange.cpp:66
llvm::MipsRegInfoRecord::SetPhysRegUsed
void SetPhysRegUsed(unsigned Reg, const MCRegisterInfo *MCRegInfo)
Definition:
MipsOptionRecord.cpp:73
MCContext.h
llvm::MipsOptionRecord::~MipsOptionRecord
virtual ~MipsOptionRecord()=default
MCRegisterInfo.h
MipsMCTargetDesc.h
uint32_t
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition:
README.txt:210
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition:
MCRegisterInfo.h:135
llvm::MipsOptionRecord
Definition:
MipsOptionRecord.h:31
llvm::MipsRegInfoRecord::~MipsRegInfoRecord
~MipsRegInfoRecord() override=default
llvm::MipsELFStreamer
Definition:
MipsELFStreamer.h:30
llvm::MipsRegInfoRecord::EmitMipsOptionRecord
void EmitMipsOptionRecord() override
Definition:
MipsOptionRecord.cpp:22
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