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15 #ifndef LLVM_MC_MCREGISTERINFO_H
16 #define LLVM_MC_MCREGISTERINFO_H
69 unsigned RegNo = unsigned(
Reg);
70 unsigned InByte = RegNo % 8;
71 unsigned Byte = RegNo / 8;
74 return (
RegSet[Byte] & (1 << InByte)) != 0;
162 unsigned NumRegUnits;
167 const char *RegStrings;
168 const char *RegClassStrings;
173 unsigned NumSubRegIndices;
177 unsigned L2DwarfRegsSize;
178 unsigned EHL2DwarfRegsSize;
179 unsigned Dwarf2LRegsSize;
180 unsigned EHDwarf2LRegsSize;
240 template <
class SubT>
243 std::forward_iterator_tag, MCPhysReg> {
265 End.Iter.List =
nullptr;
270 return Iter.List ==
Arg.Iter.List;
275 using mc_difflist_iterator::iterator_facade_base::operator++;
277 assert(Iter.List &&
"Cannot increment the end iterator!");
304 MCRI->DiffLists + MCRI->
get(
Reg).SuperRegs) {}
361 const char *ClassStrings,
372 RegUnitMaskSequences = RUMS;
373 RegStrings = Strings;
374 RegClassStrings = ClassStrings;
376 RegUnitRoots = RURoots;
378 SubRegIndices = SubIndices;
379 NumSubRegIndices = NumIndices;
380 SubRegIdxRanges = SubIdxRanges;
381 RegEncodingTable =
RET;
384 EHL2DwarfRegs =
nullptr;
385 EHL2DwarfRegsSize = 0;
386 L2DwarfRegs =
nullptr;
388 EHDwarf2LRegs =
nullptr;
389 EHDwarf2LRegsSize = 0;
390 Dwarf2LRegs =
nullptr;
401 EHL2DwarfRegsSize =
Size;
404 L2DwarfRegsSize =
Size;
415 EHDwarf2LRegsSize =
Size;
418 Dwarf2LRegsSize =
Size;
428 L2SEHRegs[LLVMReg] = SEHReg;
432 L2CVRegs[LLVMReg] = CVReg;
448 "Attempting to access record for invalid register number!");
486 return RegStrings +
get(RegNo).
Name;
499 return NumSubRegIndices;
517 std::optional<unsigned>
getLLVMRegNum(
unsigned RegNum,
bool isEH)
const;
549 return RegClassStrings +
Class->NameIdx;
555 "Attempting to get encoding for invalid register number!");
556 return RegEncodingTable[RegNo];
600 bool IncludeSelf =
false) {
618 : SRIter(
Reg, MCRI) {
649 bool IncludeSelf =
false) {
687 assert(
Reg &&
"Null register has no regunits");
691 unsigned Scale = RU & 15;
692 unsigned Offset = RU >> 4;
724 : RUIter(
Reg, MCRI) {
726 MaskListIter = &MCRI->RegUnitMaskSequences[Idx];
731 return std::make_pair(*RUIter, *MaskListIter);
762 assert(RegUnit < MCRI->getNumRegUnits() &&
"Invalid register unit");
763 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
764 Reg1 = MCRI->RegUnitRoots[RegUnit][1];
801 : Reg(Reg), MCRI(MCRI), IncludeSelf(IncludeSelf) {
806 if (!(!IncludeSelf && Reg == *
SI))
816 assert(
SI.isValid() &&
"Cannot dereference an invalid iterator.");
823 if (
SI.isValid())
return;
841 while (!IncludeSelf &&
isValid() && *
SI == Reg);
847 #endif // LLVM_MC_MCREGISTERINFO_H
int getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const
Map a target EH register number to an equivalent DWARF register number.
This is an optimization pass for GlobalISel generic memory operations.
const char * getName(MCRegister RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register.
Iterator that enumerates the sub-registers of a Reg and the associated sub-register indices.
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
mc_superreg_iterator()=default
regclass_iterator regclass_end() const
MCRegisterDesc - This record contains information about a particular register.
regclass_iterator regclass_begin() const
bool isValid() const
Returns true if this iterator is not yet at the end.
unsigned getNumRegs() const
getNumRegs - Return the number of registers in this class.
void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA, unsigned PC, const MCRegisterClass *C, unsigned NC, const MCPhysReg(*RURoots)[2], unsigned NRU, const MCPhysReg *DL, const LaneBitmask *RUMS, const char *Strings, const char *ClassStrings, const uint16_t *SubIndices, unsigned NumIndices, const SubRegCoveredBits *SubIdxRanges, const uint16_t *RET)
Initialize MCRegisterInfo, called by TableGen auto-generated routines.
MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, const MCRegisterClass *RC) const
Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.
unsigned getSizeInBits() const
Return the size of the physical register in bits if we are able to determine it.
MCSuperRegIterator()=default
void init(MCPhysReg InitVal, const MCPhysReg *DiffList)
init - Point the iterator to InitVal, decoding subsequent values from DiffList.
int getDwarfRegNum(MCRegister RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Reg
All possible values of the reg field in the ModR/M byte.
MCRegUnitMaskIterator()=default
Forward iterator using DiffListIterator.
unsigned getSubRegIndex() const
Returns sub-register index of the current sub-register.
uint16_t getEncodingValue(MCRegister RegNo) const
Returns the encoding for RegNo.
void operator++()
Preincrement to move to the next root register.
detail::concat_range< const MCPhysReg, iterator_range< mc_subreg_iterator >, iterator_range< mc_superreg_iterator > > sub_and_superregs_inclusive(MCRegister Reg) const
Return an iterator range over all sub- and super-registers of Reg, including Reg.
const MCRegisterDesc & operator[](MCRegister RegNo) const
Forward iterator over all sub-registers.
bool contains(MCRegister Reg) const
contains - Return true if the specified register is included in this register class.
bool contains(MCRegister Reg1, MCRegister Reg2) const
contains - Return true if both registers are in this class.
MCRegister operator*() const
MCRegUnitRootIterator(unsigned RegUnit, const MCRegisterInfo *MCRI)
void operator++()
Moves to the next position.
unsigned getNumRegUnits() const
Return the number of (native) register units in the target.
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
mc_superreg_iterator(MCRegister Reg, const MCRegisterInfo *MCRI)
int getCopyCost() const
getCopyCost - Return the cost of copying a value between two registers in this class.
void mapLLVMRegToSEHReg(MCRegister LLVMReg, int SEHReg)
mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register number mapping.
MCRegisterClass - Base class of TargetRegisterClass.
iterator_range< mc_subreg_iterator > subregs(MCRegister Reg) const
Return an iterator range over all sub-registers of Reg, excluding Reg.
bool regsOverlap(MCRegister RegA, MCRegister RegB) const
Returns true if the two registers are equal or alias each other.
MCRegUnitMaskIterator(MCRegister Reg, const MCRegisterInfo *MCRI)
Constructs an iterator that traverses the register units and their associated LaneMasks in Reg.
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
const MCRegisterClass & getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
int getSEHRegNum(MCRegister RegNum) const
Map a target register to an equivalent SEH register number.
iterator_range< mc_subreg_iterator > subregs_inclusive(MCRegister Reg) const
Return an iterator range over all sub-registers of Reg, including Reg.
(vector float) vec_cmpeq(*A, *B) C
bool isValid() const
Returns true if this iterator is not yet at the end.
MCSuperRegIterator(MCRegister Reg, const MCRegisterInfo *MCRI, bool IncludeSelf=false)
unsigned getSubRegIndex(MCRegister RegNo, MCRegister SubRegNo) const
For a given register pair, return the sub-register index if the second register is a sub-register of ...
mc_subreg_iterator(MCRegisterInfo::DiffListIterator Iter)
unsigned getRegister(unsigned i) const
getRegister - Return the specified register in the class.
bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA or if RegB == RegA.
SubRegCoveredBits - Emitted by tablegen: bit range covered by a subreg index, -1 in any being invalid...
unsigned getNumRegClasses() const
MCRegUnitRootIterator()=default
bool isValid() const
Check if the iterator is at the end of the list.
mc_difflist_iterator(MCRegisterInfo::DiffListIterator Iter)
const uint16_t RegSetSize
mc_subreg_iterator(MCRegister Reg, const MCRegisterInfo *MCRI)
iterator begin() const
begin/end - Return all of the registers in this class.
DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be performed with a binary se...
void mapLLVMRegToCVReg(MCRegister LLVMReg, int CVReg)
MCRegUnitIterator()=default
MCRegUnitIterator - Create an iterator that traverses the register units in Reg.
MCSubRegIterator(MCRegister Reg, const MCRegisterInfo *MCRI, bool IncludeSelf=false)
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
static SubT end()
Return an iterator past the last element.
MCRegUnitMaskIterator enumerates a list of register units and their associated lane masks for Reg.
const MCPhysReg & operator*() const
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
CRTP base class which implements the entire standard iterator facade in terms of a minimal subset of ...
const uint8_t *const RegSet
std::optional< unsigned > getLLVMRegNum(unsigned RegNum, bool isEH) const
Map a dwarf register back to a target register.
MCSubRegIndexIterator(MCRegister Reg, const MCRegisterInfo *MCRI)
Constructs an iterator that traverses subregisters and their associated subregister indices.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
mc_difflist_iterator(MCRegister Reg, const MCPhysReg *DiffList)
MCSuperRegIterator enumerates all super-registers of Reg.
const uint16_t RegSizeInBits
SI optimize exec mask operations pre RA
std::pair< unsigned, LaneBitmask > operator*() const
Returns a (RegUnit, LaneMask) pair.
mc_difflist_iterator()=default
void mapLLVMRegsToDwarfRegs(const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
Used to initialize LLVM register to Dwarf register number mapping.
MCRegister getRARegister() const
This method should return the register where the return address can be found.
MCRegAliasIterator(MCRegister Reg, const MCRegisterInfo *MCRI, bool IncludeSelf)
unsigned getID() const
getID() - Return the register class ID number.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
const MCRegisterDesc & get(MCRegister RegNo) const
Provide a get method, equivalent to [], but more useful with a pointer to this object.
uint16_t RegUnitLaneMasks
Index into list with lane mask sequences.
MCRegUnitIterator & operator++()
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
MCRegister getSubReg() const
Returns current sub-register.
const char * getRegClassName(const MCRegisterClass *Class) const
MCRegister advance()
advance - Move to the next list position, return the applied differential.
bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a super-register of RegA or if RegB == RegA.
Helper to store a sequence of ranges being concatenated and access them.
bool operator<(DwarfLLVMRegPair RHS) const
MCRegister getProgramCounter() const
Return the register which is the program counter.
MCRegister operator*() const
Dereference the iterator to get the value at the current position.
bool isSubRegister(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA.
void operator++()
Pre-increment to move to the next position.
void mapDwarfRegsToLLVMRegs(const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
Used to initialize Dwarf register to LLVM register number mapping.
iterator_range< mc_superreg_iterator > superregs_inclusive(MCRegister Reg) const
Return an iterator range over all super-registers of Reg, including Reg.
Forward iterator over all super-registers.
MCSubRegIterator enumerates all sub-registers of Reg.
bool isSuperRegister(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a super-register of RegA.
iterator_range< mc_superreg_iterator > superregs(MCRegister Reg) const
Return an iterator range over all super-registers of Reg, excluding Reg.
MCRegUnitRootIterator enumerates the root registers of a register unit.
bool operator==(const mc_difflist_iterator &Arg) const
DiffListIterator()=default
Create an invalid iterator. Call init() to point to something useful.
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
A range adaptor for a pair of iterators.
mc_superreg_iterator(MCRegisterInfo::DiffListIterator Iter)
unsigned getSubRegIdxOffset(unsigned Idx) const
Get the offset of the bit range covered by a sub-register index.
bool isAllocatable() const
isAllocatable - Return true if this register class may be used to create virtual registers.
MCRegUnitIterator(MCRegister Reg, const MCRegisterInfo *MCRI)
mc_subreg_iterator()=default
int getCodeViewRegNum(MCRegister RegNum) const
Map a target register to an equivalent CodeView register number.
bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a super-register or sub-register of RegA or if RegB == RegA.
void operator++()
Moves to the next position.
unsigned operator*() const
Dereference to get the current root register.
DiffListIterator - Base iterator class that can traverse the differentially encoded register and regu...
iterator_range< regclass_iterator > regclasses() const
MCRegAliasIterator enumerates all registers aliasing Reg.
Wrapper class representing physical registers. Should be passed by value.
unsigned getSubRegIdxSize(unsigned Idx) const
Get the size of the bit range covered by a sub-register index.