Here is a list of all file members with links to the files they belong to:

- d -

• D : BuiltinGCs.cpp
• D3D_SYSTEM_VALUE : DXContainer.h, DXContainer.cpp
• D3DSystemValueNames : DXContainer.cpp
• D_SUB_SUPER : X86MCTargetDesc.cpp
• da : DependenceAnalysis.cpp
• DAG_INSTRUCTION : TargetLoweringBase.cpp, SelectionDAGBuilder.cpp, SelectionDAG.cpp, LegalizeVectorTypes.cpp, LegalizeVectorOps.cpp, TargetLowering.h, SelectionDAGNodes.h
• data_type : InstrProfReader.cpp
• DataBankMask : ARMHazardRecognizer.cpp
• DbgGatherSalvagableDVI() : LoopStrengthReduce.cpp
• DbgInserterHelper() : CodeGenPrepare.cpp
• DbgNVJCount : HexagonNewValueJump.cpp
• DBGRECORDTYPEKEYWORD : LLLexer.cpp
• DbgRewriteSalvageableDVIs() : LoopStrengthReduce.cpp
• DbgValReplacement : Local.cpp
• DbgVariableRecordsRemoveRedundantDbgInstrsUsingBackwardScan() : BasicBlockUtils.cpp
• DbgVariableRecordsRemoveRedundantDbgInstrsUsingForwardScan() : BasicBlockUtils.cpp
• DbgVariableRecordsRemoveUndefDbgAssignsFromEntryBlock() : BasicBlockUtils.cpp
• Dbl : TargetLibraryInfo.cpp
• DCEInstruction() : DCE.cpp
• DCELimit : StackSlotColoring.cpp
• dcMips16Helper : Mips16ISelLowering.cpp
• DDGDotFilenamePrefix : DDGPrinter.cpp
• DDSig : Mips16HardFloat.cpp
• debug : X86Disassembler.cpp
• Debug : Debug.cpp
• DEBUG_COUNTER() : MemorySanitizer.cpp, Attributor.cpp, ConstraintElimination.cpp, DCE.cpp, DeadStoreElimination.cpp, DivRemPairs.cpp, EarlyCSE.cpp, NewGVN.cpp, PartiallyInlineLibCalls.cpp, StraightLineStrengthReduce.cpp, AssumeBundleBuilder.cpp, PredicateInfo.cpp, SLPVectorizer.cpp, NewGVN.cpp, InstructionCombining.cpp, InstCombineNegator.cpp, PPCMIPeephole.cpp, SIInsertWaitcnts.cpp, MemorySanitizer.cpp, AArch64LoadStoreOptimizer.cpp, AArch64FalkorHWPFFix.cpp, DAGCombiner.cpp, MachineCopyPropagation.cpp, InstructionSelect.cpp, AssumeBundleQueries.cpp, DebugCounter.h
• DEBUG_KNUTH : APInt.cpp
• DEBUG_PREFIX : ARMBlockPlacement.cpp
• DEBUG_PRINT_STAT : InlineCost.cpp
• DEBUG_TYPE : WebAssemblyTargetInfo.cpp, VEAsmParser.cpp, WebAssemblyMCTargetDesc.cpp, WebAssemblyMCCodeEmitter.cpp, WebAssemblyMCAsmInfo.cpp, WebAssemblyInstPrinter.cpp, WebAssemblyDisassembler.cpp, WebAssemblyAsmTypeCheck.cpp, WebAssemblyAsmParser.cpp, VVPISelLowering.cpp, VETargetMachine.cpp, VESubtarget.cpp, VERegisterInfo.cpp, VEISelLowering.cpp, VEISelDAGToDAG.cpp, VEInstrInfo.cpp, VECustomDAG.cpp, VEAsmPrinter.cpp, VEMCExpr.cpp, VEMCCodeEmitter.cpp, VEInstPrinter.cpp, LVLGen.cpp, VEDisassembler.cpp, WebAssemblyFixFunctionBitcasts.cpp, RISCVTargetTransformInfo.cpp, WebAssemblyMCLowerPrePass.cpp, WebAssemblyLowerRefTypesIntPtrConv.cpp, WebAssemblyLowerEmscriptenEHSjLj.cpp, WebAssemblyLowerBrUnless.cpp, WebAssemblyLateEHPrepare.cpp, WebAssemblyISelLowering.cpp, WebAssemblyISelDAGToDAG.cpp, WebAssemblyInstrInfo.cpp, WebAssemblyFrameLowering.cpp, WebAssemblyFixIrreducibleControlFlow.cpp, WebAssemblyAddMissingPrototypes.cpp, WebAssemblyFixBrTableDefaults.cpp, WebAssemblyFastISel.cpp, WebAssemblyExplicitLocals.cpp, WebAssemblyExceptionInfo.cpp, WebAssemblyDebugFixup.cpp, WebAssemblyCleanCodeAfterTrap.cpp, WebAssemblyCFGStackify.cpp, WebAssemblyCFGSort.cpp, WebAssemblyAsmPrinter.cpp, WebAssemblyArgumentMove.cpp, SparcAsmPrinter.cpp, SPIRVInstructionSelector.cpp, SPIRVEmitNonSemanticDI.cpp, SPIRVDuplicatesTracker.cpp, SPIRVCommandLine.cpp, SPIRVBuiltins.cpp, SPIRVAsmPrinter.cpp, SPIRVMCCodeEmitter.cpp, SPIRVInstPrinter.cpp, SPIRVConvergenceRegionAnalysis.cpp, SparcSubtarget.cpp, SparcISelDAGToDAG.cpp, SPIRVISelLowering.cpp, SparcMCExpr.cpp, SparcMCCodeEmitter.cpp, SparcInstPrinter.cpp, SparcDisassembler.cpp, DelaySlotFiller.cpp, RISCVZacasABIFix.cpp, RISCVVLOptimizer.cpp, RISCVVectorPeephole.cpp, RISCVVectorMaskDAGMutation.cpp, CoroCleanup.cpp, SystemZMCExpr.cpp, SystemZSubtarget.cpp, SystemZShortenInst.cpp, SystemZSelectionDAGInfo.cpp, SystemZPostRewrite.cpp, SystemZMachineScheduler.cpp, SystemZLongBranch.cpp, SystemZISelLowering.cpp, SystemZISelDAGToDAG.cpp, SystemZInstrInfo.cpp, SystemZHazardRecognizer.cpp, SystemZElimCompare.cpp, SystemZTargetTransformInfo.cpp, SystemZMCCodeEmitter.cpp, SystemZInstPrinterCommon.cpp, SystemZHLASMInstPrinter.cpp, SystemZGNUInstPrinter.cpp, SystemZDisassembler.cpp, SPIRVSubtarget.cpp, SPIRVRegularizer.cpp, SPIRVPreLegalizer.cpp, SPIRVPostLegalizer.cpp, SPIRVModuleAnalysis.cpp, X86ReturnThunks.cpp, XCoreInstPrinter.cpp, XCoreDisassembler.cpp, X86WinFixupBufferSecurityCheck.cpp, X86WinEHState.cpp, X86VZeroUpper.cpp, X86TileConfig.cpp, X86TargetTransformInfo.cpp, X86Subtarget.cpp, X86SpeculativeLoadHardening.cpp, X86SpeculativeExecutionSideEffectSuppression.cpp, X86SelectionDAGInfo.cpp, XCoreAsmPrinter.cpp, X86RegisterInfo.cpp, X86PreTileConfig.cpp, X86PartialReduction.cpp, X86PadShortFunction.cpp, X86OptimizeLEAs.cpp, X86LowerTileCopy.cpp, X86LowerAMXType.cpp, X86LowerAMXIntrinsics.cpp, X86LoadValueInjectionRetHardening.cpp, X86LoadValueInjectionLoadHardening.cpp, X86ISelLoweringCall.cpp, XtensaMCExpr.cpp, HexagonSplitDouble.cpp, CoroAnnotationElide.cpp, CFGuard.cpp, TruncInstCombine.cpp, AggressiveInstCombine.cpp, Host.cpp, AArch64TargetParser.cpp, XtensaSubtarget.cpp, XtensaRegisterInfo.cpp, XtensaISelLowering.cpp, XtensaISelDAGToDAG.cpp, X86ISelLowering.cpp, XtensaMCCodeEmitter.cpp, XtensaInstPrinter.cpp, XtensaDisassembler.cpp, XtensaAsmParser.cpp, XCoreSubtarget.cpp, XCoreSelectionDAGInfo.cpp, XCoreRegisterInfo.cpp, XCoreLowerThreadLocal.cpp, XCoreISelLowering.cpp, XCoreISelDAGToDAG.cpp, WebAssemblySelectionDAGInfo.cpp, X86AvoidStoreForwardingBlocks.cpp, X86ArgumentStackSlotRebase.cpp, X86MCCodeEmitter.cpp, X86IntelInstPrinter.cpp, X86ATTInstPrinter.cpp, X86InstructionSelector.cpp, X86Disassembler.cpp, WebAssemblyTargetTransformInfo.cpp, WebAssemblyTargetMachine.cpp, WebAssemblySubtarget.cpp, WebAssemblySetP2AlignOperands.cpp, X86AvoidTrailingCall.cpp, WebAssemblyReplacePhysRegs.cpp, WebAssemblyRegStackify.cpp, WebAssemblyRegNumbering.cpp, WebAssemblyRegisterInfo.cpp, WebAssemblyRegColoring.cpp, WebAssemblyRefTypeMem2Local.cpp, WebAssemblyPeephole.cpp, WebAssemblyOptimizeReturned.cpp, WebAssemblyOptimizeLiveIntervals.cpp, WebAssemblyNullifyDebugValueLists.cpp, X86FixupLEAs.cpp, X86ISelDAGToDAG.cpp, X86InstrInfo.cpp, X86InstCombineIntrinsic.cpp, X86InsertWait.cpp, X86IndirectThunks.cpp, X86IndirectBranchTracking.cpp, X86FrameLowering.cpp, X86FloatingPoint.cpp, X86FlagsCopyLowering.cpp, X86FixupVectorConstants.cpp, X86FixupSetCC.cpp, WebAssemblyMemIntrinsicResults.cpp, X86FixupInstTuning.cpp, X86FixupBWInsts.cpp, X86FastTileConfig.cpp, X86FastPreTileConfig.cpp, X86ExpandPseudo.cpp, X86DomainReassignment.cpp, X86DiscriminateMemOps.cpp, X86CompressEVEX.cpp, X86CmovConversion.cpp, X86CallFrameOptimization.cpp, M68kISelLowering.cpp, MipsInstPrinter.cpp, MipsELFObjectWriter.cpp, MipsDisassembler.cpp, MipsAsmParser.cpp, M68kMCCodeEmitter.cpp, M68kInstPrinter.cpp, M68kAsmBackend.cpp, M68kTargetMachine.cpp, M68kSubtarget.cpp, M68kRegisterInfo.cpp, M68kMCInstLower.cpp, MipsMCCodeEmitter.cpp, M68kISelDAGToDAG.cpp, M68kInstrInfo.cpp, M68kFrameLowering.cpp, M68kExpandPseudo.cpp, M68kCollapseMOVEMPass.cpp, M68kAsmPrinter.cpp, M68kInstructionSelector.cpp, M68kDisassembler.cpp, M68kAsmParser.cpp, MipsConstantIslandPass.cpp, MipsPostLegalizerCombiner.cpp, MipsOs16.cpp, MipsOptimizePICCall.cpp, MipsMulMulBugPass.cpp, MipsModuleISelDAGToDAG.cpp, MipsISelLowering.cpp, MipsISelDAGToDAG.cpp, MipsInstructionSelector.cpp, MipsFastISel.cpp, MipsExpandPseudo.cpp, MipsDelaySlotFiller.cpp, LoongArchMCExpr.cpp, MipsBranchExpansion.cpp, MipsAsmPrinter.cpp, Mips16RegisterInfo.cpp, Mips16ISelLowering.cpp, Mips16ISelDAGToDAG.cpp, Mips16InstrInfo.cpp, Mips16HardFloat.cpp, MicroMipsSizeReduction.cpp, MipsNaClELFStreamer.cpp, MipsMCExpr.cpp, HexagonELFObjectWriter.cpp, LanaiDelaySlotFiller.cpp, LanaiAsmPrinter.cpp, LanaiDisassembler.h, HexagonShuffler.cpp, HexagonMCShuffler.cpp, HexagonMCExpr.cpp, HexagonMCELFStreamer.cpp, HexagonMCDuplexInfo.cpp, HexagonMCCompound.cpp, HexagonMCCodeEmitter.cpp, HexagonInstPrinter.cpp, LanaiISelDAGToDAG.cpp, HexagonAsmBackend.cpp, HexagonVLIWPacketizer.cpp, HexagonVectorPrint.cpp, HexagonVectorLoopCarriedReuse.cpp, HexagonVectorCombine.cpp, HexagonTfrCleanup.cpp, HexagonTargetTransformInfo.cpp, HexagonTargetObjectFile.cpp, HexagonSubtarget.cpp, ReplaceWithVeclib.cpp, LoongArchDeadRegisterDefinitions.cpp, LoongArchMCCodeEmitter.cpp, LoongArchInstPrinter.cpp, LoongArchAsmBackend.cpp, LoongArchTargetTransformInfo.cpp, LoongArchTargetMachine.cpp, LoongArchSubtarget.cpp, LoongArchOptWInstrs.cpp, LoongArchMergeBaseOffset.cpp, LoongArchISelLowering.cpp, LoongArchISelDAGToDAG.cpp, LoongArchFrameLowering.cpp, MipsPreLegalizerCombiner.cpp, LoongArchAsmPrinter.cpp, LoongArchDisassembler.cpp, LoongArchAsmParser.cpp, LanaiMCExpr.cpp, LanaiMCCodeEmitter.cpp, LanaiInstPrinter.cpp, LanaiSubtarget.cpp, LanaiSelectionDAGInfo.cpp, LanaiMemAluCombiner.cpp, LanaiISelLowering.cpp, PPCMIPeephole.cpp, RISCVAsmParser.cpp, PPCVSXSwapRemoval.cpp, PPCVSXFMAMutate.cpp, PPCVSXCopy.cpp, PPCTOCRegDeps.cpp, PPCTLSDynamicCall.cpp, PPCTargetTransformInfo.cpp, PPCSubtarget.cpp, PPCRegisterInfo.cpp, PPCReduceCRLogicals.cpp, PPCPreEmitPeephole.cpp, RISCVDisassembler.cpp, PPCLowerMASSVEntries.cpp, PPCLoopInstrFormPrep.cpp, PPCISelLowering.cpp, PPCISelDAGToDAG.cpp, PPCInstrInfo.cpp, PPCHazardRecognizers.cpp, PPCGenScalarMASSEntries.cpp, PPCFrameLowering.cpp, PPCFastISel.cpp, PPCExpandAtomicPseudoInsts.cpp, RISCVDeadRegisterDefinitions.cpp, RISCVRedundantCopyElimination.cpp, RISCVOptWInstrs.cpp, RISCVMergeBaseOffset.cpp, RISCVMakeCompressible.cpp, RISCVLandingPadSetup.cpp, RISCVISelLowering.cpp, RISCVISelDAGToDAG.cpp, RISCVInsertWriteVXRM.cpp, RISCVInsertVSETVLI.cpp, RISCVInsertReadWriteCSR.cpp, RISCVGatherScatterLowering.cpp, PPCEarlyReturn.cpp, RISCVCodeGenPrepare.cpp, RISCVAsmPrinter.cpp, RISCVMCExpr.cpp, RISCVMCCodeEmitter.cpp, RISCVInstPrinter.cpp, RISCVCustomBehaviour.cpp, RISCVPreLegalizerCombiner.cpp, RISCVPostLegalizerCombiner.cpp, RISCVO0PreLegalizerCombiner.cpp, RISCVInstructionSelector.cpp, MSP430AsmPrinter.cpp, NVPTXLowerAggrCopies.cpp, NVPTXISelLowering.cpp, NVPTXISelDAGToDAG.cpp, NVPTXCtorDtorLowering.cpp, NVPTXAliasAnalysis.cpp, NVPTXInstPrinter.cpp, MSP430Subtarget.cpp, MSP430RegisterInfo.cpp, MSP430ISelLowering.cpp, MSP430ISelDAGToDAG.cpp, MSP430BranchSelector.cpp, NVPTXLowerArgs.cpp, MSP430MCCodeEmitter.cpp, MSP430InstPrinter.cpp, MSP430Disassembler.cpp, MSP430AsmParser.cpp, MipsTargetMachine.cpp, MipsSubtarget.cpp, MipsSERegisterInfo.cpp, MipsSEISelLowering.cpp, MipsSEISelDAGToDAG.cpp, MipsRegisterInfo.cpp, PPCInstructionSelector.cpp, PPCCTRLoopsVerify.cpp, PPCCTRLoops.cpp, PPCBranchSelector.cpp, PPCBranchCoalescing.cpp, PPCBoolRetToInt.cpp, PPCAsmPrinter.cpp, PPCMCExpr.cpp, PPCMCCodeEmitter.cpp, PPCInstPrinter.cpp, PPCRegisterBankInfo.cpp, PPCLegalizerInfo.cpp, RISCVSubtarget.cpp, PPCCallLowering.cpp, PPCDisassembler.cpp, NVVMReflect.cpp, NVVMIntrRange.cpp, NVPTXTargetTransformInfo.cpp, NVPTXSubtarget.cpp, NVPTXRegisterInfo.cpp, NVPTXPrologEpilogPass.cpp, NVPTXPeephole.cpp, NVPTXMCExpr.cpp, FixupStatepointCallerSaved.cpp, LazyMachineBlockFrequencyInfo.cpp, InterleavedLoadCombinePass.cpp, InterleavedAccessPass.cpp, IndirectBrExpandPass.cpp, ImplicitNullChecks.cpp, Localizer.cpp, LoadStoreOpt.cpp, Legalizer.cpp, IRTranslator.cpp, InstructionSelect.cpp, CSEInfo.cpp, LiveDebugVariables.cpp, ExpandMemCmp.cpp, EarlyIfConversion.cpp, DwarfEHPrepare.cpp, ComplexDeinterleavingPass.cpp, CodeGenPrepare.cpp, AtomicExpandPass.cpp, StackSafetyAnalysis.cpp, LazyBranchProbabilityInfo.cpp, LazyBlockFrequencyInfo.cpp, VPlanVerifier.cpp, VPlanSLP.cpp, MachineScheduler.cpp, SafeStack.cpp, RenameIndependentSubregs.cpp, RemoveLoadsIntoFakeUses.cpp, PseudoProbeInserter.cpp, PrologEpilogInserter.cpp, PHIElimination.cpp, PeepholeOptimizer.cpp, MIRSampleProfile.cpp, MachineTraceMetrics.cpp, MachineStripDebug.cpp, MachineSink.cpp, VPlanRecipes.cpp, MachineRegionInfo.cpp, MachinePipeliner.cpp, MachineLICM.cpp, MachineDebugify.cpp, MachineCSE.cpp, MachineCombiner.cpp, MachineCheckDebugify.cpp, MachineBlockPlacement.cpp, MachineBlockFrequencyInfo.cpp, LiveStacks.cpp, LoopUtils.cpp, PredicateInfo.cpp, MoveAutoInit.cpp, ModuleUtils.cpp, MisExpect.cpp, Mem2Reg.cpp, LowerSwitch.cpp, LowerMemIntrinsics.cpp, LowerInvoke.cpp, LowerGlobalDtors.cpp, LowerAtomic.cpp, LoopVersioning.cpp, PromoteMemoryToRegister.cpp, LoopUnrollRuntime.cpp, LoopUnrollAndJam.cpp, LoopUnroll.cpp, LoopSimplify.cpp, LoopRotationUtils.cpp, LoopPeel.cpp, LoopConstrainer.cpp, Local.cpp, LibCallsShrinkWrap.cpp, LCSSA.cpp, VNCoercion.cpp, VPlanHCFGBuilder.cpp, VPlanAnalysis.cpp, VPlan.cpp, VectorCombine.cpp, SLPVectorizer.cpp, SandboxVectorizer.cpp, Legality.cpp, LoopVectorize.cpp, LoopVectorizationLegality.cpp, LoopIdiomVectorize.cpp, LoadStoreVectorizer.cpp, SelectOptimize.cpp, ValueMapper.cpp, UnifyLoopExits.cpp, SymbolRewriter.cpp, SSAUpdaterBulk.cpp, SSAUpdater.cpp, SplitModule.cpp, SimplifyIndVar.cpp, SimplifyCFG.cpp, SCCPSolver.cpp, SampleProfileInference.cpp, SIWholeQuadMode.cpp, MipsPostLegalizerCombiner.cpp, HexagonVectorCombine.cpp, DXILResourceAnalysis.cpp, DXILResourceAccess.cpp, DXILPrepare.cpp, DXILOpLowering.cpp, DXILIntrinsicExpansion.cpp, DXILFlattenArrays.cpp, DXILFinalizeLinkage.cpp, DXILDataScalarization.cpp, MVETPAndVPTOptimisationsPass.cpp, MipsPreLegalizerCombiner.cpp, SIPreAllocateWWMRegs.cpp, SIOptimizeVGPRLiveRange.cpp, SIOptimizeExecMaskingPreRA.cpp, SIOptimizeExecMasking.cpp, SILowerWWMCopies.cpp, SILowerSGPRSpills.cpp, SILowerI1Copies.cpp, SILoadStoreOptimizer.cpp, SILateBranchLowering.cpp, SIInsertWaitcnts.cpp, WebAssemblyExceptionInfo.cpp, ScalarizeMaskedMemIntrin.cpp, InferAddressSpaces.cpp, X86TileConfig.cpp, X86LowerAMXType.cpp, X86LowerAMXIntrinsics.cpp, X86FloatingPoint.cpp, X86FlagsCopyLowering.cpp, X86FastTileConfig.cpp, X86FastPreTileConfig.cpp, X86CmovConversion.cpp, X86AvoidStoreForwardingBlocks.cpp, SIFormMemoryClauses.cpp, RISCVPreLegalizerCombiner.cpp, RISCVPostLegalizerCombiner.cpp, RISCVO0PreLegalizerCombiner.cpp, PPCVSXSwapRemoval.cpp, PPCVSXFMAMutate.cpp, PPCTLSDynamicCall.cpp, PPCReduceCRLogicals.cpp, PPCMIPeephole.cpp, PPCCTRLoops.cpp, PPCBranchCoalescing.cpp, AArch64O0PreLegalizerCombiner.cpp, AMDGPULowerKernelArguments.cpp, AMDGPULowerBufferFatPointers.cpp, AMDGPULateCodeGenPrepare.cpp, AMDGPUGlobalISelDivergenceLowering.cpp, AMDGPUCodeGenPrepare.cpp, AMDGPUAtomicOptimizer.cpp, AMDGPUAnnotateUniformValues.cpp, AArch64PreLegalizerCombiner.cpp, AArch64PostSelectOptimize.cpp, AArch64PostLegalizerLowering.cpp, AArch64PostLegalizerCombiner.cpp, AMDGPULowerKernelAttributes.cpp, AArch64StackTagging.cpp, AArch64FalkorHWPFFix.cpp, AArch64A57FPLoadBalancing.cpp, WasmEHPrepare.cpp, TwoAddressInstructionPass.cpp, StackSlotColoring.cpp, StackProtector.cpp, StackColoring.cpp, SpillPlacement.cpp, ShadowStackGCLowering.cpp, AMDGPURewriteUndefForPHI.cpp, SIFixSGPRCopies.cpp, SIAnnotateControlFlow.cpp, R600Packetizer.cpp, R600OptimizeVectorRegisters.cpp, R600ExpandSpecialInstrs.cpp, R600ControlFlowFinalizer.cpp, R600ClauseMergePass.cpp, GCNRewritePartialRegUses.cpp, GCNPreRAOptimizations.cpp, GCNNSAReassign.cpp, AMDGPUUnifyDivergentExitNodes.cpp, IRNormalizer.cpp, AMDGPURewriteOutArguments.cpp, AMDGPURegBankSelect.cpp, AMDGPURegBankLegalize.cpp, AMDGPURegBankCombiner.cpp, AMDGPUPromoteKernelArguments.cpp, AMDGPUPromoteAlloca.cpp, AMDGPUPreLegalizerCombiner.cpp, AMDGPUPostLegalizerCombiner.cpp, AMDGPUMarkLastScratchLoad.cpp, AMDGPULowerModuleLDSPass.cpp, FunctionSpecialization.cpp, MergeFunctions.cpp, MemProfContextDisambiguation.cpp, LowerTypeTests.cpp, LoopExtractor.cpp, IROutliner.cpp, Internalize.cpp, Inliner.cpp, InferFunctionAttrs.cpp, HotColdSplitting.cpp, GlobalOpt.cpp, GlobalDCE.cpp, ModuleInliner.cpp, FunctionImport.cpp, FunctionAttrs.cpp, ForceFunctionAttrs.cpp, ExpandVariadics.cpp, ElimAvailExtern.cpp, DeadArgumentElimination.cpp, CrossDSOCFI.cpp, ConstantMerge.cpp, CalledValuePropagation.cpp, BlockExtractor.cpp, ObjCARCAPElim.cpp, ConstraintElimination.cpp, ConstantHoisting.cpp, CallSiteSplitting.cpp, BDCE.cpp, AnnotationRemarks.cpp, AlignmentFromAssumptions.cpp, ADCE.cpp, PtrState.cpp, ObjCARCOpts.cpp, ObjCARCExpand.cpp, ObjCARCContract.cpp, AttributorAttributes.cpp, DependencyAnalysis.cpp, WholeProgramDevirt.cpp, StripDeadPrototypes.cpp, SCCP.cpp, SampleProfileProbe.cpp, SampleProfileMatcher.cpp, SampleProfile.cpp, SampleContextTracker.cpp, PartialInlining.cpp, OpenMPOpt.cpp, InstCombineInternal.h, BlockCoverageInference.cpp, AddressSanitizer.cpp, InstructionCombining.cpp, InstCombineVectorOps.cpp, InstCombineSimplifyDemanded.cpp, InstCombineShifts.cpp, InstCombineSelect.cpp, InstCombinePHI.cpp, InstCombineNegator.cpp, InstCombineMulDivRem.cpp, InstCombineLoadStoreAlloca.cpp, BoundsChecking.cpp, InstCombineCompares.cpp, InstCombineCasts.cpp, InstCombineCalls.cpp, InstCombineAndOrXor.cpp, InstCombineAddSub.cpp, SuspendCrossingInfo.cpp, MaterializationUtils.cpp, CoroSplit.cpp, CoroFrame.cpp, CoroElide.cpp, NumericalStabilitySanitizer.cpp, Attributor.cpp, ArgumentPromotion.cpp, Annotation2Metadata.cpp, AlwaysInliner.cpp, TypeSanitizer.cpp, ThreadSanitizer.cpp, SanitizerCoverage.cpp, SanitizerBinaryMetadata.cpp, PGOMemOPSizeOpt.cpp, PGOInstrumentation.cpp, PGOCtxProfLowering.cpp, CorrelatedValuePropagation.cpp, MemProfiler.cpp, MemorySanitizer.cpp, LowerAllowCheckPass.cpp, KCFI.cpp, InstrProfiling.cpp, InstrOrderFile.cpp, IndirectCallPromotion.cpp, HWAddressSanitizer.cpp, GCOVProfiling.cpp, ControlHeightReduction.cpp, SimpleLoopUnswitch.cpp, BasicBlockUtils.cpp, AssumeBundleBuilder.cpp, AMDGPUEmitPrintf.cpp, AddDiscriminators.cpp, WarnMissedTransforms.cpp, TailRecursionElimination.cpp, StructurizeCFG.cpp, SROA.cpp, SpeculativeExecution.cpp, Sink.cpp, SimplifyCFGPass.cpp, BreakCriticalEdges.cpp, SCCP.cpp, Scalarizer.cpp, ScalarizeMaskedMemIntrin.cpp, RewriteStatepointsForGC.cpp, Reg2Mem.cpp, Reassociate.cpp, PlaceSafepoints.cpp, PartiallyInlineLibCalls.cpp, NewGVN.cpp, NaryReassociate.cpp, CtorUtils.cpp, IntegerDivision.cpp, InlineFunction.cpp, InjectTLIMappings.cpp, FunctionComparator.cpp, FlattenCFG.cpp, FixIrreducible.cpp, Evaluator.cpp, DXILUpgrade.cpp, Debugify.cpp, MergeICmps.cpp, CountVisits.cpp, ControlFlowUtils.cpp, CodeMoverUtils.cpp, CodeLayout.cpp, CodeExtractor.cpp, CloneFunction.cpp, CanonicalizeFreezeInLoops.cpp, CallPromotionUtils.cpp, BypassSlowDivision.cpp, BuildLibCalls.cpp, GVNSink.cpp, LoopDataPrefetch.cpp, LoopBoundSplit.cpp, LoopAccessAnalysisPrinter.cpp, LICM.cpp, JumpThreading.cpp, JumpTableToSwitch.cpp, IVUsersPrinter.cpp, InstSimplifyPass.cpp, InferAddressSpaces.cpp, IndVarSimplify.cpp, InductiveRangeCheckElimination.cpp, LoopDeletion.cpp, GVNHoist.cpp, GVN.cpp, GuardWidening.cpp, Float2Int.cpp, FlattenCFGPass.cpp, EarlyCSE.cpp, DivRemPairs.cpp, DFAJumpThreading.cpp, DeadStoreElimination.cpp, DCE.cpp, LoopSink.cpp, MergedLoadStoreMotion.cpp, MemCpyOptimizer.cpp, LowerMatrixIntrinsics.cpp, LowerExpectIntrinsic.cpp, LowerConstantIntrinsics.cpp, LowerAtomicPass.cpp, LoopVersioningLICM.cpp, LoopUnrollPass.cpp, LoopUnrollAndJamPass.cpp, LoopTermFold.cpp, LoopStrengthReduce.cpp, CoroEarly.cpp, LoopSimplifyCFG.cpp, LoopRotation.cpp, LoopPredication.cpp, LoopLoadElimination.cpp, LoopInterchange.cpp, LoopInstSimplify.cpp, LoopIdiomRecognize.cpp, LoopFuse.cpp, LoopFlatten.cpp, LoopDistribute.cpp, LegalizeFloatTypes.cpp, SelectionDAG.cpp, ScheduleDAGVLIW.cpp, ScheduleDAGSDNodes.cpp, ScheduleDAGRRList.cpp, ScheduleDAGFast.cpp, ResourcePriorityQueue.cpp, LegalizeVectorTypes.cpp, LegalizeVectorOps.cpp, LegalizeTypesGeneric.cpp, LegalizeTypes.cpp, LegalizeIntegerTypes.cpp, SelectionDAGBuilder.cpp, LegalizeDAG.cpp, InstrEmitter.cpp, FunctionLoweringInfo.cpp, FastISel.cpp, DAGCombiner.cpp, ScoreboardHazardRecognizer.cpp, ScheduleDAGInstrs.cpp, ScheduleDAG.cpp, SafeStackLayout.cpp, SafeStack.cpp, ResetMachineFunctionPass.cpp, StackColoring.cpp, VirtRegMap.cpp, TypePromotion.cpp, TwoAddressInstructionPass.cpp, TargetRegisterInfo.cpp, TailDuplicator.cpp, TailDuplication.cpp, StackSlotColoring.cpp, StackProtector.cpp, StackMaps.cpp, StackMapLivenessAnalysis.cpp, StackFrameLayoutAnalysisPass.cpp, ReplaceWithVeclib.cpp, SplitKit.cpp, SpillPlacement.cpp, SlotIndexes.cpp, SjLjEHPrepare.cpp, ShrinkWrap.cpp, ShadowStackGCLowering.cpp, SelectOptimize.cpp, StatepointLowering.cpp, SelectionDAGPrinter.cpp, SelectionDAGISel.cpp, MachineStripDebug.cpp, PeepholeOptimizer.cpp, OptimizePHIs.cpp, ModuloSchedule.cpp, MLRegAllocEvictAdvisor.cpp, MIRVRegNamerUtils.cpp, MIRSampleProfile.cpp, MIRNamerPass.cpp, MIRFSDiscriminator.cpp, MIRCanonicalizerPass.cpp, MacroFusion.cpp, MachineTraceMetrics.cpp, PHIElimination.cpp, MachineStableHash.cpp, MachineSSAUpdater.cpp, MachineSink.cpp, MachineScheduler.cpp, MachineRegionInfo.cpp, MachinePipeliner.cpp, MachineOutliner.cpp, MachineLICM.cpp, MachineLateInstrsCleanup.cpp, MachineFunction.cpp, RegAllocPBQP.cpp, RenameIndependentSubregs.cpp, RemoveRedundantDebugValues.cpp, RemoveLoadsIntoFakeUses.cpp, RegUsageInfoPropagate.cpp, RegUsageInfoCollector.cpp, RegisterScavenging.cpp, RegisterCoalescer.cpp, RegisterClassInfo.cpp, RegisterBankInfo.cpp, RegisterBank.cpp, RegAllocScore.cpp, VLIWMachineScheduler.cpp, RegAllocGreedy.cpp, RegAllocFast.cpp, RegAllocEvictionAdvisor.cpp, RegAllocBase.cpp, ReachingDefAnalysis.cpp, PseudoProbeInserter.cpp, PrologEpilogInserter.cpp, ProcessImplicitDefs.cpp, PostRASchedulerList.cpp, PostRAHazardRecognizer.cpp, JITLinkMemoryManager.cpp, OProfileWrapper.cpp, OProfileJITEventListener.cpp, x86_64.cpp, riscv.cpp, ppc64.cpp, PerGraphGOTAndPLTStubsBuilder.h, MachOLinkGraphBuilder.cpp, MachO_x86_64.cpp, MachO_arm64.cpp, MachO.cpp, loongarch.cpp, AbsoluteSymbols.cpp, JITLinkGeneric.h, JITLinkGeneric.cpp, JITLink.cpp, i386.cpp, ELFLinkGraphBuilder.h, ELFLinkGraphBuilder.cpp, ELF_x86_64.cpp, ELF_riscv.cpp, ELF_ppc64.cpp, ELF_loongarch.cpp, EPCDynamicLibrarySearchGenerator.cpp, LoadLinkableFile.cpp, LLJIT.cpp, LinkGraphLinkingLayer.cpp, LinkGraphLayer.cpp, LazyReexports.cpp, Layer.cpp, JITLinkReentryTrampolines.cpp, JITLinkRedirectableSymbolManager.cpp, IndirectionUtils.cpp, ExecutorProcessControl.cpp, EPCGenericRTDyldMemoryManager.cpp, ELF_i386.cpp, ELFNixPlatform.cpp, DebugUtils.cpp, DebugObjectManagerPlugin.cpp, PerfSupportPlugin.cpp, DebugInfoSupport.cpp, DebuggerSupportPlugin.cpp, DebuggerSupport.cpp, Core.cpp, COFFVCRuntimeSupport.cpp, COFFPlatform.cpp, LVObject.cpp, LVCodeViewReader.cpp, LVBinaryReader.cpp, LVReaderHandler.cpp, LVType.cpp, LVSymbol.cpp, LVSupport.cpp, LVSort.cpp, LVScope.cpp, LVReader.cpp, LVRange.cpp, LVOptions.cpp, LVCodeViewVisitor.cpp, LVLocation.cpp, LVLine.cpp, LVElement.cpp, LVCompare.cpp, DWARFContext.cpp, BTFParser.cpp, BTFContext.cpp, WinEHPrepare.cpp, WindowScheduler.cpp, WasmEHPrepare.cpp, aarch64.cpp, ELF_aarch64.cpp, ELF_aarch32.cpp, ELF.cpp, EHFrameSupport.cpp, DWARFRecordSectionSplitter.cpp, DefineExternalSectionStartAndEndSymbols.h, COFFLinkGraphBuilder.h, COFFLinkGraphBuilder.cpp, COFFDirectiveParser.cpp, COFF_x86_64.cpp, COFF.cpp, MachineFrameInfo.cpp, aarch32.cpp, Execution.cpp, IntelJITEventListener.cpp, ExecutionEngineBindings.cpp, ExecutionEngine.cpp, LVDWARFReader.cpp, LVCodeViewVisitor.cpp, MemoryDependenceAnalysis.cpp, ReplayInlineAdvisor.cpp, RegionPass.cpp, RegionInfo.cpp, PostDominators.cpp, ObjCARCAliasAnalysis.cpp, MustExecute.cpp, ModuleSummaryAnalysis.cpp, MLInlineAdvisor.cpp, MemorySSAUpdater.cpp, MemorySSA.cpp, MemoryProfileInfo.cpp, ScalarEvolution.cpp, MemoryBuiltins.cpp, LoopPass.cpp, LoopNestAnalysis.cpp, LoopCacheAnalysis.cpp, LoopAccessAnalysis.cpp, LazyValueInfo.cpp, LazyCallGraph.cpp, LazyBranchProbabilityInfo.cpp, LazyBlockFrequencyInfo.cpp, LastRunTrackingAnalysis.cpp, StableFunctionMap.cpp, DwarfDebug.cpp, DIEHash.cpp, DIE.cpp, DebugHandlerBase.cpp, DbgEntityHistoryCalculator.cpp, AsmPrinterInlineAsm.cpp, AsmPrinterDwarf.cpp, AsmPrinter.cpp, AllocationOrder.cpp, AggressiveAntiDepBreaker.cpp, StableFunctionMapRecord.cpp, IVUsers.cpp, OutlinedHashTreeRecord.cpp, OutlinedHashTree.cpp, CodeGenDataWriter.cpp, CodeGenDataReader.cpp, CodeGenData.cpp, MetadataLoader.cpp, VectorUtils.cpp, TargetTransformInfo.cpp, StackSafetyAnalysis.cpp, StackLifetime.cpp, UnicodeCharRanges.h, BranchProbabilityInfo.cpp, BlockFrequencyInfoImpl.cpp, BlockFrequencyInfo.cpp, BasicAliasAnalysis.cpp, AssumeBundleQueries.cpp, AliasAnalysis.cpp, SSAUpdaterImpl.h, SampleProfileLoaderBaseImpl.h, CFGMST.h, InstCombiner.h, InstCombine.h, CallGraphSCCPass.cpp, GenericDomTreeConstruction.h, EPCGenericRTDyldMemoryManager.h, LegalizationArtifactCombiner.h, SparsePropagation.h, RegionInfoImpl.h, CGSCCPassManager.h, BlockFrequencyInfoImpl.h, GenericUniformityImpl.h, GenericCycleImpl.h, HexagonSplitConst32AndConst64.cpp, DependenceGraphBuilder.cpp, IVDescriptors.cpp, InstructionSimplify.cpp, InstructionPrecedenceTracking.cpp, InstCount.cpp, InlineOrder.cpp, InlineCost.cpp, InlineAdvisor.cpp, IndirectCallPromotionAnalysis.cpp, GlobalsModRef.cpp, DXILResource.cpp, DXILMetadataAnalysis.cpp, DwarfExpression.cpp, DependenceAnalysis.cpp, DemandedBits.cpp, Delinearization.cpp, DDG.cpp, CtxProfAnalysis.cpp, CostModel.cpp, ConstraintSystem.cpp, CodeMetrics.cpp, CGSCCPassManager.cpp, CaptureTracking.cpp, IndirectBrExpandPass.cpp, InstrRefBasedImpl.cpp, LexicalScopes.cpp, LazyMachineBlockFrequencyInfo.cpp, LatencyPriorityQueue.cpp, KCFI.cpp, JMCInstrumenter.cpp, InterleavedLoadCombinePass.cpp, InterleavedAccessPass.cpp, InterferenceCache.cpp, InlineSpiller.cpp, InitUndef.cpp, InstrRefBasedImpl.h, ImplicitNullChecks.cpp, IfConversion.cpp, HardwareLoops.cpp, GlobalMergeFunctions.cpp, GlobalMerge.cpp, Utils.cpp, RegBankSelect.cpp, Localizer.cpp, LoadStoreOpt.cpp, LegalizerInfo.cpp, LiveStacks.cpp, MachineDebugify.cpp, MachineCSE.cpp, MachineCopyPropagation.cpp, MachineCombiner.cpp, MachineCheckDebugify.cpp, MachineCFGPrinter.cpp, MachineBlockPlacement.cpp, MachineBlockFrequencyInfo.cpp, MachineBasicBlock.cpp, LowerEmuTLS.cpp, LocalStackSlotAllocation.cpp, LegalizerHelper.cpp, LiveRegMatrix.cpp, LiveRangeShrink.cpp, LiveRangeEdit.cpp, LiveRangeCalc.cpp, LiveIntervalUnion.cpp, LiveIntervals.cpp, LiveIntervalCalc.cpp, LiveDebugVariables.cpp, VarLocBasedImpl.cpp, LiveDebugValues.cpp, CodeGenCommonISel.cpp, ExecutionDomainFix.cpp, EHContGuardCatchret.cpp, EarlyIfConversion.cpp, DwarfEHPrepare.cpp, DFAPacketizer.cpp, DetectDeadLanes.cpp, DeadMachineInstructionElim.cpp, CriticalAntiDepBreaker.cpp, ComplexDeinterleavingPass.cpp, CodeGenPrepare.cpp, ExpandMemCmp.cpp, CFIFixup.cpp, CFGuardLongjmp.cpp, CallBrPrepare.cpp, CalcSpillWeights.cpp, BreakFalseDeps.cpp, BranchRelaxation.cpp, BranchFolding.cpp, AtomicExpandPass.cpp, AssignmentTrackingAnalysis.cpp, DwarfUnit.cpp, CombinerHelperArtifacts.cpp, Legalizer.cpp, LegacyLegalizerInfo.cpp, IRTranslator.cpp, InstructionSelect.cpp, InlineAsmLowering.cpp, GISelKnownBits.cpp, GIMatchTableExecutor.cpp, CSEInfo.cpp, CombinerHelperVectorOps.cpp, CombinerHelperCompares.cpp, CombinerHelperCasts.cpp, RegAllocBasic.cpp, CombinerHelper.cpp, Combiner.cpp, CallLowering.cpp, GCEmptyBasicBlocks.cpp, FuncletLayout.cpp, FixupStatepointCallerSaved.cpp, FinalizeISel.cpp, FaultMaps.cpp, ExpandVectorPredication.cpp, ExpandPostRAPseudos.cpp, ARCDisassembler.cpp, ARMFixCortexA57AES1742098Pass.cpp, ARMExpandPseudoInsts.cpp, ARMConstantIslandPass.cpp, ARMBranchTargets.cpp, ARMBlockPlacement.cpp, ARMBasicBlockInfo.cpp, ARMBaseRegisterInfo.cpp, ARMBaseInstrInfo.cpp, ARMAsmPrinter.cpp, A15SDOptimizer.cpp, ARCInstPrinter.cpp, ARMFrameLowering.cpp, ARCSubtarget.cpp, ARCRegisterInfo.cpp, ARCOptAddrMode.cpp, ARCISelLowering.cpp, ARCISelDAGToDAG.cpp, ARCInstrInfo.cpp, ARCFrameLowering.cpp, ARCExpandPseudos.cpp, ARCBranchFinalize.cpp, ARCAsmPrinter.cpp, SIWholeQuadMode.cpp, ARMTargetTransformInfo.cpp, MVEVPTBlockPass.cpp, MVETPAndVPTOptimisationsPass.cpp, MVETailPredication.cpp, MVELaneInterleavingPass.cpp, MVEGatherScatterLowering.cpp, MLxExpansionPass.cpp, ARMMCExpr.cpp, ARMMCCodeEmitter.cpp, ARMInstPrinter.cpp, ARMDisassembler.cpp, ARMAsmParser.cpp, SIShrinkInstructions.cpp, ARMSubtarget.cpp, ARMSLSHardening.cpp, ARMSelectionDAGInfo.cpp, ARMParallelDSP.cpp, ARMOptimizeBarriersPass.cpp, ARMLowOverheadLoops.cpp, ARMLoadStoreOptimizer.cpp, ARMISelLowering.cpp, ARMISelDAGToDAG.cpp, ARMInstructionSelector.cpp, R600ClauseMergePass.cpp, SIFixVGPRCopies.cpp, SIFixSGPRCopies.cpp, SIAnnotateControlFlow.cpp, R600TargetTransformInfo.cpp, R600Subtarget.cpp, R600Packetizer.cpp, R600OptimizeVectorRegisters.cpp, R600MachineScheduler.cpp, R600MachineCFGStructurizer.cpp, R600ExpandSpecialInstrs.cpp, R600ControlFlowFinalizer.cpp, SIFoldOperands.cpp, GCNVOPDUtils.cpp, GCNSubtarget.cpp, GCNSchedStrategy.cpp, GCNRewritePartialRegUses.cpp, GCNRegPressure.cpp, GCNPreRAOptimizations.cpp, GCNPreRALongBranchReg.cpp, GCNNSAReassign.cpp, GCNMinRegStrategy.cpp, GCNIterativeScheduler.cpp, SILowerSGPRSpills.cpp, SIPreEmitPeephole.cpp, SIPreAllocateWWMRegs.cpp, SIPostRABundler.cpp, SIPeepholeSDWA.cpp, SIOptimizeVGPRLiveRange.cpp, SIOptimizeExecMaskingPreRA.cpp, SIOptimizeExecMasking.cpp, SIModeRegister.cpp, SIMemoryLegalizer.cpp, SIMachineScheduler.cpp, SILowerWWMCopies.cpp, Thumb1FrameLowering.cpp, SILowerI1Copies.cpp, SILowerControlFlow.cpp, SILoadStoreOptimizer.cpp, SILateBranchLowering.cpp, SIISelLowering.cpp, SIInstrInfo.cpp, SIInsertWaitcnts.cpp, SIInsertHardClauses.cpp, SIFrameLowering.cpp, SIFormMemoryClauses.cpp, DXILResourceAnalysis.cpp, HexagonCopyHoisting.cpp, HexagonConstPropagation.cpp, HexagonConstExtenders.cpp, HexagonCommonGEP.cpp, HexagonCFGOptimizer.cpp, HexagonBranchRelaxation.cpp, HexagonBlockRanges.cpp, MachO.cpp, HexagonAsmPrinter.cpp, HexagonDisassembler.cpp, HexagonAsmParser.cpp, HexagonCopyToCombine.cpp, DXILResourceAccess.cpp, DXILPrepare.cpp, DXILOpLowering.cpp, DXILIntrinsicExpansion.cpp, DXILFlattenArrays.cpp, DXILFinalizeLinkage.cpp, DXILDataScalarization.cpp, DirectXSubtarget.cpp, DirectXAsmPrinter.cpp, CSKYMCExpr.cpp, HexagonISelDAGToDAG.cpp, HexagonSelectionDAGInfo.cpp, HexagonPeephole.cpp, HexagonOptAddrMode.cpp, HexagonNewValueJump.cpp, HexagonMask.cpp, HexagonMachineScheduler.cpp, HexagonLoopIdiomRecognition.cpp, HexagonLoopAlign.cpp, HexagonLoadStoreWidening.cpp, HexagonISelLowering.cpp, HexagonISelDAGToDAGHVX.cpp, CSKYMCCodeEmitter.cpp, HexagonInstrInfo.cpp, HexagonHazardRecognizer.cpp, HexagonHardwareLoops.cpp, HexagonGenPredicate.cpp, HexagonGenMux.cpp, HexagonGenMemAbsolute.cpp, HexagonGenInsert.cpp, HexagonFrameLowering.cpp, HexagonExpandCondsets.cpp, HexagonEarlyIfConv.cpp, BPFAbstractMemberAccess.cpp, BPFPreserveDIType.cpp, BPFMISimplifyPatchable.cpp, BPFMIPeephole.cpp, BPFMIChecking.cpp, BPFISelLowering.cpp, BPFISelDAGToDAG.cpp, BPFIRPeephole.cpp, BPFCheckAndAdjustIR.cpp, BPFASpaceCastSimplifyPass.cpp, BPFAsmPrinter.cpp, BPFAdjustOpt.cpp, BPFPreserveStaticOffset.cpp, AVRMCELFStreamer.cpp, AVRMCCodeEmitter.cpp, AVRInstPrinter.cpp, AVRDisassembler.cpp, AVRSubtarget.cpp, AVRISelDAGToDAG.cpp, AVRAsmPrinter.cpp, AVRAsmParser.cpp, Thumb2SizeReduction.cpp, Thumb2ITBlockPass.cpp, CSKYAsmPrinter.cpp, CSKYInstPrinter.cpp, CSKYELFObjectWriter.cpp, CSKYAsmBackend.cpp, CSKYDisassembler.cpp, CSKYSubtarget.cpp, CSKYMCInstLower.cpp, CSKYISelLowering.cpp, CSKYISelDAGToDAG.cpp, CSKYInstrInfo.cpp, CSKYFrameLowering.cpp, CSKYConstantIslandPass.cpp, HexagonBitSimplify.cpp, CSKYAsmParser.cpp, BPFMCCodeEmitter.cpp, BPFInstPrinter.cpp, BPFRegisterBankInfo.cpp, BPFLegalizerInfo.cpp, BPFInstructionSelector.cpp, BPFCallLowering.cpp, BPFDisassembler.cpp, BPFSubtarget.cpp, BPFSelectionDAGInfo.cpp, RetireControlUnit.cpp, WasmObjectFile.cpp, GOFFObjectFile.cpp, Support.cpp, RetireStage.cpp, MicroOpQueueStage.cpp, InOrderIssueStage.cpp, ExecuteStage.cpp, DispatchStage.cpp, Pipeline.cpp, InstrBuilder.cpp, Scheduler.cpp, CoverageMapping.cpp, ResourceManager.cpp, RegisterFile.cpp, LSUnit.cpp, WinCOFFObjectWriter.cpp, WasmObjectWriter.cpp, MCWinCOFFStreamer.cpp, MCPseudoProbe.cpp, MCExpr.cpp, MCAssembler.cpp, MachObjectWriter.cpp, GOFFObjectWriter.cpp, DAGDeltaAlgorithm.cpp, AArch64BranchTargets.cpp, AArch64AsmPrinter.cpp, AArch64Arm64ECCallLowering.cpp, AArch64AdvSIMDScalarPass.cpp, AArch64A57FPLoadBalancing.cpp, AArch64A53Fix835769.cpp, TableGenBackendSkeleton.cpp, Record.cpp, JSONBackend.cpp, SipHash.cpp, RandomNumberGenerator.cpp, ELFObjectWriter.cpp, CommandLine.cpp, CachePruning.cpp, BalancedPartitioning.cpp, APInt.cpp, SampleProfWriter.cpp, SampleProfReader.cpp, MemProfReader.cpp, InstrProfCorrelator.cpp, InstrProf.cpp, CoverageMappingReader.cpp, RegisterEHFrames.cpp, RuntimeDyldCOFFThumb.h, RuntimeDyldCOFFI386.h, RuntimeDyldCOFFAArch64.h, RuntimeDyldMachO.cpp, RuntimeDyldELF.cpp, RuntimeDyldCOFF.cpp, RuntimeDyldChecker.cpp, RuntimeDyld.cpp, SimpleRemoteEPCServer.cpp, SimpleExecutorMemoryManager.cpp, SimpleExecutorDylibManager.cpp, RuntimeDyldCOFFX86_64.h, OrcRTBootstrap.cpp, JITLoaderGDB.cpp, SimpleRemoteEPC.cpp, SectCreate.cpp, RedirectionManager.cpp, OrcABISupport.cpp, ObjectLinkingLayer.cpp, ObjectFileInterface.cpp, Mangling.cpp, MachOPlatform.cpp, ConstantsContext.h, ThinLTOCodeGenerator.cpp, LTOBackend.cpp, LTO.cpp, VFABIDemangler.cpp, ValueSymbolTable.cpp, SafepointIRVerifier.cpp, PassTimingInfo.cpp, Pass.cpp, ModuleSummaryIndex.cpp, DebugInfo.cpp, Core.cpp, GCNDPPCombine.cpp, BasicBlock.cpp, AbstractCallSite.cpp, OMPIRBuilder.cpp, OMPContext.cpp, RuntimeDyldMachOX86_64.h, RuntimeDyldMachOI386.h, RuntimeDyldMachOARM.h, RuntimeDyldMachOAArch64.h, RuntimeDyldELFMips.h, RuntimeDyldELFMips.cpp, AMDGPUInstructionSelector.cpp, AMDGPUOpenCLEnqueuedBlockLowering.cpp, AMDGPUMemoryUtils.cpp, AMDGPUMarkLastScratchLoad.cpp, AMDGPULowerModuleLDSPass.cpp, AMDGPULowerKernelAttributes.cpp, AMDGPULowerKernelArguments.cpp, AMDGPULowerBufferFatPointers.cpp, AMDGPULibCalls.cpp, AMDGPULegalizerInfo.cpp, AMDGPULateCodeGenPrepare.cpp, AMDGPUISelDAGToDAG.cpp, AMDGPUPerfHintAnalysis.cpp, AMDGPUInstCombineIntrinsic.cpp, AMDGPUInsertDelayAlu.cpp, AMDGPUImageIntrinsicOptimizer.cpp, AMDGPUIGroupLP.cpp, AMDGPUGlobalISelDivergenceLowering.cpp, AMDGPUCtorDtorLowering.cpp, AMDGPUCodeGenPrepare.cpp, AMDGPUCallLowering.cpp, AMDGPUAttributor.cpp, AMDGPUAtomicOptimizer.cpp, AMDGPUResourceUsageAnalysis.cpp, GCNILPSched.cpp, GCNCreateVOPD.cpp, AMDGPUDisassembler.cpp, AMDGPUUnifyDivergentExitNodes.cpp, AMDGPUTargetTransformInfo.cpp, AMDGPUSwLowerLDS.cpp, AMDGPUSubtarget.cpp, AMDGPUSplitModule.cpp, AMDGPUSetWavePriority.cpp, AMDGPURewriteUndefForPHI.cpp, AMDGPURewriteOutArguments.cpp, AArch64CompressJumpTables.cpp, AMDGPUReserveWWMRegs.cpp, AMDGPURemoveIncompatibleFunctions.cpp, AMDGPURegBankSelect.cpp, AMDGPURegBankLegalize.cpp, AMDGPURegBankCombiner.cpp, AMDGPUPromoteKernelArguments.cpp, AMDGPUPromoteAlloca.cpp, AMDGPUPrintfRuntimeBinding.cpp, AMDGPUPreLegalizerCombiner.cpp, AMDGPUPostLegalizerCombiner.cpp, AArch64MIPeepholeOpt.cpp, AArch64StorePairSuppress.cpp, AArch64StackTaggingPreRA.cpp, AArch64StackTagging.cpp, AArch64SpeculationHardening.cpp, AArch64SLSHardening.cpp, AArch64SIMDInstrOpt.cpp, AArch64SelectionDAGInfo.cpp, AArch64RedundantCopyElimination.cpp, AArch64PromoteConstant.cpp, AArch64PostCoalescerPass.cpp, AArch64PBQPRegAlloc.cpp, AMDGPUArgumentUsageInfo.cpp, AArch64LoadStoreOptimizer.cpp, AArch64ISelLowering.cpp, AArch64ISelDAGToDAG.cpp, AArch64FrameLowering.cpp, AArch64FalkorHWPFFix.cpp, AArch64DeadRegisterDefinitionsPass.cpp, AArch64ConditionOptimizer.cpp, AArch64ConditionalCompares.cpp, AArch64CondBrTuning.cpp, AArch64CollectLOH.cpp, AArch64TargetTransformInfo.cpp, AMDGPUAsanInstrumentation.cpp, AMDGPUAnnotateUniformValues.cpp, AMDGPUAnnotateKernelFeatures.cpp, AMDGPUAliasAnalysis.cpp, SVEIntrinsicOpts.cpp, SMEPeepholeOpt.cpp, SMEABIPass.cpp, AArch64MCExpr.cpp, AArch64MCCodeEmitter.cpp, AArch64InstPrinter.cpp, AArch64PreLegalizerCombiner.cpp, AArch64PostLegalizerLowering.cpp, AArch64Subtarget.cpp, AArch64Disassembler.cpp, AArch64ExternalSymbolizer.cpp, AArch64CallLowering.cpp, AArch64InstructionSelector.cpp, AArch64PostSelectOptimize.cpp, AArch64LegalizerInfo.cpp, AArch64PostLegalizerCombiner.cpp, AArch64O0PreLegalizerCombiner.cpp
• debug_user_sig_handler() : Debug.cpp
• DEBUG_WITH_TYPE : Debug.h
• DebugAggregate : AssignmentTrackingAnalysis.cpp
• debugAssign() : BlockFrequencyInfoImpl.cpp
• DebugBufferSize : Debug.cpp
• DebugDiv : PostRASchedulerList.cpp, AggressiveAntiDepBreaker.cpp
• DebugFnMap : Debugify.h
• debugHWLoopFailure() : HardwareLoops.cpp
• DebugifyAndStripAll : TargetPassConfig.cpp
• DebugifyCheckAndStripAll : TargetPassConfig.cpp
• DebugifyMode : Debugify.h
• DebugifyStatsMap : Debugify.h
• DebugInstMap : Debugify.h
• DebugLocVerifyLevel : Legalizer.cpp
• DebugMod : AggressiveAntiDepBreaker.cpp, PostRASchedulerList.cpp
• DebugOnly : Debug.cpp
• DebugOnlyOptLoc : Debug.cpp
• DebugReply : InteractiveModelRunner.cpp
• debugStrOffsetsHeaderSize() : DWP.cpp
• DebugVarMap : Debugify.h
• debugVectorizationMessage() : LoopVectorize.cpp
• decideComp() : VEISelLowering.cpp
• decideCompType() : VEISelLowering.cpp
• decIncOperator() : LanaiInstPrinter.cpp
• DecisionName : MLRegAllocEvictAdvisor.cpp, MLRegAllocPriorityAdvisor.cpp
• DECLARE_FIELD : LLParser.cpp
• DECLARE_OP0 : DWARFDebugFrame.cpp
• DECLARE_OP1 : DWARFDebugFrame.cpp
• DECLARE_OP2 : DWARFDebugFrame.cpp
• DECLARE_OP3 : DWARFDebugFrame.cpp
• DECLARE_PDB_SYMBOL_CONCRETE_TYPE : PDBSymbol.h
• DECLARE_PDB_SYMBOL_CUSTOM_TYPE : PDBSymbol.h
• DECLARE_TRANSPARENT_OPERAND_ACCESSORS : OperandTraits.h
• declaresCoroCleanupIntrinsics() : CoroCleanup.cpp
• declaresCoroEarlyIntrinsics() : CoroEarly.cpp
• decode() : X86Disassembler.cpp, InlineInfo.cpp
• Decode2OpInstruction() : XCoreDisassembler.cpp
• Decode2OpInstructionFail() : XCoreDisassembler.cpp
• Decode2RImmInstruction() : XCoreDisassembler.cpp
• Decode2RInstruction() : XCoreDisassembler.cpp
• Decode2RSrcDstInstruction() : XCoreDisassembler.cpp
• Decode2RUSBitpInstruction() : XCoreDisassembler.cpp
• Decode2RUSInstruction() : XCoreDisassembler.cpp
• Decode3OpInstruction() : XCoreDisassembler.cpp
• Decode3RImmInstruction() : XCoreDisassembler.cpp
• Decode3RInstruction() : XCoreDisassembler.cpp
• DECODE_OPERAND : AMDGPUDisassembler.cpp
• DECODE_OPERAND_REG_7 : AMDGPUDisassembler.cpp
• DECODE_OPERAND_REG_8 : AMDGPUDisassembler.cpp
• DECODE_SDWA : AMDGPUDisassembler.cpp
• DECODE_SrcOp : AMDGPUDisassembler.cpp
• DecodeACC64DSPRegisterClass() : MipsDisassembler.cpp
• DecodeACCRCRegisterClass() : PPCDisassembler.cpp
• DecodeAddiGroupBranch() : MipsDisassembler.cpp
• DecodeAddiur2Simm7() : MipsDisassembler.cpp
• DecodeADDR32BitRegisterClass() : SystemZDisassembler.cpp
• DecodeADDR64BitRegisterClass() : SystemZDisassembler.cpp
• DecodeAddrMode2IdxInstruction() : ARMDisassembler.cpp
• DecodeAddrMode3Instruction() : ARMDisassembler.cpp
• DecodeAddrMode5FP16Operand() : ARMDisassembler.cpp
• DecodeAddrMode5Operand() : ARMDisassembler.cpp
• DecodeAddrMode6Operand() : ARMDisassembler.cpp
• DecodeAddrMode7Operand() : ARMDisassembler.cpp
• DecodeAddrModeImm12Operand() : ARMDisassembler.cpp
• DecodeAddSubERegInstruction() : AArch64Disassembler.cpp
• DecodeAddSubImmShift() : AArch64Disassembler.cpp
• DecodeAdrInstruction() : AArch64Disassembler.cpp
• DecodeAFGR64RegisterClass() : MipsDisassembler.cpp
• decodeAField() : ARCDisassembler.cpp
• DecodeANDI16Imm() : MipsDisassembler.cpp
• DecodeAR16RegisterClass() : M68kDisassembler.cpp
• DecodeAR32BitRegisterClass() : SystemZDisassembler.cpp
• DecodeAR32RegisterClass() : M68kDisassembler.cpp
• DecodeArmMOVTWInstruction() : ARMDisassembler.cpp
• DecodeARRegisterClass() : XtensaDisassembler.cpp
• DecodeAS() : VEDisassembler.cpp
• DecodeASRRegsRegisterClass() : SparcDisassembler.cpp
• DecodeASX() : VEDisassembler.cpp
• DecodeAuthLoadInstruction() : AArch64Disassembler.cpp
• decodeAV10() : AMDGPUDisassembler.cpp
• decodeAVLdSt() : AMDGPUDisassembler.cpp
• decodeB4constOperand() : XtensaDisassembler.cpp
• decodeB4constuOperand() : XtensaDisassembler.cpp
• DecodeBankedReg() : ARMDisassembler.cpp
• decodeBase64Byte() : Base64.cpp
• decodeBase64StringEntry() : COFFObjectFile.cpp
• decodeBBAddrMapImpl() : ELF.cpp
• DecodeBFAfterTargetOperand() : ARMDisassembler.cpp
• decodeBField() : ARCDisassembler.cpp
• DecodeBFLabelOperand() : ARMDisassembler.cpp
• DecodeBgtzGroupBranch() : MipsDisassembler.cpp
• DecodeBgtzGroupBranchMMR6() : MipsDisassembler.cpp
• DecodeBgtzlGroupBranch() : MipsDisassembler.cpp
• DecodeBitfieldMaskOperand() : ARMDisassembler.cpp
• DecodeBitpOperand() : XCoreDisassembler.cpp
• DecodeBlezGroupBranch() : MipsDisassembler.cpp
• DecodeBlezGroupBranchMMR6() : MipsDisassembler.cpp
• DecodeBlezlGroupBranch() : MipsDisassembler.cpp
• decodeBoolReg() : AMDGPUDisassembler.cpp
• decodeBranch() : LanaiDisassembler.cpp
• DecodeBranchCondition() : VEDisassembler.cpp
• DecodeBranchConditionAlways() : VEDisassembler.cpp
• DecodeBranchImmInstruction() : ARMDisassembler.cpp
• decodeBranchOperand() : XtensaDisassembler.cpp
• DecodeBranchTarget() : MipsDisassembler.cpp
• DecodeBranchTarget10MM() : MipsDisassembler.cpp
• DecodeBranchTarget1SImm16() : MipsDisassembler.cpp
• DecodeBranchTarget21() : MipsDisassembler.cpp
• DecodeBranchTarget21MM() : MipsDisassembler.cpp
• DecodeBranchTarget26() : MipsDisassembler.cpp
• DecodeBranchTarget26MM() : MipsDisassembler.cpp
• DecodeBranchTarget7MM() : MipsDisassembler.cpp
• DecodeBranchTargetMM() : MipsDisassembler.cpp
• DecodeBranchTargetS() : ARCDisassembler.cpp
• DecodeCacheeOp_CacheOpR6() : MipsDisassembler.cpp
• DecodeCacheOp() : MipsDisassembler.cpp
• DecodeCacheOpMM() : MipsDisassembler.cpp
• DecodeCall() : SparcDisassembler.cpp, VEDisassembler.cpp
• decodeCallOperand() : XtensaDisassembler.cpp
• decodeCallTarget() : AVRDisassembler.cpp
• DecodeCAS() : VEDisassembler.cpp
• DecodeCASI32() : VEDisassembler.cpp
• DecodeCASI64() : VEDisassembler.cpp
• DecodeCCOperand() : VEDisassembler.cpp
• DecodeCCOutOperand() : ARMDisassembler.cpp
• DecodeCCRCRegisterClass() : M68kDisassembler.cpp
• DecodeCCRRegisterClass() : MipsDisassembler.cpp
• DecodeCCRU6Instruction() : ARCDisassembler.cpp
• decodeCField() : ARCDisassembler.cpp
• DecodeCFRRegisterClass() : LoongArchDisassembler.cpp
• DecodeCGImm() : MSP430Disassembler.cpp
• DecodeCLRMGPRRegisterClass() : ARMDisassembler.cpp
• decodeCLUIImmOperand() : RISCVDisassembler.cpp
• decodeCondBranch() : AVRDisassembler.cpp
• decodeCondBrTarget() : PPCDisassembler.cpp
• DecodeCOP0RegisterClass() : MipsDisassembler.cpp
• DecodeCOP2RegisterClass() : MipsDisassembler.cpp
• DecodeCopMemInstruction() : ARMDisassembler.cpp
• DecodeCoprocessor() : ARMDisassembler.cpp
• DecodeCoprocPairRegisterClass() : SparcDisassembler.cpp
• DecodeCoprocRegsRegisterClass() : SparcDisassembler.cpp
• DecodeCPSInstruction() : ARMDisassembler.cpp
• DecodeCPU16RegsRegisterClass() : MipsDisassembler.cpp
• DecodeCPYMemOpInstruction() : AArch64Disassembler.cpp
• DecodeCR64BitRegisterClass() : SystemZDisassembler.cpp
• decodeCRBitMOperand() : PPCDisassembler.cpp
• DecodeCRBITRCRegisterClass() : PPCDisassembler.cpp
• DecodeCRC() : MipsDisassembler.cpp
• DecodeCRRCRegisterClass() : PPCDisassembler.cpp
• decodeCSSPushPopchk() : RISCVDisassembler.cpp
• DecodeCtrRegs64RegisterClass() : HexagonDisassembler.cpp
• DecodeCtrRegsRegisterClass() : HexagonDisassembler.cpp
• DecodeDaddiGroupBranch() : MipsDisassembler.cpp
• DecodeDAHIDATI() : MipsDisassembler.cpp
• DecodeDAHIDATIMMR6() : MipsDisassembler.cpp
• DecodeDEXT() : MipsDisassembler.cpp
• DecodeDFPRegsRegisterClass() : SparcDisassembler.cpp
• DecodeDINS() : MipsDisassembler.cpp
• decodeDirectBrTarget() : PPCDisassembler.cpp
• decodeDispRIHashOperand() : PPCDisassembler.cpp
• decodeDispRIX16Operand() : PPCDisassembler.cpp
• decodeDispRIXOperand() : PPCDisassembler.cpp
• decodeDispSPE2Operand() : PPCDisassembler.cpp
• decodeDispSPE4Operand() : PPCDisassembler.cpp
• decodeDispSPE8Operand() : PPCDisassembler.cpp
• DecodeDMRpRCRegisterClass() : PPCDisassembler.cpp
• DecodeDMRRCRegisterClass() : PPCDisassembler.cpp
• DecodeDMRROWpRCRegisterClass() : PPCDisassembler.cpp
• DecodeDMRROWRCRegisterClass() : PPCDisassembler.cpp
• DecodeDoubleRegLoad() : ARMDisassembler.cpp
• DecodeDoubleRegsRegisterClass() : HexagonDisassembler.cpp
• DecodeDoubleRegStore() : ARMDisassembler.cpp
• DecodeDPairRegisterClass() : ARMDisassembler.cpp
• DecodeDPairSpacedRegisterClass() : ARMDisassembler.cpp
• decodeDpp8FI() : AMDGPUDisassembler.cpp
• DecodeDPR_8RegisterClass() : ARMDisassembler.cpp
• DecodeDPR_VFP2RegisterClass() : ARMDisassembler.cpp
• DecodeDPRRegisterClass() : ARMDisassembler.cpp
• DecodeDPRRegListOperand() : ARMDisassembler.cpp
• DecodeDR16RegisterClass() : M68kDisassembler.cpp
• DecodeDR32RegisterClass() : M68kDisassembler.cpp
• DecodeDR8RegisterClass() : M68kDisassembler.cpp
• DecodeDSPRRegisterClass() : MipsDisassembler.cpp
• DecodeDstAddrMode() : MSP430Disassembler.cpp
• DecodeDWARFEncoding() : AsmPrinterDwarf.cpp
• DecodeExclusiveLdStInstruction() : AArch64Disassembler.cpp
• DecodeF128RegisterClass() : VEDisassembler.cpp
• DecodeF32RegisterClass() : VEDisassembler.cpp
• DecodeF4RCRegisterClass() : PPCDisassembler.cpp
• DecodeF8RCRegisterClass() : PPCDisassembler.cpp
• decodeFBRk() : AVRDisassembler.cpp
• DecodeFCCRegisterClass() : MipsDisassembler.cpp
• DecodeFCCRegsRegisterClass() : SparcDisassembler.cpp
• DecodeFCSRRegisterClass() : LoongArchDisassembler.cpp
• decodeFFMULRdRr() : AVRDisassembler.cpp
• DecodeFGR32RegisterClass() : MipsDisassembler.cpp
• DecodeFGR64RegisterClass() : MipsDisassembler.cpp
• DecodeFGRCCRegisterClass() : MipsDisassembler.cpp
• decodeFIOARr() : AVRDisassembler.cpp
• decodeFIOBIT() : AVRDisassembler.cpp
• decodeFIORdA() : AVRDisassembler.cpp
• DecodeFixedPointScaleImm32() : AArch64Disassembler.cpp
• DecodeFixedPointScaleImm64() : AArch64Disassembler.cpp
• DecodeFixedType() : Intrinsics.cpp
• DecodeFIXMEInstruction() : MipsDisassembler.cpp
• decodeFLPMX() : AVRDisassembler.cpp
• decodeFltRoundToHW() : SIModeRegisterDefaults.cpp
• decodeFltRoundToHWConversionTable() : SIModeRegisterDefaults.cpp
• DecodeFMem() : MipsDisassembler.cpp
• DecodeFMem2() : MipsDisassembler.cpp
• DecodeFMem3() : MipsDisassembler.cpp
• DecodeFMemCop2MMR6() : MipsDisassembler.cpp
• DecodeFMemCop2R6() : MipsDisassembler.cpp
• DecodeFMemMMR2() : MipsDisassembler.cpp
• DecodeFMOVLaneInstruction() : AArch64Disassembler.cpp
• decodeFMOVWRdRr() : AVRDisassembler.cpp
• decodeFMUL2RdRr() : AVRDisassembler.cpp
• DecodeForVMRSandVMSR() : ARMDisassembler.cpp
• DecodeFP128BitRegisterClass() : SystemZDisassembler.cpp
• DecodeFP32BitRegisterClass() : SystemZDisassembler.cpp
• DecodeFP64BitRegisterClass() : SystemZDisassembler.cpp
• DecodeFPCSCRegisterClass() : M68kDisassembler.cpp
• DecodeFPDR32RegisterClass : M68kDisassembler.cpp
• DecodeFPDR64RegisterClass : M68kDisassembler.cpp
• DecodeFPDR80RegisterClass : M68kDisassembler.cpp
• DecodeFPDRRegisterClass() : M68kDisassembler.cpp
• DecodeFPICRegisterClass : M68kDisassembler.cpp
• DecodeFPR16RegisterClass() : RISCVDisassembler.cpp
• DecodeFPR32CRegisterClass() : RISCVDisassembler.cpp
• DecodeFPR32RegisterClass() : LoongArchDisassembler.cpp, CSKYDisassembler.cpp, RISCVDisassembler.cpp
• DecodeFPR64CRegisterClass() : RISCVDisassembler.cpp
• DecodeFPR64RegisterClass() : CSKYDisassembler.cpp, LoongArchDisassembler.cpp, RISCVDisassembler.cpp
• DecodeFpRCRegisterClass() : PPCDisassembler.cpp
• DecodeFPRegsRegisterClass() : SparcDisassembler.cpp
• decodeFPUV3Instruction() : CSKYDisassembler.cpp
• decodeFRd() : AVRDisassembler.cpp
• decodeFRMArg() : RISCVDisassembler.cpp
• DecodeFromCyclicRange() : ARCDisassembler.cpp
• DecodeFunc : AVRDisassembler.cpp, BPFDisassembler.cpp, VEDisassembler.cpp
• decodeFWRdK() : AVRDisassembler.cpp
• DecodeG8pRCRegisterClass() : PPCDisassembler.cpp
• DecodeG8RC_NOX0RegisterClass() : PPCDisassembler.cpp
• DecodeG8RCRegisterClass() : PPCDisassembler.cpp
• DecodeGBR32ShortRegister() : ARCDisassembler.cpp
• DecodeGeneralDoubleLow8RegsRegisterClass() : HexagonDisassembler.cpp
• DecodeGeneralSubRegsRegisterClass() : HexagonDisassembler.cpp
• DecodeGPR32RegisterClass() : ARCDisassembler.cpp, BPFDisassembler.cpp, MipsDisassembler.cpp
• DecodeGPR64RegisterClass() : MipsDisassembler.cpp
• DecodeGPR64x8ClassRegisterClass() : AArch64Disassembler.cpp
• DecodeGPR8RegisterClass() : AVRDisassembler.cpp
• DecodeGPRC_NOR0RegisterClass() : PPCDisassembler.cpp
• DecodeGPRCRegisterClass() : PPCDisassembler.cpp, RISCVDisassembler.cpp
• DecodeGPRF16RegisterClass() : RISCVDisassembler.cpp
• DecodeGPRF32RegisterClass() : RISCVDisassembler.cpp
• DecodeGPRMM16MovePRegisterClass() : MipsDisassembler.cpp
• DecodeGPRMM16RegisterClass() : MipsDisassembler.cpp
• DecodeGPRMM16ZeroRegisterClass() : MipsDisassembler.cpp
• DecodeGPRnopcRegisterClass() : ARMDisassembler.cpp
• DecodeGPRnospRegisterClass() : ARMDisassembler.cpp
• DecodeGPRNoX0RegisterClass() : RISCVDisassembler.cpp
• DecodeGPRNoX0X2RegisterClass() : RISCVDisassembler.cpp
• DecodeGPRPairnospRegisterClass() : ARMDisassembler.cpp
• DecodeGPRPairRegisterClass() : ARMDisassembler.cpp, CSKYDisassembler.cpp, RISCVDisassembler.cpp
• DecodeGPRRegisterClass() : LanaiDisassembler.cpp, RISCVDisassembler.cpp, LoongArchDisassembler.cpp, CSKYDisassembler.cpp, BPFDisassembler.cpp, ARMDisassembler.cpp
• DecodeGPRSeqPairsClassRegisterClass() : AArch64Disassembler.cpp
• DecodeGPRSPRegisterClass() : CSKYDisassembler.cpp
• DecodeGPRspRegisterClass() : ARMDisassembler.cpp
• DecodeGPRwithAPSR_NZCVnospRegisterClass() : ARMDisassembler.cpp
• DecodeGPRwithAPSRRegisterClass() : ARMDisassembler.cpp
• DecodeGPRwithZRnospRegisterClass() : ARMDisassembler.cpp
• DecodeGPRwithZRRegisterClass() : ARMDisassembler.cpp
• DecodeGPRX1X5RegisterClass() : RISCVDisassembler.cpp
• DecodeGR128BitRegisterClass() : SystemZDisassembler.cpp
• DecodeGR16RegisterClass() : MSP430Disassembler.cpp
• DecodeGR32BitRegisterClass() : SystemZDisassembler.cpp
• DecodeGR64BitRegisterClass() : SystemZDisassembler.cpp
• DecodeGR8RegisterClass() : MSP430Disassembler.cpp
• DecodeGRH32BitRegisterClass() : SystemZDisassembler.cpp
• DecodeGRRegsRegisterClass() : XCoreDisassembler.cpp
• DecodeGuestRegs64RegisterClass() : HexagonDisassembler.cpp
• DecodeGuestRegsRegisterClass() : HexagonDisassembler.cpp
• DecodeHI32DSPRegisterClass() : MipsDisassembler.cpp
• DecodeHINTInstruction() : ARMDisassembler.cpp
• DecodeHPRRegisterClass() : ARMDisassembler.cpp
• DecodeHvxQRRegisterClass() : HexagonDisassembler.cpp
• DecodeHvxVQRRegisterClass() : HexagonDisassembler.cpp
• DecodeHvxVRRegisterClass() : HexagonDisassembler.cpp
• DecodeHvxWRRegisterClass() : HexagonDisassembler.cpp
• DecodeHWRegsRegisterClass() : MipsDisassembler.cpp
• DecodeI32RegisterClass() : VEDisassembler.cpp
• DecodeI64RegisterClass() : VEDisassembler.cpp
• DecodeI64RegsRegisterClass() : SparcDisassembler.cpp
• DecodeIITType() : Intrinsics.cpp
• decodeImm12Operand() : XtensaDisassembler.cpp
• decodeImm1_16Operand() : XtensaDisassembler.cpp
• decodeImm1n_15Operand() : XtensaDisassembler.cpp
• DecodeImm32() : M68kDisassembler.cpp
• decodeImm32n_95Operand() : XtensaDisassembler.cpp
• decodeImm8_sh8Operand() : XtensaDisassembler.cpp
• decodeImm8Operand() : XtensaDisassembler.cpp
• DecodeImm8OptLsl() : AArch64Disassembler.cpp
• decodeImmShiftOpValue() : CSKYDisassembler.cpp
• decodeImmZeroOperand() : PPCDisassembler.cpp
• decodeIndexFltRoundConversionTable() : SIModeRegisterDefaults.cpp
• DecodeInsSize() : MipsDisassembler.cpp
• DecodeInstSyncBarrierOption() : ARMDisassembler.cpp
• DecodeINSVE_DF() : MipsDisassembler.cpp
• DecodeIntPairRegisterClass() : SparcDisassembler.cpp
• DecodeIntRegsLow8RegisterClass() : HexagonDisassembler.cpp
• DecodeIntRegsRegisterClass() : HexagonDisassembler.cpp, SparcDisassembler.cpp
• DecodeIT() : ARMDisassembler.cpp
• decodeJMPIXImmOperand() : CSKYDisassembler.cpp
• decodeJumpOperand() : XtensaDisassembler.cpp
• DecodeJumpTarget() : MipsDisassembler.cpp
• DecodeJumpTargetMM() : MipsDisassembler.cpp
• DecodeJumpTargetXMM() : MipsDisassembler.cpp
• DecodeL2OpInstructionFail() : XCoreDisassembler.cpp
• DecodeL2RInstruction() : XCoreDisassembler.cpp
• DecodeL2RUSBitpInstruction() : XCoreDisassembler.cpp
• DecodeL2RUSInstruction() : XCoreDisassembler.cpp
• decodeL32ROperand() : XtensaDisassembler.cpp
• DecodeL3RInstruction() : XCoreDisassembler.cpp
• DecodeL3RSrcDstInstruction() : XCoreDisassembler.cpp
• DecodeL4RSrcDstInstruction() : XCoreDisassembler.cpp
• DecodeL4RSrcDstSrcDstInstruction() : XCoreDisassembler.cpp
• DecodeL5RInstruction() : XCoreDisassembler.cpp
• DecodeL5RInstructionFail() : XCoreDisassembler.cpp
• DecodeL6RInstruction() : XCoreDisassembler.cpp
• DecodeLASX256RegisterClass() : LoongArchDisassembler.cpp
• DecodeLazyLoadStoreMul() : ARMDisassembler.cpp
• DecodeLD8RegisterClass() : AVRDisassembler.cpp
• DecodeLdLImmInstruction() : ARCDisassembler.cpp
• DecodeLDR() : ARMDisassembler.cpp
• DecodeLdRLImmInstruction() : ARCDisassembler.cpp
• DecodeLDRPreImm() : ARMDisassembler.cpp
• DecodeLDRPreReg() : ARMDisassembler.cpp
• decodeLenOperand() : SystemZDisassembler.cpp
• DecodeLi16Imm() : MipsDisassembler.cpp
• decodeLLVMAttributesForBitcode() : BitcodeReader.cpp
• DecodeLO32DSPRegisterClass() : MipsDisassembler.cpp
• DecodeLoadASI64() : VEDisassembler.cpp
• DecodeLoadByte15() : MipsDisassembler.cpp
• DecodeLoadF32() : VEDisassembler.cpp
• DecodeLoadI32() : VEDisassembler.cpp
• DecodeLoadI64() : VEDisassembler.cpp
• decodeLoadStore() : AVRDisassembler.cpp
• DecodeLogicalImmInstruction() : AArch64Disassembler.cpp
• DecodeLOLoop() : ARMDisassembler.cpp
• DecodeLongShiftOperand() : ARMDisassembler.cpp
• DecodeLR2RInstruction() : XCoreDisassembler.cpp
• decodeLRW16Imm8() : CSKYDisassembler.cpp
• DecodeLSX128RegisterClass() : LoongArchDisassembler.cpp
• DecodeMatrixTile() : AArch64Disassembler.cpp
• DecodeMatrixTileListRegisterClass() : AArch64Disassembler.cpp
• DecodeMem() : MipsDisassembler.cpp, VEDisassembler.cpp
• decodeMem16Operand() : XtensaDisassembler.cpp
• decodeMem32nOperand() : XtensaDisassembler.cpp
• decodeMem32Operand() : XtensaDisassembler.cpp
• decodeMem8Operand() : XtensaDisassembler.cpp
• DecodeMemAS() : VEDisassembler.cpp
• DecodeMemBarrierOption() : ARMDisassembler.cpp
• DecodeMemEVA() : MipsDisassembler.cpp
• DecodeMemExtend() : AArch64Disassembler.cpp
• DecodeMemMMGPImm7Lsl2() : MipsDisassembler.cpp
• DecodeMemMMImm12() : MipsDisassembler.cpp
• DecodeMemMMImm16() : MipsDisassembler.cpp
• DecodeMemMMImm4() : MipsDisassembler.cpp
• DecodeMemMMImm9() : MipsDisassembler.cpp
• DecodeMemMMReglistImm4Lsl2() : MipsDisassembler.cpp
• DecodeMemMMSPImm5Lsl2() : MipsDisassembler.cpp
• DecodeMemMultipleWritebackInstruction() : ARMDisassembler.cpp
• DecodeMemOperand() : MSP430Disassembler.cpp
• decodeMemoryOpValue() : BPFDisassembler.cpp
• decodeMemri() : AVRDisassembler.cpp
• DecodeMEMrs9() : ARCDisassembler.cpp
• DecodemGPRRegisterClass() : CSKYDisassembler.cpp
• DecodeMISCRegisterClass() : VEDisassembler.cpp
• DecodeModImmInstruction() : AArch64Disassembler.cpp
• DecodeModImmTiedInstruction() : AArch64Disassembler.cpp
• DecodeModRegsRegisterClass() : HexagonDisassembler.cpp
• DecodeMoveHRegInstruction() : ARCDisassembler.cpp
• DecodeMoveImmInstruction() : AArch64Disassembler.cpp
• DecodeMovePOperands() : MipsDisassembler.cpp
• DecodeMovePRegPair() : MipsDisassembler.cpp
• DecodeMQPRRegisterClass() : ARMDisassembler.cpp
• DecodeMQQPRRegisterClass() : ARMDisassembler.cpp
• DecodeMQQQQPRRegisterClass() : ARMDisassembler.cpp
• DecodeMRSSystemRegister() : AArch64Disassembler.cpp
• DecodeMSA128BRegisterClass() : MipsDisassembler.cpp
• DecodeMSA128DRegisterClass() : MipsDisassembler.cpp
• DecodeMSA128HRegisterClass() : MipsDisassembler.cpp
• DecodeMSA128Mem() : MipsDisassembler.cpp
• DecodeMSA128WRegisterClass() : MipsDisassembler.cpp
• DecodeMSACtrlRegisterClass() : MipsDisassembler.cpp
• DecodeMSRMask() : ARMDisassembler.cpp
• DecodeMSRSystemRegister() : AArch64Disassembler.cpp
• decodeMultiByteChar() : MicrosoftDemangle.cpp
• DecodeMVE_MEM_1_pre() : ARMDisassembler.cpp
• DecodeMVE_MEM_2_pre() : ARMDisassembler.cpp
• DecodeMVE_MEM_3_pre() : ARMDisassembler.cpp
• DecodeMVE_MEM_pre() : ARMDisassembler.cpp
• DecodeMveAddrModeQ() : ARMDisassembler.cpp
• DecodeMveAddrModeRQ() : ARMDisassembler.cpp
• DecodeMVEModImmInstruction() : ARMDisassembler.cpp
• DecodeMVEOverlappingLongShift() : ARMDisassembler.cpp
• DecodeMVEPairVectorIndexOperand() : ARMDisassembler.cpp
• DecodeMVEVADCInstruction() : ARMDisassembler.cpp
• DecodeMVEVCMP() : ARMDisassembler.cpp
• DecodeMveVCTP() : ARMDisassembler.cpp
• DecodeMVEVCVTt1fp() : ARMDisassembler.cpp
• DecodeMVEVMOVDRegtoQ() : ARMDisassembler.cpp
• DecodeMVEVMOVQtoDReg() : ARMDisassembler.cpp
• DecodeMVEVPNOT() : ARMDisassembler.cpp
• DecodeNegImmOperand() : XCoreDisassembler.cpp
• DecodeNEONComplexLane64Instruction() : ARMDisassembler.cpp
• decodeOImmOperand() : CSKYDisassembler.cpp
• decodeOperand_KImmFP() : AMDGPUDisassembler.cpp
• decodeOperand_VGPR_16() : AMDGPUDisassembler.cpp
• decodeOperand_VSrc_f64() : AMDGPUDisassembler.cpp
• decodeOperand_VSrcT16() : AMDGPUDisassembler.cpp
• decodeOperand_VSrcT16_Lo128() : AMDGPUDisassembler.cpp
• decodeOperand_VSrcT16_Lo128_Deferred() : AMDGPUDisassembler.cpp
• decodeOperandVOPDDstY() : AMDGPUDisassembler.cpp
• DecodePairLdStInstruction() : AArch64Disassembler.cpp
• DecodePALIGNRMask() : X86InterleavedAccess.cpp
• decodePC12DBLBranchOperand() : SystemZDisassembler.cpp
• decodePC16DBLBranchOperand() : SystemZDisassembler.cpp
• decodePC24DBLBranchOperand() : SystemZDisassembler.cpp
• decodePC32DBLBranchOperand() : SystemZDisassembler.cpp
• decodePC32DBLOperand() : SystemZDisassembler.cpp
• decodePCDBLOperand() : SystemZDisassembler.cpp
• DecodePCRelLabel16() : AArch64Disassembler.cpp
• DecodePCRelLabel19() : AArch64Disassembler.cpp
• DecodePCRelLabel9() : AArch64Disassembler.cpp
• DecodePointerLikeRegClass0 : PPCDisassembler.cpp, SparcDisassembler.cpp
• DecodePointerLikeRegClass1 : PPCDisassembler.cpp
• DecodePOOL16BEncodedField() : MipsDisassembler.cpp
• DecodePOP35GroupBranchMMR6() : MipsDisassembler.cpp
• DecodePOP37GroupBranchMMR6() : MipsDisassembler.cpp
• DecodePOP65GroupBranchMMR6() : MipsDisassembler.cpp
• DecodePOP75GroupBranchMMR6() : MipsDisassembler.cpp
• DecodePostIdxReg() : ARMDisassembler.cpp
• DecodePowerTwoOperand() : ARMDisassembler.cpp
• DecodePPR2Mul2RegisterClass() : AArch64Disassembler.cpp
• decodePredicateOperand() : LanaiDisassembler.cpp
• DecodePredicateOperand() : ARMDisassembler.cpp
• DecodePredNoALOperand() : ARMDisassembler.cpp
• DecodePredRegsRegisterClass() : HexagonDisassembler.cpp
• DecodePrefeOpMM() : MipsDisassembler.cpp
• DecodePRFMRegInstruction() : AArch64Disassembler.cpp
• DecodePRRegsRegisterClass() : SparcDisassembler.cpp
• DecodePtrRegisterClass() : MipsDisassembler.cpp
• DecodeQADDInstruction() : ARMDisassembler.cpp
• DecodeQBRCRegisterClass : PPCDisassembler.cpp
• DecodeQFPRegsRegisterClass() : SparcDisassembler.cpp
• DecodeQPRRegisterClass() : ARMDisassembler.cpp
• DecodeQSRCRegisterClass : PPCDisassembler.cpp
• DecodeR2RInstruction() : XCoreDisassembler.cpp
• DecodeRDOperand() : VEDisassembler.cpp
• decodeRegisterClass() : PPCDisassembler.cpp, SystemZDisassembler.cpp
• DecodeRegisterClass() : HexagonDisassembler.cpp, M68kDisassembler.cpp
• DecodeRegListOperand() : ARMDisassembler.cpp, MipsDisassembler.cpp
• DecodeRegListOperand16() : MipsDisassembler.cpp
• decodeRegReg() : RISCVDisassembler.cpp
• DecodeRegSeqOperand() : CSKYDisassembler.cpp
• DecodeRegSeqOperandD1() : CSKYDisassembler.cpp
• DecodeRegSeqOperandD2() : CSKYDisassembler.cpp
• DecodeRegSeqOperandF1() : CSKYDisassembler.cpp
• DecodeRegSeqOperandF2() : CSKYDisassembler.cpp
• DecodeRestrictedFPPredicateOperand() : ARMDisassembler.cpp
• DecodeRestrictedIPredicateOperand() : ARMDisassembler.cpp
• DecodeRestrictedSPredicateOperand() : ARMDisassembler.cpp
• DecodeRestrictedUPredicateOperand() : ARMDisassembler.cpp
• DecodeRFEInstruction() : ARMDisassembler.cpp
• DecoderForMRRC2AndMCRR2() : ARMDisassembler.cpp
• DecoderGPRRegisterClass() : ARMDisassembler.cpp
• decodeRiMemoryValue() : LanaiDisassembler.cpp
• DecodeRRegsRegisterClass() : XCoreDisassembler.cpp
• decodeRrMemoryValue() : LanaiDisassembler.cpp
• decodeRTZArg() : RISCVDisassembler.cpp
• DecodeRUSBitpInstruction() : XCoreDisassembler.cpp
• DecodeRUSInstruction() : XCoreDisassembler.cpp
• DecodeRUSSrcDstBitpInstruction() : XCoreDisassembler.cpp
• decodeRVCInstrRdRs1ImmZero() : RISCVDisassembler.cpp
• decodeRVCInstrRdRs1Rs2() : RISCVDisassembler.cpp
• decodeRVCInstrRdRs1UImm() : RISCVDisassembler.cpp
• decodeRVCInstrRdRs2() : RISCVDisassembler.cpp
• decodeRVCInstrRdSImm() : RISCVDisassembler.cpp
• decodeS16ImmOperand() : SystemZDisassembler.cpp
• decodeS20ImmOperand() : SystemZDisassembler.cpp
• decodeS32ImmOperand() : SystemZDisassembler.cpp
• decodeS8ImmOperand() : SystemZDisassembler.cpp
• DecodeSCRRegisterClass() : LoongArchDisassembler.cpp
• DecodeSETMemOpInstruction() : AArch64Disassembler.cpp
• DecodeSETPANInstruction() : ARMDisassembler.cpp
• DecodesFPR128RegisterClass() : CSKYDisassembler.cpp
• DecodesFPR32RegisterClass() : CSKYDisassembler.cpp
• DecodesFPR64_VRegisterClass() : CSKYDisassembler.cpp
• DecodesFPR64RegisterClass() : CSKYDisassembler.cpp
• DecodesGPRRegisterClass() : CSKYDisassembler.cpp
• decodeShiftImm() : LanaiDisassembler.cpp
• DecodeShiftRight16Imm() : ARMDisassembler.cpp
• DecodeShiftRight32Imm() : ARMDisassembler.cpp
• DecodeShiftRight64Imm() : ARMDisassembler.cpp
• DecodeShiftRight8Imm() : ARMDisassembler.cpp
• decodeShimm1_31Operand() : XtensaDisassembler.cpp
• DecodeSignedLdStInstruction() : AArch64Disassembler.cpp
• DecodeSignedOperand() : ARCDisassembler.cpp
• decodeSignRotatedValue() : SelectionDAGISel.cpp
• DecodeSImm() : AArch64Disassembler.cpp
• DecodeSIMM13() : SparcDisassembler.cpp
• DecodeSimm18Lsl3() : MipsDisassembler.cpp
• DecodeSimm19Lsl2() : MipsDisassembler.cpp
• DecodeSimm23Lsl2() : MipsDisassembler.cpp
• DecodeSIMM32() : VEDisassembler.cpp
• DecodeSIMM7() : VEDisassembler.cpp
• DecodeSimm9SP() : MipsDisassembler.cpp
• decodeSImmNonZeroOperand() : RISCVDisassembler.cpp
• decodeSImmOperand() : CSKYDisassembler.cpp, LoongArchDisassembler.cpp, PPCDisassembler.cpp, RISCVDisassembler.cpp, SystemZDisassembler.cpp
• decodeSImmOperandAndLsl1() : RISCVDisassembler.cpp
• DecodeSImmWithOffsetAndScale() : MipsDisassembler.cpp
• DecodeSimpleRegisterClass() : AArch64Disassembler.cpp
• decodeSMEMOffset() : AMDGPUDisassembler.cpp
• DecodeSMLAInstruction() : ARMDisassembler.cpp
• decodeSOPPBrTarget() : AMDGPUDisassembler.cpp
• DecodeSOPwithRS12() : ARCDisassembler.cpp
• DecodeSOPwithRU6() : ARCDisassembler.cpp
• DecodeSORegImmOperand() : ARMDisassembler.cpp
• DecodeSORegMemOperand() : ARMDisassembler.cpp
• DecodeSORegRegOperand() : ARMDisassembler.cpp
• DecodeSpecial3LlSc() : MipsDisassembler.cpp
• DecodeSPERCRegisterClass() : PPCDisassembler.cpp
• decodeSplitBarrier() : AMDGPUDisassembler.cpp
• decodeSplsValue() : LanaiDisassembler.cpp
• DecodeSPR_8RegisterClass() : ARMDisassembler.cpp
• DecodeSPRRegisterClass() : ARMDisassembler.cpp
• DecodeSPRRegListOperand() : ARMDisassembler.cpp
• DecodeSR07RegisterClass() : RISCVDisassembler.cpp
• decodeSrcA9() : AMDGPUDisassembler.cpp
• DecodeSrcAddrMode() : MSP430Disassembler.cpp
• DecodeSrcAddrModeI() : MSP430Disassembler.cpp
• DecodeSrcAddrModeII() : MSP430Disassembler.cpp
• decodeSrcAV10() : AMDGPUDisassembler.cpp
• decodeSrcOp() : AMDGPUDisassembler.cpp
• decodeSrcReg9() : AMDGPUDisassembler.cpp
• decodeSrcRegOrImm9() : AMDGPUDisassembler.cpp
• decodeSrcRegOrImmA9() : AMDGPUDisassembler.cpp
• decodeSrcRegOrImmDeferred9() : AMDGPUDisassembler.cpp
• DecodeSRRegisterClass() : XtensaDisassembler.cpp
• DecodeStatus : AArch64Disassembler.cpp, XtensaDisassembler.cpp, XCoreDisassembler.cpp, WebAssemblyDisassembler.cpp, VEDisassembler.cpp, SystemZDisassembler.cpp, SparcDisassembler.cpp, RISCVDisassembler.cpp, PPCDisassembler.cpp, MSP430Disassembler.cpp, MipsDisassembler.cpp, LoongArchDisassembler.cpp, AMDGPUDisassembler.cpp, ARCDisassembler.cpp, ARMDisassembler.cpp, AVRDisassembler.cpp, BPFDisassembler.cpp, CSKYDisassembler.cpp, HexagonDisassembler.cpp, LanaiDisassembler.cpp, M68kDisassembler.cpp
• DecodeStLImmInstruction() : ARCDisassembler.cpp
• DecodeStoreASI64() : VEDisassembler.cpp
• DecodeStoreF32() : VEDisassembler.cpp
• DecodeStoreI32() : VEDisassembler.cpp
• DecodeStoreI64() : VEDisassembler.cpp
• DecodeSTRPreImm() : ARMDisassembler.cpp
• DecodeSTRPreReg() : ARMDisassembler.cpp
• DecodeSVCROp() : AArch64Disassembler.cpp
• DecodeSVEIncDecImm() : AArch64Disassembler.cpp
• DecodeSVELogicalImmInstruction() : AArch64Disassembler.cpp
• DecodeSwap() : ARMDisassembler.cpp
• DecodeSymbolicOperand() : ARCDisassembler.cpp
• DecodeSymbolicOperandOff() : ARCDisassembler.cpp
• DecodeSyncI() : MipsDisassembler.cpp
• DecodeSyncI_MM() : MipsDisassembler.cpp
• DecodeSynciR6() : MipsDisassembler.cpp
• DecodeSyspXzrInstruction() : AArch64Disassembler.cpp
• DecodeSysRegs64RegisterClass() : HexagonDisassembler.cpp
• DecodeSysRegsRegisterClass() : HexagonDisassembler.cpp
• DecodeSystemPStateImm0_15Instruction() : AArch64Disassembler.cpp
• DecodeSystemPStateImm0_1Instruction() : AArch64Disassembler.cpp
• DecodeT2AddrModeImm0_1020s4() : ARMDisassembler.cpp
• DecodeT2AddrModeImm12() : ARMDisassembler.cpp
• DecodeT2AddrModeImm7() : ARMDisassembler.cpp
• DecodeT2AddrModeImm7s4() : ARMDisassembler.cpp
• DecodeT2AddrModeImm8() : ARMDisassembler.cpp
• DecodeT2AddrModeImm8s4() : ARMDisassembler.cpp
• DecodeT2AddrModeSOReg() : ARMDisassembler.cpp
• DecodeT2AddSubSPImm() : ARMDisassembler.cpp
• DecodeT2Adr() : ARMDisassembler.cpp
• DecodeT2BInstruction() : ARMDisassembler.cpp
• DecodeT2BROperand() : ARMDisassembler.cpp
• DecodeT2CPSInstruction() : ARMDisassembler.cpp
• DecodeT2HintSpaceInstruction() : ARMDisassembler.cpp
• DecodeT2Imm7() : ARMDisassembler.cpp
• DecodeT2Imm7S4() : ARMDisassembler.cpp
• DecodeT2Imm8() : ARMDisassembler.cpp
• DecodeT2Imm8S4() : ARMDisassembler.cpp
• DecodeT2LDRDPreInstruction() : ARMDisassembler.cpp
• DecodeT2LdStPre() : ARMDisassembler.cpp
• DecodeT2LoadImm12() : ARMDisassembler.cpp
• DecodeT2LoadImm8() : ARMDisassembler.cpp
• DecodeT2LoadLabel() : ARMDisassembler.cpp
• DecodeT2LoadShift() : ARMDisassembler.cpp
• DecodeT2LoadT() : ARMDisassembler.cpp
• DecodeT2MOVTWInstruction() : ARMDisassembler.cpp
• DecodeT2ShifterImmOperand() : ARMDisassembler.cpp
• DecodeT2SOImm() : ARMDisassembler.cpp
• DecodeT2STRDPreInstruction() : ARMDisassembler.cpp
• DecodeTAddrModeImm7() : ARMDisassembler.cpp
• DecodeTBLInstruction() : ARMDisassembler.cpp
• DecodetcGPRRegisterClass() : ARMDisassembler.cpp
• DecodeTestAndBranch() : AArch64Disassembler.cpp
• DecodetGPREvenRegisterClass() : ARMDisassembler.cpp
• DecodetGPROddRegisterClass() : ARMDisassembler.cpp
• DecodetGPRRegisterClass() : ARMDisassembler.cpp
• DecodeThreeAddrSRegInstruction() : AArch64Disassembler.cpp
• DecodeThumb2BCCInstruction() : ARMDisassembler.cpp
• DecodeThumbAddrModeIS() : ARMDisassembler.cpp
• DecodeThumbAddrModePC() : ARMDisassembler.cpp
• DecodeThumbAddrModeRR() : ARMDisassembler.cpp
• DecodeThumbAddrModeSP() : ARMDisassembler.cpp
• DecodeThumbAddSpecialReg() : ARMDisassembler.cpp
• DecodeThumbAddSPImm() : ARMDisassembler.cpp
• DecodeThumbAddSPReg() : ARMDisassembler.cpp
• DecodeThumbBCCTargetOperand() : ARMDisassembler.cpp
• DecodeThumbBLTargetOperand() : ARMDisassembler.cpp
• DecodeThumbBLXOffset() : ARMDisassembler.cpp
• DecodeThumbBROperand() : ARMDisassembler.cpp
• DecodeThumbCmpBROperand() : ARMDisassembler.cpp
• DecodeThumbCPS() : ARMDisassembler.cpp
• DecodeThumbTableBranch() : ARMDisassembler.cpp
• DecodeTS1AMI32() : VEDisassembler.cpp
• DecodeTS1AMI64() : VEDisassembler.cpp
• DecodeTSBInstruction() : ARMDisassembler.cpp
• DecodeTSTInstruction() : ARMDisassembler.cpp
• decodeU12ImmOperand() : SystemZDisassembler.cpp
• decodeU16ImmOperand() : SystemZDisassembler.cpp
• decodeU1ImmOperand() : SystemZDisassembler.cpp
• decodeU2ImmOperand() : SystemZDisassembler.cpp
• decodeU32ImmOperand() : SystemZDisassembler.cpp
• decodeU3ImmOperand() : SystemZDisassembler.cpp
• decodeU4ImmOperand() : SystemZDisassembler.cpp
• decodeU8ImmOperand() : SystemZDisassembler.cpp
• decodeUimm4Operand() : XtensaDisassembler.cpp
• decodeUimm5Operand() : XtensaDisassembler.cpp
• decodeUImmLog2XLenNonZeroOperand() : RISCVDisassembler.cpp
• decodeUImmLog2XLenOperand() : RISCVDisassembler.cpp
• decodeUImmNonZeroOperand() : RISCVDisassembler.cpp
• decodeUImmOperand() : CSKYDisassembler.cpp, LoongArchDisassembler.cpp, PPCDisassembler.cpp, RISCVDisassembler.cpp, SystemZDisassembler.cpp
• DecodeUImmWithOffset() : MipsDisassembler.cpp
• DecodeUImmWithOffsetAndScale() : MipsDisassembler.cpp
• DecodeUnconditionalBranch() : AArch64Disassembler.cpp
• DecodeUnsignedLdStInstruction() : AArch64Disassembler.cpp
• decodeUTF8() : YAMLParser.cpp
• DecodeV64RegisterClass() : VEDisassembler.cpp
• DecodeVCVTD() : ARMDisassembler.cpp
• DecodeVCVTImmOperand() : ARMDisassembler.cpp
• DecodeVCVTQ() : ARMDisassembler.cpp
• DecodeVecShiftL16Imm() : AArch64Disassembler.cpp
• DecodeVecShiftL32Imm() : AArch64Disassembler.cpp
• DecodeVecShiftL64Imm() : AArch64Disassembler.cpp
• DecodeVecShiftL8Imm() : AArch64Disassembler.cpp
• DecodeVecShiftLImm() : AArch64Disassembler.cpp
• DecodeVecShiftR16Imm() : AArch64Disassembler.cpp
• DecodeVecShiftR16ImmNarrow() : AArch64Disassembler.cpp
• DecodeVecShiftR32Imm() : AArch64Disassembler.cpp
• DecodeVecShiftR32ImmNarrow() : AArch64Disassembler.cpp
• DecodeVecShiftR64Imm() : AArch64Disassembler.cpp
• DecodeVecShiftR64ImmNarrow() : AArch64Disassembler.cpp
• DecodeVecShiftR8Imm() : AArch64Disassembler.cpp
• DecodeVecShiftRImm() : AArch64Disassembler.cpp
• decodeVersionImm() : AMDGPUDisassembler.cpp
• DecodeVFRCRegisterClass() : PPCDisassembler.cpp
• DecodeVGPR_16_Lo128RegisterClass() : AMDGPUDisassembler.cpp
• DecodeVGPR_16RegisterClass() : AMDGPUDisassembler.cpp
• DecodeVLD1DupInstruction() : ARMDisassembler.cpp
• DecodeVLD1LN() : ARMDisassembler.cpp
• DecodeVLD2DupInstruction() : ARMDisassembler.cpp
• DecodeVLD2LN() : ARMDisassembler.cpp
• DecodeVLD3DupInstruction() : ARMDisassembler.cpp
• DecodeVLD3LN() : ARMDisassembler.cpp
• DecodeVLD4DupInstruction() : ARMDisassembler.cpp
• DecodeVLD4LN() : ARMDisassembler.cpp
• DecodeVLDInstruction() : ARMDisassembler.cpp
• DecodeVLDST1Instruction() : ARMDisassembler.cpp
• DecodeVLDST2Instruction() : ARMDisassembler.cpp
• DecodeVLDST3Instruction() : ARMDisassembler.cpp
• DecodeVLDST4Instruction() : ARMDisassembler.cpp
• DecodeVM512RegisterClass() : VEDisassembler.cpp
• decodeVMaskReg() : RISCVDisassembler.cpp
• DecodeVMOVModImmInstruction() : ARMDisassembler.cpp
• DecodeVMOVRRS() : ARMDisassembler.cpp
• DecodeVMOVSRR() : ARMDisassembler.cpp
• DecodeVMRegisterClass() : VEDisassembler.cpp
• DecodeVpredNOperand() : ARMDisassembler.cpp
• DecodeVpredROperand() : ARMDisassembler.cpp
• DecodeVPTMaskOperand() : ARMDisassembler.cpp
• DecodeVR128BitRegisterClass() : SystemZDisassembler.cpp
• DecodeVR32BitRegisterClass() : SystemZDisassembler.cpp
• DecodeVR64BitRegisterClass() : SystemZDisassembler.cpp
• DecodeVRM2RegisterClass() : RISCVDisassembler.cpp
• DecodeVRM4RegisterClass() : RISCVDisassembler.cpp
• DecodeVRM8RegisterClass() : RISCVDisassembler.cpp
• DecodeVRRCRegisterClass() : PPCDisassembler.cpp
• DecodeVRRegisterClass() : RISCVDisassembler.cpp
• DecodeVSCCLRM() : ARMDisassembler.cpp
• DecodeVSFRCRegisterClass() : PPCDisassembler.cpp
• DecodeVSHLMaxInstruction() : ARMDisassembler.cpp
• DecodeVSRCRegisterClass() : PPCDisassembler.cpp
• decodeVSRpEvenOperands() : PPCDisassembler.cpp
• DecodeVSRpRCRegisterClass() : PPCDisassembler.cpp
• DecodeVSSRCRegisterClass() : PPCDisassembler.cpp
• DecodeVST1LN() : ARMDisassembler.cpp
• DecodeVST2LN() : ARMDisassembler.cpp
• DecodeVST3LN() : ARMDisassembler.cpp
• DecodeVST4LN() : ARMDisassembler.cpp
• DecodeVSTInstruction() : ARMDisassembler.cpp
• DecodeVSTRVLDR_SYSREG() : ARMDisassembler.cpp
• DecodeWACC_HIRCRegisterClass() : PPCDisassembler.cpp
• DecodeWACCRCRegisterClass() : PPCDisassembler.cpp
• DecodeWSeqPairsClassRegisterClass() : AArch64Disassembler.cpp
• DecodeXR16RegisterClass() : M68kDisassembler.cpp
• DecodeXR32RegisterClass() : M68kDisassembler.cpp
• DecodeXSeqPairsClassRegisterClass() : AArch64Disassembler.cpp
• decodeXTHeadMemPair() : RISCVDisassembler.cpp
• decodeZcmpRlist() : RISCVDisassembler.cpp
• decodeZcmpSpimm() : RISCVDisassembler.cpp
• DecodeZK() : AArch64Disassembler.cpp
• DecodeZPR2Mul2RegisterClass() : AArch64Disassembler.cpp
• DecodeZPR4Mul4RegisterClass() : AArch64Disassembler.cpp
• DecodeZPRMul2_MinMax() : AArch64Disassembler.cpp
• decompose() : ConstraintElimination.cpp
• decomposeBitTestICmp() : InstCombineAndOrXor.cpp
• decomposeGEP() : ConstraintElimination.cpp
• decomposeIntoOrrOfLogicalImmediates() : AArch64ExpandImm.cpp
• decreaseSetPressure() : RegisterPressure.cpp
• deduceFunctionAttributeInRPO() : FunctionAttrs.cpp
• DeduceICVValues : OpenMPOpt.cpp
• DEF_CONST : Constant.h, Context.h, Type.h, Value.h
• DEF_INSTR : User.cpp, Instruction.cpp, Value.h, User.h, Value.h, Instruction.h, Type.h
• DEF_USER : Value.h, User.cpp
• DEF_VALUE : Value.h, User.cpp
• Default : DwarfDebug.cpp, AArch64AsmPrinter.cpp, AArch64MCAsmInfo.cpp
• DEFAULT_ADDRSPACE : MasmParser.cpp, AsmParser.cpp
• DEFAULT_DLLNAME : jitprofiling.c
• DEFAULT_NOREG : X86MCTargetDesc.cpp
• DEFAULT_SPAN_MAP_COUNT : rpmalloc.c
• DEFAULT_VEC_SLOTS : R600MachineCFGStructurizer.cpp
• DefaultAliasRegex : PassBuilder.cpp
• DefaultAMDHSACodeObjectVersion : AMDGPUBaseInfo.cpp
• DefaultArch : HexagonMCTargetDesc.cpp
• DefaultAutoDetectFunction() : WithColor.cpp
• DefaultCheckPrefixes : FileCheck.cpp
• DefaultCommentPrefixes : FileCheck.cpp
• defaultComponentBroadcast() : AMDGPUInstCombineIntrinsic.cpp
• DefaultCutoffsData : ProfileSummaryBuilder.cpp
• defaultDiagHandler() : MCContext.cpp
• DefaultFloatSpecs : DataLayout.cpp
• DefaultGCOVVersion : GCOVProfiling.cpp
• DefaultIntSpecs : DataLayout.cpp
• DefaultIT : ARMSubtarget.cpp
• DefaultLinkageNames : DwarfDebug.cpp
• defaultListDAGScheduler : SelectionDAGISel.cpp
• DefaultMaxBBsToExplore : CFG.cpp
• DefaultMaxUsesToExplore : CaptureTracking.cpp
• DefaultMemGranularity : MemProfiler.cpp
• DefaultOnOff : DwarfDebug.cpp
• DefaultPad : CommandLine.cpp
• DefaultPipelineMagicStr : SandboxVectorizer.cpp
• DefaultPointerSpecs : DataLayout.cpp
• defaultRegAlloc : TargetPassConfig.cpp
• DefaultRotationThreshold : LoopRotation.cpp
• DefaultSafeSPDisplacement : AArch64FrameLowering.cpp
• DefaultSchedRegistry : MachineScheduler.cpp
• DefaultShadowScale : MemProfiler.cpp
• DefaultThreshold : InlineCost.cpp
• DefaultTimerGroup : Timer.cpp
• DefaultTripCount : LoopCacheAnalysis.cpp
• DefaultVal : SPIRVModuleAnalysis.cpp
• DefaultVALUInstsThreshold : AMDGPUSetWavePriority.cpp
• DefaultVectorSpecs : DataLayout.cpp
• DeferredIntrinsicMatchPair : Intrinsics.cpp
• DEFINE_GETIMPL_LOOKUP : DebugInfoMetadata.cpp
• DEFINE_GETIMPL_STORE : DebugInfoMetadata.cpp
• DEFINE_GETIMPL_STORE_N : DebugInfoMetadata.cpp
• DEFINE_GETIMPL_STORE_NO_CONSTRUCTOR_ARGS : DebugInfoMetadata.cpp
• DEFINE_GETIMPL_STORE_NO_OPS : DebugInfoMetadata.cpp
• DEFINE_HELPERS : InstrTypes.h
• DEFINE_ISA_CONVERSION_FUNCTIONS : CBindingWrapping.h
• DEFINE_MDNODE_GET : DebugInfoMetadata.h
• DEFINE_MDNODE_GET_DISTINCT_TEMPORARY : DebugInfoMetadata.h
• DEFINE_MDNODE_GET_UNPACK : DebugInfoMetadata.h
• DEFINE_MDNODE_GET_UNPACK_IMPL : DebugInfoMetadata.h
• DEFINE_PPC_REGCLASSES : PPCMCTargetDesc.h
• DEFINE_SIMPLE_CONVERSION_FUNCTIONS() : TargetMachineC.cpp, PassBuilderBindings.cpp, OrcV2CBindings.cpp, CBindingWrapping.h, OrcV2CBindings.cpp
• DEFINE_STDCXX_CONVERSION_FUNCTIONS : CBindingWrapping.h
• DEFINE_SYMBOL_TABLE_PARENT_TYPE : SymbolTableListTraits.h
• DEFINE_TRANSPARENT_OPERAND_ACCESSORS : OperandTraits.h
• definedBySignExtendingOp() : PPCInstrInfo.cpp
• definedByZeroExtendingOp() : PPCInstrInfo.cpp
• definedInCaller() : CodeExtractor.cpp
• definedInRegion() : CodeExtractor.cpp
• defineExternalNode() : ModuleSummaryIndex.cpp
• DefineKeys : AttributorAttributes.cpp
• definesFullReg() : RegisterCoalescer.cpp
• definesOrUsesFPReg() : ARMExpandPseudoInsts.cpp
• DefMI : AArch64ExpandPseudoInsts.cpp
• DEGREE : blake3_avx2.c, blake3_sse41.c, blake3_sse2.c
• Deinterleaving : ComplexDeinterleavingPass.cpp
• DELEGATE : InstVisitor.h
• deleteDeadBlocksFromLoop() : SimpleLoopUnswitch.cpp
• deleteDeadClonedBlocks() : SimpleLoopUnswitch.cpp
• DeleteDeadIFuncs() : GlobalOpt.cpp
• deleteDeadInstruction() : LoopIdiomRecognize.cpp
• deleteFunction() : ElimAvailExtern.cpp
• deleteIfDead() : GlobalOpt.cpp
• deleteLoopIfDead() : LoopDeletion.cpp
• Delinearize : DependenceAnalysis.cpp
• DEMANGLE_ASSERT : DemangleConfig.h
• DEMANGLE_ATTRIBUTE_NOINLINE : DemangleConfig.h
• DEMANGLE_ATTRIBUTE_USED : DemangleConfig.h
• DEMANGLE_DUMP_METHOD : DemangleConfig.h
• DEMANGLE_FALLTHROUGH : DemangleConfig.h
• DEMANGLE_GNUC_PREREQ : DemangleConfig.h
• DEMANGLE_NAMESPACE_BEGIN : DemangleConfig.h
• DEMANGLE_NAMESPACE_END : DemangleConfig.h
• DEMANGLE_UNREACHABLE : DemangleConfig.h
• demangleFunctionRefQualifier() : MicrosoftDemangle.cpp
• demanglePointerCVQualifiers() : MicrosoftDemangle.cpp
• Demangler : ItaniumDemangle.cpp
• DemoteCatchSwitchPHIOnlyOpt : WinEHPrepare.cpp
• Denormalize : ScalarEvolutionNormalization.cpp
• denormalModeIsFlushAllF32() : SIISelLowering.cpp
• denormalModeIsFlushAllF64F16() : SIISelLowering.cpp
• denormModeCompatible() : Attributes.cpp
• dependencies() : DwarfCompileUnit.cpp
• DependFilename : Main.cpp
• dependsOnLocalPhi() : AMDGPUTargetTransformInfo.cpp
• DepGraphDotFileNamePrefix : Attributor.cpp
• DEPOTNAME : NVPTXAsmPrinter.cpp
• deregisterEHFrameWrapper() : RegisterEHFrames.cpp
• DERIVE_KEY_CONTEXT : blake3_impl.h
• DERIVE_KEY_MATERIAL : blake3_impl.h
• deriveAttrsInPostOrder() : FunctionAttrs.cpp
• DESC : MVETailPredication.cpp
• describeMOVrrLoadedValue() : X86InstrInfo.cpp
• describeORRLoadedValue() : AArch64InstrInfo.cpp
• deserializeSanitizerMetadata() : BitcodeReader.cpp
• despeculateCountZeros() : CodeGenPrepare.cpp
• destArrayCanBeWidened() : GlobalOpt.cpp
• detectExtMul() : X86ISelLowering.cpp
• detectPMADDUBSW() : X86ISelLowering.cpp
• detectPopcountIdiom() : LoopIdiomRecognize.cpp
• detectShiftUntilBitTestIdiom() : LoopIdiomRecognize.cpp
• detectShiftUntilLessThanIdiom() : LoopIdiomRecognize.cpp
• detectShiftUntilZeroIdiom() : LoopIdiomRecognize.cpp
• detectSSatPattern() : X86ISelLowering.cpp
• detectSSatSPattern() : DAGCombiner.cpp
• detectSSatUPattern() : DAGCombiner.cpp
• detectUSatPattern() : X86ISelLowering.cpp
• detectUSatUPattern() : DAGCombiner.cpp
• detectZextAbsDiff() : X86ISelLowering.cpp
• determineFPRegsToClear() : ARMExpandPseudoInsts.cpp
• determineGPRegsToClear() : ARMExpandPseudoInsts.cpp
• determineLastCalleeSave() : ARCFrameLowering.cpp
• determineLiveOperandBitsAddCarry() : DemandedBits.cpp
• determinePointerAccessAttrs() : FunctionAttrs.cpp
• determineSVEStackObjectOffsets() : AArch64FrameLowering.cpp
• determineVPlanVF() : LoopVectorize.cpp
• DevirtCheckMode : WholeProgramDevirt.cpp
• DF : Debugify.cpp
• dfMips16Helper : Mips16ISelLowering.cpp
• DFPRegDecoderTable : SparcDisassembler.cpp
• DFSig : Mips16HardFloat.cpp
• DI_FLAG_LARGEST_NEEDED : DebugInfoMetadata.h
• DI_SUB_SUPER : X86MCTargetDesc.cpp
• DiagHandler() : TextStub.cpp
• diagnoseInvalidFormatString() : AMDGPUPrintfRuntimeBinding.cpp
• diagnosePossiblyInvalidConstraint() : SelectionDAGBuilder.cpp
• diagonalize() : blake3_avx512.c, blake3_sse2.c, blake3_sse41.c
• DiffBinary : PrintPasses.cpp
• Direction : LoopInfo.cpp
• directlyImpliesPoison() : ValueTracking.cpp
• Disable : DwarfDebug.cpp
• Disable2AddrHack : ScheduleDAGRRList.cpp
• Disable_bswap : BPFSubtarget.cpp
• Disable_gotol : BPFSubtarget.cpp
• Disable_ldsx : BPFSubtarget.cpp
• Disable_movsx : BPFSubtarget.cpp
• DISABLE_PASS : TargetPassConfig.cpp
• Disable_sdiv_smod : BPFSubtarget.cpp
• Disable_StoreImm : BPFSubtarget.cpp
• DISABLE_UNMAP : rpmalloc.c
• DisableA15SDOptimization : ARMTargetMachine.cpp
• DisableAddiLoadHeuristic : PPCMachineScheduler.cpp
• DisableAdvancedPeeling : LoopPeel.cpp
• DisableAdvCopyOpt : PeepholeOptimizer.cpp
• DisableAll : LoopIdiomVectorize.cpp
• DisableAllLoopOptsOnLoop() : LoopConstrainer.cpp
• DisableAModeOpt : HexagonTargetMachine.cpp
• DisableArgsMinAlignment : HexagonISelLowering.cpp
• DisableAtExitBasedGlobalDtorLowering : TargetPassConfig.cpp
• DisableAutoPairedVecSt : PPCISelLowering.cpp, PPCRegisterInfo.cpp
• DisableAutoUpgradeDebugInfo : AutoUpgrade.cpp
• DisableBackwardSearch : MipsDelaySlotFiller.cpp
• DisableBinopExtractShuffle : VectorCombine.cpp
• DisableBitcodeVersionUpgrade : IRSymtab.cpp
• DisableBlockPlacement : TargetPassConfig.cpp
• DisableBPFavoidSpeculation : BPFAdjustOpt.cpp
• DisableBPFserializeICMP : BPFAdjustOpt.cpp
• DisableBranchFold : TargetPassConfig.cpp
• DisableBranchOpts : CodeGenPrepare.cpp
• DisableByteCmp : LoopIdiomVectorize.cpp
• DisableCFIFixup : TargetPassConfig.cpp
• DisableCGDataForMerging : GlobalMergeFunctions.cpp
• DisableCGP : TargetPassConfig.cpp
• DisableCheckNoReturn : StackProtector.cpp
• DisableCHR : ControlHeightReduction.cpp
• DisableCleanups : WinEHPrepare.cpp
• DisableClusteredLowOccupancy : GCNSchedStrategy.cpp
• DisableCmpOpt : PPCInstrInfo.cpp
• DisableColoring : StackColoring.cpp
• DisableComplexAddrModes : CodeGenPrepare.cpp
• DisableConstantHoisting : TargetPassConfig.cpp
• DisableCopyProp : TargetPassConfig.cpp
• DisableCostPerUse : RISCVRegisterInfo.cpp
• DisableCTRLoopAnal : PPCInstrInfo.cpp
• DisableCTRLoops : PPCTargetMachine.cpp
• DisableCvtToDSuffix : LoongArchOptWInstrs.cpp
• DisableDeallocRet : HexagonFrameLowering.cpp
• DisableDelaySlotFiller : MipsDelaySlotFiller.cpp, DelaySlotFiller.cpp
• DisableDeletePHIs : CodeGenPrepare.cpp
• DisableDelinearizationChecks : DependenceAnalysis.cpp
• DisableDemotion : WinEHPrepare.cpp
• DisableDFASched : ResourcePriorityQueue.cpp
• DisableDiamond : IfConversion.cpp
• DisableEarlyIfConversion : TargetPassConfig.cpp
• DisableEarlyTailDup : TargetPassConfig.cpp
• DisableEdgeSplitting : PHIElimination.cpp
• DisableExpandReductions : TargetPassConfig.cpp
• DisableExtLdPromotion : CodeGenPrepare.cpp
• DisableFixup : HexagonAsmBackend.cpp
• DisableForkedDiamond : IfConversion.cpp
• DisableForwardSearch : MipsDelaySlotFiller.cpp
• DisableFRMInsertOpt : RISCVInsertReadWriteCSR.cpp
• DisableGCOpts : CodeGenPrepare.cpp
• DisableGEPConstOperand : InlineCost.cpp
• DisableGlobalOutlining : MachineOutliner.cpp
• DisableHardwareLoops : HexagonTargetMachine.cpp
• DisableHazardRecognizer : TargetInstrInfo.cpp
• DisableHCP : HexagonTargetMachine.cpp
• DisableHexagonCFGOpt : HexagonTargetMachine.cpp
• DisableHexagonMask : HexagonTargetMachine.cpp
• DisableHexagonMISched : HexagonSubtarget.cpp
• DisableHexagonPeephole : HexagonPeephole.cpp
• DisableHoistingToHotterBlocks : MachineLICM.cpp
• DisableHSDR : HexagonTargetMachine.cpp
• DisableHVX : HexagonMCTargetDesc.cpp
• DisableI2pP2iOpt : Instructions.cpp
• DisableICP : IndirectCallPromotion.cpp
• DisableILPPref : PPCISelLowering.cpp
• DisableInnermostLoopAlign32 : PPCISelLowering.cpp
• DisableInstrFormPrep : PPCTargetMachine.cpp
• DisableInternalization : OpenMPOpt.cpp
• DisableLastRunTracking : LastRunTrackingAnalysis.cpp
• DisableLayoutFSProfileLoader : TargetPassConfig.cpp
• DisableLazyLoading : MetadataLoader.cpp
• DisableLeafProc : SparcFrameLowering.cpp
• DisableLFTR : IndVarSimplify.cpp
• DisableLIRPAll : LoopIdiomRecognize.cpp
• DisableLIRPMemcpy : LoopIdiomRecognize.cpp
• DisableLIRPMemset : LoopIdiomRecognize.cpp
• DisableLoadStoreVectorizer : NVPTXTargetMachine.cpp
• DisableLoadWidening : HexagonTargetMachine.cpp
• DisableLoopAlign : HexagonLoopAlign.cpp
• DisableLoopAlignment : SIISelLowering.cpp
• DisableLoopLevelHeuristics : SelectOptimize.cpp
• DisableLowOverheadLoops : ARMTargetTransformInfo.cpp
• DisableLSR : TargetPassConfig.cpp
• DisableMachineCSE : TargetPassConfig.cpp
• DisableMachineDCE : TargetPassConfig.cpp
• DisableMachineLICM : TargetPassConfig.cpp
• DisableMachineSink : TargetPassConfig.cpp
• DisableMemAluCombiner : LanaiMemAluCombiner.cpp
• DisableMemcpyIdiom : HexagonLoopIdiomRecognition.cpp
• DisableMemmoveIdiom : HexagonLoopIdiomRecognition.cpp
• DisableMemOPOPT : PGOMemOPSizeOpt.cpp
• DisableMergeICmps : TargetPassConfig.cpp
• DisableMIPeephole : BPFTargetMachine.cpp, PPCTargetMachine.cpp
• DisableMultiRegionPartialInline : PartialInlining.cpp
• DisableMultiVectorSpillFill : AArch64FrameLowering.cpp
• DisableNAPhysCopyOpt : PeepholeOptimizer.cpp
• DisableNewValueJumps : HexagonNewValueJump.cpp
• DisableNoFreeInference : FunctionAttrs.cpp
• DisableNoUnwindInference : FunctionAttrs.cpp
• DisableNVSchedule : HexagonInstrInfo.cpp
• DisableOmitDLS : ARMLowOverheadLoops.cpp
• DisableOpenMPOptBarrierElimination : OpenMPOpt.cpp
• DisableOpenMPOptDeglobalization : OpenMPOpt.cpp
• DisableOpenMPOptFolding : OpenMPOpt.cpp
• DisableOpenMPOptimizations : OpenMPOpt.cpp
• DisableOpenMPOptSPMDization : OpenMPOpt.cpp
• DisableOpenMPOptStateMachineRewrite : OpenMPOpt.cpp
• DisableOptExtTo64 : HexagonPeephole.cpp
• DisableOptSZExt : HexagonPeephole.cpp
• DisableP10StoreForward : PPCISelLowering.cpp
• DisablePacketizer : HexagonVLIWPacketizer.cpp
• DisableParallelDSP : ARMParallelDSP.cpp
• DisablePartialInlining : PartialInlining.cpp
• DisablePartialLibcallInlining : TargetPassConfig.cpp
• DisablePeephole : PeepholeOptimizer.cpp
• DisablePerfectShuffle : PPCISelLowering.cpp
• DisablePNotP : HexagonPeephole.cpp
• DisablePostRAMachineLICM : TargetPassConfig.cpp
• DisablePostRAMachineSink : TargetPassConfig.cpp
• DisablePostRASched : TargetPassConfig.cpp
• DisablePPCConstHoist : PPCTargetTransformInfo.cpp
• DisablePPCPreinc : PPCISelLowering.cpp
• DisablePPCUnaligned : PPCISelLowering.cpp
• DisablePreheaderProtect : CodeGenPrepare.cpp
• DisablePreInliner : PassBuilderPipelines.cpp
• DisablePromotion : TypePromotion.cpp, LICM.cpp
• DisableRAFSProfileLoader : TargetPassConfig.cpp
• DisableRegAllocHints : RISCVRegisterInfo.cpp
• DisableRegAllocNDDHints : X86RegisterInfo.cpp
• DisableReplaceWithVecLib : TargetPassConfig.cpp
• DisableRequireStructuredCFG : NVPTXTargetMachine.cpp
• DisableSampleLoaderInlining : SampleProfile.cpp
• DisableSchedCriticalPath : ScheduleDAGRRList.cpp
• DisableSchedCycles : ScheduleDAGRRList.cpp
• DisableSchedHeight : ScheduleDAGRRList.cpp
• DisableSchedLiveUses : ScheduleDAGRRList.cpp
• DisableSchedPhysRegJoin : ScheduleDAGRRList.cpp
• DisableSchedRegPressure : ScheduleDAGRRList.cpp
• DisableSchedStalls : ScheduleDAGRRList.cpp
• DisableSchedVRegCycle : ScheduleDAGRRList.cpp
• DisableSCO : PPCISelLowering.cpp
• DisableSelectOptimize : TargetPassConfig.cpp
• DisableSelectToBranch : CodeGenPrepare.cpp
• DisableSeparateConstOffsetFromGEP : SeparateConstOffsetFromGEP.cpp
• DisableSExtWRemoval : LoongArchOptWInstrs.cpp, RISCVOptWInstrs.cpp
• DisableSharing : StackSlotColoring.cpp
• DisableShifterOp : ARMISelDAGToDAG.cpp
• DisableShuffle : HexagonMCShuffler.cpp
• DisableSimple : IfConversion.cpp
• DisableSimpleF : IfConversion.cpp
• DisableSSC : TargetPassConfig.cpp
• DisableStoreExtract : CodeGenPrepare.cpp
• DisableStoreWidening : HexagonTargetMachine.cpp
• DisableStrictNodeMutation : TargetLoweringBase.cpp
• DisableStripWSuffix : RISCVOptWInstrs.cpp
• DisableSuccBBSearch : MipsDelaySlotFiller.cpp
• DisableSymbolicationFlag : Signals.cpp
• DisableSymbolizationEnv : Signals.cpp
• DisableTailDuplicate : TargetPassConfig.cpp
• DisableTailPredication : ARMLowOverheadLoops.cpp
• DisableThinLTOPropagation : FunctionAttrs.cpp
• DisableTriangle : IfConversion.cpp
• DisableTriangleF : IfConversion.cpp
• DisableTriangleR : IfConversion.cpp
• DisableUnclusterHighRP : GCNSchedStrategy.cpp
• DisableValueProfiling : PGOInstrumentation.cpp
• DisableVecDblNVStores : HexagonVLIWPacketizer.cpp
• DisableVectorCombine : VectorCombine.cpp
• DisableVectorMaskMutation : RISCVTargetMachine.cpp
• DisableVSXFMAMutate : PPCVSXFMAMutate.cpp
• DisableVSXSwapRemoval : PPCTargetMachine.cpp
• DisableWebAssemblyFallthroughReturnOpt : WebAssemblyPeephole.cpp
• DisableWholeProgramVisibility : WholeProgramDevirt.cpp
• DisableX86AvoidStoreForwardBlocks : X86AvoidStoreForwardingBlocks.cpp
• DisableX86DomainReassignment : X86DomainReassignment.cpp
• DisableX86LEAOpt : X86OptimizeLEAs.cpp
• DiscoverDependentGlobals() : NVPTXAsmPrinter.cpp
• discoverTypeIndices() : TypeIndexDiscovery.cpp
• DISP_FLAG_LARGEST_NEEDED : DebugInfoMetadata.h
• DispFormPrepMinThreshold : PPCLoopInstrFormPrep.cpp
• DistancePower : CodeLayout.cpp
• DistributeNonIfConvertible : LoopDistribute.cpp
• distributeOpThroughSelect() : AMDGPUISelLowering.cpp
• DistributeSCEVCheckThreshold : LoopDistribute.cpp
• divComputeLowBit() : KnownBits.cpp
• divideNearest() : SelectOptimize.cpp
• DivRemWorklistTy : DivRemPairs.cpp
• DL : ARMSLSHardening.cpp, X86PartialReduction.cpp
• DL_NAME : Delinearization.cpp
• DLL_ENVIRONMENT_VAR : jitprofiling.c
• DM : Debugify.cpp
• DMBLookaheadThreshold : AArch64TargetTransformInfo.cpp
• doCallSiteSplitting() : CallSiteSplitting.cpp
• DoComdatRenaming : PGOInstrumentation.cpp
• doDefKillClear() : MIRCanonicalizerPass.cpp
• doemit() : regcomp.c
• doesCalleeRestoreStack() : AArch64CallLowering.cpp
• doesContainLoop() : VPlanHCFGBuilder.cpp
• doesDispFit() : M68kISelDAGToDAG.cpp
• doesDispFitFI() : M68kISelDAGToDAG.cpp
• doesHistoryAllowICP() : SampleProfile.cpp
• doesIgnoreDataTypeSuffix() : ARMAsmParser.cpp
• doesInstructionSetFPSW() : X86FloatingPoint.cpp
• doesInTreeUserNeedToExtract() : SLPVectorizer.cpp
• doesModifyCalleeSavedReg() : HexagonVLIWPacketizer.cpp
• doesNotRequireEntrySafepointBefore() : PlaceSafepoints.cpp
• doesRoundUp() : ScaledNumber.cpp
• doesStoreDominatesAllLatches() : LoopLoadElimination.cpp
• doesVPHaveNoFunctionalEquivalent() : IntrinsicInst.cpp
• DoFlattenLoopPair() : LoopFlatten.cpp
• dofwd() : regcomp.c
• doHexLookAhead() : AsmLexer.cpp
• doImportingForModuleForTest() : FunctionImport.cpp
• DoInitialMatch() : LoopStrengthReduce.cpp
• doinsert() : regcomp.c
• doInsertBitcast() : SPIRVISelLowering.cpp
• doInstrumentAddress() : AddressSanitizer.cpp
• doList() : LibDriver.cpp
• DoLowering() : GCRootLowering.cpp
• Domain : CorrelatedValuePropagation.cpp
• DomConditionsMaxUses : ValueTracking.cpp
• domfrontier : DominanceFrontier.cpp, MachineDominanceFrontier.cpp
• dominates() : RegAllocFast.cpp, RISCVVectorPeephole.cpp, X86FastPreTileConfig.cpp
• dominatesAllUsesOf() : ARCOptAddrMode.cpp
• dominatesMergePoint() : SimplifyCFG.cpp
• domTreeLevelBefore() : CodeMoverUtils.cpp
• doNotCSE() : SelectionDAG.cpp
• DONT_GET_PLUGIN_LOADER_OPTION : PluginLoader.cpp
• DontExpandCondPseudos16 : Mips16ISelLowering.cpp
• dontUseFastISelFor() : SelectionDAGISel.cpp
• doPromotion() : ArgumentPromotion.cpp
• doSplitCoroutine() : CoroSplit.cpp
• DotBinary : StandardInstrumentations.cpp
• DotCfgDir : StandardInstrumentations.cpp
• DotCFGMSSA : MemorySSA.cpp
• DotFilePathPrefix : MemProfContextDisambiguation.cpp
• DotOnly : DDGPrinter.cpp
• DoubleLiteral : ItaniumDemangle.h
• DoubleRegs : SparcAsmParser.cpp
• DoubleTyID : Mips16HardFloat.cpp
• DPairDecoderTable : ARMDisassembler.cpp
• DPairSpacedDecoderTable : ARMDisassembler.cpp
• DPRDecoderTable : ARMDisassembler.cpp
• DRegList : AArch64CallingConvention.cpp, ARMCallingConv.cpp
• DRet : Mips16HardFloat.cpp
• DRIVERKIT_PREFIX_PATH : Utils.h
• DROP : regcomp.c
• dropDeadSymbols() : LTOBackend.cpp
• dropInitialDeref() : Local.cpp
• dropIntrinsicWithUnknownMetadataArgument() : LLParser.cpp
• DropNonTrivialImplicitNullChecks : SimpleLoopUnswitch.cpp
• DroppedVarStats : StandardInstrumentations.cpp
• dropRedundantMaskingOfLeftShiftInput() : InstCombineShifts.cpp
• dropRegDescribedVar() : DbgEntityHistoryCalculator.cpp
• DropScaledForVScale : LoopStrengthReduce.cpp
• dropTypeTests() : LowerTypeTests.cpp
• DSCRValue : PPCPreEmitPeephole.cpp
• DSig : Mips16HardFloat.cpp
• dsp : ARMParallelDSP.cpp
• DUMMY_FUNCTION_PASS : CodeGenPassBuilder.h
• DUMMY_MACHINE_FUNCTION_ANALYSIS : CodeGenPassBuilder.cpp
• DUMMY_MACHINE_FUNCTION_PASS : CodeGenPassBuilder.h
• DUMMY_MACHINE_MODULE_PASS : CodeGenPassBuilder.h
• DUMP_AFTER : ARCOptAddrMode.cpp
• DUMP_BEFORE : ARCOptAddrMode.cpp
• dump_intrs : MachineCombiner.cpp
• dump_registers() : HexagonFrameLowering.cpp
• dumpAddrSection() : DWARFContext.cpp
• dumpAllocas() : CoroFrame.cpp
• dumpApplePropertyAttribute() : DWARFDie.cpp
• dumpAttribute() : DWARFDie.cpp
• dumpBytes() : SystemZISelLowering.cpp
• DumpCCG : MemProfContextDisambiguation.cpp
• dumpConstraint() : ConstraintElimination.cpp
• dumpDataAux() : DWARFDebugFrame.cpp
• DumpDepGraph : Attributor.cpp
• dumpEdges() : GCOVProfiling.cpp
• dumpExampleDependence() : DependenceAnalysis.cpp
• dumpExpression() : DWARFDebugLoc.cpp
• dumpFunctionProfileJson() : SampleProfReader.cpp
• dumpImportListForModule() : FunctionImport.cpp
• dumpIR() : ControlHeightReduction.cpp
• dumpLocationExpr() : DWARFDie.cpp
• dumpLocationList() : DWARFDie.cpp
• dumpLoclistsSection() : DWARFContext.cpp
• dumpMachineInstrRangeWithSlotIndex() : InlineSpiller.cpp
• DumpNodes() : SelectionDAGDumper.cpp
• DumpNodesr() : SelectionDAGDumper.cpp
• dumpOrder() : SLPVectorizer.cpp
• dumpParentChain() : DWARFDie.cpp
• dumpPubTableSection() : DWARFContext.cpp
• dumpRanges() : DWARFDie.cpp
• DumpRegUsage : RegisterUsageInfo.cpp
• dumpRemats() : MaterializationUtils.cpp
• DumpReproducers : ConstraintElimination.cpp
• dumpResult() : GISelKnownBits.cpp
• dumpRnglistsSection() : DWARFContext.cpp
• dumpScopes() : ControlHeightReduction.cpp
• dumpSectionToFile() : ELFObjcopy.cpp, MachOObjcopy.cpp
• dumpSmallBitVector() : DependenceAnalysis.cpp
• dumpSpills() : CoroFrame.cpp
• dumpStringOffsetsSection() : DWARFContext.cpp
• dumpSUList() : ScheduleDAGInstrs.cpp
• DumpThinCGSCCs : LTO.cpp
• dumpUnpackedICmp() : ConstraintElimination.cpp
• dumpUUID() : DWARFContext.cpp
• dupl() : regcomp.c
• duplicateCPV() : ARMBaseInstrInfo.cpp
• Duplication : TailDuplication.cpp
• DuplicationThreshold : CallSiteSplitting.cpp
• DUPMAX : regcomp.c
• DWARF2_FLAG_BASIC_BLOCK : MCDwarf.h
• DWARF2_FLAG_EPILOGUE_BEGIN : MCDwarf.h
• DWARF2_FLAG_IS_STMT : MCDwarf.h
• DWARF2_FLAG_PROLOGUE_END : MCDwarf.h
• DWARF2_LINE_DEFAULT_IS_STMT : MCDwarf.h
• DWARF5FormClasses : DWARFFormValue.cpp
• DWARF_CFI_PRIMARY_OPCODE_MASK : DWARFDebugFrame.cpp
• DWARF_CFI_PRIMARY_OPERAND_MASK : DWARFDebugFrame.cpp
• dwarfCCToCodeView() : CodeViewDebug.cpp
• DWARFErrorHandler() : DylibReader.cpp
• DwarfExtendedLoc : MCAsmInfo.cpp
• DwarfInlinedStrings : DwarfDebug.cpp
• DWARFLineTable : DWARFContext.cpp
• DwarfLinkageNames : DwarfDebug.cpp
• DwarfOpConvert : DwarfDebug.cpp
• DwarfSectionsAsReferences : DwarfDebug.cpp
• DWKEYWORD : LLLexer.cpp
• DWORD_ALIGN : AMDGPUPrintfRuntimeBinding.cpp
• DWSecNames : ELFLinkGraphBuilder.cpp
• DXIL_MODULE_FLAG : DXILShaderFlags.cpp, DXILShaderFlags.h
• DXIL_OP_FUNCTION_TYPE : DXILOpBuilder.cpp
• DXIL_OP_INTRINSIC : DXILOpLowering.cpp
• DXIL_OP_INTRINSIC_ARG_SELECT_TYPE : DXILOpLowering.cpp
• DXIL_OP_OPERATION_TABLE : DXILOpBuilder.cpp
• DXIL_OP_PARAM_TYPE : DXILConstants.h
• DXIL_OPCLASS : DXILConstants.h
• DXIL_OPCODE : DXILConstants.h
• DXILOpNamePrefix : DXILOpBuilder.cpp
• DYNAMIC_STRINGIFY_ENUM : ELF.cpp
• DYNAMIC_TAG : ELF.h, ELF.cpp, ELFYAML.cpp
• DYNAMIC_TAG_MARKER : ELF.cpp, ELFYAML.cpp
• DynCastToDbgDeclare() : AssignmentTrackingAnalysis.cpp
• llvm::DomTreeBuilder::ApplyUpdates< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::ApplyUpdates< DomTreeBuilder::BBPostDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::Calculate< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::Calculate< DomTreeBuilder::BBPostDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::CalculateWithUpdates< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::DeleteEdge< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::DeleteEdge< DomTreeBuilder::BBPostDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::InsertEdge< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::InsertEdge< DomTreeBuilder::BBPostDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::Verify< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::Verify< DomTreeBuilder::BBPostDomTree >() : Dominators.cpp