LLVM 20.0.0git
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#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/VirtRegMap.h"
#include "llvm/CodeGenTypes/MachineValueType.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/Function.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Printable.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <utility>
Go to the source code of this file.
Namespaces | |
namespace | llvm |
This is an optimization pass for GlobalISel generic memory operations. | |
Macros | |
#define | DEBUG_TYPE "target-reg-info" |
Functions | |
Printable | llvm::printReg (Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr) |
Prints virtual and physical registers with or without a TRI instance. | |
Printable | llvm::printRegUnit (unsigned Unit, const TargetRegisterInfo *TRI) |
Create Printable object to print register units on a raw_ostream. | |
Printable | llvm::printVRegOrUnit (unsigned VRegOrUnit, const TargetRegisterInfo *TRI) |
Create Printable object to print virtual registers and physical registers on a raw_ostream. | |
Printable | llvm::printRegClassOrBank (Register Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI) |
Create Printable object to print register classes or register banks on a raw_ostream. | |
static void | getAllocatableSetForRC (const MachineFunction &MF, const TargetRegisterClass *RC, BitVector &R) |
getAllocatableSetForRC - Toggle the bits that represent allocatable registers for the specific register class. | |
static const TargetRegisterClass * | firstCommonClass (const uint32_t *A, const uint32_t *B, const TargetRegisterInfo *TRI) |
static bool | shareSameRegisterFile (const TargetRegisterInfo &TRI, const TargetRegisterClass *DefRC, unsigned DefSubReg, const TargetRegisterClass *SrcRC, unsigned SrcSubReg) |
Check if the registers defined by the pair (RegisterClass, SubReg) share the same register file. | |
Variables | |
static cl::opt< unsigned > | HugeSizeForSplit ("huge-size-for-split", cl::Hidden, cl::desc("A threshold of live range size which may cause " "high compile time cost in global splitting."), cl::init(5000)) |
#define DEBUG_TYPE "target-reg-info" |
Definition at line 43 of file TargetRegisterInfo.cpp.
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inlinestatic |
Definition at line 276 of file TargetRegisterInfo.cpp.
References A, B, llvm::countr_zero(), I, and TRI.
Referenced by llvm::TargetRegisterInfo::getCommonSubClass(), llvm::TargetRegisterInfo::getCommonSuperRegClass(), and llvm::TargetRegisterInfo::getMatchingSuperRegClass().
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getAllocatableSetForRC - Toggle the bits that represent allocatable registers for the specific register class.
Definition at line 245 of file TargetRegisterInfo.cpp.
References assert(), llvm::TargetRegisterClass::getRawAllocationOrder(), and llvm::TargetRegisterClass::isAllocatable().
Referenced by llvm::TargetRegisterInfo::getAllocatableSet().
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static |
Check if the registers defined by the pair (RegisterClass, SubReg) share the same register file.
Definition at line 379 of file TargetRegisterInfo.cpp.
References std::swap(), and TRI.
Referenced by llvm::TargetRegisterInfo::shouldRewriteCopySrc().
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Referenced by llvm::TargetRegisterInfo::shouldRegionSplitForVirtReg().