llvm::MachineRegisterInfo Class Reference

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc. More...

#include "llvm/CodeGen/MachineRegisterInfo.h"

Classes
class	defusechain_instr_iterator
	defusechain_iterator - This class provides iterator support for machine operands in the function that use or define a specific register. More...
class	defusechain_iterator
	reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register within the MachineFunction that corresponds to this MachineRegisterInfo object. More...
class	Delegate
struct	VRegAttrs
	All attributes(register class or bank and low-level type) a virtual register can have. More...

Public Types
using	reg_iterator = defusechain_iterator< true, true, false, true, false, false >
	reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.
using	reg_instr_iterator = defusechain_instr_iterator< true, true, false, false, true, false >
	reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr.
using	reg_bundle_iterator = defusechain_instr_iterator< true, true, false, false, false, true >
	reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle.
using	reg_nodbg_iterator = defusechain_iterator< true, true, true, true, false, false >
	reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.
using	reg_instr_nodbg_iterator = defusechain_instr_iterator< true, true, true, false, true, false >
	reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.
using	reg_bundle_nodbg_iterator = defusechain_instr_iterator< true, true, true, false, false, true >
	reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug.
using	def_iterator = defusechain_iterator< false, true, false, true, false, false >
	def_iterator/def_begin/def_end - Walk all defs of the specified register.
using	def_instr_iterator = defusechain_instr_iterator< false, true, false, false, true, false >
	def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst.
using	def_bundle_iterator = defusechain_instr_iterator< false, true, false, false, false, true >
	def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle.
using	use_iterator = defusechain_iterator< true, false, false, true, false, false >
	use_iterator/use_begin/use_end - Walk all uses of the specified register.
using	use_instr_iterator = defusechain_instr_iterator< true, false, false, false, true, false >
	use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr.
using	use_bundle_iterator = defusechain_instr_iterator< true, false, false, false, false, true >
	use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle.
using	use_nodbg_iterator = defusechain_iterator< true, false, true, true, false, false >
	use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.
using	use_instr_nodbg_iterator = defusechain_instr_iterator< true, false, true, false, true, false >
	use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.
using	use_bundle_nodbg_iterator = defusechain_instr_iterator< true, false, true, false, false, true >
	use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug.
using	livein_iterator = std::vector< std::pair< MCRegister, Register > >::const_iterator

Public Member Functions
	MachineRegisterInfo (MachineFunction *MF)
	MachineRegisterInfo (const MachineRegisterInfo &)=delete
MachineRegisterInfo &	operator= (const MachineRegisterInfo &)=delete
const TargetRegisterInfo *	getTargetRegisterInfo () const
void	resetDelegate (Delegate *delegate)
void	addDelegate (Delegate *delegate)
void	noteNewVirtualRegister (Register Reg)
void	noteCloneVirtualRegister (Register NewReg, Register SrcReg)
bool	isSSA () const
void	leaveSSA ()
bool	tracksLiveness () const
	tracksLiveness - Returns true when tracking register liveness accurately.
void	invalidateLiveness ()
	invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.
bool	shouldTrackSubRegLiveness (const TargetRegisterClass &RC) const
	Returns true if liveness for register class RC should be tracked at the subregister level.
bool	shouldTrackSubRegLiveness (Register VReg) const
bool	subRegLivenessEnabled () const
bool	isUpdatedCSRsInitialized () const
	Returns true if the updated CSR list was initialized and false otherwise.
void	disableCalleeSavedRegister (MCRegister Reg)
	Disables the register from the list of CSRs.
const MCPhysReg *	getCalleeSavedRegs () const
	Returns list of callee saved registers.
void	setCalleeSavedRegs (ArrayRef< MCPhysReg > CSRs)
	Sets the updated Callee Saved Registers list.
void	addRegOperandToUseList (MachineOperand *MO)
	Add MO to the linked list of operands for its register.
void	removeRegOperandFromUseList (MachineOperand *MO)
	Remove MO from its use-def list.
void	moveOperands (MachineOperand *Dst, MachineOperand *Src, unsigned NumOps)
	Move NumOps operands from Src to Dst, updating use-def lists as needed.
void	verifyUseList (Register Reg) const
	Verify the sanity of the use list for Reg.
void	verifyUseLists () const
	Verify the use list of all registers.
reg_iterator	reg_begin (Register RegNo) const
iterator_range< reg_iterator >	reg_operands (Register Reg) const
reg_instr_iterator	reg_instr_begin (Register RegNo) const
iterator_range< reg_instr_iterator >	reg_instructions (Register Reg) const
reg_bundle_iterator	reg_bundle_begin (Register RegNo) const
iterator_range< reg_bundle_iterator >	reg_bundles (Register Reg) const
bool	reg_empty (Register RegNo) const
	reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).
reg_nodbg_iterator	reg_nodbg_begin (Register RegNo) const
iterator_range< reg_nodbg_iterator >	reg_nodbg_operands (Register Reg) const
reg_instr_nodbg_iterator	reg_instr_nodbg_begin (Register RegNo) const
iterator_range< reg_instr_nodbg_iterator >	reg_nodbg_instructions (Register Reg) const
reg_bundle_nodbg_iterator	reg_bundle_nodbg_begin (Register RegNo) const
iterator_range< reg_bundle_nodbg_iterator >	reg_nodbg_bundles (Register Reg) const
bool	reg_nodbg_empty (Register RegNo) const
	reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.
def_iterator	def_begin (Register RegNo) const
iterator_range< def_iterator >	def_operands (Register Reg) const
def_instr_iterator	def_instr_begin (Register RegNo) const
iterator_range< def_instr_iterator >	def_instructions (Register Reg) const
def_bundle_iterator	def_bundle_begin (Register RegNo) const
iterator_range< def_bundle_iterator >	def_bundles (Register Reg) const
bool	def_empty (Register RegNo) const
	def_empty - Return true if there are no instructions defining the specified register (it may be live-in).
StringRef	getVRegName (Register Reg) const
void	insertVRegByName (StringRef Name, Register Reg)
bool	hasOneDef (Register RegNo) const
	Return true if there is exactly one operand defining the specified register.
MachineOperand *	getOneDef (Register Reg) const
	Returns the defining operand if there is exactly one operand defining the specified register, otherwise nullptr.
use_iterator	use_begin (Register RegNo) const
iterator_range< use_iterator >	use_operands (Register Reg) const
use_instr_iterator	use_instr_begin (Register RegNo) const
iterator_range< use_instr_iterator >	use_instructions (Register Reg) const
use_bundle_iterator	use_bundle_begin (Register RegNo) const
iterator_range< use_bundle_iterator >	use_bundles (Register Reg) const
bool	use_empty (Register RegNo) const
	use_empty - Return true if there are no instructions using the specified register.
bool	hasOneUse (Register RegNo) const
	hasOneUse - Return true if there is exactly one instruction using the specified register.
use_nodbg_iterator	use_nodbg_begin (Register RegNo) const
iterator_range< use_nodbg_iterator >	use_nodbg_operands (Register Reg) const
use_instr_nodbg_iterator	use_instr_nodbg_begin (Register RegNo) const
iterator_range< use_instr_nodbg_iterator >	use_nodbg_instructions (Register Reg) const
use_bundle_nodbg_iterator	use_bundle_nodbg_begin (Register RegNo) const
iterator_range< use_bundle_nodbg_iterator >	use_nodbg_bundles (Register Reg) const
bool	use_nodbg_empty (Register RegNo) const
	use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register.
bool	hasOneNonDBGUse (Register RegNo) const
	hasOneNonDBGUse - Return true if there is exactly one non-Debug use of the specified register.
bool	hasOneNonDBGUser (Register RegNo) const
	hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register.
bool	hasAtMostUserInstrs (Register Reg, unsigned MaxUsers) const
	hasAtMostUses - Return true if the given register has at most MaxUsers non-debug user instructions.
void	replaceRegWith (Register FromReg, Register ToReg)
	replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.
MachineInstr *	getVRegDef (Register Reg) const
	getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found.
MachineInstr *	getUniqueVRegDef (Register Reg) const
	getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found.
void	clearKillFlags (Register Reg) const
	clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand.
void	dumpUses (Register RegNo) const
bool	isConstantPhysReg (MCRegister PhysReg) const
	Returns true if PhysReg is unallocatable and constant throughout the function.
PSetIterator	getPressureSets (Register RegUnit) const
	Get an iterator over the pressure sets affected by the given physical or virtual register.
const TargetRegisterClass *	getRegClass (Register Reg) const
	Return the register class of the specified virtual register.
const TargetRegisterClass *	getRegClassOrNull (Register Reg) const
	Return the register class of Reg, or null if Reg has not been assigned a register class yet.
const RegisterBank *	getRegBankOrNull (Register Reg) const
	Return the register bank of Reg, or null if Reg has not been assigned a register bank or has been assigned a register class.
const RegClassOrRegBank &	getRegClassOrRegBank (Register Reg) const
	Return the register bank or register class of Reg.
void	setRegClass (Register Reg, const TargetRegisterClass *RC)
	setRegClass - Set the register class of the specified virtual register.
void	setRegBank (Register Reg, const RegisterBank &RegBank)
	Set the register bank to RegBank for Reg.
void	setRegClassOrRegBank (Register Reg, const RegClassOrRegBank &RCOrRB)
const TargetRegisterClass *	constrainRegClass (Register Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
	constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers.
bool	constrainRegAttrs (Register Reg, Register ConstrainingReg, unsigned MinNumRegs=0)
	Constrain the register class or the register bank of the virtual register Reg (and low-level type) to be a common subclass or a common bank of both registers provided respectively (and a common low-level type).
bool	recomputeRegClass (Register Reg)
	recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg.
Register	createVirtualRegister (const TargetRegisterClass *RegClass, StringRef Name="")
	createVirtualRegister - Create and return a new virtual register in the function with the specified register class.
VRegAttrs	getVRegAttrs (Register Reg)
	Returns register class or bank and low level type of Reg.
Register	createVirtualRegister (VRegAttrs RegAttr, StringRef Name="")
	Create and return a new virtual register in the function with the specified register attributes(register class or bank and low level type).
Register	cloneVirtualRegister (Register VReg, StringRef Name="")
	Create and return a new virtual register in the function with the same attributes as the given register.
LLT	getType (Register Reg) const
	Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register.
void	setType (Register VReg, LLT Ty)
	Set the low-level type of VReg to Ty.
Register	createGenericVirtualRegister (LLT Ty, StringRef Name="")
	Create and return a new generic virtual register with low-level type Ty.
void	clearVirtRegTypes ()
	Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers).
Register	createIncompleteVirtualRegister (StringRef Name="")
	Creates a new virtual register that has no register class, register bank or size assigned yet.
unsigned	getNumVirtRegs () const
	getNumVirtRegs - Return the number of virtual registers created.
void	clearVirtRegs ()
	clearVirtRegs - Remove all virtual registers (after physreg assignment).
void	setRegAllocationHint (Register VReg, unsigned Type, Register PrefReg)
	setRegAllocationHint - Specify a register allocation hint for the specified virtual register.
void	addRegAllocationHint (Register VReg, Register PrefReg)
	addRegAllocationHint - Add a register allocation hint to the hints vector for VReg.
void	setSimpleHint (Register VReg, Register PrefReg)
	Specify the preferred (target independent) register allocation hint for the specified virtual register.
void	clearSimpleHint (Register VReg)
std::pair< unsigned, Register >	getRegAllocationHint (Register VReg) const
	getRegAllocationHint - Return the register allocation hint for the specified virtual register.
Register	getSimpleHint (Register VReg) const
	getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint.
const std::pair< unsigned, SmallVector< Register, 4 > > *	getRegAllocationHints (Register VReg) const
	getRegAllocationHints - Return a reference to the vector of all register allocation hints for VReg.
void	markUsesInDebugValueAsUndef (Register Reg) const
	markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis.
void	updateDbgUsersToReg (MCRegister OldReg, MCRegister NewReg, ArrayRef< MachineInstr * > Users) const
	updateDbgUsersToReg - Update a collection of debug instructions to refer to the designated register.
bool	isPhysRegModified (MCRegister PhysReg, bool SkipNoReturnDef=false) const
	Return true if the specified register is modified in this function.
bool	isPhysRegUsed (MCRegister PhysReg, bool SkipRegMaskTest=false) const
	Return true if the specified register is modified or read in this function.
void	addPhysRegsUsedFromRegMask (const uint32_t *RegMask)
	addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.
const BitVector &	getUsedPhysRegsMask () const
void	freezeReservedRegs ()
	freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins.
void	reserveReg (MCRegister PhysReg, const TargetRegisterInfo *TRI)
	reserveReg – Mark a register as reserved so checks like isAllocatable will not suggest using it.
bool	reservedRegsFrozen () const
	reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.
bool	canReserveReg (MCRegister PhysReg) const
	canReserveReg - Returns true if PhysReg can be used as a reserved register.
const BitVector &	getReservedRegs () const
	getReservedRegs - Returns a reference to the frozen set of reserved registers.
bool	isReserved (MCRegister PhysReg) const
	isReserved - Returns true when PhysReg is a reserved register.
bool	isReservedRegUnit (unsigned Unit) const
	Returns true when the given register unit is considered reserved.
bool	isAllocatable (MCRegister PhysReg) const
	isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved.
void	addLiveIn (MCRegister Reg, Register vreg=Register())
	addLiveIn - Add the specified register as a live-in.
livein_iterator	livein_begin () const
livein_iterator	livein_end () const
bool	livein_empty () const
ArrayRef< std::pair< MCRegister, Register > >	liveins () const
bool	isLiveIn (Register Reg) const
MCRegister	getLiveInPhysReg (Register VReg) const
	getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.
Register	getLiveInVirtReg (MCRegister PReg) const
	getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in virtual register.
void	EmitLiveInCopies (MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII)
	EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.
LaneBitmask	getMaxLaneMaskForVReg (Register Reg) const
	Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg.

Static Public Member Functions
static reg_iterator	reg_end ()
static reg_instr_iterator	reg_instr_end ()
static reg_bundle_iterator	reg_bundle_end ()
static reg_nodbg_iterator	reg_nodbg_end ()
static reg_instr_nodbg_iterator	reg_instr_nodbg_end ()
static reg_bundle_nodbg_iterator	reg_bundle_nodbg_end ()
static def_iterator	def_end ()
static def_instr_iterator	def_instr_end ()
static def_bundle_iterator	def_bundle_end ()
static use_iterator	use_end ()
static use_instr_iterator	use_instr_end ()
static use_bundle_iterator	use_bundle_end ()
static use_nodbg_iterator	use_nodbg_end ()
static use_instr_nodbg_iterator	use_instr_nodbg_end ()
static use_bundle_nodbg_iterator	use_bundle_nodbg_end ()

Friends
template<bool , bool , bool , bool , bool , bool >
class	defusechain_iterator
template<bool , bool , bool , bool , bool , bool >
class	defusechain_instr_iterator

Detailed Description

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.

Definition at line 51 of file MachineRegisterInfo.h.

Member Typedef Documentation

def_bundle_iterator

using llvm::MachineRegisterInfo::def_bundle_iterator = defusechain_instr_iterator<false, true, false, false, false, true>

def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle.

Definition at line 425 of file MachineRegisterInfo.h.

def_instr_iterator

using llvm::MachineRegisterInfo::def_instr_iterator = defusechain_instr_iterator<false, true, false, false, true, false>

def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst.

Definition at line 409 of file MachineRegisterInfo.h.

def_iterator

using llvm::MachineRegisterInfo::def_iterator = defusechain_iterator<false, true, false, true, false, false>

def_iterator/def_begin/def_end - Walk all defs of the specified register.

Definition at line 396 of file MachineRegisterInfo.h.

livein_iterator

using llvm::MachineRegisterInfo::livein_iterator = std::vector<std::pair<MCRegister,Register> >::const_iterator

Definition at line 1004 of file MachineRegisterInfo.h.

reg_bundle_iterator

using llvm::MachineRegisterInfo::reg_bundle_iterator = defusechain_instr_iterator<true, true, false, false, false, true>

reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle.

Definition at line 322 of file MachineRegisterInfo.h.

reg_bundle_nodbg_iterator

using llvm::MachineRegisterInfo::reg_bundle_nodbg_iterator = defusechain_instr_iterator<true, true, true, false, false, true>

reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug.

Definition at line 375 of file MachineRegisterInfo.h.

reg_instr_iterator

using llvm::MachineRegisterInfo::reg_instr_iterator = defusechain_instr_iterator<true, true, false, false, true, false>

reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr.

Definition at line 306 of file MachineRegisterInfo.h.

reg_instr_nodbg_iterator

using llvm::MachineRegisterInfo::reg_instr_nodbg_iterator = defusechain_instr_iterator<true, true, true, false, true, false>

reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.

Definition at line 358 of file MachineRegisterInfo.h.

reg_iterator

using llvm::MachineRegisterInfo::reg_iterator = defusechain_iterator<true, true, false, true, false, false>

reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.

Definition at line 293 of file MachineRegisterInfo.h.

reg_nodbg_iterator

using llvm::MachineRegisterInfo::reg_nodbg_iterator = defusechain_iterator<true, true, true, true, false, false>

reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.

Definition at line 341 of file MachineRegisterInfo.h.

use_bundle_iterator

using llvm::MachineRegisterInfo::use_bundle_iterator = defusechain_instr_iterator<true, false, false, false, false, true>

use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle.

Definition at line 505 of file MachineRegisterInfo.h.

use_bundle_nodbg_iterator

using llvm::MachineRegisterInfo::use_bundle_nodbg_iterator = defusechain_instr_iterator<true, false, true, false, false, true>

use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug.

Definition at line 564 of file MachineRegisterInfo.h.

use_instr_iterator

using llvm::MachineRegisterInfo::use_instr_iterator = defusechain_instr_iterator<true, false, false, false, true, false>

use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr.

Definition at line 489 of file MachineRegisterInfo.h.

use_instr_nodbg_iterator

using llvm::MachineRegisterInfo::use_instr_nodbg_iterator = defusechain_instr_iterator<true, false, true, false, true, false>

use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.

Definition at line 547 of file MachineRegisterInfo.h.

use_iterator

using llvm::MachineRegisterInfo::use_iterator = defusechain_iterator<true, false, false, true, false, false>

use_iterator/use_begin/use_end - Walk all uses of the specified register.

Definition at line 476 of file MachineRegisterInfo.h.

use_nodbg_iterator

using llvm::MachineRegisterInfo::use_nodbg_iterator = defusechain_iterator<true, false, true, true, false, false>

use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.

Definition at line 530 of file MachineRegisterInfo.h.

Constructor & Destructor Documentation

MachineRegisterInfo() [1/2]

MachineRegisterInfo::MachineRegisterInfo ( MachineFunction *  MF )

explicit

Definition at line 43 of file MachineRegisterInfo.cpp.

References llvm::MCRegisterInfo::getNumRegs(), getTargetRegisterInfo(), and llvm::BitVector::resize().

MachineRegisterInfo() [2/2]

llvm::MachineRegisterInfo::MachineRegisterInfo ( const MachineRegisterInfo &  )

delete

Member Function Documentation

addDelegate()

void llvm::MachineRegisterInfo::addDelegate ( Delegate *  delegate )

inline

Definition at line 169 of file MachineRegisterInfo.h.

References assert(), llvm::SmallPtrSetImpl< PtrType >::count(), and llvm::SmallPtrSetImpl< PtrType >::insert().

Referenced by llvm::GCNTargetMachine::registerMachineRegisterInfoCallback().

addLiveIn()

void llvm::MachineRegisterInfo::addLiveIn ( MCRegister  Reg, Register  vreg = Register()  )

inline

addLiveIn - Add the specified register as a live-in.

Note that it is an error to add the same register to the same set more than once.

Definition at line 998 of file MachineRegisterInfo.h.

References Reg.

Referenced by addLiveIn(), buildGitPtr(), llvm::MipsFunctionInfo::initGlobalBaseReg(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), and llvm::MIRParserImpl::parseRegisterInfo().

addPhysRegsUsedFromRegMask()

void llvm::MachineRegisterInfo::addPhysRegsUsedFromRegMask ( const uint32_t *  RegMask )

inline

addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.

This corresponds to the bit mask attached to register mask operands.

Definition at line 908 of file MachineRegisterInfo.h.

addRegAllocationHint()

void llvm::MachineRegisterInfo::addRegAllocationHint ( Register  VReg, Register  PrefReg  )

inline

addRegAllocationHint - Add a register allocation hint to the hints vector for VReg.

Definition at line 812 of file MachineRegisterInfo.h.

References assert(), getNumVirtRegs(), llvm::IndexedMap< T, ToIndexT >::grow(), llvm::Register::index2VirtReg(), and llvm::Register::isVirtual().

addRegOperandToUseList()

void MachineRegisterInfo::addRegOperandToUseList

(

MachineOperand *

MO

)

Add MO to the linked list of operands for its register.

Definition at line 274 of file MachineRegisterInfo.cpp.

References assert(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), and llvm::Last.

Referenced by llvm::MachineOperand::ChangeToRegister().

canReserveReg()

bool llvm::MachineRegisterInfo::canReserveReg ( MCRegister  PhysReg ) const

inline

canReserveReg - Returns true if PhysReg can be used as a reserved register.

Any register can be reserved before freezeReservedRegs() is called.

Definition at line 951 of file MachineRegisterInfo.h.

References reservedRegsFrozen().

Referenced by llvm::MipsRegisterInfo::canRealignStack().

clearKillFlags()

void MachineRegisterInfo::clearKillFlags

(

Register

Reg

)

const

clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand.

This function is used by optimization passes which extend register lifetimes and need only preserve conservative kill flag information.

Definition at line 444 of file MachineRegisterInfo.cpp.

References use_operands().

clearSimpleHint()

void llvm::MachineRegisterInfo::clearSimpleHint ( Register  VReg )

inline

Definition at line 824 of file MachineRegisterInfo.h.

References assert(), llvm::IndexedMap< T, ToIndexT >::clear(), and llvm::IndexedMap< T, ToIndexT >::inBounds().

clearVirtRegs()

void MachineRegisterInfo::clearVirtRegs

(

)

clearVirtRegs - Remove all virtual registers (after physreg assignment).

Definition at line 207 of file MachineRegisterInfo.cpp.

References llvm::errs(), getNumVirtRegs(), getTargetRegisterInfo(), I, llvm::Register::index2VirtReg(), MI, llvm::printReg(), reg_instructions(), and verifyUseList().

clearVirtRegTypes()

void MachineRegisterInfo::clearVirtRegTypes

(

)

Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers).

Definition at line 204 of file MachineRegisterInfo.cpp.

References llvm::IndexedMap< T, ToIndexT >::clear().

cloneVirtualRegister()

Register MachineRegisterInfo::cloneVirtualRegister	(	Register	VReg,
		StringRef	Name = ""
	)

Create and return a new virtual register in the function with the same attributes as the given register.

Definition at line 179 of file MachineRegisterInfo.cpp.

References createIncompleteVirtualRegister(), getType(), Name, noteCloneVirtualRegister(), and setType().

Referenced by llvm::CombinerHelper::applyCombineConcatVectors(), llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineShuffleVector(), llvm::LiveRangeEdit::createFrom(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), and llvm::CombinerHelper::matchLoadOrCombine().

constrainRegAttrs()

bool MachineRegisterInfo::constrainRegAttrs	(	Register	Reg,
		Register	ConstrainingReg,
		unsigned	MinNumRegs = 0
	)

Constrain the register class or the register bank of the virtual register Reg (and low-level type) to be a common subclass or a common bank of both registers provided respectively (and a common low-level type).

Do nothing if any of the attributes (classes, banks, or low-level types) of the registers are deemed incompatible, or if the resulting register will have a class smaller than before and of size less than MinNumRegs. Return true if such register attributes exist, false otherwise.

Note

Use this method instead of constrainRegClass and RegisterBankInfo::constrainGenericRegister everywhere but SelectionDAG ISel / FastISel and GlobalISel's InstructionSelect pass respectively.

Definition at line 92 of file MachineRegisterInfo.cpp.

References constrainRegClass(), getRegClassOrRegBank(), getType(), llvm::LLT::isValid(), setRegClassOrRegBank(), and setType().

Referenced by llvm::CombinerHelper::replaceRegWith().

constrainRegClass()

const TargetRegisterClass * MachineRegisterInfo::constrainRegClass	(	Register	Reg,
		const TargetRegisterClass *	RC,
		unsigned	MinNumRegs = 0
	)

constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers.

Return the new register class, or NULL if no such class exists. This should only be used when the constraint is known to be trivial, like GR32 -> GR32_NOSP. Beware of increasing register pressure.

Note

Assumes that the register has a register class assigned. Use RegisterBankInfo::constrainGenericRegister in GlobalISel's InstructionSelect pass and constrainRegAttrs in every other pass, including non-select passes of GlobalISel, instead.

Definition at line 84 of file MachineRegisterInfo.cpp.

References getRegClass().

Referenced by llvm::X86InstrInfo::classifyLEAReg(), llvm::FastISel::constrainOperandRegClass(), constrainRegAttrs(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::MachineSSAUpdater::RewriteUse(), llvm::AArch64InstrInfo::storeRegToStackSlot(), and llvm::TailDuplicator::tailDuplicateAndUpdate().

createGenericVirtualRegister()

Register MachineRegisterInfo::createGenericVirtualRegister	(	LLT	Ty,
		StringRef	Name = ""
	)

Create and return a new generic virtual register with low-level type Ty.

Definition at line 194 of file MachineRegisterInfo.cpp.

References createIncompleteVirtualRegister(), Name, noteNewVirtualRegister(), and setType().

Referenced by llvm::AMDGPUCombinerHelper::applyFoldableFneg(), llvm::LegalizerHelper::bitcastDst(), llvm::buildBoolRegister(), llvm::MachineIRBuilder::buildMaskLowPtrBits(), llvm::LegalizerHelper::fewerElementsVectorPhi(), llvm::generateImageSizeQueryInst(), llvm::SPIRVGlobalRegistry::getOrCreateConstNullPtr(), llvm::SPIRVGlobalRegistry::getOrCreateUndef(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lower(), llvm::MipsCallLowering::lowerCall(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerMergeValues(), llvm::CombinerHelper::matchCombineFAddFMAFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFpExtFNegFMulToFMadOrFMA(), llvm::CombinerHelper::matchHoistLogicOpWithSameOpcodeHands(), llvm::MachineIRBuilder::materializePtrAdd(), llvm::LegalizerHelper::moreElementsVectorDst(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarAddSub(), llvm::LegalizerHelper::narrowScalarDst(), llvm::LegalizerHelper::narrowScalarExtract(), llvm::LegalizerHelper::narrowScalarInsert(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), llvm::LegalizerHelper::reduceLoadStoreWidth(), llvm::LegalizerHelper::widenScalar(), and llvm::LegalizerHelper::widenScalarDst().

createIncompleteVirtualRegister()

Register MachineRegisterInfo::createIncompleteVirtualRegister

(

StringRef

Name = ""

)

Creates a new virtual register that has no register class, register bank or size assigned yet.

This is only allowed to be used temporarily while constructing machine instructions. Most operations are undefined on an incomplete register until one of setRegClass(), setRegBank() or setSize() has been called on it.

Definition at line 146 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), llvm::Register::index2VirtReg(), insertVRegByName(), and Name.

Referenced by cloneVirtualRegister(), createGenericVirtualRegister(), createVirtualRegister(), and llvm::PerFunctionMIParsingState::getVRegInfoNamed().

createVirtualRegister() [1/2]

Register MachineRegisterInfo::createVirtualRegister	(	const TargetRegisterClass *	RegClass,
		StringRef	Name = ""
	)

createVirtualRegister - Create and return a new virtual register in the function with the specified register class.

Definition at line 157 of file MachineRegisterInfo.cpp.

References assert(), createIncompleteVirtualRegister(), llvm::TargetRegisterClass::isAllocatable(), Name, and noteNewVirtualRegister().

Referenced by addLiveIn(), llvm::XtensaInstrInfo::adjustStackPtr(), llvm::buildBuiltinVariableLoad(), llvm::SPIRVGlobalRegistry::buildConstantSampler(), llvm::X86InstrInfo::classifyLEAReg(), llvm::SwiftErrorValueTracking::createEntriesInEntryBlock(), llvm::PeelingModuloScheduleExpander::CreateLCSSAExitingBlock(), llvm::FunctionLoweringInfo::CreateReg(), llvm::FastISel::createResultReg(), llvm::AArch64FrameLowering::eliminateCallFramePseudoInstr(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::PPCTargetLowering::EmitAtomicBinary(), emitFrameOffsetAdj(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::CSKYFrameLowering::emitPrologue(), llvm::MipsSEFrameLowering::emitPrologue(), llvm::RISCVFrameLowering::emitPrologue(), llvm::MSP430TargetLowering::EmitShiftInstr(), emitThumbRegPlusImmInReg(), llvm::WindowScheduler::generateTripleMBB(), llvm::MipsFunctionInfo::getGlobalBaseReg(), llvm::M68kInstrInfo::getGlobalBaseReg(), llvm::SparcInstrInfo::getGlobalBaseReg(), llvm::X86InstrInfo::getGlobalBaseReg(), llvm::SwiftErrorValueTracking::getOrCreateVReg(), llvm::SwiftErrorValueTracking::getOrCreateVRegDefAt(), llvm::MipsFunctionInfo::initGlobalBaseReg(), llvm::MipsSEInstrInfo::loadImmediate(), llvm::XtensaInstrInfo::loadImmediate(), llvm::X86InstrInfo::loadStoreTileReg(), llvm::SPIRV::lowerBuiltin(), llvm::SPIRVCallLowering::lowerCall(), LowerCallResults(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::PPCRegisterInfo::lowerWACCRestore(), llvm::PPCRegisterInfo::lowerWACCSpilling(), llvm::RISCVRegisterInfo::materializeFrameBaseRegister(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::PPCRegisterInfo::prepareDynamicAlloca(), llvm::SwiftErrorValueTracking::propagateVRegs(), and llvm::ThumbRegisterInfo::rewriteFrameIndex().

createVirtualRegister() [2/2]

Register MachineRegisterInfo::createVirtualRegister	(	VRegAttrs	RegAttr,
		StringRef	Name = ""
	)

Create and return a new virtual register in the function with the specified register attributes(register class or bank and low level type).

Definition at line 170 of file MachineRegisterInfo.cpp.

References createIncompleteVirtualRegister(), Name, noteNewVirtualRegister(), llvm::MachineRegisterInfo::VRegAttrs::RCOrRB, setType(), and llvm::MachineRegisterInfo::VRegAttrs::Ty.

def_begin()

def_iterator llvm::MachineRegisterInfo::def_begin ( Register  RegNo ) const

inline

Definition at line 398 of file MachineRegisterInfo.h.

Referenced by llvm::DeadLaneDetector::computeSubRegisterLaneBitInfo(), def_empty(), def_operands(), getOneDef(), isPhysRegModified(), and MustSaveLR().

def_bundle_begin()

def_bundle_iterator llvm::MachineRegisterInfo::def_bundle_begin ( Register  RegNo ) const

inline

Definition at line 427 of file MachineRegisterInfo.h.

Referenced by def_bundles().

def_bundle_end()

static def_bundle_iterator llvm::MachineRegisterInfo::def_bundle_end ( )

inlinestatic

Definition at line 430 of file MachineRegisterInfo.h.

Referenced by def_bundles().

def_bundles()

iterator_range< def_bundle_iterator > llvm::MachineRegisterInfo::def_bundles ( Register  Reg ) const

inline

Definition at line 434 of file MachineRegisterInfo.h.

References def_bundle_begin(), def_bundle_end(), llvm::make_range(), and Reg.

def_empty()

bool llvm::MachineRegisterInfo::def_empty ( Register  RegNo ) const

inline

def_empty - Return true if there are no instructions defining the specified register (it may be live-in).

Definition at line 440 of file MachineRegisterInfo.h.

References def_begin(), and def_end().

Referenced by getUniqueVRegDef(), and isConstantPhysReg().

def_end()

static def_iterator llvm::MachineRegisterInfo::def_end ( )

inlinestatic

Definition at line 401 of file MachineRegisterInfo.h.

Referenced by def_empty(), def_operands(), getOneDef(), isPhysRegModified(), and MustSaveLR().

def_instr_begin()

def_instr_iterator llvm::MachineRegisterInfo::def_instr_begin ( Register  RegNo ) const

inline

Definition at line 411 of file MachineRegisterInfo.h.

Referenced by def_instructions(), llvm::InstrEmitter::EmitDbgInstrRef(), llvm::MachineFunction::finalizeDebugInstrRefs(), getUniqueVRegDef(), and getVRegDef().

def_instr_end()

static def_instr_iterator llvm::MachineRegisterInfo::def_instr_end ( )

inlinestatic

Definition at line 414 of file MachineRegisterInfo.h.

Referenced by def_instructions(), getUniqueVRegDef(), and getVRegDef().

def_instructions()

iterator_range< def_instr_iterator > llvm::MachineRegisterInfo::def_instructions ( Register  Reg ) const

inline

Definition at line 419 of file MachineRegisterInfo.h.

References def_instr_begin(), def_instr_end(), llvm::make_range(), and Reg.

def_operands()

iterator_range< def_iterator > llvm::MachineRegisterInfo::def_operands ( Register  Reg ) const

inline

Definition at line 403 of file MachineRegisterInfo.h.

References def_begin(), def_end(), llvm::make_range(), and Reg.

Referenced by hasOneDef(), and hasTiedDef().

disableCalleeSavedRegister()

void MachineRegisterInfo::disableCalleeSavedRegister

(

MCRegister

Reg

)

Disables the register from the list of CSRs.

I.e. the register will not appear as part of the CSR mask.

See also

UpdatedCalleeSavedRegs.

Definition at line 611 of file MachineRegisterInfo.cpp.

References assert(), llvm::erase(), getTargetRegisterInfo(), I, llvm::MCRegAliasIterator::isValid(), and TRI.

dumpUses()

LLVM_DUMP_METHOD void MachineRegisterInfo::dumpUses

(

Register

RegNo

)

const

Definition at line 514 of file MachineRegisterInfo.cpp.

References I, and use_instructions().

EmitLiveInCopies()

void MachineRegisterInfo::EmitLiveInCopies	(	MachineBasicBlock *	EntryMBB,
		const TargetRegisterInfo &	TRI,
		const TargetInstrInfo &	TII
	)

EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.

Definition at line 477 of file MachineRegisterInfo.cpp.

References llvm::MachineBasicBlock::addLiveIn(), llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), TII, and use_nodbg_empty().

Referenced by llvm::SelectionDAGISel::runOnMachineFunction().

freezeReservedRegs()

void MachineRegisterInfo::freezeReservedRegs

(

)

freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins.

Definition at line 520 of file MachineRegisterInfo.cpp.

References assert(), llvm::TargetRegisterInfo::getReservedRegs(), getTargetRegisterInfo(), and llvm::BitVector::size().

Referenced by createFrameHelperMachineFunction(), llvm::TargetLoweringBase::finalizeLowering(), and llvm::RegAllocBase::init().

getCalleeSavedRegs()

const MCPhysReg * MachineRegisterInfo::getCalleeSavedRegs

(

)

const

Returns list of callee saved registers.

The function returns the updated CSR list (after taking into account registers that are disabled from the CSR list).

Definition at line 634 of file MachineRegisterInfo.cpp.

References llvm::TargetRegisterInfo::getCalleeSavedRegs(), and getTargetRegisterInfo().

Referenced by llvm::MIRPrinter::convert(), llvm::AArch64FrameLowering::determineCalleeSaves(), llvm::CSKYFrameLowering::determineCalleeSaves(), llvm::TargetFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::determinePrologEpilogSGPRSaves(), llvm::VETargetLowering::emitSjLjDispatchBlock(), getLiveRegsForEntryMBB(), isACalleeSavedRegister(), llvm::X86MachineFunctionInfo::setRestoreBasePointer(), llvm::SIMachineFunctionInfo::splitWWMSpillRegisters(), llvm::AggressiveAntiDepBreaker::StartBlock(), and llvm::CriticalAntiDepBreaker::StartBlock().

getLiveInPhysReg()

MCRegister MachineRegisterInfo::getLiveInPhysReg

(

Register

VReg

)

const

getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.

Definition at line 458 of file MachineRegisterInfo.cpp.

References liveins().

getLiveInVirtReg()

Register MachineRegisterInfo::getLiveInVirtReg

(

MCRegister

PReg

)

const

getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in virtual register.

getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register.

Definition at line 467 of file MachineRegisterInfo.cpp.

References liveins().

getMaxLaneMaskForVReg()

LaneBitmask MachineRegisterInfo::getMaxLaneMaskForVReg

(

Register

Reg

)

const

Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg.

Definition at line 506 of file MachineRegisterInfo.cpp.

References assert(), llvm::TargetRegisterClass::getLaneMask(), and getRegClass().

Referenced by llvm::LiveIntervals::addKillFlags(), llvm::LiveRangeEdit::allUsesAvailableAt(), getInstReadLaneMask(), and llvm::DeadLaneDetector::transferDefinedLanes().

getNumVirtRegs()

unsigned llvm::MachineRegisterInfo::getNumVirtRegs ( ) const

inline

getNumVirtRegs - Return the number of virtual registers created.

Definition at line 794 of file MachineRegisterInfo.h.

Referenced by llvm::LiveIntervals::addKillFlags(), llvm::LiveVariables::addNewBlock(), addRegAllocationHint(), llvm::ScheduleDAGInstrs::buildSchedGraph(), clearVirtRegs(), llvm::DeadLaneDetector::computeSubRegisterLaneBitInfo(), llvm::MIRPrinter::convert(), createIncompleteVirtualRegister(), llvm::VirtRegMap::grow(), llvm::RegPressureTracker::init(), llvm::ScheduleDAGMILive::initRegPressure(), llvm::SPIRV::lowerBuiltinType(), llvm::LiveIntervals::print(), llvm::VirtRegMap::print(), setRegAllocationHint(), and verifyUseLists().

getOneDef()

MachineOperand * llvm::MachineRegisterInfo::getOneDef ( Register  Reg ) const

inline

Returns the defining operand if there is exactly one operand defining the specified register, otherwise nullptr.

Definition at line 464 of file MachineRegisterInfo.h.

References def_begin(), def_end(), and Reg.

getPressureSets()

PSetIterator llvm::MachineRegisterInfo::getPressureSets ( Register  RegUnit ) const

inline

Get an iterator over the pressure sets affected by the given physical or virtual register.

If RegUnit is physical, it must be a register unit (from MCRegUnitIterator).

Definition at line 1282 of file MachineRegisterInfo.h.

Referenced by llvm::SIScheduleDAGMI::fillVgprSgprCost(), and llvm::RegPressureTracker::increaseRegPressure().

getRegAllocationHint()

std::pair< unsigned, Register > llvm::MachineRegisterInfo::getRegAllocationHint ( Register  VReg ) const

inline

getRegAllocationHint - Return the register allocation hint for the specified virtual register.

If there are many hints, this returns the one with the greatest weight.

Definition at line 834 of file MachineRegisterInfo.h.

References assert(), llvm::Register::id(), llvm::IndexedMap< T, ToIndexT >::inBounds(), llvm::Register::isVirtual(), and llvm::IndexedMap< T, ToIndexT >::size().

Referenced by getSimpleHint(), and llvm::VirtRegMap::hasKnownPreference().

getRegAllocationHints()

const std::pair< unsigned, SmallVector< Register, 4 > > * llvm::MachineRegisterInfo::getRegAllocationHints ( Register  VReg ) const

inline

getRegAllocationHints - Return a reference to the vector of all register allocation hints for VReg.

Definition at line 854 of file MachineRegisterInfo.h.

References assert(), llvm::IndexedMap< T, ToIndexT >::inBounds(), and llvm::Register::isVirtual().

getRegBankOrNull()

const RegisterBank * llvm::MachineRegisterInfo::getRegBankOrNull ( Register  Reg ) const

inline

Return the register bank of Reg, or null if Reg has not been assigned a register bank or has been assigned a register class.

Note

It is possible to get the register bank from the register class via RegisterBankInfo::getRegBankFromRegClass.

Definition at line 679 of file MachineRegisterInfo.h.

References Reg.

Referenced by llvm::printRegClassOrBank().

getRegClass()

const TargetRegisterClass * llvm::MachineRegisterInfo::getRegClass ( Register  Reg ) const

inline

Return the register class of the specified virtual register.

This shouldn't be used directly unless Reg has a register class.

See also

getRegClassOrNull when this might happen.

Definition at line 653 of file MachineRegisterInfo.h.

References assert(), and Reg.

Referenced by llvm::RegAllocBase::allocatePhysRegs(), llvm::VirtRegMap::assignVirt2StackSlot(), llvm::LiveRangeEdit::calculateRegClassAndHint(), constrainRegClass(), llvm::AllocationOrder::create(), llvm::PeelingModuloScheduleExpander::CreateLCSSAExitingBlock(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::HexagonEvaluator::evaluate(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), llvm::WindowScheduler::generateTripleMBB(), llvm::BitTracker::MachineEvaluator::getCell(), GetCostForDef(), llvm::ScheduleDAGInstrs::getLaneMaskForMO(), getMaxLaneMaskForVReg(), llvm::RegAllocEvictionAdvisor::getOrderLimit(), llvm::BitTracker::MachineEvaluator::getRegBitWidth(), getRegTy(), llvm::WebAssemblyAsmPrinter::getRegType(), llvm::NVPTXAsmPrinter::getVirtualRegisterName(), isNonFoldablePartialRegisterLoad(), llvm::HexagonEvaluator::mask(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::VirtRegMap::print(), llvm::printRegClassOrBank(), recomputeRegClass(), llvm::PeelingModuloScheduleExpander::rewriteUsesOf(), llvm::TailDuplicator::tailDuplicateAndUpdate(), and llvm::DeadLaneDetector::transferUsedLanes().

getRegClassOrNull()

const TargetRegisterClass * llvm::MachineRegisterInfo::getRegClassOrNull ( Register  Reg ) const

inline

Return the register class of Reg, or null if Reg has not been assigned a register class yet.

Note

A null register class can only happen when these two conditions are met:

1. Generic virtual registers are created.
2. The machine function has not completely been through the instruction selection process. None of this condition is possible without GlobalISel for now. In other words, if GlobalISel is not used or if the query happens after the select pass, using getRegClass is safe.

Definition at line 670 of file MachineRegisterInfo.h.

References Reg.

Referenced by getRegClass(), llvm::SPIRV::lowerBuiltin(), llvm::printRegClassOrBank(), and shouldTrackSubRegLiveness().

getRegClassOrRegBank()

const RegClassOrRegBank & llvm::MachineRegisterInfo::getRegClassOrRegBank ( Register  Reg ) const

inline

Return the register bank or register class of Reg.

Note

Before the register bank gets assigned (i.e., before the RegBankSelect pass) Reg may not have either.

Definition at line 687 of file MachineRegisterInfo.h.

References Reg.

Referenced by llvm::GISelInstProfileBuilder::addNodeIDReg(), llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), constrainRegAttrs(), and getVRegAttrs().

getReservedRegs()

const BitVector & llvm::MachineRegisterInfo::getReservedRegs ( ) const

inline

getReservedRegs - Returns a reference to the frozen set of reserved registers.

This method should always be preferred to calling TRI::getReservedRegs() when possible.

Definition at line 958 of file MachineRegisterInfo.h.

References assert(), and reservedRegsFrozen().

Referenced by isReserved(), and llvm::RegisterClassInfo::runOnMachineFunction().

getSimpleHint()

Register llvm::MachineRegisterInfo::getSimpleHint ( Register  VReg ) const

inline

getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint.

Definition at line 845 of file MachineRegisterInfo.h.

References assert(), getRegAllocationHint(), and llvm::Register::isVirtual().

Referenced by llvm::MIRPrinter::convert(), and llvm::VirtRegMap::hasPreferredPhys().

getTargetRegisterInfo()

const TargetRegisterInfo * llvm::MachineRegisterInfo::getTargetRegisterInfo ( ) const

inline

Definition at line 157 of file MachineRegisterInfo.h.

References llvm::TargetSubtargetInfo::getRegisterInfo(), and llvm::MachineFunction::getSubtarget().

Referenced by llvm::LiveRangeEdit::allUsesAvailableAt(), clearVirtRegs(), llvm::PeelingModuloScheduleExpander::CreateLCSSAExitingBlock(), disableCalleeSavedRegister(), llvm::PeelingModuloScheduleExpander::filterInstructions(), freezeReservedRegs(), getCalleeSavedRegs(), isAllocatable(), isConstantPhysReg(), isPhysRegModified(), isPhysRegUsed(), isReservedRegUnit(), llvm::GCNUpwardRPTracker::isValid(), MachineRegisterInfo(), recomputeRegClass(), replaceRegWith(), llvm::PeelingModuloScheduleExpander::rewriteUsesOf(), llvm::tryFoldSPUpdateIntoPushPop(), updateDbgUsersToReg(), verifyUseList(), and verifyUseLists().

getType()

LLT llvm::MachineRegisterInfo::getType ( Register  Reg ) const

inline

Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register.

Definition at line 769 of file MachineRegisterInfo.h.

References Reg.

Referenced by llvm::GISelInstProfileBuilder::addNodeIDReg(), llvm::CombinerHelper::applyAshShlToSextInreg(), llvm::CombinerHelper::applyCombineAddP2IToPtrAdd(), llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::CombinerHelper::applyCombineInsertVecElts(), llvm::CombinerHelper::applyCombineMulToShl(), llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::CombinerHelper::applyCombineShuffleConcat(), llvm::CombinerHelper::applyCombineTruncOfShift(), llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::CombinerHelper::applyExpandFPowI(), llvm::AMDGPUCombinerHelper::applyExpandPromotedF16FMed3(), llvm::CombinerHelper::applyExtendThroughPhis(), llvm::CombinerHelper::applyExtractVecEltBuildVec(), llvm::AMDGPUCombinerHelper::applyFoldableFneg(), llvm::CombinerHelper::applyFoldBinOpIntoSelect(), llvm::CombinerHelper::applyFsubToFneg(), llvm::CombinerHelper::applyFunnelShiftConstantModulo(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::CombinerHelper::applyPtrAddImmedChain(), llvm::CombinerHelper::applyRotateOutOfRange(), llvm::CombinerHelper::applySDivByPow2(), llvm::CombinerHelper::applyShiftImmedChain(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), llvm::CombinerHelper::applyShuffleToExtract(), llvm::CombinerHelper::applySimplifyURemByPow2(), llvm::CombinerHelper::applyUDivByPow2(), llvm::CombinerHelper::applyUMulHToLShr(), llvm::CombinerHelper::applyXorOfAndWithSameReg(), llvm::LegalizerHelper::bitcast(), llvm::CombinerHelper::buildSDivUsingMul(), llvm::CombinerHelper::buildUDivUsingMul(), llvm::CombinerHelper::canCombineFMadOrFMA(), cloneVirtualRegister(), llvm::LegalizerHelper::coerceToScalar(), llvm::GISelKnownBits::computeKnownBitsImpl(), llvm::RegBankSelect::computeMapping(), llvm::GISelKnownBits::computeNumSignBits(), constrainRegAttrs(), llvm::LegalizerHelper::fewerElementsVector(), llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(), llvm::LegalizerHelper::fewerElementsVectorMerge(), llvm::LegalizerHelper::fewerElementsVectorMultiEltType(), llvm::LegalizerHelper::fewerElementsVectorPhi(), llvm::LegalizerHelper::fewerElementsVectorUnmergeValues(), llvm::GISelKnownBits::getKnownBits(), llvm::LegalizerHelper::getVectorElementPointer(), getVRegAttrs(), llvm::LegalizerHelper::libcall(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAbsToAddXor(), llvm::LegalizerHelper::lowerAbsToCNeg(), llvm::LegalizerHelper::lowerAbsToMaxNeg(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerAddSubSatToMinMax(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerBitreverse(), llvm::LegalizerHelper::lowerBswap(), llvm::LegalizerHelper::lowerDynStackAlloc(), llvm::LegalizerHelper::lowerEXT(), llvm::LegalizerHelper::lowerExtractInsertVectorElt(), llvm::LegalizerHelper::lowerFFloor(), llvm::LegalizerHelper::lowerFMad(), llvm::LegalizerHelper::lowerFMinNumMaxNum(), llvm::LegalizerHelper::lowerFPOWI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerFunnelShift(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerIntrinsicRound(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerMinMax(), llvm::LegalizerHelper::lowerReadWriteRegister(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerSMULH_UMULH(), llvm::LegalizerHelper::lowerStore(), llvm::LegalizerHelper::lowerThreewayCompare(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::lowerUnmergeValues(), llvm::LegalizerHelper::lowerVAArg(), llvm::LegalizerHelper::lowerVectorReduction(), llvm::CombinerHelper::matchAddOverflow(), llvm::CombinerHelper::matchAndOrDisjointMask(), llvm::CombinerHelper::matchAshrShlToSextInreg(), llvm::CombinerHelper::matchBitfieldExtractFromAnd(), llvm::CombinerHelper::matchBitfieldExtractFromSExtInReg(), llvm::CombinerHelper::matchBitfieldExtractFromShr(), llvm::CombinerHelper::matchBitfieldExtractFromShrAnd(), llvm::CombinerHelper::matchBuildVectorIdentityFold(), llvm::CombinerHelper::matchCastOfSelect(), llvm::CombinerHelper::matchCombineAddP2IToPtrAdd(), llvm::CombinerHelper::matchCombineAnyExtTrunc(), llvm::CombinerHelper::matchCombineConcatVectors(), llvm::CombinerHelper::matchCombineConstPtrAddToI2P(), llvm::CombinerHelper::matchCombineDivRem(), llvm::CombinerHelper::matchCombineExtendingLoads(), llvm::CombinerHelper::matchCombineExtractedVectorLoad(), llvm::CombinerHelper::matchCombineFAddFMAFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMAAggressive(), llvm::CombinerHelper::matchCombineFSubFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFNegFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFpExtFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFpExtFNegFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineI2PToP2I(), llvm::CombinerHelper::matchCombineInsertVecElts(), llvm::CombinerHelper::matchCombineLoadWithAndMask(), llvm::CombinerHelper::matchCombineShiftToUnmerge(), llvm::CombinerHelper::matchCombineShlOfExtend(), llvm::CombinerHelper::matchCombineShuffleConcat(), llvm::CombinerHelper::matchCombineShuffleVector(), llvm::CombinerHelper::matchCombineTruncOfShift(), llvm::CombinerHelper::matchCombineUnmergeConstant(), llvm::CombinerHelper::matchCombineUnmergeMergeToPlainValues(), llvm::CombinerHelper::matchCombineUnmergeWithDeadLanesToTrunc(), llvm::CombinerHelper::matchCombineUnmergeZExtToZExt(), llvm::CombinerHelper::matchCombineZextTrunc(), llvm::CombinerHelper::matchCommuteShift(), llvm::CombinerHelper::matchConstantFoldCastOp(), llvm::CombinerHelper::matchConstantLargerBitWidth(), llvm::AMDGPUCombinerHelper::matchExpandPromotedF16FMed3(), llvm::CombinerHelper::matchExtendThroughPhis(), llvm::CombinerHelper::matchExtOfExt(), llvm::CombinerHelper::matchExtractAllEltsFromBuildVector(), llvm::CombinerHelper::matchExtractVecEltBuildVec(), llvm::CombinerHelper::matchExtractVectorElement(), llvm::CombinerHelper::matchExtractVectorElementWithBuildVector(), llvm::CombinerHelper::matchExtractVectorElementWithBuildVectorTrunc(), llvm::CombinerHelper::matchExtractVectorElementWithShuffleVector(), llvm::CombinerHelper::matchFoldAMinusC1MinusC2(), llvm::CombinerHelper::matchFoldAMinusC1PlusC2(), llvm::CombinerHelper::matchFoldAPlusC1MinusC2(), llvm::CombinerHelper::matchFoldC1Minus2MinusC2(), llvm::CombinerHelper::matchFoldC2MinusAPlusC1(), llvm::CombinerHelper::matchFreezeOfSingleMaybePoisonOperand(), llvm::CombinerHelper::matchFsubToFneg(), llvm::CombinerHelper::matchFunnelShiftToRotate(), llvm::CombinerHelper::matchHoistLogicOpWithSameOpcodeHands(), llvm::CombinerHelper::matchICmpToLHSKnownBits(), llvm::CombinerHelper::matchICmpToTrueFalseKnownBits(), llvm::CombinerHelper::matchInsertExtractVecEltOutOfBounds(), llvm::CombinerHelper::matchInsertVectorElementOOB(), llvm::CombinerHelper::matchLoadOrCombine(), llvm::CombinerHelper::matchMulOBy0(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::CombinerHelper::matchNonNegZext(), llvm::CombinerHelper::matchNotCmp(), llvm::CombinerHelper::matchOrShiftToFunnelShift(), llvm::CombinerHelper::matchOverlappingAnd(), llvm::CombinerHelper::matchPtrAddImmedChain(), llvm::CombinerHelper::matchPtrAddZero(), llvm::CombinerHelper::matchReassocConstantInnerLHS(), llvm::CombinerHelper::matchReassocConstantInnerRHS(), llvm::CombinerHelper::matchReassocFoldConstantsInSubTree(), llvm::CombinerHelper::matchRedundantBinOpInEquality(), llvm::CombinerHelper::matchRedundantNegOperands(), llvm::CombinerHelper::matchRedundantSExtInReg(), llvm::CombinerHelper::matchRotateOutOfRange(), llvm::CombinerHelper::matchSDivByConst(), llvm::CombinerHelper::matchSelectIMinMax(), llvm::CombinerHelper::matchSextInRegOfLoad(), llvm::CombinerHelper::matchSextOfTrunc(), llvm::CombinerHelper::matchSextTruncSextLoad(), llvm::CombinerHelper::matchShiftImmedChain(), llvm::CombinerHelper::matchShiftOfShiftedLogic(), llvm::CombinerHelper::matchShiftsTooBig(), llvm::CombinerHelper::matchShlOfVScale(), llvm::CombinerHelper::matchSubAddSameReg(), llvm::CombinerHelper::matchSubOfVScale(), llvm::CombinerHelper::matchTruncateOfExt(), llvm::CombinerHelper::matchTruncBuildVectorFold(), llvm::CombinerHelper::matchTruncLshrBuildVectorFold(), llvm::CombinerHelper::matchUDivByConst(), llvm::CombinerHelper::matchUMulHToLShr(), llvm::CombinerHelper::matchZextOfTrunc(), llvm::LegalizerHelper::moreElementsVector(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarAddSub(), llvm::LegalizerHelper::narrowScalarBasic(), llvm::LegalizerHelper::narrowScalarExt(), llvm::LegalizerHelper::narrowScalarExtract(), llvm::LegalizerHelper::narrowScalarFLDEXP(), llvm::LegalizerHelper::narrowScalarFPTOI(), llvm::LegalizerHelper::narrowScalarInsert(), llvm::LegalizerHelper::narrowScalarMul(), llvm::LegalizerHelper::narrowScalarSelect(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::reduceLoadStoreWidth(), llvm::RegBankSelect::repairReg(), llvm::GISelKnownBits::signBitIsZero(), llvm::CombinerHelper::tryReassocBinOp(), and llvm::LegalizerHelper::widenScalar().

getUniqueVRegDef()

MachineInstr * MachineRegisterInfo::getUniqueVRegDef

(

Register

Reg

)

const

getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found.

If there are multiple definitions or no definition, return null.

Definition at line 418 of file MachineRegisterInfo.cpp.

References def_empty(), def_instr_begin(), def_instr_end(), and I.

Referenced by llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), genIndexedMultiply(), llvm::PeelingModuloScheduleExpander::getEquivalentRegisterIn(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeByOpcode(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeCoopMatr(), llvm::PhiLoweringHelper::isConstantLaneMask(), llvm::CombinerHelper::matchFreezeOfSingleMaybePoisonOperand(), llvm::CombinerHelper::matchShiftImmedChain(), llvm::CombinerHelper::matchShiftOfShiftedLogic(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::PeelingModuloScheduleExpander::peelPrologAndEpilogs(), llvm::LiveVariables::recomputeForSingleDefVirtReg(), and llvm::PeelingModuloScheduleExpander::rewriteUsesOf().

getUsedPhysRegsMask()

const BitVector & llvm::MachineRegisterInfo::getUsedPhysRegsMask ( ) const

inline

Definition at line 912 of file MachineRegisterInfo.h.

getVRegAttrs()

VRegAttrs llvm::MachineRegisterInfo::getVRegAttrs ( Register  Reg )

inline

Returns register class or bank and low level type of Reg.

Always safe to use. Special values are returned when Reg does not have some of the attributes.

Definition at line 755 of file MachineRegisterInfo.h.

References getRegClassOrRegBank(), getType(), and Reg.

Referenced by llvm::MachineSSAUpdater::Initialize(), and llvm::PhiLoweringHelper::initializeLaneMaskRegisterAttributes().

getVRegDef()

MachineInstr * MachineRegisterInfo::getVRegDef

(

Register

Reg

)

const

getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found.

This assumes that the code is in SSA form, so there should only be one definition.

Definition at line 407 of file MachineRegisterInfo.cpp.

References assert(), def_instr_begin(), def_instr_end(), and I.

Referenced by llvm::Combiner::WorkListMaintainerImpl< Lvl >::appliedCombine(), llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::CombinerHelper::applyExtendThroughPhis(), llvm::CombinerHelper::applyFoldBinOpIntoSelect(), llvm::CombinerHelper::applyNotCmp(), llvm::CombinerHelper::applySextInRegOfLoad(), llvm::GISelKnownBits::computeKnownAlignment(), llvm::GISelKnownBits::computeKnownBitsImpl(), llvm::GISelKnownBits::computeNumSignBits(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeSampledImage(), llvm::PeelingModuloScheduleExpander::getPhiCanonicalReg(), llvm::LiveVariables::HandleVirtRegUse(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), llvm::LegalizerHelper::lowerVECTOR_COMPRESS(), llvm::CombinerHelper::matchAddOfVScale(), llvm::CombinerHelper::matchCombineConcatVectors(), llvm::CombinerHelper::matchCombineFAddFMAFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMAAggressive(), llvm::CombinerHelper::matchCombineFSubFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineLoadWithAndMask(), llvm::CombinerHelper::matchCombineShlOfExtend(), llvm::CombinerHelper::matchCombineShuffleConcat(), llvm::CombinerHelper::matchCombineUnmergeConstant(), llvm::CombinerHelper::matchCombineUnmergeUndef(), llvm::CombinerHelper::matchCommuteConstantToRHS(), llvm::CombinerHelper::matchCommuteShift(), llvm::CombinerHelper::matchConstantOp(), llvm::CombinerHelper::matchConstantSelectCmp(), llvm::CombinerHelper::matchExtractVecEltBuildVec(), llvm::AMDGPUCombinerHelper::matchFoldableFneg(), llvm::CombinerHelper::matchFoldAMinusC1MinusC2(), llvm::CombinerHelper::matchFoldAMinusC1PlusC2(), llvm::CombinerHelper::matchFoldAPlusC1MinusC2(), llvm::CombinerHelper::matchFoldBinOpIntoSelect(), llvm::CombinerHelper::matchFoldC1Minus2MinusC2(), llvm::CombinerHelper::matchFoldC2MinusAPlusC1(), llvm::CombinerHelper::matchMulOfVScale(), llvm::CombinerHelper::matchNonNegZext(), llvm::CombinerHelper::matchNotCmp(), llvm::CombinerHelper::matchPtrAddImmedChain(), llvm::CombinerHelper::matchPtrAddZero(), llvm::CombinerHelper::matchReassocPtrAdd(), llvm::CombinerHelper::matchSelectIMinMax(), llvm::CombinerHelper::matchShlOfVScale(), llvm::CombinerHelper::matchSubOfVScale(), llvm::CombinerHelper::matchUDivByConst(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::WindowScheduler::schedulePhi(), llvm::TailDuplicator::tailDuplicateAndUpdate(), llvm::CombinerHelper::tryReassocBinOp(), validateFunCallMachineDef(), and llvm::SSAUpdaterTraits< MachineSSAUpdater >::ValueIsPHI().

getVRegName()

StringRef llvm::MachineRegisterInfo::getVRegName ( Register  Reg ) const

inline

Definition at line 442 of file MachineRegisterInfo.h.

References llvm::IndexedMap< T, ToIndexT >::inBounds(), and Reg.

Referenced by llvm::MIRPrinter::convert().

hasAtMostUserInstrs()

bool MachineRegisterInfo::hasAtMostUserInstrs	(	Register	Reg,
		unsigned	MaxUsers
	)		const

hasAtMostUses - Return true if the given register has at most MaxUsers non-debug user instructions.

Definition at line 434 of file MachineRegisterInfo.cpp.

References llvm::hasNItemsOrLess(), use_instr_nodbg_begin(), and use_instr_nodbg_end().

hasOneDef()

bool llvm::MachineRegisterInfo::hasOneDef ( Register  RegNo ) const

inline

Return true if there is exactly one operand defining the specified register.

Definition at line 458 of file MachineRegisterInfo.h.

References def_operands(), and llvm::hasSingleElement().

Referenced by llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::InstrEmitter::EmitDbgInstrRef(), and llvm::MachineFunction::finalizeDebugInstrRefs().

hasOneNonDBGUse()

bool MachineRegisterInfo::hasOneNonDBGUse

(

Register

RegNo

)

const

hasOneNonDBGUse - Return true if there is exactly one non-Debug use of the specified register.

Definition at line 426 of file MachineRegisterInfo.cpp.

References llvm::hasSingleElement(), and use_nodbg_operands().

Referenced by llvm::AMDGPUCombinerHelper::applyFoldableFneg(), llvm::CombinerHelper::matchAddOfVScale(), llvm::CombinerHelper::matchAddOverflow(), llvm::CombinerHelper::matchCastOfSelect(), llvm::CombinerHelper::matchCombineConcatVectors(), llvm::CombinerHelper::matchCombineExtractedVectorLoad(), llvm::CombinerHelper::matchCombineFAddFMAFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFNegFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFpExtFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineLoadWithAndMask(), llvm::CombinerHelper::matchCombineTruncOfShift(), llvm::AMDGPUCombinerHelper::matchExpandPromotedF16FMed3(), llvm::CombinerHelper::matchExtendThroughPhis(), llvm::CombinerHelper::matchExtOfExt(), llvm::CombinerHelper::matchExtractVecEltBuildVec(), llvm::CombinerHelper::matchExtractVectorElementWithBuildVector(), llvm::CombinerHelper::matchExtractVectorElementWithBuildVectorTrunc(), llvm::AMDGPUCombinerHelper::matchFoldableFneg(), llvm::CombinerHelper::matchFoldAMinusC1MinusC2(), llvm::CombinerHelper::matchFoldAMinusC1PlusC2(), llvm::CombinerHelper::matchFoldAPlusC1MinusC2(), llvm::CombinerHelper::matchFoldBinOpIntoSelect(), llvm::CombinerHelper::matchFoldC1Minus2MinusC2(), llvm::CombinerHelper::matchFoldC2MinusAPlusC1(), llvm::CombinerHelper::matchFreezeOfSingleMaybePoisonOperand(), llvm::CombinerHelper::matchHoistLogicOpWithSameOpcodeHands(), llvm::CombinerHelper::matchMulOfVScale(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::CombinerHelper::matchNotCmp(), llvm::CombinerHelper::matchSelectIMinMax(), llvm::CombinerHelper::matchSextInRegOfLoad(), llvm::CombinerHelper::matchShiftOfShiftedLogic(), llvm::CombinerHelper::matchShlOfVScale(), llvm::CombinerHelper::matchSubOfVScale(), llvm::CombinerHelper::matchTruncateOfExt(), llvm::CombinerHelper::matchXorOfAndWithSameReg(), and llvm::TailDuplicator::tailDuplicateAndUpdate().

hasOneNonDBGUser()

bool MachineRegisterInfo::hasOneNonDBGUser

(

Register

RegNo

)

const

hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register.

Said instruction may have multiple uses.

Definition at line 430 of file MachineRegisterInfo.cpp.

References llvm::hasSingleElement(), and use_nodbg_instructions().

Referenced by llvm::Combiner::WorkListMaintainerImpl< Lvl >::appliedCombine().

hasOneUse()

bool llvm::MachineRegisterInfo::hasOneUse ( Register  RegNo ) const

inline

hasOneUse - Return true if there is exactly one instruction using the specified register.

Definition at line 524 of file MachineRegisterInfo.h.

References llvm::hasSingleElement(), and use_operands().

Referenced by llvm::CombinerHelper::matchCombineInsertVecElts(), and llvm::FastISel::tryToFoldLoad().

insertVRegByName()

void llvm::MachineRegisterInfo::insertVRegByName ( StringRef  Name, Register  Reg  )

inline

Definition at line 446 of file MachineRegisterInfo.h.

References assert(), llvm::StringSet< AllocatorTy >::contains(), llvm::IndexedMap< T, ToIndexT >::grow(), llvm::StringSet< AllocatorTy >::insert(), Name, and Reg.

Referenced by createIncompleteVirtualRegister().

invalidateLiveness()

void llvm::MachineRegisterInfo::invalidateLiveness ( )

inline

invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.

This should be called by late passes that invalidate the liveness information.

Definition at line 220 of file MachineRegisterInfo.h.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::reset(), and llvm::MachineFunctionProperties::TracksLiveness.

Referenced by llvm::MIRParserImpl::parseRegisterInfo().

isAllocatable()

bool llvm::MachineRegisterInfo::isAllocatable ( MCRegister  PhysReg ) const

inline

isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved.

Allocatable registers may show up in the allocation order of some virtual register, so a register allocator needs to track its liveness and availability.

Definition at line 987 of file MachineRegisterInfo.h.

References getTargetRegisterInfo(), llvm::TargetRegisterInfo::isInAllocatableClass(), and isReserved().

Referenced by llvm::AggressiveAntiDepBreaker::BreakAntiDependencies(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::PPCRegisterInfo::getCalleeSavedRegs(), and isConstantPhysReg().

isConstantPhysReg()

bool MachineRegisterInfo::isConstantPhysReg

(

MCRegister

PhysReg

)

const

Returns true if PhysReg is unallocatable and constant throughout the function.

Writing to a constant register has no effect.

Definition at line 526 of file MachineRegisterInfo.cpp.

References assert(), def_empty(), getTargetRegisterInfo(), isAllocatable(), llvm::Register::isPhysicalRegister(), llvm::MCRegAliasIterator::isValid(), and TRI.

Referenced by llvm::ScheduleDAGInstrs::addPhysRegDeps(), and llvm::LiveRangeEdit::allUsesAvailableAt().

isLiveIn()

bool MachineRegisterInfo::isLiveIn

(

Register

Reg

)

const

Definition at line 449 of file MachineRegisterInfo.cpp.

References liveins().

Referenced by llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::X86FrameLowering::adjustForSegmentedStacks(), llvm::ARMFrameLowering::determineCalleeSaves(), getPrologueDeath(), isSignExtendedW(), llvm::PPCInstrInfo::isSignOrZeroExtended(), llvm::Thumb1FrameLowering::spillCalleeSavedRegisters(), and llvm::M68kFrameLowering::spillCalleeSavedRegisters().

isPhysRegModified()

bool MachineRegisterInfo::isPhysRegModified	(	MCRegister	PhysReg,
		bool	SkipNoReturnDef = false
	)		const

Return true if the specified register is modified in this function.

This checks that no defining machine operands exist for the register or any of its aliases. Definitions found on functions marked noreturn are ignored, to consider them pass 'true' for optional parameter SkipNoReturnDef. The register is also considered modified when it is set in the UsedPhysRegMask.

Definition at line 583 of file MachineRegisterInfo.cpp.

References def_begin(), def_end(), getTargetRegisterInfo(), isNoReturnDef(), llvm::MCRegAliasIterator::isValid(), llvm::make_range(), llvm::BitVector::test(), and TRI.

isPhysRegUsed()

bool MachineRegisterInfo::isPhysRegUsed	(	MCRegister	PhysReg,
		bool	SkipRegMaskTest = false
	)		const

Return true if the specified register is modified or read in this function.

This checks that no machine operands exist for the register or any of its aliases. If SkipRegMaskTest is false, the register is considered used when it is set in the UsedPhysRegMask.

Definition at line 598 of file MachineRegisterInfo.cpp.

References getTargetRegisterInfo(), llvm::MCRegAliasIterator::isValid(), reg_nodbg_empty(), llvm::BitVector::test(), and TRI.

Referenced by llvm::AArch64FrameLowering::determineCalleeSaves(), and llvm::GCNHazardRecognizer::GCNHazardRecognizer().

isReserved()

bool llvm::MachineRegisterInfo::isReserved ( MCRegister  PhysReg ) const

inline

isReserved - Returns true when PhysReg is a reserved register.

Reserved registers may belong to an allocatable register class, but the target has explicitly requested that they are not used.

Definition at line 969 of file MachineRegisterInfo.h.

References getReservedRegs(), llvm::MCRegister::id(), and llvm::BitVector::test().

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::RISCVFrameLowering::emitPrologue(), llvm::X86FrameLowering::emitPrologue(), indirectCopyToAGPR(), isAllocatable(), llvm::SIRegisterInfo::isAsmClobberable(), and toggleKills().

isReservedRegUnit()

bool MachineRegisterInfo::isReservedRegUnit

(

unsigned

Unit

)

const

Returns true when the given register unit is considered reserved.

Register units are considered reserved when for at least one of their root registers, the root register and all super registers are reserved. This currently iterates the register hierarchy and may be slower than expected.

Definition at line 653 of file MachineRegisterInfo.cpp.

References llvm::all_of(), getTargetRegisterInfo(), llvm::MCRegUnitRootIterator::isValid(), and TRI.

isSSA()

bool llvm::MachineRegisterInfo::isSSA ( ) const

inline

Definition at line 198 of file MachineRegisterInfo.h.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::hasProperty(), and llvm::MachineFunctionProperties::IsSSA.

Referenced by llvm::PPCInstrInfo::materializeImmPostRA().

isUpdatedCSRsInitialized()

bool llvm::MachineRegisterInfo::isUpdatedCSRsInitialized ( ) const

inline

Returns true if the updated CSR list was initialized and false otherwise.

Definition at line 244 of file MachineRegisterInfo.h.

Referenced by llvm::MIRPrinter::convert().

leaveSSA()

void llvm::MachineRegisterInfo::leaveSSA ( )

inline

Definition at line 204 of file MachineRegisterInfo.h.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::IsSSA, and llvm::MachineFunctionProperties::reset().

livein_begin()

livein_iterator llvm::MachineRegisterInfo::livein_begin ( ) const

inline

Definition at line 1006 of file MachineRegisterInfo.h.

Referenced by llvm::MachineFunction::print().

livein_empty()

bool llvm::MachineRegisterInfo::livein_empty ( ) const

inline

Definition at line 1008 of file MachineRegisterInfo.h.

Referenced by llvm::MachineFunction::print().

livein_end()

livein_iterator llvm::MachineRegisterInfo::livein_end ( ) const

inline

Definition at line 1007 of file MachineRegisterInfo.h.

Referenced by llvm::MachineFunction::print().

liveins()

ArrayRef< std::pair< MCRegister, Register > > llvm::MachineRegisterInfo::liveins ( ) const

inline

Definition at line 1010 of file MachineRegisterInfo.h.

Referenced by llvm::MIRPrinter::convert(), getLiveInPhysReg(), getLiveInVirtReg(), isLiveIn(), llvm::FastISel::lowerDbgValue(), processIfEntryValueDbgDeclare(), and llvm::SelectionDAGISel::runOnMachineFunction().

markUsesInDebugValueAsUndef()

void MachineRegisterInfo::markUsesInDebugValueAsUndef

(

Register

Reg

)

const

markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis.

Definition at line 545 of file MachineRegisterInfo.cpp.

References llvm::make_early_inc_range(), use_instructions(), and UseMI.

moveOperands()

void MachineRegisterInfo::moveOperands	(	MachineOperand *	Dst,
		MachineOperand *	Src,
		unsigned	NumOps
	)

Move NumOps operands from Src to Dst, updating use-def lists as needed.

The Dst range is assumed to be uninitialized memory. (Or it may contain operands that won't be destroyed, which is OK because the MO destructor is trivial anyway).

The Src and Dst ranges may overlap.

Definition at line 342 of file MachineRegisterInfo.cpp.

References assert().

noteCloneVirtualRegister()

void llvm::MachineRegisterInfo::noteCloneVirtualRegister ( Register  NewReg, Register  SrcReg  )

inline

Definition at line 182 of file MachineRegisterInfo.h.

Referenced by cloneVirtualRegister().

noteNewVirtualRegister()

void llvm::MachineRegisterInfo::noteNewVirtualRegister ( Register  Reg )

inline

Definition at line 177 of file MachineRegisterInfo.h.

References Reg.

Referenced by createGenericVirtualRegister(), and createVirtualRegister().

operator=()

MachineRegisterInfo & llvm::MachineRegisterInfo::operator= ( const MachineRegisterInfo &  )

delete

recomputeRegClass()

bool MachineRegisterInfo::recomputeRegClass

(

Register

Reg

)

recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg.

Returns true if Reg was upgraded.

This method can be used after constraints have been removed from a virtual register, for example after removing instructions or splitting the live range.

Definition at line 122 of file MachineRegisterInfo.cpp.

References llvm::TargetSubtargetInfo::getInstrInfo(), llvm::TargetRegisterInfo::getLargestLegalSuperClass(), getRegClass(), llvm::MachineFunction::getSubtarget(), getTargetRegisterInfo(), MI, reg_nodbg_operands(), setRegClass(), and TII.

Referenced by llvm::LiveRangeEdit::calculateRegClassAndHint().

reg_begin()

reg_iterator llvm::MachineRegisterInfo::reg_begin ( Register  RegNo ) const

inline

Definition at line 295 of file MachineRegisterInfo.h.

Referenced by reg_empty(), reg_operands(), and llvm::FastISel::tryToFoldLoad().

reg_bundle_begin()

reg_bundle_iterator llvm::MachineRegisterInfo::reg_bundle_begin ( Register  RegNo ) const

inline

Definition at line 324 of file MachineRegisterInfo.h.

Referenced by reg_bundles().

reg_bundle_end()

static reg_bundle_iterator llvm::MachineRegisterInfo::reg_bundle_end ( )

inlinestatic

Definition at line 327 of file MachineRegisterInfo.h.

Referenced by reg_bundles().

reg_bundle_nodbg_begin()

reg_bundle_nodbg_iterator llvm::MachineRegisterInfo::reg_bundle_nodbg_begin ( Register  RegNo ) const

inline

Definition at line 377 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_bundles().

reg_bundle_nodbg_end()

static reg_bundle_nodbg_iterator llvm::MachineRegisterInfo::reg_bundle_nodbg_end ( )

inlinestatic

Definition at line 380 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_bundles().

reg_bundles()

iterator_range< reg_bundle_iterator > llvm::MachineRegisterInfo::reg_bundles ( Register  Reg ) const

inline

Definition at line 331 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, reg_bundle_begin(), and reg_bundle_end().

reg_empty()

bool llvm::MachineRegisterInfo::reg_empty ( Register  RegNo ) const

inline

reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).

Definition at line 337 of file MachineRegisterInfo.h.

References reg_begin(), and reg_end().

reg_end()

static reg_iterator llvm::MachineRegisterInfo::reg_end ( )

inlinestatic

Definition at line 298 of file MachineRegisterInfo.h.

Referenced by reg_empty(), and reg_operands().

reg_instr_begin()

reg_instr_iterator llvm::MachineRegisterInfo::reg_instr_begin ( Register  RegNo ) const

inline

Definition at line 308 of file MachineRegisterInfo.h.

Referenced by reg_instructions().

reg_instr_end()

static reg_instr_iterator llvm::MachineRegisterInfo::reg_instr_end ( )

inlinestatic

Definition at line 311 of file MachineRegisterInfo.h.

Referenced by reg_instructions().

reg_instr_nodbg_begin()

reg_instr_nodbg_iterator llvm::MachineRegisterInfo::reg_instr_nodbg_begin ( Register  RegNo ) const

inline

Definition at line 360 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_instructions().

reg_instr_nodbg_end()

static reg_instr_nodbg_iterator llvm::MachineRegisterInfo::reg_instr_nodbg_end ( )

inlinestatic

Definition at line 363 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_instructions().

reg_instructions()

iterator_range< reg_instr_iterator > llvm::MachineRegisterInfo::reg_instructions ( Register  Reg ) const

inline

Definition at line 316 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, reg_instr_begin(), and reg_instr_end().

Referenced by llvm::RegAllocBase::allocatePhysRegs(), clearVirtRegs(), and llvm::LiveIntervals::shrinkToUses().

reg_nodbg_begin()

reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_begin ( Register  RegNo ) const

inline

Definition at line 343 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_empty(), and reg_nodbg_operands().

reg_nodbg_bundles()

iterator_range< reg_bundle_nodbg_iterator > llvm::MachineRegisterInfo::reg_nodbg_bundles ( Register  Reg ) const

inline

Definition at line 385 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, reg_bundle_nodbg_begin(), and reg_bundle_nodbg_end().

reg_nodbg_empty()

bool llvm::MachineRegisterInfo::reg_nodbg_empty ( Register  RegNo ) const

inline

reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.

Definition at line 391 of file MachineRegisterInfo.h.

References reg_nodbg_begin(), and reg_nodbg_end().

Referenced by llvm::LiveIntervals::addKillFlags(), llvm::RegAllocBase::allocatePhysRegs(), and isPhysRegUsed().

reg_nodbg_end()

static reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_end ( )

inlinestatic

Definition at line 346 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_empty(), and reg_nodbg_operands().

reg_nodbg_instructions()

iterator_range< reg_instr_nodbg_iterator > llvm::MachineRegisterInfo::reg_nodbg_instructions ( Register  Reg ) const

inline

Definition at line 368 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, reg_instr_nodbg_begin(), and reg_instr_nodbg_end().

reg_nodbg_operands()

iterator_range< reg_nodbg_iterator > llvm::MachineRegisterInfo::reg_nodbg_operands ( Register  Reg ) const

inline

Definition at line 351 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, reg_nodbg_begin(), and reg_nodbg_end().

Referenced by recomputeRegClass().

reg_operands()

iterator_range< reg_iterator > llvm::MachineRegisterInfo::reg_operands ( Register  Reg ) const

inline

Definition at line 300 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, reg_begin(), and reg_end().

Referenced by replaceRegWith(), and verifyUseList().

removeRegOperandFromUseList()

void MachineRegisterInfo::removeRegOperandFromUseList

(

MachineOperand *

MO

)

Remove MO from its use-def list.

Definition at line 313 of file MachineRegisterInfo.cpp.

References assert(), and llvm::MachineOperand::getReg().

Referenced by llvm::MachineOperand::ChangeToRegister().

replaceRegWith()

void MachineRegisterInfo::replaceRegWith	(	Register	FromReg,
		Register	ToReg
	)

replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.

This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.

Note that it is usually necessary to first constrain ToReg's register class and register bank to match the FromReg constraints using one of the methods:

constrainRegClass(ToReg, getRegClass(FromReg)) constrainRegAttrs(ToReg, FromReg) RegisterBankInfo::constrainGenericRegister(ToReg, *MRI.getRegClass(FromReg), MRI)

These functions will return a falsy result if the virtual registers have incompatible constraints.

Note that if ToReg is a physical register the function will replace and apply sub registers to ToReg in order to obtain a final/proper physical register.

This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well. If ToReg is a physical register we apply the sub register to obtain the final/proper physical register.

Definition at line 389 of file MachineRegisterInfo.cpp.

References assert(), getTargetRegisterInfo(), llvm::Register::isPhysical(), llvm::make_early_inc_range(), reg_operands(), and TRI.

Referenced by insertBitcasts(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::CombinerHelper::replaceRegWith(), llvm::PeelingModuloScheduleExpander::rewriteUsesOf(), and llvm::TailDuplicator::tailDuplicateAndUpdate().

reservedRegsFrozen()

bool llvm::MachineRegisterInfo::reservedRegsFrozen ( ) const

inline

reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.

Definition at line 944 of file MachineRegisterInfo.h.

Referenced by canReserveReg(), getReservedRegs(), llvm::AArch64InstrInfo::probedStackAlloc(), and reserveReg().

reserveReg()

void llvm::MachineRegisterInfo::reserveReg ( MCRegister  PhysReg, const TargetRegisterInfo *  TRI  )

inline

reserveReg – Mark a register as reserved so checks like isAllocatable will not suggest using it.

This should not be used during the middle of a function walk, or when liveness info is available.

Definition at line 933 of file MachineRegisterInfo.h.

References assert(), reservedRegsFrozen(), and TRI.

resetDelegate()

void llvm::MachineRegisterInfo::resetDelegate ( Delegate *  delegate )

inline

Definition at line 161 of file MachineRegisterInfo.h.

References assert(), llvm::SmallPtrSetImpl< PtrType >::count(), and llvm::SmallPtrSetImpl< PtrType >::erase().

setCalleeSavedRegs()

void MachineRegisterInfo::setCalleeSavedRegs

(

ArrayRef< MCPhysReg >

CSRs

)

Sets the updated Callee Saved Registers list.

Notice that it will override ant previously disabled/saved CSRs.

Definition at line 641 of file MachineRegisterInfo.cpp.

References llvm::append_range().

Referenced by llvm::MIRParserImpl::parseRegisterInfo(), and llvm::AArch64RegisterInfo::UpdateCustomCalleeSavedRegs().

setRegAllocationHint()

void llvm::MachineRegisterInfo::setRegAllocationHint ( Register  VReg, unsigned  Type, Register  PrefReg  )

inline

setRegAllocationHint - Specify a register allocation hint for the specified virtual register.

This is typically used by target, and in case of an earlier hint it will be overwritten.

Definition at line 802 of file MachineRegisterInfo.h.

References assert(), llvm::IndexedMap< T, ToIndexT >::clear(), getNumVirtRegs(), llvm::IndexedMap< T, ToIndexT >::grow(), llvm::Register::index2VirtReg(), and llvm::Register::isVirtual().

Referenced by setSimpleHint().

setRegBank()

void MachineRegisterInfo::setRegBank	(	Register	Reg,
		const RegisterBank &	RegBank
	)

Set the register bank to RegBank for Reg.

Definition at line 63 of file MachineRegisterInfo.cpp.

Referenced by llvm::RegBankSelect::applyMapping(), llvm::RegBankSelect::assignInstr(), and llvm::CombinerHelper::setRegBank().

setRegClass()

void MachineRegisterInfo::setRegClass	(	Register	Reg,
		const TargetRegisterClass *	RC
	)

setRegClass - Set the register class of the specified virtual register.

Definition at line 58 of file MachineRegisterInfo.cpp.

References assert(), and llvm::TargetRegisterClass::isAllocatable().

Referenced by llvm::buildAtomicInitInst(), llvm::buildAtomicLoadInst(), llvm::buildAtomicStoreInst(), llvm::buildBoolRegister(), llvm::generateEnqueueInst(), llvm::generateImageMiscQueryInst(), llvm::generateImageSizeQueryInst(), llvm::generateWriteImageInst(), llvm::SPIRVGlobalRegistry::getOrCreateConstNullPtr(), llvm::SPIRVGlobalRegistry::getOrCreateUndef(), llvm::SPIRV::lowerBuiltin(), recomputeRegClass(), and llvm::PeelingModuloScheduleExpander::rewriteUsesOf().

setRegClassOrRegBank()

void llvm::MachineRegisterInfo::setRegClassOrRegBank ( Register  Reg, const RegClassOrRegBank &  RCOrRB  )

inline

Definition at line 697 of file MachineRegisterInfo.h.

References Reg.

Referenced by llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), and constrainRegAttrs().

setSimpleHint()

void llvm::MachineRegisterInfo::setSimpleHint ( Register  VReg, Register  PrefReg  )

inline

Specify the preferred (target independent) register allocation hint for the specified virtual register.

Definition at line 820 of file MachineRegisterInfo.h.

References setRegAllocationHint().

setType()

void MachineRegisterInfo::setType	(	Register	VReg,
		LLT	Ty
	)

Set the low-level type of VReg to Ty.

Definition at line 188 of file MachineRegisterInfo.cpp.

References llvm::IndexedMap< T, ToIndexT >::grow().

Referenced by allocateVGPR32Input(), llvm::buildBuiltinVariableLoad(), cloneVirtualRegister(), constrainRegAttrs(), createGenericVirtualRegister(), createVirtualRegister(), and llvm::SPIRV::lowerBuiltin().

shouldTrackSubRegLiveness() [1/2]

bool llvm::MachineRegisterInfo::shouldTrackSubRegLiveness ( const TargetRegisterClass &  RC ) const

inline

Returns true if liveness for register class RC should be tracked at the subregister level.

Definition at line 227 of file MachineRegisterInfo.h.

References llvm::TargetRegisterClass::HasDisjunctSubRegs, and subRegLivenessEnabled().

Referenced by shouldTrackSubRegLiveness().

shouldTrackSubRegLiveness() [2/2]

bool llvm::MachineRegisterInfo::shouldTrackSubRegLiveness ( Register  VReg ) const

inline

Definition at line 230 of file MachineRegisterInfo.h.

References assert(), getRegClassOrNull(), llvm::Register::isVirtual(), LLVM_LIKELY, and shouldTrackSubRegLiveness().

subRegLivenessEnabled()

bool llvm::MachineRegisterInfo::subRegLivenessEnabled ( ) const

inline

Definition at line 235 of file MachineRegisterInfo.h.

Referenced by llvm::LiveIntervals::addKillFlags(), and shouldTrackSubRegLiveness().

tracksLiveness()

bool llvm::MachineRegisterInfo::tracksLiveness ( ) const

inline

tracksLiveness - Returns true when tracking register liveness accurately.

(see MachineFUnctionProperties::Property description for details)

Definition at line 210 of file MachineRegisterInfo.h.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::hasProperty(), and llvm::MachineFunctionProperties::TracksLiveness.

Referenced by llvm::MIRPrinter::convert(), findRenameRegForSameLdStRegPair(), llvm::AArch64InstrInfo::getOutlinableRanges(), llvm::ARMBaseInstrInfo::isMBBSafeToOutlineFrom(), and llvm::MIRParserImpl::parseRegisterInfo().

updateDbgUsersToReg()

void llvm::MachineRegisterInfo::updateDbgUsersToReg ( MCRegister  OldReg, MCRegister  NewReg, ArrayRef< MachineInstr * >  Users  ) const

inline

updateDbgUsersToReg - Update a collection of debug instructions to refer to the designated register.

Definition at line 866 of file MachineRegisterInfo.h.

References assert(), getTargetRegisterInfo(), llvm_unreachable, MI, llvm::TargetRegisterInfo::regsOverlap(), and Users.

use_begin()

use_iterator llvm::MachineRegisterInfo::use_begin ( Register  RegNo ) const

inline

Definition at line 478 of file MachineRegisterInfo.h.

Referenced by use_empty(), and use_operands().

use_bundle_begin()

use_bundle_iterator llvm::MachineRegisterInfo::use_bundle_begin ( Register  RegNo ) const

inline

Definition at line 507 of file MachineRegisterInfo.h.

Referenced by use_bundles().

use_bundle_end()

static use_bundle_iterator llvm::MachineRegisterInfo::use_bundle_end ( )

inlinestatic

Definition at line 510 of file MachineRegisterInfo.h.

Referenced by use_bundles().

use_bundle_nodbg_begin()

use_bundle_nodbg_iterator llvm::MachineRegisterInfo::use_bundle_nodbg_begin ( Register  RegNo ) const

inline

Definition at line 566 of file MachineRegisterInfo.h.

Referenced by use_nodbg_bundles().

use_bundle_nodbg_end()

static use_bundle_nodbg_iterator llvm::MachineRegisterInfo::use_bundle_nodbg_end ( )

inlinestatic

Definition at line 569 of file MachineRegisterInfo.h.

Referenced by use_nodbg_bundles().

use_bundles()

iterator_range< use_bundle_iterator > llvm::MachineRegisterInfo::use_bundles ( Register  Reg ) const

inline

Definition at line 514 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, use_bundle_begin(), and use_bundle_end().

use_empty()

bool llvm::MachineRegisterInfo::use_empty ( Register  RegNo ) const

inline

use_empty - Return true if there are no instructions using the specified register.

Definition at line 520 of file MachineRegisterInfo.h.

References use_begin(), and use_end().

Referenced by llvm::NVPTXFrameLowering::emitPrologue(), and GetInitialOffset().

use_end()

static use_iterator llvm::MachineRegisterInfo::use_end ( )

inlinestatic

Definition at line 481 of file MachineRegisterInfo.h.

Referenced by use_empty(), and use_operands().

use_instr_begin()

use_instr_iterator llvm::MachineRegisterInfo::use_instr_begin ( Register  RegNo ) const

inline

Definition at line 491 of file MachineRegisterInfo.h.

Referenced by llvm::CombinerHelper::matchCombineInsertVecElts(), and use_instructions().

use_instr_end()

static use_instr_iterator llvm::MachineRegisterInfo::use_instr_end ( )

inlinestatic

Definition at line 494 of file MachineRegisterInfo.h.

Referenced by use_instructions().

use_instr_nodbg_begin()

use_instr_nodbg_iterator llvm::MachineRegisterInfo::use_instr_nodbg_begin ( Register  RegNo ) const

inline

Definition at line 549 of file MachineRegisterInfo.h.

Referenced by llvm::Combiner::WorkListMaintainerImpl< Lvl >::appliedCombine(), hasAtMostUserInstrs(), llvm::CombinerHelper::matchExtendThroughPhis(), and use_nodbg_instructions().

use_instr_nodbg_end()

static use_instr_nodbg_iterator llvm::MachineRegisterInfo::use_instr_nodbg_end ( )

inlinestatic

Definition at line 552 of file MachineRegisterInfo.h.

Referenced by hasAtMostUserInstrs(), and use_nodbg_instructions().

use_instructions()

iterator_range< use_instr_iterator > llvm::MachineRegisterInfo::use_instructions ( Register  Reg ) const

inline

Definition at line 499 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, use_instr_begin(), and use_instr_end().

Referenced by llvm::PeelingModuloScheduleExpander::CreateLCSSAExitingBlock(), dumpUses(), llvm::PeelingModuloScheduleExpander::filterInstructions(), llvm::PhiLoweringHelper::lowerPhis(), markUsesInDebugValueAsUndef(), llvm::CombinerHelper::matchCombineTruncOfShift(), llvm::PeelingModuloScheduleExpander::rewriteUsesOf(), and llvm::SelectionDAGISel::runOnMachineFunction().

use_nodbg_begin()

use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_begin ( Register  RegNo ) const

inline

Definition at line 532 of file MachineRegisterInfo.h.

Referenced by use_nodbg_empty(), and use_nodbg_operands().

use_nodbg_bundles()

iterator_range< use_bundle_nodbg_iterator > llvm::MachineRegisterInfo::use_nodbg_bundles ( Register  Reg ) const

inline

Definition at line 574 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, use_bundle_nodbg_begin(), and use_bundle_nodbg_end().

use_nodbg_empty()

bool llvm::MachineRegisterInfo::use_nodbg_empty ( Register  RegNo ) const

inline

use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register.

Definition at line 580 of file MachineRegisterInfo.h.

References use_nodbg_begin(), and use_nodbg_end().

Referenced by EmitLiveInCopies(), llvm::CombinerHelper::matchAddOverflow(), and llvm::CombinerHelper::matchCombineUnmergeWithDeadLanesToTrunc().

use_nodbg_end()

static use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_end ( )

inlinestatic

Definition at line 535 of file MachineRegisterInfo.h.

Referenced by use_nodbg_empty(), and use_nodbg_operands().

use_nodbg_instructions()

iterator_range< use_instr_nodbg_iterator > llvm::MachineRegisterInfo::use_nodbg_instructions ( Register  Reg ) const

inline

Definition at line 557 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, use_instr_nodbg_begin(), and use_instr_nodbg_end().

Referenced by llvm::Combiner::WorkListMaintainerImpl< Lvl >::addUsersToWorkList(), hasOneNonDBGUser(), llvm::CombinerHelper::matchCombineDivRem(), llvm::CombinerHelper::matchCombineExtendingLoads(), llvm::CombinerHelper::matchExtractAllEltsFromBuildVector(), and llvm::CombinerHelper::matchPtrAddImmedChain().

use_nodbg_operands()

iterator_range< use_nodbg_iterator > llvm::MachineRegisterInfo::use_nodbg_operands ( Register  Reg ) const

inline

Definition at line 540 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, use_nodbg_begin(), and use_nodbg_end().

Referenced by llvm::DeadLaneDetector::computeSubRegisterLaneBitInfo(), hasOneNonDBGUse(), llvm::LiveVariables::recomputeForSingleDefVirtReg(), and llvm::LiveIntervals::shrinkToUses().

use_operands()

iterator_range< use_iterator > llvm::MachineRegisterInfo::use_operands ( Register  Reg ) const

inline

Definition at line 483 of file MachineRegisterInfo.h.

References llvm::make_range(), Reg, use_begin(), and use_end().

Referenced by llvm::CombinerHelper::applyCombineExtendingLoads(), clearKillFlags(), llvm::ModuloScheduleExpander::expand(), hasOneUse(), and llvm::TailDuplicator::tailDuplicateAndUpdate().

verifyUseList()

void MachineRegisterInfo::verifyUseList

(

Register

Reg

)

const

Verify the sanity of the use list for Reg.

Definition at line 226 of file MachineRegisterInfo.cpp.

References assert(), llvm::errs(), llvm::MachineOperand::getParent(), llvm::MachineOperand::getReg(), getTargetRegisterInfo(), llvm::MachineOperand::isReg(), MI, llvm::printReg(), and reg_operands().

Referenced by clearVirtRegs(), and verifyUseLists().

verifyUseLists()

void MachineRegisterInfo::verifyUseLists

(

)

const

Verify the use list of all registers.

Definition at line 264 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), getTargetRegisterInfo(), llvm::Register::index2VirtReg(), and verifyUseList().

Friends And Related Function Documentation

defusechain_instr_iterator

template<bool , bool , bool , bool , bool , bool >

friend class defusechain_instr_iterator

friend

Definition at line 289 of file MachineRegisterInfo.h.

defusechain_iterator

template<bool , bool , bool , bool , bool , bool >

friend class defusechain_iterator

friend

Definition at line 287 of file MachineRegisterInfo.h.

---

The documentation for this class was generated from the following files:

• include/llvm/CodeGen/MachineRegisterInfo.h
• lib/CodeGen/MachineRegisterInfo.cpp