LLVM  14.0.0git
MachineSSAUpdater.cpp
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1 //===- MachineSSAUpdater.cpp - Unstructured SSA Update Tool ---------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the MachineSSAUpdater class. It's based on SSAUpdater
10 // class in lib/Transforms/Utils.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "llvm/ADT/DenseMap.h"
16 #include "llvm/ADT/SmallVector.h"
26 #include "llvm/IR/DebugLoc.h"
27 #include "llvm/Support/Debug.h"
31 #include <utility>
32 
33 using namespace llvm;
34 
35 #define DEBUG_TYPE "machine-ssaupdater"
36 
38 
39 static AvailableValsTy &getAvailableVals(void *AV) {
40  return *static_cast<AvailableValsTy*>(AV);
41 }
42 
45  : InsertedPHIs(NewPHI), TII(MF.getSubtarget().getInstrInfo()),
46  MRI(&MF.getRegInfo()) {}
47 
49  delete static_cast<AvailableValsTy*>(AV);
50 }
51 
52 /// Initialize - Reset this object to get ready for a new set of SSA
53 /// updates.
55  if (!AV)
56  AV = new AvailableValsTy();
57  else
58  getAvailableVals(AV).clear();
59 
60  VRC = RC;
61 }
62 
64  Initialize(MRI->getRegClass(V));
65 }
66 
67 /// HasValueForBlock - Return true if the MachineSSAUpdater already has a value for
68 /// the specified block.
70  return getAvailableVals(AV).count(BB);
71 }
72 
73 /// AddAvailableValue - Indicate that a rewritten value is available in the
74 /// specified block with the specified value.
76  getAvailableVals(AV)[BB] = V;
77 }
78 
79 /// GetValueAtEndOfBlock - Construct SSA form, materializing a value that is
80 /// live at the end of the specified block.
82  return GetValueAtEndOfBlockInternal(BB);
83 }
84 
85 static
87  SmallVectorImpl<std::pair<MachineBasicBlock *, Register>> &PredValues) {
88  if (BB->empty())
89  return Register();
90 
91  MachineBasicBlock::iterator I = BB->begin();
92  if (!I->isPHI())
93  return Register();
94 
95  AvailableValsTy AVals;
96  for (unsigned i = 0, e = PredValues.size(); i != e; ++i)
97  AVals[PredValues[i].first] = PredValues[i].second;
98  while (I != BB->end() && I->isPHI()) {
99  bool Same = true;
100  for (unsigned i = 1, e = I->getNumOperands(); i != e; i += 2) {
101  Register SrcReg = I->getOperand(i).getReg();
102  MachineBasicBlock *SrcBB = I->getOperand(i+1).getMBB();
103  if (AVals[SrcBB] != SrcReg) {
104  Same = false;
105  break;
106  }
107  }
108  if (Same)
109  return I->getOperand(0).getReg();
110  ++I;
111  }
112  return Register();
113 }
114 
115 /// InsertNewDef - Insert an empty PHI or IMPLICIT_DEF instruction which define
116 /// a value of the given register class at the start of the specified basic
117 /// block. It returns the virtual register defined by the instruction.
118 static
121  const TargetRegisterClass *RC,
123  const TargetInstrInfo *TII) {
124  Register NewVR = MRI->createVirtualRegister(RC);
125  return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR);
126 }
127 
128 /// GetValueInMiddleOfBlock - Construct SSA form, materializing a value that
129 /// is live in the middle of the specified block. If ExistingValueOnly is
130 /// true then this will only return an existing value or $noreg; otherwise new
131 /// instructions may be inserted to materialize a value.
132 ///
133 /// GetValueInMiddleOfBlock is the same as GetValueAtEndOfBlock except in one
134 /// important case: if there is a definition of the rewritten value after the
135 /// 'use' in BB. Consider code like this:
136 ///
137 /// X1 = ...
138 /// SomeBB:
139 /// use(X)
140 /// X2 = ...
141 /// br Cond, SomeBB, OutBB
142 ///
143 /// In this case, there are two values (X1 and X2) added to the AvailableVals
144 /// set by the client of the rewriter, and those values are both live out of
145 /// their respective blocks. However, the use of X happens in the *middle* of
146 /// a block. Because of this, we need to insert a new PHI node in SomeBB to
147 /// merge the appropriate values, and this value isn't live out of the block.
149  bool ExistingValueOnly) {
150  // If there is no definition of the renamed variable in this block, just use
151  // GetValueAtEndOfBlock to do our work.
152  if (!HasValueForBlock(BB))
153  return GetValueAtEndOfBlockInternal(BB, ExistingValueOnly);
154 
155  // If there are no predecessors, just return undef.
156  if (BB->pred_empty()) {
157  // If we cannot insert new instructions, just return $noreg.
158  if (ExistingValueOnly)
159  return Register();
160  // Insert an implicit_def to represent an undef value.
161  MachineInstr *NewDef = InsertNewDef(TargetOpcode::IMPLICIT_DEF,
162  BB, BB->getFirstTerminator(),
163  VRC, MRI, TII);
164  return NewDef->getOperand(0).getReg();
165  }
166 
167  // Otherwise, we have the hard case. Get the live-in values for each
168  // predecessor.
170  Register SingularValue;
171 
172  bool isFirstPred = true;
173  for (MachineBasicBlock *PredBB : BB->predecessors()) {
174  Register PredVal = GetValueAtEndOfBlockInternal(PredBB, ExistingValueOnly);
175  PredValues.push_back(std::make_pair(PredBB, PredVal));
176 
177  // Compute SingularValue.
178  if (isFirstPred) {
179  SingularValue = PredVal;
180  isFirstPred = false;
181  } else if (PredVal != SingularValue)
182  SingularValue = Register();
183  }
184 
185  // Otherwise, if all the merged values are the same, just use it.
186  if (SingularValue)
187  return SingularValue;
188 
189  // If an identical PHI is already in BB, just reuse it.
190  Register DupPHI = LookForIdenticalPHI(BB, PredValues);
191  if (DupPHI)
192  return DupPHI;
193 
194  // If we cannot create new instructions, return $noreg now.
195  if (ExistingValueOnly)
196  return Register();
197 
198  // Otherwise, we do need a PHI: insert one now.
199  MachineBasicBlock::iterator Loc = BB->empty() ? BB->end() : BB->begin();
200  MachineInstrBuilder InsertedPHI = InsertNewDef(TargetOpcode::PHI, BB,
201  Loc, VRC, MRI, TII);
202 
203  // Fill in all the predecessors of the PHI.
204  for (unsigned i = 0, e = PredValues.size(); i != e; ++i)
205  InsertedPHI.addReg(PredValues[i].second).addMBB(PredValues[i].first);
206 
207  // See if the PHI node can be merged to a single value. This can happen in
208  // loop cases when we get a PHI of itself and one other value.
209  if (unsigned ConstVal = InsertedPHI->isConstantValuePHI()) {
210  InsertedPHI->eraseFromParent();
211  return ConstVal;
212  }
213 
214  // If the client wants to know about all new instructions, tell it.
215  if (InsertedPHIs) InsertedPHIs->push_back(InsertedPHI);
216 
217  LLVM_DEBUG(dbgs() << " Inserted PHI: " << *InsertedPHI << "\n");
218  return InsertedPHI.getReg(0);
219 }
220 
221 static
223  MachineOperand *U) {
224  for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
225  if (&MI->getOperand(i) == U)
226  return MI->getOperand(i+1).getMBB();
227  }
228 
229  llvm_unreachable("MachineOperand::getParent() failure?");
230 }
231 
232 /// RewriteUse - Rewrite a use of the symbolic value. This handles PHI nodes,
233 /// which use their value in the corresponding predecessor.
236  Register NewVR;
237  if (UseMI->isPHI()) {
239  NewVR = GetValueAtEndOfBlockInternal(SourceBB);
240  } else {
242  }
243 
244  U.setReg(NewVR);
245 }
246 
247 namespace llvm {
248 
249 /// SSAUpdaterTraits<MachineSSAUpdater> - Traits for the SSAUpdaterImpl
250 /// template, specialized for MachineSSAUpdater.
251 template<>
253 public:
255  using ValT = Register;
258 
259  static BlkSucc_iterator BlkSucc_begin(BlkT *BB) { return BB->succ_begin(); }
260  static BlkSucc_iterator BlkSucc_end(BlkT *BB) { return BB->succ_end(); }
261 
262  /// Iterator for PHI operands.
263  class PHI_iterator {
264  private:
265  MachineInstr *PHI;
266  unsigned idx;
267 
268  public:
269  explicit PHI_iterator(MachineInstr *P) // begin iterator
270  : PHI(P), idx(1) {}
271  PHI_iterator(MachineInstr *P, bool) // end iterator
272  : PHI(P), idx(PHI->getNumOperands()) {}
273 
274  PHI_iterator &operator++() { idx += 2; return *this; }
275  bool operator==(const PHI_iterator& x) const { return idx == x.idx; }
276  bool operator!=(const PHI_iterator& x) const { return !operator==(x); }
277 
278  unsigned getIncomingValue() { return PHI->getOperand(idx).getReg(); }
279 
281  return PHI->getOperand(idx+1).getMBB();
282  }
283  };
284 
285  static inline PHI_iterator PHI_begin(PhiT *PHI) { return PHI_iterator(PHI); }
286 
287  static inline PHI_iterator PHI_end(PhiT *PHI) {
288  return PHI_iterator(PHI, true);
289  }
290 
291  /// FindPredecessorBlocks - Put the predecessors of BB into the Preds
292  /// vector.
295  append_range(*Preds, BB->predecessors());
296  }
297 
298  /// GetUndefVal - Create an IMPLICIT_DEF instruction with a new register.
299  /// Add it into the specified block and return the register.
301  MachineSSAUpdater *Updater) {
302  // Insert an implicit_def to represent an undef value.
303  MachineInstr *NewDef = InsertNewDef(TargetOpcode::IMPLICIT_DEF,
304  BB, BB->getFirstNonPHI(),
305  Updater->VRC, Updater->MRI,
306  Updater->TII);
307  return NewDef->getOperand(0).getReg();
308  }
309 
310  /// CreateEmptyPHI - Create a PHI instruction that defines a new register.
311  /// Add it into the specified block and return the register.
312  static Register CreateEmptyPHI(MachineBasicBlock *BB, unsigned NumPreds,
313  MachineSSAUpdater *Updater) {
314  MachineBasicBlock::iterator Loc = BB->empty() ? BB->end() : BB->begin();
315  MachineInstr *PHI = InsertNewDef(TargetOpcode::PHI, BB, Loc,
316  Updater->VRC, Updater->MRI,
317  Updater->TII);
318  return PHI->getOperand(0).getReg();
319  }
320 
321  /// AddPHIOperand - Add the specified value as an operand of the PHI for
322  /// the specified predecessor block.
323  static void AddPHIOperand(MachineInstr *PHI, Register Val,
324  MachineBasicBlock *Pred) {
325  MachineInstrBuilder(*Pred->getParent(), PHI).addReg(Val).addMBB(Pred);
326  }
327 
328  /// InstrIsPHI - Check if an instruction is a PHI.
330  if (I && I->isPHI())
331  return I;
332  return nullptr;
333  }
334 
335  /// ValueIsPHI - Check if the instruction that defines the specified register
336  /// is a PHI instruction.
338  return InstrIsPHI(Updater->MRI->getVRegDef(Val));
339  }
340 
341  /// ValueIsNewPHI - Like ValueIsPHI but also check if the PHI has no source
342  /// operands, i.e., it was just added.
344  MachineInstr *PHI = ValueIsPHI(Val, Updater);
345  if (PHI && PHI->getNumOperands() <= 1)
346  return PHI;
347  return nullptr;
348  }
349 
350  /// GetPHIValue - For the specified PHI instruction, return the register
351  /// that it defines.
353  return PHI->getOperand(0).getReg();
354  }
355 };
356 
357 } // end namespace llvm
358 
359 /// GetValueAtEndOfBlockInternal - Check to see if AvailableVals has an entry
360 /// for the specified BB and if so, return it. If not, construct SSA form by
361 /// first calculating the required placement of PHIs and then inserting new
362 /// PHIs where needed.
363 Register
364 MachineSSAUpdater::GetValueAtEndOfBlockInternal(MachineBasicBlock *BB,
365  bool ExistingValueOnly) {
366  AvailableValsTy &AvailableVals = getAvailableVals(AV);
367  Register ExistingVal = AvailableVals.lookup(BB);
368  if (ExistingVal || ExistingValueOnly)
369  return ExistingVal;
370 
371  SSAUpdaterImpl<MachineSSAUpdater> Impl(this, &AvailableVals, InsertedPHIs);
372  return Impl.GetValue(BB);
373 }
i
i
Definition: README.txt:29
llvm::SSAUpdaterTraits< MachineSSAUpdater >::GetUndefVal
static Register GetUndefVal(MachineBasicBlock *BB, MachineSSAUpdater *Updater)
GetUndefVal - Create an IMPLICIT_DEF instruction with a new register.
Definition: MachineSSAUpdater.cpp:300
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
MachineInstr.h
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
MachineSSAUpdater.h
UseMI
MachineInstrBuilder & UseMI
Definition: AArch64ExpandPseudoInsts.cpp:102
llvm::MachineRegisterInfo::createVirtualRegister
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
Definition: MachineRegisterInfo.cpp:158
llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_end
static PHI_iterator PHI_end(PhiT *PHI)
Definition: MachineSSAUpdater.cpp:287
llvm::SSAUpdaterTraits< MachineSSAUpdater >::BlkSucc_end
static BlkSucc_iterator BlkSucc_end(BlkT *BB)
Definition: MachineSSAUpdater.cpp:260
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::DenseMapBase::lookup
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
Definition: DenseMap.h:197
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
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This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1177
ErrorHandling.h
MachineBasicBlock.h
llvm::MachineInstr::isConstantValuePHI
unsigned isConstantValuePHI() const
If the specified instruction is a PHI that always merges together the same virtual register,...
Definition: MachineInstr.cpp:1427
DenseMap.h
TargetInstrInfo.h
llvm::DenseMapBase::count
size_type count(const_arg_type_t< KeyT > Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: DenseMap.h:145
LookForIdenticalPHI
static Register LookForIdenticalPHI(MachineBasicBlock *BB, SmallVectorImpl< std::pair< MachineBasicBlock *, Register >> &PredValues)
Definition: MachineSSAUpdater.cpp:86
llvm::SSAUpdaterTraits< MachineSSAUpdater >::BlkSucc_iterator
MachineBasicBlock::succ_iterator BlkSucc_iterator
Definition: MachineSSAUpdater.cpp:257
llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_iterator::operator!=
bool operator!=(const PHI_iterator &x) const
Definition: MachineSSAUpdater.cpp:276
llvm::SSAUpdaterTraits< MachineSSAUpdater >::FindPredecessorBlocks
static void FindPredecessorBlocks(MachineBasicBlock *BB, SmallVectorImpl< MachineBasicBlock * > *Preds)
FindPredecessorBlocks - Put the predecessors of BB into the Preds vector.
Definition: MachineSSAUpdater.cpp:293
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
findCorrespondingPred
static MachineBasicBlock * findCorrespondingPred(const MachineInstr *MI, MachineOperand *U)
Definition: MachineSSAUpdater.cpp:222
llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_iterator::getIncomingBlock
MachineBasicBlock * getIncomingBlock()
Definition: MachineSSAUpdater.cpp:280
llvm::SSAUpdaterTraits< MachineSSAUpdater >::CreateEmptyPHI
static Register CreateEmptyPHI(MachineBasicBlock *BB, unsigned NumPreds, MachineSSAUpdater *Updater)
CreateEmptyPHI - Create a PHI instruction that defines a new register.
Definition: MachineSSAUpdater.cpp:312
MachineRegisterInfo.h
llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_iterator::operator++
PHI_iterator & operator++()
Definition: MachineSSAUpdater.cpp:274
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::SSAUpdaterTraits< MachineSSAUpdater >::InstrIsPHI
static MachineInstr * InstrIsPHI(MachineInstr *I)
InstrIsPHI - Check if an instruction is a PHI.
Definition: MachineSSAUpdater.cpp:329
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::MachineInstrBuilder::addMBB
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:146
llvm::MachineInstr::getOperand
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:499
SSAUpdaterImpl.h
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
TargetOpcodes.h
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:127
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:49
llvm::SSAUpdaterTraits< MachineSSAUpdater >::ValueIsNewPHI
static MachineInstr * ValueIsNewPHI(Register Val, MachineSSAUpdater *Updater)
ValueIsNewPHI - Like ValueIsPHI but also check if the PHI has no source operands, i....
Definition: MachineSSAUpdater.cpp:343
llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_iterator::operator==
bool operator==(const PHI_iterator &x) const
Definition: MachineSSAUpdater.cpp:275
llvm::SSAUpdaterTraits< MachineSSAUpdater >::GetPHIValue
static Register GetPHIValue(MachineInstr *PHI)
GetPHIValue - For the specified PHI instruction, return the register that it defines.
Definition: MachineSSAUpdater.cpp:352
DebugLoc.h
llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_iterator::PHI_iterator
PHI_iterator(MachineInstr *P)
Definition: MachineSSAUpdater.cpp:269
llvm::MachineRegisterInfo::getVRegDef
MachineInstr * getVRegDef(Register Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is ...
Definition: MachineRegisterInfo.cpp:398
llvm::MachineOperand::getParent
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
Definition: MachineOperand.h:238
llvm::MachineInstrBuilder::getReg
Register getReg(unsigned Idx) const
Get the register for the operand index.
Definition: MachineInstrBuilder.h:94
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::MachineRegisterInfo::getRegClass
const TargetRegisterClass * getRegClass(Register Reg) const
Return the register class of the specified virtual register.
Definition: MachineRegisterInfo.h:634
llvm::MachineSSAUpdater::~MachineSSAUpdater
~MachineSSAUpdater()
Definition: MachineSSAUpdater.cpp:48
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std::vector< MachineBasicBlock * >::iterator succ_iterator
Definition: MachineBasicBlock.h:310
llvm::MachineSSAUpdater::MachineSSAUpdater
MachineSSAUpdater(MachineFunction &MF, SmallVectorImpl< MachineInstr * > *NewPHI=nullptr)
MachineSSAUpdater constructor.
Definition: MachineSSAUpdater.cpp:43
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void clear()
Definition: DenseMap.h:111
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::MachineInstrBuilder
Definition: MachineInstrBuilder.h:69
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
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Definition: DenseMap.h:714
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::MachineSSAUpdater::HasValueForBlock
bool HasValueForBlock(MachineBasicBlock *BB) const
HasValueForBlock - Return true if the MachineSSAUpdater already has a value for the specified block.
Definition: MachineSSAUpdater.cpp:69
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:229
llvm::operator==
bool operator==(uint64_t V1, const APInt &V2)
Definition: APInt.h:1986
llvm::MachineInstr::isPHI
bool isPHI() const
Definition: MachineInstr.h:1249
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
llvm::MachineOperand::getReg
Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:360
llvm::MachineFunction
Definition: MachineFunction.h:241
llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_begin
static PHI_iterator PHI_begin(PhiT *PHI)
Definition: MachineSSAUpdater.cpp:285
llvm::MachineOperand::getMBB
MachineBasicBlock * getMBB() const
Definition: MachineOperand.h:552
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:134
llvm::append_range
void append_range(Container &C, Range &&R)
Wrapper function to append a range to a container.
Definition: STLExtras.h:1846
TargetSubtargetInfo.h
llvm::SSAUpdaterTraits< MachineSSAUpdater >::BlkSucc_begin
static BlkSucc_iterator BlkSucc_begin(BlkT *BB)
Definition: MachineSSAUpdater.cpp:259
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const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:286
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_iterator::getIncomingValue
unsigned getIncomingValue()
Definition: MachineSSAUpdater.cpp:278
x
TODO unsigned x
Definition: README.txt:10
llvm::MachineSSAUpdater::GetValueAtEndOfBlock
Register GetValueAtEndOfBlock(MachineBasicBlock *BB)
GetValueAtEndOfBlock - Construct SSA form, materializing a value that is live at the end of the speci...
Definition: MachineSSAUpdater.cpp:81
InsertNewDef
static MachineInstrBuilder InsertNewDef(unsigned Opcode, MachineBasicBlock *BB, MachineBasicBlock::iterator I, const TargetRegisterClass *RC, MachineRegisterInfo *MRI, const TargetInstrInfo *TII)
InsertNewDef - Insert an empty PHI or IMPLICIT_DEF instruction which define a value of the given regi...
Definition: MachineSSAUpdater.cpp:119
llvm::MachineSSAUpdater::RewriteUse
void RewriteUse(MachineOperand &U)
RewriteUse - Rewrite a use of the symbolic value.
Definition: MachineSSAUpdater.cpp:234
llvm::SSAUpdaterTraits
Definition: MachineSSAUpdater.h:28
llvm::MachineSSAUpdater::GetValueInMiddleOfBlock
Register GetValueInMiddleOfBlock(MachineBasicBlock *BB, bool ExistingValueOnly=false)
GetValueInMiddleOfBlock - Construct SSA form, materializing a value that is live in the middle of the...
Definition: MachineSSAUpdater.cpp:148
llvm::SSAUpdaterTraits< MachineSSAUpdater >::ValueIsPHI
static MachineInstr * ValueIsPHI(Register Val, MachineSSAUpdater *Updater)
ValueIsPHI - Check if the instruction that defines the specified register is a PHI instruction.
Definition: MachineSSAUpdater.cpp:337
llvm::MachineSSAUpdater
MachineSSAUpdater - This class updates SSA form for a set of virtual registers defined in multiple bl...
Definition: MachineSSAUpdater.h:34
SmallVector.h
MachineInstrBuilder.h
llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_iterator::PHI_iterator
PHI_iterator(MachineInstr *P, bool)
Definition: MachineSSAUpdater.cpp:271
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:328
llvm::MachineOperand::setReg
void setReg(Register Reg)
Change the register this operand corresponds to.
Definition: MachineOperand.cpp:55
llvm::MachineInstr::getNumOperands
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:492
getAvailableVals
static AvailableValsTy & getAvailableVals(void *AV)
Definition: MachineSSAUpdater.cpp:39
llvm::SmallVectorImpl< MachineInstr * >
MachineOperand.h
llvm::SSAUpdaterTraits< MachineSSAUpdater >::AddPHIOperand
static void AddPHIOperand(MachineInstr *PHI, Register Val, MachineBasicBlock *Pred)
AddPHIOperand - Add the specified value as an operand of the PHI for the specified predecessor block.
Definition: MachineSSAUpdater.cpp:323
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::MachineSSAUpdater::AddAvailableValue
void AddAvailableValue(MachineBasicBlock *BB, Register V)
AddAvailableValue - Indicate that a rewritten value is available at the end of the specified block wi...
Definition: MachineSSAUpdater.cpp:75
llvm::MachineSSAUpdater::Initialize
void Initialize(Register V)
Initialize - Reset this object to get ready for a new set of SSA updates.
Definition: MachineSSAUpdater.cpp:63
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
raw_ostream.h
MachineFunction.h
llvm::MachineInstr::eraseFromParent
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
Definition: MachineInstr.cpp:680
llvm::MachineInstrBundleIterator< MachineInstr >
Debug.h
AvailableValsTy
DenseMap< MachineBasicBlock *, Register > AvailableValsTy
Definition: MachineSSAUpdater.cpp:37
llvm::SSAUpdaterImpl
Definition: SSAUpdaterImpl.h:30