LLVM  14.0.0git
Classes | Public Types | Public Member Functions | Static Public Member Functions | Friends | List of all members
llvm::MachineInstr Class Reference

Representation of each machine instruction. More...

#include "llvm/CodeGen/MachineInstr.h"

Inheritance diagram for llvm::MachineInstr:
Inheritance graph
[legend]
Collaboration diagram for llvm::MachineInstr:
Collaboration graph
[legend]

Public Types

enum  CommentFlag { ReloadReuse = 0x1, NoSchedComment = 0x2, TAsmComments = 0x4 }
 Flags to specify different kinds of comments to output in assembly code. More...
 
enum  MIFlag {
  NoFlags = 0, FrameSetup = 1 << 0, FrameDestroy = 1 << 1, BundledPred = 1 << 2,
  BundledSucc = 1 << 3, FmNoNans = 1 << 4, FmNoInfs = 1 << 5, FmNsz = 1 << 6,
  FmArcp = 1 << 7, FmContract = 1 << 8, FmAfn = 1 << 9, FmReassoc = 1 << 10,
  NoUWrap = 1 << 11, NoSWrap = 1 << 12, IsExact = 1 << 13, NoFPExcept = 1 << 14,
  NoMerge = 1 << 15
}
 
enum  QueryType { IgnoreBundle, AnyInBundle, AllInBundle }
 API for querying MachineInstr properties. More...
 
enum  MICheckType { CheckDefs, CheckKillDead, IgnoreDefs, IgnoreVRegDefs }
 
using mmo_iterator = ArrayRef< MachineMemOperand * >::iterator
 
using mop_iterator = MachineOperand *
 iterator/begin/end - Iterate over all operands of a machine instruction. More...
 
using const_mop_iterator = const MachineOperand *
 

Public Member Functions

 MachineInstr (const MachineInstr &)=delete
 
MachineInstroperator= (const MachineInstr &)=delete
 
 ~MachineInstr ()=delete
 
const MachineBasicBlockgetParent () const
 
MachineBasicBlockgetParent ()
 
void moveBefore (MachineInstr *MovePos)
 Move the instruction before MovePos. More...
 
const MachineFunctiongetMF () const
 Return the function that contains the basic block that this instruction belongs to. More...
 
MachineFunctiongetMF ()
 
uint8_t getAsmPrinterFlags () const
 Return the asm printer flags bitvector. More...
 
void clearAsmPrinterFlags ()
 Clear the AsmPrinter bitvector. More...
 
bool getAsmPrinterFlag (CommentFlag Flag) const
 Return whether an AsmPrinter flag is set. More...
 
void setAsmPrinterFlag (uint8_t Flag)
 Set a flag for the AsmPrinter. More...
 
void clearAsmPrinterFlag (CommentFlag Flag)
 Clear specific AsmPrinter flags. More...
 
uint16_t getFlags () const
 Return the MI flags bitvector. More...
 
bool getFlag (MIFlag Flag) const
 Return whether an MI flag is set. More...
 
void setFlag (MIFlag Flag)
 Set a MI flag. More...
 
void setFlags (unsigned flags)
 
void clearFlag (MIFlag Flag)
 clearFlag - Clear a MI flag. More...
 
bool isInsideBundle () const
 Return true if MI is in a bundle (but not the first MI in a bundle). More...
 
bool isBundled () const
 Return true if this instruction part of a bundle. More...
 
bool isBundledWithPred () const
 Return true if this instruction is part of a bundle, and it is not the first instruction in the bundle. More...
 
bool isBundledWithSucc () const
 Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle. More...
 
void bundleWithPred ()
 Bundle this instruction with its predecessor. More...
 
void bundleWithSucc ()
 Bundle this instruction with its successor. More...
 
void unbundleFromPred ()
 Break bundle above this instruction. More...
 
void unbundleFromSucc ()
 Break bundle below this instruction. More...
 
const DebugLocgetDebugLoc () const
 Returns the debug location id of this MachineInstr. More...
 
const MachineOperandgetDebugOffset () const
 Return the operand containing the offset to be used if this DBG_VALUE instruction is indirect; will be an invalid register if this value is not indirect, and an immediate with value 0 otherwise. More...
 
MachineOperandgetDebugOffset ()
 
const MachineOperandgetDebugVariableOp () const
 Return the operand for the debug variable referenced by this DBG_VALUE instruction. More...
 
MachineOperandgetDebugVariableOp ()
 
const DILocalVariablegetDebugVariable () const
 Return the debug variable referenced by this DBG_VALUE instruction. More...
 
const MachineOperandgetDebugExpressionOp () const
 Return the operand for the complex address expression referenced by this DBG_VALUE instruction. More...
 
MachineOperandgetDebugExpressionOp ()
 
const DIExpressiongetDebugExpression () const
 Return the complex address expression referenced by this DBG_VALUE instruction. More...
 
const DILabelgetDebugLabel () const
 Return the debug label referenced by this DBG_LABEL instruction. More...
 
unsigned getDebugInstrNum ()
 Fetch the instruction number of this MachineInstr. More...
 
unsigned getDebugInstrNum (MachineFunction &MF)
 Fetch instruction number of this MachineInstr – but before it's inserted into MF. More...
 
unsigned peekDebugInstrNum () const
 Examine the instruction number of this MachineInstr. More...
 
void setDebugInstrNum (unsigned Num)
 Set instruction number of this MachineInstr. More...
 
void dropDebugNumber ()
 Drop any variable location debugging information associated with this instruction. More...
 
void emitError (StringRef Msg) const
 Emit an error referring to the source location of this instruction. More...
 
const MCInstrDescgetDesc () const
 Returns the target instruction descriptor of this MachineInstr. More...
 
unsigned getOpcode () const
 Returns the opcode of this MachineInstr. More...
 
unsigned getNumOperands () const
 Retuns the total number of operands. More...
 
unsigned getNumDebugOperands () const
 Returns the total number of operands which are debug locations. More...
 
const MachineOperandgetOperand (unsigned i) const
 
MachineOperandgetOperand (unsigned i)
 
MachineOperandgetDebugOperand (unsigned Index)
 
const MachineOperandgetDebugOperand (unsigned Index) const
 
SmallSet< Register, 4 > getUsedDebugRegs () const
 
bool hasDebugOperandForReg (Register Reg) const
 Returns whether this debug value has at least one debug operand with the register Reg. More...
 
iterator_range< filter_iterator< const MachineOperand *, std::function< bool(const MachineOperand &Op)> > > getDebugOperandsForReg (Register Reg) const
 
iterator_range< filter_iterator< MachineOperand *, std::function< bool(MachineOperand &Op)> > > getDebugOperandsForReg (Register Reg)
 
bool isDebugOperand (const MachineOperand *Op) const
 
unsigned getDebugOperandIndex (const MachineOperand *Op) const
 
unsigned getNumDefs () const
 Returns the total number of definitions. More...
 
bool hasImplicitDef () const
 Returns true if the instruction has implicit definition. More...
 
unsigned getNumImplicitOperands () const
 Returns the implicit operands number. More...
 
bool isOperandSubregIdx (unsigned OpIdx) const
 Return true if operand OpIdx is a subregister index. More...
 
unsigned getNumExplicitOperands () const
 Returns the number of non-implicit operands. More...
 
unsigned getNumExplicitDefs () const
 Returns the number of non-implicit definitions. More...
 
mop_iterator operands_begin ()
 
mop_iterator operands_end ()
 
const_mop_iterator operands_begin () const
 
const_mop_iterator operands_end () const
 
iterator_range< mop_iteratoroperands ()
 
iterator_range< const_mop_iteratoroperands () const
 
iterator_range< mop_iteratorexplicit_operands ()
 
iterator_range< const_mop_iteratorexplicit_operands () const
 
iterator_range< mop_iteratorimplicit_operands ()
 
iterator_range< const_mop_iteratorimplicit_operands () const
 
iterator_range< mop_iteratordebug_operands ()
 Returns a range over all operands that are used to determine the variable location for this DBG_VALUE instruction. More...
 
iterator_range< const_mop_iteratordebug_operands () const
 Returns a range over all operands that are used to determine the variable location for this DBG_VALUE instruction. More...
 
iterator_range< mop_iteratordefs ()
 Returns a range over all explicit operands that are register definitions. More...
 
iterator_range< const_mop_iteratordefs () const
 Returns a range over all explicit operands that are register definitions. More...
 
iterator_range< mop_iteratoruses ()
 Returns a range that includes all operands that are register uses. More...
 
iterator_range< const_mop_iteratoruses () const
 Returns a range that includes all operands that are register uses. More...
 
iterator_range< mop_iteratorexplicit_uses ()
 
iterator_range< const_mop_iteratorexplicit_uses () const
 
unsigned getOperandNo (const_mop_iterator I) const
 Returns the number of the operand iterator I points to. More...
 
ArrayRef< MachineMemOperand * > memoperands () const
 Access to memory operands of the instruction. More...
 
mmo_iterator memoperands_begin () const
 Access to memory operands of the instruction. More...
 
mmo_iterator memoperands_end () const
 Access to memory operands of the instruction. More...
 
bool memoperands_empty () const
 Return true if we don't have any memory operands which described the memory access done by this instruction. More...
 
bool hasOneMemOperand () const
 Return true if this instruction has exactly one MachineMemOperand. More...
 
unsigned getNumMemOperands () const
 Return the number of memory operands. More...
 
MCSymbolgetPreInstrSymbol () const
 Helper to extract a pre-instruction symbol if one has been added. More...
 
MCSymbolgetPostInstrSymbol () const
 Helper to extract a post-instruction symbol if one has been added. More...
 
MDNodegetHeapAllocMarker () const
 Helper to extract a heap alloc marker if one has been added. More...
 
bool hasProperty (unsigned MCFlag, QueryType Type=AnyInBundle) const
 Return true if the instruction (or in the case of a bundle, the instructions inside the bundle) has the specified property. More...
 
bool isPreISelOpcode (QueryType Type=IgnoreBundle) const
 Return true if this is an instruction that should go through the usual legalization steps. More...
 
bool isVariadic (QueryType Type=IgnoreBundle) const
 Return true if this instruction can have a variable number of operands. More...
 
bool hasOptionalDef (QueryType Type=IgnoreBundle) const
 Set if this instruction has an optional definition, e.g. More...
 
bool isPseudo (QueryType Type=IgnoreBundle) const
 Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction. More...
 
bool isReturn (QueryType Type=AnyInBundle) const
 
bool isEHScopeReturn (QueryType Type=AnyInBundle) const
 Return true if this is an instruction that marks the end of an EH scope, i.e., a catchpad or a cleanuppad instruction. More...
 
bool isCall (QueryType Type=AnyInBundle) const
 
bool isCandidateForCallSiteEntry (QueryType Type=IgnoreBundle) const
 Return true if this is a call instruction that may have an associated call site entry in the debug info. More...
 
bool shouldUpdateCallSiteInfo () const
 Return true if copying, moving, or erasing this instruction requires updating Call Site Info (see copyCallSiteInfo, moveCallSiteInfo, eraseCallSiteInfo). More...
 
bool isBarrier (QueryType Type=AnyInBundle) const
 Returns true if the specified instruction stops control flow from executing the instruction immediately following it. More...
 
bool isTerminator (QueryType Type=AnyInBundle) const
 Returns true if this instruction part of the terminator for a basic block. More...
 
bool isBranch (QueryType Type=AnyInBundle) const
 Returns true if this is a conditional, unconditional, or indirect branch. More...
 
bool isIndirectBranch (QueryType Type=AnyInBundle) const
 Return true if this is an indirect branch, such as a branch through a register. More...
 
bool isConditionalBranch (QueryType Type=AnyInBundle) const
 Return true if this is a branch which may fall through to the next instruction or may transfer control flow to some other block. More...
 
bool isUnconditionalBranch (QueryType Type=AnyInBundle) const
 Return true if this is a branch which always transfers control flow to some other block. More...
 
bool isPredicable (QueryType Type=AllInBundle) const
 Return true if this instruction has a predicate operand that controls execution. More...
 
bool isCompare (QueryType Type=IgnoreBundle) const
 Return true if this instruction is a comparison. More...
 
bool isMoveImmediate (QueryType Type=IgnoreBundle) const
 Return true if this instruction is a move immediate (including conditional moves) instruction. More...
 
bool isMoveReg (QueryType Type=IgnoreBundle) const
 Return true if this instruction is a register move. More...
 
bool isBitcast (QueryType Type=IgnoreBundle) const
 Return true if this instruction is a bitcast instruction. More...
 
bool isSelect (QueryType Type=IgnoreBundle) const
 Return true if this instruction is a select instruction. More...
 
bool isNotDuplicable (QueryType Type=AnyInBundle) const
 Return true if this instruction cannot be safely duplicated. More...
 
bool isConvergent (QueryType Type=AnyInBundle) const
 Return true if this instruction is convergent. More...
 
bool hasDelaySlot (QueryType Type=AnyInBundle) const
 Returns true if the specified instruction has a delay slot which must be filled by the code generator. More...
 
bool canFoldAsLoad (QueryType Type=IgnoreBundle) const
 Return true for instructions that can be folded as memory operands in other instructions. More...
 
bool isRegSequenceLike (QueryType Type=IgnoreBundle) const
 Return true if this instruction behaves the same way as the generic REG_SEQUENCE instructions. More...
 
bool isExtractSubregLike (QueryType Type=IgnoreBundle) const
 Return true if this instruction behaves the same way as the generic EXTRACT_SUBREG instructions. More...
 
bool isInsertSubregLike (QueryType Type=IgnoreBundle) const
 Return true if this instruction behaves the same way as the generic INSERT_SUBREG instructions. More...
 
bool mayLoad (QueryType Type=AnyInBundle) const
 Return true if this instruction could possibly read memory. More...
 
bool mayStore (QueryType Type=AnyInBundle) const
 Return true if this instruction could possibly modify memory. More...
 
bool mayLoadOrStore (QueryType Type=AnyInBundle) const
 Return true if this instruction could possibly read or modify memory. More...
 
bool mayRaiseFPException () const
 Return true if this instruction could possibly raise a floating-point exception. More...
 
bool isCommutable (QueryType Type=IgnoreBundle) const
 Return true if this may be a 2- or 3-address instruction (of the form "X = op Y, Z, ..."), which produces the same result if Y and Z are exchanged. More...
 
bool isConvertibleTo3Addr (QueryType Type=IgnoreBundle) const
 Return true if this is a 2-address instruction which can be changed into a 3-address instruction if needed. More...
 
bool usesCustomInsertionHook (QueryType Type=IgnoreBundle) const
 Return true if this instruction requires custom insertion support when the DAG scheduler is inserting it into a machine basic block. More...
 
bool hasPostISelHook (QueryType Type=IgnoreBundle) const
 Return true if this instruction requires adjustment after instruction selection by calling a target hook. More...
 
bool isRematerializable (QueryType Type=AllInBundle) const
 Returns true if this instruction is a candidate for remat. More...
 
bool isAsCheapAsAMove (QueryType Type=AllInBundle) const
 Returns true if this instruction has the same cost (or less) than a move instruction. More...
 
bool hasExtraSrcRegAllocReq (QueryType Type=AnyInBundle) const
 Returns true if this instruction source operands have special register allocation requirements that are not captured by the operand register classes. More...
 
bool hasExtraDefRegAllocReq (QueryType Type=AnyInBundle) const
 Returns true if this instruction def operands have special register allocation requirements that are not captured by the operand register classes. More...
 
bool isIdenticalTo (const MachineInstr &Other, MICheckType Check=CheckDefs) const
 Return true if this instruction is identical to Other. More...
 
MachineInstrremoveFromParent ()
 Unlink 'this' from the containing basic block, and return it without deleting it. More...
 
MachineInstrremoveFromBundle ()
 Unlink this instruction from its basic block and return it without deleting it. More...
 
void eraseFromParent ()
 Unlink 'this' from the containing basic block and delete it. More...
 
void eraseFromParentAndMarkDBGValuesForRemoval ()
 Unlink 'this' from the containing basic block and delete it. More...
 
void eraseFromBundle ()
 Unlink 'this' form its basic block and delete it. More...
 
bool isEHLabel () const
 
bool isGCLabel () const
 
bool isAnnotationLabel () const
 
bool isLabel () const
 Returns true if the MachineInstr represents a label. More...
 
bool isCFIInstruction () const
 
bool isPseudoProbe () const
 
bool isPosition () const
 
bool isNonListDebugValue () const
 
bool isDebugValueList () const
 
bool isDebugValue () const
 
bool isDebugLabel () const
 
bool isDebugRef () const
 
bool isDebugPHI () const
 
bool isDebugInstr () const
 
bool isDebugOrPseudoInstr () const
 
bool isDebugOffsetImm () const
 
bool isIndirectDebugValue () const
 A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate. More...
 
bool isDebugEntryValue () const
 A DBG_VALUE is an entry value iff its debug expression contains the DW_OP_LLVM_entry_value operation. More...
 
bool isUndefDebugValue () const
 Return true if the instruction is a debug value which describes a part of a variable as unavailable. More...
 
bool isPHI () const
 
bool isKill () const
 
bool isImplicitDef () const
 
bool isInlineAsm () const
 
bool isMSInlineAsm () const
 FIXME: Seems like a layering violation that the AsmDialect, which is X86 specific, be attached to a generic MachineInstr. More...
 
bool isStackAligningInlineAsm () const
 
InlineAsm::AsmDialect getInlineAsmDialect () const
 
bool isInsertSubreg () const
 
bool isSubregToReg () const
 
bool isRegSequence () const
 
bool isBundle () const
 
bool isCopy () const
 
bool isFullCopy () const
 
bool isExtractSubreg () const
 
bool isCopyLike () const
 Return true if the instruction behaves like a copy. More...
 
bool isIdentityCopy () const
 Return true is the instruction is an identity copy. More...
 
bool isMetaInstruction () const
 Return true if this instruction doesn't produce any output in the form of executable instructions. More...
 
bool isTransient () const
 Return true if this is a transient instruction that is either very likely to be eliminated during register allocation (such as copy-like instructions), or if this instruction doesn't have an execution-time cost. More...
 
unsigned getBundleSize () const
 Return the number of instructions inside the MI bundle, excluding the bundle header. More...
 
bool readsRegister (Register Reg, const TargetRegisterInfo *TRI=nullptr) const
 Return true if the MachineInstr reads the specified register. More...
 
bool readsVirtualRegister (Register Reg) const
 Return true if the MachineInstr reads the specified virtual register. More...
 
std::pair< bool, bool > readsWritesVirtualRegister (Register Reg, SmallVectorImpl< unsigned > *Ops=nullptr) const
 Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg. More...
 
bool killsRegister (Register Reg, const TargetRegisterInfo *TRI=nullptr) const
 Return true if the MachineInstr kills the specified register. More...
 
bool definesRegister (Register Reg, const TargetRegisterInfo *TRI=nullptr) const
 Return true if the MachineInstr fully defines the specified register. More...
 
bool modifiesRegister (Register Reg, const TargetRegisterInfo *TRI=nullptr) const
 Return true if the MachineInstr modifies (fully define or partially define) the specified register. More...
 
bool registerDefIsDead (Register Reg, const TargetRegisterInfo *TRI=nullptr) const
 Returns true if the register is dead in this machine instruction. More...
 
bool hasRegisterImplicitUseOperand (Register Reg) const
 Returns true if the MachineInstr has an implicit-use operand of exactly the given register (not considering sub/super-registers). More...
 
int findRegisterUseOperandIdx (Register Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) const
 Returns the operand index that is a use of the specific register or -1 if it is not found. More...
 
MachineOperandfindRegisterUseOperand (Register Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr)
 Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an index. More...
 
const MachineOperandfindRegisterUseOperand (Register Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) const
 
int findRegisterDefOperandIdx (Register Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr) const
 Returns the operand index that is a def of the specified register or -1 if it is not found. More...
 
MachineOperandfindRegisterDefOperand (Register Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr)
 Wrapper for findRegisterDefOperandIdx, it returns a pointer to the MachineOperand rather than an index. More...
 
const MachineOperandfindRegisterDefOperand (Register Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr) const
 
int findFirstPredOperandIdx () const
 Find the index of the first operand in the operand list that is used to represent the predicate. More...
 
int findInlineAsmFlagIdx (unsigned OpIdx, unsigned *GroupNo=nullptr) const
 Find the index of the flag word operand that corresponds to operand OpIdx on an inline asm instruction. More...
 
const TargetRegisterClassgetRegClassConstraint (unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
 Compute the static register class constraint for operand OpIdx. More...
 
const TargetRegisterClassgetRegClassConstraintEffectForVReg (Register Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, bool ExploreBundle=false) const
 Applies the constraints (def/use) implied by this MI on Reg to the given CurRC. More...
 
const TargetRegisterClassgetRegClassConstraintEffect (unsigned OpIdx, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
 Applies the constraints (def/use) implied by the OpIdx operand to the given CurRC. More...
 
void tieOperands (unsigned DefIdx, unsigned UseIdx)
 Add a tie between the register operands at DefIdx and UseIdx. More...
 
unsigned findTiedOperandIdx (unsigned OpIdx) const
 Given the index of a tied register operand, find the operand it is tied to. More...
 
bool isRegTiedToUseOperand (unsigned DefOpIdx, unsigned *UseOpIdx=nullptr) const
 Given the index of a register def operand, check if the register def is tied to a source operand, due to either two-address elimination or inline assembly constraints. More...
 
bool isRegTiedToDefOperand (unsigned UseOpIdx, unsigned *DefOpIdx=nullptr) const
 Return true if the use operand of the specified index is tied to a def operand. More...
 
void clearKillInfo ()
 Clears kill flags on all operands. More...
 
void substituteRegister (Register FromReg, Register ToReg, unsigned SubIdx, const TargetRegisterInfo &RegInfo)
 Replace all occurrences of FromReg with ToReg:SubIdx, properly composing subreg indices where necessary. More...
 
bool addRegisterKilled (Register IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
 We have determined MI kills a register. More...
 
void clearRegisterKills (Register Reg, const TargetRegisterInfo *RegInfo)
 Clear all kill flags affecting Reg. More...
 
bool addRegisterDead (Register Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
 We have determined MI defined a register without a use. More...
 
void clearRegisterDeads (Register Reg)
 Clear all dead flags on operands defining register Reg. More...
 
void setRegisterDefReadUndef (Register Reg, bool IsUndef=true)
 Mark all subregister defs of register Reg with the undef flag. More...
 
void addRegisterDefined (Register Reg, const TargetRegisterInfo *RegInfo=nullptr)
 We have determined MI defines a register. More...
 
void setPhysRegsDeadExcept (ArrayRef< Register > UsedRegs, const TargetRegisterInfo &TRI)
 Mark every physreg used by this instruction as dead except those in the UsedRegs list. More...
 
bool isSafeToMove (AAResults *AA, bool &SawStore) const
 Return true if it is safe to move this instruction. More...
 
bool mayAlias (AAResults *AA, const MachineInstr &Other, bool UseTBAA) const
 Returns true if this instruction's memory access aliases the memory access of Other. More...
 
bool hasOrderedMemoryRef () const
 Return true if this instruction may have an ordered or volatile memory reference, or if the information describing the memory reference is not available. More...
 
bool isDereferenceableInvariantLoad (AAResults *AA) const
 Return true if this load instruction never traps and points to a memory location whose value doesn't change during the execution of this function. More...
 
unsigned isConstantValuePHI () const
 If the specified instruction is a PHI that always merges together the same virtual register, return the register, otherwise return 0. More...
 
bool hasUnmodeledSideEffects () const
 Return true if this instruction has side effects that are not modeled by mayLoad / mayStore, etc. More...
 
bool isLoadFoldBarrier () const
 Returns true if it is illegal to fold a load across this instruction. More...
 
bool allDefsAreDead () const
 Return true if all the defs of this instruction are dead. More...
 
Optional< unsigned > getSpillSize (const TargetInstrInfo *TII) const
 Return a valid size if the instruction is a spill instruction. More...
 
Optional< unsigned > getFoldedSpillSize (const TargetInstrInfo *TII) const
 Return a valid size if the instruction is a folded spill instruction. More...
 
Optional< unsigned > getRestoreSize (const TargetInstrInfo *TII) const
 Return a valid size if the instruction is a restore instruction. More...
 
Optional< unsigned > getFoldedRestoreSize (const TargetInstrInfo *TII) const
 Return a valid size if the instruction is a folded restore instruction. More...
 
void copyImplicitOps (MachineFunction &MF, const MachineInstr &MI)
 Copy implicit register operands from specified instruction to this instruction. More...
 
void addOperand (MachineFunction &MF, const MachineOperand &Op)
 Add the specified operand to the instruction. More...
 
void addOperand (const MachineOperand &Op)
 Add an operand without providing an MF reference. More...
 
void setDesc (const MCInstrDesc &tid)
 Replace the instruction descriptor (thus opcode) of the current instruction with a new one. More...
 
void setDebugLoc (DebugLoc dl)
 Replace current source information with new such. More...
 
void RemoveOperand (unsigned OpNo)
 Erase an operand from an instruction, leaving it with one fewer operand than it started with. More...
 
void dropMemRefs (MachineFunction &MF)
 Clear this MachineInstr's memory reference descriptor list. More...
 
void setMemRefs (MachineFunction &MF, ArrayRef< MachineMemOperand * > MemRefs)
 Assign this MachineInstr's memory reference descriptor list. More...
 
void addMemOperand (MachineFunction &MF, MachineMemOperand *MO)
 Add a MachineMemOperand to the machine instruction. More...
 
void cloneMemRefs (MachineFunction &MF, const MachineInstr &MI)
 Clone another MachineInstr's memory reference descriptor list and replace ours with it. More...
 
void cloneMergedMemRefs (MachineFunction &MF, ArrayRef< const MachineInstr * > MIs)
 Clone the merge of multiple MachineInstrs' memory reference descriptors list and replace ours with it. More...
 
void setPreInstrSymbol (MachineFunction &MF, MCSymbol *Symbol)
 Set a symbol that will be emitted just prior to the instruction itself. More...
 
void setPostInstrSymbol (MachineFunction &MF, MCSymbol *Symbol)
 Set a symbol that will be emitted just after the instruction itself. More...
 
void cloneInstrSymbols (MachineFunction &MF, const MachineInstr &MI)
 Clone another MachineInstr's pre- and post- instruction symbols and replace ours with it. More...
 
void setHeapAllocMarker (MachineFunction &MF, MDNode *MD)
 Set a marker on instructions that denotes where we should create and emit heap alloc site labels. More...
 
uint16_t mergeFlagsWith (const MachineInstr &Other) const
 Return the MIFlags which represent both MachineInstrs. More...
 
void copyIRFlags (const Instruction &I)
 Copy all flags to MachineInst MIFlags. More...
 
void untieRegOperand (unsigned OpIdx)
 Break any tie involving OpIdx. More...
 
void addImplicitDefUseOperands (MachineFunction &MF)
 Add all implicit def and use operands to this instruction. More...
 
void collectDebugValues (SmallVectorImpl< MachineInstr * > &DbgValues)
 Scan instructions immediately following MI and collect any matching DBG_VALUEs. More...
 
void changeDebugValuesDefReg (Register Reg)
 Find all DBG_VALUEs that point to the register def in this instruction and point them to Reg instead. More...
 
unsigned getIntrinsicID () const
 Returns the Intrinsic::ID for this instruction. More...
 
void setDebugValueUndef ()
 Sets all register debug operands in this debug value instruction to be undef. More...
 
LLT getTypeToPrint (unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
 Debugging supportDetermine the generic type to be printed (if needed) on uses and defs. More...
 
bool hasComplexRegisterTies () const
 Return true when an instruction has tied register that can't be determined by the instruction's descriptor. More...
 
void print (raw_ostream &OS, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const
 Print this MI to OS. More...
 
void print (raw_ostream &OS, ModuleSlotTracker &MST, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const
 
void dump () const
 
void dumpr (const MachineRegisterInfo &MRI, unsigned MaxDepth=UINT_MAX) const
 Print on dbgs() the current instruction and the instructions defining its operands and so on until we reach MaxDepth. More...
 
- Public Member Functions inherited from llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > >
MachineInstrgetPrevNode ()
 
const MachineInstrgetPrevNode () const
 Get the previous node, or nullptr for the list head. More...
 
MachineInstrgetNextNode ()
 Get the next node, or nullptr for the list tail. More...
 
const MachineInstrgetNextNode () const
 Get the next node, or nullptr for the list tail. More...
 
- Public Member Functions inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type >
self_iterator getIterator ()
 
const_self_iterator getIterator () const
 
reverse_self_iterator getReverseIterator ()
 
const_reverse_self_iterator getReverseIterator () const
 
bool isSentinel () const
 Check whether this is the sentinel node. More...
 

Static Public Member Functions

template<typename Operand , typename Instruction >
static iterator_range< filter_iterator< Operand *, std::function< bool(Operand &Op)> > > getDebugOperandsForReg (Instruction *MI, Register Reg)
 Returns a range of all of the operands that correspond to a debug use of Reg. More...
 
static uint16_t copyFlagsFromInstruction (const Instruction &I)
 

Friends

struct ilist_traits< MachineInstr >
 
struct ilist_callback_traits< MachineBasicBlock >
 
class MachineFunction
 

Additional Inherited Members

- Protected Types inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type >
using self_iterator = ilist_iterator< ilist_detail::compute_node_options< MachineInstr, Options... >::type, false, false >
 
using const_self_iterator = ilist_iterator< ilist_detail::compute_node_options< MachineInstr, Options... >::type, false, true >
 
using reverse_self_iterator = ilist_iterator< ilist_detail::compute_node_options< MachineInstr, Options... >::type, true, false >
 
using const_reverse_self_iterator = ilist_iterator< ilist_detail::compute_node_options< MachineInstr, Options... >::type, true, true >
 
- Protected Member Functions inherited from llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > >
 ilist_node_with_parent ()=default
 
- Protected Member Functions inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type >
 ilist_node_impl ()=default
 

Detailed Description

Representation of each machine instruction.

This class isn't a POD type, but it must have a trivial destructor. When a MachineFunction is deleted, all the contained MachineInstrs are deallocated without having their destructor called.

Definition at line 64 of file MachineInstr.h.

Member Typedef Documentation

◆ const_mop_iterator

Definition at line 610 of file MachineInstr.h.

◆ mmo_iterator

Definition at line 68 of file MachineInstr.h.

◆ mop_iterator

iterator/begin/end - Iterate over all operands of a machine instruction.

Definition at line 609 of file MachineInstr.h.

Member Enumeration Documentation

◆ CommentFlag

Flags to specify different kinds of comments to output in assembly code.

These flags carry semantic information not otherwise easily derivable from the IR text.

Enumerator
ReloadReuse 
NoSchedComment 
TAsmComments 

Definition at line 74 of file MachineInstr.h.

◆ MICheckType

Enumerator
CheckDefs 
CheckKillDead 
IgnoreDefs 
IgnoreVRegDefs 

Definition at line 1140 of file MachineInstr.h.

◆ MIFlag

Enumerator
NoFlags 
FrameSetup 
FrameDestroy 
BundledPred 
BundledSucc 
FmNoNans 
FmNoInfs 
FmNsz 
FmArcp 
FmContract 
FmAfn 
FmReassoc 
NoUWrap 
NoSWrap 
IsExact 
NoFPExcept 
NoMerge 

Definition at line 80 of file MachineInstr.h.

◆ QueryType

API for querying MachineInstr properties.

They are the same as MCInstrDesc queries but they are bundle aware.

Enumerator
IgnoreBundle 
AnyInBundle 
AllInBundle 

Definition at line 765 of file MachineInstr.h.

Constructor & Destructor Documentation

◆ MachineInstr()

llvm::MachineInstr::MachineInstr ( const MachineInstr )
delete

◆ ~MachineInstr()

llvm::MachineInstr::~MachineInstr ( )
delete

Member Function Documentation

◆ addImplicitDefUseOperands()

void MachineInstr::addImplicitDefUseOperands ( MachineFunction MF)

◆ addMemOperand()

void MachineInstr::addMemOperand ( MachineFunction MF,
MachineMemOperand MO 
)

Add a MachineMemOperand to the machine instruction.

This function should be used only occasionally. The setMemRefs function is the primary method for setting up a MachineInstr's MemRefs list.

Definition at line 382 of file MachineInstr.cpp.

References llvm::SmallVectorImpl< T >::append(), memoperands_begin(), memoperands_end(), and setMemRefs().

Referenced by llvm::TargetLoweringBase::emitPatchPoint(), and llvm::TargetInstrInfo::foldMemoryOperand().

◆ addOperand() [1/2]

void MachineInstr::addOperand ( const MachineOperand Op)

Add an operand without providing an MF reference.

This only works for instructions that are inserted in a basic block.

MachineInstrBuilder and the two-argument addOperand(MF, MO) should be preferred.

Definition at line 184 of file MachineInstr.cpp.

References addOperand(), assert(), llvm::MachineBasicBlock::getParent(), getParent(), and MBB.

◆ addOperand() [2/2]

void MachineInstr::addOperand ( MachineFunction MF,
const MachineOperand Op 
)

Add the specified operand to the instruction.

addOperand - Add the specified operand to the instruction.

If it is an implicit operand, it is added to the end of the operand list. If it is an explicit operand it is added at the end of the explicit operand list (before the first implicit operand).

MF must be the machine function that was used to allocate this instruction.

MachineInstrBuilder provides a more convenient interface for creating instructions and adding operands.

If it is an implicit operand, it is added to the end of the operand list. If it is an explicit operand it is added at the end of the explicit operand list (before the first implicit operand).

Definition at line 207 of file MachineInstr.cpp.

References llvm::MachineRegisterInfo::addRegOperandToUseList(), llvm::MachineFunction::allocateOperandArray(), assert(), llvm::MachineFunction::deallocateOperandArray(), llvm::MCOI::EARLY_CLOBBER, getNumOperands(), llvm::MCInstrDesc::getOperandConstraint(), isInlineAsm(), isReg(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), llvm::MCInstrDesc::isVariadic(), llvm::MachineOperand::MO_MCSymbol, llvm::MachineOperand::MO_Metadata, moveOperands(), MRI, llvm::MachineOperand::setIsEarlyClobber(), llvm::MCOI::TIED_TO, and tieOperands().

Referenced by addImplicitDefUseOperands(), addOperand(), addRegisterDead(), addRegisterDefined(), addRegisterKilled(), copyExtraImplicitOps(), copyImplicitOps(), llvm::XCoreFrameLowering::emitEpilogue(), llvm::HexagonFrameLowering::emitPrologue(), expandSGPRCopy(), LowerCallResults(), llvm::SIInstrInfo::moveToVALU(), and llvm::X86InstrInfo::replaceBranchWithTailCall().

◆ addRegisterDead()

bool MachineInstr::addRegisterDead ( Register  Reg,
const TargetRegisterInfo RegInfo,
bool  AddIfNotFound = false 
)

◆ addRegisterDefined()

void MachineInstr::addRegisterDefined ( Register  Reg,
const TargetRegisterInfo RegInfo = nullptr 
)

◆ addRegisterKilled()

bool MachineInstr::addRegisterKilled ( Register  IncomingReg,
const TargetRegisterInfo RegInfo,
bool  AddIfNotFound = false 
)

◆ allDefsAreDead()

bool MachineInstr::allDefsAreDead ( ) const

Return true if all the defs of this instruction are dead.

allDefsAreDead - Return true if all the defs of this instruction are dead.

Definition at line 1476 of file MachineInstr.cpp.

References llvm::MachineOperand::isDead(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), and operands().

◆ bundleWithPred()

void MachineInstr::bundleWithPred ( )

Bundle this instruction with its predecessor.

This can be an unbundled instruction, or it can be the first instruction in a bundle.

Definition at line 759 of file MachineInstr.cpp.

References assert(), BundledPred, BundledSucc, llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type >::getIterator(), isBundledWithPred(), and setFlag().

Referenced by llvm::MachineFunction::CloneMachineInstrBundle().

◆ bundleWithSucc()

void MachineInstr::bundleWithSucc ( )

Bundle this instruction with its successor.

This can be an unbundled instruction, or it can be the last instruction in a bundle.

Definition at line 768 of file MachineInstr.cpp.

References assert(), BundledPred, BundledSucc, llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type >::getIterator(), isBundledWithSucc(), and setFlag().

◆ canFoldAsLoad()

bool llvm::MachineInstr::canFoldAsLoad ( QueryType  Type = IgnoreBundle) const
inline

Return true for instructions that can be folded as memory operands in other instructions.

The most common use for this is instructions that are simple loads from memory that don't modify the loaded value in any way, but it can also be used for instructions that can be expressed as constant-pool loads, such as V_SETALLONES on x86, to allow them to be folded when it is beneficial. This should only be set on instructions that return a value in their only virtual register definition.

Definition at line 951 of file MachineInstr.h.

References llvm::MCID::FoldableAsLoad, and hasProperty().

Referenced by llvm::TargetInstrInfo::foldMemoryOperand().

◆ changeDebugValuesDefReg()

void MachineInstr::changeDebugValuesDefReg ( Register  Reg)

Find all DBG_VALUEs that point to the register def in this instruction and point them to Reg instead.

Definition at line 2297 of file MachineInstr.cpp.

References getOperand(), llvm::MachineOperand::getParent(), llvm::MachineOperand::getReg(), isReg(), MRI, Reg, and llvm::MachineRegisterInfo::use_operands().

◆ clearAsmPrinterFlag()

void llvm::MachineInstr::clearAsmPrinterFlag ( CommentFlag  Flag)
inline

Clear specific AsmPrinter flags.

Definition at line 320 of file MachineInstr.h.

◆ clearAsmPrinterFlags()

void llvm::MachineInstr::clearAsmPrinterFlags ( )
inline

Clear the AsmPrinter bitvector.

Definition at line 307 of file MachineInstr.h.

◆ clearFlag()

void llvm::MachineInstr::clearFlag ( MIFlag  Flag)
inline

◆ clearKillInfo()

void MachineInstr::clearKillInfo ( )

Clears kill flags on all operands.

clearKillInfo - Clears kill flags on all operands.

Definition at line 1202 of file MachineInstr.cpp.

References llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), operands(), and llvm::MachineOperand::setIsKill().

Referenced by llvm::LanaiInstrInfo::optimizeSelect(), and llvm::ARMBaseInstrInfo::optimizeSelect().

◆ clearRegisterDeads()

void MachineInstr::clearRegisterDeads ( Register  Reg)

Clear all dead flags on operands defining register Reg.

Definition at line 2010 of file MachineInstr.cpp.

References llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), operands(), Reg, and llvm::MachineOperand::setIsDead().

◆ clearRegisterKills()

void MachineInstr::clearRegisterKills ( Register  Reg,
const TargetRegisterInfo RegInfo 
)

◆ cloneInstrSymbols()

void MachineInstr::cloneInstrSymbols ( MachineFunction MF,
const MachineInstr MI 
)

Clone another MachineInstr's pre- and post- instruction symbols and replace ours with it.

Definition at line 514 of file MachineInstr.cpp.

References assert(), MI, setHeapAllocMarker(), setPostInstrSymbol(), and setPreInstrSymbol().

Referenced by llvm::TargetInstrInfo::foldMemoryOperand().

◆ cloneMemRefs()

void MachineInstr::cloneMemRefs ( MachineFunction MF,
const MachineInstr MI 
)

Clone another MachineInstr's memory reference descriptor list and replace ours with it.

Note that *this may be the incoming MI!

Prefer this API whenever possible as it can avoid allocations in common cases.

Definition at line 390 of file MachineInstr.cpp.

References assert(), getHeapAllocMarker(), getPostInstrSymbol(), getPreInstrSymbol(), MI, and setMemRefs().

Referenced by cloneMergedMemRefs().

◆ cloneMergedMemRefs()

void MachineInstr::cloneMergedMemRefs ( MachineFunction MF,
ArrayRef< const MachineInstr * >  MIs 
)

Clone the merge of multiple MachineInstrs' memory reference descriptors list and replace ours with it.

Note that *this may be one of the incoming MIs!

Prefer this API whenever possible as it can avoid allocations in common cases.

Definition at line 424 of file MachineInstr.cpp.

References llvm::SmallVectorImpl< T >::append(), assert(), cloneMemRefs(), dropMemRefs(), llvm::ArrayRef< T >::empty(), getMF(), hasIdenticalMMOs(), llvm::make_pointee_range(), memoperands(), memoperands_begin(), memoperands_empty(), memoperands_end(), MI, setMemRefs(), llvm::ArrayRef< T >::size(), and llvm::ArrayRef< T >::slice().

◆ collectDebugValues()

void MachineInstr::collectDebugValues ( SmallVectorImpl< MachineInstr * > &  DbgValues)

Scan instructions immediately following MI and collect any matching DBG_VALUEs.

Definition at line 2281 of file MachineInstr.cpp.

References MI.

Referenced by emitSelectPseudo().

◆ copyFlagsFromInstruction()

uint16_t MachineInstr::copyFlagsFromInstruction ( const Instruction I)
static

◆ copyImplicitOps()

void MachineInstr::copyImplicitOps ( MachineFunction MF,
const MachineInstr MI 
)

Copy implicit register operands from specified instruction to this instruction.

copyImplicitOps - Copy implicit register operands from specified instruction to this instruction.

Definition at line 1488 of file MachineInstr.cpp.

References addOperand(), llvm::numbers::e, i, llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), and MI.

◆ copyIRFlags()

void MachineInstr::copyIRFlags ( const Instruction I)

Copy all flags to MachineInst MIFlags.

Definition at line 572 of file MachineInstr.cpp.

References copyFlagsFromInstruction(), and I.

◆ debug_operands() [1/2]

iterator_range<mop_iterator> llvm::MachineInstr::debug_operands ( )
inline

Returns a range over all operands that are used to determine the variable location for this DBG_VALUE instruction.

Definition at line 640 of file MachineInstr.h.

References assert(), isDebugValue(), isDebugValueList(), llvm::make_range(), operands_begin(), and operands_end().

Referenced by llvm::buildDbgValueForSpill(), getDebugOperand(), getDebugOperandIndex(), getNumDebugOperands(), getUsedDebugRegs(), hasDebugOperandForReg(), isDebugOperand(), isUndefDebugValue(), setDebugValueUndef(), and validThroughout().

◆ debug_operands() [2/2]

iterator_range<const_mop_iterator> llvm::MachineInstr::debug_operands ( ) const
inline

Returns a range over all operands that are used to determine the variable location for this DBG_VALUE instruction.

Definition at line 647 of file MachineInstr.h.

References assert(), isDebugValue(), isDebugValueList(), llvm::make_range(), operands_begin(), and operands_end().

◆ definesRegister()

bool llvm::MachineInstr::definesRegister ( Register  Reg,
const TargetRegisterInfo TRI = nullptr 
) const
inline

Return true if the MachineInstr fully defines the specified register.

If TargetRegisterInfo is passed, then it also checks if there is a def of a super-register. NOTE: It's ignoring subreg indices on virtual registers.

Definition at line 1398 of file MachineInstr.h.

References findRegisterDefOperandIdx(), Reg, and TRI.

Referenced by checkAndUpdateCCRKill(), checkAndUpdateCPSRKill(), checkCCKill(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), isCCSelectPair(), isEFLAGSLiveAfter(), and llvm::AArch64InstrInfo::optimizeCompareInstr().

◆ defs() [1/2]

iterator_range<mop_iterator> llvm::MachineInstr::defs ( )
inline

Returns a range over all explicit operands that are register definitions.

Implicit definition are not included!

Definition at line 655 of file MachineInstr.h.

References getNumExplicitDefs(), llvm::make_range(), and operands_begin().

Referenced by findSingleRegDef(), isSafeToMove(), LowerCallResults(), and llvm::PeelSingleBlockLoop().

◆ defs() [2/2]

iterator_range<const_mop_iterator> llvm::MachineInstr::defs ( ) const
inline

Returns a range over all explicit operands that are register definitions.

Implicit definition are not included!

Definition at line 660 of file MachineInstr.h.

References getNumExplicitDefs(), llvm::make_range(), and operands_begin().

◆ dropDebugNumber()

void llvm::MachineInstr::dropDebugNumber ( )
inline

Drop any variable location debugging information associated with this instruction.

Use when an instruction is modified in such a way that it no longer defines the value it used to. Variable locations using that value will be dropped.

Definition at line 475 of file MachineInstr.h.

Referenced by llvm::X86InstrInfo::optimizeCompareInstr().

◆ dropMemRefs()

void MachineInstr::dropMemRefs ( MachineFunction MF)

Clear this MachineInstr's memory reference descriptor list.

This resets the memrefs to their most conservative state. This should be used only as a last resort since it greatly pessimizes our knowledge of the memory access performed by the instruction.

Definition at line 363 of file MachineInstr.cpp.

References getHeapAllocMarker(), getPostInstrSymbol(), getPreInstrSymbol(), and memoperands_empty().

Referenced by cloneMergedMemRefs(), and setMemRefs().

◆ dump()

LLVM_DUMP_METHOD void MachineInstr::dump ( ) const

◆ dumpr()

LLVM_DUMP_METHOD void MachineInstr::dumpr ( const MachineRegisterInfo MRI,
unsigned  MaxDepth = UINT_MAX 
) const

Print on dbgs() the current instruction and the instructions defining its operands and so on until we reach MaxDepth.

Definition at line 1570 of file MachineInstr.cpp.

References MaxDepth, and MRI.

◆ emitError()

void MachineInstr::emitError ( StringRef  Msg) const

Emit an error referring to the source location of this instruction.

This should only be used for inline assembly that is somehow impossible to compile. Other errors should have been handled much earlier.

If this method returns, the caller should try to recover from the error.

Definition at line 2084 of file MachineInstr.cpp.

References llvm::LLVMContext::emitError(), llvm::Module::getContext(), llvm::MachineFunction::getMMI(), llvm::MachineModuleInfo::getModule(), getNumOperands(), llvm::MDNode::getNumOperands(), getOperand(), llvm::MDNode::getOperand(), llvm::MachineBasicBlock::getParent(), getParent(), i, MBB, and llvm::report_fatal_error().

◆ eraseFromBundle()

void MachineInstr::eraseFromBundle ( )

Unlink 'this' form its basic block and delete it.

If the instruction is part of a bundle, the other instructions in the bundle remain bundled.

Definition at line 702 of file MachineInstr.cpp.

References assert(), llvm::MachineBasicBlock::erase_instr(), and getParent().

◆ eraseFromParent()

void MachineInstr::eraseFromParent ( )

Unlink 'this' from the containing basic block and delete it.

If this instruction is the header of a bundle, the whole bundle is erased. This function can not be used for instructions inside a bundle, use eraseFromBundle() to erase individual bundled instructions.

Definition at line 677 of file MachineInstr.cpp.

References assert(), llvm::MachineBasicBlock::erase(), and getParent().

Referenced by llvm::ARCInstrInfo::analyzeBranch(), llvm::VEInstrInfo::analyzeBranch(), llvm::SparcInstrInfo::analyzeBranch(), llvm::MipsInstrInfo::analyzeBranch(), llvm::ARMBaseInstrInfo::analyzeBranch(), llvm::AArch64InstrInfo::analyzeBranch(), llvm::CombinerHelper::applyCombineDivRem(), llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::CombinerHelper::applyExtendThroughPhis(), llvm::createMemLibcall(), emitSelectPseudo(), llvm::M68kInstrInfo::ExpandMOVEM(), llvm::M68kInstrInfo::ExpandMOVSZX_RR(), llvm::M68kInstrInfo::ExpandMOVX_RR(), llvm::M68kInstrInfo::ExpandPUSH_POP(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldVGPRCopyIntoRegSequence(), llvm::HexagonInstrInfo::genAllInsnTimingClasses(), llvm::MachineSSAUpdater::GetValueInMiddleOfBlock(), llvm::SystemZELFFrameLowering::inlineStackProbe(), LowerCallResults(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerStore(), matchSwap(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), llvm::SIInstrInfo::moveToVALU(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::SIInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::LegalizerHelper::reduceLoadStoreWidth(), RemoveDeadAddBetweenLEAAndJT(), llvm::FastISel::selectPatchpoint(), and splitMBB().

◆ eraseFromParentAndMarkDBGValuesForRemoval()

void MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval ( )

Unlink 'this' from the containing basic block and delete it.

For all definitions mark their uses in DBG_VALUE nodes as undefined. Otherwise like eraseFromParent().

Definition at line 682 of file MachineInstr.cpp.

References assert(), llvm::MachineBasicBlock::getParent(), getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineRegisterInfo::markUsesInDebugValueAsUndef(), MBB, MI, MRI, and Reg.

Referenced by llvm::CombinerHelper::applyShiftOfShiftedLogic(), and llvm::Combiner::combineMachineInstrs().

◆ explicit_operands() [1/2]

iterator_range<mop_iterator> llvm::MachineInstr::explicit_operands ( )
inline

Definition at line 624 of file MachineInstr.h.

References getNumExplicitOperands(), llvm::make_range(), and operands_begin().

Referenced by implicit_operands().

◆ explicit_operands() [2/2]

iterator_range<const_mop_iterator> llvm::MachineInstr::explicit_operands ( ) const
inline

Definition at line 628 of file MachineInstr.h.

References getNumExplicitOperands(), llvm::make_range(), and operands_begin().

◆ explicit_uses() [1/2]

iterator_range<mop_iterator> llvm::MachineInstr::explicit_uses ( )
inline

◆ explicit_uses() [2/2]

iterator_range<const_mop_iterator> llvm::MachineInstr::explicit_uses ( ) const
inline

◆ findFirstPredOperandIdx()

int MachineInstr::findFirstPredOperandIdx ( ) const

Find the index of the first operand in the operand list that is used to represent the predicate.

findFirstPredOperandIdx() - Find the index of the first operand in the operand list that is used to represent the predicate.

It returns -1 if none is found.

Definition at line 1069 of file MachineInstr.cpp.

References llvm::numbers::e, getDesc(), getNumOperands(), i, llvm::MCInstrDesc::isPredicable(), llvm::MCOperandInfo::isPredicate(), and llvm::MCInstrDesc::OpInfo.

Referenced by llvm::ARMBaseInstrInfo::commuteInstructionImpl().

◆ findInlineAsmFlagIdx()

int MachineInstr::findInlineAsmFlagIdx ( unsigned  OpIdx,
unsigned *  GroupNo = nullptr 
) const

Find the index of the flag word operand that corresponds to operand OpIdx on an inline asm instruction.

Returns -1 if getOperand(OpIdx) does not belong to an inline asm operand group.

If GroupNo is not NULL, it will receive the number of the operand group containing OpIdx.

Definition at line 810 of file MachineInstr.cpp.

References assert(), llvm::numbers::e, llvm::MachineOperand::getImm(), llvm::InlineAsm::getNumOperandRegisters(), getNumOperands(), getOperand(), i, llvm::MachineOperand::isImm(), isInlineAsm(), and llvm::InlineAsm::MIOp_FirstOperand.

Referenced by addRegisterDead(), addRegisterKilled(), and getRegClassConstraint().

◆ findRegisterDefOperand() [1/2]

MachineOperand* llvm::MachineInstr::findRegisterDefOperand ( Register  Reg,
bool  isDead = false,
bool  Overlap = false,
const TargetRegisterInfo TRI = nullptr 
)
inline

◆ findRegisterDefOperand() [2/2]

const MachineOperand* llvm::MachineInstr::findRegisterDefOperand ( Register  Reg,
bool  isDead = false,
bool  Overlap = false,
const TargetRegisterInfo TRI = nullptr 
) const
inline

Definition at line 1465 of file MachineInstr.h.

References findRegisterDefOperand(), Reg, and TRI.

◆ findRegisterDefOperandIdx()

int MachineInstr::findRegisterDefOperandIdx ( Register  Reg,
bool  isDead = false,
bool  Overlap = false,
const TargetRegisterInfo TRI = nullptr 
) const

Returns the operand index that is a def of the specified register or -1 if it is not found.

findRegisterDefOperandIdx() - Returns the operand index that is a def of the specified register or -1 if it is not found.

If isDead is true, defs that are not dead are skipped. If Overlap is true, then it also looks for defs that merely overlap the specified register. If TargetRegisterInfo is non-null, then it also checks if there is a def of a super-register. This may also return a register mask operand when Overlap is true.

If isDead is true, defs that are not dead are skipped. If TargetRegisterInfo is non-null, then it also checks if there is a def of a super-register.

Definition at line 1041 of file MachineInstr.cpp.

References llvm::MachineOperand::clobbersPhysReg(), llvm::numbers::e, getNumOperands(), getOperand(), llvm::MachineOperand::getReg(), i, llvm::MachineOperand::isDead(), llvm::MachineOperand::isDef(), llvm::Register::isPhysicalRegister(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), llvm::MCRegisterInfo::isSubRegister(), Reg, llvm::TargetRegisterInfo::regsOverlap(), and TRI.

Referenced by canFoldIntoCSel(), definesRegister(), findRegisterDefOperand(), getMaddPatterns(), hasSameValue(), llvm::CombinerHelper::matchEqualDefs(), modifiesRegister(), llvm::SIInstrInfo::moveToVALU(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), and registerDefIsDead().

◆ findRegisterUseOperand() [1/2]

MachineOperand* llvm::MachineInstr::findRegisterUseOperand ( Register  Reg,
bool  isKill = false,
const TargetRegisterInfo TRI = nullptr 
)
inline

Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an index.

Definition at line 1431 of file MachineInstr.h.

References findRegisterUseOperandIdx(), getOperand(), isKill(), Reg, and TRI.

Referenced by findRegisterUseOperand().

◆ findRegisterUseOperand() [2/2]

const MachineOperand* llvm::MachineInstr::findRegisterUseOperand ( Register  Reg,
bool  isKill = false,
const TargetRegisterInfo TRI = nullptr 
) const
inline

Definition at line 1437 of file MachineInstr.h.

References findRegisterUseOperand(), isKill(), Reg, and TRI.

◆ findRegisterUseOperandIdx()

int MachineInstr::findRegisterUseOperandIdx ( Register  Reg,
bool  isKill = false,
const TargetRegisterInfo TRI = nullptr 
) const

Returns the operand index that is a use of the specific register or -1 if it is not found.

findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of the specific register or -1 if it is not found.

It further tightens the search criteria to a use that kills the register if isKill is true.

Definition at line 992 of file MachineInstr.cpp.

References llvm::numbers::e, getNumOperands(), getOperand(), llvm::MachineOperand::getReg(), i, llvm::MachineOperand::isKill(), isKill(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), Reg, llvm::TargetRegisterInfo::regsOverlap(), and TRI.

Referenced by findCondCodeUseOperandIdxForBranchOrSelect(), findRegisterUseOperand(), llvm::PPCInstrInfo::fixupIsDeadOrKill(), killsRegister(), and readsRegister().

◆ findTiedOperandIdx()

unsigned MachineInstr::findTiedOperandIdx ( unsigned  OpIdx) const

◆ getAsmPrinterFlag()

bool llvm::MachineInstr::getAsmPrinterFlag ( CommentFlag  Flag) const
inline

Return whether an AsmPrinter flag is set.

Definition at line 310 of file MachineInstr.h.

◆ getAsmPrinterFlags()

uint8_t llvm::MachineInstr::getAsmPrinterFlags ( ) const
inline

Return the asm printer flags bitvector.

Definition at line 304 of file MachineInstr.h.

◆ getBundleSize()

unsigned MachineInstr::getBundleSize ( ) const

Return the number of instructions inside the MI bundle, excluding the bundle header.

Return the number of instructions inside the MI bundle, not counting the header instruction.

This is the number of instructions that MachineBasicBlock::iterator skips, 0 for unbundled instructions.

Definition at line 968 of file MachineInstr.cpp.

References llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type >::getIterator(), I, and llvm::Check::Size.

◆ getDebugExpression()

const DIExpression * MachineInstr::getDebugExpression ( ) const

Return the complex address expression referenced by this DBG_VALUE instruction.

Definition at line 871 of file MachineInstr.cpp.

References getDebugExpressionOp().

Referenced by handleNewDebugValue(), llvm::DbgVariable::initializeDbgValue(), and isDebugEntryValue().

◆ getDebugExpressionOp() [1/2]

MachineOperand& llvm::MachineInstr::getDebugExpressionOp ( )

◆ getDebugExpressionOp() [2/2]

MachineOperand & MachineInstr::getDebugExpressionOp ( ) const

Return the operand for the complex address expression referenced by this DBG_VALUE instruction.

Definition at line 859 of file MachineInstr.cpp.

References assert(), getOperand(), isDebugRef(), isDebugValue(), and isDebugValueList().

Referenced by getDebugExpression(), and llvm::updateDbgValueForSpill().

◆ getDebugInstrNum() [1/2]

unsigned MachineInstr::getDebugInstrNum ( )

Fetch the instruction number of this MachineInstr.

If it does not have one already, a new and unique number will be assigned.

Definition at line 2372 of file MachineInstr.cpp.

References llvm::MachineFunction::getNewDebugInstrNum(), llvm::MachineBasicBlock::getParent(), and getParent().

Referenced by llvm::MachineFunction::salvageCopySSA().

◆ getDebugInstrNum() [2/2]

unsigned MachineInstr::getDebugInstrNum ( MachineFunction MF)

Fetch instruction number of this MachineInstr – but before it's inserted into MF.

Needed for transformations that create an instruction but don't immediately insert them.

Definition at line 2378 of file MachineInstr.cpp.

References llvm::MachineFunction::getNewDebugInstrNum().

◆ getDebugLabel()

const DILabel * MachineInstr::getDebugLabel ( ) const

Return the debug label referenced by this DBG_LABEL instruction.

Definition at line 838 of file MachineInstr.cpp.

References assert(), getOperand(), and isDebugLabel().

◆ getDebugLoc()

const DebugLoc& llvm::MachineInstr::getDebugLoc ( ) const
inline

◆ getDebugOffset() [1/2]

MachineOperand& llvm::MachineInstr::getDebugOffset ( )
inline

Definition at line 427 of file MachineInstr.h.

References assert(), getOperand(), and isNonListDebugValue().

◆ getDebugOffset() [2/2]

const MachineOperand& llvm::MachineInstr::getDebugOffset ( ) const
inline

Return the operand containing the offset to be used if this DBG_VALUE instruction is indirect; will be an invalid register if this value is not indirect, and an immediate with value 0 otherwise.

Definition at line 423 of file MachineInstr.h.

References assert(), getOperand(), and isNonListDebugValue().

Referenced by isDebugOffsetImm(), and llvm::updateDbgValueForSpill().

◆ getDebugOperand() [1/2]

MachineOperand& llvm::MachineInstr::getDebugOperand ( unsigned  Index)
inline

Definition at line 508 of file MachineInstr.h.

References assert(), debug_operands(), getNumDebugOperands(), and Index.

Referenced by isIndirectDebugValue().

◆ getDebugOperand() [2/2]

const MachineOperand& llvm::MachineInstr::getDebugOperand ( unsigned  Index) const
inline

Definition at line 512 of file MachineInstr.h.

References assert(), debug_operands(), getNumDebugOperands(), and Index.

◆ getDebugOperandIndex()

unsigned llvm::MachineInstr::getDebugOperandIndex ( const MachineOperand Op) const
inline

Definition at line 561 of file MachineInstr.h.

References llvm::adl_begin(), assert(), debug_operands(), and isDebugOperand().

◆ getDebugOperandsForReg() [1/3]

template<typename Operand , typename Instruction >
static iterator_range< filter_iterator<Operand *, std::function<bool(Operand &Op)> > > llvm::MachineInstr::getDebugOperandsForReg ( Instruction MI,
Register  Reg 
)
inlinestatic

Returns a range of all of the operands that correspond to a debug use of Reg.

Definition at line 539 of file MachineInstr.h.

References function, llvm::make_filter_range(), MI, and Reg.

Referenced by attemptDebugCopyProp(), llvm::WebAssemblyDebugValueManager::clone(), getDebugOperandsForReg(), and llvm::updateDbgValueForSpill().

◆ getDebugOperandsForReg() [2/3]

iterator_range<filter_iterator<MachineOperand *, std::function<bool(MachineOperand &Op)> > > llvm::MachineInstr::getDebugOperandsForReg ( Register  Reg)
inline

Definition at line 552 of file MachineInstr.h.

References Reg.

◆ getDebugOperandsForReg() [3/3]

iterator_range<filter_iterator<const MachineOperand *, std::function<bool(const MachineOperand &Op)> > > llvm::MachineInstr::getDebugOperandsForReg ( Register  Reg) const
inline

Definition at line 546 of file MachineInstr.h.

References getDebugOperandsForReg(), and Reg.

◆ getDebugVariable()

const DILocalVariable * MachineInstr::getDebugVariable ( ) const

Return the debug variable referenced by this DBG_VALUE instruction.

Definition at line 855 of file MachineInstr.cpp.

References getDebugVariableOp().

Referenced by llvm::buildDbgValueForSpill(), llvm::DbgVariable::initializeDbgValue(), and print().

◆ getDebugVariableOp() [1/2]

MachineOperand& llvm::MachineInstr::getDebugVariableOp ( )

◆ getDebugVariableOp() [2/2]

MachineOperand & MachineInstr::getDebugVariableOp ( ) const

Return the operand for the debug variable referenced by this DBG_VALUE instruction.

Definition at line 843 of file MachineInstr.cpp.

References assert(), getOperand(), isDebugRef(), isDebugValue(), and isDebugValueList().

Referenced by getDebugVariable(), and print().

◆ getDesc()

const MCInstrDesc& llvm::MachineInstr::getDesc ( ) const
inline

◆ getFlag()

bool llvm::MachineInstr::getFlag ( MIFlag  Flag) const
inline

◆ getFlags()

uint16_t llvm::MachineInstr::getFlags ( ) const
inline

◆ getFoldedRestoreSize()

Optional< unsigned > MachineInstr::getFoldedRestoreSize ( const TargetInstrInfo TII) const

Return a valid size if the instruction is a folded restore instruction.

Definition at line 2365 of file MachineInstr.cpp.

References getMF(), getSpillSlotSize(), llvm::HexagonInstrInfo::hasLoadFromStackSlot(), llvm::None, and TII.

◆ getFoldedSpillSize()

Optional< unsigned > MachineInstr::getFoldedSpillSize ( const TargetInstrInfo TII) const

Return a valid size if the instruction is a folded spill instruction.

Definition at line 2346 of file MachineInstr.cpp.

References getMF(), getSpillSlotSize(), llvm::HexagonInstrInfo::hasStoreToStackSlot(), llvm::None, and TII.

◆ getHeapAllocMarker()

MDNode* llvm::MachineInstr::getHeapAllocMarker ( ) const
inline

Helper to extract a heap alloc marker if one has been added.

Definition at line 753 of file MachineInstr.h.

References Info.

Referenced by cloneMemRefs(), dropMemRefs(), print(), setHeapAllocMarker(), setMemRefs(), setPostInstrSymbol(), and setPreInstrSymbol().

◆ getInlineAsmDialect()

InlineAsm::AsmDialect MachineInstr::getInlineAsmDialect ( ) const

◆ getIntrinsicID()

unsigned llvm::MachineInstr::getIntrinsicID ( ) const
inline

Returns the Intrinsic::ID for this instruction.

Precondition
Must have an intrinsic ID operand.

Definition at line 1846 of file MachineInstr.h.

References llvm::MachineOperand::getIntrinsicID(), getNumExplicitDefs(), and getOperand().

◆ getMF() [1/2]

MachineFunction* llvm::MachineInstr::getMF ( )
inline

Definition at line 298 of file MachineInstr.h.

References getMF().

◆ getMF() [2/2]

const MachineFunction * MachineInstr::getMF ( ) const

◆ getNumDebugOperands()

unsigned llvm::MachineInstr::getNumDebugOperands ( ) const
inline

Returns the total number of operands which are debug locations.

Definition at line 495 of file MachineInstr.h.

References llvm::sys::path::begin(), debug_operands(), and llvm::sys::path::end().

Referenced by getDebugOperand().

◆ getNumDefs()

unsigned llvm::MachineInstr::getNumDefs ( ) const
inline

◆ getNumExplicitDefs()

unsigned MachineInstr::getNumExplicitDefs ( ) const

◆ getNumExplicitOperands()

unsigned MachineInstr::getNumExplicitOperands ( ) const

◆ getNumImplicitOperands()

unsigned llvm::MachineInstr::getNumImplicitOperands ( ) const
inline

Returns the implicit operands number.

Definition at line 583 of file MachineInstr.h.

References getNumExplicitOperands(), and getNumOperands().

Referenced by matchSwap().

◆ getNumMemOperands()

unsigned llvm::MachineInstr::getNumMemOperands ( ) const
inline

Return the number of memory operands.

Definition at line 726 of file MachineInstr.h.

References memoperands().

Referenced by llvm::ARMBankConflictHazardRecognizer::getHazardType(), and mayAlias().

◆ getNumOperands()

unsigned llvm::MachineInstr::getNumOperands ( ) const
inline

Retuns the total number of operands.

Definition at line 492 of file MachineInstr.h.

Referenced by addOperand(), addRegisterDead(), addRegisterKilled(), llvm::HexagonSubtarget::adjustSchedDependency(), allPhiOperandsUndefined(), llvm::LiveRangeEdit::allUsesAvailableAt(), llvm::X86InstrInfo::analyzeBranchPredicate(), llvm::HexagonInstrInfo::canExecuteInBundle(), emitError(), llvm::TargetLoweringBase::emitPatchPoint(), llvm::LegalizerHelper::fewerElementsVectorMulo(), llvm::LegalizerHelper::fewerElementsVectorUnmergeValues(), findFirstPredOperandIdx(), findInlineAsmFlagIdx(), findLoopComponents(), findRegisterDefOperandIdx(), findRegisterUseOperandIdx(), findTiedOperandIdx(), llvm::PPCInstrInfo::fixupIsDeadOrKill(), foldPatchpoint(), getInitPhiReg(), getLoopPhiReg(), llvm::LanaiInstrInfo::getMemOperandWithOffsetWidth(), llvm::PatchPointOpers::getNextScratchIdx(), llvm::GUnmerge::getNumDefs(), getNumExplicitDefs(), getNumExplicitOperands(), getNumImplicitOperands(), llvm::GMergeLikeOp::getNumSources(), getOperand(), llvm::PeelingModuloScheduleExpander::getPhiCanonicalReg(), getPHINumInputs(), getPhiRegs(), llvm::LiveIntervals::handleMoveIntoNewBundle(), hasComplexRegisterTies(), hasImplicitDef(), hasRegisterImplicitUseOperand(), INITIALIZE_PASS(), interpretNextInstr(), isConstantValuePHI(), isIdenticalTo(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), IsWritingToVCCR(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::MIPatternMatch::BinaryOp_match< LHS_P, RHS_P, Opcode, Commutable >::match(), llvm::MIPatternMatch::BinaryOpc_match< LHS_P, RHS_P, Commutable >::match(), llvm::MIPatternMatch::UnaryOp_match< SrcTy, Opcode >::match(), llvm::MIPatternMatch::TernaryOp_match< Src0Ty, Src1Ty, Src2Ty, Opcode >::match(), llvm::CombinerHelper::matchCombineInsertVecElts(), llvm::SIInstrInfo::moveToVALU(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), print(), llvm::ARMBaseInstrInfo::produceSameValue(), readsWritesVirtualRegister(), RemoveOperand(), llvm::MachineFunction::substituteDebugValuesForInst(), llvm::LegalizationArtifactCombiner::tryCombineExtract(), llvm::LegalizationArtifactCombiner::tryCombineUnmergeValues(), UpdateOperandRegClass(), updateOperandRegConstraints(), and llvm::SSAUpdaterTraits< MachineSSAUpdater >::ValueIsNewPHI().

◆ getOpcode()

unsigned llvm::MachineInstr::getOpcode ( ) const
inline

Returns the opcode of this MachineInstr.

Definition at line 489 of file MachineInstr.h.

References llvm::MCInstrDesc::Opcode.

Referenced by llvm::XCoreInstrInfo::analyzeBranch(), llvm::NVPTXInstrInfo::analyzeBranch(), llvm::VEInstrInfo::analyzeBranch(), llvm::SparcInstrInfo::analyzeBranch(), llvm::MipsInstrInfo::analyzeBranch(), llvm::HexagonInstrInfo::analyzeBranch(), llvm::ARMBaseInstrInfo::analyzeBranch(), llvm::R600InstrInfo::analyzeBranch(), llvm::AArch64InstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::AArch64InstrInfo::analyzeBranchPredicate(), llvm::X86InstrInfo::analyzeBranchPredicate(), llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::CombinerHelper::applyExtendThroughPhis(), llvm::MipsRegisterBankInfo::applyMappingImpl(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), areCandidatesToMergeOrPair(), areCombinableOperations(), BBIsJumpedOver(), canCmpInstrBeRemoved(), canCompareBeNewValueJump(), canFoldIntoCSel(), canInstrSubstituteCmpInstr(), llvm::PPCInstrInfo::combineRLWINM(), llvm::ARMBasicBlockUtils::computeBlockSize(), llvm::HexagonInstrInfo::doesNotReturn(), llvm::SystemZHazardRecognizer::dumpSU(), llvm::MSP430FrameLowering::eliminateCallFramePseudoInstr(), llvm::Thumb1FrameLowering::eliminateCallFramePseudoInstr(), llvm::XCoreFrameLowering::eliminateCallFramePseudoInstr(), llvm::ARCFrameLowering::eliminateCallFramePseudoInstr(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::HexagonFrameLowering::emitPrologue(), llvm::HexagonEvaluator::evaluate(), ExpandMOVImmSExti8(), expandXorFP(), llvm::PPCInstrInfo::finalizeInsInstrs(), findCondCodeUseOperandIdxForBranchOrSelect(), findLoopComponents(), findTiedOperandIdx(), llvm::X86InstrInfo::foldMemoryOperandImpl(), fuseInstructionPair(), llvm::HexagonInstrInfo::genAllInsnTimingClasses(), llvm::HexagonInstrInfo::getCompoundOpcode(), GetCondCode(), llvm::getDefSrcRegIgnoringCopies(), llvm::PPCInstrInfo::getFMAPatterns(), getFMAPatterns(), llvm::ARMHazardRecognizerFPMLx::getHazardType(), llvm::AArch64RegisterBankInfo::getInstrMapping(), getMaddPatterns(), llvm::LanaiInstrInfo::getMemOperandsWithOffsetWidth(), llvm::SIInstrInfo::getMemOperandsWithOffsetWidth(), llvm::LanaiInstrInfo::getMemOperandWithOffsetWidth(), llvm::AArch64InstrInfo::getMemOperandWithOffsetWidth(), llvm::getOpcodeDef(), llvm::LiveIntervals::handleMoveIntoNewBundle(), llvm::TargetInstrInfo::hasReassociableSibling(), INITIALIZE_PASS(), llvm::SMSchedule::insert(), llvm::PPCInstrInfo::isADDIInstrEligibleForFolding(), llvm::PPCInstrInfo::isADDInstrEligibleForFolding(), isAddressLdStPair(), llvm::isAESPair(), isAESPair(), isAnnotationLabel(), isArithmeticBccPair(), isArithmeticCbzPair(), isArithmeticLogicPair(), llvm::AArch64InstrInfo::isAssociativeAndCommutative(), llvm::PPCInstrInfo::isAssociativeAndCommutative(), llvm::X86InstrInfo::isAssociativeAndCommutative(), llvm::InstructionSelector::isBaseWithConstantOffset(), llvm::AMDGPUAsmPrinter::isBlockOnlyReachableByFallthrough(), isBundle(), isCandidateForCallSiteEntry(), isCCSelectPair(), isCFIInstruction(), llvm::AArch64GISelUtils::isCMN(), isCombineInstrCandidateFP(), isCopy(), isCryptoEORPair(), isCVTAToLocalCombinationCandidate(), isDebugLabel(), isDebugPHI(), isDebugRef(), isDebugValueList(), isEHLabel(), llvm::AArch64InstrInfo::isExtendLikelyToBeFolded(), isExtractSubreg(), isGCLabel(), isIdenticalTo(), isImplicitDef(), isInlineAsm(), isInsertSubreg(), isKill(), llvm::isKnownNeverNaN(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), llvm::isLiteralsPair(), isLiteralsPair(), isMetaInstruction(), isNonFoldablePartialRegisterLoad(), isNonListDebugValue(), isPHI(), isPreLdStPairCandidate(), llvm::ARMBaseInstrInfo::isProfitableToIfCvt(), isPseudoProbe(), isRedundantFlagInstr(), isRegSequence(), llvm::VLIWResourceModel::isResourceAvailable(), isSafeToMove(), isSExtLoad(), isSignExtended(), isSimpleIf(), isSubregToReg(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), isTransient(), IsVPNOTEquivalent(), isZeroExtended(), isZExtLoad(), llvm::MipsCallLowering::lowerCall(), LowerCallResults(), llvm::LegalizerHelper::lowerLoad(), llvm::MIPatternMatch::BinaryOp_match< LHS_P, RHS_P, Opcode, Commutable >::match(), llvm::MIPatternMatch::BinaryOpc_match< LHS_P, RHS_P, Commutable >::match(), llvm::MIPatternMatch::UnaryOp_match< SrcTy, Opcode >::match(), llvm::MIPatternMatch::CompareOp_match< Pred_P, LHS_P, RHS_P, Opcode >::match(), llvm::MIPatternMatch::TernaryOp_match< Src0Ty, Src1Ty, Src2Ty, Opcode >::match(), llvm::CombinerHelper::matchCombineExtOfExt(), llvm::CombinerHelper::matchCombineInsertVecElts(), llvm::CombinerHelper::matchCombineTruncOfExt(), llvm::CombinerHelper::matchCombineUnmergeConstant(), llvm::CombinerHelper::matchExtendThroughPhis(), llvm::CombinerHelper::matchHoistLogicOpWithSameOpcodeHands(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::CombinerHelper::matchOptBrCondByInvertingCond(), llvm::CombinerHelper::matchPtrAddImmedChain(), llvm::CombinerHelper::matchReassocConstantInnerRHS(), llvm::CombinerHelper::matchShiftImmedChain(), llvm::CombinerHelper::matchShiftOfShiftedLogic(), matchSwap(), llvm::matchUnaryPredicate(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), llvm::SIInstrInfo::moveToVALU(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::SIInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::CallLowering::parametersInCSRMatch(), parseCondBranch(), print(), llvm::ARMBaseInstrInfo::produceSameValue(), llvm::TargetInstrInfo::reassociateOps(), llvm::recomputeVPTBlockMask(), regIsPICBase(), llvm::ARMBaseInstrInfo::reMaterialize(), llvm::X86InstrInfo::reMaterialize(), llvm::VLIWResourceModel::reserveResources(), llvm::ARMBlockPlacement::revertWhileToDo(), llvm::SIScheduleDAGMI::schedule(), sForm(), llvm::AArch64InstrInfo::shouldClusterMemOps(), llvm::PPCInstrInfo::shouldClusterMemOps(), splitMBB(), llvm::stableHashValue(), tieOperands(), tryChangeVGPRtoSGPRinCopy(), llvm::LegalizationArtifactCombiner::tryCombineAnyExt(), llvm::LegalizationArtifactCombiner::tryCombineSExt(), llvm::LegalizationArtifactCombiner::tryCombineUnmergeValues(), llvm::LegalizationArtifactCombiner::tryFoldUnmergeCast(), llvm::X86InstrInfo::unfoldMemoryOperand(), and verifyCFIntrinsic().

◆ getOperand() [1/2]

MachineOperand& llvm::MachineInstr::getOperand ( unsigned  i)
inline

Definition at line 503 of file MachineInstr.h.

References assert(), getNumOperands(), i, and Operands.

◆ getOperand() [2/2]

const MachineOperand& llvm::MachineInstr::getOperand ( unsigned  i) const
inline

Definition at line 499 of file MachineInstr.h.

References assert(), getNumOperands(), i, and Operands.

Referenced by llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), addRegisterDead(), addRegisterKilled(), llvm::SrcOp::addSrcToMIB(), llvm::HexagonSubtarget::adjustSchedDependency(), allPhiOperandsUndefined(), llvm::LiveRangeEdit::allUsesAvailableAt(), llvm::XCoreInstrInfo::analyzeBranch(), llvm::NVPTXInstrInfo::analyzeBranch(), llvm::VEInstrInfo::analyzeBranch(), llvm::SparcInstrInfo::analyzeBranch(), llvm::MipsInstrInfo::analyzeBranch(), llvm::HexagonInstrInfo::analyzeBranch(), llvm::R600InstrInfo::analyzeBranch(), llvm::AArch64InstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::AArch64InstrInfo::analyzeBranchPredicate(), llvm::X86InstrInfo::analyzeBranchPredicate(), llvm::CombinerHelper::applyCombineDivRem(), llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::CombinerHelper::applyExtendThroughPhis(), llvm::SwingSchedulerDAG::applyInstrChange(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), areCombinableOperations(), llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), BBIsJumpedOver(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), llvm::HexagonInstrInfo::canExecuteInBundle(), canFoldIntoCSel(), changeDebugValuesDefReg(), checkRegOnlyPHIInputs(), CombineCVTAToLocal(), llvm::PPCInstrInfo::combineRLWINM(), llvm::ARMBaseInstrInfo::commuteInstructionImpl(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::TargetSchedModel::computeOperandLatency(), llvm::TargetSchedModel::computeOutputLatency(), ConsecutiveInstr(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::R600InstrInfo::copyPhysReg(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::CreateEmptyPHI(), createPHIsForSelects(), llvm::XCoreFrameLowering::eliminateCallFramePseudoInstr(), llvm::ARCFrameLowering::eliminateCallFramePseudoInstr(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), emitError(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::HexagonEvaluator::evaluate(), Expand2AddrUndef(), llvm::M68kInstrInfo::ExpandCCR(), llvm::M68kInstrInfo::ExpandMOVEM(), ExpandMOVImmSExti8(), llvm::M68kInstrInfo::ExpandMOVSZX_RM(), llvm::M68kInstrInfo::ExpandMOVSZX_RR(), llvm::M68kInstrInfo::ExpandMOVX_RR(), expandNOVLXLoad(), expandNOVLXStore(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::X86InstrInfo::expandPostRAPseudo(), llvm::M68kInstrInfo::ExpandPUSH_POP(), expandSHXDROT(), llvm::PPCInstrInfo::finalizeInsInstrs(), findCondCodeUsedByInstr(), findInlineAsmFlagIdx(), findLoopComponents(), findRegisterDefOperand(), findRegisterDefOperandIdx(), findRegisterUseOperand(), findRegisterUseOperandIdx(), findTiedOperandIdx(), llvm::PPCInstrInfo::fixupIsDeadOrKill(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), llvm::PPCInstrInfo::foldFrameOffset(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldVGPRCopyIntoRegSequence(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), genFusedMultiply(), genMaddR(), genNeg(), llvm::X86InstrInfo::getAddrModeFromMemoryOp(), llvm::HexagonInstrInfo::getBundleNoShuf(), llvm::HexagonInstrInfo::getCompoundOpcode(), GetCondCode(), getDebugExpressionOp(), getDebugLabel(), getDebugOffset(), getDebugVariableOp(), llvm::getDefSrcRegIgnoringCopies(), llvm::GAnyLoad::getDstReg(), llvm::PPCInstrInfo::getFMAPatterns(), getFMAPatterns(), llvm::StatepointOpers::getGCPointerMap(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_iterator::getIncomingBlock(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_iterator::getIncomingValue(), getInitPhiReg(), getInlineAsmDialect(), getIntrinsicID(), llvm::SrcOp::getLLTTy(), getLoopPhiReg(), getMaddPatterns(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsOffsetOperand(), llvm::SIInstrInfo::getMemOperandsWithOffsetWidth(), llvm::LanaiInstrInfo::getMemOperandWithOffsetWidth(), llvm::RISCVInstrInfo::getMemOperandWithOffsetWidth(), llvm::AArch64InstrInfo::getMemOperandWithOffsetWidth(), llvm::PPCInstrInfo::getMemOperandWithOffsetWidth(), getNewSource(), llvm::PatchPointOpers::getNextScratchIdx(), getNumExplicitDefs(), getNumExplicitOperands(), llvm::PeelingModuloScheduleExpander::getPhiCanonicalReg(), getPHIDestReg(), getPHIPred(), getPhiRegs(), getPHISourceReg(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::GetPHIValue(), llvm::GLoadStore::getPointerReg(), llvm::GenericMachineInstr::getReg(), llvm::SrcOp::getReg(), getRegClassConstraint(), getRegClassConstraintEffect(), llvm::GUnmerge::getSourceReg(), getTargetMBB(), getTypeToPrint(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::GetUndefVal(), llvm::MachineSSAUpdater::GetValueInMiddleOfBlock(), llvm::GStore::getValueReg(), handleADRP(), llvm::LiveIntervals::handleMoveIntoNewBundle(), hasComplexRegisterTies(), hasImplicitDef(), hasRAWHazard(), llvm::TargetInstrInfo::hasReassociableOperands(), llvm::TargetInstrInfo::hasReassociableSibling(), hasRegisterImplicitUseOperand(), hasUnmodeledSideEffects(), INITIALIZE_PASS(), llvm::SystemZELFFrameLowering::inlineStackProbe(), llvm::R600InstrInfo::insertBranch(), llvm::SIInstrInfo::insertBranch(), insertDivByZeroTrap(), insertPHI(), llvm::PPCInstrInfo::isADDIInstrEligibleForFolding(), isAddressLdStPair(), isArithmeticBccPair(), llvm::InstructionSelector::isBaseWithConstantOffset(), llvm::AArch64GISelUtils::isCMN(), isConstantValuePHI(), isConvergent(), isCVTAToLocalCombinationCandidate(), llvm::AArch64InstrInfo::isExtendLikelyToBeFolded(), isFullCopy(), isIdenticalTo(), isIdentityCopy(), llvm::isKnownNeverNaN(), isLdStSafeToCluster(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), isLiteralsPair(), isNonFoldablePartialRegisterLoad(), isNopCopy(), isOperandSubregIdx(), isRedundantFlagInstr(), isRegTiedToDefOperand(), isRegTiedToUseOperand(), llvm::PPCInstrInfo::isSignOrZeroExtended(), isStackAligningInlineAsm(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), llvm::PPCInstrInfo::isValidToBeChangedReg(), IsVPNOTEquivalent(), IsWritingToVCCR(), llvm::AMDGPULegalizerInfo::legalizeIntrinsic(), llvm::X86InstrInfo::loadRegFromStackSlot(), llvm::MipsCallLowering::lowerCall(), llvm::X86CallLowering::lowerCall(), LowerCallResults(), llvm::AMDGPUCallLowering::lowerTailCall(), llvm::MIPatternMatch::BinaryOp_match< LHS_P, RHS_P, Opcode, Commutable >::match(), llvm::MIPatternMatch::BinaryOpc_match< LHS_P, RHS_P, Commutable >::match(), llvm::MIPatternMatch::UnaryOp_match< SrcTy, Opcode >::match(), llvm::MIPatternMatch::CompareOp_match< Pred_P, LHS_P, RHS_P, Opcode >::match(), llvm::MIPatternMatch::TernaryOp_match< Src0Ty, Src1Ty, Src2Ty, Opcode >::match(), llvm::CombinerHelper::matchCombineExtOfExt(), llvm::CombinerHelper::matchCombineInsertVecElts(), llvm::CombinerHelper::matchCombineTruncOfExt(), llvm::CombinerHelper::matchCombineUnmergeConstant(), llvm::CombinerHelper::matchExtractVecEltBuildVec(), matchExtractVecEltPairwiseAdd(), llvm::CombinerHelper::matchHoistLogicOpWithSameOpcodeHands(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::CombinerHelper::matchOptBrCondByInvertingCond(), llvm::CombinerHelper::matchPtrAddImmedChain(), llvm::CombinerHelper::matchReassocConstantInnerRHS(), llvm::CombinerHelper::matchShiftImmedChain(), llvm::CombinerHelper::matchShiftOfShiftedLogic(), matchSwap(), llvm::matchUnaryPredicate(), mayLoad(), mayStore(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::SIInstrInfo::moveToVALU(), MoveVPNOTBeforeFirstUser(), oneUseDominatesOtherUses(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::CallLowering::parametersInCSRMatch(), parseCondBranch(), llvm::PeelSingleBlockLoop(), print(), llvm::ARMBaseInstrInfo::produceSameValue(), readsWritesVirtualRegister(), llvm::TargetInstrInfo::reassociateOps(), llvm::recomputeVPTBlockMask(), reinsertVectorIndexAdd(), llvm::ARMBaseInstrInfo::reMaterialize(), llvm::X86InstrInfo::reMaterialize(), removeCopies(), RemoveDeadAddBetweenLEAAndJT(), llvm::X86FrameLowering::restoreWin32EHStackPointers(), llvm::RevertLoopDec(), llvm::ARMBlockPlacement::revertWhileToDo(), llvm::SelectionDAGISel::runOnMachineFunction(), setPhiPred(), llvm::AArch64InstrInfo::shouldClusterMemOps(), splitBlock(), splitEdge(), splitMBB(), llvm::X86InstrInfo::storeRegToStackSlot(), llvm::MachineFunction::substituteDebugValuesForInst(), tieOperands(), llvm::LegalizationArtifactCombiner::tryCombineExtract(), llvm::LegalizationArtifactCombiner::tryCombineUnmergeValues(), llvm::LegalizationArtifactCombiner::tryFoldUnmergeCast(), tryToFoldACImm(), llvm::X86InstrInfo::unfoldMemoryOperand(), untieRegOperand(), llvm::HexagonPacketizerList::updateOffset(), UpdateOperandRegClass(), updateOperandRegConstraints(), updatePhysDepsDownwards(), verifyCFIntrinsic(), and llvm::WebAssemblyDebugValueManager::WebAssemblyDebugValueManager().

◆ getOperandNo()

unsigned llvm::MachineInstr::getOperandNo ( const_mop_iterator  I) const
inline

◆ getParent() [1/2]

MachineBasicBlock* llvm::MachineInstr::getParent ( )
inline

Definition at line 287 of file MachineInstr.h.

◆ getParent() [2/2]

const MachineBasicBlock* llvm::MachineInstr::getParent ( ) const
inline

Definition at line 286 of file MachineInstr.h.

Referenced by addOperand(), llvm::LiveIntervals::addSegmentToEndOfBlock(), llvm::GCNSubtarget::adjustSchedDependency(), BlockSplitInfo::allInstrsInSameMBB(), canRenameUpToDef(), collectCallSiteParameters(), CombineCVTAToLocal(), llvm::constrainOperandRegClass(), emitError(), llvm::DebugHandlerBase::endInstruction(), eraseFromBundle(), eraseFromParent(), eraseFromParentAndMarkDBGValuesForRemoval(), examineCFlagsUse(), expandLoadStackGuard(), expandMOV32r1(), llvm::M68kInstrInfo::ExpandMOVEM(), ExpandMOVImmSExti8(), llvm::M68kInstrInfo::ExpandMOVSZX_RM(), llvm::M68kInstrInfo::ExpandMOVSZX_RR(), llvm::M68kInstrInfo::ExpandPUSH_POP(), expandXorFP(), llvm::findCMPToFoldIntoCBZ(), findSingleRegUse(), llvm::ARMBlockPlacement::fixBackwardsWLS(), llvm::PPCInstrInfo::fixupIsDeadOrKill(), llvm::SIInstrInfo::FoldImmediate(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), getDebugInstrNum(), llvm::PPCInstrInfo::getFMAPatterns(), getFMAPatterns(), getFoldableImm(), llvm::ARMHazardRecognizerFPMLx::getHazardType(), getLoadStoreOffsetSizeInBits(), getMaddPatterns(), getMF(), llvm::PPCInstrInfo::getOperandLatency(), llvm::PeelingModuloScheduleExpander::getPhiCanonicalReg(), getRegClassConstraint(), GetSymbolRef(), handleADRP(), llvm::LiveVariables::HandleVirtRegUse(), llvm::TargetInstrInfo::hasReassociableOperands(), llvm::TargetInstrInfo::hasReassociableSibling(), hoistAndMergeSGPRInits(), insertPHI(), llvm::AArch64InstrInfo::isAssociativeAndCommutative(), isCombineInstrCandidateFP(), isCVTAToLocalCombinationCandidate(), isDereferenceableInvariantLoad(), llvm::SIInstrInfo::isLegalRegOperand(), llvm::SMSchedule::isLoopCarried(), llvm::SMSchedule::isLoopCarriedDefOfUse(), llvm::InstructionSelector::isObviouslySafeToFold(), isReachable(), llvm::TargetInstrInfo::isReassociationCandidate(), llvm::VLIWResourceModel::isResourceAvailable(), isSafeToMove(), jumpTableFollowsTB(), matchSwap(), moveBefore(), llvm::SIInstrInfo::moveToVALU(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::SIInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::produceSameValue(), reinsertVectorIndexAdd(), removeFromBundle(), removeFromParent(), rescheduleCanonically(), llvm::MachineSSAUpdater::RewriteUse(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::AArch64InstrInfo::shouldClusterMemOps(), llvm::SystemZRegisterInfo::shouldCoalesce(), splitBlock(), splitMBB(), llvm::TailDuplicator::tailDuplicateAndUpdate(), tryChangeVGPRtoSGPRinCopy(), tryToFindRegisterToRename(), tryToFoldACImm(), UpdateOperandRegClass(), updatePHIs(), validThroughout(), verifyCFIntrinsic(), and llvm::WebAssemblyDebugValueManager::WebAssemblyDebugValueManager().

◆ getPostInstrSymbol()

MCSymbol* llvm::MachineInstr::getPostInstrSymbol ( ) const
inline

Helper to extract a post-instruction symbol if one has been added.

Definition at line 741 of file MachineInstr.h.

References Info, and S.

Referenced by cloneMemRefs(), dropMemRefs(), print(), setHeapAllocMarker(), setMemRefs(), setPostInstrSymbol(), and setPreInstrSymbol().

◆ getPreInstrSymbol()

MCSymbol* llvm::MachineInstr::getPreInstrSymbol ( ) const
inline

Helper to extract a pre-instruction symbol if one has been added.

Definition at line 729 of file MachineInstr.h.

References Info, and S.

Referenced by cloneMemRefs(), dropMemRefs(), print(), setHeapAllocMarker(), setMemRefs(), setPostInstrSymbol(), and setPreInstrSymbol().

◆ getRegClassConstraint()

const TargetRegisterClass * MachineInstr::getRegClassConstraint ( unsigned  OpIdx,
const TargetInstrInfo TII,
const TargetRegisterInfo TRI 
) const

◆ getRegClassConstraintEffect()

const TargetRegisterClass * MachineInstr::getRegClassConstraintEffect ( unsigned  OpIdx,
const TargetRegisterClass CurRC,
const TargetInstrInfo TII,
const TargetRegisterInfo TRI 
) const

Applies the constraints (def/use) implied by the OpIdx operand to the given CurRC.

Returns the register class that satisfies both CurRC and the constraints set by OpIdx MI. Returns NULL if such a register class does not exist.

Precondition
CurRC must not be NULL.
The operand at OpIdx must be a register.

Definition at line 948 of file MachineInstr.cpp.

References assert(), llvm::TargetRegisterInfo::getCommonSubClass(), llvm::TargetRegisterInfo::getMatchingSuperRegClass(), getOperand(), getRegClassConstraint(), llvm::TargetRegisterInfo::getSubClassWithSubReg(), llvm::MachineOperand::getSubReg(), llvm::MachineOperand::isReg(), TII, and TRI.

◆ getRegClassConstraintEffectForVReg()

const TargetRegisterClass * MachineInstr::getRegClassConstraintEffectForVReg ( Register  Reg,
const TargetRegisterClass CurRC,
const TargetInstrInfo TII,
const TargetRegisterInfo TRI,
bool  ExploreBundle = false 
) const

Applies the constraints (def/use) implied by this MI on Reg to the given CurRC.

If ExploreBundle is set and MI is part of a bundle, all the instructions inside the bundle will be taken into account. In other words, this method accumulates all the constraints of the operand of this MI and the related bundle if MI is a bundle or inside a bundle.

Returns the register class that satisfies both CurRC and the constraints set by MI. Returns NULL if such a register class does not exist.

Precondition
CurRC must not be NULL.

Definition at line 919 of file MachineInstr.cpp.

References llvm::numbers::e, i, llvm::MIBundleOperandIteratorBase< ValueT >::isValid(), Reg, TII, and TRI.

◆ getRestoreSize()

Optional< unsigned > MachineInstr::getRestoreSize ( const TargetInstrInfo TII) const

Return a valid size if the instruction is a restore instruction.

Definition at line 2354 of file MachineInstr.cpp.

References llvm::MachineFunction::getFrameInfo(), getMF(), llvm::MachineFrameInfo::isSpillSlotObjectIndex(), memoperands_begin(), llvm::None, and TII.

◆ getSpillSize()

Optional< unsigned > MachineInstr::getSpillSize ( const TargetInstrInfo TII) const

Return a valid size if the instruction is a spill instruction.

Definition at line 2335 of file MachineInstr.cpp.

References llvm::MachineFunction::getFrameInfo(), getMF(), llvm::MachineFrameInfo::isSpillSlotObjectIndex(), memoperands_begin(), llvm::None, and TII.

◆ getTypeToPrint()

LLT MachineInstr::getTypeToPrint ( unsigned  OpIdx,
SmallBitVector PrintedTypes,
const MachineRegisterInfo MRI 
) const

Debugging supportDetermine the generic type to be printed (if needed) on uses and defs.

Definition at line 1515 of file MachineInstr.cpp.

References getDesc(), getNumExplicitOperands(), getOperand(), llvm::MachineRegisterInfo::getType(), llvm::LLT::isValid(), isVariadic(), MRI, llvm::MCInstrDesc::OpInfo, and llvm::SmallBitVector::set().

Referenced by print().

◆ getUsedDebugRegs()

SmallSet<Register, 4> llvm::MachineInstr::getUsedDebugRegs ( ) const
inline

◆ hasComplexRegisterTies()

bool MachineInstr::hasComplexRegisterTies ( ) const

Return true when an instruction has tied register that can't be determined by the instruction's descriptor.

This is useful for MIR printing, to determine whether we need to print the ties or not.

Definition at line 1498 of file MachineInstr.cpp.

References E, findTiedOperandIdx(), getDesc(), getNumOperands(), getOperand(), llvm::MCInstrDesc::getOperandConstraint(), I, int, llvm::MCInstrDesc::Opcode, and llvm::MCOI::TIED_TO.

Referenced by print().

◆ hasDebugOperandForReg()

bool llvm::MachineInstr::hasDebugOperandForReg ( Register  Reg) const
inline

Returns whether this debug value has at least one debug operand with the register Reg.

Definition at line 528 of file MachineInstr.h.

References llvm::any_of(), debug_operands(), and Reg.

Referenced by performSink().

◆ hasDelaySlot()

bool llvm::MachineInstr::hasDelaySlot ( QueryType  Type = AnyInBundle) const
inline

Returns true if the specified instruction has a delay slot which must be filled by the code generator.

Definition at line 939 of file MachineInstr.h.

References llvm::MCID::DelaySlot, and hasProperty().

Referenced by collectCallSiteParameters().

◆ hasExtraDefRegAllocReq()

bool llvm::MachineInstr::hasExtraDefRegAllocReq ( QueryType  Type = AnyInBundle) const
inline

Returns true if this instruction def operands have special register allocation requirements that are not captured by the operand register classes.

e.g. ARM::LDRD's two def registers must be an even / odd pair, ARM::LDM registers have to be in ascending order. Post-register allocation passes should not attempt to change allocations for definitions of instructions with this flag.

Definition at line 1136 of file MachineInstr.h.

References llvm::MCID::ExtraDefRegAllocReq, and hasProperty().

◆ hasExtraSrcRegAllocReq()

bool llvm::MachineInstr::hasExtraSrcRegAllocReq ( QueryType  Type = AnyInBundle) const
inline

Returns true if this instruction source operands have special register allocation requirements that are not captured by the operand register classes.

e.g. ARM::STRD's two source registers must be an even / odd pair, ARM::STM registers have to be in ascending order. Post-register allocation passes should not attempt to change allocations for sources of instructions with this flag.

Definition at line 1126 of file MachineInstr.h.

References llvm::MCID::ExtraSrcRegAllocReq, and hasProperty().

◆ hasImplicitDef()

bool llvm::MachineInstr::hasImplicitDef ( ) const
inline

Returns true if the instruction has implicit definition.

Definition at line 572 of file MachineInstr.h.

References E, getNumExplicitOperands(), getNumOperands(), getOperand(), I, llvm::MachineOperand::isDef(), and llvm::MachineOperand::isImplicit().

Referenced by llvm::PPCInstrInfo::combineRLWINM().

◆ hasOneMemOperand()

bool llvm::MachineInstr::hasOneMemOperand ( ) const
inline

◆ hasOptionalDef()

bool llvm::MachineInstr::hasOptionalDef ( QueryType  Type = IgnoreBundle) const
inline

Set if this instruction has an optional definition, e.g.

ARM instructions which can set condition code if 's' bit is set.

Definition at line 803 of file MachineInstr.h.

References llvm::MCID::HasOptionalDef, and hasProperty().

Referenced by llvm::ARMBaseInstrInfo::optimizeSelect().

◆ hasOrderedMemoryRef()

bool MachineInstr::hasOrderedMemoryRef ( ) const

Return true if this instruction may have an ordered or volatile memory reference, or if the information describing the memory reference is not available.

hasOrderedMemoryRef - Return true if this instruction may have an ordered or volatile memory reference, or if the information describing the memory reference is not available.

Return false if it is known to have no ordered or volatile memory references.

Return false if it is known to have no ordered memory references.

Definition at line 1376 of file MachineInstr.cpp.

References llvm::any_of(), hasUnmodeledSideEffects(), isCall(), llvm::MachineMemOperand::isUnordered(), mayLoad(), mayStore(), memoperands(), and memoperands_empty().

Referenced by areCandidatesToMergeOrPair(), llvm::LanaiInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::AArch64InstrInfo::areMemAccessesTriviallyDisjoint(), llvm::RISCVInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::SIInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::PPCInstrInfo::areMemAccessesTriviallyDisjoint(), isLdStSafeToCluster(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), and isSafeToMove().

◆ hasPostISelHook()

bool llvm::MachineInstr::hasPostISelHook ( QueryType  Type = IgnoreBundle) const
inline

Return true if this instruction requires adjustment after instruction selection by calling a target hook.

For example, this can be used to fill in ARM 's' optional operand depending on whether the conditional flag register is used.

Definition at line 1095 of file MachineInstr.h.

References llvm::MCID::HasPostISelHook, and hasProperty().

◆ hasProperty()

bool llvm::MachineInstr::hasProperty ( unsigned  MCFlag,
QueryType  Type = AnyInBundle 
) const
inline

◆ hasRegisterImplicitUseOperand()

bool MachineInstr::hasRegisterImplicitUseOperand ( Register  Reg) const

Returns true if the MachineInstr has an implicit-use operand of exactly the given register (not considering sub/super-registers).

Definition at line 980 of file MachineInstr.cpp.

References llvm::numbers::e, getNumOperands(), getOperand(), llvm::MachineOperand::getReg(), i, llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), and Reg.

Referenced by matchSwap().

◆ hasUnmodeledSideEffects()

bool MachineInstr::hasUnmodeledSideEffects ( ) const

◆ implicit_operands() [1/2]

iterator_range<mop_iterator> llvm::MachineInstr::implicit_operands ( )
inline

◆ implicit_operands() [2/2]

iterator_range<const_mop_iterator> llvm::MachineInstr::implicit_operands ( ) const
inline

◆ isAnnotationLabel()

bool llvm::MachineInstr::isAnnotationLabel ( ) const
inline

Definition at line 1190 of file MachineInstr.h.

References llvm::ISD::ANNOTATION_LABEL, and getOpcode().

Referenced by isLabel().

◆ isAsCheapAsAMove()

bool llvm::MachineInstr::isAsCheapAsAMove ( QueryType  Type = AllInBundle) const
inline

Returns true if this instruction has the same cost (or less) than a move instruction.

This is useful during certain types of optimizations (e.g., remat during two-address conversion or machine licm) where we would like to remat or hoist the instruction, but not if it costs more than moving the instruction into the appropriate register. Note, we are not marking copies from and to the same register class with this flag.

Definition at line 1115 of file MachineInstr.h.

References llvm::MCID::CheapAsAMove, and hasProperty().

◆ isBarrier()

bool llvm::MachineInstr::isBarrier ( QueryType  Type = AnyInBundle) const
inline

Returns true if the specified instruction stops control flow from executing the instruction immediately following it.

Examples include unconditional branches and return instructions.

Definition at line 838 of file MachineInstr.h.

References llvm::MCID::Barrier, and hasProperty().

Referenced by llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), cannotCoexistAsymm(), llvm::ARMHazardRecognizerFPMLx::getHazardType(), llvm::HexagonPacketizerList::hasControlDependence(), isConditionalBranch(), isUnconditionalBranch(), and ProfitableToMerge().

◆ isBitcast()

bool llvm::MachineInstr::isBitcast ( QueryType  Type = IgnoreBundle) const
inline

Return true if this instruction is a bitcast instruction.

Definition at line 909 of file MachineInstr.h.

References llvm::MCID::Bitcast, and hasProperty().

◆ isBranch()

bool llvm::MachineInstr::isBranch ( QueryType  Type = AnyInBundle) const
inline

Returns true if this is a conditional, unconditional, or indirect branch.

Predicates below can be used to discriminate between these cases, and the TargetInstrInfo::analyzeBranch method can be used to get more information.

Definition at line 855 of file MachineInstr.h.

References llvm::MCID::Branch, and hasProperty().

Referenced by cannotCoexistAsymm(), llvm::HexagonPacketizerList::hasControlDependence(), isConditionalBranch(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), isUnconditionalBranch(), llvm::X86InstrInfo::optimizeCompareInstr(), and splitBlock().

◆ isBundle()

bool llvm::MachineInstr::isBundle ( ) const
inline

◆ isBundled()

bool llvm::MachineInstr::isBundled ( ) const
inline

Return true if this instruction part of a bundle.

This is true if either itself or its following instruction is marked "InsideBundle".

Definition at line 391 of file MachineInstr.h.

References isBundledWithPred(), and isBundledWithSucc().

Referenced by hasProperty().

◆ isBundledWithPred()

bool llvm::MachineInstr::isBundledWithPred ( ) const
inline

Return true if this instruction is part of a bundle, and it is not the first instruction in the bundle.

Definition at line 397 of file MachineInstr.h.

References BundledPred, and getFlag().

Referenced by bundleWithPred(), hasProperty(), isBundled(), and unbundleFromPred().

◆ isBundledWithSucc()

bool llvm::MachineInstr::isBundledWithSucc ( ) const
inline

Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle.

Definition at line 401 of file MachineInstr.h.

References BundledSucc, and getFlag().

Referenced by bundleWithSucc(), isBundled(), moveInstrOut(), and unbundleFromSucc().

◆ isCall()

bool llvm::MachineInstr::isCall ( QueryType  Type = AnyInBundle) const
inline

◆ isCandidateForCallSiteEntry()

bool MachineInstr::isCandidateForCallSiteEntry ( QueryType  Type = IgnoreBundle) const

Return true if this is a call instruction that may have an associated call site entry in the debug info.

Definition at line 707 of file MachineInstr.cpp.

References getOpcode(), and isCall().

Referenced by llvm::MachineFunction::addCallArgsForwardingRegs(), and shouldUpdateCallSiteInfo().

◆ isCFIInstruction()

bool llvm::MachineInstr::isCFIInstruction ( ) const
inline

Definition at line 1199 of file MachineInstr.h.

References getOpcode().

Referenced by isPosition(), and print().

◆ isCommutable()

bool llvm::MachineInstr::isCommutable ( QueryType  Type = IgnoreBundle) const
inline

Return true if this may be a 2- or 3-address instruction (of the form "X = op Y, Z, ..."), which produces the same result if Y and Z are exchanged.

If this flag is set, then the TargetInstrInfo::commuteInstruction method may be used to hack on the instruction.

Note that this flag may be set on instructions that are only commutable sometimes. In these cases, the call to commuteInstruction will fail. Also note that some instructions require non-trivial modification to commute them.

Definition at line 1057 of file MachineInstr.h.

References llvm::MCID::Commutable, and hasProperty().

◆ isCompare()

bool llvm::MachineInstr::isCompare ( QueryType  Type = IgnoreBundle) const
inline

Return true if this instruction is a comparison.

Definition at line 892 of file MachineInstr.h.

References llvm::MCID::Compare, and hasProperty().

◆ isConditionalBranch()

bool llvm::MachineInstr::isConditionalBranch ( QueryType  Type = AnyInBundle) const
inline

Return true if this is a branch which may fall through to the next instruction or may transfer control flow to some other block.

The TargetInstrInfo::analyzeBranch method can be used to get more information about this branch.

Definition at line 869 of file MachineInstr.h.

References isBarrier(), isBranch(), and isIndirectBranch().

◆ isConstantValuePHI()

unsigned MachineInstr::isConstantValuePHI ( ) const

If the specified instruction is a PHI that always merges together the same virtual register, return the register, otherwise return 0.

isConstantValuePHI - If the specified instruction is a PHI that always merges together the same virtual register, return the register, otherwise return 0.

Definition at line 1444 of file MachineInstr.cpp.

References assert(), llvm::numbers::e, getNumOperands(), getOperand(), llvm::MachineOperand::getReg(), getReg(), i, isPHI(), and Reg.

Referenced by llvm::MachineSSAUpdater::GetValueInMiddleOfBlock().

◆ isConvergent()

bool llvm::MachineInstr::isConvergent ( QueryType  Type = AnyInBundle) const
inline

Return true if this instruction is convergent.

Convergent instructions can not be made control-dependent on any additional values.

Definition at line 928 of file MachineInstr.h.

References llvm::MCID::Convergent, llvm::InlineAsm::Extra_IsConvergent, llvm::MachineOperand::getImm(), getOperand(), hasProperty(), isInlineAsm(), and llvm::InlineAsm::MIOp_ExtraInfo.

◆ isConvertibleTo3Addr()

bool llvm::MachineInstr::isConvertibleTo3Addr ( QueryType  Type = IgnoreBundle) const
inline

Return true if this is a 2-address instruction which can be changed into a 3-address instruction if needed.

Doing this transformation can be profitable in the register allocator, because it means that the instruction can use a 2-address form if possible, but degrade into a less efficient form if the source and dest register cannot be assigned to the same register. For example, this allows the x86 backend to turn a "shl reg, 3" instruction into an LEA instruction, which is the same speed as the shift but has bigger code size.

If this returns true, then the target must implement the TargetInstrInfo::convertToThreeAddress method for this instruction, which is allowed to fail if the transformation isn't valid for this specific instruction (e.g. shl reg, 4 on x86).

Definition at line 1075 of file MachineInstr.h.

References llvm::MCID::ConvertibleTo3Addr, and hasProperty().

◆ isCopy()

bool llvm::MachineInstr::isCopy ( ) const
inline

◆ isCopyLike()

bool llvm::MachineInstr::isCopyLike ( ) const
inline

Return true if the instruction behaves like a copy.

This does not include native copy instructions.

Definition at line 1305 of file MachineInstr.h.

References isCopy(), and isSubregToReg().

Referenced by llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::MachineFunction::salvageCopySSA(), and llvm::SplitAnalysis::shouldSplitSingleBlock().

◆ isDebugEntryValue()

bool MachineInstr::isDebugEntryValue ( ) const

A DBG_VALUE is an entry value iff its debug expression contains the DW_OP_LLVM_entry_value operation.

Definition at line 875 of file MachineInstr.cpp.

References getDebugExpression(), isDebugValue(), and llvm::DIExpression::isEntryValue().

◆ isDebugInstr()

bool llvm::MachineInstr::isDebugInstr ( ) const
inline

◆ isDebugLabel()

bool llvm::MachineInstr::isDebugLabel ( ) const
inline

Definition at line 1219 of file MachineInstr.h.

References getOpcode().

Referenced by getDebugLabel(), isDebugInstr(), and print().

◆ isDebugOffsetImm()

bool llvm::MachineInstr::isDebugOffsetImm ( ) const
inline

◆ isDebugOperand()

bool llvm::MachineInstr::isDebugOperand ( const MachineOperand Op) const
inline

Definition at line 557 of file MachineInstr.h.

References llvm::adl_begin(), llvm::adl_end(), and debug_operands().

Referenced by getDebugOperandIndex().

◆ isDebugOrPseudoInstr()

bool llvm::MachineInstr::isDebugOrPseudoInstr ( ) const
inline

Definition at line 1225 of file MachineInstr.h.

References isDebugInstr(), and isPseudoProbe().

◆ isDebugPHI()

bool llvm::MachineInstr::isDebugPHI ( ) const
inline

Definition at line 1221 of file MachineInstr.h.

References getOpcode().

Referenced by isDebugInstr().

◆ isDebugRef()

bool llvm::MachineInstr::isDebugRef ( ) const
inline

Definition at line 1220 of file MachineInstr.h.

References getOpcode().

Referenced by getDebugExpressionOp(), getDebugVariableOp(), and isDebugInstr().

◆ isDebugValue()

bool llvm::MachineInstr::isDebugValue ( ) const
inline

◆ isDebugValueList()

bool llvm::MachineInstr::isDebugValueList ( ) const
inline

◆ isDereferenceableInvariantLoad()

bool MachineInstr::isDereferenceableInvariantLoad ( AAResults AA) const

Return true if this load instruction never traps and points to a memory location whose value doesn't change during the execution of this function.

isDereferenceableInvariantLoad - Return true if this instruction will never trap and is loading from a location whose value is invariant across a run of this function.

Examples include loading a value from the constant pool or from the argument area of a function (if it does not change). If the instruction does multiple loads, this returns true only if all of the loads are dereferenceable and invariant.

Definition at line 1398 of file MachineInstr.cpp.

References llvm::MachineFunction::getFrameInfo(), llvm::MachineBasicBlock::getParent(), getParent(), mayLoad(), memoperands(), memoperands_empty(), and llvm::AAResults::pointsToConstantMemory().

Referenced by hasSameValue(), isSafeToMove(), and llvm::CombinerHelper::matchEqualDefs().

◆ isEHLabel()

bool llvm::MachineInstr::isEHLabel ( ) const
inline

Definition at line 1188 of file MachineInstr.h.

References llvm::ISD::EH_LABEL, and getOpcode().

Referenced by isLabel().

◆ isEHScopeReturn()

bool llvm::MachineInstr::isEHScopeReturn ( QueryType  Type = AnyInBundle) const
inline

Return true if this is an instruction that marks the end of an EH scope, i.e., a catchpad or a cleanuppad instruction.

Definition at line 819 of file MachineInstr.h.

References llvm::MCID::EHScopeReturn, and hasProperty().

Referenced by llvm::MachineBasicBlock::isEHScopeReturnBlock().

◆ isExtractSubreg()

bool llvm::MachineInstr::isExtractSubreg ( ) const
inline

Definition at line 1299 of file MachineInstr.h.

References getOpcode().

Referenced by isOperandSubregIdx().

◆ isExtractSubregLike()

bool llvm::MachineInstr::isExtractSubregLike ( QueryType  Type = IgnoreBundle) const
inline

Return true if this instruction behaves the same way as the generic EXTRACT_SUBREG instructions.

E.g., on ARM, rX, rY VMOVRRD dZ is equivalent to two EXTRACT_SUBREG: rX = EXTRACT_SUBREG dZ, ssub_0 rY = EXTRACT_SUBREG dZ, ssub_1

Note that for the optimizers to be able to take advantage of this property, TargetInstrInfo::getExtractSubregLikeInputs has to be override accordingly.

Definition at line 980 of file MachineInstr.h.

References llvm::MCID::ExtractSubreg, and hasProperty().

◆ isFullCopy()

bool llvm::MachineInstr::isFullCopy ( ) const
inline

Definition at line 1295 of file MachineInstr.h.

References getOperand(), llvm::MachineOperand::getSubReg(), and isCopy().

Referenced by removeCopies().

◆ isGCLabel()

bool llvm::MachineInstr::isGCLabel ( ) const
inline

Definition at line 1189 of file MachineInstr.h.

References getOpcode().

Referenced by isLabel().

◆ isIdenticalTo()

bool MachineInstr::isIdenticalTo ( const MachineInstr Other,
MICheckType  Check = CheckDefs 
) const

◆ isIdentityCopy()

bool llvm::MachineInstr::isIdentityCopy ( ) const
inline

Return true is the instruction is an identity copy.

Definition at line 1310 of file MachineInstr.h.

References getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getSubReg(), and isCopy().

◆ isImplicitDef()

bool llvm::MachineInstr::isImplicitDef ( ) const
inline

◆ isIndirectBranch()

bool llvm::MachineInstr::isIndirectBranch ( QueryType  Type = AnyInBundle) const
inline

◆ isIndirectDebugValue()

bool llvm::MachineInstr::isIndirectDebugValue ( ) const
inline

A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate.

Definition at line 1235 of file MachineInstr.h.

References getDebugOperand(), isDebugOffsetImm(), and llvm::MachineOperand::isReg().

Referenced by print().

◆ isInlineAsm()

bool llvm::MachineInstr::isInlineAsm ( ) const
inline

◆ isInsertSubreg()

bool llvm::MachineInstr::isInsertSubreg ( ) const
inline

Definition at line 1275 of file MachineInstr.h.

References getOpcode().

Referenced by llvm::ARMBaseInstrInfo::getOperandLatency(), and isOperandSubregIdx().

◆ isInsertSubregLike()

bool llvm::MachineInstr::isInsertSubregLike ( QueryType  Type = IgnoreBundle) const
inline

Return true if this instruction behaves the same way as the generic INSERT_SUBREG instructions.

E.g., on ARM, dX = VSETLNi32 dY, rZ, Imm is equivalent to a INSERT_SUBREG: dX = INSERT_SUBREG dY, rZ, translateImmToSubIdx(Imm)

Note that for the optimizers to be able to take advantage of this property, TargetInstrInfo::getInsertSubregLikeInputs has to be override accordingly.

Definition at line 994 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::InsertSubreg.

◆ isInsideBundle()

bool llvm::MachineInstr::isInsideBundle ( ) const
inline

Return true if MI is in a bundle (but not the first MI in a bundle).

A bundle looks like this before it's finalized:

| MI |

|

| MI * |

|

| MI * |

In this case, the first MI starts a bundle but is not inside a bundle, the next 2 MIs are considered "inside" the bundle.

After a bundle is finalized, it looks like this:

| Bundle |

|

| MI * |

|

| MI * |

|

| MI * |

The first instruction has the special opcode "BUNDLE". It's not "inside" a bundle, but the next three MIs are.

Definition at line 385 of file MachineInstr.h.

References BundledPred, and getFlag().

◆ isKill()

bool llvm::MachineInstr::isKill ( ) const
inline

Definition at line 1259 of file MachineInstr.h.

References getOpcode().

Referenced by findRegisterUseOperand(), and findRegisterUseOperandIdx().

◆ isLabel()

bool llvm::MachineInstr::isLabel ( ) const
inline

Returns true if the MachineInstr represents a label.

Definition at line 1195 of file MachineInstr.h.

References isAnnotationLabel(), isEHLabel(), and isGCLabel().

Referenced by isPosition().

◆ isLoadFoldBarrier()

bool MachineInstr::isLoadFoldBarrier ( ) const

Returns true if it is illegal to fold a load across this instruction.

Definition at line 1469 of file MachineInstr.cpp.

References hasUnmodeledSideEffects(), isCall(), isPseudoProbe(), and mayStore().

◆ isMetaInstruction()

bool llvm::MachineInstr::isMetaInstruction ( ) const
inline

Return true if this instruction doesn't produce any output in the form of executable instructions.

Definition at line 1317 of file MachineInstr.h.

References llvm::ISD::EH_LABEL, getOpcode(), llvm::ISD::LIFETIME_END, llvm::ISD::LIFETIME_START, and llvm::ISD::PSEUDO_PROBE.

Referenced by llvm::DebugHandlerBase::endInstruction(), and isTransient().

◆ isMoveImmediate()

bool llvm::MachineInstr::isMoveImmediate ( QueryType  Type = IgnoreBundle) const
inline

Return true if this instruction is a move immediate (including conditional moves) instruction.

Definition at line 898 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::MoveImm.

◆ isMoveReg()

bool llvm::MachineInstr::isMoveReg ( QueryType  Type = IgnoreBundle) const
inline

Return true if this instruction is a register move.

(including moving values from subreg to reg)

Definition at line 904 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::MoveReg.

◆ isMSInlineAsm()

bool llvm::MachineInstr::isMSInlineAsm ( ) const
inline

FIXME: Seems like a layering violation that the AsmDialect, which is X86 specific, be attached to a generic MachineInstr.

Definition at line 1268 of file MachineInstr.h.

References llvm::InlineAsm::AD_Intel, getInlineAsmDialect(), and isInlineAsm().

◆ isNonListDebugValue()

bool llvm::MachineInstr::isNonListDebugValue ( ) const
inline

◆ isNotDuplicable()

bool llvm::MachineInstr::isNotDuplicable ( QueryType  Type = AnyInBundle) const
inline

Return true if this instruction cannot be safely duplicated.

For example, if the instruction has a unique labels attached to it, duplicating it would cause multiple definition errors.

Definition at line 921 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::NotDuplicable.

Referenced by llvm::TargetInstrInfo::duplicate().

◆ isOperandSubregIdx()

bool llvm::MachineInstr::isOperandSubregIdx ( unsigned  OpIdx) const
inline

Return true if operand OpIdx is a subregister index.

Definition at line 588 of file MachineInstr.h.

References assert(), getOperand(), llvm::Intrinsic::getType(), isExtractSubreg(), isInsertSubreg(), isRegSequence(), isSubregToReg(), and llvm::MachineOperand::MO_Immediate.

Referenced by print().

◆ isPHI()

bool llvm::MachineInstr::isPHI ( ) const
inline

◆ isPosition()

bool llvm::MachineInstr::isPosition ( ) const
inline

Definition at line 1208 of file MachineInstr.h.

References isCFIInstruction(), and isLabel().

Referenced by isSafeToMove().

◆ isPredicable()

bool llvm::MachineInstr::isPredicable ( QueryType  Type = AllInBundle) const
inline

Return true if this instruction has a predicate operand that controls execution.

It may be set to 'always', or may be set to other values. There are various methods in TargetInstrInfo that can be used to control and modify the predicate in this instruction.

Definition at line 885 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Predicable.

◆ isPreISelOpcode()

bool llvm::MachineInstr::isPreISelOpcode ( QueryType  Type = IgnoreBundle) const
inline

Return true if this is an instruction that should go through the usual legalization steps.

Definition at line 789 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::PreISelOpcode.

◆ isPseudo()

bool llvm::MachineInstr::isPseudo ( QueryType  Type = IgnoreBundle) const
inline

Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction.

Definition at line 809 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Pseudo.

Referenced by llvm::ConvergingVLIWScheduler::SchedulingCost().

◆ isPseudoProbe()

bool llvm::MachineInstr::isPseudoProbe ( ) const
inline

Definition at line 1203 of file MachineInstr.h.

References getOpcode(), and llvm::ISD::PSEUDO_PROBE.

Referenced by isDebugOrPseudoInstr(), and isLoadFoldBarrier().

◆ isRegSequence()

bool llvm::MachineInstr::isRegSequence ( ) const
inline

◆ isRegSequenceLike()

bool llvm::MachineInstr::isRegSequenceLike ( QueryType  Type = IgnoreBundle) const
inline

Return true if this instruction behaves the same way as the generic REG_SEQUENCE instructions.

E.g., on ARM, dX VMOVDRR rY, rZ is equivalent to dX = REG_SEQUENCE rY, ssub_0, rZ, ssub_1.

Note that for the optimizers to be able to take advantage of this property, TargetInstrInfo::getRegSequenceLikeInputs has to be override accordingly.

Definition at line 965 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::RegSequence.

◆ isRegTiedToDefOperand()

bool llvm::MachineInstr::isRegTiedToDefOperand ( unsigned  UseOpIdx,
unsigned *  DefOpIdx = nullptr 
) const
inline

Return true if the use operand of the specified index is tied to a def operand.

It also returns the def operand index by reference if DefOpIdx is not null.

Definition at line 1557 of file MachineInstr.h.

References findTiedOperandIdx(), getOperand(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isTied(), and llvm::MachineOperand::isUse().

Referenced by addRegisterKilled(), llvm::AnalyzeVirtRegInBundle(), and getRegClassConstraint().

◆ isRegTiedToUseOperand()

bool llvm::MachineInstr::isRegTiedToUseOperand ( unsigned  DefOpIdx,
unsigned *  UseOpIdx = nullptr 
) const
inline

Given the index of a register def operand, check if the register def is tied to a source operand, due to either two-address elimination or inline assembly constraints.

Returns the first tied use operand index by reference if UseOpIdx is not null.

Definition at line 1544 of file MachineInstr.h.

References findTiedOperandIdx(), getOperand(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::isTied().

◆ isRematerializable()

bool llvm::MachineInstr::isRematerializable ( QueryType  Type = AllInBundle) const
inline

Returns true if this instruction is a candidate for remat.

This flag is deprecated, please don't use it anymore. If this flag is set, the isReallyTriviallyReMaterializable() method is called to verify the instruction is really rematable.

Definition at line 1103 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Rematerializable.

◆ isReturn()

bool llvm::MachineInstr::isReturn ( QueryType  Type = AnyInBundle) const
inline

◆ isSafeToMove()

bool MachineInstr::isSafeToMove ( AAResults AA,
bool &  SawStore 
) const

Return true if it is safe to move this instruction.

isSafeToMove - Return true if it is safe to move this instruction.

If SawStore is set to true, it means that there is a store (or call) between the instruction's location and its intended destination.

Definition at line 1232 of file MachineInstr.cpp.

References hasOrderedMemoryRef(), hasUnmodeledSideEffects(), isCall(), isDebugInstr(), isDereferenceableInvariantLoad(), isPHI(), isPosition(), isTerminator(), mayLoad(), mayRaiseFPException(), and mayStore().

Referenced by llvm::X86InstrInfo::optimizeLoadInstr().

◆ isSelect()

bool llvm::MachineInstr::isSelect ( QueryType  Type = IgnoreBundle) const
inline

Return true if this instruction is a select instruction.

Definition at line 914 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Select.

◆ isStackAligningInlineAsm()

bool MachineInstr::isStackAligningInlineAsm ( ) const

◆ isSubregToReg()

bool llvm::MachineInstr::isSubregToReg ( ) const
inline

Definition at line 1279 of file MachineInstr.h.

References getOpcode().

Referenced by isCopyLike(), and isOperandSubregIdx().

◆ isTerminator()

bool llvm::MachineInstr::isTerminator ( QueryType  Type = AnyInBundle) const
inline

Returns true if this instruction part of the terminator for a basic block.

Typically this is things like return and branch instructions.

Various passes use this to insert code into the bottom of a basic block, but before control flow occurs.

Definition at line 847 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Terminator.

Referenced by cannotCoexistAsymm(), and isSafeToMove().

◆ isTransient()

bool llvm::MachineInstr::isTransient ( ) const
inline

Return true if this is a transient instruction that is either very likely to be eliminated during register allocation (such as copy-like instructions), or if this instruction doesn't have an execution-time cost.

Definition at line 1341 of file MachineInstr.h.

References getOpcode(), and isMetaInstruction().

Referenced by llvm::TargetSchedModel::computeOperandLatency(), llvm::SchedDFSImpl::visitPostorderNode(), and llvm::SchedDFSImpl::visitPreorder().

◆ isUnconditionalBranch()

bool llvm::MachineInstr::isUnconditionalBranch ( QueryType  Type = AnyInBundle) const
inline

Return true if this is a branch which always transfers control flow to some other block.

The TargetInstrInfo::analyzeBranch method can be used to get more information about this branch.

Definition at line 877 of file MachineInstr.h.

References isBarrier(), isBranch(), and isIndirectBranch().

Referenced by llvm::MipsInstrInfo::analyzeBranch().

◆ isUndefDebugValue()

bool llvm::MachineInstr::isUndefDebugValue ( ) const
inline

Return true if the instruction is a debug value which describes a part of a variable as unavailable.

Definition at line 1245 of file MachineInstr.h.

References debug_operands(), and isDebugValue().

◆ isVariadic()

bool llvm::MachineInstr::isVariadic ( QueryType  Type = IgnoreBundle) const
inline

Return true if this instruction can have a variable number of operands.

In this case, the variable operands will be after the normal operands but before the implicit definitions and uses (if any are present).

Definition at line 797 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Variadic.

Referenced by getTypeToPrint().

◆ killsRegister()

bool llvm::MachineInstr::killsRegister ( Register  Reg,
const TargetRegisterInfo TRI = nullptr 
) const
inline

Return true if the MachineInstr kills the specified register.

If TargetRegisterInfo is passed, then it also checks if there is a kill of a super-register.

Definition at line 1389 of file MachineInstr.h.

References findRegisterUseOperandIdx(), Reg, and TRI.

Referenced by matchSwap(), and llvm::X86InstrInfo::optimizeCompareInstr().

◆ mayAlias()

bool MachineInstr::mayAlias ( AAResults AA,
const MachineInstr Other,
bool  UseTBAA 
) const

Returns true if this instruction's memory access aliases the memory access of Other.

Assumes any physical registers used to compute addresses have the same value for both instructions. Returns false if neither instruction writes to memory.

Parameters
AAOptional alias analysis, used to compare memory operands.
OtherMachineInstr to check aliasing against.
UseTBAAWhether to pass TBAA information to alias analysis.

Definition at line 1328 of file MachineInstr.cpp.

References llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::MachineFunction::getFrameInfo(), llvm::TargetSubtargetInfo::getInstrInfo(), getMF(), getNumMemOperands(), llvm::MachineFunction::getSubtarget(), isCall(), mayLoadOrStore(), mayStore(), memoperands(), memoperands_empty(), MemOperandsHaveAlias(), Other, TII, and UseTBAA.

Referenced by llvm::ScheduleDAGInstrs::addChainDependency(), and mayAlias().

◆ mayLoad()

bool llvm::MachineInstr::mayLoad ( QueryType  Type = AnyInBundle) const
inline

◆ mayLoadOrStore()

bool llvm::MachineInstr::mayLoadOrStore ( QueryType  Type = AnyInBundle) const
inline

◆ mayRaiseFPException()

bool llvm::MachineInstr::mayRaiseFPException ( ) const
inline

Return true if this instruction could possibly raise a floating-point exception.

This is the case if the instruction is a floating-point instruction that can in principle raise an exception, as indicated by the MCID::MayRaiseFPException property, and at the same time, the instruction is used in a context where we expect floating-point exceptions are not disabled, as indicated by the NoFPExcept MI flag.

Definition at line 1038 of file MachineInstr.h.

References getFlag(), hasProperty(), and llvm::MCID::MayRaiseFPException.

Referenced by llvm::SwingSchedulerDAG::isLoopCarriedDep(), and isSafeToMove().

◆ mayStore()

bool llvm::MachineInstr::mayStore ( QueryType  Type = AnyInBundle) const
inline

◆ memoperands()

ArrayRef<MachineMemOperand *> llvm::MachineInstr::memoperands ( ) const
inline

Access to memory operands of the instruction.

If there are none, that does not imply anything about whether the function accesses memory. Instead, the caller must behave conservatively.

Definition at line 690 of file MachineInstr.h.

References Info, and llvm::makeArrayRef().

Referenced by llvm::VLIWPacketizerList::alias(), cloneMergedMemRefs(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::ARMBankConflictHazardRecognizer::getHazardType(), getNumMemOperands(), hasOneMemOperand(), hasOrderedMemoryRef(), isDereferenceableInvariantLoad(), mayAlias(), memoperands_begin(), memoperands_empty(), memoperands_end(), print(), setHeapAllocMarker(), setPostInstrSymbol(), and setPreInstrSymbol().

◆ memoperands_begin()

mmo_iterator llvm::MachineInstr::memoperands_begin ( ) const
inline

◆ memoperands_empty()

bool llvm::MachineInstr::memoperands_empty ( ) const
inline

Return true if we don't have any memory operands which described the memory access done by this instruction.

If this is true, calling code must be conservative.

Definition at line 720 of file MachineInstr.h.

References memoperands().

Referenced by llvm::VLIWPacketizerList::alias(), cloneMergedMemRefs(), dropMemRefs(), hasOrderedMemoryRef(), isDereferenceableInvariantLoad(), mayAlias(), and print().

◆ memoperands_end()

mmo_iterator llvm::MachineInstr::memoperands_end ( ) const
inline

Access to memory operands of the instruction.

If memoperands_begin() == memoperands_end(), that does not imply anything about whether the function accesses memory. Instead, the caller must behave conservatively.

Definition at line 715 of file MachineInstr.h.

References memoperands().

Referenced by addMemOperand(), cloneMergedMemRefs(), and llvm::TargetInstrInfo::foldMemoryOperand().

◆ mergeFlagsWith()

uint16_t MachineInstr::mergeFlagsWith ( const MachineInstr Other) const

Return the MIFlags which represent both MachineInstrs.

This should be used when merging two MachineInstrs into one. This routine does not modify the MIFlags of this MachineInstr.

Definition at line 528 of file MachineInstr.cpp.

References getFlags(), and Other.

◆ modifiesRegister()

bool llvm::MachineInstr::modifiesRegister ( Register  Reg,
const TargetRegisterInfo TRI = nullptr 
) const
inline

◆ moveBefore()

void MachineInstr::moveBefore ( MachineInstr MovePos)

◆ operands() [1/2]

iterator_range<mop_iterator> llvm::MachineInstr::operands ( )
inline

◆ operands() [2/2]

iterator_range<const_mop_iterator> llvm::MachineInstr::operands ( ) const
inline

Definition at line 621 of file MachineInstr.h.

References llvm::make_range(), operands_begin(), and operands_end().

◆ operands_begin() [1/2]

mop_iterator llvm::MachineInstr::operands_begin ( )
inline

◆ operands_begin() [2/2]

const_mop_iterator llvm::MachineInstr::operands_begin ( ) const
inline

Definition at line 615 of file MachineInstr.h.

References Operands.

◆ operands_end() [1/2]

mop_iterator llvm::MachineInstr::operands_end ( )
inline

◆ operands_end() [2/2]

const_mop_iterator llvm::MachineInstr::operands_end ( ) const
inline

Definition at line 616 of file MachineInstr.h.

References Operands.

◆ operator=()

MachineInstr& llvm::MachineInstr::operator= ( const MachineInstr )
delete

◆ peekDebugInstrNum()

unsigned llvm::MachineInstr::peekDebugInstrNum ( ) const
inline

Examine the instruction number of this MachineInstr.

May be zero if it hasn't been assigned a number yet.

Definition at line 465 of file MachineInstr.h.

Referenced by llvm::MachineFunction::substituteDebugValuesForInst().

◆ print() [1/2]

void MachineInstr::print ( raw_ostream OS,
bool  IsStandalone = true,
bool  SkipOpers = false,
bool  SkipDebugLoc = false,
bool  AddNewLine = true,
const TargetInstrInfo TII = nullptr 
) const

Print this MI to OS.

Don't print information that can be inferred from other instructions if IsStandalone is false. It is usually true when only a fragment of the function is printed. Only print the defs and the opcode if SkipOpers is true. Otherwise, also print operands if SkipDebugLoc is true. Otherwise, also print the debug loc, with a terminating newline. TII is used to print the opcode name. If it's not present, but the MI is in a function, the opcode will be printed using the function's TII.

Definition at line 1577 of file MachineInstr.cpp.

References F, llvm::MachineFunction::getFunction(), llvm::TargetSubtargetInfo::getInstrInfo(), getMFIfAvailable(), llvm::MachineFunction::getSubtarget(), llvm::ModuleSlotTracker::incorporateFunction(), M, and TII.

Referenced by dump(), llvm::ScheduleDAGInstrs::getGraphNodeLabel(), llvm::SMSchedule::print(), and false::Chain::str().

◆ print() [2/2]

void MachineInstr::print ( raw_ostream OS,
ModuleSlotTracker MST,
bool  IsStandalone = true,
bool  SkipOpers = false,
bool  SkipDebugLoc = false,
bool  AddNewLine = true,
const TargetInstrInfo TII = nullptr 
) const

Definition at line 1595 of file MachineInstr.cpp.

References llvm::InlineAsm::AD_ATT, llvm::InlineAsm::AD_Intel, assert(), Context, DL, llvm::numbers::e, llvm::InlineAsm::Extra_HasSideEffects, llvm::InlineAsm::Extra_IsAlignStack, llvm::InlineAsm::Extra_IsConvergent, llvm::InlineAsm::Extra_MayLoad, llvm::InlineAsm::Extra_MayStore, findTiedOperandIdx(), FmAfn, FmArcp, FmContract, FmNoInfs, FmNoNans, FmNsz, FmReassoc, FrameDestroy, FrameSetup, llvm::Function::getContext(), getDebugLoc(), getDebugVariable(), getDebugVariableOp(), getFlag(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), getHeapAllocMarker(), llvm::MachineOperand::getImm(), getInlineAsmDialect(), llvm::InlineAsm::getKind(), llvm::InlineAsm::getKindName(), llvm::InlineAsm::getMemConstraintName(), llvm::InlineAsm::getMemoryConstraintID(), llvm::MachineOperand::getMetadata(), getMFIfAvailable(), llvm::InlineAsm::getNumOperandRegisters(), getNumOperands(), getOpcode(), getOperand(), getPostInstrSymbol(), getPreInstrSymbol(), llvm::TargetRegisterInfo::getRegClass(), llvm::TargetRegisterInfo::getRegClassName(), getTypeToPrint(), hasComplexRegisterTies(), llvm::InlineAsm::hasRegClassConstraint(), i, isCFIInstruction(), isDebugLabel(), isDebugValue(), llvm::MachineOperand::isDef(), IsExact, llvm::MachineOperand::isImm(), llvm::InlineAsm::isImmKind(), llvm::MachineOperand::isImplicit(), isIndirectDebugValue(), isInlineAsm(), llvm::InlineAsm::isMemKind(), llvm::MachineOperand::isMetadata(), isOperandSubregIdx(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isTied(), llvm::InlineAsm::isUseOperandTiedToDef(), memoperands(), memoperands_empty(), llvm::InlineAsm::MIOp_AsmString, llvm::InlineAsm::MIOp_ExtraInfo, llvm::InlineAsm::MIOp_FirstOperand, MRI, NoFPExcept, NoMerge, NoSWrap, NoUWrap, llvm::MachineOperand::print(), llvm::MachineBasicBlock::print(), llvm::Metadata::printAsOperand(), llvm::MachineBasicBlock::printAsOperand(), llvm::MachineOperand::printSubRegIdx(), llvm::MachineOperand::printSymbol(), TII, TRI, and tryToGetTargetInfo().

◆ readsRegister()

bool llvm::MachineInstr::readsRegister ( Register  Reg,
const TargetRegisterInfo TRI = nullptr 
) const
inline

◆ readsVirtualRegister()

bool llvm::MachineInstr::readsVirtualRegister ( Register  Reg) const
inline

Return true if the MachineInstr reads the specified virtual register.

Take into account that a partial define is a read-modify-write operation.

Definition at line 1376 of file MachineInstr.h.

References readsWritesVirtualRegister(), and Reg.

◆ readsWritesVirtualRegister()

std::pair< bool, bool > MachineInstr::readsWritesVirtualRegister ( Register  Reg,
SmallVectorImpl< unsigned > *  Ops = nullptr 
) const

Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg.

readsWritesVirtualRegister - Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg.

This also considers partial defines. If Ops is not null, all operand indices for Reg are added.

This also considers partial defines.

Definition at line 1012 of file MachineInstr.cpp.

References llvm::numbers::e, getNumOperands(), getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getSubReg(), i, llvm::MachineOperand::isReg(), llvm::MachineOperand::isUndef(), llvm::MachineOperand::isUse(), and Reg.

Referenced by llvm::PPCInstrInfo::fixupIsDeadOrKill(), and readsVirtualRegister().

◆ registerDefIsDead()

bool llvm::MachineInstr::registerDefIsDead ( Register  Reg,
const TargetRegisterInfo TRI = nullptr 
) const
inline

Returns true if the register is dead in this machine instruction.

If TargetRegisterInfo is passed, then it also checks if there is a dead def of a super-register.

Definition at line 1414 of file MachineInstr.h.

References findRegisterDefOperandIdx(), Reg, and TRI.

Referenced by llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::X86InstrInfo::optimizeCompareInstr(), and transferDeadCC().

◆ removeFromBundle()

MachineInstr * MachineInstr::removeFromBundle ( )

Unlink this instruction from its basic block and return it without deleting it.

If the instruction is part of a bundle, the other instructions in the bundle remain bundled.

Definition at line 672 of file MachineInstr.cpp.

References assert(), getParent(), and llvm::MachineBasicBlock::remove_instr().

◆ removeFromParent()

MachineInstr * MachineInstr::removeFromParent ( )

Unlink 'this' from the containing basic block, and return it without deleting it.

This function can not be used on bundled instructions, use removeFromBundle() to remove individual instructions from a bundle.

Definition at line 667 of file MachineInstr.cpp.

References assert(), getParent(), and llvm::MachineBasicBlock::remove().

Referenced by llvm::ARMBlockPlacement::revertWhileToDo().

◆ RemoveOperand()

void MachineInstr::RemoveOperand ( unsigned  OpNo)

Erase an operand from an instruction, leaving it with one fewer operand than it started with.

RemoveOperand - Erase an operand from an instruction, leaving it with one fewer operand than it started with.

Definition at line 303 of file MachineInstr.cpp.

References assert(), llvm::numbers::e, getNumOperands(), i, isReg(), moveOperands(), MRI, N, llvm::MachineRegisterInfo::removeRegOperandFromUseList(), and untieRegOperand().

Referenced by addRegisterDead(), addRegisterKilled(), ExpandMOVImmSExti8(), expandSHXDROT(), llvm::MipsInstrInfo::genInstrWithNewOpc(), LowerCallResults(), matchSwap(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), llvm::SIInstrInfo::moveToVALU(), llvm::AArch64InstrInfo::optimizeCompareInstr(), and llvm::X86InstrInfo::optimizeCompareInstr().

◆ setAsmPrinterFlag()

void llvm::MachineInstr::setAsmPrinterFlag ( uint8_t  Flag)
inline

Set a flag for the AsmPrinter.

Definition at line 315 of file MachineInstr.h.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), and spillVGPRtoAGPR().

◆ setDebugInstrNum()

void llvm::MachineInstr::setDebugInstrNum ( unsigned  Num)
inline

Set instruction number of this MachineInstr.

Avoid using unless you're deserializing this information.

Definition at line 469 of file MachineInstr.h.

◆ setDebugLoc()

void llvm::MachineInstr::setDebugLoc ( DebugLoc  dl)
inline

Replace current source information with new such.

Avoid using this, the constructor argument is preferable.

Definition at line 1745 of file MachineInstr.h.

References assert(), and move.

Referenced by expandLoadStackGuard().

◆ setDebugValueUndef()

void llvm::MachineInstr::setDebugValueUndef ( )
inline

Sets all register debug operands in this debug value instruction to be undef.

Definition at line 1852 of file MachineInstr.h.

References assert(), debug_operands(), and isDebugValue().

Referenced by performSink().

◆ setDesc()

void llvm::MachineInstr::setDesc ( const MCInstrDesc tid)
inline

◆ setFlag()

void llvm::MachineInstr::setFlag ( MIFlag  Flag)
inline

Set a MI flag.

Definition at line 335 of file MachineInstr.h.

Referenced by bundleWithPred(), bundleWithSucc(), FuseInst(), and transferMIFlag().

◆ setFlags()

void llvm::MachineInstr::setFlags ( unsigned  flags)
inline

◆ setHeapAllocMarker()

void MachineInstr::setHeapAllocMarker ( MachineFunction MF,
MDNode MD 
)

Set a marker on instructions that denotes where we should create and emit heap alloc site labels.

This waits until after instruction selection and optimizations to create the label, so it should still work if the instruction is removed or duplicated.

Definition at line 505 of file MachineInstr.cpp.

References getHeapAllocMarker(), getPostInstrSymbol(), getPreInstrSymbol(), and memoperands().

Referenced by cloneInstrSymbols(), and llvm::FastISel::lowerCallTo().

◆ setMemRefs()

void MachineInstr::setMemRefs ( MachineFunction MF,
ArrayRef< MachineMemOperand * >  MemRefs 
)

Assign this MachineInstr's memory reference descriptor list.

Unlike other methods, this will allocate them into a new array associated with the provided MachineFunction.

Definition at line 371 of file MachineInstr.cpp.

References dropMemRefs(), llvm::ArrayRef< T >::empty(), getHeapAllocMarker(), getPostInstrSymbol(), and getPreInstrSymbol().

Referenced by addMemOperand(), cloneMemRefs(), cloneMergedMemRefs(), and llvm::TargetInstrInfo::foldMemoryOperand().

◆ setPhysRegsDeadExcept()

void MachineInstr::setPhysRegsDeadExcept ( ArrayRef< Register UsedRegs,
const TargetRegisterInfo TRI 
)

Mark every physreg used by this instruction as dead except those in the UsedRegs list.

On instructions with register mask operands, also add implicit-def operands for all registers in UsedRegs.

Definition at line 2044 of file MachineInstr.cpp.

References addRegisterDefined(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), llvm::none_of(), operands(), Reg, llvm::TargetRegisterInfo::regsOverlap(), llvm::MachineOperand::setIsDead(), and TRI.

Referenced by llvm::FastISel::lowerCallTo(), and llvm::FastISel::selectPatchpoint().

◆ setPostInstrSymbol()

void MachineInstr::setPostInstrSymbol ( MachineFunction MF,
MCSymbol Symbol 
)

Set a symbol that will be emitted just after the instruction itself.

Setting this to a null pointer will remove any such symbol.

FIXME: This is not fully implemented yet.

Definition at line 490 of file MachineInstr.cpp.

References getHeapAllocMarker(), getPostInstrSymbol(), getPreInstrSymbol(), memoperands(), and llvm::ARMBuildAttrs::Symbol.

Referenced by cloneInstrSymbols(), and llvm::SIInstrInfo::insertIndirectBranch().

◆ setPreInstrSymbol()

void MachineInstr::setPreInstrSymbol ( MachineFunction MF,
MCSymbol Symbol 
)

Set a symbol that will be emitted just prior to the instruction itself.

Setting this to a null pointer will remove any such symbol.

FIXME: This is not fully implemented yet.

Definition at line 475 of file MachineInstr.cpp.

References getHeapAllocMarker(), getPostInstrSymbol(), getPreInstrSymbol(), memoperands(), and llvm::ARMBuildAttrs::Symbol.

Referenced by cloneInstrSymbols().

◆ setRegisterDefReadUndef()

void MachineInstr::setRegisterDefReadUndef ( Register  Reg,
bool  IsUndef = true 
)

Mark all subregister defs of register Reg with the undef flag.

This function is used when we determined to have a subregister def in an otherwise undefined super register.

Definition at line 2018 of file MachineInstr.cpp.

References llvm::MachineOperand::getReg(), llvm::MachineOperand::getSubReg(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), operands(), Reg, and llvm::MachineOperand::setIsUndef().

Referenced by llvm::RegisterOperands::adjustLaneLiveness().

◆ shouldUpdateCallSiteInfo()

bool MachineInstr::shouldUpdateCallSiteInfo ( ) const

Return true if copying, moving, or erasing this instruction requires updating Call Site Info (see copyCallSiteInfo, moveCallSiteInfo, eraseCallSiteInfo).

Definition at line 720 of file MachineInstr.cpp.

References AnyInBundle, isBundle(), and isCandidateForCallSiteEntry().

Referenced by llvm::MachineFunction::CloneMachineInstrBundle(), llvm::MachineFunction::copyCallSiteInfo(), and llvm::MachineFunction::moveCallSiteInfo().

◆ substituteRegister()

void MachineInstr::substituteRegister ( Register  FromReg,
Register  ToReg,
unsigned  SubIdx,
const TargetRegisterInfo RegInfo 
)

Replace all occurrences of FromReg with ToReg:SubIdx, properly composing subreg indices where necessary.

Definition at line 1209 of file MachineInstr.cpp.

References llvm::MachineOperand::getReg(), llvm::TargetRegisterInfo::getSubReg(), llvm::Register::isPhysicalRegister(), llvm::MachineOperand::isReg(), operands(), llvm::MachineOperand::substPhysReg(), and llvm::MachineOperand::substVirtReg().

Referenced by llvm::X86InstrInfo::reMaterialize().

◆ tieOperands()

void MachineInstr::tieOperands ( unsigned  DefIdx,
unsigned  UseIdx 
)

Add a tie between the register operands at DefIdx and UseIdx.

tieOperands - Mark operands at DefIdx and UseIdx as tied to each other.

The tie will cause the register allocator to ensure that the two operands are assigned the same physical register.

Tied operands are managed automatically for explicit operands in the MCInstrDesc. This method is for exceptional cases like inline asm.

Use and def operands can be tied together, indicated by a non-zero TiedTo field. TiedTo can have these values:

0: Operand is not tied to anything. 1 to TiedMax-1: Tied to getOperand(TiedTo-1). TiedMax: Tied to an operand >= TiedMax-1.

The tied def must be one of the first TiedMax operands on a normal instruction. INLINEASM instructions allow more tied defs.

Definition at line 1099 of file MachineInstr.cpp.

References assert(), getOpcode(), getOperand(), llvm::MachineOperand::isDef(), isInlineAsm(), llvm::MachineOperand::isTied(), llvm::MachineOperand::isUse(), llvm::min(), and TiedMax.

Referenced by addOperand(), llvm::SIInstrInfo::copyPhysReg(), llvm::TargetLoweringBase::emitPatchPoint(), llvm::SIInstrInfo::expandPostRAPseudo(), foldPatchpoint(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), llvm::LanaiInstrInfo::optimizeSelect(), and llvm::ARMBaseInstrInfo::optimizeSelect().

◆ unbundleFromPred()

void MachineInstr::unbundleFromPred ( )

◆ unbundleFromSucc()

void MachineInstr::unbundleFromSucc ( )

◆ untieRegOperand()

void llvm::MachineInstr::untieRegOperand ( unsigned  OpIdx)
inline

◆ uses() [1/2]

iterator_range<mop_iterator> llvm::MachineInstr::uses ( )
inline

Returns a range that includes all operands that are register uses.

This may include unrelated operands which are not register uses.

Definition at line 666 of file MachineInstr.h.

References getNumExplicitDefs(), llvm::make_range(), operands_begin(), and operands_end().

Referenced by collectCallSiteParameters(), hasSameValue(), llvm::isKnownNeverNaN(), isSafeToMove(), LowerCallResults(), and llvm::CombinerHelper::matchEqualDefs().

◆ uses() [2/2]

iterator_range<const_mop_iterator> llvm::MachineInstr::uses ( ) const
inline

Returns a range that includes all operands that are register uses.

This may include unrelated operands which are not register uses.

Definition at line 670 of file MachineInstr.h.

References getNumExplicitDefs(), llvm::make_range(), operands_begin(), and operands_end().

◆ usesCustomInsertionHook()

bool llvm::MachineInstr::usesCustomInsertionHook ( QueryType  Type = IgnoreBundle) const
inline

Return true if this instruction requires custom insertion support when the DAG scheduler is inserting it into a machine basic block.

If this is true for the instruction, it basically means that it is a pseudo instruction used at SelectionDAG time that is expanded out into magic code by the target when MachineInstrs are formed.

If this is true, the TargetLoweringInfo::InsertAtEndOfBasicBlock method is used to insert this into the MachineBasicBlock.

Definition at line 1087 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::UsesCustomInserter.

Friends And Related Function Documentation

◆ ilist_callback_traits< MachineBasicBlock >

friend struct ilist_callback_traits< MachineBasicBlock >
friend

Definition at line 260 of file MachineInstr.h.

◆ ilist_traits< MachineInstr >

friend struct ilist_traits< MachineInstr >
friend

Definition at line 259 of file MachineInstr.h.

◆ MachineFunction

friend class MachineFunction
friend

Definition at line 274 of file MachineInstr.h.


The documentation for this class was generated from the following files: