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41 #define DEBUG_TYPE "machine-trace-metrics"
48 "Machine Trace Metrics",
false,
true)
68 TII =
ST.getInstrInfo();
69 TRI =
ST.getRegisterInfo();
71 Loops = &getAnalysis<MachineLoopInfo>();
111 for (
const auto &
MI : *
MBB) {
112 if (
MI.isTransient())
128 assert(PI->ProcResourceIdx < PRKinds &&
"Bad processor resource kind");
129 PRCycles[PI->ProcResourceIdx] += PI->Cycles;
136 for (
unsigned K = 0; K != PRKinds; ++K)
137 ProcResourceCycles[PROffset + K] =
145 assert(BlockInfo[MBBNum].hasResources() &&
146 "getResources() must be called before getProcResourceCycles()");
148 assert((MBBNum+1) * PRKinds <= ProcResourceCycles.size());
149 return ArrayRef(ProcResourceCycles.data() + MBBNum * PRKinds, PRKinds);
158 BlockInfo.resize(
MTM.BlockInfo.size());
160 ProcResourceDepths.
resize(
MTM.BlockInfo.size() * PRKinds);
161 ProcResourceHeights.
resize(
MTM.BlockInfo.size() * PRKinds);
169 return MTM.Loops->getLoopFor(
MBB);
174 void MachineTraceMetrics::Ensemble::
177 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
184 std::fill(ProcResourceDepths.begin() + PROffset,
185 ProcResourceDepths.begin() + PROffset + PRKinds, 0);
192 TraceBlockInfo *PredTBI = &BlockInfo[PredNum];
193 assert(PredTBI->hasValidDepth() &&
"Trace above has not been computed yet");
194 const FixedBlockInfo *PredFBI = MTM.getResources(TBI->
Pred);
195 TBI->
InstrDepth = PredTBI->InstrDepth + PredFBI->InstrCount;
196 TBI->
Head = PredTBI->Head;
201 for (
unsigned K = 0; K != PRKinds; ++K)
202 ProcResourceDepths[PROffset + K] = PredPRDepths[K] + PredPRCycles[K];
207 void MachineTraceMetrics::Ensemble::
210 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
214 TBI->InstrHeight = MTM.getResources(
MBB)->InstrCount;
220 llvm::copy(PRCycles, ProcResourceHeights.begin() + PROffset);
226 unsigned SuccNum = TBI->Succ->getNumber();
227 TraceBlockInfo *SuccTBI = &BlockInfo[SuccNum];
228 assert(SuccTBI->hasValidHeight() &&
"Trace below has not been computed yet");
229 TBI->InstrHeight += SuccTBI->InstrHeight;
230 TBI->Tail = SuccTBI->Tail;
234 for (
unsigned K = 0; K != PRKinds; ++K)
235 ProcResourceHeights[PROffset + K] = SuccPRHeights[K] + PRCycles[K];
265 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
266 assert((MBBNum+1) * PRKinds <= ProcResourceDepths.size());
267 return ArrayRef(ProcResourceDepths.data() + MBBNum * PRKinds, PRKinds);
278 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
279 assert((MBBNum+1) * PRKinds <= ProcResourceHeights.size());
280 return ArrayRef(ProcResourceHeights.data() + MBBNum * PRKinds, PRKinds);
312 const char *
getName()
const override {
return "MinInstr"; }
332 unsigned CurCount = MTM.getResources(
MBB)->InstrCount;
334 unsigned BestDepth = 0;
337 getDepthResources(Pred);
343 if (!Best ||
Depth < BestDepth) {
358 unsigned BestHeight = 0;
361 if (CurLoop && Succ == CurLoop->
getHeader())
367 getHeightResources(Succ);
373 if (!Best || Height < BestHeight) {
430 bool Downward =
false;
461 if ((LB.Downward ? To : *
From) == FromLoop->getHeader())
470 return LB.Visited.insert(To).second;
481 LoopBounds Bounds(BlockInfo, MTM.Loops);
484 Bounds.Downward =
false;
485 Bounds.Visited.clear();
488 TraceBlockInfo &TBI = BlockInfo[
I->getNumber()];
490 TBI.Pred = pickTracePred(
I);
498 computeDepthResources(
I);
502 Bounds.Downward =
true;
503 Bounds.Visited.clear();
506 TraceBlockInfo &TBI = BlockInfo[
I->getNumber()];
508 TBI.Succ = pickTraceSucc(
I);
516 computeHeightResources(
I);
529 WorkList.push_back(BadMBB);
542 WorkList.push_back(Pred);
548 }
while (!WorkList.empty());
554 WorkList.push_back(BadMBB);
567 WorkList.push_back(Succ);
573 }
while (!WorkList.empty());
581 for (
const auto &
I : *BadMBB)
587 assert(BlockInfo.size() == MTM.MF->getNumBlockIDs() &&
588 "Outdated BlockInfo size");
589 for (
unsigned Num = 0,
e = BlockInfo.size(); Num !=
e; ++Num) {
595 "Trace is broken, depth should have been invalidated.");
603 "Trace is broken, height should have been invalidated.");
607 "Trace contains backedge");
642 assert((++DefI).atEnd() &&
"Register has multiple defs");
654 if (
UseMI.isDebugInstr())
657 bool HasPhysRegs =
false;
666 if (
Reg.isPhysical()) {
672 Deps.push_back(DataDep(
MRI,
Reg,
UseMI.getOperandNo(
I)));
688 for (
unsigned i = 1;
i !=
UseMI.getNumOperands();
i += 2) {
689 if (
UseMI.getOperand(
i + 1).getMBB() == Pred) {
691 Deps.push_back(DataDep(
MRI,
Reg,
i));
715 Kills.push_back(
Reg);
719 Kills.push_back(
Reg);
725 if (
I == RegUnits.
end())
736 RegUnits.
erase(*Units);
739 for (
unsigned DefOp : LiveDefOps) {
761 unsigned MachineTraceMetrics::Ensemble::
762 computeCrossBlockCriticalPath(
const TraceBlockInfo &TBI) {
763 assert(TBI.HasValidInstrDepths &&
"Missing depth info");
764 assert(TBI.HasValidInstrHeights &&
"Missing height info");
766 for (
const LiveInReg &LIR : TBI.LiveIns) {
767 if (!LIR.Reg.isVirtual())
772 if (!DefTBI.isUsefulDominator(TBI))
774 unsigned Len = LIR.Height + Cycles[
DefMI].Depth;
792 for (
const DataDep &Dep : Deps) {
794 BlockInfo[Dep.DefMI->getParent()->getNumber()];
799 unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth;
801 if (!Dep.DefMI->isTransient())
802 DepCycle += MTM.SchedModel
803 .computeOperandLatency(Dep.DefMI, Dep.DefOp, &
UseMI, Dep.UseOp);
829 for (; Start != End; Start++)
830 updateDepth(Start->getParent(), *Start, RegUnits);
835 void MachineTraceMetrics::Ensemble::
846 Stack.push_back(
MBB);
858 while (!Stack.empty()) {
859 MBB = Stack.pop_back_val();
862 TBI.HasValidInstrDepths =
true;
863 TBI.CriticalPath = 0;
867 dbgs() <<
format(
"%7u Instructions\n", TBI.InstrDepth);
869 for (
unsigned K = 0; K != PRDepths.
size(); ++K)
871 unsigned Factor = MTM.SchedModel.getResourceFactor(K);
872 dbgs() <<
format(
"%6uc @ ", MTM.getCycles(PRDepths[K]))
873 << MTM.SchedModel.getProcResource(K)->Name <<
" ("
874 << PRDepths[K]/Factor <<
" ops x" << Factor <<
")\n";
879 if (TBI.HasValidInstrHeights)
880 TBI.CriticalPath = computeCrossBlockCriticalPath(TBI);
883 updateDepth(TBI,
UseMI, RegUnits);
899 MOE =
MI.operands_end();
905 if (!
Reg.isPhysical())
908 ReadOps.push_back(
MI.getOperandNo(MOI));
916 if (
I == RegUnits.
end())
918 unsigned DepHeight =
I->Cycle;
919 if (!
MI.isTransient()) {
925 Height =
std::max(Height, DepHeight);
932 for (
size_t I = 0,
E = ReadOps.size();
I !=
E; ++
I) {
937 if (LRU.
Cycle <= Height && LRU.
MI != &
MI) {
957 if (!Dep.DefMI->isTransient())
964 std::tie(
I, New) = Heights.
insert(std::make_pair(Dep.DefMI, UseHeight));
969 if (
I->second < UseHeight)
970 I->second = UseHeight;
977 void MachineTraceMetrics::Ensemble::
991 TBI.LiveIns.push_back(
Reg);
998 void MachineTraceMetrics::Ensemble::
1005 assert(TBI.hasValidHeight() &&
"Incomplete trace");
1006 if (TBI.HasValidInstrHeights)
1009 TBI.LiveIns.clear();
1027 for (LiveInReg &LI : TBI.LiveIns) {
1028 if (LI.Reg.isVirtual()) {
1030 unsigned &Height = Heights[MTM.MRI->getVRegDef(LI.Reg)];
1031 if (Height < LI.Height)
1036 RegUnits[LI.Reg].Cycle = LI.Height;
1047 TBI.HasValidInstrHeights =
true;
1048 TBI.CriticalPath = 0;
1051 dbgs() <<
format(
"%7u Instructions\n", TBI.InstrHeight);
1053 for (
unsigned K = 0; K != PRHeights.
size(); ++K)
1055 unsigned Factor = MTM.SchedModel.getResourceFactor(K);
1056 dbgs() <<
format(
"%6uc @ ", MTM.getCycles(PRHeights[K]))
1057 << MTM.SchedModel.getProcResource(K)->Name <<
" ("
1058 << PRHeights[K]/Factor <<
" ops x" << Factor <<
")\n";
1073 for (
const auto &
PHI : *Succ) {
1078 if (!Deps.empty()) {
1080 unsigned Height = TBI.Succ ? Cycles.lookup(&
PHI).Height : 0;
1084 addLiveIns(Deps.front().DefMI, Deps.front().DefOp, Stack);
1098 if (HeightI != Heights.
end()) {
1099 Cycle = HeightI->second;
1101 Heights.
erase(HeightI);
1115 for (
const DataDep &Dep : Deps)
1119 InstrCycles &MICycles = Cycles[&
MI];
1120 MICycles.Height =
Cycle;
1121 if (!TBI.HasValidInstrDepths) {
1126 TBI.CriticalPath =
std::max(TBI.CriticalPath,
Cycle + MICycles.Depth);
1133 for (LiveInReg &LIR : TBI.LiveIns) {
1141 RI = RegUnits.
begin(), RE = RegUnits.
end(); RI != RE; ++RI) {
1142 TBI.LiveIns.push_back(LiveInReg(RI->RegUnit, RI->Cycle));
1148 if (!TBI.HasValidInstrDepths)
1151 TBI.CriticalPath =
std::max(TBI.CriticalPath,
1152 computeCrossBlockCriticalPath(TBI));
1153 LLVM_DEBUG(
dbgs() <<
"Critical path: " << TBI.CriticalPath <<
'\n');
1164 computeInstrDepths(
MBB);
1166 computeInstrHeights(
MBB);
1168 return Trace(*
this, TBI);
1173 assert(getBlockNum() ==
unsigned(
MI.getParent()->getNumber()) &&
1174 "MI must be in the trace center block");
1176 return getCriticalPath() - (Cyc.
Depth + Cyc.
Height);
1184 assert(Deps.size() == 1 &&
"PHI doesn't have MBB as a predecessor");
1185 DataDep &Dep = Deps.front();
1186 unsigned DepCycle = getInstrCycles(*Dep.DefMI).Depth;
1188 if (!Dep.DefMI->isTransient())
1189 DepCycle += TE.MTM.SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp,
1202 for (
unsigned K = 0; K != PRDepths.
size(); ++K)
1203 PRMax =
std::max(PRMax, PRDepths[K] + PRCycles[K]);
1205 for (
unsigned PRD : PRDepths)
1209 PRMax = TE.MTM.getCycles(PRMax);
1212 unsigned Instrs = TBI.InstrDepth;
1215 Instrs += TE.MTM.BlockInfo[getBlockNum()].InstrCount;
1216 if (
unsigned IW = TE.MTM.SchedModel.getIssueWidth())
1233 unsigned ResourceIdx)
1235 unsigned Cycles = 0;
1240 PI = TE.MTM.SchedModel.getWriteProcResBegin(
SC),
1241 PE = TE.MTM.SchedModel.getWriteProcResEnd(
SC);
1243 if (PI->ProcResourceIdx != ResourceIdx)
1246 (PI->Cycles * TE.MTM.SchedModel.getResourceFactor(ResourceIdx));
1252 for (
unsigned K = 0; K != PRDepths.
size(); ++K) {
1253 unsigned PRCycles = PRDepths[K] + PRHeights[K];
1255 PRCycles += TE.MTM.getProcResourceCycles(
MBB->
getNumber())[K];
1256 PRCycles += extraCycles(ExtraInstrs, K);
1257 PRCycles -= extraCycles(RemoveInstrs, K);
1261 PRMax = TE.MTM.getCycles(PRMax);
1264 unsigned Instrs = TBI.InstrDepth + TBI.InstrHeight;
1267 Instrs += TE.MTM.getResources(
MBB)->InstrCount;
1268 Instrs += ExtraInstrs.
size();
1269 Instrs -= RemoveInstrs.
size();
1270 if (
unsigned IW = TE.MTM.SchedModel.getIssueWidth())
1288 OS <<
getName() <<
" ensemble:\n";
1289 for (
unsigned i = 0,
e = BlockInfo.size();
i !=
e; ++
i) {
1290 OS <<
" %bb." <<
i <<
'\t';
1291 BlockInfo[
i].print(OS);
1297 if (hasValidDepth()) {
1298 OS <<
"depth=" << InstrDepth;
1303 OS <<
" head=%bb." << Head;
1304 if (HasValidInstrDepths)
1307 OS <<
"depth invalid";
1309 if (hasValidHeight()) {
1310 OS <<
"height=" << InstrHeight;
1315 OS <<
" tail=%bb." <<
Tail;
1316 if (HasValidInstrHeights)
1319 OS <<
"height invalid";
1320 if (HasValidInstrDepths && HasValidInstrHeights)
1321 OS <<
", crit=" << CriticalPath;
1325 unsigned MBBNum = &TBI - &TE.BlockInfo[0];
1327 OS << TE.getName() <<
" trace %bb." << TBI.Head <<
" --> %bb." << MBBNum
1328 <<
" --> %bb." << TBI.Tail <<
':';
1329 if (TBI.hasValidHeight() && TBI.hasValidDepth())
1330 OS <<
' ' << getInstrCount() <<
" instrs.";
1331 if (TBI.HasValidInstrDepths && TBI.HasValidInstrHeights)
1332 OS <<
' ' << TBI.CriticalPath <<
" cycles.";
1335 OS <<
"\n%bb." << MBBNum;
1336 while (Block->hasValidDepth() && Block->Pred) {
1337 unsigned Num = Block->Pred->getNumber();
1339 Block = &TE.BlockInfo[Num];
1344 while (Block->hasValidHeight() && Block->Succ) {
1345 unsigned Num = Block->Succ->getNumber();
1347 Block = &TE.BlockInfo[Num];
iterator_range< po_ext_iterator< T, SetType > > post_order_ext(const T &G, SetType &S)
bool hasResources() const
Returns true when resource information for this block has been computed.
ProcResIter getWriteProcResBegin(const MCSchedClassDesc *SC) const
static StringRef getName(Value *V)
typename DenseT::iterator iterator
unsigned getOperandNo(const_mop_iterator I) const
Returns the number of the operand iterator I points to.
typename DenseT::const_iterator const_iterator
def_iterator def_begin(Register RegNo) const
This is an optimization pass for GlobalISel generic memory operations.
bool insertEdge(std::optional< const MachineBasicBlock * > From, const MachineBasicBlock *To)
MachineInstrBuilder & UseMI
unsigned Depth
Earliest issue cycle as determined by data dependencies and instruction latencies from the beginning ...
iterator find(const KeyT &Key)
find - Find an element by its key.
Per-basic block information that relates to a specific trace through the block.
unsigned InstrCount
The number of non-trivial instructions in the block.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Represents a single loop in the control flow graph.
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
unsigned getResourceFactor(unsigned ResIdx) const
Multiply the number of units consumed for a resource by this factor to normalize it relative to other...
void invalidate(const MachineBasicBlock *MBB)
Invalidate traces through BadMBB.
const FixedBlockInfo * getResources(const MachineBasicBlock *)
Get the fixed resource information about MBB. Compute it on demand.
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
ThreadPoolStrategy strategy
Reg
All possible values of the reg field in the ModR/M byte.
Strategy
Strategies for selecting traces.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const_iterator begin() const
bool hasValidHeight() const
Returns true if the height resources have been computed from the trace below this block.
bool erase(const KeyT &Val)
@ TS_MinInstrCount
Select the trace through a block that has the fewest instructions.
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
bool hasValidDepth() const
Returns true if the depth resources have been computed from the trace above this block.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
static unsigned InstrCount
Per-basic block information that doesn't depend on the trace through the block.
const_iterator end(StringRef path)
Get end iterator over path.
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
unsigned Head
The block number of the head of the trace. (When hasValidDepth()).
OutputIt copy(R &&Range, OutputIt Out)
mop_iterator operands_end()
Expected< ExpressionValue > max(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Identify one of the processor resource kinds consumed by a particular scheduling class for the specif...
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
void invalidate(const MachineBasicBlock *MBB)
Invalidate cached information about MBB.
unsigned const TargetRegisterInfo * TRI
Default po_iterator_storage implementation with an internal set object.
unsigned getOperandNo() const
getOperandNo - Return the operand # of this MachineOperand in its MachineInstr.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Trace getTrace(const MachineBasicBlock *MBB)
Get the trace that passes through MBB.
void init(const TargetSubtargetInfo *TSInfo)
Initialize the machine model for instruction scheduling.
static bool getDataDeps(const MachineInstr &UseMI, SmallVectorImpl< DataDep > &Deps, const MachineRegisterInfo *MRI)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Ensemble(MachineTraceMetrics *)
bool isPhysical() const
Return true if the specified register number is in the physical register namespace.
bool HasValidInstrHeights
Instruction heights have been computed. This implies hasValidHeight().
void updateDepths(MachineBasicBlock::iterator Start, MachineBasicBlock::iterator End, SparseSet< LiveRegUnit > &RegUnits)
Updates the depth of the instructions from Start to End.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
void updateDepth(TraceBlockInfo &TBI, const MachineInstr &, SparseSet< LiveRegUnit > &RegUnits)
Updates the depth of an machine instruction, given RegUnits.
unsigned InstrHeight
Accumulated number of instructions in the trace below this block.
TargetInstrInfo - Interface to description of machine instruction set.
void finishPostorder(const MachineBasicBlock *)
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
@ SC
CHAIN = SC CHAIN, Imm128 - System call.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
bool isUsefulDominator(const TraceBlockInfo &TBI) const
Assuming that this is a dominator of TBI, determine if it contains useful instruction depths.
const_iterator end() const
const MachineOperand & getOperand(unsigned i) const
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
Summarize the scheduling resources required for an instruction of a particular scheduling class.
Represent the analysis usage information of a pass.
char & MachineTraceMetricsID
MachineTraceMetrics - This pass computes critical path and CPU resource usage in an ensemble of trace...
bool atEnd() const
atEnd - return true if this iterator is equal to reg_end() on the value.
MachineOperand class - Representation of each machine instruction operand.
ArrayRef< unsigned > getProcResourceCycles(unsigned MBBNum) const
Get the scaled number of cycles used per processor resource in MBB.
A possibly irreducible generalization of a Loop.
InstrCycles represents the cycle height and depth of an instruction in a trace.
This class implements an extremely fast bulk output stream that can only output to a stream.
void print(raw_ostream &) const
unsigned getResourceDepth(bool Bottom) const
Return the resource depth of the top/bottom of the trace center block.
ProcResIter getWriteProcResEnd(const MCSchedClassDesc *SC) const
A trace represents a plausible sequence of executed basic blocks that passes through the current basi...
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
void getAnalysisUsage(AnalysisUsage &) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Register getReg(unsigned Idx) const
Get the register for the operand index.
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI)
Create Printable object to print register units on a raw_ostream.
bool isDepInTrace(const MachineInstr &DefMI, const MachineInstr &UseMI) const
A dependence is useful if the basic block of the defining instruction is part of the trace of the use...
const MCSchedClassDesc * resolveSchedClass(const MachineInstr *MI) const
Return the MCSchedClassDesc for this instruction.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Ensemble * getEnsemble(Strategy)
Get the trace ensemble representing the given trace selection strategy.
Provide an instruction scheduling machine model to CodeGen passes.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Representation of each machine instruction.
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
unsigned InstrDepth
Accumulated number of instructions in the trace above this block.
static bool isExitingLoop(const MachineLoop *From, const MachineLoop *To)
mop_iterator operands_begin()
void setUniverse(unsigned U)
setUniverse - Set the universe size which determines the largest key the set can hold.
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
iterator find(const_arg_type_t< KeyT > Val)
MachineTraceMetrics & MTM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
unsigned getResourceLength(ArrayRef< const MachineBasicBlock * > Extrablocks=std::nullopt, ArrayRef< const MCSchedClassDesc * > ExtraInstrs=std::nullopt, ArrayRef< const MCSchedClassDesc * > RemoveInstrs=std::nullopt) const
Return the resource length of the trace.
Register getReg() const
getReg - Returns the register number.
iterator_range< ipo_ext_iterator< T, SetType > > inverse_post_order_ext(const T &G, SetType &S)
iterator_range< pred_iterator > predecessors()
unsigned computeOperandLatency(const MachineInstr *DefMI, unsigned DefOperIdx, const MachineInstr *UseMI, unsigned UseOperIdx) const
Compute operand latency based on the available machine model.
MCRegister asMCReg() const
Utility to check-convert this value to a MCRegister.
void print(raw_ostream &) const
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
void verifyAnalysis() const override
verifyAnalysis() - This member can be implemented by a analysis pass to check state of analysis infor...
iterator_range< succ_iterator > successors()
const TraceBlockInfo * getHeightResources(const MachineBasicBlock *) const
INITIALIZE_PASS_BEGIN(MachineTraceMetrics, DEBUG_TYPE, "Machine Trace Metrics", false, true) INITIALIZE_PASS_END(MachineTraceMetrics
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
bool HasValidInstrDepths
Instruction depths have been computed. This implies hasValidDepth().
static unsigned updatePhysDepsUpwards(const MachineInstr &MI, unsigned Height, SparseSet< LiveRegUnit > &RegUnits, const TargetSchedModel &SchedModel, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI)
po_iterator_storage(LoopBounds &lb)
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
const MachineBasicBlock * getParent() const
unsigned Height
Minimum number of cycles from this instruction is issued to the of the trace, as determined by data d...
void invalidateHeight()
Invalidate height resources when a block below this one has changed.
static void getPHIDeps(const MachineInstr &UseMI, SmallVectorImpl< DataDep > &Deps, const MachineBasicBlock *Pred, const MachineRegisterInfo *MRI)
static bool pushDepHeight(const DataDep &Dep, const MachineInstr &UseMI, unsigned UseHeight, MIHeightMap &Heights, const TargetSchedModel &SchedModel, const TargetInstrInfo *TII)
unsigned getNumProcResourceKinds() const
Get the number of kinds of resources for this target.
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
TargetSubtargetInfo - Generic base class for all target subtargets.
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
bool isPredecessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a predecessor of this block.
const MachineBasicBlock * Pred
Trace predecessor, or NULL for the first block in the trace.
A trace ensemble is a collection of traces selected using the same strategy, for example 'minimum res...
bool readsReg() const
readsReg - Returns true if this operand reads the previous value of its register.
void setPreservesAll()
Set by analyses that do not transform their input at all.
void print(raw_ostream &) const
const MachineLoop * getLoopFor(const MachineBasicBlock *) const
BlockT * getHeader() const
iterator erase(iterator I)
erase - Erases an existing element identified by a valid iterator.
ArrayRef< unsigned > getProcResourceDepths(unsigned MBBNum) const
Get an array of processor resource depths for MBB.
ArrayRef< unsigned > getProcResourceHeights(unsigned MBBNum) const
Get an array of processor resource heights for MBB.
const TraceBlockInfo * getDepthResources(const MachineBasicBlock *) const
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
@ Kill
The last use of a register.
COFF::MachineTypes Machine
unsigned getInstrSlack(const MachineInstr &MI) const
Return the slack of MI.
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
MachineInstrBuilder MachineInstrBuilder & DefMI
size_t size() const
size - Get the array size.
void invalidateDepth()
Invalidate depth resources when some block above this one has changed.
reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register wit...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
auto reverse(ContainerTy &&C)
SparseSet - Fast set implementation for objects that can be identified by small unsigned keys.
ArrayRef(const T &OneElt) -> ArrayRef< T >
bool HasCalls
True when the block contains calls.
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
@ Tail
Attemps to make calls as fast as possible while guaranteeing that tail call optimization can always b...
AnalysisUsage & addRequired()
BlockVerifier::State From
unsigned getPHIDepth(const MachineInstr &PHI) const
Return the Depth of a PHI instruction in a trace center block successor.
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
bool runOnMachineFunction(MachineFunction &) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const MachineBasicBlock * Succ
Trace successor, or NULL for the last block in the trace.
bool hasInstrSchedModel() const
Return true if this machine model includes an instruction-level scheduling model.
static void updatePhysDepsDownwards(const MachineInstr *UseMI, SmallVectorImpl< DataDep > &Deps, SparseSet< LiveRegUnit > &RegUnits, const TargetRegisterInfo *TRI)
Wrapper class representing physical registers. Should be passed by value.
unsigned CriticalPath
Critical path length.