- c -
- C_00B028_MEM_ORDERED : SIDefines.h
- C_00B128_MEM_ORDERED : SIDefines.h
- C_00B228_MEM_ORDERED : SIDefines.h
- C_00B228_WGP_MODE : SIDefines.h
- C_00B428_MEM_ORDERED : SIDefines.h
- C_00B428_WGP_MODE : SIDefines.h
- C_00B848_DEBUG_MODE : SIDefines.h
- C_00B848_DX10_CLAMP : SIDefines.h
- C_00B848_FLOAT_MODE : SIDefines.h
- C_00B848_FWD_PROGRESS : SIDefines.h
- C_00B848_IEEE_MODE : SIDefines.h
- C_00B848_MEM_ORDERED : SIDefines.h
- C_00B848_PRIORITY : SIDefines.h
- C_00B848_PRIV : SIDefines.h
- C_00B848_RR_WG_MODE : SIDefines.h
- C_00B848_SGPRS : SIDefines.h
- C_00B848_VGPRS : SIDefines.h
- C_00B848_WGP_MODE : SIDefines.h
- C_00B84C_EXCP_EN : SIDefines.h
- C_00B84C_EXCP_EN_MSB : SIDefines.h
- C_00B84C_LDS_SIZE : SIDefines.h
- C_00B84C_SCRATCH_EN : SIDefines.h
- C_00B84C_TG_SIZE_EN : SIDefines.h
- C_00B84C_TGID_X_EN : SIDefines.h
- C_00B84C_TGID_Y_EN : SIDefines.h
- C_00B84C_TGID_Z_EN : SIDefines.h
- C_00B84C_TIDIG_COMP_CNT : SIDefines.h
- C_00B84C_TRAP_HANDLER : SIDefines.h
- C_00B84C_USER_SGPR : SIDefines.h
- C_SUB_SUPER : X86MCTargetDesc.cpp
- CallBuilder : HexagonVectorCombine.cpp
- CALLEE_SAVED_FPRS : PPCFrameLowering.cpp
- CALLEE_SAVED_GPRS32 : PPCFrameLowering.cpp
- CALLEE_SAVED_GPRS64 : PPCFrameLowering.cpp
- CALLEE_SAVED_VRS : PPCFrameLowering.cpp
- CASE : Attributor.h, X86ISelDAGToDAG.cpp, X86FlagsCopyLowering.cpp, AArch64FrameLowering.cpp, DWARFUnitIndex.cpp
- CASE_128_MOV_RM : X86MCInstLower.cpp
- CASE_256_MOV_RM : X86MCInstLower.cpp
- CASE_512_MOV_RM : X86MCInstLower.cpp
- CASE_ARITH_RM : X86MCInstLower.cpp
- CASE_AVX512_FMA : X86InstComments.cpp
- CASE_AVX512_INS_COMMON : X86InstComments.cpp
- CASE_AVX_INS_COMMON : X86InstComments.cpp
- CASE_BCAST_TYPE_OPC : X86InstrInfo.cpp
- CASE_CI_VI : AMDGPUBaseInfo.cpp
- CASE_ENCODING_RM : X86DisassemblerDecoderCommon.h
- CASE_ENCODING_VSIB : X86DisassemblerDecoderCommon.h
- CASE_FMA : X86InstComments.cpp
- CASE_FMA4 : X86InstComments.cpp
- CASE_FMA4_PACKED_MR : X86InstComments.cpp
- CASE_FMA4_PACKED_RM : X86InstComments.cpp
- CASE_FMA4_PACKED_RR : X86InstComments.cpp
- CASE_FMA4_SCALAR_MR : X86InstComments.cpp
- CASE_FMA4_SCALAR_RM : X86InstComments.cpp
- CASE_FMA4_SCALAR_RR : X86InstComments.cpp
- CASE_FMA_PACKED_MEM : X86InstComments.cpp
- CASE_FMA_PACKED_REG : X86InstComments.cpp
- CASE_FMA_SCALAR_MEM : X86InstComments.cpp
- CASE_FMA_SCALAR_REG : X86InstComments.cpp
- CASE_FP_WIDEOP_CHANGE_OPCODE_COMMON : RISCVInstrInfo.cpp
- CASE_FP_WIDEOP_CHANGE_OPCODE_LMULS : RISCVInstrInfo.cpp
- CASE_FP_WIDEOP_CHANGE_OPCODE_LMULS_MF4 : RISCVInstrInfo.cpp
- CASE_FP_WIDEOP_OPCODE_COMMON : RISCVInstrInfo.cpp
- CASE_FP_WIDEOP_OPCODE_LMULS_MF4 : RISCVInstrInfo.cpp
- CASE_FPCLASS_PACKED : X86InstComments.cpp
- CASE_FPCLASS_PACKED_MEM : X86InstComments.cpp
- CASE_FPCLASS_SCALAR : X86InstComments.cpp
- CASE_GFXPRE11_GFX11PLUS : AMDGPUBaseInfo.cpp
- CASE_GFXPRE11_GFX11PLUS_TO : AMDGPUBaseInfo.cpp
- CASE_MASK_INS_COMMON : X86InstComments.cpp
- CASE_MASK_MOVDUP : X86InstComments.cpp
- CASE_MASK_SHUF : X86InstComments.cpp
- CASE_MASK_UNPCK : X86InstComments.cpp
- CASE_MASK_VPERM : X86InstComments.cpp
- CASE_MASK_VPERMILPI : X86InstComments.cpp
- CASE_MASK_VSHUF : X86InstComments.cpp
- CASE_MASKZ_INS_COMMON : X86InstComments.cpp
- CASE_MASKZ_MOVDUP : X86InstComments.cpp
- CASE_MASKZ_SHUF : X86InstComments.cpp
- CASE_MASKZ_UNPCK : X86InstComments.cpp
- CASE_MASKZ_VPERM : X86InstComments.cpp
- CASE_MASKZ_VPERMILPI : X86InstComments.cpp
- CASE_MASKZ_VSHUF : X86InstComments.cpp
- CASE_MOVDUP : X86InstComments.cpp
- CASE_MOVX_RM : X86MCInstLower.cpp
- CASE_ND : X86InstrInfo.cpp, X86ISelDAGToDAG.cpp
- CASE_OPERAND_SIMM : RISCVInstrInfo.cpp
- CASE_OPERAND_UIMM : RISCVInstrInfo.cpp
- CASE_OUTPUT_ENUM_CLASS_NAME : PDBExtras.cpp
- CASE_OUTPUT_ENUM_CLASS_STR : PDBExtras.cpp
- CASE_PMOVZX : X86InstComments.cpp
- CASE_PTERNLOG : X86InstComments.cpp
- CASE_RVV_OPCODE : RISCVInstrInfo.cpp
- CASE_RVV_OPCODE_LMUL : RISCVInstrInfo.cpp
- CASE_RVV_OPCODE_MASK : RISCVInstrInfo.cpp
- CASE_RVV_OPCODE_MASK_LMUL : RISCVInstrInfo.cpp
- CASE_RVV_OPCODE_MASK_WIDEN : RISCVInstrInfo.cpp
- CASE_RVV_OPCODE_UNMASK : RISCVInstrInfo.cpp
- CASE_RVV_OPCODE_UNMASK_LMUL : RISCVInstrInfo.cpp
- CASE_RVV_OPCODE_UNMASK_WIDEN : RISCVInstrInfo.cpp
- CASE_RVV_OPCODE_WIDEN : RISCVInstrInfo.cpp
- CASE_SHUF : X86InstComments.cpp
- CASE_SSE_INS_COMMON : X86InstComments.cpp
- CASE_UNPCK : X86InstComments.cpp
- CASE_VFMA_CHANGE_OPCODE_COMMON : RISCVInstrInfo.cpp
- CASE_VFMA_CHANGE_OPCODE_LMULS : RISCVInstrInfo.cpp
- CASE_VFMA_CHANGE_OPCODE_LMULS_M1 : RISCVInstrInfo.cpp
- CASE_VFMA_CHANGE_OPCODE_LMULS_MF2 : RISCVInstrInfo.cpp
- CASE_VFMA_CHANGE_OPCODE_LMULS_MF4 : RISCVInstrInfo.cpp
- CASE_VFMA_CHANGE_OPCODE_SPLATS : RISCVInstrInfo.cpp
- CASE_VFMA_CHANGE_OPCODE_VV : RISCVInstrInfo.cpp
- CASE_VFMA_OPCODE_COMMON : RISCVInstrInfo.cpp
- CASE_VFMA_OPCODE_LMULS_M1 : RISCVInstrInfo.cpp
- CASE_VFMA_OPCODE_LMULS_MF2 : RISCVInstrInfo.cpp
- CASE_VFMA_OPCODE_LMULS_MF4 : RISCVInstrInfo.cpp
- CASE_VFMA_OPCODE_VV : RISCVInstrInfo.cpp
- CASE_VFMA_SPLATS : RISCVInstrInfo.cpp
- CASE_VI_GFX9PLUS : AMDGPUBaseInfo.cpp
- CASE_VMA_CHANGE_OPCODE_COMMON : RISCVInstrInfo.cpp
- CASE_VMA_CHANGE_OPCODE_LMULS : RISCVInstrInfo.cpp
- CASE_VMA_CHANGE_OPCODE_LMULS_M1 : RISCVInstrInfo.cpp
- CASE_VMA_CHANGE_OPCODE_LMULS_MF2 : RISCVInstrInfo.cpp
- CASE_VMA_CHANGE_OPCODE_LMULS_MF4 : RISCVInstrInfo.cpp
- CASE_VMA_CHANGE_OPCODE_SPLATS : RISCVInstrInfo.cpp
- CASE_VMA_OPCODE_COMMON : RISCVInstrInfo.cpp
- CASE_VMA_OPCODE_LMULS : RISCVInstrInfo.cpp
- CASE_VMA_OPCODE_LMULS_M1 : RISCVInstrInfo.cpp
- CASE_VMA_OPCODE_LMULS_MF2 : RISCVInstrInfo.cpp
- CASE_VMA_OPCODE_LMULS_MF4 : RISCVInstrInfo.cpp
- CASE_VMERGE_TO_VMV : RISCVVectorPeephole.cpp
- CASE_VMNAND_VMSET_OPCODES : RISCVISelDAGToDAG.cpp
- CASE_VMSLT_OPCODES : RISCVISelDAGToDAG.cpp
- CASE_VMXOR_VMANDN_VMOR_OPCODES : RISCVISelDAGToDAG.cpp
- CASE_VPERM : X86InstComments.cpp
- CASE_VPERMILPI : X86InstComments.cpp
- CASE_VSHUF : X86InstComments.cpp
- CASE_WHOLE_REGISTER_LMUL : RISCVVectorPeephole.cpp
- CASE_WHOLE_REGISTER_LMUL_SEW : RISCVVectorPeephole.cpp
- CASE_WIDEOP_CHANGE_OPCODE_COMMON : RISCVInstrInfo.cpp
- CASE_WIDEOP_CHANGE_OPCODE_LMULS : RISCVInstrInfo.cpp
- CASE_WIDEOP_CHANGE_OPCODE_LMULS_MF4 : RISCVInstrInfo.cpp
- CASE_WIDEOP_OPCODE_COMMON : RISCVInstrInfo.cpp
- CASE_WIDEOP_OPCODE_LMULS : RISCVInstrInfo.cpp
- CASE_WIDEOP_OPCODE_LMULS_MF4 : RISCVInstrInfo.cpp
- CDECL : jitprofiling.h
- CG_DATA_SECT_ENTRY : CodeGenData.h, CodeGenData.cpp
- CGBINDOPT : CommandFlags.cpp
- CGLIST : CommandFlags.cpp
- CGOPT : CommandFlags.cpp
- CGOPT_EXP : CommandFlags.cpp
- CGSCC_ANALYSIS : PassBuilder.cpp
- CGSCC_PASS : PassBuilder.cpp
- CGSCC_PASS_WITH_PARAMS : PassBuilder.cpp
- CH : SHA256.cpp
- CHadd : regex2.h
- Check : GenericConvergenceVerifierImpl.h, Lint.cpp, Verifier.cpp
- CHECK_LINE_END : InstrProfReader.cpp
- CHECK_PARTIALMAP : AArch64RegisterBankInfo.cpp
- CHECK_RESERVED_BITS : AMDGPUDisassembler.cpp
- CHECK_RESERVED_BITS_DESC : AMDGPUDisassembler.cpp
- CHECK_RESERVED_BITS_DESC_MSG : AMDGPUDisassembler.cpp
- CHECK_RESERVED_BITS_IMPL : AMDGPUDisassembler.cpp
- CHECK_RESERVED_BITS_MSG : AMDGPUDisassembler.cpp
- CHECK_SORTED_UNIQUE : X86InstrFoldTables.cpp
- CHECK_VALUEMAP : AArch64RegisterBankInfo.cpp
- CHECK_VALUEMAP_3OPS : AArch64RegisterBankInfo.cpp
- CHECK_VALUEMAP_CROSSREGCPY : AArch64RegisterBankInfo.cpp
- CHECK_VALUEMAP_FPEXT : AArch64RegisterBankInfo.cpp
- CHECK_VALUEMAP_IMPL : AArch64RegisterBankInfo.cpp
- CheckDI : Verifier.cpp
- CheckOrNull : GenericConvergenceVerifierImpl.h
- CheckTBAA : Verifier.cpp
- CHIN : regex2.h
- CHR_DEBUG : ControlHeightReduction.cpp
- CHsub : regex2.h
- CLAUSET_ENUM_CONVERT : ClauseT.h
- CLAUSET_SCOPED_ENUM_MEMBER_CONVERT : ClauseT.h
- CLAUSET_UNSCOPED_ENUM_MEMBER_CONVERT : ClauseT.h
- CLEAR : regexec.c
- clEnumVal : CommandLine.h
- clEnumValN : CommandLine.h
- CLK_GLOBAL_MEM_FENCE : cl_common_defines.h
- CLK_LOCAL_MEM_FENCE : cl_common_defines.h
- CM_NAME : CostModel.cpp
- CMP_INSTRUCTION : FPEnv.cpp, SelectionDAG.cpp, TargetLowering.h
- CODEPROP : AMDKernelCodeTInfo.h
- COLOR : Process.cpp
- COMP_EVEX_DESC : X86CompressEVEX.cpp
- COMP_EVEX_NAME : X86CompressEVEX.cpp
- COMPARE_OPTION : LVOptions.h
- COMPONENT_PRECISION : DXContainer.h, DXContainer.cpp
- COMPONENT_TYPE : DXContainer.h, DXContainer.cpp, DXContainer.h, DXContainer.cpp
- COMPPGM : AMDKernelCodeTInfo.h
- COMPPGM1 : AMDKernelCodeTInfo.h, AMDKernelCodeTUtils.cpp
- COMPPGM2 : AMDKernelCodeTInfo.h, AMDKernelCodeTUtils.cpp
- COMPUTE_PGM_RSRC1 : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC1_GFX10_PLUS : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC1_GFX12_PLUS : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC1_GFX6_GFX11 : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC1_GFX6_GFX8 : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC1_GFX6_GFX9 : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC1_GFX9_PLUS : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC2 : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC2_GFX12_PLUS : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC2_GFX6_GFX11 : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC3_GFX10 : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC3_GFX10_GFX11 : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC3_GFX10_PLUS : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC3_GFX11 : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC3_GFX11_PLUS : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC3_GFX12_PLUS : AMDHSAKernelDescriptor.h
- COMPUTE_PGM_RSRC3_GFX90A : AMDHSAKernelDescriptor.h
- CONCAT : WasmYAML.cpp
- CONTAINER_PART : DXContainer.h, DXContainer.cpp
- CONTEXTS_STR : X86DisassemblerDecoderCommon.h
- CONTEXTS_SYM : X86DisassemblerDecoderCommon.h
- CONV : SystemZISelLowering.cpp
- ConvertUTF_DISABLE_WARNINGS : ConvertUTF.cpp
- ConvertUTF_RESTORE_WARNINGS : ConvertUTF.cpp
- COUNT_OPERAND : FunctionPropertiesAnalysis.cpp
- COV5_HIDDEN_DYN_LDS_SIZE_ARG : AMDGPUSwLowerLDS.cpp
- COVINIT_FUNC : GCOVProfiling.cpp
- COVMAP_FUNC_RECORD : CoverageMapping.h
- COVMAP_HEADER : CoverageMapping.h
- COVMAP_V1 : CoverageMapping.h
- COVMAP_V2 : CoverageMapping.h
- COVMAP_V3 : CoverageMapping.h
- CP_ASYNC_BULK_TENSOR_OPCODE : NVPTXISelDAGToDAG.cpp
- CP_ASYNC_BULK_TENSOR_OPCODE_S2G_IMPL : NVPTXISelDAGToDAG.cpp
- CPUARCH_NAME_CASE : aarch32.cpp
- CRC_CASE_EXT_BINARYOP : LoongArchISelLowering.cpp
- CRC_CASE_EXT_UNARYOP : LoongArchISelLowering.cpp
- CREATE_ABSTRACT_ATTRIBUTE_FOR_ONE_POSITION : AttributorAttributes.cpp
- CREATE_ALL_ABSTRACT_ATTRIBUTE_FOR_POSITION : AttributorAttributes.cpp
- CREATE_FUNCTION_ABSTRACT_ATTRIBUTE_FOR_POSITION : AttributorAttributes.cpp
- CREATE_FUNCTION_ONLY_ABSTRACT_ATTRIBUTE_FOR_POSITION : AttributorAttributes.cpp
- CREATE_NON_RET_ABSTRACT_ATTRIBUTE_FOR_POSITION : AttributorAttributes.cpp
- CREATE_VALUE_ABSTRACT_ATTRIBUTE_FOR_POSITION : AttributorAttributes.cpp
- CSINLINE_DEBUG : SampleProfile.cpp
- CSKY_ARCH : CSKYTargetParser.h
- CSKY_ARCH_EXT_NAME : CSKYTargetParser.h
- CSKY_CPU_NAME : CSKYTargetParser.h, CSKYTargetParser.cpp
- CSKY_FPU : CSKYTargetParser.h
- CSR_CASE : LoongArchISelLowering.cpp
- CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS : CodeView.h
- CV_ENUM_CLASS_ENT : EnumTables.cpp
- CV_ENUM_ENT : EnumTables.cpp
- CV_REGISTER : PDBExtras.cpp, LVCodeViewReader.cpp, EnumTables.cpp, CodeView.h, LVCodeViewReader.cpp
- CV_REGISTERS_ALL : CodeView.h
- CV_REGISTERS_ARM : EnumTables.cpp, LVCodeViewReader.cpp, PDBExtras.cpp
- CV_REGISTERS_ARM64 : EnumTables.cpp, LVCodeViewReader.cpp, PDBExtras.cpp
- CV_REGISTERS_X86 : EnumTables.cpp, PDBExtras.cpp, LVCodeViewReader.cpp
- CV_SYMBOL : CodeView.h, EnumTables.cpp, FormatUtil.cpp
- CV_TYPE : CodeView.h, EnumTables.cpp, TypeDumpVisitor.cpp, TypeRecordMapping.cpp, LVCodeViewVisitor.cpp, CodeViewYAMLTypes.cpp