LLVM 22.0.0git
SystemZISelLowering.cpp File Reference
#include "SystemZISelLowering.h"
#include "SystemZCallingConv.h"
#include "SystemZConstantPoolValue.h"
#include "SystemZMachineFunctionInfo.h"
#include "SystemZTargetMachine.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/IR/GlobalAlias.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsS390.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/KnownBits.h"
#include <cctype>
#include <optional>
#include "SystemZGenCallingConv.inc"

Go to the source code of this file.

Classes

struct  AddressingMode

Macros

#define DEBUG_TYPE   "systemz-lower"
#define CONV(X)
#define OPCODE(NAME)

Enumerations

enum class  CmpMode { Int , FP , StrictFP , SignalingFP }

Functions

static bool is32Bit (EVT VT)
static MachineOperand earlyUseOperand (MachineOperand Op)
static AddressingMode getLoadStoreAddrMode (bool HasVector, Type *Ty)
static AddressingMode supportedAddressingMode (Instruction *I, bool HasVector)
static std::pair< unsigned, const TargetRegisterClass * > parseRegisterNumber (StringRef Constraint, const TargetRegisterClass *RC, const unsigned *Map, unsigned Size)
static SDValue convertLocVTToValVT (SelectionDAG &DAG, const SDLoc &DL, CCValAssign &VA, SDValue Chain, SDValue Value)
static SDValue convertValVTToLocVT (SelectionDAG &DAG, const SDLoc &DL, CCValAssign &VA, SDValue Value)
static SDValue lowerI128ToGR128 (SelectionDAG &DAG, SDValue In)
static SDValue lowerGR128ToI128 (SelectionDAG &DAG, SDValue In)
static bool canUseSiblingCall (const CCState &ArgCCInfo, SmallVectorImpl< CCValAssign > &ArgLocs, SmallVectorImpl< ISD::OutputArg > &Outs)
static SDValue getADAEntry (SelectionDAG &DAG, SDValue Val, SDLoc DL, unsigned Offset, bool LoadAdr=false)
static SDValue getADAEntry (SelectionDAG &DAG, const GlobalValue *GV, SDLoc DL, EVT PtrVT)
static bool getzOSCalleeAndADA (SelectionDAG &DAG, SDValue &Callee, SDValue &ADA, SDLoc &DL, SDValue &Chain)
static bool isIntrinsicWithCCAndChain (SDValue Op, unsigned &Opcode, unsigned &CCValid)
static bool isIntrinsicWithCC (SDValue Op, unsigned &Opcode, unsigned &CCValid)
static SDNodeemitIntrinsicWithCCAndChain (SelectionDAG &DAG, SDValue Op, unsigned Opcode)
static SDNodeemitIntrinsicWithCC (SelectionDAG &DAG, SDValue Op, unsigned Opcode)
static unsigned CCMaskForCondCode (ISD::CondCode CC)
static void adjustZeroCmp (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
static void adjustSubwordCmp (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
static bool isNaturalMemoryOperand (SDValue Op, unsigned ICmpType)
static bool shouldSwapCmpOperands (const Comparison &C)
static void adjustForSubtraction (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
static void adjustForFNeg (Comparison &C)
static void adjustForLTGFR (Comparison &C)
static void adjustICmpTruncate (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
static bool isSimpleShift (SDValue N, unsigned &ShiftVal)
static unsigned getTestUnderMaskCond (unsigned BitSize, unsigned CCMask, uint64_t Mask, uint64_t CmpVal, unsigned ICmpType)
static void adjustForTestUnderMask (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
static void adjustICmp128 (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
static void adjustForRedundantAnd (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
static Comparison getIntrinsicCmp (SelectionDAG &DAG, unsigned Opcode, SDValue Call, unsigned CCValid, uint64_t CC, ISD::CondCode Cond)
static Comparison getCmp (SelectionDAG &DAG, SDValue CmpOp0, SDValue CmpOp1, ISD::CondCode Cond, const SDLoc &DL, SDValue Chain=SDValue(), bool IsSignaling=false)
static SDValue emitCmp (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
static void lowerMUL_LOHI32 (SelectionDAG &DAG, const SDLoc &DL, unsigned Extend, SDValue Op0, SDValue Op1, SDValue &Hi, SDValue &Lo)
static void lowerGR128Binary (SelectionDAG &DAG, const SDLoc &DL, EVT VT, unsigned Opcode, SDValue Op0, SDValue Op1, SDValue &Even, SDValue &Odd)
static SDValue emitSETCC (SelectionDAG &DAG, const SDLoc &DL, SDValue CCReg, unsigned CCValid, unsigned CCMask)
static unsigned getVectorComparison (ISD::CondCode CC, CmpMode Mode)
static unsigned getVectorComparisonOrInvert (ISD::CondCode CC, CmpMode Mode, bool &Invert)
static SDValue expandV4F32ToV2F64 (SelectionDAG &DAG, int Start, const SDLoc &DL, SDValue Op, SDValue Chain)
static bool isAbsolute (SDValue CmpOp, SDValue Pos, SDValue Neg)
static SDValue getAbsolute (SelectionDAG &DAG, const SDLoc &DL, SDValue Op, bool IsNegative)
static SDValue getI128Select (SelectionDAG &DAG, const SDLoc &DL, Comparison C, SDValue TrueOp, SDValue FalseOp)
static bool isAddCarryChain (SDValue Carry)
static bool isSubBorrowChain (SDValue Carry)
static void getCSAddressAndShifts (SDValue Addr, SelectionDAG &DAG, SDLoc DL, SDValue &AlignedAddr, SDValue &BitShift, SDValue &NegBitShift)
static SDValue getCCResult (SelectionDAG &DAG, SDValue CCReg)
static bool chooseShuffleOpNos (int *OpNos, unsigned &OpNo0, unsigned &OpNo1)
static bool matchPermute (const SmallVectorImpl< int > &Bytes, const Permute &P, unsigned &OpNo0, unsigned &OpNo1)
static const Permute * matchPermute (const SmallVectorImpl< int > &Bytes, unsigned &OpNo0, unsigned &OpNo1)
static bool matchDoublePermute (const SmallVectorImpl< int > &Bytes, const Permute &P, SmallVectorImpl< int > &Transform)
static const Permute * matchDoublePermute (const SmallVectorImpl< int > &Bytes, SmallVectorImpl< int > &Transform)
static bool getVPermMask (SDValue ShuffleOp, SmallVectorImpl< int > &Bytes)
static bool getShuffleInput (const SmallVectorImpl< int > &Bytes, unsigned Start, unsigned BytesPerElement, int &Base)
static bool isShlDoublePermute (const SmallVectorImpl< int > &Bytes, unsigned &StartIndex, unsigned &OpNo0, unsigned &OpNo1)
static SDValue getPermuteNode (SelectionDAG &DAG, const SDLoc &DL, const Permute &P, SDValue Op0, SDValue Op1)
static bool isZeroVector (SDValue N)
static uint32_t findZeroVectorIdx (SDValue *Ops, unsigned Num)
static SDValue getGeneralPermuteNode (SelectionDAG &DAG, const SDLoc &DL, SDValue *Ops, const SmallVectorImpl< int > &Bytes)
static void dumpBytes (const SmallVectorImpl< int > &Bytes, std::string Msg)
static bool isScalarToVector (SDValue Op)
static SDValue buildScalarToVector (SelectionDAG &DAG, const SDLoc &DL, EVT VT, SDValue Value)
static SDValue buildMergeScalars (SelectionDAG &DAG, const SDLoc &DL, EVT VT, SDValue Op0, SDValue Op1)
static SDValue joinDwords (SelectionDAG &DAG, const SDLoc &DL, SDValue Op0, SDValue Op1)
static SDValue tryBuildVectorShuffle (SelectionDAG &DAG, BuildVectorSDNode *BVN)
static SDValue lowerAddrSpaceCast (SDValue Op, SelectionDAG &DAG)
static SDValue convertToF16 (SDValue Op, SelectionDAG &DAG)
static SDValue convertFromF16 (SDValue Op, SDLoc DL, SelectionDAG &DAG)
static SDValue expandBitCastI128ToF128 (SelectionDAG &DAG, SDValue Src, const SDLoc &SL)
static SDValue expandBitCastF128ToI128 (SelectionDAG &DAG, SDValue Src, const SDLoc &SL)
static bool isI128MovedToParts (LoadSDNode *LD, SDNode *&LoPart, SDNode *&HiPart)
static bool isF128MovedToParts (LoadSDNode *LD, SDNode *&LoPart, SDNode *&HiPart)
static bool isVectorElementSwap (ArrayRef< int > M, EVT VT)
static bool isOnlyUsedByStores (SDValue StoredVal, SelectionDAG &DAG)
static bool isI128MovedFromParts (SDValue Val, SDValue &LoPart, SDValue &HiPart)
static bool isF128MovedFromParts (SDValue Val, SDValue &LoPart, SDValue &HiPart)
static SDValue MergeInputChains (SDNode *N1, SDNode *N2)
static bool combineCCMask (SDValue &CCReg, int &CCValid, int &CCMask)
static unsigned detectEvenOddMultiplyOperand (const SelectionDAG &DAG, const SystemZSubtarget &Subtarget, SDValue &Op)
static APInt getDemandedSrcElements (SDValue Op, const APInt &DemandedElts, unsigned OpNo)
static void computeKnownBitsBinOp (const SDValue Op, KnownBits &Known, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth, unsigned OpNo)
static unsigned computeNumSignBitsBinOp (SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth, unsigned OpNo)
static Register forceReg (MachineInstr &MI, MachineOperand &Base, const SystemZInstrInfo *TII)
static bool checkCCKill (MachineInstr &MI, MachineBasicBlock *MBB)
static bool isSelectPseudo (MachineInstr &MI)
static void createPHIsForSelects (SmallVector< MachineInstr *, 8 > &Selects, MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB, MachineBasicBlock *SinkMBB)
static void printFunctionArgExts (const Function *F, raw_fd_ostream &OS)

Variables

static cl::opt< boolEnableIntArgExtCheck ("argext-abi-check", cl::init(false), cl::desc("Verify that narrow int args are properly extended per the " "SystemZ ABI."))
static const Permute PermuteForms []

Macro Definition Documentation

◆ CONV

#define CONV ( X)
Value:
case ISD::SET##X: return SystemZ::CCMASK_CMP_##X; \
case ISD::SETO##X: return SystemZ::CCMASK_CMP_##X; \
case ISD::SETU##X: return SystemZ::CCMASK_CMP_UO | SystemZ::CCMASK_CMP_##X
static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")
const unsigned CCMASK_CMP_UO
Definition SystemZ.h:43

Referenced by CCMaskForCondCode().

◆ DEBUG_TYPE

#define DEBUG_TYPE   "systemz-lower"

Definition at line 35 of file SystemZISelLowering.cpp.

◆ OPCODE

#define OPCODE ( NAME)
Value:
case SystemZISD::NAME: return "SystemZISD::" #NAME

Referenced by llvm::SystemZTargetLowering::getTargetNodeName().

Enumeration Type Documentation

◆ CmpMode

enum class CmpMode
strong
Enumerator
Int 
FP 
StrictFP 
SignalingFP 

Definition at line 3600 of file SystemZISelLowering.cpp.

Function Documentation

◆ adjustForFNeg()

void adjustForFNeg ( Comparison & C)
static

◆ adjustForLTGFR()

void adjustForLTGFR ( Comparison & C)
static

◆ adjustForRedundantAnd()

void adjustForRedundantAnd ( SelectionDAG & DAG,
const SDLoc & DL,
Comparison & C )
static

◆ adjustForSubtraction()

void adjustForSubtraction ( SelectionDAG & DAG,
const SDLoc & DL,
Comparison & C )
static

◆ adjustForTestUnderMask()

◆ adjustICmp128()

◆ adjustICmpTruncate()

◆ adjustSubwordCmp()

◆ adjustZeroCmp()

◆ buildMergeScalars()

◆ buildScalarToVector()

◆ canUseSiblingCall()

◆ CCMaskForCondCode()

◆ checkCCKill()

bool checkCCKill ( MachineInstr & MI,
MachineBasicBlock * MBB )
static

Definition at line 9532 of file SystemZISelLowering.cpp.

References MBB, and MI.

◆ chooseShuffleOpNos()

bool chooseShuffleOpNos ( int * OpNos,
unsigned & OpNo0,
unsigned & OpNo1 )
static

Definition at line 5576 of file SystemZISelLowering.cpp.

Referenced by isShlDoublePermute(), and matchPermute().

◆ combineCCMask()

◆ computeKnownBitsBinOp()

◆ computeNumSignBitsBinOp()

◆ convertFromF16()

◆ convertLocVTToValVT()

◆ convertToF16()

◆ convertValVTToLocVT()

◆ createPHIsForSelects()

◆ detectEvenOddMultiplyOperand()

◆ dumpBytes()

void dumpBytes ( const SmallVectorImpl< int > & Bytes,
std::string Msg )
static

◆ earlyUseOperand()

MachineOperand earlyUseOperand ( MachineOperand Op)
static

Definition at line 85 of file SystemZISelLowering.cpp.

◆ emitCmp()

◆ emitIntrinsicWithCC()

◆ emitIntrinsicWithCCAndChain()

◆ emitSETCC()

◆ expandBitCastF128ToI128()

◆ expandBitCastI128ToF128()

◆ expandV4F32ToV2F64()

◆ findZeroVectorIdx()

uint32_t findZeroVectorIdx ( SDValue * Ops,
unsigned Num )
static

◆ forceReg()

◆ getAbsolute()

SDValue getAbsolute ( SelectionDAG & DAG,
const SDLoc & DL,
SDValue Op,
bool IsNegative )
static

◆ getADAEntry() [1/2]

◆ getADAEntry() [2/2]

◆ getCCResult()

◆ getCmp()

◆ getCSAddressAndShifts()

◆ getDemandedSrcElements()

◆ getGeneralPermuteNode()

◆ getI128Select()

◆ getIntrinsicCmp()

◆ getLoadStoreAddrMode()

AddressingMode getLoadStoreAddrMode ( bool HasVector,
Type * Ty )
static

Definition at line 1320 of file SystemZISelLowering.cpp.

Referenced by supportedAddressingMode().

◆ getPermuteNode()

◆ getShuffleInput()

bool getShuffleInput ( const SmallVectorImpl< int > & Bytes,
unsigned Start,
unsigned BytesPerElement,
int & Base )
static

◆ getTestUnderMaskCond()

◆ getVectorComparison()

◆ getVectorComparisonOrInvert()

unsigned getVectorComparisonOrInvert ( ISD::CondCode CC,
CmpMode Mode,
bool & Invert )
static

◆ getVPermMask()

◆ getzOSCalleeAndADA()

◆ is32Bit()

bool is32Bit ( EVT VT)
static

Definition at line 72 of file SystemZISelLowering.cpp.

References llvm::EVT::getSimpleVT(), llvm_unreachable, and llvm::MVT::SimpleTy.

Referenced by lowerGR128Binary().

◆ isAbsolute()

◆ isAddCarryChain()

◆ isF128MovedFromParts()

◆ isF128MovedToParts()

bool isF128MovedToParts ( LoadSDNode * LD,
SDNode *& LoPart,
SDNode *& HiPart )
static

Definition at line 7901 of file SystemZISelLowering.cpp.

References llvm::Use::getUser(), and llvm::Value::hasOneUse().

◆ isI128MovedFromParts()

◆ isI128MovedToParts()

◆ isIntrinsicWithCC()

◆ isIntrinsicWithCCAndChain()

bool isIntrinsicWithCCAndChain ( SDValue Op,
unsigned & Opcode,
unsigned & CCValid )
static

◆ isNaturalMemoryOperand()

◆ isOnlyUsedByStores()

◆ isScalarToVector()

bool isScalarToVector ( SDValue Op)
static

Definition at line 6175 of file SystemZISelLowering.cpp.

References E(), and I.

◆ isSelectPseudo()

bool isSelectPseudo ( MachineInstr & MI)
static

Definition at line 9557 of file SystemZISelLowering.cpp.

References MI.

◆ isShlDoublePermute()

bool isShlDoublePermute ( const SmallVectorImpl< int > & Bytes,
unsigned & StartIndex,
unsigned & OpNo0,
unsigned & OpNo1 )
static

Definition at line 5723 of file SystemZISelLowering.cpp.

References chooseShuffleOpNos(), I, and llvm::SystemZ::VectorBytes.

Referenced by getGeneralPermuteNode().

◆ isSimpleShift()

bool isSimpleShift ( SDValue N,
unsigned & ShiftVal )
static

Definition at line 3091 of file SystemZISelLowering.cpp.

References llvm::dyn_cast(), and N.

Referenced by adjustForTestUnderMask().

◆ isSubBorrowChain()

◆ isVectorElementSwap()

◆ isZeroVector()

bool isZeroVector ( SDValue N)
static

◆ joinDwords()

◆ lowerAddrSpaceCast()

◆ lowerGR128Binary()

void lowerGR128Binary ( SelectionDAG & DAG,
const SDLoc & DL,
EVT VT,
unsigned Opcode,
SDValue Op0,
SDValue Op1,
SDValue & Even,
SDValue & Odd )
static

◆ lowerGR128ToI128()

◆ lowerI128ToGR128()

◆ lowerMUL_LOHI32()

void lowerMUL_LOHI32 ( SelectionDAG & DAG,
const SDLoc & DL,
unsigned Extend,
SDValue Op0,
SDValue Op1,
SDValue & Hi,
SDValue & Lo )
static

◆ matchDoublePermute() [1/2]

bool matchDoublePermute ( const SmallVectorImpl< int > & Bytes,
const Permute & P,
SmallVectorImpl< int > & Transform )
static

Definition at line 5636 of file SystemZISelLowering.cpp.

References P, and llvm::SystemZ::VectorBytes.

Referenced by matchDoublePermute().

◆ matchDoublePermute() [2/2]

const Permute * matchDoublePermute ( const SmallVectorImpl< int > & Bytes,
SmallVectorImpl< int > & Transform )
static

Definition at line 5658 of file SystemZISelLowering.cpp.

References matchDoublePermute(), P, and PermuteForms.

◆ matchPermute() [1/2]

bool matchPermute ( const SmallVectorImpl< int > & Bytes,
const Permute & P,
unsigned & OpNo0,
unsigned & OpNo1 )
static

Definition at line 5599 of file SystemZISelLowering.cpp.

References chooseShuffleOpNos(), I, P, and llvm::SystemZ::VectorBytes.

Referenced by matchPermute().

◆ matchPermute() [2/2]

const Permute * matchPermute ( const SmallVectorImpl< int > & Bytes,
unsigned & OpNo0,
unsigned & OpNo1 )
static

Definition at line 5623 of file SystemZISelLowering.cpp.

References matchPermute(), P, and PermuteForms.

◆ MergeInputChains()

SDValue MergeInputChains ( SDNode * N1,
SDNode * N2 )
static

Definition at line 8393 of file SystemZISelLowering.cpp.

References llvm::SDNode::getOperand(), and SDValue().

◆ parseRegisterNumber()

◆ printFunctionArgExts()

void printFunctionArgExts ( const Function * F,
raw_fd_ostream & OS )
static

◆ shouldSwapCmpOperands()

◆ supportedAddressingMode()

◆ tryBuildVectorShuffle()

Variable Documentation

◆ EnableIntArgExtCheck

cl::opt< bool > EnableIntArgExtCheck("argext-abi-check", cl::init(false), cl::desc("Verify that narrow int args are properly extended per the " "SystemZ ABI.")) ( "argext-abi-check" ,
cl::init(false) ,
cl::desc("Verify that narrow int args are properly extended per the " "SystemZ ABI.")  )
static

◆ PermuteForms

const Permute PermuteForms[]
static

Definition at line 5527 of file SystemZISelLowering.cpp.

Referenced by matchDoublePermute(), and matchPermute().