LLVM  14.0.0git
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SystemZISelLowering.cpp File Reference
#include "SystemZISelLowering.h"
#include "SystemZCallingConv.h"
#include "SystemZConstantPoolValue.h"
#include "SystemZMachineFunctionInfo.h"
#include "SystemZTargetMachine.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsS390.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/KnownBits.h"
#include <cctype>
#include "SystemZGenCallingConv.inc"
Include dependency graph for SystemZISelLowering.cpp:

Go to the source code of this file.

Classes

struct  AddressingMode
 

Macros

#define DEBUG_TYPE   "systemz-lower"
 
#define CONV(X)
 
#define OPCODE(NAME)   case SystemZISD::NAME: return "SystemZISD::" #NAME
 

Enumerations

enum  CmpMode { CmpMode::Int, CmpMode::FP, CmpMode::StrictFP, CmpMode::SignalingFP }
 

Functions

static bool is32Bit (EVT VT)
 
static MachineOperand earlyUseOperand (MachineOperand Op)
 
static AddressingMode getLoadStoreAddrMode (bool HasVector, Type *Ty)
 
static AddressingMode supportedAddressingMode (Instruction *I, bool HasVector)
 
static std::pair< unsigned, const TargetRegisterClass * > parseRegisterNumber (StringRef Constraint, const TargetRegisterClass *RC, const unsigned *Map, unsigned Size)
 
static void VerifyVectorType (MVT VT, EVT ArgVT)
 
static void VerifyVectorTypes (const SmallVectorImpl< ISD::InputArg > &Ins)
 
static void VerifyVectorTypes (const SmallVectorImpl< ISD::OutputArg > &Outs)
 
static SDValue convertLocVTToValVT (SelectionDAG &DAG, const SDLoc &DL, CCValAssign &VA, SDValue Chain, SDValue Value)
 
static SDValue convertValVTToLocVT (SelectionDAG &DAG, const SDLoc &DL, CCValAssign &VA, SDValue Value)
 
static SDValue lowerI128ToGR128 (SelectionDAG &DAG, SDValue In)
 
static SDValue lowerGR128ToI128 (SelectionDAG &DAG, SDValue In)
 
static bool canUseSiblingCall (const CCState &ArgCCInfo, SmallVectorImpl< CCValAssign > &ArgLocs, SmallVectorImpl< ISD::OutputArg > &Outs)
 
static bool isIntrinsicWithCCAndChain (SDValue Op, unsigned &Opcode, unsigned &CCValid)
 
static bool isIntrinsicWithCC (SDValue Op, unsigned &Opcode, unsigned &CCValid)
 
static SDNodeemitIntrinsicWithCCAndChain (SelectionDAG &DAG, SDValue Op, unsigned Opcode)
 
static SDNodeemitIntrinsicWithCC (SelectionDAG &DAG, SDValue Op, unsigned Opcode)
 
static unsigned CCMaskForCondCode (ISD::CondCode CC)
 
static void adjustZeroCmp (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
 
static void adjustSubwordCmp (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
 
static bool isNaturalMemoryOperand (SDValue Op, unsigned ICmpType)
 
static bool shouldSwapCmpOperands (const Comparison &C)
 
static void adjustForSubtraction (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
 
static void adjustForFNeg (Comparison &C)
 
static void adjustForLTGFR (Comparison &C)
 
static void adjustICmpTruncate (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
 
static bool isSimpleShift (SDValue N, unsigned &ShiftVal)
 
static unsigned getTestUnderMaskCond (unsigned BitSize, unsigned CCMask, uint64_t Mask, uint64_t CmpVal, unsigned ICmpType)
 
static void adjustForTestUnderMask (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
 
static void adjustForRedundantAnd (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
 
static Comparison getIntrinsicCmp (SelectionDAG &DAG, unsigned Opcode, SDValue Call, unsigned CCValid, uint64_t CC, ISD::CondCode Cond)
 
static Comparison getCmp (SelectionDAG &DAG, SDValue CmpOp0, SDValue CmpOp1, ISD::CondCode Cond, const SDLoc &DL, SDValue Chain=SDValue(), bool IsSignaling=false)
 
static SDValue emitCmp (SelectionDAG &DAG, const SDLoc &DL, Comparison &C)
 
static void lowerMUL_LOHI32 (SelectionDAG &DAG, const SDLoc &DL, unsigned Extend, SDValue Op0, SDValue Op1, SDValue &Hi, SDValue &Lo)
 
static void lowerGR128Binary (SelectionDAG &DAG, const SDLoc &DL, EVT VT, unsigned Opcode, SDValue Op0, SDValue Op1, SDValue &Even, SDValue &Odd)
 
static SDValue emitSETCC (SelectionDAG &DAG, const SDLoc &DL, SDValue CCReg, unsigned CCValid, unsigned CCMask)
 
static unsigned getVectorComparison (ISD::CondCode CC, CmpMode Mode)
 
static unsigned getVectorComparisonOrInvert (ISD::CondCode CC, CmpMode Mode, bool &Invert)
 
static SDValue expandV4F32ToV2F64 (SelectionDAG &DAG, int Start, const SDLoc &DL, SDValue Op, SDValue Chain)
 
static bool isAbsolute (SDValue CmpOp, SDValue Pos, SDValue Neg)
 
static SDValue getAbsolute (SelectionDAG &DAG, const SDLoc &DL, SDValue Op, bool IsNegative)
 
static bool isAddCarryChain (SDValue Carry)
 
static bool isSubBorrowChain (SDValue Carry)
 
static SDValue getCCResult (SelectionDAG &DAG, SDValue CCReg)
 
static bool chooseShuffleOpNos (int *OpNos, unsigned &OpNo0, unsigned &OpNo1)
 
static bool matchPermute (const SmallVectorImpl< int > &Bytes, const Permute &P, unsigned &OpNo0, unsigned &OpNo1)
 
static const Permute * matchPermute (const SmallVectorImpl< int > &Bytes, unsigned &OpNo0, unsigned &OpNo1)
 
static bool matchDoublePermute (const SmallVectorImpl< int > &Bytes, const Permute &P, SmallVectorImpl< int > &Transform)
 
static const Permute * matchDoublePermute (const SmallVectorImpl< int > &Bytes, SmallVectorImpl< int > &Transform)
 
static bool getVPermMask (SDValue ShuffleOp, SmallVectorImpl< int > &Bytes)
 
static bool getShuffleInput (const SmallVectorImpl< int > &Bytes, unsigned Start, unsigned BytesPerElement, int &Base)
 
static bool isShlDoublePermute (const SmallVectorImpl< int > &Bytes, unsigned &StartIndex, unsigned &OpNo0, unsigned &OpNo1)
 
static SDValue getPermuteNode (SelectionDAG &DAG, const SDLoc &DL, const Permute &P, SDValue Op0, SDValue Op1)
 
static bool isZeroVector (SDValue N)
 
static uint32_t findZeroVectorIdx (SDValue *Ops, unsigned Num)
 
static SDValue getGeneralPermuteNode (SelectionDAG &DAG, const SDLoc &DL, SDValue *Ops, const SmallVectorImpl< int > &Bytes)
 
static void dumpBytes (const SmallVectorImpl< int > &Bytes, std::string Msg)
 
static bool isScalarToVector (SDValue Op)
 
static SDValue buildScalarToVector (SelectionDAG &DAG, const SDLoc &DL, EVT VT, SDValue Value)
 
static SDValue buildMergeScalars (SelectionDAG &DAG, const SDLoc &DL, EVT VT, SDValue Op0, SDValue Op1)
 
static SDValue joinDwords (SelectionDAG &DAG, const SDLoc &DL, SDValue Op0, SDValue Op1)
 
static SDValue tryBuildVectorShuffle (SelectionDAG &DAG, BuildVectorSDNode *BVN)
 
static bool isVectorElementSwap (ArrayRef< int > M, EVT VT)
 
static SDValue MergeInputChains (SDNode *N1, SDNode *N2)
 
static bool combineCCMask (SDValue &CCReg, int &CCValid, int &CCMask)
 
static APInt getDemandedSrcElements (SDValue Op, const APInt &DemandedElts, unsigned OpNo)
 
static void computeKnownBitsBinOp (const SDValue Op, KnownBits &Known, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth, unsigned OpNo)
 
static unsigned computeNumSignBitsBinOp (SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth, unsigned OpNo)
 
static Register forceReg (MachineInstr &MI, MachineOperand &Base, const SystemZInstrInfo *TII)
 
static bool checkCCKill (MachineInstr &MI, MachineBasicBlock *MBB)
 
static bool isSelectPseudo (MachineInstr &MI)
 
static void createPHIsForSelects (SmallVector< MachineInstr *, 8 > &Selects, MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB, MachineBasicBlock *SinkMBB)
 

Variables

static const Permute PermuteForms []
 

Macro Definition Documentation

◆ CONV

#define CONV (   X)
Value:
case ISD::SET##X: return SystemZ::CCMASK_CMP_##X; \
case ISD::SETO##X: return SystemZ::CCMASK_CMP_##X; \
case ISD::SETU##X: return SystemZ::CCMASK_CMP_UO | SystemZ::CCMASK_CMP_##X

◆ DEBUG_TYPE

#define DEBUG_TYPE   "systemz-lower"

Definition at line 31 of file SystemZISelLowering.cpp.

◆ OPCODE

#define OPCODE (   NAME)    case SystemZISD::NAME: return "SystemZISD::" #NAME

Enumeration Type Documentation

◆ CmpMode

enum CmpMode
strong
Enumerator
Int 
FP 
StrictFP 
SignalingFP 

Definition at line 2810 of file SystemZISelLowering.cpp.

Function Documentation

◆ adjustForFNeg()

static void adjustForFNeg ( Comparison &  C)
static

Definition at line 2350 of file SystemZISelLowering.cpp.

References C1, llvm::ISD::FNEG, N, and llvm::SystemZ::reverseCCMask().

Referenced by getCmp().

◆ adjustForLTGFR()

static void adjustForLTGFR ( Comparison &  C)
static

◆ adjustForRedundantAnd()

static void adjustForRedundantAnd ( SelectionDAG DAG,
const SDLoc DL,
Comparison &  C 
)
static

◆ adjustForSubtraction()

static void adjustForSubtraction ( SelectionDAG DAG,
const SDLoc DL,
Comparison &  C 
)
static

◆ adjustForTestUnderMask()

static void adjustForTestUnderMask ( SelectionDAG DAG,
const SDLoc DL,
Comparison &  C 
)
static

◆ adjustICmpTruncate()

static void adjustICmpTruncate ( SelectionDAG DAG,
const SDLoc DL,
Comparison &  C 
)
static

◆ adjustSubwordCmp()

static void adjustSubwordCmp ( SelectionDAG DAG,
const SDLoc DL,
Comparison &  C 
)
static

◆ adjustZeroCmp()

static void adjustZeroCmp ( SelectionDAG DAG,
const SDLoc DL,
Comparison &  C 
)
static

◆ buildMergeScalars()

static SDValue buildMergeScalars ( SelectionDAG DAG,
const SDLoc DL,
EVT  VT,
SDValue  Op0,
SDValue  Op1 
)
static

◆ buildScalarToVector()

static SDValue buildScalarToVector ( SelectionDAG DAG,
const SDLoc DL,
EVT  VT,
SDValue  Value 
)
static

◆ canUseSiblingCall()

static bool canUseSiblingCall ( const CCState ArgCCInfo,
SmallVectorImpl< CCValAssign > &  ArgLocs,
SmallVectorImpl< ISD::OutputArg > &  Outs 
)
static

◆ CCMaskForCondCode()

static unsigned CCMaskForCondCode ( ISD::CondCode  CC)
static

◆ checkCCKill()

static bool checkCCKill ( MachineInstr MI,
MachineBasicBlock MBB 
)
static

◆ chooseShuffleOpNos()

static bool chooseShuffleOpNos ( int OpNos,
unsigned &  OpNo0,
unsigned &  OpNo1 
)
static

Definition at line 4395 of file SystemZISelLowering.cpp.

Referenced by isShlDoublePermute(), and matchPermute().

◆ combineCCMask()

static bool combineCCMask ( SDValue CCReg,
int CCValid,
int CCMask 
)
static

◆ computeKnownBitsBinOp()

static void computeKnownBitsBinOp ( const SDValue  Op,
KnownBits Known,
const APInt DemandedElts,
const SelectionDAG DAG,
unsigned  Depth,
unsigned  OpNo 
)
static

◆ computeNumSignBitsBinOp()

static unsigned computeNumSignBitsBinOp ( SDValue  Op,
const APInt DemandedElts,
const SelectionDAG DAG,
unsigned  Depth,
unsigned  OpNo 
)
static

◆ convertLocVTToValVT()

static SDValue convertLocVTToValVT ( SelectionDAG DAG,
const SDLoc DL,
CCValAssign VA,
SDValue  Chain,
SDValue  Value 
)
static

◆ convertValVTToLocVT()

static SDValue convertValVTToLocVT ( SelectionDAG DAG,
const SDLoc DL,
CCValAssign VA,
SDValue  Value 
)
static

◆ createPHIsForSelects()

static void createPHIsForSelects ( SmallVector< MachineInstr *, 8 > &  Selects,
MachineBasicBlock TrueMBB,
MachineBasicBlock FalseMBB,
MachineBasicBlock SinkMBB 
)
static

◆ dumpBytes()

static void dumpBytes ( const SmallVectorImpl< int > &  Bytes,
std::string  Msg 
)
static

Definition at line 4874 of file SystemZISelLowering.cpp.

References llvm::dbgs(), and i.

◆ earlyUseOperand()

static MachineOperand earlyUseOperand ( MachineOperand  Op)
static

Definition at line 74 of file SystemZISelLowering.cpp.

◆ emitCmp()

static SDValue emitCmp ( SelectionDAG DAG,
const SDLoc DL,
Comparison &  C 
)
static

Definition at line 2735 of file SystemZISelLowering.cpp.

◆ emitIntrinsicWithCC()

static SDNode* emitIntrinsicWithCC ( SelectionDAG DAG,
SDValue  Op,
unsigned  Opcode 
)
static

◆ emitIntrinsicWithCCAndChain()

static SDNode* emitIntrinsicWithCCAndChain ( SelectionDAG DAG,
SDValue  Op,
unsigned  Opcode 
)
static

◆ emitSETCC()

static SDValue emitSETCC ( SelectionDAG DAG,
const SDLoc DL,
SDValue  CCReg,
unsigned  CCValid,
unsigned  CCMask 
)
static

◆ expandV4F32ToV2F64()

static SDValue expandV4F32ToV2F64 ( SelectionDAG DAG,
int  Start,
const SDLoc DL,
SDValue  Op,
SDValue  Chain 
)
static

Definition at line 2878 of file SystemZISelLowering.cpp.

◆ findZeroVectorIdx()

static uint32_t findZeroVectorIdx ( SDValue Ops,
unsigned  Num 
)
static

Definition at line 4606 of file SystemZISelLowering.cpp.

References I, and isZeroVector().

Referenced by getGeneralPermuteNode().

◆ forceReg()

static Register forceReg ( MachineInstr MI,
MachineOperand Base,
const SystemZInstrInfo TII 
)
static

◆ getAbsolute()

static SDValue getAbsolute ( SelectionDAG DAG,
const SDLoc DL,
SDValue  Op,
bool  IsNegative 
)
static

◆ getCCResult()

static SDValue getCCResult ( SelectionDAG DAG,
SDValue  CCReg 
)
static

◆ getCmp()

static Comparison getCmp ( SelectionDAG DAG,
SDValue  CmpOp0,
SDValue  CmpOp1,
ISD::CondCode  Cond,
const SDLoc DL,
SDValue  Chain = SDValue(),
bool  IsSignaling = false 
)
static

◆ getDemandedSrcElements()

static APInt getDemandedSrcElements ( SDValue  Op,
const APInt DemandedElts,
unsigned  OpNo 
)
static

◆ getGeneralPermuteNode()

static SDValue getGeneralPermuteNode ( SelectionDAG DAG,
const SDLoc DL,
SDValue Ops,
const SmallVectorImpl< int > &  Bytes 
)
static

◆ getIntrinsicCmp()

static Comparison getIntrinsicCmp ( SelectionDAG DAG,
unsigned  Opcode,
SDValue  Call,
unsigned  CCValid,
uint64_t  CC,
ISD::CondCode  Cond 
)
static

◆ getLoadStoreAddrMode()

static AddressingMode getLoadStoreAddrMode ( bool  HasVector,
Type Ty 
)
static

Definition at line 884 of file SystemZISelLowering.cpp.

References llvm::Type::isIntegerTy(), and llvm::SystemZISD::MVC.

Referenced by supportedAddressingMode().

◆ getPermuteNode()

static SDValue getPermuteNode ( SelectionDAG DAG,
const SDLoc DL,
const Permute &  P,
SDValue  Op0,
SDValue  Op1 
)
static

◆ getShuffleInput()

static bool getShuffleInput ( const SmallVectorImpl< int > &  Bytes,
unsigned  Start,
unsigned  BytesPerElement,
int Base 
)
static

Definition at line 4519 of file SystemZISelLowering.cpp.

◆ getTestUnderMaskCond()

static unsigned getTestUnderMaskCond ( unsigned  BitSize,
unsigned  CCMask,
uint64_t  Mask,
uint64_t  CmpVal,
unsigned  ICmpType 
)
static

◆ getVectorComparison()

static unsigned getVectorComparison ( ISD::CondCode  CC,
CmpMode  Mode 
)
static

◆ getVectorComparisonOrInvert()

static unsigned getVectorComparisonOrInvert ( ISD::CondCode  CC,
CmpMode  Mode,
bool &  Invert 
)
static

◆ getVPermMask()

static bool getVPermMask ( SDValue  ShuffleOp,
SmallVectorImpl< int > &  Bytes 
)
static

◆ is32Bit()

static bool is32Bit ( EVT  VT)
static

◆ isAbsolute()

static bool isAbsolute ( SDValue  CmpOp,
SDValue  Pos,
SDValue  Neg 
)
static

◆ isAddCarryChain()

static bool isAddCarryChain ( SDValue  Carry)
static

◆ isIntrinsicWithCC()

static bool isIntrinsicWithCC ( SDValue  Op,
unsigned &  Opcode,
unsigned &  CCValid 
)
static

◆ isIntrinsicWithCCAndChain()

static bool isIntrinsicWithCCAndChain ( SDValue  Op,
unsigned &  Opcode,
unsigned &  CCValid 
)
static

◆ isNaturalMemoryOperand()

static bool isNaturalMemoryOperand ( SDValue  Op,
unsigned  ICmpType 
)
static

◆ isScalarToVector()

static bool isScalarToVector ( SDValue  Op)
static

Definition at line 4973 of file SystemZISelLowering.cpp.

References E, and I.

◆ isSelectPseudo()

static bool isSelectPseudo ( MachineInstr MI)
static

Definition at line 7195 of file SystemZISelLowering.cpp.

References MI.

◆ isShlDoublePermute()

static bool isShlDoublePermute ( const SmallVectorImpl< int > &  Bytes,
unsigned &  StartIndex,
unsigned &  OpNo0,
unsigned &  OpNo1 
)
static

Definition at line 4542 of file SystemZISelLowering.cpp.

References chooseShuffleOpNos(), I, Index, Shift, and llvm::SystemZ::VectorBytes.

Referenced by getGeneralPermuteNode().

◆ isSimpleShift()

static bool isSimpleShift ( SDValue  N,
unsigned &  ShiftVal 
)
static

Definition at line 2418 of file SystemZISelLowering.cpp.

References N, and Shift.

Referenced by adjustForTestUnderMask().

◆ isSubBorrowChain()

static bool isSubBorrowChain ( SDValue  Carry)
static

◆ isVectorElementSwap()

static bool isVectorElementSwap ( ArrayRef< int M,
EVT  VT 
)
static

◆ isZeroVector()

static bool isZeroVector ( SDValue  N)
static

◆ joinDwords()

static SDValue joinDwords ( SelectionDAG DAG,
const SDLoc DL,
SDValue  Op0,
SDValue  Op1 
)
static

◆ lowerGR128Binary()

static void lowerGR128Binary ( SelectionDAG DAG,
const SDLoc DL,
EVT  VT,
unsigned  Opcode,
SDValue  Op0,
SDValue  Op1,
SDValue Even,
SDValue Odd 
)
static

◆ lowerGR128ToI128()

static SDValue lowerGR128ToI128 ( SelectionDAG DAG,
SDValue  In 
)
static

◆ lowerI128ToGR128()

static SDValue lowerI128ToGR128 ( SelectionDAG DAG,
SDValue  In 
)
static

◆ lowerMUL_LOHI32()

static void lowerMUL_LOHI32 ( SelectionDAG DAG,
const SDLoc DL,
unsigned  Extend,
SDValue  Op0,
SDValue  Op1,
SDValue Hi,
SDValue Lo 
)
static

◆ matchDoublePermute() [1/2]

static bool matchDoublePermute ( const SmallVectorImpl< int > &  Bytes,
const Permute &  P,
SmallVectorImpl< int > &  Transform 
)
static

Definition at line 4455 of file SystemZISelLowering.cpp.

References From, P, and llvm::SystemZ::VectorBytes.

Referenced by matchDoublePermute().

◆ matchDoublePermute() [2/2]

static const Permute* matchDoublePermute ( const SmallVectorImpl< int > &  Bytes,
SmallVectorImpl< int > &  Transform 
)
static

Definition at line 4477 of file SystemZISelLowering.cpp.

References matchDoublePermute(), P, and PermuteForms.

◆ matchPermute() [1/2]

static bool matchPermute ( const SmallVectorImpl< int > &  Bytes,
const Permute &  P,
unsigned &  OpNo0,
unsigned &  OpNo1 
)
static

Definition at line 4418 of file SystemZISelLowering.cpp.

References chooseShuffleOpNos(), I, P, and llvm::SystemZ::VectorBytes.

Referenced by matchPermute().

◆ matchPermute() [2/2]

static const Permute* matchPermute ( const SmallVectorImpl< int > &  Bytes,
unsigned &  OpNo0,
unsigned &  OpNo1 
)
static

Definition at line 4442 of file SystemZISelLowering.cpp.

References matchPermute(), P, and PermuteForms.

◆ MergeInputChains()

static SDValue MergeInputChains ( SDNode N1,
SDNode N2 
)
static

Definition at line 6292 of file SystemZISelLowering.cpp.

References llvm::SDNode::getOperand().

◆ parseRegisterNumber()

static std::pair<unsigned, const TargetRegisterClass *> parseRegisterNumber ( StringRef  Constraint,
const TargetRegisterClass RC,
const unsigned *  Map,
unsigned  Size 
)
static

◆ shouldSwapCmpOperands()

static bool shouldSwapCmpOperands ( const Comparison &  C)
static

◆ supportedAddressingMode()

static AddressingMode supportedAddressingMode ( Instruction I,
bool  HasVector 
)
static

◆ tryBuildVectorShuffle()

static SDValue tryBuildVectorShuffle ( SelectionDAG DAG,
BuildVectorSDNode BVN 
)
static

◆ VerifyVectorType()

static void VerifyVectorType ( MVT  VT,
EVT  ArgVT 
)
static

◆ VerifyVectorTypes() [1/2]

static void VerifyVectorTypes ( const SmallVectorImpl< ISD::InputArg > &  Ins)
static

◆ VerifyVectorTypes() [2/2]

static void VerifyVectorTypes ( const SmallVectorImpl< ISD::OutputArg > &  Outs)
static

Definition at line 1315 of file SystemZISelLowering.cpp.

References i, and VerifyVectorType().

Variable Documentation

◆ PermuteForms

const Permute PermuteForms[]
static

Definition at line 4346 of file SystemZISelLowering.cpp.

Referenced by matchDoublePermute(), and matchPermute().

llvm::ISD::SETO
@ SETO
Definition: ISDOpcodes.h:1375
X
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
llvm::SystemZ::CCMASK_CMP_UO
const unsigned CCMASK_CMP_UO
Definition: SystemZ.h:42
SET
#define SET(n)
Definition: MD5.cpp:69