LLVM  16.0.0git
MachineInstrBuilder.h
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1 //===- CodeGen/MachineInstrBuilder.h - Simplify creation of MIs --*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file exposes a function named BuildMI, which is useful for dramatically
10 // simplifying how MachineInstr's are created. It allows use of code like this:
11 //
12 // M = BuildMI(MBB, MI, DL, TII.get(X86::ADD8rr), Dst)
13 // .addReg(argVal1)
14 // .addReg(argVal2);
15 //
16 //===----------------------------------------------------------------------===//
17 
18 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
19 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
20 
21 #include "llvm/ADT/ArrayRef.h"
29 #include "llvm/IR/InstrTypes.h"
30 #include "llvm/IR/Intrinsics.h"
32 #include <cassert>
33 #include <cstdint>
34 
35 namespace llvm {
36 
37 class MCInstrDesc;
38 class MDNode;
39 
40 namespace RegState {
41 
42 enum {
43  /// Register definition.
44  Define = 0x2,
45  /// Not emitted register (e.g. carry, or temporary result).
46  Implicit = 0x4,
47  /// The last use of a register.
48  Kill = 0x8,
49  /// Unused definition.
50  Dead = 0x10,
51  /// Value of the register doesn't matter.
52  Undef = 0x20,
53  /// Register definition happens before uses.
54  EarlyClobber = 0x40,
55  /// Register 'use' is for debugging purpose.
56  Debug = 0x80,
57  /// Register reads a value that is defined inside the same instruction or
58  /// bundle.
59  InternalRead = 0x100,
60  /// Register that may be renamed.
61  Renamable = 0x200,
65 };
66 
67 } // end namespace RegState
68 
70  MachineFunction *MF = nullptr;
71  MachineInstr *MI = nullptr;
72 
73 public:
74  MachineInstrBuilder() = default;
75 
76  /// Create a MachineInstrBuilder for manipulating an existing instruction.
77  /// F must be the machine function that was used to allocate I.
80  : MF(&F), MI(&*I) {}
81 
82  /// Allow automatic conversion to the machine instruction we are working on.
83  operator MachineInstr*() const { return MI; }
84  MachineInstr *operator->() const { return MI; }
85  operator MachineBasicBlock::iterator() const { return MI; }
86 
87  /// If conversion operators fail, use this method to get the MachineInstr
88  /// explicitly.
89  MachineInstr *getInstr() const { return MI; }
90 
91  /// Get the register for the operand index.
92  /// The operand at the index should be a register (asserted by
93  /// MachineOperand).
94  Register getReg(unsigned Idx) const { return MI->getOperand(Idx).getReg(); }
95 
96  /// Add a new virtual register operand.
97  const MachineInstrBuilder &addReg(Register RegNo, unsigned flags = 0,
98  unsigned SubReg = 0) const {
99  assert((flags & 0x1) == 0 &&
100  "Passing in 'true' to addReg is forbidden! Use enums instead.");
101  MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
102  flags & RegState::Define,
103  flags & RegState::Implicit,
104  flags & RegState::Kill,
105  flags & RegState::Dead,
106  flags & RegState::Undef,
107  flags & RegState::EarlyClobber,
108  SubReg,
109  flags & RegState::Debug,
110  flags & RegState::InternalRead,
111  flags & RegState::Renamable));
112  return *this;
113  }
114 
115  /// Add a virtual register definition operand.
116  const MachineInstrBuilder &addDef(Register RegNo, unsigned Flags = 0,
117  unsigned SubReg = 0) const {
118  return addReg(RegNo, Flags | RegState::Define, SubReg);
119  }
120 
121  /// Add a virtual register use operand. It is an error for Flags to contain
122  /// `RegState::Define` when calling this function.
123  const MachineInstrBuilder &addUse(Register RegNo, unsigned Flags = 0,
124  unsigned SubReg = 0) const {
125  assert(!(Flags & RegState::Define) &&
126  "Misleading addUse defines register, use addReg instead.");
127  return addReg(RegNo, Flags, SubReg);
128  }
129 
130  /// Add a new immediate operand.
131  const MachineInstrBuilder &addImm(int64_t Val) const {
132  MI->addOperand(*MF, MachineOperand::CreateImm(Val));
133  return *this;
134  }
135 
136  const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
137  MI->addOperand(*MF, MachineOperand::CreateCImm(Val));
138  return *this;
139  }
140 
141  const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
142  MI->addOperand(*MF, MachineOperand::CreateFPImm(Val));
143  return *this;
144  }
145 
147  unsigned TargetFlags = 0) const {
148  MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
149  return *this;
150  }
151 
152  const MachineInstrBuilder &addFrameIndex(int Idx) const {
153  MI->addOperand(*MF, MachineOperand::CreateFI(Idx));
154  return *this;
155  }
156 
157  const MachineInstrBuilder &
158  addConstantPoolIndex(unsigned Idx, int Offset = 0,
159  unsigned TargetFlags = 0) const {
160  MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
161  return *this;
162  }
163 
164  const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
165  unsigned TargetFlags = 0) const {
166  MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset,
167  TargetFlags));
168  return *this;
169  }
170 
172  unsigned TargetFlags = 0) const {
173  MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
174  return *this;
175  }
176 
178  int64_t Offset = 0,
179  unsigned TargetFlags = 0) const {
180  MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
181  return *this;
182  }
183 
184  const MachineInstrBuilder &addExternalSymbol(const char *FnName,
185  unsigned TargetFlags = 0) const {
186  MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags));
187  return *this;
188  }
189 
191  int64_t Offset = 0,
192  unsigned TargetFlags = 0) const {
193  MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags));
194  return *this;
195  }
196 
198  MI->addOperand(*MF, MachineOperand::CreateRegMask(Mask));
199  return *this;
200  }
201 
203  MI->addMemOperand(*MF, MMO);
204  return *this;
205  }
206 
207  const MachineInstrBuilder &
209  MI->setMemRefs(*MF, MMOs);
210  return *this;
211  }
212 
213  const MachineInstrBuilder &cloneMemRefs(const MachineInstr &OtherMI) const {
214  MI->cloneMemRefs(*MF, OtherMI);
215  return *this;
216  }
217 
218  const MachineInstrBuilder &
220  MI->cloneMergedMemRefs(*MF, OtherMIs);
221  return *this;
222  }
223 
224  const MachineInstrBuilder &add(const MachineOperand &MO) const {
225  MI->addOperand(*MF, MO);
226  return *this;
227  }
228 
230  for (const MachineOperand &MO : MOs) {
231  MI->addOperand(*MF, MO);
232  }
233  return *this;
234  }
235 
236  const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
237  MI->addOperand(*MF, MachineOperand::CreateMetadata(MD));
238  assert((MI->isDebugValue() ? static_cast<bool>(MI->getDebugVariable())
239  : true) &&
240  "first MDNode argument of a DBG_VALUE not a variable");
241  assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel())
242  : true) &&
243  "first MDNode argument of a DBG_LABEL not a label");
244  return *this;
245  }
246 
247  const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const {
248  MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex));
249  return *this;
250  }
251 
253  MI->addOperand(*MF, MachineOperand::CreateIntrinsicID(ID));
254  return *this;
255  }
256 
258  MI->addOperand(*MF, MachineOperand::CreatePredicate(Pred));
259  return *this;
260  }
261 
263  MI->addOperand(*MF, MachineOperand::CreateShuffleMask(Val));
264  return *this;
265  }
266 
268  unsigned char TargetFlags = 0) const {
269  MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym, TargetFlags));
270  return *this;
271  }
272 
273  const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
274  MI->setFlags(Flags);
275  return *this;
276  }
277 
279  MI->setFlag(Flag);
280  return *this;
281  }
282 
283  // Add a displacement from an existing MachineOperand with an added offset.
284  const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
285  unsigned char TargetFlags = 0) const {
286  // If caller specifies new TargetFlags then use it, otherwise the
287  // default behavior is to copy the target flags from the existing
288  // MachineOperand. This means if the caller wants to clear the
289  // target flags it needs to do so explicitly.
290  if (0 == TargetFlags)
291  TargetFlags = Disp.getTargetFlags();
292 
293  switch (Disp.getType()) {
294  default:
295  llvm_unreachable("Unhandled operand type in addDisp()");
297  return addImm(Disp.getImm() + off);
299  return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off,
300  TargetFlags);
302  return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
303  TargetFlags);
305  return addBlockAddress(Disp.getBlockAddress(), Disp.getOffset() + off,
306  TargetFlags);
308  assert(off == 0 && "cannot create offset into jump tables");
309  return addJumpTableIndex(Disp.getIndex(), TargetFlags);
310  }
311  }
312 
314  if (MD)
315  MI->setPCSections(*MF, MD);
316  return *this;
317  }
318 
319  /// Copy all the implicit operands from OtherMI onto this one.
320  const MachineInstrBuilder &
321  copyImplicitOps(const MachineInstr &OtherMI) const {
322  MI->copyImplicitOps(*MF, OtherMI);
323  return *this;
324  }
325 
327  const TargetRegisterInfo &TRI,
328  const RegisterBankInfo &RBI) const {
329  return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
330  }
331 };
332 
333 /// Set of metadata that should be preserved when using BuildMI(). This provides
334 /// a more convenient way of preserving DebugLoc and PCSections.
335 class MIMetadata {
336 public:
337  MIMetadata() = default;
338  MIMetadata(DebugLoc DL, MDNode *PCSections = nullptr)
339  : DL(std::move(DL)), PCSections(PCSections) {}
340  MIMetadata(const DILocation *DI, MDNode *PCSections = nullptr)
341  : DL(DI), PCSections(PCSections) {}
342  explicit MIMetadata(const Instruction &From)
343  : DL(From.getDebugLoc()),
344  PCSections(From.getMetadata(LLVMContext::MD_pcsections)) {}
345  explicit MIMetadata(const MachineInstr &From)
346  : DL(From.getDebugLoc()), PCSections(From.getPCSections()) {}
347 
348  const DebugLoc &getDL() const { return DL; }
349  MDNode *getPCSections() const { return PCSections; }
350 
351 private:
352  DebugLoc DL;
353  MDNode *PCSections = nullptr;
354 };
355 
356 /// Builder interface. Specify how to create the initial instruction itself.
358  const MCInstrDesc &MCID) {
359  return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, MIMD.getDL()))
360  .setPCSections(MIMD.getPCSections());
361 }
362 
363 /// This version of the builder sets up the first operand as a
364 /// destination virtual register.
366  const MCInstrDesc &MCID, Register DestReg) {
367  return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, MIMD.getDL()))
369  .addReg(DestReg, RegState::Define);
370 }
371 
372 /// This version of the builder inserts the newly-built instruction before
373 /// the given position in the given MachineBasicBlock, and sets up the first
374 /// operand as a destination virtual register.
377  const MIMetadata &MIMD,
378  const MCInstrDesc &MCID, Register DestReg) {
379  MachineFunction &MF = *BB.getParent();
380  MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
381  BB.insert(I, MI);
382  return MachineInstrBuilder(MF, MI)
384  .addReg(DestReg, RegState::Define);
385 }
386 
387 /// This version of the builder inserts the newly-built instruction before
388 /// the given position in the given MachineBasicBlock, and sets up the first
389 /// operand as a destination virtual register.
390 ///
391 /// If \c I is inside a bundle, then the newly inserted \a MachineInstr is
392 /// added to the same bundle.
395  const MIMetadata &MIMD,
396  const MCInstrDesc &MCID, Register DestReg) {
397  MachineFunction &MF = *BB.getParent();
398  MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
399  BB.insert(I, MI);
400  return MachineInstrBuilder(MF, MI)
402  .addReg(DestReg, RegState::Define);
403 }
404 
406  const MIMetadata &MIMD,
407  const MCInstrDesc &MCID, Register DestReg) {
408  // Calling the overload for instr_iterator is always correct. However, the
409  // definition is not available in headers, so inline the check.
410  if (I.isInsideBundle())
411  return BuildMI(BB, MachineBasicBlock::instr_iterator(I), MIMD, MCID,
412  DestReg);
413  return BuildMI(BB, MachineBasicBlock::iterator(I), MIMD, MCID, DestReg);
414 }
415 
417  const MIMetadata &MIMD,
418  const MCInstrDesc &MCID, Register DestReg) {
419  return BuildMI(BB, *I, MIMD, MCID, DestReg);
420 }
421 
422 /// This version of the builder inserts the newly-built instruction before the
423 /// given position in the given MachineBasicBlock, and does NOT take a
424 /// destination register.
427  const MIMetadata &MIMD,
428  const MCInstrDesc &MCID) {
429  MachineFunction &MF = *BB.getParent();
430  MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
431  BB.insert(I, MI);
433 }
434 
437  const MIMetadata &MIMD,
438  const MCInstrDesc &MCID) {
439  MachineFunction &MF = *BB.getParent();
440  MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
441  BB.insert(I, MI);
443 }
444 
446  const MIMetadata &MIMD,
447  const MCInstrDesc &MCID) {
448  // Calling the overload for instr_iterator is always correct. However, the
449  // definition is not available in headers, so inline the check.
450  if (I.isInsideBundle())
451  return BuildMI(BB, MachineBasicBlock::instr_iterator(I), MIMD, MCID);
452  return BuildMI(BB, MachineBasicBlock::iterator(I), MIMD, MCID);
453 }
454 
456  const MIMetadata &MIMD,
457  const MCInstrDesc &MCID) {
458  return BuildMI(BB, *I, MIMD, MCID);
459 }
460 
461 /// This version of the builder inserts the newly-built instruction at the end
462 /// of the given MachineBasicBlock, and does NOT take a destination register.
464  const MIMetadata &MIMD,
465  const MCInstrDesc &MCID) {
466  return BuildMI(*BB, BB->end(), MIMD, MCID);
467 }
468 
469 /// This version of the builder inserts the newly-built instruction at the
470 /// end of the given MachineBasicBlock, and sets up the first operand as a
471 /// destination virtual register.
473  const MIMetadata &MIMD,
474  const MCInstrDesc &MCID, Register DestReg) {
475  return BuildMI(*BB, BB->end(), MIMD, MCID, DestReg);
476 }
477 
478 /// This version of the builder builds a DBG_VALUE intrinsic
479 /// for either a value in a register or a register-indirect
480 /// address. The convention is that a DBG_VALUE is indirect iff the
481 /// second operand is an immediate.
482 MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
483  const MCInstrDesc &MCID, bool IsIndirect,
484  Register Reg, const MDNode *Variable,
485  const MDNode *Expr);
486 
487 /// This version of the builder builds a DBG_VALUE intrinsic
488 /// for a MachineOperand.
489 MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
490  const MCInstrDesc &MCID, bool IsIndirect,
491  const MachineOperand &MO, const MDNode *Variable,
492  const MDNode *Expr);
493 
494 /// This version of the builder builds a DBG_VALUE or DBG_VALUE_LIST intrinsic
495 /// for a MachineOperand.
496 MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
497  const MCInstrDesc &MCID, bool IsIndirect,
498  ArrayRef<MachineOperand> MOs,
499  const MDNode *Variable, const MDNode *Expr);
500 
501 /// This version of the builder builds a DBG_VALUE intrinsic
502 /// for either a value in a register or a register-indirect
503 /// address and inserts it at position I.
504 MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
505  MachineBasicBlock::iterator I, const DebugLoc &DL,
506  const MCInstrDesc &MCID, bool IsIndirect,
507  Register Reg, const MDNode *Variable,
508  const MDNode *Expr);
509 
510 /// This version of the builder builds a DBG_VALUE intrinsic
511 /// for a machine operand and inserts it at position I.
512 MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
513  MachineBasicBlock::iterator I, const DebugLoc &DL,
514  const MCInstrDesc &MCID, bool IsIndirect,
515  MachineOperand &MO, const MDNode *Variable,
516  const MDNode *Expr);
517 
518 /// This version of the builder builds a DBG_VALUE or DBG_VALUE_LIST intrinsic
519 /// for a machine operand and inserts it at position I.
520 MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
521  MachineBasicBlock::iterator I, const DebugLoc &DL,
522  const MCInstrDesc &MCID, bool IsIndirect,
523  ArrayRef<MachineOperand> MOs,
524  const MDNode *Variable, const MDNode *Expr);
525 
526 /// Clone a DBG_VALUE whose value has been spilled to FrameIndex.
527 MachineInstr *buildDbgValueForSpill(MachineBasicBlock &BB,
529  const MachineInstr &Orig, int FrameIndex,
530  Register SpillReg);
531 MachineInstr *
533  const MachineInstr &Orig, int FrameIndex,
534  SmallVectorImpl<const MachineOperand *> &SpilledOperands);
535 
536 /// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when
537 /// modifying an instruction in place while iterating over a basic block.
538 void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex, Register Reg);
539 
540 inline unsigned getDefRegState(bool B) {
541  return B ? RegState::Define : 0;
542 }
543 inline unsigned getImplRegState(bool B) {
544  return B ? RegState::Implicit : 0;
545 }
546 inline unsigned getKillRegState(bool B) {
547  return B ? RegState::Kill : 0;
548 }
549 inline unsigned getDeadRegState(bool B) {
550  return B ? RegState::Dead : 0;
551 }
552 inline unsigned getUndefRegState(bool B) {
553  return B ? RegState::Undef : 0;
554 }
555 inline unsigned getInternalReadRegState(bool B) {
556  return B ? RegState::InternalRead : 0;
557 }
558 inline unsigned getDebugRegState(bool B) {
559  return B ? RegState::Debug : 0;
560 }
561 inline unsigned getRenamableRegState(bool B) {
562  return B ? RegState::Renamable : 0;
563 }
564 
565 /// Get all register state flags from machine operand \p RegOp.
566 inline unsigned getRegState(const MachineOperand &RegOp) {
567  assert(RegOp.isReg() && "Not a register operand");
568  return getDefRegState(RegOp.isDef()) | getImplRegState(RegOp.isImplicit()) |
569  getKillRegState(RegOp.isKill()) | getDeadRegState(RegOp.isDead()) |
570  getUndefRegState(RegOp.isUndef()) |
572  getDebugRegState(RegOp.isDebug()) |
574  RegOp.isRenamable());
575 }
576 
577 /// Helper class for constructing bundles of MachineInstrs.
578 ///
579 /// MIBundleBuilder can create a bundle from scratch by inserting new
580 /// MachineInstrs one at a time, or it can create a bundle from a sequence of
581 /// existing MachineInstrs in a basic block.
583  MachineBasicBlock &MBB;
586 
587 public:
588  /// Create an MIBundleBuilder that inserts instructions into a new bundle in
589  /// BB above the bundle or instruction at Pos.
591  : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
592 
593  /// Create a bundle from the sequence of instructions between B and E.
596  : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
597  assert(B != E && "No instructions to bundle");
598  ++B;
599  while (B != E) {
600  MachineInstr &MI = *B;
601  ++B;
602  MI.bundleWithPred();
603  }
604  }
605 
606  /// Create an MIBundleBuilder representing an existing instruction or bundle
607  /// that has MI as its head.
609  : MBB(*MI->getParent()), Begin(MI),
610  End(getBundleEnd(MI->getIterator())) {}
611 
612  /// Return a reference to the basic block containing this bundle.
613  MachineBasicBlock &getMBB() const { return MBB; }
614 
615  /// Return true if no instructions have been inserted in this bundle yet.
616  /// Empty bundles aren't representable in a MachineBasicBlock.
617  bool empty() const { return Begin == End; }
618 
619  /// Return an iterator to the first bundled instruction.
620  MachineBasicBlock::instr_iterator begin() const { return Begin; }
621 
622  /// Return an iterator beyond the last bundled instruction.
623  MachineBasicBlock::instr_iterator end() const { return End; }
624 
625  /// Insert MI into this bundle before I which must point to an instruction in
626  /// the bundle, or end().
628  MachineInstr *MI) {
629  MBB.insert(I, MI);
630  if (I == Begin) {
631  if (!empty())
632  MI->bundleWithSucc();
633  Begin = MI->getIterator();
634  return *this;
635  }
636  if (I == End) {
637  MI->bundleWithPred();
638  return *this;
639  }
640  // MI was inserted in the middle of the bundle, so its neighbors' flags are
641  // already fine. Update MI's bundle flags manually.
642  MI->setFlag(MachineInstr::BundledPred);
643  MI->setFlag(MachineInstr::BundledSucc);
644  return *this;
645  }
646 
647  /// Insert MI into MBB by prepending it to the instructions in the bundle.
648  /// MI will become the first instruction in the bundle.
650  return insert(begin(), MI);
651  }
652 
653  /// Insert MI into MBB by appending it to the instructions in the bundle.
654  /// MI will become the last instruction in the bundle.
656  return insert(end(), MI);
657  }
658 };
659 
660 } // end namespace llvm
661 
662 #endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H
llvm::MachineInstrBuilder::operator->
MachineInstr * operator->() const
Definition: MachineInstrBuilder.h:84
llvm::MachineOperand::CreateCPI
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:837
llvm::RegState::InternalRead
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
Definition: MachineInstrBuilder.h:59
llvm::MachineOperand::CreateJTI
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
Definition: MachineOperand.h:853
llvm::MachineInstrBuilder::addCImm
const MachineInstrBuilder & addCImm(const ConstantInt *Val) const
Definition: MachineInstrBuilder.h:136
llvm::MachineOperand::MO_BlockAddress
@ MO_BlockAddress
Address of a basic block.
Definition: MachineOperand.h:62
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:108
MachineInstr.h
llvm::MachineOperand::MO_Immediate
@ MO_Immediate
Immediate operand.
Definition: MachineOperand.h:52
llvm::MachineInstrBuilder::addImm
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Definition: MachineInstrBuilder.h:131
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::MachineInstrBuilder::copyImplicitOps
const MachineInstrBuilder & copyImplicitOps(const MachineInstr &OtherMI) const
Copy all the implicit operands from OtherMI onto this one.
Definition: MachineInstrBuilder.h:321
llvm::MIMetadata::getPCSections
MDNode * getPCSections() const
Definition: MachineInstrBuilder.h:349
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
llvm::MachineInstrBuilder::addFPImm
const MachineInstrBuilder & addFPImm(const ConstantFP *Val) const
Definition: MachineInstrBuilder.h:141
llvm::MachineOperand::CreateReg
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
Definition: MachineOperand.h:800
llvm::MIBundleBuilder::begin
MachineBasicBlock::instr_iterator begin() const
Return an iterator to the first bundled instruction.
Definition: MachineInstrBuilder.h:620
llvm::CmpInst::Predicate
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:719
llvm::MachineOperand::getGlobal
const GlobalValue * getGlobal() const
Definition: MachineOperand.h:572
llvm::MachineInstrBuilder::add
const MachineInstrBuilder & add(const MachineOperand &MO) const
Definition: MachineInstrBuilder.h:224
llvm::MIBundleBuilder::end
MachineBasicBlock::instr_iterator end() const
Return an iterator beyond the last bundled instruction.
Definition: MachineInstrBuilder.h:623
llvm::MachineInstrBuilder::addCFIIndex
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
Definition: MachineInstrBuilder.h:247
llvm::MachineOperand::getBlockAddress
const BlockAddress * getBlockAddress() const
Definition: MachineOperand.h:577
llvm::MIBundleBuilder::MIBundleBuilder
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B, MachineBasicBlock::iterator E)
Create a bundle from the sequence of instructions between B and E.
Definition: MachineInstrBuilder.h:594
ErrorHandling.h
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
MachineBasicBlock.h
llvm::MIBundleBuilder::MIBundleBuilder
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos)
Create an MIBundleBuilder that inserts instructions into a new bundle in BB above the bundle or instr...
Definition: MachineInstrBuilder.h:590
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:237
llvm::DILocation
Debug location.
Definition: DebugInfoMetadata.h:1557
llvm::MachineFunction::CreateMachineInstr
MachineInstr * CreateMachineInstr(const MCInstrDesc &MCID, DebugLoc DL, bool NoImplicit=false)
CreateMachineInstr - Allocate a new MachineInstr.
Definition: MachineFunction.cpp:373
llvm::MachineOperand::CreateMetadata
static MachineOperand CreateMetadata(const MDNode *Meta)
Definition: MachineOperand.h:907
llvm::MachineOperand::CreateCFIIndex
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
Definition: MachineOperand.h:922
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:127
llvm::getDeadRegState
unsigned getDeadRegState(bool B)
Definition: MachineInstrBuilder.h:549
llvm::RegState::Debug
@ Debug
Register 'use' is for debugging purpose.
Definition: MachineInstrBuilder.h:56
llvm::MIMetadata::MIMetadata
MIMetadata()=default
llvm::MachineOperand::getOffset
int64_t getOffset() const
Return the offset from the symbol in this operand.
Definition: MachineOperand.h:609
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::constrainSelectedInstRegOperands
bool constrainSelectedInstRegOperands(MachineInstr &I, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
Mutate the newly-selected instruction I to constrain its (possibly generic) virtual register operands...
Definition: Utils.cpp:152
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::getUndefRegState
unsigned getUndefRegState(bool B)
Definition: MachineInstrBuilder.h:552
llvm::MachineOperand::CreateES
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
Definition: MachineOperand.h:867
llvm::MIMetadata::getDL
const DebugLoc & getDL() const
Definition: MachineInstrBuilder.h:348
llvm::getBundleEnd
MachineBasicBlock::instr_iterator getBundleEnd(MachineBasicBlock::instr_iterator I)
Returns an iterator pointing beyond the bundle containing I.
Definition: MachineInstrBundle.h:60
llvm::MachineOperand::isKill
bool isKill() const
Definition: MachineOperand.h:389
llvm::BitmaskEnumDetail::Mask
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:80
llvm::MachineInstrBuilder::addDef
const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
Definition: MachineInstrBuilder.h:116
llvm::MachineOperand::isRenamable
bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
Definition: MachineOperand.cpp:118
llvm::ConstantInt
This is the shared class of boolean and integer constants.
Definition: Constants.h:79
llvm::getDefRegState
unsigned getDefRegState(bool B)
Definition: MachineInstrBuilder.h:540
llvm::MIBundleBuilder::insert
MIBundleBuilder & insert(MachineBasicBlock::instr_iterator I, MachineInstr *MI)
Insert MI into this bundle before I which must point to an instruction in the bundle,...
Definition: MachineInstrBuilder.h:627
llvm::MachineOperand::isImplicit
bool isImplicit() const
Definition: MachineOperand.h:379
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:98
llvm::getRenamableRegState
unsigned getRenamableRegState(bool B)
Definition: MachineInstrBuilder.h:561
llvm::MachineInstrBuilder::addMBB
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:146
llvm::MIBundleBuilder::getMBB
MachineBasicBlock & getMBB() const
Return a reference to the basic block containing this bundle.
Definition: MachineInstrBuilder.h:613
llvm::MachineOperand::CreateImm
static MachineOperand CreateImm(int64_t Val)
Definition: MachineOperand.h:782
llvm::MachineOperand::MO_GlobalAddress
@ MO_GlobalAddress
Address of a global value.
Definition: MachineOperand.h:61
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::getImm
int64_t getImm() const
Definition: MachineOperand.h:546
llvm::RegState::ImplicitKill
@ ImplicitKill
Definition: MachineInstrBuilder.h:64
Intrinsics.h
llvm::buildDbgValueForSpill
MachineInstr * buildDbgValueForSpill(MachineBasicBlock &BB, MachineBasicBlock::iterator I, const MachineInstr &Orig, int FrameIndex, Register SpillReg)
Clone a DBG_VALUE whose value has been spilled to FrameIndex.
Definition: MachineInstr.cpp:2219
InstrTypes.h
llvm::Register::isPhysicalRegister
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:65
Utils.h
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::MCInstrDesc
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:197
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:48
llvm::Instruction
Definition: Instruction.h:42
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:147
MachineInstrBundle.h
llvm::ConstantFP
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:257
llvm::MachineOperand::CreateFI
static MachineOperand CreateFI(int Idx)
Definition: MachineOperand.h:832
llvm::RegState::Renamable
@ Renamable
Register that may be renamed.
Definition: MachineInstrBuilder.h:61
llvm::MIMetadata::MIMetadata
MIMetadata(const Instruction &From)
Definition: MachineInstrBuilder.h:342
llvm::MachineInstrBuilder::addExternalSymbol
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:184
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::MachineInstrBuilder::getReg
Register getReg(unsigned Idx) const
Get the register for the operand index.
Definition: MachineInstrBuilder.h:94
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::MIMetadata::MIMetadata
MIMetadata(const DILocation *DI, MDNode *PCSections=nullptr)
Definition: MachineInstrBuilder.h:340
llvm::RegState::EarlyClobber
@ EarlyClobber
Register definition happens before uses.
Definition: MachineInstrBuilder.h:54
llvm::MachineInstrBuilder::cloneMemRefs
const MachineInstrBuilder & cloneMemRefs(const MachineInstr &OtherMI) const
Definition: MachineInstrBuilder.h:213
llvm::MIMetadata
Set of metadata that should be preserved when using BuildMI().
Definition: MachineInstrBuilder.h:335
llvm::MachineInstrBuilder::addFrameIndex
const MachineInstrBuilder & addFrameIndex(int Idx) const
Definition: MachineInstrBuilder.h:152
llvm::MachineInstrBuilder::setMIFlag
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
Definition: MachineInstrBuilder.h:278
llvm::MachineOperand::CreateShuffleMask
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
Definition: MachineOperand.h:940
llvm::getRegState
unsigned getRegState(const MachineOperand &RegOp)
Get all register state flags from machine operand RegOp.
Definition: MachineInstrBuilder.h:566
llvm::RegisterBankInfo
Holds all the information related to register banks.
Definition: RegisterBankInfo.h:39
llvm::GlobalValue
Definition: GlobalValue.h:44
llvm::MachineOperand::isUndef
bool isUndef() const
Definition: MachineOperand.h:394
llvm::MachineOperand::getTargetFlags
unsigned getTargetFlags() const
Definition: MachineOperand.h:220
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:320
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
llvm::MachineInstrBuilder
Definition: MachineInstrBuilder.h:69
llvm::MachineOperand::CreateMBB
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
Definition: MachineOperand.h:825
llvm::MachineInstrBuilder::addShuffleMask
const MachineInstrBuilder & addShuffleMask(ArrayRef< int > Val) const
Definition: MachineInstrBuilder.h:262
llvm::updateDbgValueForSpill
void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex, Register Reg)
Update a DBG_VALUE whose value has been spilled to FrameIndex.
Definition: MachineInstr.cpp:2262
llvm::MIBundleBuilder::empty
bool empty() const
Return true if no instructions have been inserted in this bundle yet.
Definition: MachineInstrBuilder.h:617
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
llvm::MachineOperand::isDead
bool isDead() const
Definition: MachineOperand.h:384
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::MachineInstrBuilder::addDisp
const MachineInstrBuilder & addDisp(const MachineOperand &Disp, int64_t off, unsigned char TargetFlags=0) const
Definition: MachineInstrBuilder.h:284
ArrayRef.h
llvm::MachineOperand::getType
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
Definition: MachineOperand.h:218
llvm::RegState::Define
@ Define
Register definition.
Definition: MachineInstrBuilder.h:44
llvm::RegState::Undef
@ Undef
Value of the register doesn't matter.
Definition: MachineInstrBuilder.h:52
llvm::MachineInstrBuilder::addIntrinsicID
const MachineInstrBuilder & addIntrinsicID(Intrinsic::ID ID) const
Definition: MachineInstrBuilder.h:252
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::move
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1666
llvm::MachineInstrBuilder::addMemOperand
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
Definition: MachineInstrBuilder.h:202
llvm::MachineOperand::CreateBA
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:875
llvm::MachineInstrBuilder::MachineInstrBuilder
MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I)
Definition: MachineInstrBuilder.h:79
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
llvm::MachineInstrBuilder::addUse
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
Definition: MachineInstrBuilder.h:123
llvm::MachineOperand::getReg
Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:359
llvm::MDNode
Metadata node.
Definition: Metadata.h:944
llvm::MachineOperand::CreateMCSymbol
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
Definition: MachineOperand.h:913
llvm::MIMetadata::MIMetadata
MIMetadata(DebugLoc DL, MDNode *PCSections=nullptr)
Definition: MachineInstrBuilder.h:338
llvm::MachineInstrBuilder::constrainAllUses
bool constrainAllUses(const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
Definition: MachineInstrBuilder.h:326
llvm::MachineInstr::MIFlag
MIFlag
Definition: MachineInstr.h:82
llvm::MachineFunction
Definition: MachineFunction.h:257
getDebugLoc
static DebugLoc getDebugLoc(MachineBasicBlock::instr_iterator FirstMI, MachineBasicBlock::instr_iterator LastMI)
Return the first found DebugLoc that has a DILocation, given a range of instructions.
Definition: MachineInstrBundle.cpp:110
llvm::MachineOperand::MO_JumpTableIndex
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
Definition: MachineOperand.h:59
llvm::BlockAddress
The address of a basic block.
Definition: Constants.h:849
llvm::MachineInstrBuilder::addRegMask
const MachineInstrBuilder & addRegMask(const uint32_t *Mask) const
Definition: MachineInstrBuilder.h:197
llvm::MachineBasicBlock::iterator
MachineInstrBundleIterator< MachineInstr > iterator
Definition: MachineBasicBlock.h:269
llvm::MachineOperand::CreateIntrinsicID
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
Definition: MachineOperand.h:928
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::MachineInstrBuilder::add
const MachineInstrBuilder & add(ArrayRef< MachineOperand > MOs) const
Definition: MachineInstrBuilder.h:229
llvm::RegState::Implicit
@ Implicit
Not emitted register (e.g. carry, or temporary result).
Definition: MachineInstrBuilder.h:46
llvm::MachineOperand::CreateGA
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:859
llvm::MachineInstrBuilder::addJumpTableIndex
const MachineInstrBuilder & addJumpTableIndex(unsigned Idx, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:171
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::MIMetadata::MIMetadata
MIMetadata(const MachineInstr &From)
Definition: MachineInstrBuilder.h:345
getParent
static const Function * getParent(const Value *V)
Definition: BasicAliasAnalysis.cpp:838
uint32_t
llvm::MIBundleBuilder
Helper class for constructing bundles of MachineInstrs.
Definition: MachineInstrBuilder.h:582
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::MachineOperand::isDef
bool isDef() const
Definition: MachineOperand.h:374
llvm::MachineInstrBuilder::addPredicate
const MachineInstrBuilder & addPredicate(CmpInst::Predicate Pred) const
Definition: MachineInstrBuilder.h:257
llvm::MachineInstrBuilder::addBlockAddress
const MachineInstrBuilder & addBlockAddress(const BlockAddress *BA, int64_t Offset=0, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:190
llvm::RegState::DefineNoRead
@ DefineNoRead
Definition: MachineInstrBuilder.h:62
llvm::MachineOperand::CreateCImm
static MachineOperand CreateCImm(const ConstantInt *CI)
Definition: MachineOperand.h:788
llvm::MachineInstrBuilder::cloneMergedMemRefs
const MachineInstrBuilder & cloneMergedMemRefs(ArrayRef< const MachineInstr * > OtherMIs) const
Definition: MachineInstrBuilder.h:219
llvm::MachineInstrBuilder::getInstr
MachineInstr * getInstr() const
If conversion operators fail, use this method to get the MachineInstr explicitly.
Definition: MachineInstrBuilder.h:89
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:80
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MIBundleBuilder::prepend
MIBundleBuilder & prepend(MachineInstr *MI)
Insert MI into MBB by prepending it to the instructions in the bundle.
Definition: MachineInstrBuilder.h:649
std
Definition: BitVector.h:851
llvm::getDebugRegState
unsigned getDebugRegState(bool B)
Definition: MachineInstrBuilder.h:558
llvm::MachineOperand::getIndex
int getIndex() const
Definition: MachineOperand.h:566
llvm::MachineInstrBuilder::addConstantPoolIndex
const MachineInstrBuilder & addConstantPoolIndex(unsigned Idx, int Offset=0, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:158
llvm::MachineBasicBlock::instr_iterator
Instructions::iterator instr_iterator
Definition: MachineBasicBlock.h:264
llvm::MIBundleBuilder::MIBundleBuilder
MIBundleBuilder(MachineInstr *MI)
Create an MIBundleBuilder representing an existing instruction or bundle that has MI as its head.
Definition: MachineInstrBuilder.h:608
llvm::MachineInstrBuilder::setMemRefs
const MachineInstrBuilder & setMemRefs(ArrayRef< MachineMemOperand * > MMOs) const
Definition: MachineInstrBuilder.h:208
llvm::MachineInstrBuilder::addTargetIndex
const MachineInstrBuilder & addTargetIndex(unsigned Idx, int64_t Offset=0, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:164
llvm::MIBundleBuilder::append
MIBundleBuilder & append(MachineInstr *MI)
Insert MI into MBB by appending it to the instructions in the bundle.
Definition: MachineInstrBuilder.h:655
llvm::MachineOperand::isDebug
bool isDebug() const
Definition: MachineOperand.h:445
llvm::MachineInstrBuilder::addGlobalAddress
const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:177
llvm::getKillRegState
unsigned getKillRegState(bool B)
Definition: MachineInstrBuilder.h:546
llvm::MachineInstrBuilder::addSym
const MachineInstrBuilder & addSym(MCSymbol *Sym, unsigned char TargetFlags=0) const
Definition: MachineInstrBuilder.h:267
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:357
llvm::MachineOperand::CreateRegMask
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
Definition: MachineOperand.h:895
llvm::MachineInstrBuilder::setMIFlags
const MachineInstrBuilder & setMIFlags(unsigned Flags) const
Definition: MachineInstrBuilder.h:273
llvm::MachineInstr::BundledSucc
@ BundledSucc
Definition: MachineInstr.h:89
llvm::MachineInstrBuilder::MachineInstrBuilder
MachineInstrBuilder()=default
llvm::MachineOperand::isInternalRead
bool isInternalRead() const
Definition: MachineOperand.h:430
llvm::MachineInstrBuilder::addMetadata
const MachineInstrBuilder & addMetadata(const MDNode *MD) const
Definition: MachineInstrBuilder.h:236
MachineOperand.h
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:48
llvm::RegState::Dead
@ Dead
Unused definition.
Definition: MachineInstrBuilder.h:50
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::MachineInstrBuilder::setPCSections
const MachineInstrBuilder & setPCSections(MDNode *MD) const
Definition: MachineInstrBuilder.h:313
From
BlockVerifier::State From
Definition: BlockVerifier.cpp:55
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::getInternalReadRegState
unsigned getInternalReadRegState(bool B)
Definition: MachineInstrBuilder.h:555
MachineFunction.h
llvm::MachineInstr::BundledPred
@ BundledPred
Definition: MachineInstr.h:88
llvm::MachineInstrBuilder::MachineInstrBuilder
MachineInstrBuilder(MachineFunction &F, MachineInstr *I)
Create a MachineInstrBuilder for manipulating an existing instruction.
Definition: MachineInstrBuilder.h:78
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::RegState::ImplicitDefine
@ ImplicitDefine
Definition: MachineInstrBuilder.h:63
llvm::getImplRegState
unsigned getImplRegState(bool B)
Definition: MachineInstrBuilder.h:543
llvm::MachineOperand::CreatePredicate
static MachineOperand CreatePredicate(unsigned Pred)
Definition: MachineOperand.h:934
TargetRegisterInfo.h
SubReg
unsigned SubReg
Definition: AArch64AdvSIMDScalarPass.cpp:104
llvm::MachineOperand::CreateFPImm
static MachineOperand CreateFPImm(const ConstantFP *CFP)
Definition: MachineOperand.h:794
llvm::MachineOperand::CreateTargetIndex
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
Definition: MachineOperand.h:845
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:38
llvm::MachineOperand::MO_ConstantPoolIndex
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
Definition: MachineOperand.h:57