LLVM 19.0.0git
MachineInstrBuilder.h
Go to the documentation of this file.
1//===- CodeGen/MachineInstrBuilder.h - Simplify creation of MIs --*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file exposes a function named BuildMI, which is useful for dramatically
10// simplifying how MachineInstr's are created. It allows use of code like this:
11//
12// MIMetadata MIMD(MI); // Propagates DebugLoc and other metadata
13// M = BuildMI(MBB, MI, MIMD, TII.get(X86::ADD8rr), Dst)
14// .addReg(argVal1)
15// .addReg(argVal2);
16//
17//===----------------------------------------------------------------------===//
18
19#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
20#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
21
22#include "llvm/ADT/ArrayRef.h"
30#include "llvm/IR/InstrTypes.h"
31#include "llvm/IR/Intrinsics.h"
33#include <cassert>
34#include <cstdint>
35
36namespace llvm {
37
38class MCInstrDesc;
39class MDNode;
40
41namespace RegState {
42
43enum {
44 /// Register definition.
45 Define = 0x2,
46 /// Not emitted register (e.g. carry, or temporary result).
47 Implicit = 0x4,
48 /// The last use of a register.
49 Kill = 0x8,
50 /// Unused definition.
51 Dead = 0x10,
52 /// Value of the register doesn't matter.
53 Undef = 0x20,
54 /// Register definition happens before uses.
56 /// Register 'use' is for debugging purpose.
57 Debug = 0x80,
58 /// Register reads a value that is defined inside the same instruction or
59 /// bundle.
60 InternalRead = 0x100,
61 /// Register that may be renamed.
62 Renamable = 0x200,
66};
67
68} // end namespace RegState
69
71 MachineFunction *MF = nullptr;
72 MachineInstr *MI = nullptr;
73
74public:
76
77 /// Create a MachineInstrBuilder for manipulating an existing instruction.
78 /// F must be the machine function that was used to allocate I.
81 : MF(&F), MI(&*I) {}
82
83 /// Allow automatic conversion to the machine instruction we are working on.
84 operator MachineInstr*() const { return MI; }
85 MachineInstr *operator->() const { return MI; }
86 operator MachineBasicBlock::iterator() const { return MI; }
87
88 /// If conversion operators fail, use this method to get the MachineInstr
89 /// explicitly.
90 MachineInstr *getInstr() const { return MI; }
91
92 /// Get the register for the operand index.
93 /// The operand at the index should be a register (asserted by
94 /// MachineOperand).
95 Register getReg(unsigned Idx) const { return MI->getOperand(Idx).getReg(); }
96
97 /// Add a new virtual register operand.
98 const MachineInstrBuilder &addReg(Register RegNo, unsigned flags = 0,
99 unsigned SubReg = 0) const {
100 assert((flags & 0x1) == 0 &&
101 "Passing in 'true' to addReg is forbidden! Use enums instead.");
102 MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
103 flags & RegState::Define,
104 flags & RegState::Implicit,
105 flags & RegState::Kill,
106 flags & RegState::Dead,
107 flags & RegState::Undef,
109 SubReg,
110 flags & RegState::Debug,
112 flags & RegState::Renamable));
113 return *this;
114 }
115
116 /// Add a virtual register definition operand.
117 const MachineInstrBuilder &addDef(Register RegNo, unsigned Flags = 0,
118 unsigned SubReg = 0) const {
119 return addReg(RegNo, Flags | RegState::Define, SubReg);
120 }
121
122 /// Add a virtual register use operand. It is an error for Flags to contain
123 /// `RegState::Define` when calling this function.
124 const MachineInstrBuilder &addUse(Register RegNo, unsigned Flags = 0,
125 unsigned SubReg = 0) const {
126 assert(!(Flags & RegState::Define) &&
127 "Misleading addUse defines register, use addReg instead.");
128 return addReg(RegNo, Flags, SubReg);
129 }
130
131 /// Add a new immediate operand.
132 const MachineInstrBuilder &addImm(int64_t Val) const {
133 MI->addOperand(*MF, MachineOperand::CreateImm(Val));
134 return *this;
135 }
136
137 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
138 MI->addOperand(*MF, MachineOperand::CreateCImm(Val));
139 return *this;
140 }
141
142 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
143 MI->addOperand(*MF, MachineOperand::CreateFPImm(Val));
144 return *this;
145 }
146
148 unsigned TargetFlags = 0) const {
149 MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
150 return *this;
151 }
152
154 MI->addOperand(*MF, MachineOperand::CreateFI(Idx));
155 return *this;
156 }
157
158 const MachineInstrBuilder &
159 addConstantPoolIndex(unsigned Idx, int Offset = 0,
160 unsigned TargetFlags = 0) const {
161 MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
162 return *this;
163 }
164
165 const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
166 unsigned TargetFlags = 0) const {
168 TargetFlags));
169 return *this;
170 }
171
173 unsigned TargetFlags = 0) const {
174 MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
175 return *this;
176 }
177
179 int64_t Offset = 0,
180 unsigned TargetFlags = 0) const {
181 MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
182 return *this;
183 }
184
185 const MachineInstrBuilder &addExternalSymbol(const char *FnName,
186 unsigned TargetFlags = 0) const {
187 MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags));
188 return *this;
189 }
190
192 int64_t Offset = 0,
193 unsigned TargetFlags = 0) const {
194 MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags));
195 return *this;
196 }
197
198 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
199 MI->addOperand(*MF, MachineOperand::CreateRegMask(Mask));
200 return *this;
201 }
202
204 MI->addMemOperand(*MF, MMO);
205 return *this;
206 }
207
208 const MachineInstrBuilder &
210 MI->setMemRefs(*MF, MMOs);
211 return *this;
212 }
213
214 const MachineInstrBuilder &cloneMemRefs(const MachineInstr &OtherMI) const {
215 MI->cloneMemRefs(*MF, OtherMI);
216 return *this;
217 }
218
219 const MachineInstrBuilder &
221 MI->cloneMergedMemRefs(*MF, OtherMIs);
222 return *this;
223 }
224
225 const MachineInstrBuilder &add(const MachineOperand &MO) const {
226 MI->addOperand(*MF, MO);
227 return *this;
228 }
229
231 for (const MachineOperand &MO : MOs) {
232 MI->addOperand(*MF, MO);
233 }
234 return *this;
235 }
236
237 const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
238 MI->addOperand(*MF, MachineOperand::CreateMetadata(MD));
239 assert((MI->isDebugValueLike() ? static_cast<bool>(MI->getDebugVariable())
240 : true) &&
241 "first MDNode argument of a DBG_VALUE not a variable");
242 assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel())
243 : true) &&
244 "first MDNode argument of a DBG_LABEL not a label");
245 return *this;
246 }
247
248 const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const {
249 MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex));
250 return *this;
251 }
252
254 MI->addOperand(*MF, MachineOperand::CreateIntrinsicID(ID));
255 return *this;
256 }
257
259 MI->addOperand(*MF, MachineOperand::CreatePredicate(Pred));
260 return *this;
261 }
262
264 MI->addOperand(*MF, MachineOperand::CreateShuffleMask(Val));
265 return *this;
266 }
267
269 unsigned char TargetFlags = 0) const {
270 MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym, TargetFlags));
271 return *this;
272 }
273
274 const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
275 MI->setFlags(Flags);
276 return *this;
277 }
278
280 MI->setFlag(Flag);
281 return *this;
282 }
283
284 const MachineInstrBuilder &setOperandDead(unsigned OpIdx) const {
285 MI->getOperand(OpIdx).setIsDead();
286 return *this;
287 }
288
289 // Add a displacement from an existing MachineOperand with an added offset.
290 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
291 unsigned char TargetFlags = 0) const {
292 // If caller specifies new TargetFlags then use it, otherwise the
293 // default behavior is to copy the target flags from the existing
294 // MachineOperand. This means if the caller wants to clear the
295 // target flags it needs to do so explicitly.
296 if (0 == TargetFlags)
297 TargetFlags = Disp.getTargetFlags();
298
299 switch (Disp.getType()) {
300 default:
301 llvm_unreachable("Unhandled operand type in addDisp()");
303 return addImm(Disp.getImm() + off);
305 return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off,
306 TargetFlags);
308 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
309 TargetFlags);
311 return addBlockAddress(Disp.getBlockAddress(), Disp.getOffset() + off,
312 TargetFlags);
314 assert(off == 0 && "cannot create offset into jump tables");
315 return addJumpTableIndex(Disp.getIndex(), TargetFlags);
316 }
317 }
318
320 if (MD)
321 MI->setPCSections(*MF, MD);
322 return *this;
323 }
324
325 /// Copy all the implicit operands from OtherMI onto this one.
326 const MachineInstrBuilder &
327 copyImplicitOps(const MachineInstr &OtherMI) const {
328 MI->copyImplicitOps(*MF, OtherMI);
329 return *this;
330 }
331
333 const TargetRegisterInfo &TRI,
334 const RegisterBankInfo &RBI) const {
336 }
337};
338
339/// Set of metadata that should be preserved when using BuildMI(). This provides
340/// a more convenient way of preserving DebugLoc and PCSections.
342public:
343 MIMetadata() = default;
344 MIMetadata(DebugLoc DL, MDNode *PCSections = nullptr)
345 : DL(std::move(DL)), PCSections(PCSections) {}
346 MIMetadata(const DILocation *DI, MDNode *PCSections = nullptr)
347 : DL(DI), PCSections(PCSections) {}
348 explicit MIMetadata(const Instruction &From)
349 : DL(From.getDebugLoc()),
350 PCSections(From.getMetadata(LLVMContext::MD_pcsections)) {}
351 explicit MIMetadata(const MachineInstr &From)
352 : DL(From.getDebugLoc()), PCSections(From.getPCSections()) {}
353
354 const DebugLoc &getDL() const { return DL; }
355 MDNode *getPCSections() const { return PCSections; }
356
357private:
358 DebugLoc DL;
359 MDNode *PCSections = nullptr;
360};
361
362/// Builder interface. Specify how to create the initial instruction itself.
364 const MCInstrDesc &MCID) {
365 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, MIMD.getDL()))
367}
368
369/// This version of the builder sets up the first operand as a
370/// destination virtual register.
372 const MCInstrDesc &MCID, Register DestReg) {
373 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, MIMD.getDL()))
375 .addReg(DestReg, RegState::Define);
376}
377
378/// This version of the builder inserts the newly-built instruction before
379/// the given position in the given MachineBasicBlock, and sets up the first
380/// operand as a destination virtual register.
383 const MIMetadata &MIMD,
384 const MCInstrDesc &MCID, Register DestReg) {
385 MachineFunction &MF = *BB.getParent();
386 MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
387 BB.insert(I, MI);
388 return MachineInstrBuilder(MF, MI)
390 .addReg(DestReg, RegState::Define);
391}
392
393/// This version of the builder inserts the newly-built instruction before
394/// the given position in the given MachineBasicBlock, and sets up the first
395/// operand as a destination virtual register.
396///
397/// If \c I is inside a bundle, then the newly inserted \a MachineInstr is
398/// added to the same bundle.
401 const MIMetadata &MIMD,
402 const MCInstrDesc &MCID, Register DestReg) {
403 MachineFunction &MF = *BB.getParent();
404 MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
405 BB.insert(I, MI);
406 return MachineInstrBuilder(MF, MI)
408 .addReg(DestReg, RegState::Define);
409}
410
412 const MIMetadata &MIMD,
413 const MCInstrDesc &MCID, Register DestReg) {
414 // Calling the overload for instr_iterator is always correct. However, the
415 // definition is not available in headers, so inline the check.
416 if (I.isInsideBundle())
417 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), MIMD, MCID,
418 DestReg);
419 return BuildMI(BB, MachineBasicBlock::iterator(I), MIMD, MCID, DestReg);
420}
421
423 const MIMetadata &MIMD,
424 const MCInstrDesc &MCID, Register DestReg) {
425 return BuildMI(BB, *I, MIMD, MCID, DestReg);
426}
427
428/// This version of the builder inserts the newly-built instruction before the
429/// given position in the given MachineBasicBlock, and does NOT take a
430/// destination register.
433 const MIMetadata &MIMD,
434 const MCInstrDesc &MCID) {
435 MachineFunction &MF = *BB.getParent();
436 MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
437 BB.insert(I, MI);
439}
440
443 const MIMetadata &MIMD,
444 const MCInstrDesc &MCID) {
445 MachineFunction &MF = *BB.getParent();
446 MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
447 BB.insert(I, MI);
449}
450
452 const MIMetadata &MIMD,
453 const MCInstrDesc &MCID) {
454 // Calling the overload for instr_iterator is always correct. However, the
455 // definition is not available in headers, so inline the check.
456 if (I.isInsideBundle())
457 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), MIMD, MCID);
458 return BuildMI(BB, MachineBasicBlock::iterator(I), MIMD, MCID);
459}
460
462 const MIMetadata &MIMD,
463 const MCInstrDesc &MCID) {
464 return BuildMI(BB, *I, MIMD, MCID);
465}
466
467/// This version of the builder inserts the newly-built instruction at the end
468/// of the given MachineBasicBlock, and does NOT take a destination register.
470 const MIMetadata &MIMD,
471 const MCInstrDesc &MCID) {
472 return BuildMI(*BB, BB->end(), MIMD, MCID);
473}
474
475/// This version of the builder inserts the newly-built instruction at the
476/// end of the given MachineBasicBlock, and sets up the first operand as a
477/// destination virtual register.
479 const MIMetadata &MIMD,
480 const MCInstrDesc &MCID, Register DestReg) {
481 return BuildMI(*BB, BB->end(), MIMD, MCID, DestReg);
482}
483
484/// This version of the builder builds a DBG_VALUE intrinsic
485/// for either a value in a register or a register-indirect
486/// address. The convention is that a DBG_VALUE is indirect iff the
487/// second operand is an immediate.
488MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
489 const MCInstrDesc &MCID, bool IsIndirect,
490 Register Reg, const MDNode *Variable,
491 const MDNode *Expr);
492
493/// This version of the builder builds a DBG_VALUE or DBG_VALUE_LIST intrinsic
494/// for a MachineOperand.
495MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
496 const MCInstrDesc &MCID, bool IsIndirect,
497 ArrayRef<MachineOperand> MOs,
498 const MDNode *Variable, const MDNode *Expr);
499
500/// This version of the builder builds a DBG_VALUE intrinsic
501/// for either a value in a register or a register-indirect
502/// address and inserts it at position I.
503MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
504 MachineBasicBlock::iterator I, const DebugLoc &DL,
505 const MCInstrDesc &MCID, bool IsIndirect,
506 Register Reg, const MDNode *Variable,
507 const MDNode *Expr);
508
509/// This version of the builder builds a DBG_VALUE, DBG_INSTR_REF, or
510/// DBG_VALUE_LIST intrinsic for a machine operand and inserts it at position I.
511MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
512 MachineBasicBlock::iterator I, const DebugLoc &DL,
513 const MCInstrDesc &MCID, bool IsIndirect,
514 ArrayRef<MachineOperand> MOs,
515 const MDNode *Variable, const MDNode *Expr);
516
517/// Clone a DBG_VALUE whose value has been spilled to FrameIndex.
518MachineInstr *buildDbgValueForSpill(MachineBasicBlock &BB,
520 const MachineInstr &Orig, int FrameIndex,
521 Register SpillReg);
522MachineInstr *
524 const MachineInstr &Orig, int FrameIndex,
525 SmallVectorImpl<const MachineOperand *> &SpilledOperands);
526
527/// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when
528/// modifying an instruction in place while iterating over a basic block.
529void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex, Register Reg);
530
531inline unsigned getDefRegState(bool B) {
532 return B ? RegState::Define : 0;
533}
534inline unsigned getImplRegState(bool B) {
535 return B ? RegState::Implicit : 0;
536}
537inline unsigned getKillRegState(bool B) {
538 return B ? RegState::Kill : 0;
539}
540inline unsigned getDeadRegState(bool B) {
541 return B ? RegState::Dead : 0;
542}
543inline unsigned getUndefRegState(bool B) {
544 return B ? RegState::Undef : 0;
545}
546inline unsigned getInternalReadRegState(bool B) {
547 return B ? RegState::InternalRead : 0;
548}
549inline unsigned getDebugRegState(bool B) {
550 return B ? RegState::Debug : 0;
551}
552inline unsigned getRenamableRegState(bool B) {
553 return B ? RegState::Renamable : 0;
554}
555
556/// Get all register state flags from machine operand \p RegOp.
557inline unsigned getRegState(const MachineOperand &RegOp) {
558 assert(RegOp.isReg() && "Not a register operand");
559 return getDefRegState(RegOp.isDef()) | getImplRegState(RegOp.isImplicit()) |
560 getKillRegState(RegOp.isKill()) | getDeadRegState(RegOp.isDead()) |
561 getUndefRegState(RegOp.isUndef()) |
563 getDebugRegState(RegOp.isDebug()) |
565 RegOp.isRenamable());
566}
567
568/// Helper class for constructing bundles of MachineInstrs.
569///
570/// MIBundleBuilder can create a bundle from scratch by inserting new
571/// MachineInstrs one at a time, or it can create a bundle from a sequence of
572/// existing MachineInstrs in a basic block.
577
578public:
579 /// Create an MIBundleBuilder that inserts instructions into a new bundle in
580 /// BB above the bundle or instruction at Pos.
582 : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
583
584 /// Create a bundle from the sequence of instructions between B and E.
587 : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
588 assert(B != E && "No instructions to bundle");
589 ++B;
590 while (B != E) {
591 MachineInstr &MI = *B;
592 ++B;
593 MI.bundleWithPred();
594 }
595 }
596
597 /// Create an MIBundleBuilder representing an existing instruction or bundle
598 /// that has MI as its head.
600 : MBB(*MI->getParent()), Begin(MI),
601 End(getBundleEnd(MI->getIterator())) {}
602
603 /// Return a reference to the basic block containing this bundle.
604 MachineBasicBlock &getMBB() const { return MBB; }
605
606 /// Return true if no instructions have been inserted in this bundle yet.
607 /// Empty bundles aren't representable in a MachineBasicBlock.
608 bool empty() const { return Begin == End; }
609
610 /// Return an iterator to the first bundled instruction.
611 MachineBasicBlock::instr_iterator begin() const { return Begin; }
612
613 /// Return an iterator beyond the last bundled instruction.
615
616 /// Insert MI into this bundle before I which must point to an instruction in
617 /// the bundle, or end().
619 MachineInstr *MI) {
620 MBB.insert(I, MI);
621 if (I == Begin) {
622 if (!empty())
623 MI->bundleWithSucc();
624 Begin = MI->getIterator();
625 return *this;
626 }
627 if (I == End) {
628 MI->bundleWithPred();
629 return *this;
630 }
631 // MI was inserted in the middle of the bundle, so its neighbors' flags are
632 // already fine. Update MI's bundle flags manually.
635 return *this;
636 }
637
638 /// Insert MI into MBB by prepending it to the instructions in the bundle.
639 /// MI will become the first instruction in the bundle.
641 return insert(begin(), MI);
642 }
643
644 /// Insert MI into MBB by appending it to the instructions in the bundle.
645 /// MI will become the last instruction in the bundle.
647 return insert(end(), MI);
648 }
649};
650
651} // end namespace llvm
652
653#endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H
unsigned SubReg
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static const Function * getParent(const Value *V)
BlockVerifier::State From
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
bool End
Definition: ELF_riscv.cpp:480
Symbol * Sym
Definition: ELF_riscv.cpp:479
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
static DebugLoc getDebugLoc(MachineBasicBlock::instr_iterator FirstMI, MachineBasicBlock::instr_iterator LastMI)
Return the first found DebugLoc that has a DILocation, given a range of instructions.
unsigned const TargetRegisterInfo * TRI
unsigned Reg
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
The address of a basic block.
Definition: Constants.h:889
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:966
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:268
This is the shared class of boolean and integer constants.
Definition: Constants.h:80
Debug location.
A debug info location.
Definition: DebugLoc.h:33
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:198
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:40
Metadata node.
Definition: Metadata.h:1067
Helper class for constructing bundles of MachineInstrs.
MachineBasicBlock::instr_iterator end() const
Return an iterator beyond the last bundled instruction.
MachineBasicBlock::instr_iterator begin() const
Return an iterator to the first bundled instruction.
MIBundleBuilder & append(MachineInstr *MI)
Insert MI into MBB by appending it to the instructions in the bundle.
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B, MachineBasicBlock::iterator E)
Create a bundle from the sequence of instructions between B and E.
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos)
Create an MIBundleBuilder that inserts instructions into a new bundle in BB above the bundle or instr...
MIBundleBuilder & insert(MachineBasicBlock::instr_iterator I, MachineInstr *MI)
Insert MI into this bundle before I which must point to an instruction in the bundle,...
MachineBasicBlock & getMBB() const
Return a reference to the basic block containing this bundle.
MIBundleBuilder & prepend(MachineInstr *MI)
Insert MI into MBB by prepending it to the instructions in the bundle.
bool empty() const
Return true if no instructions have been inserted in this bundle yet.
MIBundleBuilder(MachineInstr *MI)
Create an MIBundleBuilder representing an existing instruction or bundle that has MI as its head.
Set of metadata that should be preserved when using BuildMI().
const DebugLoc & getDL() const
MIMetadata()=default
MIMetadata(DebugLoc DL, MDNode *PCSections=nullptr)
MIMetadata(const DILocation *DI, MDNode *PCSections=nullptr)
MIMetadata(const Instruction &From)
MIMetadata(const MachineInstr &From)
MDNode * getPCSections() const
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
Instructions::iterator instr_iterator
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
MachineInstrBundleIterator< MachineInstr > iterator
MachineInstr * CreateMachineInstr(const MCInstrDesc &MCID, DebugLoc DL, bool NoImplicit=false)
CreateMachineInstr - Allocate a new MachineInstr.
const MachineInstrBuilder & cloneMergedMemRefs(ArrayRef< const MachineInstr * > OtherMIs) const
const MachineInstrBuilder & addTargetIndex(unsigned Idx, int64_t Offset=0, unsigned TargetFlags=0) const
Register getReg(unsigned Idx) const
Get the register for the operand index.
const MachineInstrBuilder & setMemRefs(ArrayRef< MachineMemOperand * > MMOs) const
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned TargetFlags=0) const
const MachineInstrBuilder & addCImm(const ConstantInt *Val) const
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
const MachineInstrBuilder & setOperandDead(unsigned OpIdx) const
MachineInstrBuilder(MachineFunction &F, MachineInstr *I)
Create a MachineInstrBuilder for manipulating an existing instruction.
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
MachineInstr * operator->() const
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addPredicate(CmpInst::Predicate Pred) const
const MachineInstrBuilder & addBlockAddress(const BlockAddress *BA, int64_t Offset=0, unsigned TargetFlags=0) const
const MachineInstrBuilder & add(const MachineOperand &MO) const
const MachineInstrBuilder & addIntrinsicID(Intrinsic::ID ID) const
const MachineInstrBuilder & addMetadata(const MDNode *MD) const
const MachineInstrBuilder & addSym(MCSymbol *Sym, unsigned char TargetFlags=0) const
const MachineInstrBuilder & addShuffleMask(ArrayRef< int > Val) const
MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I)
const MachineInstrBuilder & addFrameIndex(int Idx) const
const MachineInstrBuilder & addConstantPoolIndex(unsigned Idx, int Offset=0, unsigned TargetFlags=0) const
const MachineInstrBuilder & addRegMask(const uint32_t *Mask) const
const MachineInstrBuilder & add(ArrayRef< MachineOperand > MOs) const
const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned TargetFlags=0) const
const MachineInstrBuilder & addDisp(const MachineOperand &Disp, int64_t off, unsigned char TargetFlags=0) const
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addFPImm(const ConstantFP *Val) const
bool constrainAllUses(const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
const MachineInstrBuilder & addJumpTableIndex(unsigned Idx, unsigned TargetFlags=0) const
const MachineInstrBuilder & setPCSections(MDNode *MD) const
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
const MachineInstrBuilder & cloneMemRefs(const MachineInstr &OtherMI) const
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
const MachineInstrBuilder & setMIFlags(unsigned Flags) const
const MachineInstrBuilder & copyImplicitOps(const MachineInstr &OtherMI) const
Copy all the implicit operands from OtherMI onto this one.
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
MachineInstr * getInstr() const
If conversion operators fail, use this method to get the MachineInstr explicitly.
const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
Representation of each machine instruction.
Definition: MachineInstr.h:69
A description of a memory reference used in the backend.
MachineOperand class - Representation of each machine instruction operand.
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
const GlobalValue * getGlobal() const
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
static MachineOperand CreateFPImm(const ConstantFP *CFP)
int64_t getImm() const
bool isImplicit() const
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static MachineOperand CreateCImm(const ConstantInt *CI)
bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
static MachineOperand CreateMetadata(const MDNode *Meta)
const BlockAddress * getBlockAddress() const
static MachineOperand CreatePredicate(unsigned Pred)
unsigned getTargetFlags() const
static MachineOperand CreateImm(int64_t Val)
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
Register getReg() const
getReg - Returns the register number.
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
bool isInternalRead() const
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
@ MO_Immediate
Immediate operand.
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
@ MO_GlobalAddress
Address of a global value.
@ MO_BlockAddress
Address of a basic block.
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
int64_t getOffset() const
Return the offset from the symbol in this operand.
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
static MachineOperand CreateFI(int Idx)
Holds all the information related to register banks.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
constexpr bool isPhysical() const
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:95
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ Implicit
Not emitted register (e.g. carry, or temporary result).
@ Debug
Register 'use' is for debugging purpose.
@ Dead
Unused definition.
@ Renamable
Register that may be renamed.
@ Define
Register definition.
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
@ Kill
The last use of a register.
@ Undef
Value of the register doesn't matter.
@ EarlyClobber
Register definition happens before uses.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:456
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex, Register Reg)
Update a DBG_VALUE whose value has been spilled to FrameIndex.
bool constrainSelectedInstRegOperands(MachineInstr &I, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
Mutate the newly-selected instruction I to constrain its (possibly generic) virtual register operands...
Definition: Utils.cpp:153
unsigned getDeadRegState(bool B)
unsigned getImplRegState(bool B)
MachineBasicBlock::instr_iterator getBundleEnd(MachineBasicBlock::instr_iterator I)
Returns an iterator pointing beyond the bundle containing I.
unsigned getInternalReadRegState(bool B)
unsigned getDebugRegState(bool B)
unsigned getUndefRegState(bool B)
unsigned getRegState(const MachineOperand &RegOp)
Get all register state flags from machine operand RegOp.
unsigned getDefRegState(bool B)
unsigned getKillRegState(bool B)
unsigned getRenamableRegState(bool B)
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1849
MachineInstr * buildDbgValueForSpill(MachineBasicBlock &BB, MachineBasicBlock::iterator I, const MachineInstr &Orig, int FrameIndex, Register SpillReg)
Clone a DBG_VALUE whose value has been spilled to FrameIndex.
Implement std::hash so that hash_code can be used in STL containers.
Definition: BitVector.h:858