LLVM 20.0.0git
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#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/RegisterBank.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/MC/LaneBitmask.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Printable.h"
#include <cassert>
#include <cstdint>
Go to the source code of this file.
Classes | |
class | llvm::TargetRegisterClass |
struct | llvm::TargetRegisterInfoDesc |
Extra information, not in MCRegisterDesc, about registers. More... | |
struct | llvm::RegClassWeight |
Each TargetRegisterClass has a per register weight, and weight limit which must be less than the limits of its pressure sets. More... | |
class | llvm::TargetRegisterInfo |
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDesc objects that represent all of the machine registers that the target has. More... | |
struct | llvm::TargetRegisterInfo::RegClassInfo |
struct | llvm::TargetRegisterInfo::SubRegCoveredBits |
SubRegCoveredBits - Emitted by tablegen: bit range covered by a subreg index, -1 in any being invalid. More... | |
class | llvm::SuperRegClassIterator |
class | llvm::BitMaskClassIterator |
This class encapuslates the logic to iterate over bitmask returned by the various RegClass related APIs. More... | |
struct | llvm::VirtReg2IndexFunctor |
Namespaces | |
namespace | llvm |
This is an optimization pass for GlobalISel generic memory operations. | |
Functions | |
Printable | llvm::printReg (Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr) |
Prints virtual and physical registers with or without a TRI instance. | |
Printable | llvm::printRegUnit (unsigned Unit, const TargetRegisterInfo *TRI) |
Create Printable object to print register units on a raw_ostream. | |
Printable | llvm::printVRegOrUnit (unsigned VRegOrUnit, const TargetRegisterInfo *TRI) |
Create Printable object to print virtual registers and physical registers on a raw_ostream. | |
Printable | llvm::printRegClassOrBank (Register Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI) |
Create Printable object to print register classes or register banks on a raw_ostream. | |