- a -
- A : BuiltinGCs.cpp
- aa : AliasAnalysis.cpp, ScalarEvolutionAliasAnalysis.cpp, BasicAliasAnalysis.cpp, GlobalsModRef.cpp
- AArch64MinimumJumpTableEntries : AArch64Subtarget.cpp
- AArch64StreamingHazardSize : AArch64Subtarget.cpp
- AArch64StreamingStackHazardSize : AArch64Subtarget.cpp
- AccelTables : DwarfDebug.cpp
- Access : DXILResourceAccess.cpp
- AddBuildAttributes : HexagonAsmParser.cpp, RISCVAsmParser.cpp
- Additionally : DeadArgumentElimination.cpp
- AddLinkageNamesToDeclCallOrigins : DwarfCompileUnit.cpp
- AddOpsInlineThreshold : ScalarEvolution.cpp
- Addr : ELFObjHandler.cpp
- AddrSinkCombineBaseGV : CodeGenPrepare.cpp
- AddrSinkCombineBaseOffs : CodeGenPrepare.cpp
- AddrSinkCombineBaseReg : CodeGenPrepare.cpp
- AddrSinkCombineScaledReg : CodeGenPrepare.cpp
- AddrSinkNewPhis : CodeGenPrepare.cpp
- AddrSinkNewSelects : CodeGenPrepare.cpp
- AddrSinkUsingGEPs : CodeGenPrepare.cpp
- AddSubFlagsOpcodeMap : ARMBaseInstrInfo.cpp
- AdjustJumpTableBlocks : ARMConstantIslandPass.cpp
- AfterColour : StandardInstrumentations.cpp
- AggregateArgsOpt : CodeExtractor.cpp
- Aggregates : SROA.cpp
- Aggressive : PeepholeOptimizer.cpp
- AggressiveMachineCSE : MachineCSE.cpp
- AIXSmallTlsPolicySizeLimit : PPCISelLowering.cpp
- AIXSSPCanaryWordName : PPCISelLowering.cpp
- AliasedCheckLimit : SLPVectorizer.cpp
- Align : ELFObjHandler.cpp
- AlignAllBlock : MachineBlockPlacement.cpp
- AlignAllFunctions : MachineFunction.cpp
- AlignAllNonFallThruBlocks : MachineBlockPlacement.cpp
- AlignConstantIslands : MipsConstantIslandPass.cpp
- AlignLoads : HexagonISelLowering.cpp
- alive : DeadArgumentElimination.cpp
- AllArchs : LoongArchTargetParser.cpp
- AllBackedges : PlaceSafepoints.cpp
- AllFeatures : LoongArchTargetParser.cpp
- AllMaskVTs : VEISelLowering.cpp
- allocation : PHIElimination.cpp
- AllocationFnData : MemoryBuiltins.cpp
- Allocator : RegAllocBasic.cpp, RegAllocGreedy.cpp
- AllocSizeNumElemsNotPresent : Attributes.cpp
- AllowContractEnabled : LowerMatrixIntrinsics.cpp
- AllowDeepWrapper : Attributor.cpp
- AllowDropSolutionIfLessProfitable : LoopStrengthReduce.cpp
- AllowGInsertAsArtifact : Legalizer.cpp
- AllowIncompleteIR : LLParser.cpp
- AllowIVWidening : IndVarSimplify.cpp
- AllowNarrowLatchCondition : InductiveRangeCheckElimination.cpp
- AllowRecursiveInline : SampleProfile.cpp
- AllowShallowWrappers : Attributor.cpp
- AllowSplatInVW_W : RISCVISelLowering.cpp
- AllowStatepointWithNoDeoptInfo : RewriteStatepointsForGC.cpp
- AllowStridedPointerIVs : LoopVectorizationLegality.cpp
- AllowUnrollAndJam : LoopUnrollAndJamPass.cpp
- AllowUnsignedLatchCondition : InductiveRangeCheckElimination.cpp
- AllowWLSLoops : ARMTargetTransformInfo.cpp
- AllPackedVTs : VEISelLowering.cpp
- AllS16Vectors : AMDGPULegalizerInfo.cpp
- AllS32Vectors : AMDGPULegalizerInfo.cpp
- AllS64Vectors : AMDGPULegalizerInfo.cpp
- AllScalarTypes : AMDGPULegalizerInfo.cpp
- AllSubCommands : CommandLine.cpp
- AllVectorVTs : VEISelLowering.cpp
- AlwaysBasePointer : PPCRegisterInfo.cpp
- AlwaysInlineDeviceFunctions : OpenMPOpt.cpp
- AlwaysUseISBDSB : ARMSLSHardening.cpp
- AmdgcnSkipCacheInvalidations : SIMemoryLegalizer.cpp
- AMDGPUAtomicOptimizerStrategy : AMDGPUTargetMachine.cpp
- AMDGPUBypassSlowDiv : AMDGPUISelLowering.cpp
- AMDGPUSchedStrategy : AMDGPUTargetMachine.cpp
- amdgpustructurizer : R600MachineCFGStructurizer.cpp
- Analysis : LiveDebugVariables.cpp, LiveIntervals.cpp, LiveStacks.cpp, LiveVariables.cpp, ModuleSummaryAnalysis.cpp, MachineBlockFrequencyInfo.cpp, MachineBranchProbabilityInfo.cpp, MachineCycleAnalysis.cpp, MachineUniformityAnalysis.cpp, SpillPlacement.cpp, DXILShaderFlags.cpp
- analysis : ModuleSummaryAnalysis.cpp, DXILShaderFlags.cpp, SPIRVConvergenceRegionAnalysis.cpp
- Analysis : BranchProbabilityInfo.cpp, LazyMachineBlockFrequencyInfo.cpp, BlockFrequencyInfo.cpp, CycleAnalysis.cpp, DependenceAnalysis.cpp, GlobalsModRef.cpp, LazyBlockFrequencyInfo.cpp, LazyBranchProbabilityInfo.cpp, LazyValueInfo.cpp, MemoryDependenceAnalysis.cpp, ScalarEvolution.cpp, ScalarEvolutionAliasAnalysis.cpp, UniformityAnalysis.cpp
- Anchors : ELF_riscv.cpp
- ANDIGlueBug : PPCISelDAGToDAG.cpp, PPCISelLowering.cpp
- AndImmShrink : X86ISelDAGToDAG.cpp
- AnnotateDeclarationCallSites : Attributor.cpp
- AnnotateInlinePhase : InlineAdvisor.cpp
- AnnotateNoAlias : LoopVersioning.cpp
- AnnotateSampleProfileInlinePhase : SampleProfile.cpp
- AnyAddressSpace : AMDGPURewriteOutArguments.cpp
- APIFile : Internalize.cpp
- APIList : Internalize.cpp
- AppendContentHashToOutlinedName : MachineOutliner.cpp
- ApplyExtTspForSize : MachineBlockPlacement.cpp
- ArchRegNames : CSKYInstPrinter.cpp, RISCVInstPrinter.cpp
- ARDecoderTable : XtensaDisassembler.cpp
- ArgAllocaCost : AMDGPUTargetTransformInfo.cpp
- ArgAllocaCutoff : AMDGPUTargetTransformInfo.cpp
- ArgFPR16s : RISCVCallingConv.cpp
- ArgFPR32s : RISCVCallingConv.cpp, LoongArchISelLowering.cpp
- ArgFPR64s : LoongArchISelLowering.cpp, RISCVCallingConv.cpp
- ArgGPRs : LoongArchISelLowering.cpp
- ArgHelpPrefix : CommandLine.cpp
- ArgPrefix : CommandLine.cpp
- ArgPrefixLong : CommandLine.cpp
- args : NVPTXLowerArgs.cpp
- ArgTLSSize : DataFlowSanitizer.cpp
- Arguments : AMDGPULowerKernelArguments.cpp, AMDGPURewriteOutArguments.cpp, AMDGPUPromoteKernelArguments.cpp
- ArgVRM2s : RISCVCallingConv.cpp
- ArgVRM4s : RISCVCallingConv.cpp
- ArgVRM8s : RISCVCallingConv.cpp
- ArgVRN2M1s : RISCVCallingConv.cpp
- ArgVRN2M2s : RISCVCallingConv.cpp
- ArgVRN2M4s : RISCVCallingConv.cpp
- ArgVRN3M1s : RISCVCallingConv.cpp
- ArgVRN3M2s : RISCVCallingConv.cpp
- ArgVRN4M1s : RISCVCallingConv.cpp
- ArgVRN4M2s : RISCVCallingConv.cpp
- ArgVRN5M1s : RISCVCallingConv.cpp
- ArgVRN6M1s : RISCVCallingConv.cpp
- ArgVRN7M1s : RISCVCallingConv.cpp
- ArgVRN8M1s : RISCVCallingConv.cpp
- ArgVRs : LoongArchISelLowering.cpp, RISCVCallingConv.cpp
- ArgXRs : LoongArchISelLowering.cpp
- ARM_MLxTable : ARMBaseInstrInfo.cpp
- ARM_PREALLOC_LOAD_STORE_OPT_NAME : ARMLoadStoreOptimizer.cpp
- ARMAttributeTags : ARMBuildAttrs.cpp
- ARMInterworking : ARMISelLowering.cpp
- AsmWriterVariant : AArch64MCAsmInfo.cpp
- ASRRegDecoderTable : SparcDisassembler.cpp
- AssemblerName : MCSectionMachO.cpp
- AssignmentTrackingModuleFlag : DebugInfo.cpp
- AssumeDefaultIsFlatAddressSpace : InferAddressSpaces.cpp
- AssumeITCMConflict : ARMHazardRecognizer.cpp
- AssumeMisalignedLoadStores : ARMLoadStoreOptimizer.cpp
- AssumeNoOverflow : LoopFlatten.cpp
- AtomicCounter : GCOVProfiling.cpp
- AttrFlag : MCSectionMachO.cpp
- Attributes : AMDGPULowerKernelAttributes.cpp
- AttributorRun : PassBuilderPipelines.cpp
- AuthenticatedLRCheckMethod : AArch64Subtarget.cpp
- AuxType : COFFYAML.cpp
- AvgIPC : ScheduleDAGRRList.cpp
- AvoidCapabilities : SPIRVModuleAnalysis.cpp
- AvoidReuse : LowerTypeTests.cpp
- AvoidSpeculation : MachineLICM.cpp