LLVM
13.0.0git
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#include "AMDGPUTargetMachine.h"
#include "AMDGPU.h"
#include "AMDGPUAliasAnalysis.h"
#include "AMDGPUExportClustering.h"
#include "AMDGPUMacroFusion.h"
#include "AMDGPUTargetObjectFile.h"
#include "AMDGPUTargetTransformInfo.h"
#include "GCNIterativeScheduler.h"
#include "GCNSchedStrategy.h"
#include "R600MachineScheduler.h"
#include "SIMachineFunctionInfo.h"
#include "SIMachineScheduler.h"
#include "TargetInfo/AMDGPUTargetInfo.h"
#include "llvm/Analysis/CGSCCPassManager.h"
#include "llvm/CodeGen/GlobalISel/IRTranslator.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
#include "llvm/CodeGen/GlobalISel/Legalizer.h"
#include "llvm/CodeGen/GlobalISel/Localizer.h"
#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
#include "llvm/CodeGen/MIRParser/MIParser.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/LegacyPassManager.h"
#include "llvm/IR/PassManager.h"
#include "llvm/InitializePasses.h"
#include "llvm/Passes/PassBuilder.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Transforms/IPO.h"
#include "llvm/Transforms/IPO/AlwaysInliner.h"
#include "llvm/Transforms/IPO/GlobalDCE.h"
#include "llvm/Transforms/IPO/Internalize.h"
#include "llvm/Transforms/IPO/PassManagerBuilder.h"
#include "llvm/Transforms/Scalar.h"
#include "llvm/Transforms/Scalar/GVN.h"
#include "llvm/Transforms/Scalar/InferAddressSpaces.h"
#include "llvm/Transforms/Utils.h"
#include "llvm/Transforms/Utils/SimplifyLibCalls.h"
#include "llvm/Transforms/Vectorize.h"
Go to the source code of this file.
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LLVM_EXTERNAL_VISIBILITY void | LLVMInitializeAMDGPUTarget () |
static std::unique_ptr< TargetLoweringObjectFile > | createTLOF (const Triple &TT) |
static ScheduleDAGInstrs * | createR600MachineScheduler (MachineSchedContext *C) |
static ScheduleDAGInstrs * | createSIMachineScheduler (MachineSchedContext *C) |
static ScheduleDAGInstrs * | createGCNMaxOccupancyMachineScheduler (MachineSchedContext *C) |
static ScheduleDAGInstrs * | createIterativeGCNMaxOccupancyMachineScheduler (MachineSchedContext *C) |
static ScheduleDAGInstrs * | createMinRegScheduler (MachineSchedContext *C) |
static ScheduleDAGInstrs * | createIterativeILPMachineScheduler (MachineSchedContext *C) |
static StringRef | computeDataLayout (const Triple &TT) |
static LLVM_READNONE StringRef | getGPUOrDefault (const Triple &TT, StringRef GPU) |
static Reloc::Model | getEffectiveRelocModel (Optional< Reloc::Model > RM) |
static bool | mustPreserveGV (const GlobalValue &GV) |
Predicate for Internalize pass. More... | |
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static cl::opt< bool > | EnableR600StructurizeCFG ("r600-ir-structurize", cl::desc("Use StructurizeCFG IR pass"), cl::init(true)) |
static cl::opt< bool > | EnableSROA ("amdgpu-sroa", cl::desc("Run SROA after promote alloca pass"), cl::ReallyHidden, cl::init(true)) |
static cl::opt< bool > | EnableEarlyIfConversion ("amdgpu-early-ifcvt", cl::Hidden, cl::desc("Run early if-conversion"), cl::init(false)) |
static cl::opt< bool > | OptExecMaskPreRA ("amdgpu-opt-exec-mask-pre-ra", cl::Hidden, cl::desc("Run pre-RA exec mask optimizations"), cl::init(true)) |
static cl::opt< bool > | EnableR600IfConvert ("r600-if-convert", cl::desc("Use if conversion pass"), cl::ReallyHidden, cl::init(true)) |
static cl::opt< bool > | EnableLoadStoreVectorizer ("amdgpu-load-store-vectorizer", cl::desc("Enable load store vectorizer"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | ScalarizeGlobal ("amdgpu-scalarize-global-loads", cl::desc("Enable global load scalarization"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | InternalizeSymbols ("amdgpu-internalize-symbols", cl::desc("Enable elimination of non-kernel functions and unused globals"), cl::init(false), cl::Hidden) |
static cl::opt< bool > | EarlyInlineAll ("amdgpu-early-inline-all", cl::desc("Inline all functions early"), cl::init(false), cl::Hidden) |
static cl::opt< bool > | EnableSDWAPeephole ("amdgpu-sdwa-peephole", cl::desc("Enable SDWA peepholer"), cl::init(true)) |
static cl::opt< bool > | EnableDPPCombine ("amdgpu-dpp-combine", cl::desc("Enable DPP combiner"), cl::init(true)) |
static cl::opt< bool > | EnableAMDGPUAliasAnalysis ("enable-amdgpu-aa", cl::Hidden, cl::desc("Enable AMDGPU Alias Analysis"), cl::init(true)) |
static cl::opt< bool, true > | LateCFGStructurize ("amdgpu-late-structurize", cl::desc("Enable late CFG structurization"), cl::location(AMDGPUTargetMachine::EnableLateStructurizeCFG), cl::Hidden) |
static cl::opt< bool, true > | EnableAMDGPUFunctionCallsOpt ("amdgpu-function-calls", cl::desc("Enable AMDGPU function call support"), cl::location(AMDGPUTargetMachine::EnableFunctionCalls), cl::init(true), cl::Hidden) |
static cl::opt< bool, true > | EnableAMDGPUFixedFunctionABIOpt ("amdgpu-fixed-function-abi", cl::desc("Enable all implicit function arguments"), cl::location(AMDGPUTargetMachine::EnableFixedFunctionABI), cl::init(false), cl::Hidden) |
static cl::opt< bool > | EnableLibCallSimplify ("amdgpu-simplify-libcall", cl::desc("Enable amdgpu library simplifications"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableLowerKernelArguments ("amdgpu-ir-lower-kernel-arguments", cl::desc("Lower kernel argument loads in IR pass"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableRegReassign ("amdgpu-reassign-regs", cl::desc("Enable register reassign optimizations on gfx10+"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableAtomicOptimizations ("amdgpu-atomic-optimizations", cl::desc("Enable atomic optimizations"), cl::init(false), cl::Hidden) |
static cl::opt< bool > | EnableSIModeRegisterPass ("amdgpu-mode-register", cl::desc("Enable mode register pass"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableDCEInRA ("amdgpu-dce-in-ra", cl::init(true), cl::Hidden, cl::desc("Enable machine DCE inside regalloc")) |
static cl::opt< bool > | EnableScalarIRPasses ("amdgpu-scalar-ir-passes", cl::desc("Enable scalar IR passes"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableStructurizerWorkarounds ("amdgpu-enable-structurizer-workarounds", cl::desc("Enable workarounds for the StructurizeCFG pass"), cl::init(true), cl::Hidden) |
static MachineSchedRegistry | R600SchedRegistry ("r600", "Run R600's custom scheduler", createR600MachineScheduler) |
static MachineSchedRegistry | SISchedRegistry ("si", "Run SI's custom scheduler", createSIMachineScheduler) |
static MachineSchedRegistry | GCNMaxOccupancySchedRegistry ("gcn-max-occupancy", "Run GCN scheduler to maximize occupancy", createGCNMaxOccupancyMachineScheduler) |
static MachineSchedRegistry | IterativeGCNMaxOccupancySchedRegistry ("gcn-max-occupancy-experimental", "Run GCN scheduler to maximize occupancy (experimental)", createIterativeGCNMaxOccupancyMachineScheduler) |
static MachineSchedRegistry | GCNMinRegSchedRegistry ("gcn-minreg", "Run GCN iterative scheduler for minimal register usage (experimental)", createMinRegScheduler) |
static MachineSchedRegistry | GCNILPSchedRegistry ("gcn-ilp", "Run GCN iterative scheduler for ILP scheduling (experimental)", createIterativeILPMachineScheduler) |
The AMDGPU target machine contains all of the hardware specific information needed to emit code for R600 and SI GPUs.
Definition in file AMDGPUTargetMachine.cpp.
Definition at line 336 of file AMDGPUTargetMachine.cpp.
References llvm::Triple::r600.
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Definition at line 287 of file AMDGPUTargetMachine.cpp.
References llvm::createLoadClusterDAGMutation(), and llvm::GCNIterativeScheduler::SCHEDULE_LEGACYMAXOCCUPANCY.
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Definition at line 300 of file AMDGPUTargetMachine.cpp.
References llvm::createAMDGPUMacroFusionDAGMutation(), llvm::createLoadClusterDAGMutation(), and llvm::GCNIterativeScheduler::SCHEDULE_ILP.
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Definition at line 294 of file AMDGPUTargetMachine.cpp.
References llvm::GCNIterativeScheduler::SCHEDULE_MINREGFORCED.
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Definition at line 268 of file AMDGPUTargetMachine.cpp.
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Definition at line 272 of file AMDGPUTargetMachine.cpp.
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Definition at line 264 of file AMDGPUTargetMachine.cpp.
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Definition at line 363 of file AMDGPUTargetMachine.cpp.
References llvm::Reloc::PIC_.
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Definition at line 352 of file AMDGPUTargetMachine.cpp.
References llvm::Triple::amdgcn, llvm::Triple::AMDHSA, and llvm::StringRef::empty().
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget | ( | ) |
Definition at line 196 of file AMDGPUTargetMachine.cpp.
References llvm::PassRegistry::getPassRegistry(), llvm::getTheAMDGPUTarget(), llvm::getTheGCNTarget(), llvm::initializeAMDGPUAAWrapperPassPass(), llvm::initializeAMDGPUAlwaysInlinePass(), llvm::initializeAMDGPUAnnotateKernelFeaturesPass(), llvm::initializeAMDGPUAnnotateUniformValuesPass(), llvm::initializeAMDGPUArgumentUsageInfoPass(), llvm::initializeAMDGPUAtomicOptimizerPass(), llvm::initializeAMDGPUCodeGenPreparePass(), llvm::initializeAMDGPUDAGToDAGISelPass(), llvm::initializeAMDGPUExternalAAWrapperPass(), llvm::initializeAMDGPUFixFunctionBitcastsPass(), llvm::initializeAMDGPULateCodeGenPreparePass(), llvm::initializeAMDGPULowerIntrinsicsPass(), llvm::initializeAMDGPULowerKernelArgumentsPass(), llvm::initializeAMDGPULowerKernelAttributesPass(), llvm::initializeAMDGPUOpenCLEnqueuedBlockLoweringPass(), llvm::initializeAMDGPUPostLegalizerCombinerPass(), llvm::initializeAMDGPUPreLegalizerCombinerPass(), llvm::initializeAMDGPUPrintfRuntimeBindingPass(), llvm::initializeAMDGPUPromoteAllocaPass(), llvm::initializeAMDGPUPromoteAllocaToVectorPass(), llvm::initializeAMDGPUPropagateAttributesEarlyPass(), llvm::initializeAMDGPUPropagateAttributesLatePass(), llvm::initializeAMDGPURewriteOutArgumentsPass(), llvm::initializeAMDGPUSimplifyLibCallsPass(), llvm::initializeAMDGPUUnifyDivergentExitNodesPass(), llvm::initializeAMDGPUUnifyMetadataPass(), llvm::initializeAMDGPUUseNativeCallsPass(), llvm::initializeGCNDPPCombinePass(), llvm::initializeGCNNSAReassignPass(), llvm::initializeGCNRegBankReassignPass(), llvm::initializeGlobalISel(), llvm::initializeR600ClauseMergePassPass(), llvm::initializeR600ControlFlowFinalizerPass(), llvm::initializeR600ExpandSpecialInstrsPassPass(), llvm::initializeR600PacketizerPass(), llvm::initializeR600VectorRegMergerPass(), llvm::initializeSIAddIMGInitPass(), llvm::initializeSIAnnotateControlFlowPass(), llvm::initializeSIFixSGPRCopiesPass(), llvm::initializeSIFixVGPRCopiesPass(), llvm::initializeSIFoldOperandsPass(), llvm::initializeSIFormMemoryClausesPass(), llvm::initializeSIInsertHardClausesPass(), llvm::initializeSIInsertSkipsPass(), llvm::initializeSIInsertWaitcntsPass(), llvm::initializeSILoadStoreOptimizerPass(), llvm::initializeSILowerControlFlowPass(), llvm::initializeSILowerI1CopiesPass(), llvm::initializeSILowerSGPRSpillsPass(), llvm::initializeSIMemoryLegalizerPass(), llvm::initializeSIModeRegisterPass(), llvm::initializeSIOptimizeExecMaskingPass(), llvm::initializeSIOptimizeExecMaskingPreRAPass(), llvm::initializeSIPeepholeSDWAPass(), llvm::initializeSIPostRABundlerPass(), llvm::initializeSIPreAllocateWWMRegsPass(), llvm::initializeSIPreEmitPeepholePass(), llvm::initializeSIRemoveShortExecBranchesPass(), llvm::initializeSIShrinkInstructionsPass(), llvm::initializeSIWholeQuadModePass(), X, and Y.
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Predicate for Internalize pass.
Definition at line 411 of file AMDGPUTargetMachine.cpp.
References F, llvm::AMDGPU::isEntryFunctionCC(), and llvm::Value::use_empty().
Referenced by llvm::AMDGPUTargetMachine::adjustPassManager(), and llvm::AMDGPUTargetMachine::registerPassBuilderCallbacks().
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Referenced by llvm::AMDGPUTargetMachine::adjustPassManager().
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Referenced by llvm::AMDGPUTargetMachine::AMDGPUTargetMachine().
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Referenced by llvm::R600TargetMachine::R600TargetMachine().
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Referenced by llvm::GCNTargetMachine::getSubtargetImpl().
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